EZR32WG_MSC_BitFieldsDevices
Macro Definition Documentation
| #define _MSC_ADDRB_ADDRB_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_ADDRB
Definition at line
211
of file
ezr32wg_msc.h
.
| #define _MSC_ADDRB_ADDRB_MASK 0xFFFFFFFFUL |
Bit mask for MSC_ADDRB
Definition at line
210
of file
ezr32wg_msc.h
.
| #define _MSC_ADDRB_ADDRB_SHIFT 0 |
Shift value for MSC_ADDRB
Definition at line
209
of file
ezr32wg_msc.h
.
| #define _MSC_ADDRB_MASK 0xFFFFFFFFUL |
Mask for MSC_ADDRB
Definition at line
208
of file
ezr32wg_msc.h
.
| #define _MSC_ADDRB_RESETVALUE 0x00000000UL |
Default value for MSC_ADDRB
Definition at line
207
of file
ezr32wg_msc.h
.
| #define _MSC_CACHEHITS_CACHEHITS_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_CACHEHITS
Definition at line
397
of file
ezr32wg_msc.h
.
| #define _MSC_CACHEHITS_CACHEHITS_MASK 0xFFFFFUL |
Bit mask for MSC_CACHEHITS
Definition at line
396
of file
ezr32wg_msc.h
.
| #define _MSC_CACHEHITS_CACHEHITS_SHIFT 0 |
Shift value for MSC_CACHEHITS
Definition at line
395
of file
ezr32wg_msc.h
.
| #define _MSC_CACHEHITS_MASK 0x000FFFFFUL |
Mask for MSC_CACHEHITS
Definition at line
394
of file
ezr32wg_msc.h
.
| #define _MSC_CACHEHITS_RESETVALUE 0x00000000UL |
Default value for MSC_CACHEHITS
Definition at line
393
of file
ezr32wg_msc.h
.
| #define _MSC_CACHEMISSES_CACHEMISSES_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_CACHEMISSES
Definition at line
405
of file
ezr32wg_msc.h
.
| #define _MSC_CACHEMISSES_CACHEMISSES_MASK 0xFFFFFUL |
Bit mask for MSC_CACHEMISSES
Definition at line
404
of file
ezr32wg_msc.h
.
| #define _MSC_CACHEMISSES_CACHEMISSES_SHIFT 0 |
Shift value for MSC_CACHEMISSES
Definition at line
403
of file
ezr32wg_msc.h
.
| #define _MSC_CACHEMISSES_MASK 0x000FFFFFUL |
Mask for MSC_CACHEMISSES
Definition at line
402
of file
ezr32wg_msc.h
.
| #define _MSC_CACHEMISSES_RESETVALUE 0x00000000UL |
Default value for MSC_CACHEMISSES
Definition at line
401
of file
ezr32wg_msc.h
.
| #define _MSC_CMD_INVCACHE_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_CMD
Definition at line
379
of file
ezr32wg_msc.h
.
| #define _MSC_CMD_INVCACHE_MASK 0x1UL |
Bit mask for MSC_INVCACHE
Definition at line
378
of file
ezr32wg_msc.h
.
| #define _MSC_CMD_INVCACHE_SHIFT 0 |
Shift value for MSC_INVCACHE
Definition at line
377
of file
ezr32wg_msc.h
.
| #define _MSC_CMD_MASK 0x00000007UL |
Mask for MSC_CMD
Definition at line
375
of file
ezr32wg_msc.h
.
| #define _MSC_CMD_RESETVALUE 0x00000000UL |
Default value for MSC_CMD
Definition at line
374
of file
ezr32wg_msc.h
.
| #define _MSC_CMD_STARTPC_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_CMD
Definition at line
384
of file
ezr32wg_msc.h
.
| #define _MSC_CMD_STARTPC_MASK 0x2UL |
Bit mask for MSC_STARTPC
Definition at line
383
of file
ezr32wg_msc.h
.
| #define _MSC_CMD_STARTPC_SHIFT 1 |
Shift value for MSC_STARTPC
Definition at line
382
of file
ezr32wg_msc.h
.
| #define _MSC_CMD_STOPPC_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_CMD
Definition at line
389
of file
ezr32wg_msc.h
.
| #define _MSC_CMD_STOPPC_MASK 0x4UL |
Bit mask for MSC_STOPPC
Definition at line
388
of file
ezr32wg_msc.h
.
| #define _MSC_CMD_STOPPC_SHIFT 2 |
Shift value for MSC_STOPPC
Definition at line
387
of file
ezr32wg_msc.h
.
| #define _MSC_CTRL_BUSFAULT_DEFAULT 0x00000001UL |
Mode DEFAULT for MSC_CTRL
Definition at line
85
of file
ezr32wg_msc.h
.
| #define _MSC_CTRL_BUSFAULT_GENERATE 0x00000000UL |
Mode GENERATE for MSC_CTRL
Definition at line
84
of file
ezr32wg_msc.h
.
| #define _MSC_CTRL_BUSFAULT_IGNORE 0x00000001UL |
Mode IGNORE for MSC_CTRL
Definition at line
86
of file
ezr32wg_msc.h
.
| #define _MSC_CTRL_BUSFAULT_MASK 0x1UL |
Bit mask for MSC_BUSFAULT
Definition at line
83
of file
ezr32wg_msc.h
.
| #define _MSC_CTRL_BUSFAULT_SHIFT 0 |
Shift value for MSC_BUSFAULT
Definition at line
82
of file
ezr32wg_msc.h
.
| #define _MSC_CTRL_MASK 0x00000001UL |
Mask for MSC_CTRL
Definition at line
80
of file
ezr32wg_msc.h
.
| #define _MSC_CTRL_RESETVALUE 0x00000001UL |
Default value for MSC_CTRL
Definition at line
79
of file
ezr32wg_msc.h
.
| #define _MSC_IEN_CHOF_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_IEN
Definition at line
349
of file
ezr32wg_msc.h
.
| #define _MSC_IEN_CHOF_MASK 0x4UL |
Bit mask for MSC_CHOF
Definition at line
348
of file
ezr32wg_msc.h
.
| #define _MSC_IEN_CHOF_SHIFT 2 |
Shift value for MSC_CHOF
Definition at line
347
of file
ezr32wg_msc.h
.
| #define _MSC_IEN_CMOF_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_IEN
Definition at line
354
of file
ezr32wg_msc.h
.
| #define _MSC_IEN_CMOF_MASK 0x8UL |
Bit mask for MSC_CMOF
Definition at line
353
of file
ezr32wg_msc.h
.
| #define _MSC_IEN_CMOF_SHIFT 3 |
Shift value for MSC_CMOF
Definition at line
352
of file
ezr32wg_msc.h
.
| #define _MSC_IEN_ERASE_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_IEN
Definition at line
339
of file
ezr32wg_msc.h
.
| #define _MSC_IEN_ERASE_MASK 0x1UL |
Bit mask for MSC_ERASE
Definition at line
338
of file
ezr32wg_msc.h
.
| #define _MSC_IEN_ERASE_SHIFT 0 |
Shift value for MSC_ERASE
Definition at line
337
of file
ezr32wg_msc.h
.
| #define _MSC_IEN_MASK 0x0000000FUL |
Mask for MSC_IEN
Definition at line
335
of file
ezr32wg_msc.h
.
| #define _MSC_IEN_RESETVALUE 0x00000000UL |
Default value for MSC_IEN
Definition at line
334
of file
ezr32wg_msc.h
.
| #define _MSC_IEN_WRITE_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_IEN
Definition at line
344
of file
ezr32wg_msc.h
.
| #define _MSC_IEN_WRITE_MASK 0x2UL |
Bit mask for MSC_WRITE
Definition at line
343
of file
ezr32wg_msc.h
.
| #define _MSC_IEN_WRITE_SHIFT 1 |
Shift value for MSC_WRITE
Definition at line
342
of file
ezr32wg_msc.h
.
| #define _MSC_IF_CHOF_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_IF
Definition at line
277
of file
ezr32wg_msc.h
.
| #define _MSC_IF_CHOF_MASK 0x4UL |
Bit mask for MSC_CHOF
Definition at line
276
of file
ezr32wg_msc.h
.
| #define _MSC_IF_CHOF_SHIFT 2 |
Shift value for MSC_CHOF
Definition at line
275
of file
ezr32wg_msc.h
.
| #define _MSC_IF_CMOF_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_IF
Definition at line
282
of file
ezr32wg_msc.h
.
| #define _MSC_IF_CMOF_MASK 0x8UL |
Bit mask for MSC_CMOF
Definition at line
281
of file
ezr32wg_msc.h
.
| #define _MSC_IF_CMOF_SHIFT 3 |
Shift value for MSC_CMOF
Definition at line
280
of file
ezr32wg_msc.h
.
| #define _MSC_IF_ERASE_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_IF
Definition at line
267
of file
ezr32wg_msc.h
.
| #define _MSC_IF_ERASE_MASK 0x1UL |
Bit mask for MSC_ERASE
Definition at line
266
of file
ezr32wg_msc.h
.
| #define _MSC_IF_ERASE_SHIFT 0 |
Shift value for MSC_ERASE
Definition at line
265
of file
ezr32wg_msc.h
.
| #define _MSC_IF_MASK 0x0000000FUL |
Mask for MSC_IF
Definition at line
263
of file
ezr32wg_msc.h
.
| #define _MSC_IF_RESETVALUE 0x00000000UL |
Default value for MSC_IF
Definition at line
262
of file
ezr32wg_msc.h
.
| #define _MSC_IF_WRITE_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_IF
Definition at line
272
of file
ezr32wg_msc.h
.
| #define _MSC_IF_WRITE_MASK 0x2UL |
Bit mask for MSC_WRITE
Definition at line
271
of file
ezr32wg_msc.h
.
| #define _MSC_IF_WRITE_SHIFT 1 |
Shift value for MSC_WRITE
Definition at line
270
of file
ezr32wg_msc.h
.
| #define _MSC_IFC_CHOF_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_IFC
Definition at line
325
of file
ezr32wg_msc.h
.
| #define _MSC_IFC_CHOF_MASK 0x4UL |
Bit mask for MSC_CHOF
Definition at line
324
of file
ezr32wg_msc.h
.
| #define _MSC_IFC_CHOF_SHIFT 2 |
Shift value for MSC_CHOF
Definition at line
323
of file
ezr32wg_msc.h
.
| #define _MSC_IFC_CMOF_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_IFC
Definition at line
330
of file
ezr32wg_msc.h
.
| #define _MSC_IFC_CMOF_MASK 0x8UL |
Bit mask for MSC_CMOF
Definition at line
329
of file
ezr32wg_msc.h
.
| #define _MSC_IFC_CMOF_SHIFT 3 |
Shift value for MSC_CMOF
Definition at line
328
of file
ezr32wg_msc.h
.
| #define _MSC_IFC_ERASE_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_IFC
Definition at line
315
of file
ezr32wg_msc.h
.
| #define _MSC_IFC_ERASE_MASK 0x1UL |
Bit mask for MSC_ERASE
Definition at line
314
of file
ezr32wg_msc.h
.
| #define _MSC_IFC_ERASE_SHIFT 0 |
Shift value for MSC_ERASE
Definition at line
313
of file
ezr32wg_msc.h
.
| #define _MSC_IFC_MASK 0x0000000FUL |
Mask for MSC_IFC
Definition at line
311
of file
ezr32wg_msc.h
.
| #define _MSC_IFC_RESETVALUE 0x00000000UL |
Default value for MSC_IFC
Definition at line
310
of file
ezr32wg_msc.h
.
| #define _MSC_IFC_WRITE_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_IFC
Definition at line
320
of file
ezr32wg_msc.h
.
| #define _MSC_IFC_WRITE_MASK 0x2UL |
Bit mask for MSC_WRITE
Definition at line
319
of file
ezr32wg_msc.h
.
| #define _MSC_IFC_WRITE_SHIFT 1 |
Shift value for MSC_WRITE
Definition at line
318
of file
ezr32wg_msc.h
.
| #define _MSC_IFS_CHOF_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_IFS
Definition at line
301
of file
ezr32wg_msc.h
.
| #define _MSC_IFS_CHOF_MASK 0x4UL |
Bit mask for MSC_CHOF
Definition at line
300
of file
ezr32wg_msc.h
.
| #define _MSC_IFS_CHOF_SHIFT 2 |
Shift value for MSC_CHOF
Definition at line
299
of file
ezr32wg_msc.h
.
| #define _MSC_IFS_CMOF_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_IFS
Definition at line
306
of file
ezr32wg_msc.h
.
| #define _MSC_IFS_CMOF_MASK 0x8UL |
Bit mask for MSC_CMOF
Definition at line
305
of file
ezr32wg_msc.h
.
| #define _MSC_IFS_CMOF_SHIFT 3 |
Shift value for MSC_CMOF
Definition at line
304
of file
ezr32wg_msc.h
.
| #define _MSC_IFS_ERASE_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_IFS
Definition at line
291
of file
ezr32wg_msc.h
.
| #define _MSC_IFS_ERASE_MASK 0x1UL |
Bit mask for MSC_ERASE
Definition at line
290
of file
ezr32wg_msc.h
.
| #define _MSC_IFS_ERASE_SHIFT 0 |
Shift value for MSC_ERASE
Definition at line
289
of file
ezr32wg_msc.h
.
| #define _MSC_IFS_MASK 0x0000000FUL |
Mask for MSC_IFS
Definition at line
287
of file
ezr32wg_msc.h
.
| #define _MSC_IFS_RESETVALUE 0x00000000UL |
Default value for MSC_IFS
Definition at line
286
of file
ezr32wg_msc.h
.
| #define _MSC_IFS_WRITE_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_IFS
Definition at line
296
of file
ezr32wg_msc.h
.
| #define _MSC_IFS_WRITE_MASK 0x2UL |
Bit mask for MSC_WRITE
Definition at line
295
of file
ezr32wg_msc.h
.
| #define _MSC_IFS_WRITE_SHIFT 1 |
Shift value for MSC_WRITE
Definition at line
294
of file
ezr32wg_msc.h
.
| #define _MSC_LOCK_LOCKKEY_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_LOCK
Definition at line
362
of file
ezr32wg_msc.h
.
| #define _MSC_LOCK_LOCKKEY_LOCK 0x00000000UL |
Mode LOCK for MSC_LOCK
Definition at line
363
of file
ezr32wg_msc.h
.
| #define _MSC_LOCK_LOCKKEY_LOCKED 0x00000001UL |
Mode LOCKED for MSC_LOCK
Definition at line
365
of file
ezr32wg_msc.h
.
| #define _MSC_LOCK_LOCKKEY_MASK 0xFFFFUL |
Bit mask for MSC_LOCKKEY
Definition at line
361
of file
ezr32wg_msc.h
.
| #define _MSC_LOCK_LOCKKEY_SHIFT 0 |
Shift value for MSC_LOCKKEY
Definition at line
360
of file
ezr32wg_msc.h
.
| #define _MSC_LOCK_LOCKKEY_UNLOCK 0x00001B71UL |
Mode UNLOCK for MSC_LOCK
Definition at line
366
of file
ezr32wg_msc.h
.
| #define _MSC_LOCK_LOCKKEY_UNLOCKED 0x00000000UL |
Mode UNLOCKED for MSC_LOCK
Definition at line
364
of file
ezr32wg_msc.h
.
| #define _MSC_LOCK_MASK 0x0000FFFFUL |
Mask for MSC_LOCK
Definition at line
359
of file
ezr32wg_msc.h
.
| #define _MSC_LOCK_RESETVALUE 0x00000000UL |
Default value for MSC_LOCK
Definition at line
358
of file
ezr32wg_msc.h
.
| #define _MSC_MASSLOCK_LOCKKEY_DEFAULT 0x00000001UL |
Mode DEFAULT for MSC_MASSLOCK
Definition at line
432
of file
ezr32wg_msc.h
.
| #define _MSC_MASSLOCK_LOCKKEY_LOCK 0x00000000UL |
Mode LOCK for MSC_MASSLOCK
Definition at line
430
of file
ezr32wg_msc.h
.
| #define _MSC_MASSLOCK_LOCKKEY_LOCKED 0x00000001UL |
Mode LOCKED for MSC_MASSLOCK
Definition at line
433
of file
ezr32wg_msc.h
.
| #define _MSC_MASSLOCK_LOCKKEY_MASK 0xFFFFUL |
Bit mask for MSC_LOCKKEY
Definition at line
429
of file
ezr32wg_msc.h
.
| #define _MSC_MASSLOCK_LOCKKEY_SHIFT 0 |
Shift value for MSC_LOCKKEY
Definition at line
428
of file
ezr32wg_msc.h
.
| #define _MSC_MASSLOCK_LOCKKEY_UNLOCK 0x0000631AUL |
Mode UNLOCK for MSC_MASSLOCK
Definition at line
434
of file
ezr32wg_msc.h
.
| #define _MSC_MASSLOCK_LOCKKEY_UNLOCKED 0x00000000UL |
Mode UNLOCKED for MSC_MASSLOCK
Definition at line
431
of file
ezr32wg_msc.h
.
| #define _MSC_MASSLOCK_MASK 0x0000FFFFUL |
Mask for MSC_MASSLOCK
Definition at line
427
of file
ezr32wg_msc.h
.
| #define _MSC_MASSLOCK_RESETVALUE 0x00000001UL |
Default value for MSC_MASSLOCK
Definition at line
426
of file
ezr32wg_msc.h
.
| #define _MSC_READCTRL_AIDIS_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_READCTRL
Definition at line
118
of file
ezr32wg_msc.h
.
| #define _MSC_READCTRL_AIDIS_MASK 0x10UL |
Bit mask for MSC_AIDIS
Definition at line
117
of file
ezr32wg_msc.h
.
| #define _MSC_READCTRL_AIDIS_SHIFT 4 |
Shift value for MSC_AIDIS
Definition at line
116
of file
ezr32wg_msc.h
.
Referenced by MSC_EnableAutoCacheFlush() .
| #define _MSC_READCTRL_BUSSTRATEGY_CPU 0x00000000UL |
Mode CPU for MSC_READCTRL
Definition at line
138
of file
ezr32wg_msc.h
.
| #define _MSC_READCTRL_BUSSTRATEGY_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_READCTRL
Definition at line
137
of file
ezr32wg_msc.h
.
| #define _MSC_READCTRL_BUSSTRATEGY_DMA 0x00000001UL |
Mode DMA for MSC_READCTRL
Definition at line
139
of file
ezr32wg_msc.h
.
| #define _MSC_READCTRL_BUSSTRATEGY_DMAEM1 0x00000002UL |
Mode DMAEM1 for MSC_READCTRL
Definition at line
140
of file
ezr32wg_msc.h
.
| #define _MSC_READCTRL_BUSSTRATEGY_MASK 0x30000UL |
Bit mask for MSC_BUSSTRATEGY
Definition at line
136
of file
ezr32wg_msc.h
.
Referenced by MSC_BusStrategy() .
| #define _MSC_READCTRL_BUSSTRATEGY_NONE 0x00000003UL |
Mode NONE for MSC_READCTRL
Definition at line
141
of file
ezr32wg_msc.h
.
| #define _MSC_READCTRL_BUSSTRATEGY_SHIFT 16 |
Shift value for MSC_BUSSTRATEGY
Definition at line
135
of file
ezr32wg_msc.h
.
| #define _MSC_READCTRL_EBICDIS_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_READCTRL
Definition at line
128
of file
ezr32wg_msc.h
.
| #define _MSC_READCTRL_EBICDIS_MASK 0x40UL |
Bit mask for MSC_EBICDIS
Definition at line
127
of file
ezr32wg_msc.h
.
| #define _MSC_READCTRL_EBICDIS_SHIFT 6 |
Shift value for MSC_EBICDIS
Definition at line
126
of file
ezr32wg_msc.h
.
| #define _MSC_READCTRL_ICCDIS_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_READCTRL
Definition at line
123
of file
ezr32wg_msc.h
.
| #define _MSC_READCTRL_ICCDIS_MASK 0x20UL |
Bit mask for MSC_ICCDIS
Definition at line
122
of file
ezr32wg_msc.h
.
| #define _MSC_READCTRL_ICCDIS_SHIFT 5 |
Shift value for MSC_ICCDIS
Definition at line
121
of file
ezr32wg_msc.h
.
Referenced by MSC_EnableCacheIRQs() .
| #define _MSC_READCTRL_IFCDIS_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_READCTRL
Definition at line
113
of file
ezr32wg_msc.h
.
| #define _MSC_READCTRL_IFCDIS_MASK 0x8UL |
Bit mask for MSC_IFCDIS
Definition at line
112
of file
ezr32wg_msc.h
.
| #define _MSC_READCTRL_IFCDIS_SHIFT 3 |
Shift value for MSC_IFCDIS
Definition at line
111
of file
ezr32wg_msc.h
.
Referenced by MSC_EnableCache() .
| #define _MSC_READCTRL_MASK 0x000300FFUL |
Mask for MSC_READCTRL
Definition at line
93
of file
ezr32wg_msc.h
.
| #define _MSC_READCTRL_MODE_DEFAULT 0x00000001UL |
Mode DEFAULT for MSC_READCTRL
Definition at line
97
of file
ezr32wg_msc.h
.
| #define _MSC_READCTRL_MODE_MASK 0x7UL |
Bit mask for MSC_MODE
Definition at line
95
of file
ezr32wg_msc.h
.
Referenced by MSC_ExecConfigSet() .
| #define _MSC_READCTRL_MODE_SHIFT 0 |
Shift value for MSC_MODE
Definition at line
94
of file
ezr32wg_msc.h
.
| #define _MSC_READCTRL_MODE_WS0 0x00000000UL |
Mode WS0 for MSC_READCTRL
Definition at line
96
of file
ezr32wg_msc.h
.
| #define _MSC_READCTRL_MODE_WS0SCBTP 0x00000002UL |
Mode WS0SCBTP for MSC_READCTRL
Definition at line
99
of file
ezr32wg_msc.h
.
| #define _MSC_READCTRL_MODE_WS1 0x00000001UL |
Mode WS1 for MSC_READCTRL
Definition at line
98
of file
ezr32wg_msc.h
.
| #define _MSC_READCTRL_MODE_WS1SCBTP 0x00000003UL |
Mode WS1SCBTP for MSC_READCTRL
Definition at line
100
of file
ezr32wg_msc.h
.
| #define _MSC_READCTRL_MODE_WS2 0x00000004UL |
Mode WS2 for MSC_READCTRL
Definition at line
101
of file
ezr32wg_msc.h
.
| #define _MSC_READCTRL_MODE_WS2SCBTP 0x00000005UL |
Mode WS2SCBTP for MSC_READCTRL
Definition at line
102
of file
ezr32wg_msc.h
.
| #define _MSC_READCTRL_RAMCEN_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_READCTRL
Definition at line
133
of file
ezr32wg_msc.h
.
| #define _MSC_READCTRL_RAMCEN_MASK 0x80UL |
Bit mask for MSC_RAMCEN
Definition at line
132
of file
ezr32wg_msc.h
.
| #define _MSC_READCTRL_RAMCEN_SHIFT 7 |
Shift value for MSC_RAMCEN
Definition at line
131
of file
ezr32wg_msc.h
.
| #define _MSC_READCTRL_RESETVALUE 0x00000001UL |
Default value for MSC_READCTRL
Definition at line
92
of file
ezr32wg_msc.h
.
| #define _MSC_STATUS_BUSY_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_STATUS
Definition at line
228
of file
ezr32wg_msc.h
.
| #define _MSC_STATUS_BUSY_MASK 0x1UL |
Bit mask for MSC_BUSY
Definition at line
227
of file
ezr32wg_msc.h
.
| #define _MSC_STATUS_BUSY_SHIFT 0 |
Shift value for MSC_BUSY
Definition at line
226
of file
ezr32wg_msc.h
.
| #define _MSC_STATUS_ERASEABORTED_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_STATUS
Definition at line
253
of file
ezr32wg_msc.h
.
| #define _MSC_STATUS_ERASEABORTED_MASK 0x20UL |
Bit mask for MSC_ERASEABORTED
Definition at line
252
of file
ezr32wg_msc.h
.
| #define _MSC_STATUS_ERASEABORTED_SHIFT 5 |
Shift value for MSC_ERASEABORTED
Definition at line
251
of file
ezr32wg_msc.h
.
| #define _MSC_STATUS_INVADDR_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_STATUS
Definition at line
238
of file
ezr32wg_msc.h
.
| #define _MSC_STATUS_INVADDR_MASK 0x4UL |
Bit mask for MSC_INVADDR
Definition at line
237
of file
ezr32wg_msc.h
.
| #define _MSC_STATUS_INVADDR_SHIFT 2 |
Shift value for MSC_INVADDR
Definition at line
236
of file
ezr32wg_msc.h
.
| #define _MSC_STATUS_LOCKED_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_STATUS
Definition at line
233
of file
ezr32wg_msc.h
.
| #define _MSC_STATUS_LOCKED_MASK 0x2UL |
Bit mask for MSC_LOCKED
Definition at line
232
of file
ezr32wg_msc.h
.
| #define _MSC_STATUS_LOCKED_SHIFT 1 |
Shift value for MSC_LOCKED
Definition at line
231
of file
ezr32wg_msc.h
.
| #define _MSC_STATUS_MASK 0x0000007FUL |
Mask for MSC_STATUS
Definition at line
224
of file
ezr32wg_msc.h
.
| #define _MSC_STATUS_PCRUNNING_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_STATUS
Definition at line
258
of file
ezr32wg_msc.h
.
| #define _MSC_STATUS_PCRUNNING_MASK 0x40UL |
Bit mask for MSC_PCRUNNING
Definition at line
257
of file
ezr32wg_msc.h
.
| #define _MSC_STATUS_PCRUNNING_SHIFT 6 |
Shift value for MSC_PCRUNNING
Definition at line
256
of file
ezr32wg_msc.h
.
| #define _MSC_STATUS_RESETVALUE 0x00000008UL |
Default value for MSC_STATUS
Definition at line
223
of file
ezr32wg_msc.h
.
| #define _MSC_STATUS_WDATAREADY_DEFAULT 0x00000001UL |
Mode DEFAULT for MSC_STATUS
Definition at line
243
of file
ezr32wg_msc.h
.
| #define _MSC_STATUS_WDATAREADY_MASK 0x8UL |
Bit mask for MSC_WDATAREADY
Definition at line
242
of file
ezr32wg_msc.h
.
| #define _MSC_STATUS_WDATAREADY_SHIFT 3 |
Shift value for MSC_WDATAREADY
Definition at line
241
of file
ezr32wg_msc.h
.
| #define _MSC_STATUS_WORDTIMEOUT_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_STATUS
Definition at line
248
of file
ezr32wg_msc.h
.
| #define _MSC_STATUS_WORDTIMEOUT_MASK 0x10UL |
Bit mask for MSC_WORDTIMEOUT
Definition at line
247
of file
ezr32wg_msc.h
.
| #define _MSC_STATUS_WORDTIMEOUT_SHIFT 4 |
Shift value for MSC_WORDTIMEOUT
Definition at line
246
of file
ezr32wg_msc.h
.
| #define _MSC_TIMEBASE_BASE_DEFAULT 0x00000010UL |
Mode DEFAULT for MSC_TIMEBASE
Definition at line
413
of file
ezr32wg_msc.h
.
| #define _MSC_TIMEBASE_BASE_MASK 0x3FUL |
| #define _MSC_TIMEBASE_BASE_SHIFT 0 |
| #define _MSC_TIMEBASE_MASK 0x0001003FUL |
Mask for MSC_TIMEBASE
Definition at line
410
of file
ezr32wg_msc.h
.
| #define _MSC_TIMEBASE_PERIOD_1US 0x00000000UL |
Mode 1US for MSC_TIMEBASE
Definition at line
419
of file
ezr32wg_msc.h
.
| #define _MSC_TIMEBASE_PERIOD_5US 0x00000001UL |
Mode 5US for MSC_TIMEBASE
Definition at line
420
of file
ezr32wg_msc.h
.
| #define _MSC_TIMEBASE_PERIOD_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_TIMEBASE
Definition at line
418
of file
ezr32wg_msc.h
.
| #define _MSC_TIMEBASE_PERIOD_MASK 0x10000UL |
| #define _MSC_TIMEBASE_PERIOD_SHIFT 16 |
Shift value for MSC_PERIOD
Definition at line
416
of file
ezr32wg_msc.h
.
| #define _MSC_TIMEBASE_RESETVALUE 0x00000010UL |
Default value for MSC_TIMEBASE
Definition at line
409
of file
ezr32wg_msc.h
.
| #define _MSC_WDATA_MASK 0xFFFFFFFFUL |
Mask for MSC_WDATA
Definition at line
216
of file
ezr32wg_msc.h
.
| #define _MSC_WDATA_RESETVALUE 0x00000000UL |
Default value for MSC_WDATA
Definition at line
215
of file
ezr32wg_msc.h
.
| #define _MSC_WDATA_WDATA_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_WDATA
Definition at line
219
of file
ezr32wg_msc.h
.
| #define _MSC_WDATA_WDATA_MASK 0xFFFFFFFFUL |
Bit mask for MSC_WDATA
Definition at line
218
of file
ezr32wg_msc.h
.
| #define _MSC_WDATA_WDATA_SHIFT 0 |
Shift value for MSC_WDATA
Definition at line
217
of file
ezr32wg_msc.h
.
| #define _MSC_WRITECMD_CLEARWDATA_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_WRITECMD
Definition at line
203
of file
ezr32wg_msc.h
.
| #define _MSC_WRITECMD_CLEARWDATA_MASK 0x1000UL |
Bit mask for MSC_CLEARWDATA
Definition at line
202
of file
ezr32wg_msc.h
.
| #define _MSC_WRITECMD_CLEARWDATA_SHIFT 12 |
Shift value for MSC_CLEARWDATA
Definition at line
201
of file
ezr32wg_msc.h
.
| #define _MSC_WRITECMD_ERASEABORT_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_WRITECMD
Definition at line
193
of file
ezr32wg_msc.h
.
| #define _MSC_WRITECMD_ERASEABORT_MASK 0x20UL |
Bit mask for MSC_ERASEABORT
Definition at line
192
of file
ezr32wg_msc.h
.
| #define _MSC_WRITECMD_ERASEABORT_SHIFT 5 |
Shift value for MSC_ERASEABORT
Definition at line
191
of file
ezr32wg_msc.h
.
| #define _MSC_WRITECMD_ERASEMAIN0_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_WRITECMD
Definition at line
198
of file
ezr32wg_msc.h
.
| #define _MSC_WRITECMD_ERASEMAIN0_MASK 0x100UL |
Bit mask for MSC_ERASEMAIN0
Definition at line
197
of file
ezr32wg_msc.h
.
| #define _MSC_WRITECMD_ERASEMAIN0_SHIFT 8 |
Shift value for MSC_ERASEMAIN0
Definition at line
196
of file
ezr32wg_msc.h
.
| #define _MSC_WRITECMD_ERASEPAGE_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_WRITECMD
Definition at line
173
of file
ezr32wg_msc.h
.
| #define _MSC_WRITECMD_ERASEPAGE_MASK 0x2UL |
Bit mask for MSC_ERASEPAGE
Definition at line
172
of file
ezr32wg_msc.h
.
| #define _MSC_WRITECMD_ERASEPAGE_SHIFT 1 |
Shift value for MSC_ERASEPAGE
Definition at line
171
of file
ezr32wg_msc.h
.
| #define _MSC_WRITECMD_LADDRIM_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_WRITECMD
Definition at line
168
of file
ezr32wg_msc.h
.
| #define _MSC_WRITECMD_LADDRIM_MASK 0x1UL |
Bit mask for MSC_LADDRIM
Definition at line
167
of file
ezr32wg_msc.h
.
| #define _MSC_WRITECMD_LADDRIM_SHIFT 0 |
Shift value for MSC_LADDRIM
Definition at line
166
of file
ezr32wg_msc.h
.
| #define _MSC_WRITECMD_MASK 0x0000113FUL |
Mask for MSC_WRITECMD
Definition at line
164
of file
ezr32wg_msc.h
.
| #define _MSC_WRITECMD_RESETVALUE 0x00000000UL |
Default value for MSC_WRITECMD
Definition at line
163
of file
ezr32wg_msc.h
.
| #define _MSC_WRITECMD_WRITEEND_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_WRITECMD
Definition at line
178
of file
ezr32wg_msc.h
.
| #define _MSC_WRITECMD_WRITEEND_MASK 0x4UL |
Bit mask for MSC_WRITEEND
Definition at line
177
of file
ezr32wg_msc.h
.
| #define _MSC_WRITECMD_WRITEEND_SHIFT 2 |
Shift value for MSC_WRITEEND
Definition at line
176
of file
ezr32wg_msc.h
.
| #define _MSC_WRITECMD_WRITEONCE_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_WRITECMD
Definition at line
183
of file
ezr32wg_msc.h
.
| #define _MSC_WRITECMD_WRITEONCE_MASK 0x8UL |
Bit mask for MSC_WRITEONCE
Definition at line
182
of file
ezr32wg_msc.h
.
| #define _MSC_WRITECMD_WRITEONCE_SHIFT 3 |
Shift value for MSC_WRITEONCE
Definition at line
181
of file
ezr32wg_msc.h
.
| #define _MSC_WRITECMD_WRITETRIG_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_WRITECMD
Definition at line
188
of file
ezr32wg_msc.h
.
| #define _MSC_WRITECMD_WRITETRIG_MASK 0x10UL |
Bit mask for MSC_WRITETRIG
Definition at line
187
of file
ezr32wg_msc.h
.
| #define _MSC_WRITECMD_WRITETRIG_SHIFT 4 |
Shift value for MSC_WRITETRIG
Definition at line
186
of file
ezr32wg_msc.h
.
| #define _MSC_WRITECTRL_IRQERASEABORT_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_WRITECTRL
Definition at line
159
of file
ezr32wg_msc.h
.
| #define _MSC_WRITECTRL_IRQERASEABORT_MASK 0x2UL |
Bit mask for MSC_IRQERASEABORT
Definition at line
158
of file
ezr32wg_msc.h
.
| #define _MSC_WRITECTRL_IRQERASEABORT_SHIFT 1 |
Shift value for MSC_IRQERASEABORT
Definition at line
157
of file
ezr32wg_msc.h
.
| #define _MSC_WRITECTRL_MASK 0x00000003UL |
Mask for MSC_WRITECTRL
Definition at line
150
of file
ezr32wg_msc.h
.
| #define _MSC_WRITECTRL_RESETVALUE 0x00000000UL |
Default value for MSC_WRITECTRL
Definition at line
149
of file
ezr32wg_msc.h
.
| #define _MSC_WRITECTRL_WREN_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_WRITECTRL
Definition at line
154
of file
ezr32wg_msc.h
.
| #define _MSC_WRITECTRL_WREN_MASK 0x1UL |
Bit mask for MSC_WREN
Definition at line
153
of file
ezr32wg_msc.h
.
| #define _MSC_WRITECTRL_WREN_SHIFT 0 |
Shift value for MSC_WREN
Definition at line
152
of file
ezr32wg_msc.h
.
| #define MSC_ADDRB_ADDRB_DEFAULT ( _MSC_ADDRB_ADDRB_DEFAULT << 0) |
Shifted mode DEFAULT for MSC_ADDRB
Definition at line
212
of file
ezr32wg_msc.h
.
| #define MSC_CACHEHITS_CACHEHITS_DEFAULT ( _MSC_CACHEHITS_CACHEHITS_DEFAULT << 0) |
Shifted mode DEFAULT for MSC_CACHEHITS
Definition at line
398
of file
ezr32wg_msc.h
.
| #define MSC_CACHEMISSES_CACHEMISSES_DEFAULT ( _MSC_CACHEMISSES_CACHEMISSES_DEFAULT << 0) |
Shifted mode DEFAULT for MSC_CACHEMISSES
Definition at line
406
of file
ezr32wg_msc.h
.
| #define MSC_CMD_INVCACHE (0x1UL << 0) |
Invalidate Instruction Cache
Definition at line
376
of file
ezr32wg_msc.h
.
Referenced by MSC_FlushCache() .
| #define MSC_CMD_INVCACHE_DEFAULT ( _MSC_CMD_INVCACHE_DEFAULT << 0) |
Shifted mode DEFAULT for MSC_CMD
Definition at line
380
of file
ezr32wg_msc.h
.
| #define MSC_CMD_STARTPC (0x1UL << 1) |
Start Performance Counters
Definition at line
381
of file
ezr32wg_msc.h
.
Referenced by MSC_StartCacheMeasurement() .
| #define MSC_CMD_STARTPC_DEFAULT ( _MSC_CMD_STARTPC_DEFAULT << 1) |
Shifted mode DEFAULT for MSC_CMD
Definition at line
385
of file
ezr32wg_msc.h
.
| #define MSC_CMD_STOPPC (0x1UL << 2) |
Stop Performance Counters
Definition at line
386
of file
ezr32wg_msc.h
.
Referenced by MSC_GetCacheMeasurement() .
| #define MSC_CMD_STOPPC_DEFAULT ( _MSC_CMD_STOPPC_DEFAULT << 2) |
Shifted mode DEFAULT for MSC_CMD
Definition at line
390
of file
ezr32wg_msc.h
.
| #define MSC_CTRL_BUSFAULT (0x1UL << 0) |
Bus Fault Response Enable
Definition at line
81
of file
ezr32wg_msc.h
.
| #define MSC_CTRL_BUSFAULT_DEFAULT ( _MSC_CTRL_BUSFAULT_DEFAULT << 0) |
Shifted mode DEFAULT for MSC_CTRL
Definition at line
88
of file
ezr32wg_msc.h
.
| #define MSC_CTRL_BUSFAULT_GENERATE ( _MSC_CTRL_BUSFAULT_GENERATE << 0) |
Shifted mode GENERATE for MSC_CTRL
Definition at line
87
of file
ezr32wg_msc.h
.
| #define MSC_CTRL_BUSFAULT_IGNORE ( _MSC_CTRL_BUSFAULT_IGNORE << 0) |
Shifted mode IGNORE for MSC_CTRL
Definition at line
89
of file
ezr32wg_msc.h
.
| #define MSC_IEN_CHOF (0x1UL << 2) |
Cache Hits Overflow Interrupt Enable
Definition at line
346
of file
ezr32wg_msc.h
.
| #define MSC_IEN_CHOF_DEFAULT ( _MSC_IEN_CHOF_DEFAULT << 2) |
Shifted mode DEFAULT for MSC_IEN
Definition at line
350
of file
ezr32wg_msc.h
.
| #define MSC_IEN_CMOF (0x1UL << 3) |
Cache Misses Overflow Interrupt Enable
Definition at line
351
of file
ezr32wg_msc.h
.
| #define MSC_IEN_CMOF_DEFAULT ( _MSC_IEN_CMOF_DEFAULT << 3) |
Shifted mode DEFAULT for MSC_IEN
Definition at line
355
of file
ezr32wg_msc.h
.
| #define MSC_IEN_ERASE (0x1UL << 0) |
Erase Done Interrupt Enable
Definition at line
336
of file
ezr32wg_msc.h
.
| #define MSC_IEN_ERASE_DEFAULT ( _MSC_IEN_ERASE_DEFAULT << 0) |
Shifted mode DEFAULT for MSC_IEN
Definition at line
340
of file
ezr32wg_msc.h
.
| #define MSC_IEN_WRITE (0x1UL << 1) |
Write Done Interrupt Enable
Definition at line
341
of file
ezr32wg_msc.h
.
| #define MSC_IEN_WRITE_DEFAULT ( _MSC_IEN_WRITE_DEFAULT << 1) |
Shifted mode DEFAULT for MSC_IEN
Definition at line
345
of file
ezr32wg_msc.h
.
| #define MSC_IF_CHOF (0x1UL << 2) |
Cache Hits Overflow Interrupt Flag
Definition at line
274
of file
ezr32wg_msc.h
.
Referenced by MSC_GetCacheMeasurement() , and MSC_StartCacheMeasurement() .
| #define MSC_IF_CHOF_DEFAULT ( _MSC_IF_CHOF_DEFAULT << 2) |
Shifted mode DEFAULT for MSC_IF
Definition at line
278
of file
ezr32wg_msc.h
.
| #define MSC_IF_CMOF (0x1UL << 3) |
Cache Misses Overflow Interrupt Flag
Definition at line
279
of file
ezr32wg_msc.h
.
Referenced by MSC_GetCacheMeasurement() , and MSC_StartCacheMeasurement() .
| #define MSC_IF_CMOF_DEFAULT ( _MSC_IF_CMOF_DEFAULT << 3) |
Shifted mode DEFAULT for MSC_IF
Definition at line
283
of file
ezr32wg_msc.h
.
| #define MSC_IF_ERASE (0x1UL << 0) |
Erase Done Interrupt Read Flag
Definition at line
264
of file
ezr32wg_msc.h
.
| #define MSC_IF_ERASE_DEFAULT ( _MSC_IF_ERASE_DEFAULT << 0) |
Shifted mode DEFAULT for MSC_IF
Definition at line
268
of file
ezr32wg_msc.h
.
| #define MSC_IF_WRITE (0x1UL << 1) |
Write Done Interrupt Read Flag
Definition at line
269
of file
ezr32wg_msc.h
.
| #define MSC_IF_WRITE_DEFAULT ( _MSC_IF_WRITE_DEFAULT << 1) |
Shifted mode DEFAULT for MSC_IF
Definition at line
273
of file
ezr32wg_msc.h
.
| #define MSC_IFC_CHOF (0x1UL << 2) |
Cache Hits Overflow Interrupt Clear
Definition at line
322
of file
ezr32wg_msc.h
.
| #define MSC_IFC_CHOF_DEFAULT ( _MSC_IFC_CHOF_DEFAULT << 2) |
Shifted mode DEFAULT for MSC_IFC
Definition at line
326
of file
ezr32wg_msc.h
.
| #define MSC_IFC_CMOF (0x1UL << 3) |
Cache Misses Overflow Interrupt Clear
Definition at line
327
of file
ezr32wg_msc.h
.
| #define MSC_IFC_CMOF_DEFAULT ( _MSC_IFC_CMOF_DEFAULT << 3) |
Shifted mode DEFAULT for MSC_IFC
Definition at line
331
of file
ezr32wg_msc.h
.
| #define MSC_IFC_ERASE (0x1UL << 0) |
Erase Done Interrupt Clear
Definition at line
312
of file
ezr32wg_msc.h
.
| #define MSC_IFC_ERASE_DEFAULT ( _MSC_IFC_ERASE_DEFAULT << 0) |
Shifted mode DEFAULT for MSC_IFC
Definition at line
316
of file
ezr32wg_msc.h
.
| #define MSC_IFC_WRITE (0x1UL << 1) |
Write Done Interrupt Clear
Definition at line
317
of file
ezr32wg_msc.h
.
| #define MSC_IFC_WRITE_DEFAULT ( _MSC_IFC_WRITE_DEFAULT << 1) |
Shifted mode DEFAULT for MSC_IFC
Definition at line
321
of file
ezr32wg_msc.h
.
| #define MSC_IFS_CHOF (0x1UL << 2) |
Cache Hits Overflow Interrupt Set
Definition at line
298
of file
ezr32wg_msc.h
.
| #define MSC_IFS_CHOF_DEFAULT ( _MSC_IFS_CHOF_DEFAULT << 2) |
Shifted mode DEFAULT for MSC_IFS
Definition at line
302
of file
ezr32wg_msc.h
.
| #define MSC_IFS_CMOF (0x1UL << 3) |
Cache Misses Overflow Interrupt Set
Definition at line
303
of file
ezr32wg_msc.h
.
| #define MSC_IFS_CMOF_DEFAULT ( _MSC_IFS_CMOF_DEFAULT << 3) |
Shifted mode DEFAULT for MSC_IFS
Definition at line
307
of file
ezr32wg_msc.h
.
| #define MSC_IFS_ERASE (0x1UL << 0) |
Erase Done Interrupt Set
Definition at line
288
of file
ezr32wg_msc.h
.
| #define MSC_IFS_ERASE_DEFAULT ( _MSC_IFS_ERASE_DEFAULT << 0) |
Shifted mode DEFAULT for MSC_IFS
Definition at line
292
of file
ezr32wg_msc.h
.
| #define MSC_IFS_WRITE (0x1UL << 1) |
Write Done Interrupt Set
Definition at line
293
of file
ezr32wg_msc.h
.
| #define MSC_IFS_WRITE_DEFAULT ( _MSC_IFS_WRITE_DEFAULT << 1) |
Shifted mode DEFAULT for MSC_IFS
Definition at line
297
of file
ezr32wg_msc.h
.
| #define MSC_LOCK_LOCKKEY_DEFAULT ( _MSC_LOCK_LOCKKEY_DEFAULT << 0) |
Shifted mode DEFAULT for MSC_LOCK
Definition at line
367
of file
ezr32wg_msc.h
.
| #define MSC_LOCK_LOCKKEY_LOCK ( _MSC_LOCK_LOCKKEY_LOCK << 0) |
Shifted mode LOCK for MSC_LOCK
Definition at line
368
of file
ezr32wg_msc.h
.
| #define MSC_LOCK_LOCKKEY_LOCKED ( _MSC_LOCK_LOCKKEY_LOCKED << 0) |
Shifted mode LOCKED for MSC_LOCK
Definition at line
370
of file
ezr32wg_msc.h
.
| #define MSC_LOCK_LOCKKEY_UNLOCK ( _MSC_LOCK_LOCKKEY_UNLOCK << 0) |
Shifted mode UNLOCK for MSC_LOCK
Definition at line
371
of file
ezr32wg_msc.h
.
| #define MSC_LOCK_LOCKKEY_UNLOCKED ( _MSC_LOCK_LOCKKEY_UNLOCKED << 0) |
Shifted mode UNLOCKED for MSC_LOCK
Definition at line
369
of file
ezr32wg_msc.h
.
| #define MSC_MASSLOCK_LOCKKEY_DEFAULT ( _MSC_MASSLOCK_LOCKKEY_DEFAULT << 0) |
Shifted mode DEFAULT for MSC_MASSLOCK
Definition at line
437
of file
ezr32wg_msc.h
.
| #define MSC_MASSLOCK_LOCKKEY_LOCK ( _MSC_MASSLOCK_LOCKKEY_LOCK << 0) |
Shifted mode LOCK for MSC_MASSLOCK
Definition at line
435
of file
ezr32wg_msc.h
.
Referenced by MSC_MassErase() .
| #define MSC_MASSLOCK_LOCKKEY_LOCKED ( _MSC_MASSLOCK_LOCKKEY_LOCKED << 0) |
Shifted mode LOCKED for MSC_MASSLOCK
Definition at line
438
of file
ezr32wg_msc.h
.
| #define MSC_MASSLOCK_LOCKKEY_UNLOCK ( _MSC_MASSLOCK_LOCKKEY_UNLOCK << 0) |
Shifted mode UNLOCK for MSC_MASSLOCK
Definition at line
439
of file
ezr32wg_msc.h
.
Referenced by MSC_MassErase() .
| #define MSC_MASSLOCK_LOCKKEY_UNLOCKED ( _MSC_MASSLOCK_LOCKKEY_UNLOCKED << 0) |
Shifted mode UNLOCKED for MSC_MASSLOCK
Definition at line
436
of file
ezr32wg_msc.h
.
| #define MSC_READCTRL_AIDIS (0x1UL << 4) |
Automatic Invalidate Disable
Definition at line
115
of file
ezr32wg_msc.h
.
Referenced by MSC_ExecConfigSet() .
| #define MSC_READCTRL_AIDIS_DEFAULT ( _MSC_READCTRL_AIDIS_DEFAULT << 4) |
Shifted mode DEFAULT for MSC_READCTRL
Definition at line
119
of file
ezr32wg_msc.h
.
| #define MSC_READCTRL_BUSSTRATEGY_CPU ( _MSC_READCTRL_BUSSTRATEGY_CPU << 16) |
Shifted mode CPU for MSC_READCTRL
Definition at line
143
of file
ezr32wg_msc.h
.
| #define MSC_READCTRL_BUSSTRATEGY_DEFAULT ( _MSC_READCTRL_BUSSTRATEGY_DEFAULT << 16) |
Shifted mode DEFAULT for MSC_READCTRL
Definition at line
142
of file
ezr32wg_msc.h
.
| #define MSC_READCTRL_BUSSTRATEGY_DMA ( _MSC_READCTRL_BUSSTRATEGY_DMA << 16) |
Shifted mode DMA for MSC_READCTRL
Definition at line
144
of file
ezr32wg_msc.h
.
| #define MSC_READCTRL_BUSSTRATEGY_DMAEM1 ( _MSC_READCTRL_BUSSTRATEGY_DMAEM1 << 16) |
Shifted mode DMAEM1 for MSC_READCTRL
Definition at line
145
of file
ezr32wg_msc.h
.
| #define MSC_READCTRL_BUSSTRATEGY_NONE ( _MSC_READCTRL_BUSSTRATEGY_NONE << 16) |
Shifted mode NONE for MSC_READCTRL
Definition at line
146
of file
ezr32wg_msc.h
.
| #define MSC_READCTRL_EBICDIS (0x1UL << 6) |
External Bus Interface Cache Disable
Definition at line
125
of file
ezr32wg_msc.h
.
| #define MSC_READCTRL_EBICDIS_DEFAULT ( _MSC_READCTRL_EBICDIS_DEFAULT << 6) |
Shifted mode DEFAULT for MSC_READCTRL
Definition at line
129
of file
ezr32wg_msc.h
.
| #define MSC_READCTRL_ICCDIS (0x1UL << 5) |
Interrupt Context Cache Disable
Definition at line
120
of file
ezr32wg_msc.h
.
Referenced by MSC_ExecConfigSet() .
| #define MSC_READCTRL_ICCDIS_DEFAULT ( _MSC_READCTRL_ICCDIS_DEFAULT << 5) |
Shifted mode DEFAULT for MSC_READCTRL
Definition at line
124
of file
ezr32wg_msc.h
.
| #define MSC_READCTRL_IFCDIS (0x1UL << 3) |
Internal Flash Cache Disable
Definition at line
110
of file
ezr32wg_msc.h
.
Referenced by MSC_ExecConfigSet() .
| #define MSC_READCTRL_IFCDIS_DEFAULT ( _MSC_READCTRL_IFCDIS_DEFAULT << 3) |
Shifted mode DEFAULT for MSC_READCTRL
Definition at line
114
of file
ezr32wg_msc.h
.
| #define MSC_READCTRL_MODE_DEFAULT ( _MSC_READCTRL_MODE_DEFAULT << 0) |
Shifted mode DEFAULT for MSC_READCTRL
Definition at line
104
of file
ezr32wg_msc.h
.
| #define MSC_READCTRL_MODE_WS0 ( _MSC_READCTRL_MODE_WS0 << 0) |
Shifted mode WS0 for MSC_READCTRL
Definition at line
103
of file
ezr32wg_msc.h
.
Referenced by MSC_ExecConfigSet() .
| #define MSC_READCTRL_MODE_WS0SCBTP ( _MSC_READCTRL_MODE_WS0SCBTP << 0) |
Shifted mode WS0SCBTP for MSC_READCTRL
Definition at line
106
of file
ezr32wg_msc.h
.
Referenced by MSC_ExecConfigSet() .
| #define MSC_READCTRL_MODE_WS1 ( _MSC_READCTRL_MODE_WS1 << 0) |
Shifted mode WS1 for MSC_READCTRL
Definition at line
105
of file
ezr32wg_msc.h
.
Referenced by MSC_ExecConfigSet() .
| #define MSC_READCTRL_MODE_WS1SCBTP ( _MSC_READCTRL_MODE_WS1SCBTP << 0) |
Shifted mode WS1SCBTP for MSC_READCTRL
Definition at line
107
of file
ezr32wg_msc.h
.
Referenced by MSC_ExecConfigSet() .
| #define MSC_READCTRL_MODE_WS2 ( _MSC_READCTRL_MODE_WS2 << 0) |
Shifted mode WS2 for MSC_READCTRL
Definition at line
108
of file
ezr32wg_msc.h
.
| #define MSC_READCTRL_MODE_WS2SCBTP ( _MSC_READCTRL_MODE_WS2SCBTP << 0) |
Shifted mode WS2SCBTP for MSC_READCTRL
Definition at line
109
of file
ezr32wg_msc.h
.
| #define MSC_READCTRL_RAMCEN (0x1UL << 7) |
RAM Cache Enable
Definition at line
130
of file
ezr32wg_msc.h
.
| #define MSC_READCTRL_RAMCEN_DEFAULT ( _MSC_READCTRL_RAMCEN_DEFAULT << 7) |
Shifted mode DEFAULT for MSC_READCTRL
Definition at line
134
of file
ezr32wg_msc.h
.
| #define MSC_STATUS_BUSY (0x1UL << 0) |
Erase/Write Busy
Definition at line
225
of file
ezr32wg_msc.h
.
Referenced by MSC_ErasePage() , and MSC_MassErase() .
| #define MSC_STATUS_BUSY_DEFAULT ( _MSC_STATUS_BUSY_DEFAULT << 0) |
Shifted mode DEFAULT for MSC_STATUS
Definition at line
229
of file
ezr32wg_msc.h
.
| #define MSC_STATUS_ERASEABORTED (0x1UL << 5) |
The Current Flash Erase Operation Aborted
Definition at line
250
of file
ezr32wg_msc.h
.
| #define MSC_STATUS_ERASEABORTED_DEFAULT ( _MSC_STATUS_ERASEABORTED_DEFAULT << 5) |
Shifted mode DEFAULT for MSC_STATUS
Definition at line
254
of file
ezr32wg_msc.h
.
| #define MSC_STATUS_INVADDR (0x1UL << 2) |
Invalid Write Address or Erase Page
Definition at line
235
of file
ezr32wg_msc.h
.
Referenced by MSC_ErasePage() .
| #define MSC_STATUS_INVADDR_DEFAULT ( _MSC_STATUS_INVADDR_DEFAULT << 2) |
Shifted mode DEFAULT for MSC_STATUS
Definition at line
239
of file
ezr32wg_msc.h
.
| #define MSC_STATUS_LOCKED (0x1UL << 1) |
| #define MSC_STATUS_LOCKED_DEFAULT ( _MSC_STATUS_LOCKED_DEFAULT << 1) |
Shifted mode DEFAULT for MSC_STATUS
Definition at line
234
of file
ezr32wg_msc.h
.
| #define MSC_STATUS_PCRUNNING (0x1UL << 6) |
Performance Counters Running
Definition at line
255
of file
ezr32wg_msc.h
.
| #define MSC_STATUS_PCRUNNING_DEFAULT ( _MSC_STATUS_PCRUNNING_DEFAULT << 6) |
Shifted mode DEFAULT for MSC_STATUS
Definition at line
259
of file
ezr32wg_msc.h
.
| #define MSC_STATUS_WDATAREADY (0x1UL << 3) |
WDATA Write Ready
Definition at line
240
of file
ezr32wg_msc.h
.
| #define MSC_STATUS_WDATAREADY_DEFAULT ( _MSC_STATUS_WDATAREADY_DEFAULT << 3) |
Shifted mode DEFAULT for MSC_STATUS
Definition at line
244
of file
ezr32wg_msc.h
.
| #define MSC_STATUS_WORDTIMEOUT (0x1UL << 4) |
Flash Write Word Timeout
Definition at line
245
of file
ezr32wg_msc.h
.
| #define MSC_STATUS_WORDTIMEOUT_DEFAULT ( _MSC_STATUS_WORDTIMEOUT_DEFAULT << 4) |
Shifted mode DEFAULT for MSC_STATUS
Definition at line
249
of file
ezr32wg_msc.h
.
| #define MSC_TIMEBASE_BASE_DEFAULT ( _MSC_TIMEBASE_BASE_DEFAULT << 0) |
Shifted mode DEFAULT for MSC_TIMEBASE
Definition at line
414
of file
ezr32wg_msc.h
.
| #define MSC_TIMEBASE_PERIOD (0x1UL << 16) |
Sets the timebase period
Definition at line
415
of file
ezr32wg_msc.h
.
| #define MSC_TIMEBASE_PERIOD_1US ( _MSC_TIMEBASE_PERIOD_1US << 16) |
Shifted mode 1US for MSC_TIMEBASE
Definition at line
422
of file
ezr32wg_msc.h
.
Referenced by MSC_Init() .
| #define MSC_TIMEBASE_PERIOD_5US ( _MSC_TIMEBASE_PERIOD_5US << 16) |
Shifted mode 5US for MSC_TIMEBASE
Definition at line
423
of file
ezr32wg_msc.h
.
Referenced by MSC_Init() .
| #define MSC_TIMEBASE_PERIOD_DEFAULT ( _MSC_TIMEBASE_PERIOD_DEFAULT << 16) |
Shifted mode DEFAULT for MSC_TIMEBASE
Definition at line
421
of file
ezr32wg_msc.h
.
| #define MSC_WDATA_WDATA_DEFAULT ( _MSC_WDATA_WDATA_DEFAULT << 0) |
Shifted mode DEFAULT for MSC_WDATA
Definition at line
220
of file
ezr32wg_msc.h
.
| #define MSC_WRITECMD_CLEARWDATA (0x1UL << 12) |
Clear WDATA state
Definition at line
200
of file
ezr32wg_msc.h
.
| #define MSC_WRITECMD_CLEARWDATA_DEFAULT ( _MSC_WRITECMD_CLEARWDATA_DEFAULT << 12) |
Shifted mode DEFAULT for MSC_WRITECMD
Definition at line
204
of file
ezr32wg_msc.h
.
| #define MSC_WRITECMD_ERASEABORT (0x1UL << 5) |
Abort erase sequence
Definition at line
190
of file
ezr32wg_msc.h
.
| #define MSC_WRITECMD_ERASEABORT_DEFAULT ( _MSC_WRITECMD_ERASEABORT_DEFAULT << 5) |
Shifted mode DEFAULT for MSC_WRITECMD
Definition at line
194
of file
ezr32wg_msc.h
.
| #define MSC_WRITECMD_ERASEMAIN0 (0x1UL << 8) |
| #define MSC_WRITECMD_ERASEMAIN0_DEFAULT ( _MSC_WRITECMD_ERASEMAIN0_DEFAULT << 8) |
Shifted mode DEFAULT for MSC_WRITECMD
Definition at line
199
of file
ezr32wg_msc.h
.
| #define MSC_WRITECMD_ERASEPAGE (0x1UL << 1) |
| #define MSC_WRITECMD_ERASEPAGE_DEFAULT ( _MSC_WRITECMD_ERASEPAGE_DEFAULT << 1) |
Shifted mode DEFAULT for MSC_WRITECMD
Definition at line
174
of file
ezr32wg_msc.h
.
| #define MSC_WRITECMD_LADDRIM (0x1UL << 0) |
Load MSC_ADDRB into ADDR
Definition at line
165
of file
ezr32wg_msc.h
.
Referenced by MSC_ErasePage() .
| #define MSC_WRITECMD_LADDRIM_DEFAULT ( _MSC_WRITECMD_LADDRIM_DEFAULT << 0) |
Shifted mode DEFAULT for MSC_WRITECMD
Definition at line
169
of file
ezr32wg_msc.h
.
| #define MSC_WRITECMD_WRITEEND (0x1UL << 2) |
End Write Mode
Definition at line
175
of file
ezr32wg_msc.h
.
| #define MSC_WRITECMD_WRITEEND_DEFAULT ( _MSC_WRITECMD_WRITEEND_DEFAULT << 2) |
Shifted mode DEFAULT for MSC_WRITECMD
Definition at line
179
of file
ezr32wg_msc.h
.
| #define MSC_WRITECMD_WRITEONCE (0x1UL << 3) |
Word Write-Once Trigger
Definition at line
180
of file
ezr32wg_msc.h
.
| #define MSC_WRITECMD_WRITEONCE_DEFAULT ( _MSC_WRITECMD_WRITEONCE_DEFAULT << 3) |
Shifted mode DEFAULT for MSC_WRITECMD
Definition at line
184
of file
ezr32wg_msc.h
.
| #define MSC_WRITECMD_WRITETRIG (0x1UL << 4) |
Word Write Sequence Trigger
Definition at line
185
of file
ezr32wg_msc.h
.
| #define MSC_WRITECMD_WRITETRIG_DEFAULT ( _MSC_WRITECMD_WRITETRIG_DEFAULT << 4) |
Shifted mode DEFAULT for MSC_WRITECMD
Definition at line
189
of file
ezr32wg_msc.h
.
| #define MSC_WRITECTRL_IRQERASEABORT (0x1UL << 1) |
Abort Page Erase on Interrupt
Definition at line
156
of file
ezr32wg_msc.h
.
| #define MSC_WRITECTRL_IRQERASEABORT_DEFAULT ( _MSC_WRITECTRL_IRQERASEABORT_DEFAULT << 1) |
Shifted mode DEFAULT for MSC_WRITECTRL
Definition at line
160
of file
ezr32wg_msc.h
.
| #define MSC_WRITECTRL_WREN (0x1UL << 0) |
Enable Write/Erase Controller
Definition at line
151
of file
ezr32wg_msc.h
.
Referenced by MSC_Deinit() , MSC_ErasePage() , MSC_Init() , and MSC_MassErase() .
| #define MSC_WRITECTRL_WREN_DEFAULT ( _MSC_WRITECTRL_WREN_DEFAULT << 0) |
Shifted mode DEFAULT for MSC_WRITECTRL
Definition at line
155
of file
ezr32wg_msc.h
.