PartDevices > EFM32GG11B820F2048GL192
Macros |
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#define | __CM4_REV 0x0001U |
#define | _EFM32_GIANT_FAMILY 1 |
#define | _EFM_DEVICE |
#define | _SILICON_LABS_32B_PLATFORM 2 |
#define | _SILICON_LABS_32B_PLATFORM_2 |
#define | _SILICON_LABS_32B_PLATFORM_2_GEN 1 |
#define | _SILICON_LABS_32B_PLATFORM_2_GEN_1 |
#define | _SILICON_LABS_32B_SERIES 1 |
#define | _SILICON_LABS_32B_SERIES_1 |
#define | _SILICON_LABS_32B_SERIES_1_CONFIG 1 |
#define | _SILICON_LABS_32B_SERIES_1_CONFIG_1 |
#define | _SILICON_LABS_GECKO_INTERNAL_SDID 100 |
#define | _SILICON_LABS_GECKO_INTERNAL_SDID_100 |
#define | ACMP_COUNT 4 |
#define | ACMP_PRESENT |
#define | ADC_COUNT 2 |
#define | ADC_PRESENT |
#define | AFACHAN_MAX 184U |
#define | AFCHAN_MAX 355U |
#define | AFCHANLOC_MAX 8U |
#define | BITBAND_PER_BASE ((uint32_t) 0x42000000UL) |
#define | BITBAND_RAM_BASE ((uint32_t) 0x22000000UL) |
#define | BOOTLOADER_COUNT 1 |
#define | BOOTLOADER_PRESENT |
#define | BU_COUNT 1 |
#define | BU_PRESENT |
#define | CAN_COUNT 2 |
#define | CAN_PRESENT |
#define | CMU_COUNT 1 |
#define | CMU_PRESENT |
#define | CRYOTIMER_COUNT 1 |
#define | CRYOTIMER_PRESENT |
#define | CRYPTO0_BITCLR_MEM_BASE ((uint32_t) 0x440F0000UL) |
#define | CRYPTO0_BITCLR_MEM_BITS ((uint32_t) 0x0000000AUL) |
#define | CRYPTO0_BITCLR_MEM_END ((uint32_t) 0x440F03FFUL) |
#define | CRYPTO0_BITCLR_MEM_SIZE ((uint32_t) 0x400UL) |
#define | CRYPTO0_BITSET_MEM_BASE ((uint32_t) 0x460F0000UL) |
#define | CRYPTO0_BITSET_MEM_BITS ((uint32_t) 0x0000000AUL) |
#define | CRYPTO0_BITSET_MEM_END ((uint32_t) 0x460F03FFUL) |
#define | CRYPTO0_BITSET_MEM_SIZE ((uint32_t) 0x400UL) |
#define | CRYPTO0_MEM_BASE ((uint32_t) 0x400F0000UL) |
#define | CRYPTO0_MEM_BITS ((uint32_t) 0x0000000AUL) |
#define | CRYPTO0_MEM_END ((uint32_t) 0x400F03FFUL) |
#define | CRYPTO0_MEM_SIZE ((uint32_t) 0x400UL) |
#define | CRYPTO_COUNT 1 |
#define | CRYPTO_PRESENT |
#define | CSEN_COUNT 1 |
#define | CSEN_PRESENT |
#define | DCDC_COUNT 1 |
#define | DCDC_PRESENT |
#define | DMA_CHAN_COUNT 24 |
#define | EBI_CODE_MEM_BASE ((uint32_t) 0x12000000UL) |
#define | EBI_CODE_MEM_BITS ((uint32_t) 0x0000001CUL) |
#define | EBI_CODE_MEM_END ((uint32_t) 0x1FFFFFFFUL) |
#define | EBI_CODE_MEM_SIZE ((uint32_t) 0xE000000UL) |
#define | EBI_COUNT 1 |
#define | EBI_MEM_BASE ((uint32_t) 0x80000000UL) |
#define | EBI_MEM_BITS ((uint32_t) 0x0000001EUL) |
#define | EBI_MEM_END ((uint32_t) 0xBFFFFFFFUL) |
#define | EBI_MEM_SIZE ((uint32_t) 0x40000000UL) |
#define | EBI_PRESENT |
#define | EMU_COUNT 1 |
#define | EMU_PRESENT |
#define | ETH_COUNT 1 |
#define | ETH_PRESENT |
#define | ETM_COUNT 1 |
#define | ETM_PRESENT |
#define | EXT_IRQ_COUNT 70 |
#define | FLASH_BASE (0x00000000UL) |
#define | FLASH_INFO_MEM_BASE ((uint32_t) 0x0F000000UL) |
#define | FLASH_INFO_MEM_BITS ((uint32_t) 0x00000018UL) |
#define | FLASH_INFO_MEM_END ((uint32_t) 0x0FFFFFFFUL) |
#define | FLASH_INFO_MEM_SIZE ((uint32_t) 0x1000000UL) |
#define | FLASH_MEM_BASE ((uint32_t) 0x00000000UL) |
#define | FLASH_MEM_BITS ((uint32_t) 0x0000001AUL) |
#define | FLASH_MEM_END ((uint32_t) 0x03FFFFFFUL) |
#define | FLASH_MEM_SIZE ((uint32_t) 0x4000000UL) |
#define | FLASH_PAGE_SIZE 4096U |
#define | FLASH_SIZE (0x00200000UL) |
#define | FPUEH_COUNT 1 |
#define | FPUEH_PRESENT |
#define | GPCRC_COUNT 1 |
#define | GPCRC_PRESENT |
#define | GPIO_COUNT 1 |
#define | GPIO_PRESENT |
#define | I2C_COUNT 3 |
#define | I2C_PRESENT |
#define | IDAC_COUNT 1 |
#define | IDAC_PRESENT |
#define | LCD_COUNT 1 |
#define | LCD_PRESENT |
#define | LDMA_COUNT 1 |
#define | LDMA_PRESENT |
#define | LESENSE_COUNT 1 |
#define | LESENSE_PRESENT |
#define | LETIMER_COUNT 2 |
#define | LETIMER_PRESENT |
#define | LEUART_COUNT 2 |
#define | LEUART_PRESENT |
#define | MSC_COUNT 1 |
#define | MSC_PRESENT |
#define | PART_NUMBER "EFM32GG11B820F2048GL192" |
#define | PCNT_COUNT 3 |
#define | PCNT_PRESENT |
#define | PER1_BITCLR_MEM_BASE ((uint32_t) 0x44050000UL) |
#define | PER1_BITCLR_MEM_BITS ((uint32_t) 0x00000014UL) |
#define | PER1_BITCLR_MEM_END ((uint32_t) 0x440EFFFFUL) |
#define | PER1_BITCLR_MEM_SIZE ((uint32_t) 0xA0000UL) |
#define | PER1_BITSET_MEM_BASE ((uint32_t) 0x46050000UL) |
#define | PER1_BITSET_MEM_BITS ((uint32_t) 0x00000014UL) |
#define | PER1_BITSET_MEM_END ((uint32_t) 0x460EFFFFUL) |
#define | PER1_BITSET_MEM_SIZE ((uint32_t) 0xA0000UL) |
#define | PER1_MEM_BASE ((uint32_t) 0x40050000UL) |
#define | PER1_MEM_BITS ((uint32_t) 0x00000014UL) |
#define | PER1_MEM_END ((uint32_t) 0x400EFFFFUL) |
#define | PER1_MEM_SIZE ((uint32_t) 0xA0000UL) |
#define | PER_BITCLR_MEM_BASE ((uint32_t) 0x44000000UL) |
#define | PER_BITCLR_MEM_BITS ((uint32_t) 0x00000013UL) |
#define | PER_BITCLR_MEM_END ((uint32_t) 0x4404FFFFUL) |
#define | PER_BITCLR_MEM_SIZE ((uint32_t) 0x50000UL) |
#define | PER_BITSET_MEM_BASE ((uint32_t) 0x46000000UL) |
#define | PER_BITSET_MEM_BITS ((uint32_t) 0x00000013UL) |
#define | PER_BITSET_MEM_END ((uint32_t) 0x4604FFFFUL) |
#define | PER_BITSET_MEM_SIZE ((uint32_t) 0x50000UL) |
#define | PER_MEM_BASE ((uint32_t) 0x40000000UL) |
#define | PER_MEM_BITS ((uint32_t) 0x00000013UL) |
#define | PER_MEM_END ((uint32_t) 0x4004FFFFUL) |
#define | PER_MEM_SIZE ((uint32_t) 0x50000UL) |
#define | PRS_CHAN_COUNT 24 |
#define | PRS_COUNT 1 |
#define | PRS_PRESENT |
#define | QSPI0_CODE_MEM_BASE ((uint32_t) 0x04000000UL) |
#define | QSPI0_CODE_MEM_BITS ((uint32_t) 0x0000001BUL) |
#define | QSPI0_CODE_MEM_END ((uint32_t) 0x0BFFFFFFUL) |
#define | QSPI0_CODE_MEM_SIZE ((uint32_t) 0x8000000UL) |
#define | QSPI0_MEM_BASE ((uint32_t) 0xC0000000UL) |
#define | QSPI0_MEM_BITS ((uint32_t) 0x0000001CUL) |
#define | QSPI0_MEM_END ((uint32_t) 0xCFFFFFFFUL) |
#define | QSPI0_MEM_SIZE ((uint32_t) 0x10000000UL) |
#define | QSPI_COUNT 1 |
#define | QSPI_PRESENT |
#define | RAM0_CODE_MEM_BASE ((uint32_t) 0x10000000UL) |
#define | RAM0_CODE_MEM_BITS ((uint32_t) 0x00000011UL) |
#define | RAM0_CODE_MEM_END ((uint32_t) 0x1001FFFFUL) |
#define | RAM0_CODE_MEM_SIZE ((uint32_t) 0x20000UL) |
#define | RAM0_MEM_BASE ((uint32_t) 0x20000000UL) |
#define | RAM0_MEM_BITS ((uint32_t) 0x00000011UL) |
#define | RAM0_MEM_END ((uint32_t) 0x2001FFFFUL) |
#define | RAM0_MEM_SIZE ((uint32_t) 0x20000UL) |
#define | RAM1_CODE_MEM_BASE ((uint32_t) 0x10020000UL) |
#define | RAM1_CODE_MEM_BITS ((uint32_t) 0x00000011UL) |
#define | RAM1_CODE_MEM_END ((uint32_t) 0x1003FFFFUL) |
#define | RAM1_CODE_MEM_SIZE ((uint32_t) 0x20000UL) |
#define | RAM1_MEM_BASE ((uint32_t) 0x20020000UL) |
#define | RAM1_MEM_BITS ((uint32_t) 0x00000011UL) |
#define | RAM1_MEM_END ((uint32_t) 0x2003FFFFUL) |
#define | RAM1_MEM_SIZE ((uint32_t) 0x20000UL) |
#define | RAM2_CODE_MEM_BASE ((uint32_t) 0x10040000UL) |
#define | RAM2_CODE_MEM_BITS ((uint32_t) 0x00000012UL) |
#define | RAM2_CODE_MEM_END ((uint32_t) 0x1007FFFFUL) |
#define | RAM2_CODE_MEM_SIZE ((uint32_t) 0x40000UL) |
#define | RAM2_MEM_BASE ((uint32_t) 0x20040000UL) |
#define | RAM2_MEM_BITS ((uint32_t) 0x00000012UL) |
#define | RAM2_MEM_END ((uint32_t) 0x2007FFFFUL) |
#define | RAM2_MEM_SIZE ((uint32_t) 0x40000UL) |
#define | RAM_MEM_BASE ((uint32_t) 0x20000000UL) |
#define | RAM_MEM_BITS ((uint32_t) 0x00000013UL) |
#define | RAM_MEM_END ((uint32_t) 0x2007FFFFUL) |
#define | RAM_MEM_SIZE ((uint32_t) 0x80000UL) |
#define | RMU_COUNT 1 |
#define | RMU_PRESENT |
#define | RTC_COUNT 1 |
#define | RTC_PRESENT |
#define | RTCC_COUNT 1 |
#define | RTCC_PRESENT |
#define | SDIO_COUNT 1 |
#define | SDIO_MEM_BASE ((uint32_t) 0x400F1000UL) |
#define | SDIO_MEM_BITS ((uint32_t) 0x0000000CUL) |
#define | SDIO_MEM_END ((uint32_t) 0x400F1FFFUL) |
#define | SDIO_MEM_SIZE ((uint32_t) 0x1000UL) |
#define | SDIO_PRESENT |
#define | SMU_COUNT 1 |
#define | SMU_PRESENT |
#define | SRAM_BASE (0x20000000UL) |
#define | SRAM_SIZE (0x00080000UL) |
#define | TIMER_COUNT 7 |
#define | TIMER_PRESENT |
#define | TRNG_COUNT 1 |
#define | TRNG_PRESENT |
#define | UART_COUNT 2 |
#define | UART_PRESENT |
#define | USART_COUNT 6 |
#define | USART_PRESENT |
#define | USB_COUNT 1 |
#define | USB_MEM_BASE ((uint32_t) 0x40100000UL) |
#define | USB_MEM_BITS ((uint32_t) 0x00000012UL) |
#define | USB_MEM_END ((uint32_t) 0x4013FFFFUL) |
#define | USB_MEM_SIZE ((uint32_t) 0x40000UL) |
#define | USB_PRESENT |
#define | VDAC_COUNT 1 |
#define | VDAC_PRESENT |
#define | WDOG_COUNT 2 |
#define | WDOG_PRESENT |
#define | WTIMER_COUNT 4 |
#define | WTIMER_PRESENT |
Macro Definition Documentation
#define __CM4_REV 0x0001U |
Cortex-M4 Core revision r0p1
Definition at line
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efm32gg11b820f2048gl192.h
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#define _EFM32_GIANT_FAMILY 1 |
Part family GIANT Gecko MCU Family
Definition at line
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#define _EFM_DEVICE |
Silicon Labs EFM-type MCU
Definition at line
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#define _SILICON_LABS_32B_PLATFORM 2 |
-
Deprecated:
- Silicon Labs platform name
Definition at line
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#define _SILICON_LABS_32B_PLATFORM_2 |
-
Deprecated:
- Silicon Labs platform name
Definition at line
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#define _SILICON_LABS_32B_PLATFORM_2_GEN 1 |
-
Deprecated:
- Platform 2, generation 1
Definition at line
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#define _SILICON_LABS_32B_PLATFORM_2_GEN_1 |
-
Deprecated:
- Platform 2, generation 1
Definition at line
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#define _SILICON_LABS_32B_SERIES 1 |
Silicon Labs series number
Definition at line
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#define _SILICON_LABS_32B_SERIES_1 |
Silicon Labs series number
Definition at line
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#define _SILICON_LABS_32B_SERIES_1_CONFIG 1 |
Series 1, Configuration 1
Definition at line
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#define _SILICON_LABS_32B_SERIES_1_CONFIG_1 |
Series 1, Configuration 1
Definition at line
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#define _SILICON_LABS_GECKO_INTERNAL_SDID 100 |
Silicon Labs internal use only, may change any time
Definition at line
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#define _SILICON_LABS_GECKO_INTERNAL_SDID_100 |
Silicon Labs internal use only, may change any time
Definition at line
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#define ACMP_COUNT 4 |
4 ACMPs available
Definition at line
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#define ACMP_PRESENT |
ACMP is available in this part
Definition at line
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#define ADC_COUNT 2 |
2 ADCs available
Definition at line
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#define ADC_PRESENT |
ADC is available in this part
Definition at line
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#define AFACHAN_MAX 184U |
Analog AF channels
Definition at line
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#define AFCHAN_MAX 355U |
AF channels connect the different on-chip peripherals with the af-mux
Definition at line
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#define AFCHANLOC_MAX 8U |
AF channel maximum location number
Definition at line
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Referenced by DBG_SWOEnable() , and GPIO_DbgLocationSet() .
#define BITBAND_PER_BASE ((uint32_t) 0x42000000UL) |
Bit banding area Peripheral Address Space bit-band area
Definition at line
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Referenced by BUS_RegBitRead() , and BUS_RegBitWrite() .
#define BITBAND_RAM_BASE ((uint32_t) 0x22000000UL) |
SRAM Address Space bit-band area
Definition at line
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Referenced by BUS_RamBitRead() , and BUS_RamBitWrite() .
#define BOOTLOADER_COUNT 1 |
1 BOOTLOADER available
Definition at line
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#define BOOTLOADER_PRESENT |
BOOTLOADER is available in this part
Definition at line
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#define BU_COUNT 1 |
1 BU available
Definition at line
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#define BU_PRESENT |
BU is available in this part
Definition at line
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#define CAN_COUNT 2 |
2 CANs available
Definition at line
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#define CAN_PRESENT |
CAN is available in this part
Definition at line
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#define CMU_COUNT 1 |
1 CMU available
Definition at line
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#define CMU_PRESENT |
CMU is available in this part
Definition at line
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#define CRYOTIMER_COUNT 1 |
1 CRYOTIMER available
Definition at line
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#define CRYOTIMER_PRESENT |
CRYOTIMER is available in this part
Definition at line
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#define CRYPTO0_BITCLR_MEM_BASE ((uint32_t) 0x440F0000UL) |
CRYPTO0_BITCLR base address
Definition at line
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#define CRYPTO0_BITCLR_MEM_BITS ((uint32_t) 0x0000000AUL) |
CRYPTO0_BITCLR used bits
Definition at line
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#define CRYPTO0_BITCLR_MEM_END ((uint32_t) 0x440F03FFUL) |
CRYPTO0_BITCLR end address
Definition at line
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#define CRYPTO0_BITCLR_MEM_SIZE ((uint32_t) 0x400UL) |
CRYPTO0_BITCLR available address space
Definition at line
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#define CRYPTO0_BITSET_MEM_BASE ((uint32_t) 0x460F0000UL) |
CRYPTO0_BITSET base address
Definition at line
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#define CRYPTO0_BITSET_MEM_BITS ((uint32_t) 0x0000000AUL) |
CRYPTO0_BITSET used bits
Definition at line
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#define CRYPTO0_BITSET_MEM_END ((uint32_t) 0x460F03FFUL) |
CRYPTO0_BITSET end address
Definition at line
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#define CRYPTO0_BITSET_MEM_SIZE ((uint32_t) 0x400UL) |
CRYPTO0_BITSET available address space
Definition at line
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#define CRYPTO0_MEM_BASE ((uint32_t) 0x400F0000UL) |
CRYPTO0 base address
Definition at line
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#define CRYPTO0_MEM_BITS ((uint32_t) 0x0000000AUL) |
CRYPTO0 used bits
Definition at line
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#define CRYPTO0_MEM_END ((uint32_t) 0x400F03FFUL) |
CRYPTO0 end address
Definition at line
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#define CRYPTO0_MEM_SIZE ((uint32_t) 0x400UL) |
CRYPTO0 available address space
Definition at line
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#define CRYPTO_COUNT 1 |
1 CRYPTOs available
Definition at line
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#define CRYPTO_PRESENT |
CRYPTO is available in this part
Definition at line
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#define CSEN_COUNT 1 |
1 CSEN available
Definition at line
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#define CSEN_PRESENT |
CSEN is available in this part
Definition at line
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#define DCDC_COUNT 1 |
1 DCDC available
Definition at line
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#define DCDC_PRESENT |
DCDC is available in this part
Definition at line
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#define DMA_CHAN_COUNT 24 |
Number of DMA channels
Definition at line
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Referenced by NANDFLASH_Init() .
#define EBI_CODE_MEM_BASE ((uint32_t) 0x12000000UL) |
EBI_CODE base address
Definition at line
239
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#define EBI_CODE_MEM_BITS ((uint32_t) 0x0000001CUL) |
EBI_CODE used bits
Definition at line
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#define EBI_CODE_MEM_END ((uint32_t) 0x1FFFFFFFUL) |
EBI_CODE end address
Definition at line
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#define EBI_CODE_MEM_SIZE ((uint32_t) 0xE000000UL) |
EBI_CODE available address space
Definition at line
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#define EBI_COUNT 1 |
1 EBI available
Definition at line
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#define EBI_MEM_BASE ((uint32_t) 0x80000000UL) |
EBI base address
Definition at line
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Referenced by EBI_BankAddress() .
#define EBI_MEM_BITS ((uint32_t) 0x0000001EUL) |
EBI used bits
Definition at line
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#define EBI_MEM_END ((uint32_t) 0xBFFFFFFFUL) |
EBI end address
Definition at line
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#define EBI_MEM_SIZE ((uint32_t) 0x40000000UL) |
EBI available address space
Definition at line
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#define EBI_PRESENT |
EBI is available in this part
Definition at line
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#define EMU_COUNT 1 |
1 EMU available
Definition at line
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#define EMU_PRESENT |
EMU is available in this part
Definition at line
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#define ETH_COUNT 1 |
1 ETH available
Definition at line
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#define ETH_PRESENT |
ETH is available in this part
Definition at line
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#define ETM_COUNT 1 |
1 ETM available
Definition at line
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#define ETM_PRESENT |
ETM is available in this part
Definition at line
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#define EXT_IRQ_COUNT 70 |
Number of External (NVIC) interrupts
Definition at line
295
of file
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.
Referenced by CORE_GetNvicRamTableHandler() , CORE_IrqIsBlocked() , CORE_NvicIRQDisabled() , CORE_NvicMaskClearIRQ() , CORE_NvicMaskSetIRQ() , and CORE_SetNvicRamTableHandler() .
#define FLASH_BASE (0x00000000UL) |
Flash and SRAM limits for EFM32GG11B820F2048GL192 Flash Base Address
Definition at line
287
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#define FLASH_INFO_MEM_BASE ((uint32_t) 0x0F000000UL) |
FLASH_INFO base address
Definition at line
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#define FLASH_INFO_MEM_BITS ((uint32_t) 0x00000018UL) |
FLASH_INFO used bits
Definition at line
266
of file
efm32gg11b820f2048gl192.h
.
#define FLASH_INFO_MEM_END ((uint32_t) 0x0FFFFFFFUL) |
FLASH_INFO end address
Definition at line
265
of file
efm32gg11b820f2048gl192.h
.
#define FLASH_INFO_MEM_SIZE ((uint32_t) 0x1000000UL) |
FLASH_INFO available address space
Definition at line
264
of file
efm32gg11b820f2048gl192.h
.
#define FLASH_MEM_BASE ((uint32_t) 0x00000000UL) |
FLASH base address
Definition at line
207
of file
efm32gg11b820f2048gl192.h
.
#define FLASH_MEM_BITS ((uint32_t) 0x0000001AUL) |
FLASH used bits
Definition at line
210
of file
efm32gg11b820f2048gl192.h
.
#define FLASH_MEM_END ((uint32_t) 0x03FFFFFFUL) |
FLASH end address
Definition at line
209
of file
efm32gg11b820f2048gl192.h
.
#define FLASH_MEM_SIZE ((uint32_t) 0x4000000UL) |
FLASH available address space
Definition at line
208
of file
efm32gg11b820f2048gl192.h
.
#define FLASH_PAGE_SIZE 4096U |
Flash Memory page size (interleaving off)
Definition at line
289
of file
efm32gg11b820f2048gl192.h
.
Referenced by MSC_ErasePage() , and SYSTEM_GetFlashPageSize() .
#define FLASH_SIZE (0x00200000UL) |
Available Flash Memory
Definition at line
288
of file
efm32gg11b820f2048gl192.h
.
#define FPUEH_COUNT 1 |
1 FPUEH available
Definition at line
363
of file
efm32gg11b820f2048gl192.h
.
#define FPUEH_PRESENT |
FPUEH is available in this part
Definition at line
362
of file
efm32gg11b820f2048gl192.h
.
#define GPCRC_COUNT 1 |
1 GPCRC available
Definition at line
365
of file
efm32gg11b820f2048gl192.h
.
#define GPCRC_PRESENT |
GPCRC is available in this part
Definition at line
364
of file
efm32gg11b820f2048gl192.h
.
#define GPIO_COUNT 1 |
1 GPIO available
Definition at line
357
of file
efm32gg11b820f2048gl192.h
.
#define GPIO_PRESENT |
GPIO is available in this part
Definition at line
356
of file
efm32gg11b820f2048gl192.h
.
#define I2C_COUNT 3 |
3 I2Cs available
Definition at line
327
of file
efm32gg11b820f2048gl192.h
.
#define I2C_PRESENT |
I2C is available in this part
Definition at line
326
of file
efm32gg11b820f2048gl192.h
.
#define IDAC_COUNT 1 |
1 IDACs available
Definition at line
335
of file
efm32gg11b820f2048gl192.h
.
#define IDAC_PRESENT |
IDAC is available in this part
Definition at line
334
of file
efm32gg11b820f2048gl192.h
.
#define LCD_COUNT 1 |
1 LCD available
Definition at line
375
of file
efm32gg11b820f2048gl192.h
.
#define LCD_PRESENT |
LCD is available in this part
Definition at line
374
of file
efm32gg11b820f2048gl192.h
.
#define LDMA_COUNT 1 |
1 LDMA available
Definition at line
361
of file
efm32gg11b820f2048gl192.h
.
#define LDMA_PRESENT |
LDMA is available in this part
Definition at line
360
of file
efm32gg11b820f2048gl192.h
.
#define LESENSE_COUNT 1 |
1 LESENSE available
Definition at line
349
of file
efm32gg11b820f2048gl192.h
.
#define LESENSE_PRESENT |
LESENSE is available in this part
Definition at line
348
of file
efm32gg11b820f2048gl192.h
.
#define LETIMER_COUNT 2 |
2 LETIMERs available
Definition at line
323
of file
efm32gg11b820f2048gl192.h
.
#define LETIMER_PRESENT |
LETIMER is available in this part
Definition at line
322
of file
efm32gg11b820f2048gl192.h
.
#define LEUART_COUNT 2 |
2 LEUARTs available
Definition at line
321
of file
efm32gg11b820f2048gl192.h
.
#define LEUART_PRESENT |
LEUART is available in this part
Definition at line
320
of file
efm32gg11b820f2048gl192.h
.
#define MSC_COUNT 1 |
1 MSC available
Definition at line
341
of file
efm32gg11b820f2048gl192.h
.
#define MSC_PRESENT |
MSC is available in this part
Definition at line
340
of file
efm32gg11b820f2048gl192.h
.
#define PART_NUMBER "EFM32GG11B820F2048GL192" |
Configure part number Part Number
Definition at line
180
of file
efm32gg11b820f2048gl192.h
.
#define PCNT_COUNT 3 |
3 PCNTs available
Definition at line
325
of file
efm32gg11b820f2048gl192.h
.
Referenced by CMU_PCNTClockExternalSet() .
#define PCNT_PRESENT |
PCNT is available in this part
Definition at line
324
of file
efm32gg11b820f2048gl192.h
.
#define PER1_BITCLR_MEM_BASE ((uint32_t) 0x44050000UL) |
PER1_BITCLR base address
Definition at line
219
of file
efm32gg11b820f2048gl192.h
.
#define PER1_BITCLR_MEM_BITS ((uint32_t) 0x00000014UL) |
PER1_BITCLR used bits
Definition at line
222
of file
efm32gg11b820f2048gl192.h
.
#define PER1_BITCLR_MEM_END ((uint32_t) 0x440EFFFFUL) |
PER1_BITCLR end address
Definition at line
221
of file
efm32gg11b820f2048gl192.h
.
#define PER1_BITCLR_MEM_SIZE ((uint32_t) 0xA0000UL) |
PER1_BITCLR available address space
Definition at line
220
of file
efm32gg11b820f2048gl192.h
.
#define PER1_BITSET_MEM_BASE ((uint32_t) 0x46050000UL) |
PER1_BITSET base address
Definition at line
227
of file
efm32gg11b820f2048gl192.h
.
#define PER1_BITSET_MEM_BITS ((uint32_t) 0x00000014UL) |
PER1_BITSET used bits
Definition at line
230
of file
efm32gg11b820f2048gl192.h
.
#define PER1_BITSET_MEM_END ((uint32_t) 0x460EFFFFUL) |
PER1_BITSET end address
Definition at line
229
of file
efm32gg11b820f2048gl192.h
.
#define PER1_BITSET_MEM_SIZE ((uint32_t) 0xA0000UL) |
PER1_BITSET available address space
Definition at line
228
of file
efm32gg11b820f2048gl192.h
.
#define PER1_MEM_BASE ((uint32_t) 0x40050000UL) |
PER1 base address
Definition at line
251
of file
efm32gg11b820f2048gl192.h
.
#define PER1_MEM_BITS ((uint32_t) 0x00000014UL) |
PER1 used bits
Definition at line
254
of file
efm32gg11b820f2048gl192.h
.
#define PER1_MEM_END ((uint32_t) 0x400EFFFFUL) |
PER1 end address
Definition at line
253
of file
efm32gg11b820f2048gl192.h
.
#define PER1_MEM_SIZE ((uint32_t) 0xA0000UL) |
PER1 available address space
Definition at line
252
of file
efm32gg11b820f2048gl192.h
.
#define PER_BITCLR_MEM_BASE ((uint32_t) 0x44000000UL) |
PER_BITCLR base address
Definition at line
223
of file
efm32gg11b820f2048gl192.h
.
Referenced by BUS_RegMaskedClear() .
#define PER_BITCLR_MEM_BITS ((uint32_t) 0x00000013UL) |
PER_BITCLR used bits
Definition at line
226
of file
efm32gg11b820f2048gl192.h
.
#define PER_BITCLR_MEM_END ((uint32_t) 0x4404FFFFUL) |
PER_BITCLR end address
Definition at line
225
of file
efm32gg11b820f2048gl192.h
.
#define PER_BITCLR_MEM_SIZE ((uint32_t) 0x50000UL) |
PER_BITCLR available address space
Definition at line
224
of file
efm32gg11b820f2048gl192.h
.
#define PER_BITSET_MEM_BASE ((uint32_t) 0x46000000UL) |
PER_BITSET base address
Definition at line
247
of file
efm32gg11b820f2048gl192.h
.
Referenced by BUS_RegMaskedSet() .
#define PER_BITSET_MEM_BITS ((uint32_t) 0x00000013UL) |
PER_BITSET used bits
Definition at line
250
of file
efm32gg11b820f2048gl192.h
.
#define PER_BITSET_MEM_END ((uint32_t) 0x4604FFFFUL) |
PER_BITSET end address
Definition at line
249
of file
efm32gg11b820f2048gl192.h
.
#define PER_BITSET_MEM_SIZE ((uint32_t) 0x50000UL) |
PER_BITSET available address space
Definition at line
248
of file
efm32gg11b820f2048gl192.h
.
#define PER_MEM_BASE ((uint32_t) 0x40000000UL) |
PER base address
Definition at line
195
of file
efm32gg11b820f2048gl192.h
.
Referenced by BUS_RegBitRead() , BUS_RegBitWrite() , BUS_RegMaskedClear() , and BUS_RegMaskedSet() .
#define PER_MEM_BITS ((uint32_t) 0x00000013UL) |
PER used bits
Definition at line
198
of file
efm32gg11b820f2048gl192.h
.
#define PER_MEM_END ((uint32_t) 0x4004FFFFUL) |
PER end address
Definition at line
197
of file
efm32gg11b820f2048gl192.h
.
#define PER_MEM_SIZE ((uint32_t) 0x50000UL) |
PER available address space
Definition at line
196
of file
efm32gg11b820f2048gl192.h
.
#define PRS_CHAN_COUNT 24 |
Number of PRS channels
Definition at line
293
of file
efm32gg11b820f2048gl192.h
.
Referenced by PRS_GpioOutputLocation() , PRS_Reset() , and PRS_SourceSignalSet() .
#define PRS_COUNT 1 |
1 PRS available
Definition at line
359
of file
efm32gg11b820f2048gl192.h
.
#define PRS_PRESENT |
PRS is available in this part
Definition at line
358
of file
efm32gg11b820f2048gl192.h
.
#define QSPI0_CODE_MEM_BASE ((uint32_t) 0x04000000UL) |
QSPI0_CODE base address
Definition at line
259
of file
efm32gg11b820f2048gl192.h
.
#define QSPI0_CODE_MEM_BITS ((uint32_t) 0x0000001BUL) |
QSPI0_CODE used bits
Definition at line
262
of file
efm32gg11b820f2048gl192.h
.
#define QSPI0_CODE_MEM_END ((uint32_t) 0x0BFFFFFFUL) |
QSPI0_CODE end address
Definition at line
261
of file
efm32gg11b820f2048gl192.h
.
#define QSPI0_CODE_MEM_SIZE ((uint32_t) 0x8000000UL) |
QSPI0_CODE available address space
Definition at line
260
of file
efm32gg11b820f2048gl192.h
.
#define QSPI0_MEM_BASE ((uint32_t) 0xC0000000UL) |
QSPI0 base address
Definition at line
215
of file
efm32gg11b820f2048gl192.h
.
#define QSPI0_MEM_BITS ((uint32_t) 0x0000001CUL) |
QSPI0 used bits
Definition at line
218
of file
efm32gg11b820f2048gl192.h
.
#define QSPI0_MEM_END ((uint32_t) 0xCFFFFFFFUL) |
QSPI0 end address
Definition at line
217
of file
efm32gg11b820f2048gl192.h
.
#define QSPI0_MEM_SIZE ((uint32_t) 0x10000000UL) |
QSPI0 available address space
Definition at line
216
of file
efm32gg11b820f2048gl192.h
.
#define QSPI_COUNT 1 |
1 QSPIs available
Definition at line
319
of file
efm32gg11b820f2048gl192.h
.
#define QSPI_PRESENT |
QSPI is available in this part
Definition at line
318
of file
efm32gg11b820f2048gl192.h
.
#define RAM0_CODE_MEM_BASE ((uint32_t) 0x10000000UL) |
Memory Base addresses and limits RAM0_CODE base address
Definition at line
183
of file
efm32gg11b820f2048gl192.h
.
#define RAM0_CODE_MEM_BITS ((uint32_t) 0x00000011UL) |
RAM0_CODE used bits
Definition at line
186
of file
efm32gg11b820f2048gl192.h
.
#define RAM0_CODE_MEM_END ((uint32_t) 0x1001FFFFUL) |
RAM0_CODE end address
Definition at line
185
of file
efm32gg11b820f2048gl192.h
.
#define RAM0_CODE_MEM_SIZE ((uint32_t) 0x20000UL) |
RAM0_CODE available address space
Definition at line
184
of file
efm32gg11b820f2048gl192.h
.
#define RAM0_MEM_BASE ((uint32_t) 0x20000000UL) |
RAM0 base address
Definition at line
267
of file
efm32gg11b820f2048gl192.h
.
#define RAM0_MEM_BITS ((uint32_t) 0x00000011UL) |
RAM0 used bits
Definition at line
270
of file
efm32gg11b820f2048gl192.h
.
#define RAM0_MEM_END ((uint32_t) 0x2001FFFFUL) |
RAM0 end address
Definition at line
269
of file
efm32gg11b820f2048gl192.h
.
#define RAM0_MEM_SIZE ((uint32_t) 0x20000UL) |
RAM0 available address space
Definition at line
268
of file
efm32gg11b820f2048gl192.h
.
#define RAM1_CODE_MEM_BASE ((uint32_t) 0x10020000UL) |
RAM1_CODE base address
Definition at line
203
of file
efm32gg11b820f2048gl192.h
.
#define RAM1_CODE_MEM_BITS ((uint32_t) 0x00000011UL) |
RAM1_CODE used bits
Definition at line
206
of file
efm32gg11b820f2048gl192.h
.
#define RAM1_CODE_MEM_END ((uint32_t) 0x1003FFFFUL) |
RAM1_CODE end address
Definition at line
205
of file
efm32gg11b820f2048gl192.h
.
#define RAM1_CODE_MEM_SIZE ((uint32_t) 0x20000UL) |
RAM1_CODE available address space
Definition at line
204
of file
efm32gg11b820f2048gl192.h
.
#define RAM1_MEM_BASE ((uint32_t) 0x20020000UL) |
RAM1 base address
Definition at line
191
of file
efm32gg11b820f2048gl192.h
.
Referenced by EMU_RamPowerDown() .
#define RAM1_MEM_BITS ((uint32_t) 0x00000011UL) |
RAM1 used bits
Definition at line
194
of file
efm32gg11b820f2048gl192.h
.
#define RAM1_MEM_END ((uint32_t) 0x2003FFFFUL) |
RAM1 end address
Definition at line
193
of file
efm32gg11b820f2048gl192.h
.
Referenced by EMU_RamPowerDown() .
#define RAM1_MEM_SIZE ((uint32_t) 0x20000UL) |
RAM1 available address space
Definition at line
192
of file
efm32gg11b820f2048gl192.h
.
#define RAM2_CODE_MEM_BASE ((uint32_t) 0x10040000UL) |
RAM2_CODE base address
Definition at line
255
of file
efm32gg11b820f2048gl192.h
.
#define RAM2_CODE_MEM_BITS ((uint32_t) 0x00000012UL) |
RAM2_CODE used bits
Definition at line
258
of file
efm32gg11b820f2048gl192.h
.
#define RAM2_CODE_MEM_END ((uint32_t) 0x1007FFFFUL) |
RAM2_CODE end address
Definition at line
257
of file
efm32gg11b820f2048gl192.h
.
#define RAM2_CODE_MEM_SIZE ((uint32_t) 0x40000UL) |
RAM2_CODE available address space
Definition at line
256
of file
efm32gg11b820f2048gl192.h
.
#define RAM2_MEM_BASE ((uint32_t) 0x20040000UL) |
RAM2 base address
Definition at line
187
of file
efm32gg11b820f2048gl192.h
.
Referenced by EMU_RamPowerDown() .
#define RAM2_MEM_BITS ((uint32_t) 0x00000012UL) |
RAM2 used bits
Definition at line
190
of file
efm32gg11b820f2048gl192.h
.
#define RAM2_MEM_END ((uint32_t) 0x2007FFFFUL) |
RAM2 end address
Definition at line
189
of file
efm32gg11b820f2048gl192.h
.
Referenced by EMU_RamPowerDown() .
#define RAM2_MEM_SIZE ((uint32_t) 0x40000UL) |
RAM2 available address space
Definition at line
188
of file
efm32gg11b820f2048gl192.h
.
#define RAM_MEM_BASE ((uint32_t) 0x20000000UL) |
Single RAM space macros combining both RAM ports to match legacy, single-RAM-port chips RAM base address
Definition at line
277
of file
efm32gg11b820f2048gl192.h
.
Referenced by EMU_RamPowerDown() .
#define RAM_MEM_BITS ((uint32_t) 0x00000013UL) |
RAM used bits
Definition at line
280
of file
efm32gg11b820f2048gl192.h
.
#define RAM_MEM_END ((uint32_t) 0x2007FFFFUL) |
RAM end address
Definition at line
279
of file
efm32gg11b820f2048gl192.h
.
#define RAM_MEM_SIZE ((uint32_t) 0x80000UL) |
RAM available address space
Definition at line
278
of file
efm32gg11b820f2048gl192.h
.
#define RMU_COUNT 1 |
1 RMU available
Definition at line
345
of file
efm32gg11b820f2048gl192.h
.
#define RMU_PRESENT |
RMU is available in this part
Definition at line
344
of file
efm32gg11b820f2048gl192.h
.
#define RTC_COUNT 1 |
1 RTC available
Definition at line
377
of file
efm32gg11b820f2048gl192.h
.
#define RTC_PRESENT |
RTC is available in this part
Definition at line
376
of file
efm32gg11b820f2048gl192.h
.
#define RTCC_COUNT 1 |
1 RTCC available
Definition at line
379
of file
efm32gg11b820f2048gl192.h
.
#define RTCC_PRESENT |
RTCC is available in this part
Definition at line
378
of file
efm32gg11b820f2048gl192.h
.
#define SDIO_COUNT 1 |
1 SDIO available
Definition at line
355
of file
efm32gg11b820f2048gl192.h
.
#define SDIO_MEM_BASE ((uint32_t) 0x400F1000UL) |
SDIO base address
Definition at line
199
of file
efm32gg11b820f2048gl192.h
.
#define SDIO_MEM_BITS ((uint32_t) 0x0000000CUL) |
SDIO used bits
Definition at line
202
of file
efm32gg11b820f2048gl192.h
.
#define SDIO_MEM_END ((uint32_t) 0x400F1FFFUL) |
SDIO end address
Definition at line
201
of file
efm32gg11b820f2048gl192.h
.
#define SDIO_MEM_SIZE ((uint32_t) 0x1000UL) |
SDIO available address space
Definition at line
200
of file
efm32gg11b820f2048gl192.h
.
#define SDIO_PRESENT |
SDIO is available in this part
Definition at line
354
of file
efm32gg11b820f2048gl192.h
.
#define SMU_COUNT 1 |
1 SMU available
Definition at line
385
of file
efm32gg11b820f2048gl192.h
.
#define SMU_PRESENT |
SMU is available in this part
Definition at line
384
of file
efm32gg11b820f2048gl192.h
.
#define SRAM_BASE (0x20000000UL) |
SRAM Base Address
Definition at line
290
of file
efm32gg11b820f2048gl192.h
.
Referenced by BUS_RamBitRead() , BUS_RamBitWrite() , CORE_InitNvicVectorTable() , and EMU_RamPowerDown() .
#define SRAM_SIZE (0x00080000UL) |
Available SRAM Memory
Definition at line
291
of file
efm32gg11b820f2048gl192.h
.
Referenced by CORE_InitNvicVectorTable() , and EMU_RamPowerDown() .
#define TIMER_COUNT 7 |
7 TIMERs available
Definition at line
311
of file
efm32gg11b820f2048gl192.h
.
#define TIMER_PRESENT |
TIMER is available in this part
Definition at line
310
of file
efm32gg11b820f2048gl192.h
.
#define TRNG_COUNT 1 |
1 TRNGs available
Definition at line
339
of file
efm32gg11b820f2048gl192.h
.
#define TRNG_PRESENT |
TRNG is available in this part
Definition at line
338
of file
efm32gg11b820f2048gl192.h
.
#define UART_COUNT 2 |
2 UARTs available
Definition at line
317
of file
efm32gg11b820f2048gl192.h
.
#define UART_PRESENT |
UART is available in this part
Definition at line
316
of file
efm32gg11b820f2048gl192.h
.
#define USART_COUNT 6 |
6 USARTs available
Definition at line
315
of file
efm32gg11b820f2048gl192.h
.
#define USART_PRESENT |
USART is available in this part
Definition at line
314
of file
efm32gg11b820f2048gl192.h
.
#define USB_COUNT 1 |
1 USB available
Definition at line
369
of file
efm32gg11b820f2048gl192.h
.
#define USB_MEM_BASE ((uint32_t) 0x40100000UL) |
USB base address
Definition at line
235
of file
efm32gg11b820f2048gl192.h
.
#define USB_MEM_BITS ((uint32_t) 0x00000012UL) |
USB used bits
Definition at line
238
of file
efm32gg11b820f2048gl192.h
.
#define USB_MEM_END ((uint32_t) 0x4013FFFFUL) |
USB end address
Definition at line
237
of file
efm32gg11b820f2048gl192.h
.
#define USB_MEM_SIZE ((uint32_t) 0x40000UL) |
USB available address space
Definition at line
236
of file
efm32gg11b820f2048gl192.h
.
#define USB_PRESENT |
USB is available in this part
Definition at line
368
of file
efm32gg11b820f2048gl192.h
.
#define VDAC_COUNT 1 |
1 VDACs available
Definition at line
333
of file
efm32gg11b820f2048gl192.h
.
#define VDAC_PRESENT |
VDAC is available in this part
Definition at line
332
of file
efm32gg11b820f2048gl192.h
.
#define WDOG_COUNT 2 |
2 WDOGs available
Definition at line
337
of file
efm32gg11b820f2048gl192.h
.
#define WDOG_PRESENT |
WDOG is available in this part
Definition at line
336
of file
efm32gg11b820f2048gl192.h
.
#define WTIMER_COUNT 4 |
4 WTIMERs available
Definition at line
313
of file
efm32gg11b820f2048gl192.h
.
#define WTIMER_PRESENT |
WTIMER is available in this part
Definition at line
312
of file
efm32gg11b820f2048gl192.h
.