EFM32TG11B520F128GM80Devices
Modules |
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Bit Fields | |
Core | |
Processor and Core Peripheral Section.
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Part | |
Peripheral Declarations | |
Peripheral Memory Map | |
Peripheral Offsets | |
Peripheral TypeDefs | |
Device Specific Peripheral Register Structures.
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Typedefs |
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typedef enum IRQn | IRQn_Type |
Enumerations |
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enum |
IRQn
{
NonMaskableInt_IRQn = -14, HardFault_IRQn = -13, SVCall_IRQn = -5, PendSV_IRQn = -2, SysTick_IRQn = -1, EMU_IRQn = 0, WDOG0_IRQn = 1, LDMA_IRQn = 2, GPIO_EVEN_IRQn = 3, SMU_IRQn = 4, TIMER0_IRQn = 5, USART0_IRQn = 6, ACMP0_IRQn = 7, ADC0_IRQn = 8, I2C0_IRQn = 9, I2C1_IRQn = 10, GPIO_ODD_IRQn = 11, TIMER1_IRQn = 12, USART1_IRQn = 13, USART2_IRQn = 14, UART0_IRQn = 15, LEUART0_IRQn = 16, LETIMER0_IRQn = 17, PCNT0_IRQn = 18, RTCC_IRQn = 19, CMU_IRQn = 20, MSC_IRQn = 21, CRYPTO0_IRQn = 22, CRYOTIMER_IRQn = 23, USART3_IRQn = 24, WTIMER0_IRQn = 25, WTIMER1_IRQn = 26, VDAC0_IRQn = 27, CSEN_IRQn = 28, LESENSE_IRQn = 29, LCD_IRQn = 30, CAN0_IRQn = 31 } |
Typedef Documentation
Enumeration Type Documentation
enum IRQn |
Interrupt Number Definition
Definition at line
57
of file
efm32tg11b520f128gm80.h
.