WDOG_Init_TypeDef Struct Reference
Watchdog initialization structure.
#include <em_wdog.h>
Data Fields |
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| bool | enable |
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Enable Watchdog when initialization completed.
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| bool | debugRun |
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Counter keeps running during debug halt.
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| bool | clrSrc |
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Select WDOG clear source: False: Write to the clear bit will clear the WDOG counter True: Rising edge on the PRS Source 0 will clear the WDOG counter.
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| bool | em1Run |
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Counter keeps running when in EM1.
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| bool | em2Run |
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Counter keeps running when in EM2.
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| bool | em3Run |
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Counter keeps running when in EM3.
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| bool | em4Block |
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Block EMU from entering EM4.
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| bool | prs0MissRstEn |
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When set, a PRS Source 0 missing event will trigger a WDOG reset.
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| bool | prs1MissRstEn |
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When set, a PRS Source 1 missing event will trigger a WDOG reset.
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| bool | lock |
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Block SW from disabling LFRCO/LFXO oscillators.
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| WDOG_PeriodSel_TypeDef | perSel |
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Clock source to use for Watchdog.
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| WDOG_WarnSel_TypeDef | warnSel |
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Select warning time as % of the Watchdog timeout.
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| WDOG_WinSel_TypeDef | winSel |
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Select illegal window time as % of the Watchdog timeout.
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| bool | resetDisable |
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Disable Watchdog reset output if true.
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Watchdog initialization structure.
Field Documentation
◆ enable
| bool WDOG_Init_TypeDef::enable |
Enable Watchdog when initialization completed.
◆ debugRun
| bool WDOG_Init_TypeDef::debugRun |
Counter keeps running during debug halt.
◆ clrSrc
| bool WDOG_Init_TypeDef::clrSrc |
Select WDOG clear source: False: Write to the clear bit will clear the WDOG counter True: Rising edge on the PRS Source 0 will clear the WDOG counter.
◆ em1Run
| bool WDOG_Init_TypeDef::em1Run |
Counter keeps running when in EM1.
Available for series2.
◆ em2Run
| bool WDOG_Init_TypeDef::em2Run |
Counter keeps running when in EM2.
◆ em3Run
| bool WDOG_Init_TypeDef::em3Run |
Counter keeps running when in EM3.
◆ em4Block
| bool WDOG_Init_TypeDef::em4Block |
Block EMU from entering EM4.
◆ prs0MissRstEn
| bool WDOG_Init_TypeDef::prs0MissRstEn |
When set, a PRS Source 0 missing event will trigger a WDOG reset.
◆ prs1MissRstEn
| bool WDOG_Init_TypeDef::prs1MissRstEn |
When set, a PRS Source 1 missing event will trigger a WDOG reset.
◆ lock
| bool WDOG_Init_TypeDef::lock |
Block SW from disabling LFRCO/LFXO oscillators.
Block SW from modifying the configuration (a reset is needed to reconfigure).
◆ perSel
| WDOG_PeriodSel_TypeDef WDOG_Init_TypeDef::perSel |
Clock source to use for Watchdog.
Watchdog timeout period.
◆ warnSel
| WDOG_WarnSel_TypeDef WDOG_Init_TypeDef::warnSel |
Select warning time as % of the Watchdog timeout.
◆ winSel
| WDOG_WinSel_TypeDef WDOG_Init_TypeDef::winSel |
Select illegal window time as % of the Watchdog timeout.
◆ resetDisable
| bool WDOG_Init_TypeDef::resetDisable |
Disable Watchdog reset output if true.