BUS - Bitfield Read/Write
Description
BUS register and RAM bit/field read/write API.
API to perform bit-band and field set/clear access to RAM and peripherals.
Functions |
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void | BUS_RamBitWrite (volatile uint32_t *addr, unsigned int bit, unsigned int val) |
Perform a single-bit write operation on a 32-bit word in RAM.
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unsigned int | BUS_RamBitRead (volatile const uint32_t *addr, unsigned int bit) |
Perform a single-bit read operation on a 32-bit word in RAM.
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void | BUS_RegBitWrite (volatile uint32_t *addr, unsigned int bit, unsigned int val) |
Perform a single-bit write operation on a peripheral register.
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unsigned int | BUS_RegBitRead (volatile const uint32_t *addr, unsigned int bit) |
Perform a single-bit read operation on a peripheral register.
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void | BUS_RegMaskedSet (volatile uint32_t *addr, uint32_t mask) |
Perform a masked set operation on a peripheral register address.
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void | BUS_RegMaskedClear (volatile uint32_t *addr, uint32_t mask) |
Perform a masked clear operation on the peripheral register address.
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void | BUS_RegMaskedWrite (volatile uint32_t *addr, uint32_t mask, uint32_t val) |
Perform peripheral register masked write.
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uint32_t | BUS_RegMaskedRead (volatile const uint32_t *addr, uint32_t mask) |
Perform a peripheral register masked read.
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Function Documentation
◆ BUS_RamBitWrite()
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inline |
Perform a single-bit write operation on a 32-bit word in RAM.
This function uses Cortex-M bit-banding hardware to perform an atomic read-modify-write operation on a single bit write on a 32-bit word in RAM. See the reference manual for more details about bit-banding.
- Note
- This function is atomic on Cortex-M cores with bit-banding support. Bit- banding is a multicycle read-modify-write bus operation. RAM bit-banding is performed using the memory alias region at BITBAND_RAM_BASE.
- Parameters
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[in] addr
An ddress of a 32-bit word in RAM. [in] bit
A bit position to write, 0-31. [in] val
A value to set bit to, 0 or 1.
◆ BUS_RamBitRead()
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inline |
Perform a single-bit read operation on a 32-bit word in RAM.
This function uses Cortex-M bit-banding hardware to perform an atomic read operation on a single register bit. See the reference manual for more details about bit-banding.
- Note
- This function is atomic on Cortex-M cores with bit-banding support. RAM bit-banding is performed using the memory alias region at BITBAND_RAM_BASE.
- Parameters
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[in] addr
RAM address. [in] bit
A bit position to read, 0-31.
- Returns
- The requested bit shifted to bit position 0 in the return value.
◆ BUS_RegBitWrite()
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inline |
Perform a single-bit write operation on a peripheral register.
This function uses Cortex-M bit-banding hardware to perform an atomic read-modify-write operation on a single register bit. See the reference manual for more details about bit-banding.
- Note
- This function is atomic on Cortex-M cores with bit-banding support. Bit- banding is a multicycle read-modify-write bus operation. Peripheral register bit-banding is performed using the memory alias region at BITBAND_PER_BASE.
- Parameters
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[in] addr
A peripheral register address. [in] bit
A bit position to write, 0-31. [in] val
A value to set bit to, 0 or 1.
◆ BUS_RegBitRead()
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inline |
Perform a single-bit read operation on a peripheral register.
This function uses Cortex-M bit-banding hardware to perform an atomic read operation on a single register bit. See the reference manual for more details about bit-banding.
- Note
- This function is atomic on Cortex-M cores with bit-banding support. Peripheral register bit-banding is performed using the memory alias region at BITBAND_PER_BASE.
- Parameters
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[in] addr
A peripheral register address. [in] bit
A bit position to read, 0-31.
- Returns
- The requested bit shifted to bit position 0 in the return value.
◆ BUS_RegMaskedSet()
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inline |
Perform a masked set operation on a peripheral register address.
A peripheral register masked set provides a single-cycle and atomic set operation of a bit-mask in a peripheral register. All 1s in the mask are set to 1 in the register. All 0s in the mask are not changed in the register. RAMs and special peripherals are not supported. See the reference manual for more details about the peripheral register field set.
- Note
- This function is single-cycle and atomic on cores with peripheral bit set and clear support. It uses the memory alias region at PER_BITSET_MEM_BASE.
- Parameters
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[in] addr
A peripheral register address. [in] mask
A mask to set.
◆ BUS_RegMaskedClear()
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inline |
Perform a masked clear operation on the peripheral register address.
A peripheral register masked clear provides a single-cycle and atomic clear operation of a bit-mask in a peripheral register. All 1s in the mask are set to 0 in the register. All 0s in the mask are not changed in the register. RAMs and special peripherals are not supported. See the reference manual for more details about the peripheral register field clear.
- Note
- This function is single-cycle and atomic on cores with peripheral bit set and clear support. It uses the memory alias region at PER_BITCLR_MEM_BASE.
- Parameters
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[in] addr
A peripheral register address. [in] mask
A mask to clear.
◆ BUS_RegMaskedWrite()
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inline |
Perform peripheral register masked write.
This function first reads the peripheral register and updates only bits that are set in the mask with content of val. Typically, the mask is a bit-field in the register and the value val is within the mask.
- Note
- The read-modify-write operation is executed in a critical section to guarantee atomicity. Note that atomicity can only be guaranteed if register is modified only by the core, and not by other peripherals (like DMA).
- Parameters
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[in] addr
A peripheral register address. [in] mask
A peripheral register mask. [in] val
A peripheral register value. The value must be shifted to the correct bit position in the register corresponding to the field defined by the mask parameter. The register value must be contained in the field defined by the mask parameter. The register value is masked to prevent involuntary spillage.
◆ BUS_RegMaskedRead()
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inline |
Perform a peripheral register masked read.
Read an unshifted and masked value from a peripheral register.
- Note
- This operation is not hardware accelerated.
- Parameters
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[in] addr
A peripheral register address. [in] mask
A peripheral register mask.
- Returns
- An unshifted and masked register value.