EFM32GG_DMACTRL_BitFieldsDevices

Macros

#define _DMA_CTRL_CYCLE_CTRL_AUTO 0x02
#define _DMA_CTRL_CYCLE_CTRL_BASIC 0x01
#define _DMA_CTRL_CYCLE_CTRL_INVALID 0x00
#define _DMA_CTRL_CYCLE_CTRL_MASK 0x00000007UL
#define _DMA_CTRL_CYCLE_CTRL_MEM_SCATTER_GATHER 0x04
#define _DMA_CTRL_CYCLE_CTRL_MEM_SCATTER_GATHER_ALT 0x05
#define _DMA_CTRL_CYCLE_CTRL_PER_SCATTER_GATHER 0x06
#define _DMA_CTRL_CYCLE_CTRL_PER_SCATTER_GATHER_ALT 0x07
#define _DMA_CTRL_CYCLE_CTRL_PINGPONG 0x03
#define _DMA_CTRL_CYCLE_CTRL_SHIFT 0
#define _DMA_CTRL_DST_INC_BYTE 0x00
#define _DMA_CTRL_DST_INC_HALFWORD 0x01
#define _DMA_CTRL_DST_INC_MASK 0xC0000000UL
#define _DMA_CTRL_DST_INC_NONE 0x03
#define _DMA_CTRL_DST_INC_SHIFT 30
#define _DMA_CTRL_DST_INC_WORD 0x02
#define _DMA_CTRL_DST_PROT_CTRL_MASK 0x00E00000UL
#define _DMA_CTRL_DST_PROT_CTRL_SHIFT 21
#define _DMA_CTRL_DST_SIZE_BYTE 0x00
#define _DMA_CTRL_DST_SIZE_HALFWORD 0x01
#define _DMA_CTRL_DST_SIZE_MASK 0x30000000UL
#define _DMA_CTRL_DST_SIZE_RSVD 0x03
#define _DMA_CTRL_DST_SIZE_SHIFT 28
#define _DMA_CTRL_DST_SIZE_WORD 0x02
#define _DMA_CTRL_N_MINUS_1_MASK 0x00003FF0UL
#define _DMA_CTRL_N_MINUS_1_SHIFT 4
#define _DMA_CTRL_NEXT_USEBURST_MASK 0x00000008UL
#define _DMA_CTRL_NEXT_USEBURST_SHIFT 3
#define _DMA_CTRL_PROT_NON_PRIVILEGED 0x00
#define _DMA_CTRL_PROT_PRIVILEGED 0x01
#define _DMA_CTRL_R_POWER_1 0x00
#define _DMA_CTRL_R_POWER_1024 0x0a
#define _DMA_CTRL_R_POWER_128 0x07
#define _DMA_CTRL_R_POWER_16 0x04
#define _DMA_CTRL_R_POWER_2 0x01
#define _DMA_CTRL_R_POWER_256 0x08
#define _DMA_CTRL_R_POWER_32 0x05
#define _DMA_CTRL_R_POWER_4 0x02
#define _DMA_CTRL_R_POWER_512 0x09
#define _DMA_CTRL_R_POWER_64 0x06
#define _DMA_CTRL_R_POWER_8 0x03
#define _DMA_CTRL_R_POWER_MASK 0x0003C000UL
#define _DMA_CTRL_R_POWER_SHIFT 14
#define _DMA_CTRL_SRC_INC_BYTE 0x00
#define _DMA_CTRL_SRC_INC_HALFWORD 0x01
#define _DMA_CTRL_SRC_INC_MASK 0x0C000000UL
#define _DMA_CTRL_SRC_INC_NONE 0x03
#define _DMA_CTRL_SRC_INC_SHIFT 26
#define _DMA_CTRL_SRC_INC_WORD 0x02
#define _DMA_CTRL_SRC_PROT_CTRL_MASK 0x001C0000UL
#define _DMA_CTRL_SRC_PROT_CTRL_SHIFT 18
#define _DMA_CTRL_SRC_SIZE_BYTE 0x00
#define _DMA_CTRL_SRC_SIZE_HALFWORD 0x01
#define _DMA_CTRL_SRC_SIZE_MASK 0x03000000UL
#define _DMA_CTRL_SRC_SIZE_RSVD 0x03
#define _DMA_CTRL_SRC_SIZE_SHIFT 24
#define _DMA_CTRL_SRC_SIZE_WORD 0x02
#define DMA_CTRL_CYCLE_CTRL_AUTO 0x00000002UL
#define DMA_CTRL_CYCLE_CTRL_BASIC 0x00000001UL
#define DMA_CTRL_CYCLE_CTRL_INVALID 0x00000000UL
#define DMA_CTRL_CYCLE_CTRL_MEM_SCATTER_GATHER 0x000000004UL
#define DMA_CTRL_CYCLE_CTRL_MEM_SCATTER_GATHER_ALT 0x000000005UL
#define DMA_CTRL_CYCLE_CTRL_PER_SCATTER_GATHER 0x000000006UL
#define DMA_CTRL_CYCLE_CTRL_PER_SCATTER_GATHER_ALT 0x000000007UL
#define DMA_CTRL_CYCLE_CTRL_PINGPONG 0x00000003UL
#define DMA_CTRL_DST_INC_BYTE 0x00000000UL
#define DMA_CTRL_DST_INC_HALFWORD 0x40000000UL
#define DMA_CTRL_DST_INC_NONE 0xC0000000UL
#define DMA_CTRL_DST_INC_WORD 0x80000000UL
#define DMA_CTRL_DST_PROT_NON_PRIVILEGED 0x00000000UL
#define DMA_CTRL_DST_PROT_PRIVILEGED 0x00200000UL
#define DMA_CTRL_DST_SIZE_BYTE 0x00000000UL
#define DMA_CTRL_DST_SIZE_HALFWORD 0x10000000UL
#define DMA_CTRL_DST_SIZE_RSVD 0x30000000UL
#define DMA_CTRL_DST_SIZE_WORD 0x20000000UL
#define DMA_CTRL_R_POWER_1 0x00000000UL
#define DMA_CTRL_R_POWER_1024 0x00028000UL
#define DMA_CTRL_R_POWER_128 0x0001c000UL
#define DMA_CTRL_R_POWER_16 0x00010000UL
#define DMA_CTRL_R_POWER_2 0x00004000UL
#define DMA_CTRL_R_POWER_256 0x00020000UL
#define DMA_CTRL_R_POWER_32 0x00014000UL
#define DMA_CTRL_R_POWER_4 0x00008000UL
#define DMA_CTRL_R_POWER_512 0x00024000UL
#define DMA_CTRL_R_POWER_64 0x00018000UL
#define DMA_CTRL_R_POWER_8 0x0000c000UL
#define DMA_CTRL_SRC_INC_BYTE 0x00000000UL
#define DMA_CTRL_SRC_INC_HALFWORD 0x04000000UL
#define DMA_CTRL_SRC_INC_NONE 0x0C000000UL
#define DMA_CTRL_SRC_INC_WORD 0x08000000UL
#define DMA_CTRL_SRC_PROT_NON_PRIVILEGED 0x00000000UL
#define DMA_CTRL_SRC_PROT_PRIVILEGED 0x00040000UL
#define DMA_CTRL_SRC_SIZE_BYTE 0x00000000UL
#define DMA_CTRL_SRC_SIZE_HALFWORD 0x01000000UL
#define DMA_CTRL_SRC_SIZE_RSVD 0x03000000UL
#define DMA_CTRL_SRC_SIZE_WORD 0x02000000UL

Macro Definition Documentation

#define _DMA_CTRL_CYCLE_CTRL_AUTO   0x02

Auto cycle type

Definition at line 130 of file efm32gg_dmactrl.h .

#define _DMA_CTRL_CYCLE_CTRL_BASIC   0x01

Basic cycle type

Definition at line 129 of file efm32gg_dmactrl.h .

#define _DMA_CTRL_CYCLE_CTRL_INVALID   0x00

Invalid cycle type

Definition at line 128 of file efm32gg_dmactrl.h .

#define _DMA_CTRL_CYCLE_CTRL_MASK   0x00000007UL

DMA Cycle control bit mask - basic/auto/ping-poing/scath-gath

Definition at line 126 of file efm32gg_dmactrl.h .

Referenced by DMA_ActivateScatterGather() , and DMA_RefreshPingPong() .

#define _DMA_CTRL_CYCLE_CTRL_MEM_SCATTER_GATHER   0x04

Memory scatter gather cycle type

Definition at line 132 of file efm32gg_dmactrl.h .

#define _DMA_CTRL_CYCLE_CTRL_MEM_SCATTER_GATHER_ALT   0x05

Memory scatter gather using alternate structure

Definition at line 133 of file efm32gg_dmactrl.h .

#define _DMA_CTRL_CYCLE_CTRL_PER_SCATTER_GATHER   0x06

Peripheral scatter gather cycle type

Definition at line 134 of file efm32gg_dmactrl.h .

#define _DMA_CTRL_CYCLE_CTRL_PER_SCATTER_GATHER_ALT   0x07

Peripheral scatter gather cycle type using alternate structure

Definition at line 135 of file efm32gg_dmactrl.h .

#define _DMA_CTRL_CYCLE_CTRL_PINGPONG   0x03

PingPong cycle type

Definition at line 131 of file efm32gg_dmactrl.h .

#define _DMA_CTRL_CYCLE_CTRL_SHIFT   0

DMA Cycle control bit shift

Definition at line 127 of file efm32gg_dmactrl.h .

Referenced by DMA_ActivateScatterGather() , DMA_CfgDescrScatterGather() , and DMA_RefreshPingPong() .

#define _DMA_CTRL_DST_INC_BYTE   0x00

Byte/8-bit increment

Definition at line 50 of file efm32gg_dmactrl.h .

#define _DMA_CTRL_DST_INC_HALFWORD   0x01

Half word/16-bit increment

Definition at line 51 of file efm32gg_dmactrl.h .

#define _DMA_CTRL_DST_INC_MASK   0xC0000000UL

Data increment for destination, bit mask

Definition at line 48 of file efm32gg_dmactrl.h .

Referenced by DMA_RefreshPingPong() .

#define _DMA_CTRL_DST_INC_NONE   0x03

No increment

Definition at line 53 of file efm32gg_dmactrl.h .

Referenced by DMA_RefreshPingPong() .

#define _DMA_CTRL_DST_INC_SHIFT   30

Data increment for destination, shift value

Definition at line 49 of file efm32gg_dmactrl.h .

Referenced by DMA_ActivateScatterGather() , DMA_CfgDescr() , DMA_CfgDescrScatterGather() , and DMA_RefreshPingPong() .

#define _DMA_CTRL_DST_INC_WORD   0x02

Word/32-bit increment

Definition at line 52 of file efm32gg_dmactrl.h .

#define _DMA_CTRL_DST_PROT_CTRL_MASK   0x00E00000UL

Protection flag for destination, bit mask

Definition at line 88 of file efm32gg_dmactrl.h .

#define _DMA_CTRL_DST_PROT_CTRL_SHIFT   21

Protection flag for destination, shift value

Definition at line 89 of file efm32gg_dmactrl.h .

#define _DMA_CTRL_DST_SIZE_BYTE   0x00

Byte/8-bit data size

Definition at line 60 of file efm32gg_dmactrl.h .

#define _DMA_CTRL_DST_SIZE_HALFWORD   0x01

Half word/16-bit data size

Definition at line 61 of file efm32gg_dmactrl.h .

#define _DMA_CTRL_DST_SIZE_MASK   0x30000000UL

Data size for destination - MUST be the same as source, bit mask

Definition at line 58 of file efm32gg_dmactrl.h .

#define _DMA_CTRL_DST_SIZE_RSVD   0x03

Reserved

Definition at line 63 of file efm32gg_dmactrl.h .

#define _DMA_CTRL_DST_SIZE_SHIFT   28

Data size for destination - MUST be the same as source, shift value

Definition at line 59 of file efm32gg_dmactrl.h .

Referenced by DMA_ActivateScatterGather() , DMA_CfgDescr() , and DMA_CfgDescrScatterGather() .

#define _DMA_CTRL_DST_SIZE_WORD   0x02

Word/32-bit data size

Definition at line 62 of file efm32gg_dmactrl.h .

#define _DMA_CTRL_N_MINUS_1_MASK   0x00003FF0UL

Number of DMA transfers minus 1, bit mask. See PL230 documentation

Definition at line 122 of file efm32gg_dmactrl.h .

Referenced by DMA_ActivateAuto() , DMA_ActivateBasic() , DMA_ActivatePingPong() , DMA_RefreshPingPong() , DMADRV_TransferDone() , and DMADRV_TransferRemainingCount() .

#define _DMA_CTRL_N_MINUS_1_SHIFT   4

Number of DMA transfers minus 1, shift mask. See PL230 documentation

Definition at line 123 of file efm32gg_dmactrl.h .

Referenced by DMA_ActivateAuto() , DMA_ActivateBasic() , DMA_ActivatePingPong() , DMA_ActivateScatterGather() , DMA_CfgDescr() , DMA_CfgDescrScatterGather() , DMA_RefreshPingPong() , DMADRV_TransferDone() , and DMADRV_TransferRemainingCount() .

#define _DMA_CTRL_NEXT_USEBURST_MASK   0x00000008UL

DMA useburst_set[C] is 1 when using scatter-gather DMA and using alternate data

Definition at line 124 of file efm32gg_dmactrl.h .

#define _DMA_CTRL_NEXT_USEBURST_SHIFT   3

DMA useburst shift

Definition at line 125 of file efm32gg_dmactrl.h .

Referenced by DMA_ActivateScatterGather() , DMA_CfgDescr() , and DMA_CfgDescrScatterGather() .

#define _DMA_CTRL_PROT_NON_PRIVILEGED   0x00

Protection bits to indicate non-privileged access

Definition at line 96 of file efm32gg_dmactrl.h .

#define _DMA_CTRL_PROT_PRIVILEGED   0x01

Protection bits to indicate privileged access

Definition at line 97 of file efm32gg_dmactrl.h .

#define _DMA_CTRL_R_POWER_1   0x00

Arbitrate after each transfer

Definition at line 100 of file efm32gg_dmactrl.h .

#define _DMA_CTRL_R_POWER_1024   0x0a

Arbitrate after every 1024 transfers

Definition at line 110 of file efm32gg_dmactrl.h .

#define _DMA_CTRL_R_POWER_128   0x07

Arbitrate after every 128 transfers

Definition at line 107 of file efm32gg_dmactrl.h .

#define _DMA_CTRL_R_POWER_16   0x04

Arbitrate after every 16 transfers

Definition at line 104 of file efm32gg_dmactrl.h .

#define _DMA_CTRL_R_POWER_2   0x01

Arbitrate after every 2 transfers

Definition at line 101 of file efm32gg_dmactrl.h .

#define _DMA_CTRL_R_POWER_256   0x08

Arbitrate after every 256 transfers

Definition at line 108 of file efm32gg_dmactrl.h .

#define _DMA_CTRL_R_POWER_32   0x05

Arbitrate after every 32 transfers

Definition at line 105 of file efm32gg_dmactrl.h .

#define _DMA_CTRL_R_POWER_4   0x02

Arbitrate after every 4 transfers

Definition at line 102 of file efm32gg_dmactrl.h .

#define _DMA_CTRL_R_POWER_512   0x09

Arbitrate after every 512 transfers

Definition at line 109 of file efm32gg_dmactrl.h .

#define _DMA_CTRL_R_POWER_64   0x06

Arbitrate after every 64 transfers

Definition at line 106 of file efm32gg_dmactrl.h .

#define _DMA_CTRL_R_POWER_8   0x03

Arbitrate after every 8 transfers

Definition at line 103 of file efm32gg_dmactrl.h .

#define _DMA_CTRL_R_POWER_MASK   0x0003C000UL

DMA arbitration mask

Definition at line 98 of file efm32gg_dmactrl.h .

#define _DMA_CTRL_R_POWER_SHIFT   14

Number of DMA cycles before controller does new arbitration in 2^R

Definition at line 99 of file efm32gg_dmactrl.h .

Referenced by DMA_ActivateScatterGather() , DMA_CfgDescr() , and DMA_CfgDescrScatterGather() .

#define _DMA_CTRL_SRC_INC_BYTE   0x00

Byte/8-bit increment

Definition at line 70 of file efm32gg_dmactrl.h .

#define _DMA_CTRL_SRC_INC_HALFWORD   0x01

Half word/16-bit increment

Definition at line 71 of file efm32gg_dmactrl.h .

#define _DMA_CTRL_SRC_INC_MASK   0x0C000000UL

Data increment for source, bit mask

Definition at line 68 of file efm32gg_dmactrl.h .

Referenced by DMA_RefreshPingPong() .

#define _DMA_CTRL_SRC_INC_NONE   0x03

No increment

Definition at line 73 of file efm32gg_dmactrl.h .

Referenced by DMA_RefreshPingPong() .

#define _DMA_CTRL_SRC_INC_SHIFT   26

Data increment for source, shift value

Definition at line 69 of file efm32gg_dmactrl.h .

Referenced by DMA_ActivateScatterGather() , DMA_CfgDescr() , DMA_CfgDescrScatterGather() , and DMA_RefreshPingPong() .

#define _DMA_CTRL_SRC_INC_WORD   0x02

Word/32-bit increment

Definition at line 72 of file efm32gg_dmactrl.h .

#define _DMA_CTRL_SRC_PROT_CTRL_MASK   0x001C0000UL

Protection flag for source, bit mask

Definition at line 92 of file efm32gg_dmactrl.h .

Referenced by DMA_ActivateScatterGather() .

#define _DMA_CTRL_SRC_PROT_CTRL_SHIFT   18

Protection flag for source, shift value

Definition at line 93 of file efm32gg_dmactrl.h .

Referenced by DMA_CfgDescr() , and DMA_CfgDescrScatterGather() .

#define _DMA_CTRL_SRC_SIZE_BYTE   0x00

Byte/8-bit data size

Definition at line 80 of file efm32gg_dmactrl.h .

#define _DMA_CTRL_SRC_SIZE_HALFWORD   0x01

Half word/16-bit data size

Definition at line 81 of file efm32gg_dmactrl.h .

#define _DMA_CTRL_SRC_SIZE_MASK   0x03000000UL

Data size for source - MUST be the same as destination, bit mask

Definition at line 78 of file efm32gg_dmactrl.h .

#define _DMA_CTRL_SRC_SIZE_RSVD   0x03

Reserved

Definition at line 83 of file efm32gg_dmactrl.h .

#define _DMA_CTRL_SRC_SIZE_SHIFT   24

Data size for source - MUST be the same as destination, shift value

Definition at line 79 of file efm32gg_dmactrl.h .

Referenced by DMA_ActivateScatterGather() , DMA_CfgDescr() , and DMA_CfgDescrScatterGather() .

#define _DMA_CTRL_SRC_SIZE_WORD   0x02

Word/32-bit data size

Definition at line 82 of file efm32gg_dmactrl.h .

#define DMA_CTRL_CYCLE_CTRL_AUTO   0x00000002UL

Auto cycle type

Definition at line 138 of file efm32gg_dmactrl.h .

#define DMA_CTRL_CYCLE_CTRL_BASIC   0x00000001UL

Basic cycle type

Definition at line 137 of file efm32gg_dmactrl.h .

#define DMA_CTRL_CYCLE_CTRL_INVALID   0x00000000UL

Invalid cycle type

Definition at line 136 of file efm32gg_dmactrl.h .

Referenced by DMA_CfgDescr() .

#define DMA_CTRL_CYCLE_CTRL_MEM_SCATTER_GATHER   0x000000004UL

Memory scatter gather cycle type

Definition at line 140 of file efm32gg_dmactrl.h .

#define DMA_CTRL_CYCLE_CTRL_MEM_SCATTER_GATHER_ALT   0x000000005UL

Memory scatter gather using alternate structure

Definition at line 141 of file efm32gg_dmactrl.h .

#define DMA_CTRL_CYCLE_CTRL_PER_SCATTER_GATHER   0x000000006UL

Peripheral scatter gather cycle type

Definition at line 142 of file efm32gg_dmactrl.h .

#define DMA_CTRL_CYCLE_CTRL_PER_SCATTER_GATHER_ALT   0x000000007UL

Peripheral scatter gather cycle type using alternate structure

Definition at line 143 of file efm32gg_dmactrl.h .

#define DMA_CTRL_CYCLE_CTRL_PINGPONG   0x00000003UL

PingPong cycle type

Definition at line 139 of file efm32gg_dmactrl.h .

#define DMA_CTRL_DST_INC_BYTE   0x00000000UL

Byte/8-bit increment

Definition at line 54 of file efm32gg_dmactrl.h .

#define DMA_CTRL_DST_INC_HALFWORD   0x40000000UL

Half word/16-bit increment

Definition at line 55 of file efm32gg_dmactrl.h .

#define DMA_CTRL_DST_INC_NONE   0xC0000000UL

No increment

Definition at line 57 of file efm32gg_dmactrl.h .

#define DMA_CTRL_DST_INC_WORD   0x80000000UL

Word/32-bit increment

Definition at line 56 of file efm32gg_dmactrl.h .

#define DMA_CTRL_DST_PROT_NON_PRIVILEGED   0x00000000UL

Non-privileged mode for estination

Definition at line 91 of file efm32gg_dmactrl.h .

#define DMA_CTRL_DST_PROT_PRIVILEGED   0x00200000UL

Privileged mode for destination

Definition at line 90 of file efm32gg_dmactrl.h .

#define DMA_CTRL_DST_SIZE_BYTE   0x00000000UL

Byte/8-bit data size

Definition at line 64 of file efm32gg_dmactrl.h .

#define DMA_CTRL_DST_SIZE_HALFWORD   0x10000000UL

Half word/16-bit data size

Definition at line 65 of file efm32gg_dmactrl.h .

#define DMA_CTRL_DST_SIZE_RSVD   0x30000000UL

Reserved - do not use

Definition at line 67 of file efm32gg_dmactrl.h .

#define DMA_CTRL_DST_SIZE_WORD   0x20000000UL

Word/32-bit data size

Definition at line 66 of file efm32gg_dmactrl.h .

#define DMA_CTRL_R_POWER_1   0x00000000UL

Arbitrate after each transfer

Definition at line 111 of file efm32gg_dmactrl.h .

#define DMA_CTRL_R_POWER_1024   0x00028000UL

Arbitrate after every 1024 transfers

Definition at line 121 of file efm32gg_dmactrl.h .

#define DMA_CTRL_R_POWER_128   0x0001c000UL

Arbitrate after every 128 transfers

Definition at line 118 of file efm32gg_dmactrl.h .

#define DMA_CTRL_R_POWER_16   0x00010000UL

Arbitrate after every 16 transfers

Definition at line 115 of file efm32gg_dmactrl.h .

#define DMA_CTRL_R_POWER_2   0x00004000UL

Arbitrate after every 2 transfers

Definition at line 112 of file efm32gg_dmactrl.h .

#define DMA_CTRL_R_POWER_256   0x00020000UL

Arbitrate after every 256 transfers

Definition at line 119 of file efm32gg_dmactrl.h .

#define DMA_CTRL_R_POWER_32   0x00014000UL

Arbitrate after every 32 transfers

Definition at line 116 of file efm32gg_dmactrl.h .

#define DMA_CTRL_R_POWER_4   0x00008000UL

Arbitrate after every 4 transfers

Definition at line 113 of file efm32gg_dmactrl.h .

#define DMA_CTRL_R_POWER_512   0x00024000UL

Arbitrate after every 512 transfers

Definition at line 120 of file efm32gg_dmactrl.h .

#define DMA_CTRL_R_POWER_64   0x00018000UL

Arbitrate after every 64 transfers

Definition at line 117 of file efm32gg_dmactrl.h .

#define DMA_CTRL_R_POWER_8   0x0000c000UL

Arbitrate after every 8 transfers

Definition at line 114 of file efm32gg_dmactrl.h .

#define DMA_CTRL_SRC_INC_BYTE   0x00000000UL

Byte/8-bit increment

Definition at line 74 of file efm32gg_dmactrl.h .

#define DMA_CTRL_SRC_INC_HALFWORD   0x04000000UL

Half word/16-bit increment

Definition at line 75 of file efm32gg_dmactrl.h .

#define DMA_CTRL_SRC_INC_NONE   0x0C000000UL

No increment

Definition at line 77 of file efm32gg_dmactrl.h .

#define DMA_CTRL_SRC_INC_WORD   0x08000000UL

Word/32-bit increment

Definition at line 76 of file efm32gg_dmactrl.h .

#define DMA_CTRL_SRC_PROT_NON_PRIVILEGED   0x00000000UL

Non-privileged mode for estination

Definition at line 95 of file efm32gg_dmactrl.h .

#define DMA_CTRL_SRC_PROT_PRIVILEGED   0x00040000UL

Privileged mode for destination

Definition at line 94 of file efm32gg_dmactrl.h .

#define DMA_CTRL_SRC_SIZE_BYTE   0x00000000UL

Byte/8-bit data size

Definition at line 84 of file efm32gg_dmactrl.h .

#define DMA_CTRL_SRC_SIZE_HALFWORD   0x01000000UL

Half word/16-bit data size

Definition at line 85 of file efm32gg_dmactrl.h .

#define DMA_CTRL_SRC_SIZE_RSVD   0x03000000UL

Reserved - do not use

Definition at line 87 of file efm32gg_dmactrl.h .

#define DMA_CTRL_SRC_SIZE_WORD   0x02000000UL

Word/32-bit data size

Definition at line 86 of file efm32gg_dmactrl.h .