Modules
EFM32ZG222F32 Alternate Function

EFM32ZG222F32 Bit Fields

EFM32ZG222F32 Core
Processor and Core Peripheral Section.

EFM32ZG222F32 Part

EFM32ZG222F32 Peripheral Declarations

EFM32ZG222F32 Peripheral Memory Map

EFM32ZG222F32 Peripheral TypeDefs
Device Specific Peripheral Register Structures.

Macros
#define	ARM_MATH_CM0PLUS

#define	SET_BIT_FIELD (REG, MASK, VALUE, OFFSET) REG = ((REG) &~(MASK)) \| (((VALUE) << (OFFSET)) & (MASK));
	Set the value of a bit field within a register.

Enumerations
enum	IRQn { NonMaskableInt_IRQn = -14, HardFault_IRQn = -13, SVCall_IRQn = -5, PendSV_IRQn = -2, SysTick_IRQn = -1, DMA_IRQn = 0, GPIO_EVEN_IRQn = 1, TIMER0_IRQn = 2, ACMP0_IRQn = 3, ADC0_IRQn = 4, I2C0_IRQn = 5, GPIO_ODD_IRQn = 6, TIMER1_IRQn = 7, USART1_RX_IRQn = 8, USART1_TX_IRQn = 9, LEUART0_IRQn = 10, PCNT0_IRQn = 11, RTC_IRQn = 12, CMU_IRQn = 13, VCMP_IRQn = 14, MSC_IRQn = 15, AES_IRQn = 16 }

Macro Definition Documentation

#define SET_BIT_FIELD	(	`REG,`
		`MASK,`
		`VALUE,`
		`OFFSET`
	)	REG = ((REG) &~(MASK)) \| (((VALUE) << (OFFSET)) & (MASK));

Set the value of a bit field within a register.

Parameters

`REG`	The register to update
`MASK`	The mask for the bit field to update
`VALUE`	The value to write to the bit field
`OFFSET`	The number of bits that the field is offset within the register. 0 (zero) means LSB.

Definition at line 366 of file efm32zg222f32.h .

Typedef Documentation

Interrupt Number Definition

enum IRQn

Interrupt Number Definition

Enumerator
NonMaskableInt_IRQn	-14 Cortex-M0+ Non Maskable Interrupt
HardFault_IRQn	-13 Cortex-M0+ Hard Fault Interrupt
SVCall_IRQn	-5 Cortex-M0+ SV Call Interrupt
PendSV_IRQn	-2 Cortex-M0+ Pend SV Interrupt
SysTick_IRQn	-1 Cortex-M0+ System Tick Interrupt
DMA_IRQn	0 EFM32 DMA Interrupt
GPIO_EVEN_IRQn	1 EFM32 GPIO_EVEN Interrupt
TIMER0_IRQn	2 EFM32 TIMER0 Interrupt
ACMP0_IRQn	3 EFM32 ACMP0 Interrupt
ADC0_IRQn	4 EFM32 ADC0 Interrupt
I2C0_IRQn	5 EFM32 I2C0 Interrupt
GPIO_ODD_IRQn	6 EFM32 GPIO_ODD Interrupt
TIMER1_IRQn	7 EFM32 TIMER1 Interrupt
USART1_RX_IRQn	8 EFM32 USART1_RX Interrupt
USART1_TX_IRQn	9 EFM32 USART1_TX Interrupt
LEUART0_IRQn	10 EFM32 LEUART0 Interrupt
PCNT0_IRQn	11 EFM32 PCNT0 Interrupt
RTC_IRQn	12 EFM32 RTC Interrupt
CMU_IRQn	13 EFM32 CMU Interrupt
VCMP_IRQn	14 EFM32 VCMP Interrupt
MSC_IRQn	15 EFM32 MSC Interrupt
AES_IRQn	16 EFM32 AES Interrupt

Definition at line 58 of file efm32zg222f32.h .