EFM32ZG222F32 Peripheral Memory MapDevices > EFM32ZG222F32
Macros |
|
| #define | ACMP0_BASE (0x40001000UL) |
| #define | ADC0_BASE (0x40002000UL) |
| #define | AES_BASE (0x400E0000UL) |
| #define | CALIBRATE_BASE (0x0FE08000UL) |
| #define | CMU_BASE (0x400C8000UL) |
| #define | DEVINFO_BASE (0x0FE081B0UL) |
| #define | DMA_BASE (0x400C2000UL) |
| #define | EMU_BASE (0x400C6000UL) |
| #define | GPIO_BASE (0x40006000UL) |
| #define | I2C0_BASE (0x4000A000UL) |
| #define | IDAC0_BASE (0x40004000UL) |
| #define | LEUART0_BASE (0x40084000UL) |
| #define | LOCKBITS_BASE (0x0FE04000UL) |
| #define | MSC_BASE (0x400C0000UL) |
| #define | PCNT0_BASE (0x40086000UL) |
| #define | PRS_BASE (0x400CC000UL) |
| #define | RMU_BASE (0x400CA000UL) |
| #define | ROMTABLE_BASE (0xF00FFFD0UL) |
| #define | RTC_BASE (0x40080000UL) |
| #define | TIMER0_BASE (0x40010000UL) |
| #define | TIMER1_BASE (0x40010400UL) |
| #define | USART1_BASE (0x4000C400UL) |
| #define | USERDATA_BASE (0x0FE00000UL) |
| #define | VCMP_BASE (0x40000000UL) |
| #define | WDOG_BASE (0x40088000UL) |
Macro Definition Documentation
| #define ACMP0_BASE (0x40001000UL) |
ACMP0 base address
Definition at line
269
of file
efm32zg222f32.h
.
| #define ADC0_BASE (0x40002000UL) |
ADC0 base address
Definition at line
275
of file
efm32zg222f32.h
.
| #define AES_BASE (0x400E0000UL) |
AES base address
Definition at line
261
of file
efm32zg222f32.h
.
| #define CALIBRATE_BASE (0x0FE08000UL) |
CALIBRATE base address
Definition at line
281
of file
efm32zg222f32.h
.
| #define CMU_BASE (0x400C8000UL) |
| #define DEVINFO_BASE (0x0FE081B0UL) |
DEVINFO base address
Definition at line
282
of file
efm32zg222f32.h
.
Referenced by SYSTEM_GetCalibrationValue() .
| #define DMA_BASE (0x400C2000UL) |
DMA base address
Definition at line
262
of file
efm32zg222f32.h
.
| #define EMU_BASE (0x400C6000UL) |
EMU base address
Definition at line
264
of file
efm32zg222f32.h
.
Referenced by CHIP_Init() , EMU_EnterEM4() , and RMU_ResetCauseGet() .
| #define GPIO_BASE (0x40006000UL) |
GPIO base address
Definition at line
273
of file
efm32zg222f32.h
.
| #define I2C0_BASE (0x4000A000UL) |
I2C0 base address
Definition at line
278
of file
efm32zg222f32.h
.
| #define IDAC0_BASE (0x40004000UL) |
IDAC0 base address
Definition at line
272
of file
efm32zg222f32.h
.
| #define LEUART0_BASE (0x40084000UL) |
LEUART0 base address
Definition at line
276
of file
efm32zg222f32.h
.
| #define LOCKBITS_BASE (0x0FE04000UL) |
Lock-bits page base address
Definition at line
284
of file
efm32zg222f32.h
.
| #define MSC_BASE (0x400C0000UL) |
MSC base address
Definition at line
263
of file
efm32zg222f32.h
.
| #define PCNT0_BASE (0x40086000UL) |
PCNT0 base address
Definition at line
277
of file
efm32zg222f32.h
.
| #define PRS_BASE (0x400CC000UL) |
PRS base address
Definition at line
271
of file
efm32zg222f32.h
.
| #define RMU_BASE (0x400CA000UL) |
RMU base address
Definition at line
265
of file
efm32zg222f32.h
.
| #define ROMTABLE_BASE (0xF00FFFD0UL) |
ROMTABLE base address
Definition at line
283
of file
efm32zg222f32.h
.
| #define RTC_BASE (0x40080000UL) |
RTC base address
Definition at line
279
of file
efm32zg222f32.h
.
| #define TIMER0_BASE (0x40010000UL) |
TIMER0 base address
Definition at line
267
of file
efm32zg222f32.h
.
| #define TIMER1_BASE (0x40010400UL) |
TIMER1 base address
Definition at line
268
of file
efm32zg222f32.h
.
| #define USART1_BASE (0x4000C400UL) |
USART1 base address
Definition at line
270
of file
efm32zg222f32.h
.
| #define USERDATA_BASE (0x0FE00000UL) |
User data page base address
Definition at line
285
of file
efm32zg222f32.h
.
| #define VCMP_BASE (0x40000000UL) |
VCMP base address
Definition at line
274
of file
efm32zg222f32.h
.
| #define WDOG_BASE (0x40088000UL) |
WDOG base address
Definition at line
280
of file
efm32zg222f32.h
.