Macros
#define	_VDAC_CAL_GAINERRTRIM_DEFAULT 0x00000020UL

#define	_VDAC_CAL_GAINERRTRIM_MASK 0x3F00UL

#define	_VDAC_CAL_GAINERRTRIM_SHIFT 8

#define	_VDAC_CAL_GAINERRTRIMCH1_DEFAULT 0x00000008UL

#define	_VDAC_CAL_GAINERRTRIMCH1_MASK 0xF0000UL

#define	_VDAC_CAL_GAINERRTRIMCH1_SHIFT 16

#define	_VDAC_CAL_MASK 0x000F3F07UL

#define	_VDAC_CAL_OFFSETTRIM_DEFAULT 0x00000004UL

#define	_VDAC_CAL_OFFSETTRIM_MASK 0x7UL

#define	_VDAC_CAL_OFFSETTRIM_SHIFT 0

#define	_VDAC_CAL_RESETVALUE 0x00082004UL

#define	_VDAC_CH0CTRL_CONVMODE_CONTINUOUS 0x00000000UL

#define	_VDAC_CH0CTRL_CONVMODE_DEFAULT 0x00000000UL

#define	_VDAC_CH0CTRL_CONVMODE_MASK 0x1UL

#define	_VDAC_CH0CTRL_CONVMODE_SAMPLEOFF 0x00000001UL

#define	_VDAC_CH0CTRL_CONVMODE_SHIFT 0

#define	_VDAC_CH0CTRL_MASK 0x0000F171UL

#define	_VDAC_CH0CTRL_PRSASYNC_DEFAULT 0x00000000UL

#define	_VDAC_CH0CTRL_PRSASYNC_MASK 0x100UL

#define	_VDAC_CH0CTRL_PRSASYNC_SHIFT 8

#define	_VDAC_CH0CTRL_PRSSEL_DEFAULT 0x00000000UL

#define	_VDAC_CH0CTRL_PRSSEL_MASK 0xF000UL

#define	_VDAC_CH0CTRL_PRSSEL_PRSCH0 0x00000000UL

#define	_VDAC_CH0CTRL_PRSSEL_PRSCH1 0x00000001UL

#define	_VDAC_CH0CTRL_PRSSEL_PRSCH10 0x0000000AUL

#define	_VDAC_CH0CTRL_PRSSEL_PRSCH11 0x0000000BUL

#define	_VDAC_CH0CTRL_PRSSEL_PRSCH2 0x00000002UL

#define	_VDAC_CH0CTRL_PRSSEL_PRSCH3 0x00000003UL

#define	_VDAC_CH0CTRL_PRSSEL_PRSCH4 0x00000004UL

#define	_VDAC_CH0CTRL_PRSSEL_PRSCH5 0x00000005UL

#define	_VDAC_CH0CTRL_PRSSEL_PRSCH6 0x00000006UL

#define	_VDAC_CH0CTRL_PRSSEL_PRSCH7 0x00000007UL

#define	_VDAC_CH0CTRL_PRSSEL_PRSCH8 0x00000008UL

#define	_VDAC_CH0CTRL_PRSSEL_PRSCH9 0x00000009UL

#define	_VDAC_CH0CTRL_PRSSEL_SHIFT 12

#define	_VDAC_CH0CTRL_RESETVALUE 0x00000000UL

#define	_VDAC_CH0CTRL_TRIGMODE_DEFAULT 0x00000000UL

#define	_VDAC_CH0CTRL_TRIGMODE_LESENSE 0x00000005UL

#define	_VDAC_CH0CTRL_TRIGMODE_MASK 0x70UL

#define	_VDAC_CH0CTRL_TRIGMODE_PRS 0x00000001UL

#define	_VDAC_CH0CTRL_TRIGMODE_REFRESH 0x00000002UL

#define	_VDAC_CH0CTRL_TRIGMODE_SHIFT 4

#define	_VDAC_CH0CTRL_TRIGMODE_SW 0x00000000UL

#define	_VDAC_CH0CTRL_TRIGMODE_SWPRS 0x00000003UL

#define	_VDAC_CH0CTRL_TRIGMODE_SWREFRESH 0x00000004UL

#define	_VDAC_CH0DATA_DATA_DEFAULT 0x00000800UL

#define	_VDAC_CH0DATA_DATA_MASK 0xFFFUL

#define	_VDAC_CH0DATA_DATA_SHIFT 0

#define	_VDAC_CH0DATA_MASK 0x00000FFFUL

#define	_VDAC_CH0DATA_RESETVALUE 0x00000800UL

#define	_VDAC_CH1CTRL_CONVMODE_CONTINUOUS 0x00000000UL

#define	_VDAC_CH1CTRL_CONVMODE_DEFAULT 0x00000000UL

#define	_VDAC_CH1CTRL_CONVMODE_MASK 0x1UL

#define	_VDAC_CH1CTRL_CONVMODE_SAMPLEOFF 0x00000001UL

#define	_VDAC_CH1CTRL_CONVMODE_SHIFT 0

#define	_VDAC_CH1CTRL_MASK 0x0000F171UL

#define	_VDAC_CH1CTRL_PRSASYNC_DEFAULT 0x00000000UL

#define	_VDAC_CH1CTRL_PRSASYNC_MASK 0x100UL

#define	_VDAC_CH1CTRL_PRSASYNC_SHIFT 8

#define	_VDAC_CH1CTRL_PRSSEL_DEFAULT 0x00000000UL

#define	_VDAC_CH1CTRL_PRSSEL_MASK 0xF000UL

#define	_VDAC_CH1CTRL_PRSSEL_PRSCH0 0x00000000UL

#define	_VDAC_CH1CTRL_PRSSEL_PRSCH1 0x00000001UL

#define	_VDAC_CH1CTRL_PRSSEL_PRSCH10 0x0000000AUL

#define	_VDAC_CH1CTRL_PRSSEL_PRSCH11 0x0000000BUL

#define	_VDAC_CH1CTRL_PRSSEL_PRSCH2 0x00000002UL

#define	_VDAC_CH1CTRL_PRSSEL_PRSCH3 0x00000003UL

#define	_VDAC_CH1CTRL_PRSSEL_PRSCH4 0x00000004UL

#define	_VDAC_CH1CTRL_PRSSEL_PRSCH5 0x00000005UL

#define	_VDAC_CH1CTRL_PRSSEL_PRSCH6 0x00000006UL

#define	_VDAC_CH1CTRL_PRSSEL_PRSCH7 0x00000007UL

#define	_VDAC_CH1CTRL_PRSSEL_PRSCH8 0x00000008UL

#define	_VDAC_CH1CTRL_PRSSEL_PRSCH9 0x00000009UL

#define	_VDAC_CH1CTRL_PRSSEL_SHIFT 12

#define	_VDAC_CH1CTRL_RESETVALUE 0x00000000UL

#define	_VDAC_CH1CTRL_TRIGMODE_DEFAULT 0x00000000UL

#define	_VDAC_CH1CTRL_TRIGMODE_LESENSE 0x00000005UL

#define	_VDAC_CH1CTRL_TRIGMODE_MASK 0x70UL

#define	_VDAC_CH1CTRL_TRIGMODE_PRS 0x00000001UL

#define	_VDAC_CH1CTRL_TRIGMODE_REFRESH 0x00000002UL

#define	_VDAC_CH1CTRL_TRIGMODE_SHIFT 4

#define	_VDAC_CH1CTRL_TRIGMODE_SW 0x00000000UL

#define	_VDAC_CH1CTRL_TRIGMODE_SWPRS 0x00000003UL

#define	_VDAC_CH1CTRL_TRIGMODE_SWREFRESH 0x00000004UL

#define	_VDAC_CH1DATA_DATA_DEFAULT 0x00000800UL

#define	_VDAC_CH1DATA_DATA_MASK 0xFFFUL

#define	_VDAC_CH1DATA_DATA_SHIFT 0

#define	_VDAC_CH1DATA_MASK 0x00000FFFUL

#define	_VDAC_CH1DATA_RESETVALUE 0x00000800UL

#define	_VDAC_CMD_CH0DIS_DEFAULT 0x00000000UL

#define	_VDAC_CMD_CH0DIS_MASK 0x2UL

#define	_VDAC_CMD_CH0DIS_SHIFT 1

#define	_VDAC_CMD_CH0EN_DEFAULT 0x00000000UL

#define	_VDAC_CMD_CH0EN_MASK 0x1UL

#define	_VDAC_CMD_CH0EN_SHIFT 0

#define	_VDAC_CMD_CH1DIS_DEFAULT 0x00000000UL

#define	_VDAC_CMD_CH1DIS_MASK 0x8UL

#define	_VDAC_CMD_CH1DIS_SHIFT 3

#define	_VDAC_CMD_CH1EN_DEFAULT 0x00000000UL

#define	_VDAC_CMD_CH1EN_MASK 0x4UL

#define	_VDAC_CMD_CH1EN_SHIFT 2

#define	_VDAC_CMD_MASK 0x000F000FUL

#define	_VDAC_CMD_OPA0DIS_DEFAULT 0x00000000UL

#define	_VDAC_CMD_OPA0DIS_MASK 0x20000UL

#define	_VDAC_CMD_OPA0DIS_SHIFT 17

#define	_VDAC_CMD_OPA0EN_DEFAULT 0x00000000UL

#define	_VDAC_CMD_OPA0EN_MASK 0x10000UL

#define	_VDAC_CMD_OPA0EN_SHIFT 16

#define	_VDAC_CMD_OPA1DIS_DEFAULT 0x00000000UL

#define	_VDAC_CMD_OPA1DIS_MASK 0x80000UL

#define	_VDAC_CMD_OPA1DIS_SHIFT 19

#define	_VDAC_CMD_OPA1EN_DEFAULT 0x00000000UL

#define	_VDAC_CMD_OPA1EN_MASK 0x40000UL

#define	_VDAC_CMD_OPA1EN_SHIFT 18

#define	_VDAC_CMD_RESETVALUE 0x00000000UL

#define	_VDAC_COMBDATA_CH0DATA_DEFAULT 0x00000800UL

#define	_VDAC_COMBDATA_CH0DATA_MASK 0xFFFUL

#define	_VDAC_COMBDATA_CH0DATA_SHIFT 0

#define	_VDAC_COMBDATA_CH1DATA_DEFAULT 0x00000800UL

#define	_VDAC_COMBDATA_CH1DATA_MASK 0xFFF0000UL

#define	_VDAC_COMBDATA_CH1DATA_SHIFT 16

#define	_VDAC_COMBDATA_MASK 0x0FFF0FFFUL

#define	_VDAC_COMBDATA_RESETVALUE 0x08000800UL

#define	_VDAC_CTRL_CH0PRESCRST_DEFAULT 0x00000000UL

#define	_VDAC_CTRL_CH0PRESCRST_MASK 0x40UL

#define	_VDAC_CTRL_CH0PRESCRST_SHIFT 6

#define	_VDAC_CTRL_DACCLKMODE_ASYNC 0x00000001UL

#define	_VDAC_CTRL_DACCLKMODE_DEFAULT 0x00000000UL

#define	_VDAC_CTRL_DACCLKMODE_MASK 0x80000000UL

#define	_VDAC_CTRL_DACCLKMODE_SHIFT 31

#define	_VDAC_CTRL_DACCLKMODE_SYNC 0x00000000UL

#define	_VDAC_CTRL_DIFF_DEFAULT 0x00000000UL

#define	_VDAC_CTRL_DIFF_MASK 0x1UL

#define	_VDAC_CTRL_DIFF_SHIFT 0

#define	_VDAC_CTRL_MASK 0x937F0771UL

#define	_VDAC_CTRL_OUTENPRS_DEFAULT 0x00000000UL

#define	_VDAC_CTRL_OUTENPRS_MASK 0x20UL

#define	_VDAC_CTRL_OUTENPRS_SHIFT 5

#define	_VDAC_CTRL_PRESC_DEFAULT 0x00000000UL

#define	_VDAC_CTRL_PRESC_MASK 0x7F0000UL

#define	_VDAC_CTRL_PRESC_NODIVISION 0x00000000UL

#define	_VDAC_CTRL_PRESC_SHIFT 16

#define	_VDAC_CTRL_REFRESHPERIOD_16CYCLES 0x00000001UL

#define	_VDAC_CTRL_REFRESHPERIOD_32CYCLES 0x00000002UL

#define	_VDAC_CTRL_REFRESHPERIOD_64CYCLES 0x00000003UL

#define	_VDAC_CTRL_REFRESHPERIOD_8CYCLES 0x00000000UL

#define	_VDAC_CTRL_REFRESHPERIOD_DEFAULT 0x00000000UL

#define	_VDAC_CTRL_REFRESHPERIOD_MASK 0x3000000UL

#define	_VDAC_CTRL_REFRESHPERIOD_SHIFT 24

#define	_VDAC_CTRL_REFSEL_1V25 0x00000002UL

#define	_VDAC_CTRL_REFSEL_1V25LN 0x00000000UL

#define	_VDAC_CTRL_REFSEL_2V5 0x00000003UL

#define	_VDAC_CTRL_REFSEL_2V5LN 0x00000001UL

#define	_VDAC_CTRL_REFSEL_DEFAULT 0x00000000UL

#define	_VDAC_CTRL_REFSEL_EXT 0x00000006UL

#define	_VDAC_CTRL_REFSEL_MASK 0x700UL

#define	_VDAC_CTRL_REFSEL_SHIFT 8

#define	_VDAC_CTRL_REFSEL_VDD 0x00000004UL

#define	_VDAC_CTRL_RESETVALUE 0x00000000UL

#define	_VDAC_CTRL_SINEMODE_DEFAULT 0x00000000UL

#define	_VDAC_CTRL_SINEMODE_MASK 0x10UL

#define	_VDAC_CTRL_SINEMODE_SHIFT 4

#define	_VDAC_CTRL_WARMUPMODE_DEFAULT 0x00000000UL

#define	_VDAC_CTRL_WARMUPMODE_KEEPINSTANDBY 0x00000001UL

#define	_VDAC_CTRL_WARMUPMODE_MASK 0x10000000UL

#define	_VDAC_CTRL_WARMUPMODE_NORMAL 0x00000000UL

#define	_VDAC_CTRL_WARMUPMODE_SHIFT 28

#define	_VDAC_IEN_CH0BL_DEFAULT 0x00000000UL

#define	_VDAC_IEN_CH0BL_MASK 0x40UL

#define	_VDAC_IEN_CH0BL_SHIFT 6

#define	_VDAC_IEN_CH0CD_DEFAULT 0x00000000UL

#define	_VDAC_IEN_CH0CD_MASK 0x1UL

#define	_VDAC_IEN_CH0CD_SHIFT 0

#define	_VDAC_IEN_CH0OF_DEFAULT 0x00000000UL

#define	_VDAC_IEN_CH0OF_MASK 0x4UL

#define	_VDAC_IEN_CH0OF_SHIFT 2

#define	_VDAC_IEN_CH0UF_DEFAULT 0x00000000UL

#define	_VDAC_IEN_CH0UF_MASK 0x10UL

#define	_VDAC_IEN_CH0UF_SHIFT 4

#define	_VDAC_IEN_CH1BL_DEFAULT 0x00000000UL

#define	_VDAC_IEN_CH1BL_MASK 0x80UL

#define	_VDAC_IEN_CH1BL_SHIFT 7

#define	_VDAC_IEN_CH1CD_DEFAULT 0x00000000UL

#define	_VDAC_IEN_CH1CD_MASK 0x2UL

#define	_VDAC_IEN_CH1CD_SHIFT 1

#define	_VDAC_IEN_CH1OF_DEFAULT 0x00000000UL

#define	_VDAC_IEN_CH1OF_MASK 0x8UL

#define	_VDAC_IEN_CH1OF_SHIFT 3

#define	_VDAC_IEN_CH1UF_DEFAULT 0x00000000UL

#define	_VDAC_IEN_CH1UF_MASK 0x20UL

#define	_VDAC_IEN_CH1UF_SHIFT 5

#define	_VDAC_IEN_EM23ERR_DEFAULT 0x00000000UL

#define	_VDAC_IEN_EM23ERR_MASK 0x8000UL

#define	_VDAC_IEN_EM23ERR_SHIFT 15

#define	_VDAC_IEN_MASK 0x303380FFUL

#define	_VDAC_IEN_OPA0APORTCONFLICT_DEFAULT 0x00000000UL

#define	_VDAC_IEN_OPA0APORTCONFLICT_MASK 0x10000UL

#define	_VDAC_IEN_OPA0APORTCONFLICT_SHIFT 16

#define	_VDAC_IEN_OPA0OUTVALID_DEFAULT 0x00000000UL

#define	_VDAC_IEN_OPA0OUTVALID_MASK 0x10000000UL

#define	_VDAC_IEN_OPA0OUTVALID_SHIFT 28

#define	_VDAC_IEN_OPA0PRSTIMEDERR_DEFAULT 0x00000000UL

#define	_VDAC_IEN_OPA0PRSTIMEDERR_MASK 0x100000UL

#define	_VDAC_IEN_OPA0PRSTIMEDERR_SHIFT 20

#define	_VDAC_IEN_OPA1APORTCONFLICT_DEFAULT 0x00000000UL

#define	_VDAC_IEN_OPA1APORTCONFLICT_MASK 0x20000UL

#define	_VDAC_IEN_OPA1APORTCONFLICT_SHIFT 17

#define	_VDAC_IEN_OPA1OUTVALID_DEFAULT 0x00000000UL

#define	_VDAC_IEN_OPA1OUTVALID_MASK 0x20000000UL

#define	_VDAC_IEN_OPA1OUTVALID_SHIFT 29

#define	_VDAC_IEN_OPA1PRSTIMEDERR_DEFAULT 0x00000000UL

#define	_VDAC_IEN_OPA1PRSTIMEDERR_MASK 0x200000UL

#define	_VDAC_IEN_OPA1PRSTIMEDERR_SHIFT 21

#define	_VDAC_IEN_RESETVALUE 0x00000000UL

#define	_VDAC_IF_CH0BL_DEFAULT 0x00000001UL

#define	_VDAC_IF_CH0BL_MASK 0x40UL

#define	_VDAC_IF_CH0BL_SHIFT 6

#define	_VDAC_IF_CH0CD_DEFAULT 0x00000000UL

#define	_VDAC_IF_CH0CD_MASK 0x1UL

#define	_VDAC_IF_CH0CD_SHIFT 0

#define	_VDAC_IF_CH0OF_DEFAULT 0x00000000UL

#define	_VDAC_IF_CH0OF_MASK 0x4UL

#define	_VDAC_IF_CH0OF_SHIFT 2

#define	_VDAC_IF_CH0UF_DEFAULT 0x00000000UL

#define	_VDAC_IF_CH0UF_MASK 0x10UL

#define	_VDAC_IF_CH0UF_SHIFT 4

#define	_VDAC_IF_CH1BL_DEFAULT 0x00000001UL

#define	_VDAC_IF_CH1BL_MASK 0x80UL

#define	_VDAC_IF_CH1BL_SHIFT 7

#define	_VDAC_IF_CH1CD_DEFAULT 0x00000000UL

#define	_VDAC_IF_CH1CD_MASK 0x2UL

#define	_VDAC_IF_CH1CD_SHIFT 1

#define	_VDAC_IF_CH1OF_DEFAULT 0x00000000UL

#define	_VDAC_IF_CH1OF_MASK 0x8UL

#define	_VDAC_IF_CH1OF_SHIFT 3

#define	_VDAC_IF_CH1UF_DEFAULT 0x00000000UL

#define	_VDAC_IF_CH1UF_MASK 0x20UL

#define	_VDAC_IF_CH1UF_SHIFT 5

#define	_VDAC_IF_EM23ERR_DEFAULT 0x00000000UL

#define	_VDAC_IF_EM23ERR_MASK 0x8000UL

#define	_VDAC_IF_EM23ERR_SHIFT 15

#define	_VDAC_IF_MASK 0x303380FFUL

#define	_VDAC_IF_OPA0APORTCONFLICT_DEFAULT 0x00000000UL

#define	_VDAC_IF_OPA0APORTCONFLICT_MASK 0x10000UL

#define	_VDAC_IF_OPA0APORTCONFLICT_SHIFT 16

#define	_VDAC_IF_OPA0OUTVALID_DEFAULT 0x00000000UL

#define	_VDAC_IF_OPA0OUTVALID_MASK 0x10000000UL

#define	_VDAC_IF_OPA0OUTVALID_SHIFT 28

#define	_VDAC_IF_OPA0PRSTIMEDERR_DEFAULT 0x00000000UL

#define	_VDAC_IF_OPA0PRSTIMEDERR_MASK 0x100000UL

#define	_VDAC_IF_OPA0PRSTIMEDERR_SHIFT 20

#define	_VDAC_IF_OPA1APORTCONFLICT_DEFAULT 0x00000000UL

#define	_VDAC_IF_OPA1APORTCONFLICT_MASK 0x20000UL

#define	_VDAC_IF_OPA1APORTCONFLICT_SHIFT 17

#define	_VDAC_IF_OPA1OUTVALID_DEFAULT 0x00000000UL

#define	_VDAC_IF_OPA1OUTVALID_MASK 0x20000000UL

#define	_VDAC_IF_OPA1OUTVALID_SHIFT 29

#define	_VDAC_IF_OPA1PRSTIMEDERR_DEFAULT 0x00000000UL

#define	_VDAC_IF_OPA1PRSTIMEDERR_MASK 0x200000UL

#define	_VDAC_IF_OPA1PRSTIMEDERR_SHIFT 21

#define	_VDAC_IF_RESETVALUE 0x000000C0UL

#define	_VDAC_IFC_CH0CD_DEFAULT 0x00000000UL

#define	_VDAC_IFC_CH0CD_MASK 0x1UL

#define	_VDAC_IFC_CH0CD_SHIFT 0

#define	_VDAC_IFC_CH0OF_DEFAULT 0x00000000UL

#define	_VDAC_IFC_CH0OF_MASK 0x4UL

#define	_VDAC_IFC_CH0OF_SHIFT 2

#define	_VDAC_IFC_CH0UF_DEFAULT 0x00000000UL

#define	_VDAC_IFC_CH0UF_MASK 0x10UL

#define	_VDAC_IFC_CH0UF_SHIFT 4

#define	_VDAC_IFC_CH1CD_DEFAULT 0x00000000UL

#define	_VDAC_IFC_CH1CD_MASK 0x2UL

#define	_VDAC_IFC_CH1CD_SHIFT 1

#define	_VDAC_IFC_CH1OF_DEFAULT 0x00000000UL

#define	_VDAC_IFC_CH1OF_MASK 0x8UL

#define	_VDAC_IFC_CH1OF_SHIFT 3

#define	_VDAC_IFC_CH1UF_DEFAULT 0x00000000UL

#define	_VDAC_IFC_CH1UF_MASK 0x20UL

#define	_VDAC_IFC_CH1UF_SHIFT 5

#define	_VDAC_IFC_EM23ERR_DEFAULT 0x00000000UL

#define	_VDAC_IFC_EM23ERR_MASK 0x8000UL

#define	_VDAC_IFC_EM23ERR_SHIFT 15

#define	_VDAC_IFC_MASK 0x3033803FUL

#define	_VDAC_IFC_OPA0APORTCONFLICT_DEFAULT 0x00000000UL

#define	_VDAC_IFC_OPA0APORTCONFLICT_MASK 0x10000UL

#define	_VDAC_IFC_OPA0APORTCONFLICT_SHIFT 16

#define	_VDAC_IFC_OPA0OUTVALID_DEFAULT 0x00000000UL

#define	_VDAC_IFC_OPA0OUTVALID_MASK 0x10000000UL

#define	_VDAC_IFC_OPA0OUTVALID_SHIFT 28

#define	_VDAC_IFC_OPA0PRSTIMEDERR_DEFAULT 0x00000000UL

#define	_VDAC_IFC_OPA0PRSTIMEDERR_MASK 0x100000UL

#define	_VDAC_IFC_OPA0PRSTIMEDERR_SHIFT 20

#define	_VDAC_IFC_OPA1APORTCONFLICT_DEFAULT 0x00000000UL

#define	_VDAC_IFC_OPA1APORTCONFLICT_MASK 0x20000UL

#define	_VDAC_IFC_OPA1APORTCONFLICT_SHIFT 17

#define	_VDAC_IFC_OPA1OUTVALID_DEFAULT 0x00000000UL

#define	_VDAC_IFC_OPA1OUTVALID_MASK 0x20000000UL

#define	_VDAC_IFC_OPA1OUTVALID_SHIFT 29

#define	_VDAC_IFC_OPA1PRSTIMEDERR_DEFAULT 0x00000000UL

#define	_VDAC_IFC_OPA1PRSTIMEDERR_MASK 0x200000UL

#define	_VDAC_IFC_OPA1PRSTIMEDERR_SHIFT 21

#define	_VDAC_IFC_RESETVALUE 0x00000000UL

#define	_VDAC_IFS_CH0CD_DEFAULT 0x00000000UL

#define	_VDAC_IFS_CH0CD_MASK 0x1UL

#define	_VDAC_IFS_CH0CD_SHIFT 0

#define	_VDAC_IFS_CH0OF_DEFAULT 0x00000000UL

#define	_VDAC_IFS_CH0OF_MASK 0x4UL

#define	_VDAC_IFS_CH0OF_SHIFT 2

#define	_VDAC_IFS_CH0UF_DEFAULT 0x00000000UL

#define	_VDAC_IFS_CH0UF_MASK 0x10UL

#define	_VDAC_IFS_CH0UF_SHIFT 4

#define	_VDAC_IFS_CH1CD_DEFAULT 0x00000000UL

#define	_VDAC_IFS_CH1CD_MASK 0x2UL

#define	_VDAC_IFS_CH1CD_SHIFT 1

#define	_VDAC_IFS_CH1OF_DEFAULT 0x00000000UL

#define	_VDAC_IFS_CH1OF_MASK 0x8UL

#define	_VDAC_IFS_CH1OF_SHIFT 3

#define	_VDAC_IFS_CH1UF_DEFAULT 0x00000000UL

#define	_VDAC_IFS_CH1UF_MASK 0x20UL

#define	_VDAC_IFS_CH1UF_SHIFT 5

#define	_VDAC_IFS_EM23ERR_DEFAULT 0x00000000UL

#define	_VDAC_IFS_EM23ERR_MASK 0x8000UL

#define	_VDAC_IFS_EM23ERR_SHIFT 15

#define	_VDAC_IFS_MASK 0x3033803FUL

#define	_VDAC_IFS_OPA0APORTCONFLICT_DEFAULT 0x00000000UL

#define	_VDAC_IFS_OPA0APORTCONFLICT_MASK 0x10000UL

#define	_VDAC_IFS_OPA0APORTCONFLICT_SHIFT 16

#define	_VDAC_IFS_OPA0OUTVALID_DEFAULT 0x00000000UL

#define	_VDAC_IFS_OPA0OUTVALID_MASK 0x10000000UL

#define	_VDAC_IFS_OPA0OUTVALID_SHIFT 28

#define	_VDAC_IFS_OPA0PRSTIMEDERR_DEFAULT 0x00000000UL

#define	_VDAC_IFS_OPA0PRSTIMEDERR_MASK 0x100000UL

#define	_VDAC_IFS_OPA0PRSTIMEDERR_SHIFT 20

#define	_VDAC_IFS_OPA1APORTCONFLICT_DEFAULT 0x00000000UL

#define	_VDAC_IFS_OPA1APORTCONFLICT_MASK 0x20000UL

#define	_VDAC_IFS_OPA1APORTCONFLICT_SHIFT 17

#define	_VDAC_IFS_OPA1OUTVALID_DEFAULT 0x00000000UL

#define	_VDAC_IFS_OPA1OUTVALID_MASK 0x20000000UL

#define	_VDAC_IFS_OPA1OUTVALID_SHIFT 29

#define	_VDAC_IFS_OPA1PRSTIMEDERR_DEFAULT 0x00000000UL

#define	_VDAC_IFS_OPA1PRSTIMEDERR_MASK 0x200000UL

#define	_VDAC_IFS_OPA1PRSTIMEDERR_SHIFT 21

#define	_VDAC_IFS_RESETVALUE 0x00000000UL

#define	_VDAC_OPA_APORTCONFLICT_APORT1XCONFLICT_DEFAULT 0x00000000UL

#define	_VDAC_OPA_APORTCONFLICT_APORT1XCONFLICT_MASK 0x4UL

#define	_VDAC_OPA_APORTCONFLICT_APORT1XCONFLICT_SHIFT 2

#define	_VDAC_OPA_APORTCONFLICT_APORT1YCONFLICT_DEFAULT 0x00000000UL

#define	_VDAC_OPA_APORTCONFLICT_APORT1YCONFLICT_MASK 0x8UL

#define	_VDAC_OPA_APORTCONFLICT_APORT1YCONFLICT_SHIFT 3

#define	_VDAC_OPA_APORTCONFLICT_APORT2XCONFLICT_DEFAULT 0x00000000UL

#define	_VDAC_OPA_APORTCONFLICT_APORT2XCONFLICT_MASK 0x10UL

#define	_VDAC_OPA_APORTCONFLICT_APORT2XCONFLICT_SHIFT 4

#define	_VDAC_OPA_APORTCONFLICT_APORT2YCONFLICT_DEFAULT 0x00000000UL

#define	_VDAC_OPA_APORTCONFLICT_APORT2YCONFLICT_MASK 0x20UL

#define	_VDAC_OPA_APORTCONFLICT_APORT2YCONFLICT_SHIFT 5

#define	_VDAC_OPA_APORTCONFLICT_APORT3XCONFLICT_DEFAULT 0x00000000UL

#define	_VDAC_OPA_APORTCONFLICT_APORT3XCONFLICT_MASK 0x40UL

#define	_VDAC_OPA_APORTCONFLICT_APORT3XCONFLICT_SHIFT 6

#define	_VDAC_OPA_APORTCONFLICT_APORT3YCONFLICT_DEFAULT 0x00000000UL

#define	_VDAC_OPA_APORTCONFLICT_APORT3YCONFLICT_MASK 0x80UL

#define	_VDAC_OPA_APORTCONFLICT_APORT3YCONFLICT_SHIFT 7

#define	_VDAC_OPA_APORTCONFLICT_APORT4XCONFLICT_DEFAULT 0x00000000UL

#define	_VDAC_OPA_APORTCONFLICT_APORT4XCONFLICT_MASK 0x100UL

#define	_VDAC_OPA_APORTCONFLICT_APORT4XCONFLICT_SHIFT 8

#define	_VDAC_OPA_APORTCONFLICT_APORT4YCONFLICT_DEFAULT 0x00000000UL

#define	_VDAC_OPA_APORTCONFLICT_APORT4YCONFLICT_MASK 0x200UL

#define	_VDAC_OPA_APORTCONFLICT_APORT4YCONFLICT_SHIFT 9

#define	_VDAC_OPA_APORTCONFLICT_MASK 0x000003FCUL

#define	_VDAC_OPA_APORTCONFLICT_RESETVALUE 0x00000000UL

#define	_VDAC_OPA_APORTREQ_APORT1XREQ_DEFAULT 0x00000000UL

#define	_VDAC_OPA_APORTREQ_APORT1XREQ_MASK 0x4UL

#define	_VDAC_OPA_APORTREQ_APORT1XREQ_SHIFT 2

#define	_VDAC_OPA_APORTREQ_APORT1YREQ_DEFAULT 0x00000000UL

#define	_VDAC_OPA_APORTREQ_APORT1YREQ_MASK 0x8UL

#define	_VDAC_OPA_APORTREQ_APORT1YREQ_SHIFT 3

#define	_VDAC_OPA_APORTREQ_APORT2XREQ_DEFAULT 0x00000000UL

#define	_VDAC_OPA_APORTREQ_APORT2XREQ_MASK 0x10UL

#define	_VDAC_OPA_APORTREQ_APORT2XREQ_SHIFT 4

#define	_VDAC_OPA_APORTREQ_APORT2YREQ_DEFAULT 0x00000000UL

#define	_VDAC_OPA_APORTREQ_APORT2YREQ_MASK 0x20UL

#define	_VDAC_OPA_APORTREQ_APORT2YREQ_SHIFT 5

#define	_VDAC_OPA_APORTREQ_APORT3XREQ_DEFAULT 0x00000000UL

#define	_VDAC_OPA_APORTREQ_APORT3XREQ_MASK 0x40UL

#define	_VDAC_OPA_APORTREQ_APORT3XREQ_SHIFT 6

#define	_VDAC_OPA_APORTREQ_APORT3YREQ_DEFAULT 0x00000000UL

#define	_VDAC_OPA_APORTREQ_APORT3YREQ_MASK 0x80UL

#define	_VDAC_OPA_APORTREQ_APORT3YREQ_SHIFT 7

#define	_VDAC_OPA_APORTREQ_APORT4XREQ_DEFAULT 0x00000000UL

#define	_VDAC_OPA_APORTREQ_APORT4XREQ_MASK 0x100UL

#define	_VDAC_OPA_APORTREQ_APORT4XREQ_SHIFT 8

#define	_VDAC_OPA_APORTREQ_APORT4YREQ_DEFAULT 0x00000000UL

#define	_VDAC_OPA_APORTREQ_APORT4YREQ_MASK 0x200UL

#define	_VDAC_OPA_APORTREQ_APORT4YREQ_SHIFT 9

#define	_VDAC_OPA_APORTREQ_MASK 0x000003FCUL

#define	_VDAC_OPA_APORTREQ_RESETVALUE 0x00000000UL

#define	_VDAC_OPA_CAL_CM1_DEFAULT 0x00000007UL

#define	_VDAC_OPA_CAL_CM1_MASK 0xFUL

#define	_VDAC_OPA_CAL_CM1_SHIFT 0

#define	_VDAC_OPA_CAL_CM2_DEFAULT 0x00000007UL

#define	_VDAC_OPA_CAL_CM2_MASK 0x1E0UL

#define	_VDAC_OPA_CAL_CM2_SHIFT 5

#define	_VDAC_OPA_CAL_CM3_DEFAULT 0x00000000UL

#define	_VDAC_OPA_CAL_CM3_MASK 0xC00UL

#define	_VDAC_OPA_CAL_CM3_SHIFT 10

#define	_VDAC_OPA_CAL_GM3_DEFAULT 0x00000000UL

#define	_VDAC_OPA_CAL_GM3_MASK 0x60000UL

#define	_VDAC_OPA_CAL_GM3_SHIFT 17

#define	_VDAC_OPA_CAL_GM_DEFAULT 0x00000004UL

#define	_VDAC_OPA_CAL_GM_MASK 0xE000UL

#define	_VDAC_OPA_CAL_GM_SHIFT 13

#define	_VDAC_OPA_CAL_MASK 0x7DF6EDEFUL

#define	_VDAC_OPA_CAL_OFFSETN_DEFAULT 0x00000000UL

#define	_VDAC_OPA_CAL_OFFSETN_MASK 0x7C000000UL

#define	_VDAC_OPA_CAL_OFFSETN_SHIFT 26

#define	_VDAC_OPA_CAL_OFFSETP_DEFAULT 0x00000000UL

#define	_VDAC_OPA_CAL_OFFSETP_MASK 0x1F00000UL

#define	_VDAC_OPA_CAL_OFFSETP_SHIFT 20

#define	_VDAC_OPA_CAL_RESETVALUE 0x000080E7UL

#define	_VDAC_OPA_CTRL_APORTXMASTERDIS_DEFAULT 0x00000000UL

#define	_VDAC_OPA_CTRL_APORTXMASTERDIS_MASK 0x100000UL

#define	_VDAC_OPA_CTRL_APORTXMASTERDIS_SHIFT 20

#define	_VDAC_OPA_CTRL_APORTYMASTERDIS_DEFAULT 0x00000000UL

#define	_VDAC_OPA_CTRL_APORTYMASTERDIS_MASK 0x200000UL

#define	_VDAC_OPA_CTRL_APORTYMASTERDIS_SHIFT 21

#define	_VDAC_OPA_CTRL_DRIVESTRENGTH_DEFAULT 0x00000002UL

#define	_VDAC_OPA_CTRL_DRIVESTRENGTH_MASK 0x3UL

#define	_VDAC_OPA_CTRL_DRIVESTRENGTH_SHIFT 0

#define	_VDAC_OPA_CTRL_HCMDIS_DEFAULT 0x00000001UL

#define	_VDAC_OPA_CTRL_HCMDIS_MASK 0x8UL

#define	_VDAC_OPA_CTRL_HCMDIS_SHIFT 3

#define	_VDAC_OPA_CTRL_INCBW_DEFAULT 0x00000001UL

#define	_VDAC_OPA_CTRL_INCBW_MASK 0x4UL

#define	_VDAC_OPA_CTRL_INCBW_SHIFT 2

#define	_VDAC_OPA_CTRL_MASK 0x00313F1FUL

#define	_VDAC_OPA_CTRL_OUTSCALE_DEFAULT 0x00000000UL

#define	_VDAC_OPA_CTRL_OUTSCALE_FULL 0x00000000UL

#define	_VDAC_OPA_CTRL_OUTSCALE_HALF 0x00000001UL

#define	_VDAC_OPA_CTRL_OUTSCALE_MASK 0x10UL

#define	_VDAC_OPA_CTRL_OUTSCALE_SHIFT 4

#define	_VDAC_OPA_CTRL_PRSEN_DEFAULT 0x00000000UL

#define	_VDAC_OPA_CTRL_PRSEN_MASK 0x100UL

#define	_VDAC_OPA_CTRL_PRSEN_SHIFT 8

#define	_VDAC_OPA_CTRL_PRSMODE_DEFAULT 0x00000000UL

#define	_VDAC_OPA_CTRL_PRSMODE_MASK 0x200UL

#define	_VDAC_OPA_CTRL_PRSMODE_PULSED 0x00000000UL

#define	_VDAC_OPA_CTRL_PRSMODE_SHIFT 9

#define	_VDAC_OPA_CTRL_PRSMODE_TIMED 0x00000001UL

#define	_VDAC_OPA_CTRL_PRSOUTMODE_DEFAULT 0x00000000UL

#define	_VDAC_OPA_CTRL_PRSOUTMODE_MASK 0x10000UL

#define	_VDAC_OPA_CTRL_PRSOUTMODE_OUTVALID 0x00000001UL

#define	_VDAC_OPA_CTRL_PRSOUTMODE_SHIFT 16

#define	_VDAC_OPA_CTRL_PRSOUTMODE_WARM 0x00000000UL

#define	_VDAC_OPA_CTRL_PRSSEL_DEFAULT 0x00000000UL

#define	_VDAC_OPA_CTRL_PRSSEL_MASK 0x3C00UL

#define	_VDAC_OPA_CTRL_PRSSEL_PRSCH0 0x00000000UL

#define	_VDAC_OPA_CTRL_PRSSEL_PRSCH1 0x00000001UL

#define	_VDAC_OPA_CTRL_PRSSEL_PRSCH10 0x0000000AUL

#define	_VDAC_OPA_CTRL_PRSSEL_PRSCH11 0x0000000BUL

#define	_VDAC_OPA_CTRL_PRSSEL_PRSCH2 0x00000002UL

#define	_VDAC_OPA_CTRL_PRSSEL_PRSCH3 0x00000003UL

#define	_VDAC_OPA_CTRL_PRSSEL_PRSCH4 0x00000004UL

#define	_VDAC_OPA_CTRL_PRSSEL_PRSCH5 0x00000005UL

#define	_VDAC_OPA_CTRL_PRSSEL_PRSCH6 0x00000006UL

#define	_VDAC_OPA_CTRL_PRSSEL_PRSCH7 0x00000007UL

#define	_VDAC_OPA_CTRL_PRSSEL_PRSCH8 0x00000008UL

#define	_VDAC_OPA_CTRL_PRSSEL_PRSCH9 0x00000009UL

#define	_VDAC_OPA_CTRL_PRSSEL_SHIFT 10

#define	_VDAC_OPA_CTRL_RESETVALUE 0x0000000EUL

#define	_VDAC_OPA_MUX_GAIN3X_DEFAULT 0x00000001UL

#define	_VDAC_OPA_MUX_GAIN3X_MASK 0x100000UL

#define	_VDAC_OPA_MUX_GAIN3X_SHIFT 20

#define	_VDAC_OPA_MUX_MASK 0x0717FFFFUL

#define	_VDAC_OPA_MUX_NEGSEL_APORT1YCH1 0x00000030UL

#define	_VDAC_OPA_MUX_NEGSEL_APORT1YCH11 0x00000035UL

#define	_VDAC_OPA_MUX_NEGSEL_APORT1YCH13 0x00000036UL

#define	_VDAC_OPA_MUX_NEGSEL_APORT1YCH15 0x00000037UL

#define	_VDAC_OPA_MUX_NEGSEL_APORT1YCH17 0x00000038UL

#define	_VDAC_OPA_MUX_NEGSEL_APORT1YCH19 0x00000039UL

#define	_VDAC_OPA_MUX_NEGSEL_APORT1YCH21 0x0000003AUL

#define	_VDAC_OPA_MUX_NEGSEL_APORT1YCH23 0x0000003BUL

#define	_VDAC_OPA_MUX_NEGSEL_APORT1YCH25 0x0000003CUL

#define	_VDAC_OPA_MUX_NEGSEL_APORT1YCH27 0x0000003DUL

#define	_VDAC_OPA_MUX_NEGSEL_APORT1YCH29 0x0000003EUL

#define	_VDAC_OPA_MUX_NEGSEL_APORT1YCH3 0x00000031UL

#define	_VDAC_OPA_MUX_NEGSEL_APORT1YCH31 0x0000003FUL

#define	_VDAC_OPA_MUX_NEGSEL_APORT1YCH5 0x00000032UL

#define	_VDAC_OPA_MUX_NEGSEL_APORT1YCH7 0x00000033UL

#define	_VDAC_OPA_MUX_NEGSEL_APORT1YCH9 0x00000034UL

#define	_VDAC_OPA_MUX_NEGSEL_APORT2YCH0 0x00000050UL

#define	_VDAC_OPA_MUX_NEGSEL_APORT2YCH10 0x00000055UL

#define	_VDAC_OPA_MUX_NEGSEL_APORT2YCH12 0x00000056UL

#define	_VDAC_OPA_MUX_NEGSEL_APORT2YCH14 0x00000057UL

#define	_VDAC_OPA_MUX_NEGSEL_APORT2YCH16 0x00000058UL

#define	_VDAC_OPA_MUX_NEGSEL_APORT2YCH18 0x00000059UL

#define	_VDAC_OPA_MUX_NEGSEL_APORT2YCH2 0x00000051UL

#define	_VDAC_OPA_MUX_NEGSEL_APORT2YCH20 0x0000005AUL

#define	_VDAC_OPA_MUX_NEGSEL_APORT2YCH22 0x0000005BUL

#define	_VDAC_OPA_MUX_NEGSEL_APORT2YCH24 0x0000005CUL

#define	_VDAC_OPA_MUX_NEGSEL_APORT2YCH26 0x0000005DUL

#define	_VDAC_OPA_MUX_NEGSEL_APORT2YCH28 0x0000005EUL

#define	_VDAC_OPA_MUX_NEGSEL_APORT2YCH30 0x0000005FUL

#define	_VDAC_OPA_MUX_NEGSEL_APORT2YCH4 0x00000052UL

#define	_VDAC_OPA_MUX_NEGSEL_APORT2YCH6 0x00000053UL

#define	_VDAC_OPA_MUX_NEGSEL_APORT2YCH8 0x00000054UL

#define	_VDAC_OPA_MUX_NEGSEL_APORT3YCH1 0x00000070UL

#define	_VDAC_OPA_MUX_NEGSEL_APORT3YCH11 0x00000075UL

#define	_VDAC_OPA_MUX_NEGSEL_APORT3YCH13 0x00000076UL

#define	_VDAC_OPA_MUX_NEGSEL_APORT3YCH15 0x00000077UL

#define	_VDAC_OPA_MUX_NEGSEL_APORT3YCH17 0x00000078UL

#define	_VDAC_OPA_MUX_NEGSEL_APORT3YCH19 0x00000079UL

#define	_VDAC_OPA_MUX_NEGSEL_APORT3YCH21 0x0000007AUL

#define	_VDAC_OPA_MUX_NEGSEL_APORT3YCH23 0x0000007BUL

#define	_VDAC_OPA_MUX_NEGSEL_APORT3YCH25 0x0000007CUL

#define	_VDAC_OPA_MUX_NEGSEL_APORT3YCH27 0x0000007DUL

#define	_VDAC_OPA_MUX_NEGSEL_APORT3YCH29 0x0000007EUL

#define	_VDAC_OPA_MUX_NEGSEL_APORT3YCH3 0x00000071UL

#define	_VDAC_OPA_MUX_NEGSEL_APORT3YCH31 0x0000007FUL

#define	_VDAC_OPA_MUX_NEGSEL_APORT3YCH5 0x00000072UL

#define	_VDAC_OPA_MUX_NEGSEL_APORT3YCH7 0x00000073UL

#define	_VDAC_OPA_MUX_NEGSEL_APORT3YCH9 0x00000074UL

#define	_VDAC_OPA_MUX_NEGSEL_APORT4YCH0 0x00000090UL

#define	_VDAC_OPA_MUX_NEGSEL_APORT4YCH10 0x00000095UL

#define	_VDAC_OPA_MUX_NEGSEL_APORT4YCH12 0x00000096UL

#define	_VDAC_OPA_MUX_NEGSEL_APORT4YCH14 0x00000097UL

#define	_VDAC_OPA_MUX_NEGSEL_APORT4YCH16 0x00000098UL

#define	_VDAC_OPA_MUX_NEGSEL_APORT4YCH18 0x00000099UL

#define	_VDAC_OPA_MUX_NEGSEL_APORT4YCH2 0x00000091UL

#define	_VDAC_OPA_MUX_NEGSEL_APORT4YCH20 0x0000009AUL

#define	_VDAC_OPA_MUX_NEGSEL_APORT4YCH22 0x0000009BUL

#define	_VDAC_OPA_MUX_NEGSEL_APORT4YCH24 0x0000009CUL

#define	_VDAC_OPA_MUX_NEGSEL_APORT4YCH26 0x0000009DUL

#define	_VDAC_OPA_MUX_NEGSEL_APORT4YCH28 0x0000009EUL

#define	_VDAC_OPA_MUX_NEGSEL_APORT4YCH30 0x0000009FUL

#define	_VDAC_OPA_MUX_NEGSEL_APORT4YCH4 0x00000092UL

#define	_VDAC_OPA_MUX_NEGSEL_APORT4YCH6 0x00000093UL

#define	_VDAC_OPA_MUX_NEGSEL_APORT4YCH8 0x00000094UL

#define	_VDAC_OPA_MUX_NEGSEL_DEFAULT 0x000000F2UL

#define	_VDAC_OPA_MUX_NEGSEL_DISABLE 0x000000F0UL

#define	_VDAC_OPA_MUX_NEGSEL_MASK 0xFF00UL

#define	_VDAC_OPA_MUX_NEGSEL_NEGPAD 0x000000F3UL

#define	_VDAC_OPA_MUX_NEGSEL_OPATAP 0x000000F2UL

#define	_VDAC_OPA_MUX_NEGSEL_SHIFT 8

#define	_VDAC_OPA_MUX_NEGSEL_UG 0x000000F1UL

#define	_VDAC_OPA_MUX_POSSEL_APORT1XCH0 0x00000020UL

#define	_VDAC_OPA_MUX_POSSEL_APORT1XCH10 0x00000025UL

#define	_VDAC_OPA_MUX_POSSEL_APORT1XCH12 0x00000026UL

#define	_VDAC_OPA_MUX_POSSEL_APORT1XCH14 0x00000027UL

#define	_VDAC_OPA_MUX_POSSEL_APORT1XCH16 0x00000028UL

#define	_VDAC_OPA_MUX_POSSEL_APORT1XCH18 0x00000029UL

#define	_VDAC_OPA_MUX_POSSEL_APORT1XCH2 0x00000021UL

#define	_VDAC_OPA_MUX_POSSEL_APORT1XCH20 0x0000002AUL

#define	_VDAC_OPA_MUX_POSSEL_APORT1XCH22 0x0000002BUL

#define	_VDAC_OPA_MUX_POSSEL_APORT1XCH24 0x0000002CUL

#define	_VDAC_OPA_MUX_POSSEL_APORT1XCH26 0x0000002DUL

#define	_VDAC_OPA_MUX_POSSEL_APORT1XCH28 0x0000002EUL

#define	_VDAC_OPA_MUX_POSSEL_APORT1XCH30 0x0000002FUL

#define	_VDAC_OPA_MUX_POSSEL_APORT1XCH4 0x00000022UL

#define	_VDAC_OPA_MUX_POSSEL_APORT1XCH6 0x00000023UL

#define	_VDAC_OPA_MUX_POSSEL_APORT1XCH8 0x00000024UL

#define	_VDAC_OPA_MUX_POSSEL_APORT2XCH1 0x00000040UL

#define	_VDAC_OPA_MUX_POSSEL_APORT2XCH11 0x00000045UL

#define	_VDAC_OPA_MUX_POSSEL_APORT2XCH13 0x00000046UL

#define	_VDAC_OPA_MUX_POSSEL_APORT2XCH15 0x00000047UL

#define	_VDAC_OPA_MUX_POSSEL_APORT2XCH17 0x00000048UL

#define	_VDAC_OPA_MUX_POSSEL_APORT2XCH19 0x00000049UL

#define	_VDAC_OPA_MUX_POSSEL_APORT2XCH21 0x0000004AUL

#define	_VDAC_OPA_MUX_POSSEL_APORT2XCH23 0x0000004BUL

#define	_VDAC_OPA_MUX_POSSEL_APORT2XCH25 0x0000004CUL

#define	_VDAC_OPA_MUX_POSSEL_APORT2XCH27 0x0000004DUL

#define	_VDAC_OPA_MUX_POSSEL_APORT2XCH29 0x0000004EUL

#define	_VDAC_OPA_MUX_POSSEL_APORT2XCH3 0x00000041UL

#define	_VDAC_OPA_MUX_POSSEL_APORT2XCH31 0x0000004FUL

#define	_VDAC_OPA_MUX_POSSEL_APORT2XCH5 0x00000042UL

#define	_VDAC_OPA_MUX_POSSEL_APORT2XCH7 0x00000043UL

#define	_VDAC_OPA_MUX_POSSEL_APORT2XCH9 0x00000044UL

#define	_VDAC_OPA_MUX_POSSEL_APORT3XCH0 0x00000060UL

#define	_VDAC_OPA_MUX_POSSEL_APORT3XCH10 0x00000065UL

#define	_VDAC_OPA_MUX_POSSEL_APORT3XCH12 0x00000066UL

#define	_VDAC_OPA_MUX_POSSEL_APORT3XCH14 0x00000067UL

#define	_VDAC_OPA_MUX_POSSEL_APORT3XCH16 0x00000068UL

#define	_VDAC_OPA_MUX_POSSEL_APORT3XCH18 0x00000069UL

#define	_VDAC_OPA_MUX_POSSEL_APORT3XCH2 0x00000061UL

#define	_VDAC_OPA_MUX_POSSEL_APORT3XCH20 0x0000006AUL

#define	_VDAC_OPA_MUX_POSSEL_APORT3XCH22 0x0000006BUL

#define	_VDAC_OPA_MUX_POSSEL_APORT3XCH24 0x0000006CUL

#define	_VDAC_OPA_MUX_POSSEL_APORT3XCH26 0x0000006DUL

#define	_VDAC_OPA_MUX_POSSEL_APORT3XCH28 0x0000006EUL

#define	_VDAC_OPA_MUX_POSSEL_APORT3XCH30 0x0000006FUL

#define	_VDAC_OPA_MUX_POSSEL_APORT3XCH4 0x00000062UL

#define	_VDAC_OPA_MUX_POSSEL_APORT3XCH6 0x00000063UL

#define	_VDAC_OPA_MUX_POSSEL_APORT3XCH8 0x00000064UL

#define	_VDAC_OPA_MUX_POSSEL_APORT4XCH1 0x00000080UL

#define	_VDAC_OPA_MUX_POSSEL_APORT4XCH11 0x00000085UL

#define	_VDAC_OPA_MUX_POSSEL_APORT4XCH13 0x00000086UL

#define	_VDAC_OPA_MUX_POSSEL_APORT4XCH15 0x00000087UL

#define	_VDAC_OPA_MUX_POSSEL_APORT4XCH17 0x00000088UL

#define	_VDAC_OPA_MUX_POSSEL_APORT4XCH19 0x00000089UL

#define	_VDAC_OPA_MUX_POSSEL_APORT4XCH21 0x0000008AUL

#define	_VDAC_OPA_MUX_POSSEL_APORT4XCH23 0x0000008BUL

#define	_VDAC_OPA_MUX_POSSEL_APORT4XCH25 0x0000008CUL

#define	_VDAC_OPA_MUX_POSSEL_APORT4XCH27 0x0000008DUL

#define	_VDAC_OPA_MUX_POSSEL_APORT4XCH29 0x0000008EUL

#define	_VDAC_OPA_MUX_POSSEL_APORT4XCH3 0x00000081UL

#define	_VDAC_OPA_MUX_POSSEL_APORT4XCH31 0x0000008FUL

#define	_VDAC_OPA_MUX_POSSEL_APORT4XCH5 0x00000082UL

#define	_VDAC_OPA_MUX_POSSEL_APORT4XCH7 0x00000083UL

#define	_VDAC_OPA_MUX_POSSEL_APORT4XCH9 0x00000084UL

#define	_VDAC_OPA_MUX_POSSEL_DAC 0x000000F1UL

#define	_VDAC_OPA_MUX_POSSEL_DEFAULT 0x000000F1UL

#define	_VDAC_OPA_MUX_POSSEL_DISABLE 0x000000F0UL

#define	_VDAC_OPA_MUX_POSSEL_MASK 0xFFUL

#define	_VDAC_OPA_MUX_POSSEL_OPANEXT 0x000000F3UL

#define	_VDAC_OPA_MUX_POSSEL_OPATAP 0x000000F4UL

#define	_VDAC_OPA_MUX_POSSEL_POSPAD 0x000000F2UL

#define	_VDAC_OPA_MUX_POSSEL_SHIFT 0

#define	_VDAC_OPA_MUX_RESETVALUE 0x0016F2F1UL

#define	_VDAC_OPA_MUX_RESINMUX_CENTER 0x00000005UL

#define	_VDAC_OPA_MUX_RESINMUX_COMPAD 0x00000004UL

#define	_VDAC_OPA_MUX_RESINMUX_DEFAULT 0x00000006UL

#define	_VDAC_OPA_MUX_RESINMUX_DISABLE 0x00000000UL

#define	_VDAC_OPA_MUX_RESINMUX_MASK 0x70000UL

#define	_VDAC_OPA_MUX_RESINMUX_NEGPAD 0x00000002UL

#define	_VDAC_OPA_MUX_RESINMUX_OPANEXT 0x00000001UL

#define	_VDAC_OPA_MUX_RESINMUX_POSPAD 0x00000003UL

#define	_VDAC_OPA_MUX_RESINMUX_SHIFT 16

#define	_VDAC_OPA_MUX_RESINMUX_VSS 0x00000006UL

#define	_VDAC_OPA_MUX_RESSEL_DEFAULT 0x00000000UL

#define	_VDAC_OPA_MUX_RESSEL_MASK 0x7000000UL

#define	_VDAC_OPA_MUX_RESSEL_RES0 0x00000000UL

#define	_VDAC_OPA_MUX_RESSEL_RES1 0x00000001UL

#define	_VDAC_OPA_MUX_RESSEL_RES2 0x00000002UL

#define	_VDAC_OPA_MUX_RESSEL_RES3 0x00000003UL

#define	_VDAC_OPA_MUX_RESSEL_RES4 0x00000004UL

#define	_VDAC_OPA_MUX_RESSEL_RES5 0x00000005UL

#define	_VDAC_OPA_MUX_RESSEL_RES6 0x00000006UL

#define	_VDAC_OPA_MUX_RESSEL_RES7 0x00000007UL

#define	_VDAC_OPA_MUX_RESSEL_SHIFT 24

#define	_VDAC_OPA_OUT_ALTOUTEN_DEFAULT 0x00000000UL

#define	_VDAC_OPA_OUT_ALTOUTEN_MASK 0x2UL

#define	_VDAC_OPA_OUT_ALTOUTEN_SHIFT 1

#define	_VDAC_OPA_OUT_ALTOUTPADEN_DEFAULT 0x00000000UL

#define	_VDAC_OPA_OUT_ALTOUTPADEN_MASK 0x1F0UL

#define	_VDAC_OPA_OUT_ALTOUTPADEN_OUT0 0x00000001UL

#define	_VDAC_OPA_OUT_ALTOUTPADEN_OUT1 0x00000002UL

#define	_VDAC_OPA_OUT_ALTOUTPADEN_OUT2 0x00000004UL

#define	_VDAC_OPA_OUT_ALTOUTPADEN_OUT3 0x00000008UL

#define	_VDAC_OPA_OUT_ALTOUTPADEN_OUT4 0x00000010UL

#define	_VDAC_OPA_OUT_ALTOUTPADEN_SHIFT 4

#define	_VDAC_OPA_OUT_APORTOUTEN_DEFAULT 0x00000000UL

#define	_VDAC_OPA_OUT_APORTOUTEN_MASK 0x4UL

#define	_VDAC_OPA_OUT_APORTOUTEN_SHIFT 2

#define	_VDAC_OPA_OUT_APORTOUTSEL_APORT1YCH1 0x00000030UL

#define	_VDAC_OPA_OUT_APORTOUTSEL_APORT1YCH11 0x00000035UL

#define	_VDAC_OPA_OUT_APORTOUTSEL_APORT1YCH13 0x00000036UL

#define	_VDAC_OPA_OUT_APORTOUTSEL_APORT1YCH15 0x00000037UL

#define	_VDAC_OPA_OUT_APORTOUTSEL_APORT1YCH17 0x00000038UL

#define	_VDAC_OPA_OUT_APORTOUTSEL_APORT1YCH19 0x00000039UL

#define	_VDAC_OPA_OUT_APORTOUTSEL_APORT1YCH21 0x0000003AUL

#define	_VDAC_OPA_OUT_APORTOUTSEL_APORT1YCH23 0x0000003BUL

#define	_VDAC_OPA_OUT_APORTOUTSEL_APORT1YCH25 0x0000003CUL

#define	_VDAC_OPA_OUT_APORTOUTSEL_APORT1YCH27 0x0000003DUL

#define	_VDAC_OPA_OUT_APORTOUTSEL_APORT1YCH29 0x0000003EUL

#define	_VDAC_OPA_OUT_APORTOUTSEL_APORT1YCH3 0x00000031UL

#define	_VDAC_OPA_OUT_APORTOUTSEL_APORT1YCH31 0x0000003FUL

#define	_VDAC_OPA_OUT_APORTOUTSEL_APORT1YCH5 0x00000032UL

#define	_VDAC_OPA_OUT_APORTOUTSEL_APORT1YCH7 0x00000033UL

#define	_VDAC_OPA_OUT_APORTOUTSEL_APORT1YCH9 0x00000034UL

#define	_VDAC_OPA_OUT_APORTOUTSEL_APORT2YCH0 0x00000050UL

#define	_VDAC_OPA_OUT_APORTOUTSEL_APORT2YCH10 0x00000055UL

#define	_VDAC_OPA_OUT_APORTOUTSEL_APORT2YCH12 0x00000056UL

#define	_VDAC_OPA_OUT_APORTOUTSEL_APORT2YCH14 0x00000057UL

#define	_VDAC_OPA_OUT_APORTOUTSEL_APORT2YCH16 0x00000058UL

#define	_VDAC_OPA_OUT_APORTOUTSEL_APORT2YCH18 0x00000059UL

#define	_VDAC_OPA_OUT_APORTOUTSEL_APORT2YCH2 0x00000051UL

#define	_VDAC_OPA_OUT_APORTOUTSEL_APORT2YCH20 0x0000005AUL

#define	_VDAC_OPA_OUT_APORTOUTSEL_APORT2YCH22 0x0000005BUL

#define	_VDAC_OPA_OUT_APORTOUTSEL_APORT2YCH24 0x0000005CUL

#define	_VDAC_OPA_OUT_APORTOUTSEL_APORT2YCH26 0x0000005DUL

#define	_VDAC_OPA_OUT_APORTOUTSEL_APORT2YCH28 0x0000005EUL

#define	_VDAC_OPA_OUT_APORTOUTSEL_APORT2YCH30 0x0000005FUL

#define	_VDAC_OPA_OUT_APORTOUTSEL_APORT2YCH4 0x00000052UL

#define	_VDAC_OPA_OUT_APORTOUTSEL_APORT2YCH6 0x00000053UL

#define	_VDAC_OPA_OUT_APORTOUTSEL_APORT2YCH8 0x00000054UL

#define	_VDAC_OPA_OUT_APORTOUTSEL_APORT3YCH1 0x00000070UL

#define	_VDAC_OPA_OUT_APORTOUTSEL_APORT3YCH11 0x00000075UL

#define	_VDAC_OPA_OUT_APORTOUTSEL_APORT3YCH13 0x00000076UL

#define	_VDAC_OPA_OUT_APORTOUTSEL_APORT3YCH15 0x00000077UL

#define	_VDAC_OPA_OUT_APORTOUTSEL_APORT3YCH17 0x00000078UL

#define	_VDAC_OPA_OUT_APORTOUTSEL_APORT3YCH19 0x00000079UL

#define	_VDAC_OPA_OUT_APORTOUTSEL_APORT3YCH21 0x0000007AUL

#define	_VDAC_OPA_OUT_APORTOUTSEL_APORT3YCH23 0x0000007BUL

#define	_VDAC_OPA_OUT_APORTOUTSEL_APORT3YCH25 0x0000007CUL

#define	_VDAC_OPA_OUT_APORTOUTSEL_APORT3YCH27 0x0000007DUL

#define	_VDAC_OPA_OUT_APORTOUTSEL_APORT3YCH29 0x0000007EUL

#define	_VDAC_OPA_OUT_APORTOUTSEL_APORT3YCH3 0x00000071UL

#define	_VDAC_OPA_OUT_APORTOUTSEL_APORT3YCH31 0x0000007FUL

#define	_VDAC_OPA_OUT_APORTOUTSEL_APORT3YCH5 0x00000072UL

#define	_VDAC_OPA_OUT_APORTOUTSEL_APORT3YCH7 0x00000073UL

#define	_VDAC_OPA_OUT_APORTOUTSEL_APORT3YCH9 0x00000074UL

#define	_VDAC_OPA_OUT_APORTOUTSEL_APORT4YCH0 0x00000090UL

#define	_VDAC_OPA_OUT_APORTOUTSEL_APORT4YCH10 0x00000095UL

#define	_VDAC_OPA_OUT_APORTOUTSEL_APORT4YCH12 0x00000096UL

#define	_VDAC_OPA_OUT_APORTOUTSEL_APORT4YCH14 0x00000097UL

#define	_VDAC_OPA_OUT_APORTOUTSEL_APORT4YCH16 0x00000098UL

#define	_VDAC_OPA_OUT_APORTOUTSEL_APORT4YCH18 0x00000099UL

#define	_VDAC_OPA_OUT_APORTOUTSEL_APORT4YCH2 0x00000091UL

#define	_VDAC_OPA_OUT_APORTOUTSEL_APORT4YCH20 0x0000009AUL

#define	_VDAC_OPA_OUT_APORTOUTSEL_APORT4YCH22 0x0000009BUL

#define	_VDAC_OPA_OUT_APORTOUTSEL_APORT4YCH24 0x0000009CUL

#define	_VDAC_OPA_OUT_APORTOUTSEL_APORT4YCH26 0x0000009DUL

#define	_VDAC_OPA_OUT_APORTOUTSEL_APORT4YCH28 0x0000009EUL

#define	_VDAC_OPA_OUT_APORTOUTSEL_APORT4YCH30 0x0000009FUL

#define	_VDAC_OPA_OUT_APORTOUTSEL_APORT4YCH4 0x00000092UL

#define	_VDAC_OPA_OUT_APORTOUTSEL_APORT4YCH6 0x00000093UL

#define	_VDAC_OPA_OUT_APORTOUTSEL_APORT4YCH8 0x00000094UL

#define	_VDAC_OPA_OUT_APORTOUTSEL_DEFAULT 0x00000000UL

#define	_VDAC_OPA_OUT_APORTOUTSEL_MASK 0xFF0000UL

#define	_VDAC_OPA_OUT_APORTOUTSEL_SHIFT 16

#define	_VDAC_OPA_OUT_MAINOUTEN_DEFAULT 0x00000001UL

#define	_VDAC_OPA_OUT_MAINOUTEN_MASK 0x1UL

#define	_VDAC_OPA_OUT_MAINOUTEN_SHIFT 0

#define	_VDAC_OPA_OUT_MASK 0x00FF01FFUL

#define	_VDAC_OPA_OUT_RESETVALUE 0x00000001UL

#define	_VDAC_OPA_OUT_SHORT_DEFAULT 0x00000000UL

#define	_VDAC_OPA_OUT_SHORT_MASK 0x8UL

#define	_VDAC_OPA_OUT_SHORT_SHIFT 3

#define	_VDAC_OPA_TIMER_MASK 0x03FF7F3FUL

#define	_VDAC_OPA_TIMER_RESETVALUE 0x00010700UL

#define	_VDAC_OPA_TIMER_SETTLETIME_DEFAULT 0x00000001UL

#define	_VDAC_OPA_TIMER_SETTLETIME_MASK 0x3FF0000UL

#define	_VDAC_OPA_TIMER_SETTLETIME_SHIFT 16

#define	_VDAC_OPA_TIMER_STARTUPDLY_DEFAULT 0x00000000UL

#define	_VDAC_OPA_TIMER_STARTUPDLY_MASK 0x3FUL

#define	_VDAC_OPA_TIMER_STARTUPDLY_SHIFT 0

#define	_VDAC_OPA_TIMER_WARMUPTIME_DEFAULT 0x00000007UL

#define	_VDAC_OPA_TIMER_WARMUPTIME_MASK 0x7F00UL

#define	_VDAC_OPA_TIMER_WARMUPTIME_SHIFT 8

#define	_VDAC_STATUS_CH0BL_DEFAULT 0x00000001UL

#define	_VDAC_STATUS_CH0BL_MASK 0x4UL

#define	_VDAC_STATUS_CH0BL_SHIFT 2

#define	_VDAC_STATUS_CH0ENS_DEFAULT 0x00000000UL

#define	_VDAC_STATUS_CH0ENS_MASK 0x1UL

#define	_VDAC_STATUS_CH0ENS_SHIFT 0

#define	_VDAC_STATUS_CH0WARM_DEFAULT 0x00000000UL

#define	_VDAC_STATUS_CH0WARM_MASK 0x10UL

#define	_VDAC_STATUS_CH0WARM_SHIFT 4

#define	_VDAC_STATUS_CH1BL_DEFAULT 0x00000001UL

#define	_VDAC_STATUS_CH1BL_MASK 0x8UL

#define	_VDAC_STATUS_CH1BL_SHIFT 3

#define	_VDAC_STATUS_CH1ENS_DEFAULT 0x00000000UL

#define	_VDAC_STATUS_CH1ENS_MASK 0x2UL

#define	_VDAC_STATUS_CH1ENS_SHIFT 1

#define	_VDAC_STATUS_CH1WARM_DEFAULT 0x00000000UL

#define	_VDAC_STATUS_CH1WARM_MASK 0x20UL

#define	_VDAC_STATUS_CH1WARM_SHIFT 5

#define	_VDAC_STATUS_MASK 0x3333003FUL

#define	_VDAC_STATUS_OPA0APORTCONFLICT_DEFAULT 0x00000000UL

#define	_VDAC_STATUS_OPA0APORTCONFLICT_MASK 0x10000UL

#define	_VDAC_STATUS_OPA0APORTCONFLICT_SHIFT 16

#define	_VDAC_STATUS_OPA0ENS_DEFAULT 0x00000000UL

#define	_VDAC_STATUS_OPA0ENS_MASK 0x100000UL

#define	_VDAC_STATUS_OPA0ENS_SHIFT 20

#define	_VDAC_STATUS_OPA0OUTVALID_DEFAULT 0x00000000UL

#define	_VDAC_STATUS_OPA0OUTVALID_MASK 0x10000000UL

#define	_VDAC_STATUS_OPA0OUTVALID_SHIFT 28

#define	_VDAC_STATUS_OPA0WARM_DEFAULT 0x00000000UL

#define	_VDAC_STATUS_OPA0WARM_MASK 0x1000000UL

#define	_VDAC_STATUS_OPA0WARM_SHIFT 24

#define	_VDAC_STATUS_OPA1APORTCONFLICT_DEFAULT 0x00000000UL

#define	_VDAC_STATUS_OPA1APORTCONFLICT_MASK 0x20000UL

#define	_VDAC_STATUS_OPA1APORTCONFLICT_SHIFT 17

#define	_VDAC_STATUS_OPA1ENS_DEFAULT 0x00000000UL

#define	_VDAC_STATUS_OPA1ENS_MASK 0x200000UL

#define	_VDAC_STATUS_OPA1ENS_SHIFT 21

#define	_VDAC_STATUS_OPA1OUTVALID_DEFAULT 0x00000000UL

#define	_VDAC_STATUS_OPA1OUTVALID_MASK 0x20000000UL

#define	_VDAC_STATUS_OPA1OUTVALID_SHIFT 29

#define	_VDAC_STATUS_OPA1WARM_DEFAULT 0x00000000UL

#define	_VDAC_STATUS_OPA1WARM_MASK 0x2000000UL

#define	_VDAC_STATUS_OPA1WARM_SHIFT 25

#define	_VDAC_STATUS_RESETVALUE 0x0000000CUL

#define	VDAC_CAL_GAINERRTRIM_DEFAULT ( _VDAC_CAL_GAINERRTRIM_DEFAULT << 8)

#define	VDAC_CAL_GAINERRTRIMCH1_DEFAULT ( _VDAC_CAL_GAINERRTRIMCH1_DEFAULT << 16)

#define	VDAC_CAL_OFFSETTRIM_DEFAULT ( _VDAC_CAL_OFFSETTRIM_DEFAULT << 0)

#define	VDAC_CH0CTRL_CONVMODE (0x1UL << 0)

#define	VDAC_CH0CTRL_CONVMODE_CONTINUOUS ( _VDAC_CH0CTRL_CONVMODE_CONTINUOUS << 0)

#define	VDAC_CH0CTRL_CONVMODE_DEFAULT ( _VDAC_CH0CTRL_CONVMODE_DEFAULT << 0)

#define	VDAC_CH0CTRL_CONVMODE_SAMPLEOFF ( _VDAC_CH0CTRL_CONVMODE_SAMPLEOFF << 0)

#define	VDAC_CH0CTRL_PRSASYNC (0x1UL << 8)

#define	VDAC_CH0CTRL_PRSASYNC_DEFAULT ( _VDAC_CH0CTRL_PRSASYNC_DEFAULT << 8)

#define	VDAC_CH0CTRL_PRSSEL_DEFAULT ( _VDAC_CH0CTRL_PRSSEL_DEFAULT << 12)

#define	VDAC_CH0CTRL_PRSSEL_PRSCH0 ( _VDAC_CH0CTRL_PRSSEL_PRSCH0 << 12)

#define	VDAC_CH0CTRL_PRSSEL_PRSCH1 ( _VDAC_CH0CTRL_PRSSEL_PRSCH1 << 12)

#define	VDAC_CH0CTRL_PRSSEL_PRSCH10 ( _VDAC_CH0CTRL_PRSSEL_PRSCH10 << 12)

#define	VDAC_CH0CTRL_PRSSEL_PRSCH11 ( _VDAC_CH0CTRL_PRSSEL_PRSCH11 << 12)

#define	VDAC_CH0CTRL_PRSSEL_PRSCH2 ( _VDAC_CH0CTRL_PRSSEL_PRSCH2 << 12)

#define	VDAC_CH0CTRL_PRSSEL_PRSCH3 ( _VDAC_CH0CTRL_PRSSEL_PRSCH3 << 12)

#define	VDAC_CH0CTRL_PRSSEL_PRSCH4 ( _VDAC_CH0CTRL_PRSSEL_PRSCH4 << 12)

#define	VDAC_CH0CTRL_PRSSEL_PRSCH5 ( _VDAC_CH0CTRL_PRSSEL_PRSCH5 << 12)

#define	VDAC_CH0CTRL_PRSSEL_PRSCH6 ( _VDAC_CH0CTRL_PRSSEL_PRSCH6 << 12)

#define	VDAC_CH0CTRL_PRSSEL_PRSCH7 ( _VDAC_CH0CTRL_PRSSEL_PRSCH7 << 12)

#define	VDAC_CH0CTRL_PRSSEL_PRSCH8 ( _VDAC_CH0CTRL_PRSSEL_PRSCH8 << 12)

#define	VDAC_CH0CTRL_PRSSEL_PRSCH9 ( _VDAC_CH0CTRL_PRSSEL_PRSCH9 << 12)

#define	VDAC_CH0CTRL_TRIGMODE_DEFAULT ( _VDAC_CH0CTRL_TRIGMODE_DEFAULT << 4)

#define	VDAC_CH0CTRL_TRIGMODE_LESENSE ( _VDAC_CH0CTRL_TRIGMODE_LESENSE << 4)

#define	VDAC_CH0CTRL_TRIGMODE_PRS ( _VDAC_CH0CTRL_TRIGMODE_PRS << 4)

#define	VDAC_CH0CTRL_TRIGMODE_REFRESH ( _VDAC_CH0CTRL_TRIGMODE_REFRESH << 4)

#define	VDAC_CH0CTRL_TRIGMODE_SW ( _VDAC_CH0CTRL_TRIGMODE_SW << 4)

#define	VDAC_CH0CTRL_TRIGMODE_SWPRS ( _VDAC_CH0CTRL_TRIGMODE_SWPRS << 4)

#define	VDAC_CH0CTRL_TRIGMODE_SWREFRESH ( _VDAC_CH0CTRL_TRIGMODE_SWREFRESH << 4)

#define	VDAC_CH0DATA_DATA_DEFAULT ( _VDAC_CH0DATA_DATA_DEFAULT << 0)

#define	VDAC_CH1CTRL_CONVMODE (0x1UL << 0)

#define	VDAC_CH1CTRL_CONVMODE_CONTINUOUS ( _VDAC_CH1CTRL_CONVMODE_CONTINUOUS << 0)

#define	VDAC_CH1CTRL_CONVMODE_DEFAULT ( _VDAC_CH1CTRL_CONVMODE_DEFAULT << 0)

#define	VDAC_CH1CTRL_CONVMODE_SAMPLEOFF ( _VDAC_CH1CTRL_CONVMODE_SAMPLEOFF << 0)

#define	VDAC_CH1CTRL_PRSASYNC (0x1UL << 8)

#define	VDAC_CH1CTRL_PRSASYNC_DEFAULT ( _VDAC_CH1CTRL_PRSASYNC_DEFAULT << 8)

#define	VDAC_CH1CTRL_PRSSEL_DEFAULT ( _VDAC_CH1CTRL_PRSSEL_DEFAULT << 12)

#define	VDAC_CH1CTRL_PRSSEL_PRSCH0 ( _VDAC_CH1CTRL_PRSSEL_PRSCH0 << 12)

#define	VDAC_CH1CTRL_PRSSEL_PRSCH1 ( _VDAC_CH1CTRL_PRSSEL_PRSCH1 << 12)

#define	VDAC_CH1CTRL_PRSSEL_PRSCH10 ( _VDAC_CH1CTRL_PRSSEL_PRSCH10 << 12)

#define	VDAC_CH1CTRL_PRSSEL_PRSCH11 ( _VDAC_CH1CTRL_PRSSEL_PRSCH11 << 12)

#define	VDAC_CH1CTRL_PRSSEL_PRSCH2 ( _VDAC_CH1CTRL_PRSSEL_PRSCH2 << 12)

#define	VDAC_CH1CTRL_PRSSEL_PRSCH3 ( _VDAC_CH1CTRL_PRSSEL_PRSCH3 << 12)

#define	VDAC_CH1CTRL_PRSSEL_PRSCH4 ( _VDAC_CH1CTRL_PRSSEL_PRSCH4 << 12)

#define	VDAC_CH1CTRL_PRSSEL_PRSCH5 ( _VDAC_CH1CTRL_PRSSEL_PRSCH5 << 12)

#define	VDAC_CH1CTRL_PRSSEL_PRSCH6 ( _VDAC_CH1CTRL_PRSSEL_PRSCH6 << 12)

#define	VDAC_CH1CTRL_PRSSEL_PRSCH7 ( _VDAC_CH1CTRL_PRSSEL_PRSCH7 << 12)

#define	VDAC_CH1CTRL_PRSSEL_PRSCH8 ( _VDAC_CH1CTRL_PRSSEL_PRSCH8 << 12)

#define	VDAC_CH1CTRL_PRSSEL_PRSCH9 ( _VDAC_CH1CTRL_PRSSEL_PRSCH9 << 12)

#define	VDAC_CH1CTRL_TRIGMODE_DEFAULT ( _VDAC_CH1CTRL_TRIGMODE_DEFAULT << 4)

#define	VDAC_CH1CTRL_TRIGMODE_LESENSE ( _VDAC_CH1CTRL_TRIGMODE_LESENSE << 4)

#define	VDAC_CH1CTRL_TRIGMODE_PRS ( _VDAC_CH1CTRL_TRIGMODE_PRS << 4)

#define	VDAC_CH1CTRL_TRIGMODE_REFRESH ( _VDAC_CH1CTRL_TRIGMODE_REFRESH << 4)

#define	VDAC_CH1CTRL_TRIGMODE_SW ( _VDAC_CH1CTRL_TRIGMODE_SW << 4)

#define	VDAC_CH1CTRL_TRIGMODE_SWPRS ( _VDAC_CH1CTRL_TRIGMODE_SWPRS << 4)

#define	VDAC_CH1CTRL_TRIGMODE_SWREFRESH ( _VDAC_CH1CTRL_TRIGMODE_SWREFRESH << 4)

#define	VDAC_CH1DATA_DATA_DEFAULT ( _VDAC_CH1DATA_DATA_DEFAULT << 0)

#define	VDAC_CMD_CH0DIS (0x1UL << 1)

#define	VDAC_CMD_CH0DIS_DEFAULT ( _VDAC_CMD_CH0DIS_DEFAULT << 1)

#define	VDAC_CMD_CH0EN (0x1UL << 0)

#define	VDAC_CMD_CH0EN_DEFAULT ( _VDAC_CMD_CH0EN_DEFAULT << 0)

#define	VDAC_CMD_CH1DIS (0x1UL << 3)

#define	VDAC_CMD_CH1DIS_DEFAULT ( _VDAC_CMD_CH1DIS_DEFAULT << 3)

#define	VDAC_CMD_CH1EN (0x1UL << 2)

#define	VDAC_CMD_CH1EN_DEFAULT ( _VDAC_CMD_CH1EN_DEFAULT << 2)

#define	VDAC_CMD_OPA0DIS (0x1UL << 17)

#define	VDAC_CMD_OPA0DIS_DEFAULT ( _VDAC_CMD_OPA0DIS_DEFAULT << 17)

#define	VDAC_CMD_OPA0EN (0x1UL << 16)

#define	VDAC_CMD_OPA0EN_DEFAULT ( _VDAC_CMD_OPA0EN_DEFAULT << 16)

#define	VDAC_CMD_OPA1DIS (0x1UL << 19)

#define	VDAC_CMD_OPA1DIS_DEFAULT ( _VDAC_CMD_OPA1DIS_DEFAULT << 19)

#define	VDAC_CMD_OPA1EN (0x1UL << 18)

#define	VDAC_CMD_OPA1EN_DEFAULT ( _VDAC_CMD_OPA1EN_DEFAULT << 18)

#define	VDAC_COMBDATA_CH0DATA_DEFAULT ( _VDAC_COMBDATA_CH0DATA_DEFAULT << 0)

#define	VDAC_COMBDATA_CH1DATA_DEFAULT ( _VDAC_COMBDATA_CH1DATA_DEFAULT << 16)

#define	VDAC_CTRL_CH0PRESCRST (0x1UL << 6)

#define	VDAC_CTRL_CH0PRESCRST_DEFAULT ( _VDAC_CTRL_CH0PRESCRST_DEFAULT << 6)

#define	VDAC_CTRL_DACCLKMODE (0x1UL << 31)

#define	VDAC_CTRL_DACCLKMODE_ASYNC ( _VDAC_CTRL_DACCLKMODE_ASYNC << 31)

#define	VDAC_CTRL_DACCLKMODE_DEFAULT ( _VDAC_CTRL_DACCLKMODE_DEFAULT << 31)

#define	VDAC_CTRL_DACCLKMODE_SYNC ( _VDAC_CTRL_DACCLKMODE_SYNC << 31)

#define	VDAC_CTRL_DIFF (0x1UL << 0)

#define	VDAC_CTRL_DIFF_DEFAULT ( _VDAC_CTRL_DIFF_DEFAULT << 0)

#define	VDAC_CTRL_OUTENPRS (0x1UL << 5)

#define	VDAC_CTRL_OUTENPRS_DEFAULT ( _VDAC_CTRL_OUTENPRS_DEFAULT << 5)

#define	VDAC_CTRL_PRESC_DEFAULT ( _VDAC_CTRL_PRESC_DEFAULT << 16)

#define	VDAC_CTRL_PRESC_NODIVISION ( _VDAC_CTRL_PRESC_NODIVISION << 16)

#define	VDAC_CTRL_REFRESHPERIOD_16CYCLES ( _VDAC_CTRL_REFRESHPERIOD_16CYCLES << 24)

#define	VDAC_CTRL_REFRESHPERIOD_32CYCLES ( _VDAC_CTRL_REFRESHPERIOD_32CYCLES << 24)

#define	VDAC_CTRL_REFRESHPERIOD_64CYCLES ( _VDAC_CTRL_REFRESHPERIOD_64CYCLES << 24)

#define	VDAC_CTRL_REFRESHPERIOD_8CYCLES ( _VDAC_CTRL_REFRESHPERIOD_8CYCLES << 24)

#define	VDAC_CTRL_REFRESHPERIOD_DEFAULT ( _VDAC_CTRL_REFRESHPERIOD_DEFAULT << 24)

#define	VDAC_CTRL_REFSEL_1V25 ( _VDAC_CTRL_REFSEL_1V25 << 8)

#define	VDAC_CTRL_REFSEL_1V25LN ( _VDAC_CTRL_REFSEL_1V25LN << 8)

#define	VDAC_CTRL_REFSEL_2V5 ( _VDAC_CTRL_REFSEL_2V5 << 8)

#define	VDAC_CTRL_REFSEL_2V5LN ( _VDAC_CTRL_REFSEL_2V5LN << 8)

#define	VDAC_CTRL_REFSEL_DEFAULT ( _VDAC_CTRL_REFSEL_DEFAULT << 8)

#define	VDAC_CTRL_REFSEL_EXT ( _VDAC_CTRL_REFSEL_EXT << 8)

#define	VDAC_CTRL_REFSEL_VDD ( _VDAC_CTRL_REFSEL_VDD << 8)

#define	VDAC_CTRL_SINEMODE (0x1UL << 4)

#define	VDAC_CTRL_SINEMODE_DEFAULT ( _VDAC_CTRL_SINEMODE_DEFAULT << 4)

#define	VDAC_CTRL_WARMUPMODE (0x1UL << 28)

#define	VDAC_CTRL_WARMUPMODE_DEFAULT ( _VDAC_CTRL_WARMUPMODE_DEFAULT << 28)

#define	VDAC_CTRL_WARMUPMODE_KEEPINSTANDBY ( _VDAC_CTRL_WARMUPMODE_KEEPINSTANDBY << 28)

#define	VDAC_CTRL_WARMUPMODE_NORMAL ( _VDAC_CTRL_WARMUPMODE_NORMAL << 28)

#define	VDAC_IEN_CH0BL (0x1UL << 6)

#define	VDAC_IEN_CH0BL_DEFAULT ( _VDAC_IEN_CH0BL_DEFAULT << 6)

#define	VDAC_IEN_CH0CD (0x1UL << 0)

#define	VDAC_IEN_CH0CD_DEFAULT ( _VDAC_IEN_CH0CD_DEFAULT << 0)

#define	VDAC_IEN_CH0OF (0x1UL << 2)

#define	VDAC_IEN_CH0OF_DEFAULT ( _VDAC_IEN_CH0OF_DEFAULT << 2)

#define	VDAC_IEN_CH0UF (0x1UL << 4)

#define	VDAC_IEN_CH0UF_DEFAULT ( _VDAC_IEN_CH0UF_DEFAULT << 4)

#define	VDAC_IEN_CH1BL (0x1UL << 7)

#define	VDAC_IEN_CH1BL_DEFAULT ( _VDAC_IEN_CH1BL_DEFAULT << 7)

#define	VDAC_IEN_CH1CD (0x1UL << 1)

#define	VDAC_IEN_CH1CD_DEFAULT ( _VDAC_IEN_CH1CD_DEFAULT << 1)

#define	VDAC_IEN_CH1OF (0x1UL << 3)

#define	VDAC_IEN_CH1OF_DEFAULT ( _VDAC_IEN_CH1OF_DEFAULT << 3)

#define	VDAC_IEN_CH1UF (0x1UL << 5)

#define	VDAC_IEN_CH1UF_DEFAULT ( _VDAC_IEN_CH1UF_DEFAULT << 5)

#define	VDAC_IEN_EM23ERR (0x1UL << 15)

#define	VDAC_IEN_EM23ERR_DEFAULT ( _VDAC_IEN_EM23ERR_DEFAULT << 15)

#define	VDAC_IEN_OPA0APORTCONFLICT (0x1UL << 16)

#define	VDAC_IEN_OPA0APORTCONFLICT_DEFAULT ( _VDAC_IEN_OPA0APORTCONFLICT_DEFAULT << 16)

#define	VDAC_IEN_OPA0OUTVALID (0x1UL << 28)

#define	VDAC_IEN_OPA0OUTVALID_DEFAULT ( _VDAC_IEN_OPA0OUTVALID_DEFAULT << 28)

#define	VDAC_IEN_OPA0PRSTIMEDERR (0x1UL << 20)

#define	VDAC_IEN_OPA0PRSTIMEDERR_DEFAULT ( _VDAC_IEN_OPA0PRSTIMEDERR_DEFAULT << 20)

#define	VDAC_IEN_OPA1APORTCONFLICT (0x1UL << 17)

#define	VDAC_IEN_OPA1APORTCONFLICT_DEFAULT ( _VDAC_IEN_OPA1APORTCONFLICT_DEFAULT << 17)

#define	VDAC_IEN_OPA1OUTVALID (0x1UL << 29)

#define	VDAC_IEN_OPA1OUTVALID_DEFAULT ( _VDAC_IEN_OPA1OUTVALID_DEFAULT << 29)

#define	VDAC_IEN_OPA1PRSTIMEDERR (0x1UL << 21)

#define	VDAC_IEN_OPA1PRSTIMEDERR_DEFAULT ( _VDAC_IEN_OPA1PRSTIMEDERR_DEFAULT << 21)

#define	VDAC_IF_CH0BL (0x1UL << 6)

#define	VDAC_IF_CH0BL_DEFAULT ( _VDAC_IF_CH0BL_DEFAULT << 6)

#define	VDAC_IF_CH0CD (0x1UL << 0)

#define	VDAC_IF_CH0CD_DEFAULT ( _VDAC_IF_CH0CD_DEFAULT << 0)

#define	VDAC_IF_CH0OF (0x1UL << 2)

#define	VDAC_IF_CH0OF_DEFAULT ( _VDAC_IF_CH0OF_DEFAULT << 2)

#define	VDAC_IF_CH0UF (0x1UL << 4)

#define	VDAC_IF_CH0UF_DEFAULT ( _VDAC_IF_CH0UF_DEFAULT << 4)

#define	VDAC_IF_CH1BL (0x1UL << 7)

#define	VDAC_IF_CH1BL_DEFAULT ( _VDAC_IF_CH1BL_DEFAULT << 7)

#define	VDAC_IF_CH1CD (0x1UL << 1)

#define	VDAC_IF_CH1CD_DEFAULT ( _VDAC_IF_CH1CD_DEFAULT << 1)

#define	VDAC_IF_CH1OF (0x1UL << 3)

#define	VDAC_IF_CH1OF_DEFAULT ( _VDAC_IF_CH1OF_DEFAULT << 3)

#define	VDAC_IF_CH1UF (0x1UL << 5)

#define	VDAC_IF_CH1UF_DEFAULT ( _VDAC_IF_CH1UF_DEFAULT << 5)

#define	VDAC_IF_EM23ERR (0x1UL << 15)

#define	VDAC_IF_EM23ERR_DEFAULT ( _VDAC_IF_EM23ERR_DEFAULT << 15)

#define	VDAC_IF_OPA0APORTCONFLICT (0x1UL << 16)

#define	VDAC_IF_OPA0APORTCONFLICT_DEFAULT ( _VDAC_IF_OPA0APORTCONFLICT_DEFAULT << 16)

#define	VDAC_IF_OPA0OUTVALID (0x1UL << 28)

#define	VDAC_IF_OPA0OUTVALID_DEFAULT ( _VDAC_IF_OPA0OUTVALID_DEFAULT << 28)

#define	VDAC_IF_OPA0PRSTIMEDERR (0x1UL << 20)

#define	VDAC_IF_OPA0PRSTIMEDERR_DEFAULT ( _VDAC_IF_OPA0PRSTIMEDERR_DEFAULT << 20)

#define	VDAC_IF_OPA1APORTCONFLICT (0x1UL << 17)

#define	VDAC_IF_OPA1APORTCONFLICT_DEFAULT ( _VDAC_IF_OPA1APORTCONFLICT_DEFAULT << 17)

#define	VDAC_IF_OPA1OUTVALID (0x1UL << 29)

#define	VDAC_IF_OPA1OUTVALID_DEFAULT ( _VDAC_IF_OPA1OUTVALID_DEFAULT << 29)

#define	VDAC_IF_OPA1PRSTIMEDERR (0x1UL << 21)

#define	VDAC_IF_OPA1PRSTIMEDERR_DEFAULT ( _VDAC_IF_OPA1PRSTIMEDERR_DEFAULT << 21)

#define	VDAC_IFC_CH0CD (0x1UL << 0)

#define	VDAC_IFC_CH0CD_DEFAULT ( _VDAC_IFC_CH0CD_DEFAULT << 0)

#define	VDAC_IFC_CH0OF (0x1UL << 2)

#define	VDAC_IFC_CH0OF_DEFAULT ( _VDAC_IFC_CH0OF_DEFAULT << 2)

#define	VDAC_IFC_CH0UF (0x1UL << 4)

#define	VDAC_IFC_CH0UF_DEFAULT ( _VDAC_IFC_CH0UF_DEFAULT << 4)

#define	VDAC_IFC_CH1CD (0x1UL << 1)

#define	VDAC_IFC_CH1CD_DEFAULT ( _VDAC_IFC_CH1CD_DEFAULT << 1)

#define	VDAC_IFC_CH1OF (0x1UL << 3)

#define	VDAC_IFC_CH1OF_DEFAULT ( _VDAC_IFC_CH1OF_DEFAULT << 3)

#define	VDAC_IFC_CH1UF (0x1UL << 5)

#define	VDAC_IFC_CH1UF_DEFAULT ( _VDAC_IFC_CH1UF_DEFAULT << 5)

#define	VDAC_IFC_EM23ERR (0x1UL << 15)

#define	VDAC_IFC_EM23ERR_DEFAULT ( _VDAC_IFC_EM23ERR_DEFAULT << 15)

#define	VDAC_IFC_OPA0APORTCON

VDAC Bit FieldsDevices > VDAC

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