EFR32BG14P733F256GM48Devices

Modules

Bit Fields
Core
Processor and Core Peripheral Section.
Part
Peripheral Declarations
Peripheral Memory Map
Peripheral Offsets
Peripheral TypeDefs
Device Specific Peripheral Register Structures.

Macros

#define CRYPTO_IRQn CRYPTO0_IRQn

Typedefs

typedef enum IRQn IRQn_Type

Enumerations

enum IRQn {
NonMaskableInt_IRQn = -14,
HardFault_IRQn = -13,
MemoryManagement_IRQn = -12,
BusFault_IRQn = -11,
UsageFault_IRQn = -10,
SVCall_IRQn = -5,
DebugMonitor_IRQn = -4,
PendSV_IRQn = -2,
SysTick_IRQn = -1,
EMU_IRQn = 0,
WDOG0_IRQn = 2,
WDOG1_IRQn = 3,
LDMA_IRQn = 9,
GPIO_EVEN_IRQn = 10,
TIMER0_IRQn = 11,
USART0_RX_IRQn = 12,
USART0_TX_IRQn = 13,
ACMP0_IRQn = 14,
ADC0_IRQn = 15,
IDAC0_IRQn = 16,
I2C0_IRQn = 17,
GPIO_ODD_IRQn = 18,
TIMER1_IRQn = 19,
USART1_RX_IRQn = 20,
USART1_TX_IRQn = 21,
LEUART0_IRQn = 22,
PCNT0_IRQn = 23,
CMU_IRQn = 24,
MSC_IRQn = 25,
CRYPTO0_IRQn = 26,
LETIMER0_IRQn = 27,
RTCC_IRQn = 31,
CRYOTIMER_IRQn = 33,
FPUEH_IRQn = 35,
SMU_IRQn = 36,
WTIMER0_IRQn = 37,
VDAC0_IRQn = 38,
LESENSE_IRQn = 39,
TRNG0_IRQn = 40
}

Macro Definition Documentation

#define CRYPTO_IRQn CRYPTO0_IRQn

Alias for CRYPTO0_IRQn

Definition at line 104 of file efr32bg14p733f256gm48.h .

Typedef Documentation

typedef enum IRQn IRQn_Type

Interrupt Number Definition

Enumeration Type Documentation

enum IRQn

Interrupt Number Definition

Enumerator
NonMaskableInt_IRQn

2 Cortex-M4 Non Maskable Interrupt

HardFault_IRQn

3 Cortex-M4 Hard Fault Interrupt

MemoryManagement_IRQn

4 Cortex-M4 Memory Management Interrupt

BusFault_IRQn

5 Cortex-M4 Bus Fault Interrupt

UsageFault_IRQn

6 Cortex-M4 Usage Fault Interrupt

SVCall_IRQn

11 Cortex-M4 SV Call Interrupt

DebugMonitor_IRQn

12 Cortex-M4 Debug Monitor Interrupt

PendSV_IRQn

14 Cortex-M4 Pend SV Interrupt

SysTick_IRQn

15 Cortex-M4 System Tick Interrupt

EMU_IRQn

16+0 EFR32 EMU Interrupt

WDOG0_IRQn

16+2 EFR32 WDOG0 Interrupt

WDOG1_IRQn

16+3 EFR32 WDOG1 Interrupt

LDMA_IRQn

16+9 EFR32 LDMA Interrupt

GPIO_EVEN_IRQn

16+10 EFR32 GPIO_EVEN Interrupt

TIMER0_IRQn

16+11 EFR32 TIMER0 Interrupt

USART0_RX_IRQn

16+12 EFR32 USART0_RX Interrupt

USART0_TX_IRQn

16+13 EFR32 USART0_TX Interrupt

ACMP0_IRQn

16+14 EFR32 ACMP0 Interrupt

ADC0_IRQn

16+15 EFR32 ADC0 Interrupt

IDAC0_IRQn

16+16 EFR32 IDAC0 Interrupt

I2C0_IRQn

16+17 EFR32 I2C0 Interrupt

GPIO_ODD_IRQn

16+18 EFR32 GPIO_ODD Interrupt

TIMER1_IRQn

16+19 EFR32 TIMER1 Interrupt

USART1_RX_IRQn

16+20 EFR32 USART1_RX Interrupt

USART1_TX_IRQn

16+21 EFR32 USART1_TX Interrupt

LEUART0_IRQn

16+22 EFR32 LEUART0 Interrupt

PCNT0_IRQn

16+23 EFR32 PCNT0 Interrupt

CMU_IRQn

16+24 EFR32 CMU Interrupt

MSC_IRQn

16+25 EFR32 MSC Interrupt

CRYPTO0_IRQn

16+26 EFR32 CRYPTO0 Interrupt

LETIMER0_IRQn

16+27 EFR32 LETIMER0 Interrupt

RTCC_IRQn

16+31 EFR32 RTCC Interrupt

CRYOTIMER_IRQn

16+33 EFR32 CRYOTIMER Interrupt

FPUEH_IRQn

16+35 EFR32 FPUEH Interrupt

SMU_IRQn

16+36 EFR32 SMU Interrupt

WTIMER0_IRQn

16+37 EFR32 WTIMER0 Interrupt

VDAC0_IRQn

16+38 EFR32 VDAC0 Interrupt

LESENSE_IRQn

16+39 EFR32 LESENSE Interrupt

TRNG0_IRQn

16+40 EFR32 TRNG0 Interrupt

Definition at line 58 of file efr32bg14p733f256gm48.h .