Macros
#define	_DAC_BIASPROG_BIASPROG_DEFAULT 0x00000007UL

#define	_DAC_BIASPROG_BIASPROG_MASK 0xFUL

#define	_DAC_BIASPROG_BIASPROG_SHIFT 0

#define	_DAC_BIASPROG_HALFBIAS_DEFAULT 0x00000001UL

#define	_DAC_BIASPROG_HALFBIAS_MASK 0x40UL

#define	_DAC_BIASPROG_HALFBIAS_SHIFT 6

#define	_DAC_BIASPROG_MASK 0x00004F4FUL

#define	_DAC_BIASPROG_OPA2BIASPROG_DEFAULT 0x00000007UL

#define	_DAC_BIASPROG_OPA2BIASPROG_MASK 0xF00UL

#define	_DAC_BIASPROG_OPA2BIASPROG_SHIFT 8

#define	_DAC_BIASPROG_OPA2HALFBIAS_DEFAULT 0x00000001UL

#define	_DAC_BIASPROG_OPA2HALFBIAS_MASK 0x4000UL

#define	_DAC_BIASPROG_OPA2HALFBIAS_SHIFT 14

#define	_DAC_BIASPROG_RESETVALUE 0x00004747UL

#define	_DAC_CAL_CH0OFFSET_DEFAULT 0x00000000UL

#define	_DAC_CAL_CH0OFFSET_MASK 0x3FUL

#define	_DAC_CAL_CH0OFFSET_SHIFT 0

#define	_DAC_CAL_CH1OFFSET_DEFAULT 0x00000000UL

#define	_DAC_CAL_CH1OFFSET_MASK 0x3F00UL

#define	_DAC_CAL_CH1OFFSET_SHIFT 8

#define	_DAC_CAL_GAIN_DEFAULT 0x00000040UL

#define	_DAC_CAL_GAIN_MASK 0x7F0000UL

#define	_DAC_CAL_GAIN_SHIFT 16

#define	_DAC_CAL_MASK 0x007F3F3FUL

#define	_DAC_CAL_RESETVALUE 0x00400000UL

#define	_DAC_CH0CTRL_EN_DEFAULT 0x00000000UL

#define	_DAC_CH0CTRL_EN_MASK 0x1UL

#define	_DAC_CH0CTRL_EN_SHIFT 0

#define	_DAC_CH0CTRL_MASK 0x000000F7UL

#define	_DAC_CH0CTRL_PRSEN_DEFAULT 0x00000000UL

#define	_DAC_CH0CTRL_PRSEN_MASK 0x4UL

#define	_DAC_CH0CTRL_PRSEN_SHIFT 2

#define	_DAC_CH0CTRL_PRSSEL_DEFAULT 0x00000000UL

#define	_DAC_CH0CTRL_PRSSEL_MASK 0xF0UL

#define	_DAC_CH0CTRL_PRSSEL_PRSCH0 0x00000000UL

#define	_DAC_CH0CTRL_PRSSEL_PRSCH1 0x00000001UL

#define	_DAC_CH0CTRL_PRSSEL_PRSCH10 0x0000000AUL

#define	_DAC_CH0CTRL_PRSSEL_PRSCH11 0x0000000BUL

#define	_DAC_CH0CTRL_PRSSEL_PRSCH2 0x00000002UL

#define	_DAC_CH0CTRL_PRSSEL_PRSCH3 0x00000003UL

#define	_DAC_CH0CTRL_PRSSEL_PRSCH4 0x00000004UL

#define	_DAC_CH0CTRL_PRSSEL_PRSCH5 0x00000005UL

#define	_DAC_CH0CTRL_PRSSEL_PRSCH6 0x00000006UL

#define	_DAC_CH0CTRL_PRSSEL_PRSCH7 0x00000007UL

#define	_DAC_CH0CTRL_PRSSEL_PRSCH8 0x00000008UL

#define	_DAC_CH0CTRL_PRSSEL_PRSCH9 0x00000009UL

#define	_DAC_CH0CTRL_PRSSEL_SHIFT 4

#define	_DAC_CH0CTRL_REFREN_DEFAULT 0x00000000UL

#define	_DAC_CH0CTRL_REFREN_MASK 0x2UL

#define	_DAC_CH0CTRL_REFREN_SHIFT 1

#define	_DAC_CH0CTRL_RESETVALUE 0x00000000UL

#define	_DAC_CH0DATA_DATA_DEFAULT 0x00000000UL

#define	_DAC_CH0DATA_DATA_MASK 0xFFFUL

#define	_DAC_CH0DATA_DATA_SHIFT 0

#define	_DAC_CH0DATA_MASK 0x00000FFFUL

#define	_DAC_CH0DATA_RESETVALUE 0x00000000UL

#define	_DAC_CH1CTRL_EN_DEFAULT 0x00000000UL

#define	_DAC_CH1CTRL_EN_MASK 0x1UL

#define	_DAC_CH1CTRL_EN_SHIFT 0

#define	_DAC_CH1CTRL_MASK 0x000000F7UL

#define	_DAC_CH1CTRL_PRSEN_DEFAULT 0x00000000UL

#define	_DAC_CH1CTRL_PRSEN_MASK 0x4UL

#define	_DAC_CH1CTRL_PRSEN_SHIFT 2

#define	_DAC_CH1CTRL_PRSSEL_DEFAULT 0x00000000UL

#define	_DAC_CH1CTRL_PRSSEL_MASK 0xF0UL

#define	_DAC_CH1CTRL_PRSSEL_PRSCH0 0x00000000UL

#define	_DAC_CH1CTRL_PRSSEL_PRSCH1 0x00000001UL

#define	_DAC_CH1CTRL_PRSSEL_PRSCH10 0x0000000AUL

#define	_DAC_CH1CTRL_PRSSEL_PRSCH11 0x0000000BUL

#define	_DAC_CH1CTRL_PRSSEL_PRSCH2 0x00000002UL

#define	_DAC_CH1CTRL_PRSSEL_PRSCH3 0x00000003UL

#define	_DAC_CH1CTRL_PRSSEL_PRSCH4 0x00000004UL

#define	_DAC_CH1CTRL_PRSSEL_PRSCH5 0x00000005UL

#define	_DAC_CH1CTRL_PRSSEL_PRSCH6 0x00000006UL

#define	_DAC_CH1CTRL_PRSSEL_PRSCH7 0x00000007UL

#define	_DAC_CH1CTRL_PRSSEL_PRSCH8 0x00000008UL

#define	_DAC_CH1CTRL_PRSSEL_PRSCH9 0x00000009UL

#define	_DAC_CH1CTRL_PRSSEL_SHIFT 4

#define	_DAC_CH1CTRL_REFREN_DEFAULT 0x00000000UL

#define	_DAC_CH1CTRL_REFREN_MASK 0x2UL

#define	_DAC_CH1CTRL_REFREN_SHIFT 1

#define	_DAC_CH1CTRL_RESETVALUE 0x00000000UL

#define	_DAC_CH1DATA_DATA_DEFAULT 0x00000000UL

#define	_DAC_CH1DATA_DATA_MASK 0xFFFUL

#define	_DAC_CH1DATA_DATA_SHIFT 0

#define	_DAC_CH1DATA_MASK 0x00000FFFUL

#define	_DAC_CH1DATA_RESETVALUE 0x00000000UL

#define	_DAC_COMBDATA_CH0DATA_DEFAULT 0x00000000UL

#define	_DAC_COMBDATA_CH0DATA_MASK 0xFFFUL

#define	_DAC_COMBDATA_CH0DATA_SHIFT 0

#define	_DAC_COMBDATA_CH1DATA_DEFAULT 0x00000000UL

#define	_DAC_COMBDATA_CH1DATA_MASK 0xFFF0000UL

#define	_DAC_COMBDATA_CH1DATA_SHIFT 16

#define	_DAC_COMBDATA_MASK 0x0FFF0FFFUL

#define	_DAC_COMBDATA_RESETVALUE 0x00000000UL

#define	_DAC_CTRL_CH0PRESCRST_DEFAULT 0x00000000UL

#define	_DAC_CTRL_CH0PRESCRST_MASK 0x80UL

#define	_DAC_CTRL_CH0PRESCRST_SHIFT 7

#define	_DAC_CTRL_CONVMODE_CONTINUOUS 0x00000000UL

#define	_DAC_CTRL_CONVMODE_DEFAULT 0x00000000UL

#define	_DAC_CTRL_CONVMODE_MASK 0xCUL

#define	_DAC_CTRL_CONVMODE_SAMPLEHOLD 0x00000001UL

#define	_DAC_CTRL_CONVMODE_SAMPLEOFF 0x00000002UL

#define	_DAC_CTRL_CONVMODE_SHIFT 2

#define	_DAC_CTRL_DIFF_DEFAULT 0x00000000UL

#define	_DAC_CTRL_DIFF_MASK 0x1UL

#define	_DAC_CTRL_DIFF_SHIFT 0

#define	_DAC_CTRL_MASK 0x003703FFUL

#define	_DAC_CTRL_OUTENPRS_DEFAULT 0x00000000UL

#define	_DAC_CTRL_OUTENPRS_MASK 0x40UL

#define	_DAC_CTRL_OUTENPRS_SHIFT 6

#define	_DAC_CTRL_OUTMODE_ADC 0x00000002UL

#define	_DAC_CTRL_OUTMODE_DEFAULT 0x00000001UL

#define	_DAC_CTRL_OUTMODE_DISABLE 0x00000000UL

#define	_DAC_CTRL_OUTMODE_MASK 0x30UL

#define	_DAC_CTRL_OUTMODE_PIN 0x00000001UL

#define	_DAC_CTRL_OUTMODE_PINADC 0x00000003UL

#define	_DAC_CTRL_OUTMODE_SHIFT 4

#define	_DAC_CTRL_PRESC_DEFAULT 0x00000000UL

#define	_DAC_CTRL_PRESC_MASK 0x70000UL

#define	_DAC_CTRL_PRESC_NODIVISION 0x00000000UL

#define	_DAC_CTRL_PRESC_SHIFT 16

#define	_DAC_CTRL_REFRSEL_16CYCLES 0x00000001UL

#define	_DAC_CTRL_REFRSEL_32CYCLES 0x00000002UL

#define	_DAC_CTRL_REFRSEL_64CYCLES 0x00000003UL

#define	_DAC_CTRL_REFRSEL_8CYCLES 0x00000000UL

#define	_DAC_CTRL_REFRSEL_DEFAULT 0x00000000UL

#define	_DAC_CTRL_REFRSEL_MASK 0x300000UL

#define	_DAC_CTRL_REFRSEL_SHIFT 20

#define	_DAC_CTRL_REFSEL_1V25 0x00000000UL

#define	_DAC_CTRL_REFSEL_2V5 0x00000001UL

#define	_DAC_CTRL_REFSEL_DEFAULT 0x00000000UL

#define	_DAC_CTRL_REFSEL_MASK 0x300UL

#define	_DAC_CTRL_REFSEL_SHIFT 8

#define	_DAC_CTRL_REFSEL_VDD 0x00000002UL

#define	_DAC_CTRL_RESETVALUE 0x00000010UL

#define	_DAC_CTRL_SINEMODE_DEFAULT 0x00000000UL

#define	_DAC_CTRL_SINEMODE_MASK 0x2UL

#define	_DAC_CTRL_SINEMODE_SHIFT 1

#define	_DAC_IEN_CH0_DEFAULT 0x00000000UL

#define	_DAC_IEN_CH0_MASK 0x1UL

#define	_DAC_IEN_CH0_SHIFT 0

#define	_DAC_IEN_CH0UF_DEFAULT 0x00000000UL

#define	_DAC_IEN_CH0UF_MASK 0x10UL

#define	_DAC_IEN_CH0UF_SHIFT 4

#define	_DAC_IEN_CH1_DEFAULT 0x00000000UL

#define	_DAC_IEN_CH1_MASK 0x2UL

#define	_DAC_IEN_CH1_SHIFT 1

#define	_DAC_IEN_CH1UF_DEFAULT 0x00000000UL

#define	_DAC_IEN_CH1UF_MASK 0x20UL

#define	_DAC_IEN_CH1UF_SHIFT 5

#define	_DAC_IEN_MASK 0x00000033UL

#define	_DAC_IEN_RESETVALUE 0x00000000UL

#define	_DAC_IF_CH0_DEFAULT 0x00000000UL

#define	_DAC_IF_CH0_MASK 0x1UL

#define	_DAC_IF_CH0_SHIFT 0

#define	_DAC_IF_CH0UF_DEFAULT 0x00000000UL

#define	_DAC_IF_CH0UF_MASK 0x10UL

#define	_DAC_IF_CH0UF_SHIFT 4

#define	_DAC_IF_CH1_DEFAULT 0x00000000UL

#define	_DAC_IF_CH1_MASK 0x2UL

#define	_DAC_IF_CH1_SHIFT 1

#define	_DAC_IF_CH1UF_DEFAULT 0x00000000UL

#define	_DAC_IF_CH1UF_MASK 0x20UL

#define	_DAC_IF_CH1UF_SHIFT 5

#define	_DAC_IF_MASK 0x00000033UL

#define	_DAC_IF_RESETVALUE 0x00000000UL

#define	_DAC_IFC_CH0_DEFAULT 0x00000000UL

#define	_DAC_IFC_CH0_MASK 0x1UL

#define	_DAC_IFC_CH0_SHIFT 0

#define	_DAC_IFC_CH0UF_DEFAULT 0x00000000UL

#define	_DAC_IFC_CH0UF_MASK 0x10UL

#define	_DAC_IFC_CH0UF_SHIFT 4

#define	_DAC_IFC_CH1_DEFAULT 0x00000000UL

#define	_DAC_IFC_CH1_MASK 0x2UL

#define	_DAC_IFC_CH1_SHIFT 1

#define	_DAC_IFC_CH1UF_DEFAULT 0x00000000UL

#define	_DAC_IFC_CH1UF_MASK 0x20UL

#define	_DAC_IFC_CH1UF_SHIFT 5

#define	_DAC_IFC_MASK 0x00000033UL

#define	_DAC_IFC_RESETVALUE 0x00000000UL

#define	_DAC_IFS_CH0_DEFAULT 0x00000000UL

#define	_DAC_IFS_CH0_MASK 0x1UL

#define	_DAC_IFS_CH0_SHIFT 0

#define	_DAC_IFS_CH0UF_DEFAULT 0x00000000UL

#define	_DAC_IFS_CH0UF_MASK 0x10UL

#define	_DAC_IFS_CH0UF_SHIFT 4

#define	_DAC_IFS_CH1_DEFAULT 0x00000000UL

#define	_DAC_IFS_CH1_MASK 0x2UL

#define	_DAC_IFS_CH1_SHIFT 1

#define	_DAC_IFS_CH1UF_DEFAULT 0x00000000UL

#define	_DAC_IFS_CH1UF_MASK 0x20UL

#define	_DAC_IFS_CH1UF_SHIFT 5

#define	_DAC_IFS_MASK 0x00000033UL

#define	_DAC_IFS_RESETVALUE 0x00000000UL

#define	_DAC_OPA0MUX_MASK 0x74C7F737UL

#define	_DAC_OPA0MUX_NEGSEL_DEFAULT 0x00000000UL

#define	_DAC_OPA0MUX_NEGSEL_DISABLE 0x00000000UL

#define	_DAC_OPA0MUX_NEGSEL_MASK 0x30UL

#define	_DAC_OPA0MUX_NEGSEL_NEGPAD 0x00000003UL

#define	_DAC_OPA0MUX_NEGSEL_OPATAP 0x00000002UL

#define	_DAC_OPA0MUX_NEGSEL_SHIFT 4

#define	_DAC_OPA0MUX_NEGSEL_UG 0x00000001UL

#define	_DAC_OPA0MUX_NEXTOUT_DEFAULT 0x00000000UL

#define	_DAC_OPA0MUX_NEXTOUT_MASK 0x4000000UL

#define	_DAC_OPA0MUX_NEXTOUT_SHIFT 26

#define	_DAC_OPA0MUX_NPEN_DEFAULT 0x00000000UL

#define	_DAC_OPA0MUX_NPEN_MASK 0x2000UL

#define	_DAC_OPA0MUX_NPEN_SHIFT 13

#define	_DAC_OPA0MUX_OUTMODE_ALL 0x00000003UL

#define	_DAC_OPA0MUX_OUTMODE_ALT 0x00000002UL

#define	_DAC_OPA0MUX_OUTMODE_DEFAULT 0x00000001UL

#define	_DAC_OPA0MUX_OUTMODE_DISABLE 0x00000000UL

#define	_DAC_OPA0MUX_OUTMODE_MAIN 0x00000001UL

#define	_DAC_OPA0MUX_OUTMODE_MASK 0xC00000UL

#define	_DAC_OPA0MUX_OUTMODE_SHIFT 22

#define	_DAC_OPA0MUX_OUTPEN_DEFAULT 0x00000000UL

#define	_DAC_OPA0MUX_OUTPEN_MASK 0x7C000UL

#define	_DAC_OPA0MUX_OUTPEN_OUT0 0x00000001UL

#define	_DAC_OPA0MUX_OUTPEN_OUT1 0x00000002UL

#define	_DAC_OPA0MUX_OUTPEN_OUT2 0x00000004UL

#define	_DAC_OPA0MUX_OUTPEN_OUT3 0x00000008UL

#define	_DAC_OPA0MUX_OUTPEN_OUT4 0x00000010UL

#define	_DAC_OPA0MUX_OUTPEN_SHIFT 14

#define	_DAC_OPA0MUX_POSSEL_DAC 0x00000001UL

#define	_DAC_OPA0MUX_POSSEL_DEFAULT 0x00000000UL

#define	_DAC_OPA0MUX_POSSEL_DISABLE 0x00000000UL

#define	_DAC_OPA0MUX_POSSEL_MASK 0x7UL

#define	_DAC_OPA0MUX_POSSEL_OPA0INP 0x00000003UL

#define	_DAC_OPA0MUX_POSSEL_OPATAP 0x00000004UL

#define	_DAC_OPA0MUX_POSSEL_POSPAD 0x00000002UL

#define	_DAC_OPA0MUX_POSSEL_SHIFT 0

#define	_DAC_OPA0MUX_PPEN_DEFAULT 0x00000000UL

#define	_DAC_OPA0MUX_PPEN_MASK 0x1000UL

#define	_DAC_OPA0MUX_PPEN_SHIFT 12

#define	_DAC_OPA0MUX_RESETVALUE 0x00400000UL

#define	_DAC_OPA0MUX_RESINMUX_DEFAULT 0x00000000UL

#define	_DAC_OPA0MUX_RESINMUX_DISABLE 0x00000000UL

#define	_DAC_OPA0MUX_RESINMUX_MASK 0x700UL

#define	_DAC_OPA0MUX_RESINMUX_NEGPAD 0x00000002UL

#define	_DAC_OPA0MUX_RESINMUX_OPA0INP 0x00000001UL

#define	_DAC_OPA0MUX_RESINMUX_POSPAD 0x00000003UL

#define	_DAC_OPA0MUX_RESINMUX_SHIFT 8

#define	_DAC_OPA0MUX_RESINMUX_VSS 0x00000004UL

#define	_DAC_OPA0MUX_RESSEL_DEFAULT 0x00000000UL

#define	_DAC_OPA0MUX_RESSEL_MASK 0x70000000UL

#define	_DAC_OPA0MUX_RESSEL_RES0 0x00000000UL

#define	_DAC_OPA0MUX_RESSEL_RES1 0x00000001UL

#define	_DAC_OPA0MUX_RESSEL_RES2 0x00000002UL

#define	_DAC_OPA0MUX_RESSEL_RES3 0x00000003UL

#define	_DAC_OPA0MUX_RESSEL_RES4 0x00000004UL

#define	_DAC_OPA0MUX_RESSEL_RES5 0x00000005UL

#define	_DAC_OPA0MUX_RESSEL_RES6 0x00000006UL

#define	_DAC_OPA0MUX_RESSEL_RES7 0x00000007UL

#define	_DAC_OPA0MUX_RESSEL_SHIFT 28

#define	_DAC_OPA1MUX_MASK 0x74C7F737UL

#define	_DAC_OPA1MUX_NEGSEL_DEFAULT 0x00000000UL

#define	_DAC_OPA1MUX_NEGSEL_DISABLE 0x00000000UL

#define	_DAC_OPA1MUX_NEGSEL_MASK 0x30UL

#define	_DAC_OPA1MUX_NEGSEL_NEGPAD 0x00000003UL

#define	_DAC_OPA1MUX_NEGSEL_OPATAP 0x00000002UL

#define	_DAC_OPA1MUX_NEGSEL_SHIFT 4

#define	_DAC_OPA1MUX_NEGSEL_UG 0x00000001UL

#define	_DAC_OPA1MUX_NEXTOUT_DEFAULT 0x00000000UL

#define	_DAC_OPA1MUX_NEXTOUT_MASK 0x4000000UL

#define	_DAC_OPA1MUX_NEXTOUT_SHIFT 26

#define	_DAC_OPA1MUX_NPEN_DEFAULT 0x00000000UL

#define	_DAC_OPA1MUX_NPEN_MASK 0x2000UL

#define	_DAC_OPA1MUX_NPEN_SHIFT 13

#define	_DAC_OPA1MUX_OUTMODE_ALL 0x00000003UL

#define	_DAC_OPA1MUX_OUTMODE_ALT 0x00000002UL

#define	_DAC_OPA1MUX_OUTMODE_DEFAULT 0x00000000UL

#define	_DAC_OPA1MUX_OUTMODE_DISABLE 0x00000000UL

#define	_DAC_OPA1MUX_OUTMODE_MAIN 0x00000001UL

#define	_DAC_OPA1MUX_OUTMODE_MASK 0xC00000UL

#define	_DAC_OPA1MUX_OUTMODE_SHIFT 22

#define	_DAC_OPA1MUX_OUTPEN_DEFAULT 0x00000000UL

#define	_DAC_OPA1MUX_OUTPEN_MASK 0x7C000UL

#define	_DAC_OPA1MUX_OUTPEN_OUT0 0x00000001UL

#define	_DAC_OPA1MUX_OUTPEN_OUT1 0x00000002UL

#define	_DAC_OPA1MUX_OUTPEN_OUT2 0x00000004UL

#define	_DAC_OPA1MUX_OUTPEN_OUT3 0x00000008UL

#define	_DAC_OPA1MUX_OUTPEN_OUT4 0x00000010UL

#define	_DAC_OPA1MUX_OUTPEN_SHIFT 14

#define	_DAC_OPA1MUX_POSSEL_DAC 0x00000001UL

#define	_DAC_OPA1MUX_POSSEL_DEFAULT 0x00000000UL

#define	_DAC_OPA1MUX_POSSEL_DISABLE 0x00000000UL

#define	_DAC_OPA1MUX_POSSEL_MASK 0x7UL

#define	_DAC_OPA1MUX_POSSEL_OPA0INP 0x00000003UL

#define	_DAC_OPA1MUX_POSSEL_OPATAP 0x00000004UL

#define	_DAC_OPA1MUX_POSSEL_POSPAD 0x00000002UL

#define	_DAC_OPA1MUX_POSSEL_SHIFT 0

#define	_DAC_OPA1MUX_PPEN_DEFAULT 0x00000000UL

#define	_DAC_OPA1MUX_PPEN_MASK 0x1000UL

#define	_DAC_OPA1MUX_PPEN_SHIFT 12

#define	_DAC_OPA1MUX_RESETVALUE 0x00000000UL

#define	_DAC_OPA1MUX_RESINMUX_DEFAULT 0x00000000UL

#define	_DAC_OPA1MUX_RESINMUX_DISABLE 0x00000000UL

#define	_DAC_OPA1MUX_RESINMUX_MASK 0x700UL

#define	_DAC_OPA1MUX_RESINMUX_NEGPAD 0x00000002UL

#define	_DAC_OPA1MUX_RESINMUX_OPA0INP 0x00000001UL

#define	_DAC_OPA1MUX_RESINMUX_POSPAD 0x00000003UL

#define	_DAC_OPA1MUX_RESINMUX_SHIFT 8

#define	_DAC_OPA1MUX_RESINMUX_VSS 0x00000004UL

#define	_DAC_OPA1MUX_RESSEL_DEFAULT 0x00000000UL

#define	_DAC_OPA1MUX_RESSEL_MASK 0x70000000UL

#define	_DAC_OPA1MUX_RESSEL_RES0 0x00000000UL

#define	_DAC_OPA1MUX_RESSEL_RES1 0x00000001UL

#define	_DAC_OPA1MUX_RESSEL_RES2 0x00000002UL

#define	_DAC_OPA1MUX_RESSEL_RES3 0x00000003UL

#define	_DAC_OPA1MUX_RESSEL_RES4 0x00000004UL

#define	_DAC_OPA1MUX_RESSEL_RES5 0x00000005UL

#define	_DAC_OPA1MUX_RESSEL_RES6 0x00000006UL

#define	_DAC_OPA1MUX_RESSEL_RES7 0x00000007UL

#define	_DAC_OPA1MUX_RESSEL_SHIFT 28

#define	_DAC_OPA2MUX_MASK 0x7440F737UL

#define	_DAC_OPA2MUX_NEGSEL_DEFAULT 0x00000000UL

#define	_DAC_OPA2MUX_NEGSEL_DISABLE 0x00000000UL

#define	_DAC_OPA2MUX_NEGSEL_MASK 0x30UL

#define	_DAC_OPA2MUX_NEGSEL_NEGPAD 0x00000003UL

#define	_DAC_OPA2MUX_NEGSEL_OPATAP 0x00000002UL

#define	_DAC_OPA2MUX_NEGSEL_SHIFT 4

#define	_DAC_OPA2MUX_NEGSEL_UG 0x00000001UL

#define	_DAC_OPA2MUX_NEXTOUT_DEFAULT 0x00000000UL

#define	_DAC_OPA2MUX_NEXTOUT_MASK 0x4000000UL

#define	_DAC_OPA2MUX_NEXTOUT_SHIFT 26

#define	_DAC_OPA2MUX_NPEN_DEFAULT 0x00000000UL

#define	_DAC_OPA2MUX_NPEN_MASK 0x2000UL

#define	_DAC_OPA2MUX_NPEN_SHIFT 13

#define	_DAC_OPA2MUX_OUTMODE_DEFAULT 0x00000000UL

#define	_DAC_OPA2MUX_OUTMODE_MASK 0x400000UL

#define	_DAC_OPA2MUX_OUTMODE_SHIFT 22

#define	_DAC_OPA2MUX_OUTPEN_DEFAULT 0x00000000UL

#define	_DAC_OPA2MUX_OUTPEN_MASK 0xC000UL

#define	_DAC_OPA2MUX_OUTPEN_OUT0 0x00000001UL

#define	_DAC_OPA2MUX_OUTPEN_OUT1 0x00000002UL

#define	_DAC_OPA2MUX_OUTPEN_SHIFT 14

#define	_DAC_OPA2MUX_POSSEL_DEFAULT 0x00000000UL

#define	_DAC_OPA2MUX_POSSEL_DISABLE 0x00000000UL

#define	_DAC_OPA2MUX_POSSEL_MASK 0x7UL

#define	_DAC_OPA2MUX_POSSEL_OPA1INP 0x00000003UL

#define	_DAC_OPA2MUX_POSSEL_OPATAP 0x00000004UL

#define	_DAC_OPA2MUX_POSSEL_POSPAD 0x00000002UL

#define	_DAC_OPA2MUX_POSSEL_SHIFT 0

#define	_DAC_OPA2MUX_PPEN_DEFAULT 0x00000000UL

#define	_DAC_OPA2MUX_PPEN_MASK 0x1000UL

#define	_DAC_OPA2MUX_PPEN_SHIFT 12

#define	_DAC_OPA2MUX_RESETVALUE 0x00000000UL

#define	_DAC_OPA2MUX_RESINMUX_DEFAULT 0x00000000UL

#define	_DAC_OPA2MUX_RESINMUX_DISABLE 0x00000000UL

#define	_DAC_OPA2MUX_RESINMUX_MASK 0x700UL

#define	_DAC_OPA2MUX_RESINMUX_NEGPAD 0x00000002UL

#define	_DAC_OPA2MUX_RESINMUX_OPA1INP 0x00000001UL

#define	_DAC_OPA2MUX_RESINMUX_POSPAD 0x00000003UL

#define	_DAC_OPA2MUX_RESINMUX_SHIFT 8

#define	_DAC_OPA2MUX_RESINMUX_VSS 0x00000004UL

#define	_DAC_OPA2MUX_RESSEL_DEFAULT 0x00000000UL

#define	_DAC_OPA2MUX_RESSEL_MASK 0x70000000UL

#define	_DAC_OPA2MUX_RESSEL_RES0 0x00000000UL

#define	_DAC_OPA2MUX_RESSEL_RES1 0x00000001UL

#define	_DAC_OPA2MUX_RESSEL_RES2 0x00000002UL

#define	_DAC_OPA2MUX_RESSEL_RES3 0x00000003UL

#define	_DAC_OPA2MUX_RESSEL_RES4 0x00000004UL

#define	_DAC_OPA2MUX_RESSEL_RES5 0x00000005UL

#define	_DAC_OPA2MUX_RESSEL_RES6 0x00000006UL

#define	_DAC_OPA2MUX_RESSEL_RES7 0x00000007UL

#define	_DAC_OPA2MUX_RESSEL_SHIFT 28

#define	_DAC_OPACTRL_MASK 0x01C3F1C7UL

#define	_DAC_OPACTRL_OPA0EN_DEFAULT 0x00000000UL

#define	_DAC_OPACTRL_OPA0EN_MASK 0x1UL

#define	_DAC_OPACTRL_OPA0EN_SHIFT 0

#define	_DAC_OPACTRL_OPA0HCMDIS_DEFAULT 0x00000000UL

#define	_DAC_OPACTRL_OPA0HCMDIS_MASK 0x40UL

#define	_DAC_OPACTRL_OPA0HCMDIS_SHIFT 6

#define	_DAC_OPACTRL_OPA0LPFDIS_DEFAULT 0x00000000UL

#define	_DAC_OPACTRL_OPA0LPFDIS_MASK 0x3000UL

#define	_DAC_OPACTRL_OPA0LPFDIS_NLPFDIS 0x00000002UL

#define	_DAC_OPACTRL_OPA0LPFDIS_PLPFDIS 0x00000001UL

#define	_DAC_OPACTRL_OPA0LPFDIS_SHIFT 12

#define	_DAC_OPACTRL_OPA0SHORT_DEFAULT 0x00000000UL

#define	_DAC_OPACTRL_OPA0SHORT_MASK 0x400000UL

#define	_DAC_OPACTRL_OPA0SHORT_SHIFT 22

#define	_DAC_OPACTRL_OPA1EN_DEFAULT 0x00000000UL

#define	_DAC_OPACTRL_OPA1EN_MASK 0x2UL

#define	_DAC_OPACTRL_OPA1EN_SHIFT 1

#define	_DAC_OPACTRL_OPA1HCMDIS_DEFAULT 0x00000000UL

#define	_DAC_OPACTRL_OPA1HCMDIS_MASK 0x80UL

#define	_DAC_OPACTRL_OPA1HCMDIS_SHIFT 7

#define	_DAC_OPACTRL_OPA1LPFDIS_DEFAULT 0x00000000UL

#define	_DAC_OPACTRL_OPA1LPFDIS_MASK 0xC000UL

#define	_DAC_OPACTRL_OPA1LPFDIS_NLPFDIS 0x00000002UL

#define	_DAC_OPACTRL_OPA1LPFDIS_PLPFDIS 0x00000001UL

#define	_DAC_OPACTRL_OPA1LPFDIS_SHIFT 14

#define	_DAC_OPACTRL_OPA1SHORT_DEFAULT 0x00000000UL

#define	_DAC_OPACTRL_OPA1SHORT_MASK 0x800000UL

#define	_DAC_OPACTRL_OPA1SHORT_SHIFT 23

#define	_DAC_OPACTRL_OPA2EN_DEFAULT 0x00000000UL

#define	_DAC_OPACTRL_OPA2EN_MASK 0x4UL

#define	_DAC_OPACTRL_OPA2EN_SHIFT 2

#define	_DAC_OPACTRL_OPA2HCMDIS_DEFAULT 0x00000000UL

#define	_DAC_OPACTRL_OPA2HCMDIS_MASK 0x100UL

#define	_DAC_OPACTRL_OPA2HCMDIS_SHIFT 8

#define	_DAC_OPACTRL_OPA2LPFDIS_DEFAULT 0x00000000UL

#define	_DAC_OPACTRL_OPA2LPFDIS_MASK 0x30000UL

#define	_DAC_OPACTRL_OPA2LPFDIS_NLPFDIS 0x00000002UL

#define	_DAC_OPACTRL_OPA2LPFDIS_PLPFDIS 0x00000001UL

#define	_DAC_OPACTRL_OPA2LPFDIS_SHIFT 16

#define	_DAC_OPACTRL_OPA2SHORT_DEFAULT 0x00000000UL

#define	_DAC_OPACTRL_OPA2SHORT_MASK 0x1000000UL

#define	_DAC_OPACTRL_OPA2SHORT_SHIFT 24

#define	_DAC_OPACTRL_RESETVALUE 0x00000000UL

#define	_DAC_OPAOFFSET_MASK 0x0000003FUL

#define	_DAC_OPAOFFSET_OPA2OFFSET_DEFAULT 0x00000020UL

#define	_DAC_OPAOFFSET_OPA2OFFSET_MASK 0x3FUL

#define	_DAC_OPAOFFSET_OPA2OFFSET_SHIFT 0

#define	_DAC_OPAOFFSET_RESETVALUE 0x00000020UL

#define	_DAC_STATUS_CH0DV_DEFAULT 0x00000000UL

#define	_DAC_STATUS_CH0DV_MASK 0x1UL

#define	_DAC_STATUS_CH0DV_SHIFT 0

#define	_DAC_STATUS_CH1DV_DEFAULT 0x00000000UL

#define	_DAC_STATUS_CH1DV_MASK 0x2UL

#define	_DAC_STATUS_CH1DV_SHIFT 1

#define	_DAC_STATUS_MASK 0x00000003UL

#define	_DAC_STATUS_RESETVALUE 0x00000000UL

#define	DAC_BIASPROG_BIASPROG_DEFAULT ( _DAC_BIASPROG_BIASPROG_DEFAULT << 0)

#define	DAC_BIASPROG_HALFBIAS (0x1UL << 6)

#define	DAC_BIASPROG_HALFBIAS_DEFAULT ( _DAC_BIASPROG_HALFBIAS_DEFAULT << 6)

#define	DAC_BIASPROG_OPA2BIASPROG_DEFAULT ( _DAC_BIASPROG_OPA2BIASPROG_DEFAULT << 8)

#define	DAC_BIASPROG_OPA2HALFBIAS (0x1UL << 14)

#define	DAC_BIASPROG_OPA2HALFBIAS_DEFAULT ( _DAC_BIASPROG_OPA2HALFBIAS_DEFAULT << 14)

#define	DAC_CAL_CH0OFFSET_DEFAULT ( _DAC_CAL_CH0OFFSET_DEFAULT << 0)

#define	DAC_CAL_CH1OFFSET_DEFAULT ( _DAC_CAL_CH1OFFSET_DEFAULT << 8)

#define	DAC_CAL_GAIN_DEFAULT ( _DAC_CAL_GAIN_DEFAULT << 16)

#define	DAC_CH0CTRL_EN (0x1UL << 0)

#define	DAC_CH0CTRL_EN_DEFAULT ( _DAC_CH0CTRL_EN_DEFAULT << 0)

#define	DAC_CH0CTRL_PRSEN (0x1UL << 2)

#define	DAC_CH0CTRL_PRSEN_DEFAULT ( _DAC_CH0CTRL_PRSEN_DEFAULT << 2)

#define	DAC_CH0CTRL_PRSSEL_DEFAULT ( _DAC_CH0CTRL_PRSSEL_DEFAULT << 4)

#define	DAC_CH0CTRL_PRSSEL_PRSCH0 ( _DAC_CH0CTRL_PRSSEL_PRSCH0 << 4)

#define	DAC_CH0CTRL_PRSSEL_PRSCH1 ( _DAC_CH0CTRL_PRSSEL_PRSCH1 << 4)

#define	DAC_CH0CTRL_PRSSEL_PRSCH10 ( _DAC_CH0CTRL_PRSSEL_PRSCH10 << 4)

#define	DAC_CH0CTRL_PRSSEL_PRSCH11 ( _DAC_CH0CTRL_PRSSEL_PRSCH11 << 4)

#define	DAC_CH0CTRL_PRSSEL_PRSCH2 ( _DAC_CH0CTRL_PRSSEL_PRSCH2 << 4)

#define	DAC_CH0CTRL_PRSSEL_PRSCH3 ( _DAC_CH0CTRL_PRSSEL_PRSCH3 << 4)

#define	DAC_CH0CTRL_PRSSEL_PRSCH4 ( _DAC_CH0CTRL_PRSSEL_PRSCH4 << 4)

#define	DAC_CH0CTRL_PRSSEL_PRSCH5 ( _DAC_CH0CTRL_PRSSEL_PRSCH5 << 4)

#define	DAC_CH0CTRL_PRSSEL_PRSCH6 ( _DAC_CH0CTRL_PRSSEL_PRSCH6 << 4)

#define	DAC_CH0CTRL_PRSSEL_PRSCH7 ( _DAC_CH0CTRL_PRSSEL_PRSCH7 << 4)

#define	DAC_CH0CTRL_PRSSEL_PRSCH8 ( _DAC_CH0CTRL_PRSSEL_PRSCH8 << 4)

#define	DAC_CH0CTRL_PRSSEL_PRSCH9 ( _DAC_CH0CTRL_PRSSEL_PRSCH9 << 4)

#define	DAC_CH0CTRL_REFREN (0x1UL << 1)

#define	DAC_CH0CTRL_REFREN_DEFAULT ( _DAC_CH0CTRL_REFREN_DEFAULT << 1)

#define	DAC_CH0DATA_DATA_DEFAULT ( _DAC_CH0DATA_DATA_DEFAULT << 0)

#define	DAC_CH1CTRL_EN (0x1UL << 0)

#define	DAC_CH1CTRL_EN_DEFAULT ( _DAC_CH1CTRL_EN_DEFAULT << 0)

#define	DAC_CH1CTRL_PRSEN (0x1UL << 2)

#define	DAC_CH1CTRL_PRSEN_DEFAULT ( _DAC_CH1CTRL_PRSEN_DEFAULT << 2)

#define	DAC_CH1CTRL_PRSSEL_DEFAULT ( _DAC_CH1CTRL_PRSSEL_DEFAULT << 4)

#define	DAC_CH1CTRL_PRSSEL_PRSCH0 ( _DAC_CH1CTRL_PRSSEL_PRSCH0 << 4)

#define	DAC_CH1CTRL_PRSSEL_PRSCH1 ( _DAC_CH1CTRL_PRSSEL_PRSCH1 << 4)

#define	DAC_CH1CTRL_PRSSEL_PRSCH10 ( _DAC_CH1CTRL_PRSSEL_PRSCH10 << 4)

#define	DAC_CH1CTRL_PRSSEL_PRSCH11 ( _DAC_CH1CTRL_PRSSEL_PRSCH11 << 4)

#define	DAC_CH1CTRL_PRSSEL_PRSCH2 ( _DAC_CH1CTRL_PRSSEL_PRSCH2 << 4)

#define	DAC_CH1CTRL_PRSSEL_PRSCH3 ( _DAC_CH1CTRL_PRSSEL_PRSCH3 << 4)

#define	DAC_CH1CTRL_PRSSEL_PRSCH4 ( _DAC_CH1CTRL_PRSSEL_PRSCH4 << 4)

#define	DAC_CH1CTRL_PRSSEL_PRSCH5 ( _DAC_CH1CTRL_PRSSEL_PRSCH5 << 4)

#define	DAC_CH1CTRL_PRSSEL_PRSCH6 ( _DAC_CH1CTRL_PRSSEL_PRSCH6 << 4)

#define	DAC_CH1CTRL_PRSSEL_PRSCH7 ( _DAC_CH1CTRL_PRSSEL_PRSCH7 << 4)

#define	DAC_CH1CTRL_PRSSEL_PRSCH8 ( _DAC_CH1CTRL_PRSSEL_PRSCH8 << 4)

#define	DAC_CH1CTRL_PRSSEL_PRSCH9 ( _DAC_CH1CTRL_PRSSEL_PRSCH9 << 4)

#define	DAC_CH1CTRL_REFREN (0x1UL << 1)

#define	DAC_CH1CTRL_REFREN_DEFAULT ( _DAC_CH1CTRL_REFREN_DEFAULT << 1)

#define	DAC_CH1DATA_DATA_DEFAULT ( _DAC_CH1DATA_DATA_DEFAULT << 0)

#define	DAC_COMBDATA_CH0DATA_DEFAULT ( _DAC_COMBDATA_CH0DATA_DEFAULT << 0)

#define	DAC_COMBDATA_CH1DATA_DEFAULT ( _DAC_COMBDATA_CH1DATA_DEFAULT << 16)

#define	DAC_CTRL_CH0PRESCRST (0x1UL << 7)

#define	DAC_CTRL_CH0PRESCRST_DEFAULT ( _DAC_CTRL_CH0PRESCRST_DEFAULT << 7)

#define	DAC_CTRL_CONVMODE_CONTINUOUS ( _DAC_CTRL_CONVMODE_CONTINUOUS << 2)

#define	DAC_CTRL_CONVMODE_DEFAULT ( _DAC_CTRL_CONVMODE_DEFAULT << 2)

#define	DAC_CTRL_CONVMODE_SAMPLEHOLD ( _DAC_CTRL_CONVMODE_SAMPLEHOLD << 2)

#define	DAC_CTRL_CONVMODE_SAMPLEOFF ( _DAC_CTRL_CONVMODE_SAMPLEOFF << 2)

#define	DAC_CTRL_DIFF (0x1UL << 0)

#define	DAC_CTRL_DIFF_DEFAULT ( _DAC_CTRL_DIFF_DEFAULT << 0)

#define	DAC_CTRL_OUTENPRS (0x1UL << 6)

#define	DAC_CTRL_OUTENPRS_DEFAULT ( _DAC_CTRL_OUTENPRS_DEFAULT << 6)

#define	DAC_CTRL_OUTMODE_ADC ( _DAC_CTRL_OUTMODE_ADC << 4)

#define	DAC_CTRL_OUTMODE_DEFAULT ( _DAC_CTRL_OUTMODE_DEFAULT << 4)

#define	DAC_CTRL_OUTMODE_DISABLE ( _DAC_CTRL_OUTMODE_DISABLE << 4)

#define	DAC_CTRL_OUTMODE_PIN ( _DAC_CTRL_OUTMODE_PIN << 4)

#define	DAC_CTRL_OUTMODE_PINADC ( _DAC_CTRL_OUTMODE_PINADC << 4)

#define	DAC_CTRL_PRESC_DEFAULT ( _DAC_CTRL_PRESC_DEFAULT << 16)

#define	DAC_CTRL_PRESC_NODIVISION ( _DAC_CTRL_PRESC_NODIVISION << 16)

#define	DAC_CTRL_REFRSEL_16CYCLES ( _DAC_CTRL_REFRSEL_16CYCLES << 20)

#define	DAC_CTRL_REFRSEL_32CYCLES ( _DAC_CTRL_REFRSEL_32CYCLES << 20)

#define	DAC_CTRL_REFRSEL_64CYCLES ( _DAC_CTRL_REFRSEL_64CYCLES << 20)

#define	DAC_CTRL_REFRSEL_8CYCLES ( _DAC_CTRL_REFRSEL_8CYCLES << 20)

#define	DAC_CTRL_REFRSEL_DEFAULT ( _DAC_CTRL_REFRSEL_DEFAULT << 20)

#define	DAC_CTRL_REFSEL_1V25 ( _DAC_CTRL_REFSEL_1V25 << 8)

#define	DAC_CTRL_REFSEL_2V5 ( _DAC_CTRL_REFSEL_2V5 << 8)

#define	DAC_CTRL_REFSEL_DEFAULT ( _DAC_CTRL_REFSEL_DEFAULT << 8)

#define	DAC_CTRL_REFSEL_VDD ( _DAC_CTRL_REFSEL_VDD << 8)

#define	DAC_CTRL_SINEMODE (0x1UL << 1)

#define	DAC_CTRL_SINEMODE_DEFAULT ( _DAC_CTRL_SINEMODE_DEFAULT << 1)

#define	DAC_IEN_CH0 (0x1UL << 0)

#define	DAC_IEN_CH0_DEFAULT ( _DAC_IEN_CH0_DEFAULT << 0)

#define	DAC_IEN_CH0UF (0x1UL << 4)

#define	DAC_IEN_CH0UF_DEFAULT ( _DAC_IEN_CH0UF_DEFAULT << 4)

#define	DAC_IEN_CH1 (0x1UL << 1)

#define	DAC_IEN_CH1_DEFAULT ( _DAC_IEN_CH1_DEFAULT << 1)

#define	DAC_IEN_CH1UF (0x1UL << 5)

#define	DAC_IEN_CH1UF_DEFAULT ( _DAC_IEN_CH1UF_DEFAULT << 5)

#define	DAC_IF_CH0 (0x1UL << 0)

#define	DAC_IF_CH0_DEFAULT ( _DAC_IF_CH0_DEFAULT << 0)

#define	DAC_IF_CH0UF (0x1UL << 4)

#define	DAC_IF_CH0UF_DEFAULT ( _DAC_IF_CH0UF_DEFAULT << 4)

#define	DAC_IF_CH1 (0x1UL << 1)

#define	DAC_IF_CH1_DEFAULT ( _DAC_IF_CH1_DEFAULT << 1)

#define	DAC_IF_CH1UF (0x1UL << 5)

#define	DAC_IF_CH1UF_DEFAULT ( _DAC_IF_CH1UF_DEFAULT << 5)

#define	DAC_IFC_CH0 (0x1UL << 0)

#define	DAC_IFC_CH0_DEFAULT ( _DAC_IFC_CH0_DEFAULT << 0)

#define	DAC_IFC_CH0UF (0x1UL << 4)

#define	DAC_IFC_CH0UF_DEFAULT ( _DAC_IFC_CH0UF_DEFAULT << 4)

#define	DAC_IFC_CH1 (0x1UL << 1)

#define	DAC_IFC_CH1_DEFAULT ( _DAC_IFC_CH1_DEFAULT << 1)

#define	DAC_IFC_CH1UF (0x1UL << 5)

#define	DAC_IFC_CH1UF_DEFAULT ( _DAC_IFC_CH1UF_DEFAULT << 5)

#define	DAC_IFS_CH0 (0x1UL << 0)

#define	DAC_IFS_CH0_DEFAULT ( _DAC_IFS_CH0_DEFAULT << 0)

#define	DAC_IFS_CH0UF (0x1UL << 4)

#define	DAC_IFS_CH0UF_DEFAULT ( _DAC_IFS_CH0UF_DEFAULT << 4)

#define	DAC_IFS_CH1 (0x1UL << 1)

#define	DAC_IFS_CH1_DEFAULT ( _DAC_IFS_CH1_DEFAULT << 1)

#define	DAC_IFS_CH1UF (0x1UL << 5)

#define	DAC_IFS_CH1UF_DEFAULT ( _DAC_IFS_CH1UF_DEFAULT << 5)

#define	DAC_OPA0MUX_NEGSEL_DEFAULT ( _DAC_OPA0MUX_NEGSEL_DEFAULT << 4)

#define	DAC_OPA0MUX_NEGSEL_DISABLE ( _DAC_OPA0MUX_NEGSEL_DISABLE << 4)

#define	DAC_OPA0MUX_NEGSEL_NEGPAD ( _DAC_OPA0MUX_NEGSEL_NEGPAD << 4)

#define	DAC_OPA0MUX_NEGSEL_OPATAP ( _DAC_OPA0MUX_NEGSEL_OPATAP << 4)

#define	DAC_OPA0MUX_NEGSEL_UG ( _DAC_OPA0MUX_NEGSEL_UG << 4)

#define	DAC_OPA0MUX_NEXTOUT (0x1UL << 26)

#define	DAC_OPA0MUX_NEXTOUT_DEFAULT ( _DAC_OPA0MUX_NEXTOUT_DEFAULT << 26)

#define	DAC_OPA0MUX_NPEN (0x1UL << 13)

#define	DAC_OPA0MUX_NPEN_DEFAULT ( _DAC_OPA0MUX_NPEN_DEFAULT << 13)

#define	DAC_OPA0MUX_OUTMODE_ALL ( _DAC_OPA0MUX_OUTMODE_ALL << 22)

#define	DAC_OPA0MUX_OUTMODE_ALT ( _DAC_OPA0MUX_OUTMODE_ALT << 22)

#define	DAC_OPA0MUX_OUTMODE_DEFAULT ( _DAC_OPA0MUX_OUTMODE_DEFAULT << 22)

#define	DAC_OPA0MUX_OUTMODE_DISABLE ( _DAC_OPA0MUX_OUTMODE_DISABLE << 22)

#define	DAC_OPA0MUX_OUTMODE_MAIN ( _DAC_OPA0MUX_OUTMODE_MAIN << 22)

#define	DAC_OPA0MUX_OUTPEN_DEFAULT ( _DAC_OPA0MUX_OUTPEN_DEFAULT << 14)

#define	DAC_OPA0MUX_OUTPEN_OUT0 ( _DAC_OPA0MUX_OUTPEN_OUT0 << 14)

#define	DAC_OPA0MUX_OUTPEN_OUT1 ( _DAC_OPA0MUX_OUTPEN_OUT1 << 14)

#define	DAC_OPA0MUX_OUTPEN_OUT2 ( _DAC_OPA0MUX_OUTPEN_OUT2 << 14)

#define	DAC_OPA0MUX_OUTPEN_OUT3 ( _DAC_OPA0MUX_OUTPEN_OUT3 << 14)

#define	DAC_OPA0MUX_OUTPEN_OUT4 ( _DAC_OPA0MUX_OUTPEN_OUT4 << 14)

#define	DAC_OPA0MUX_POSSEL_DAC ( _DAC_OPA0MUX_POSSEL_DAC << 0)

#define	DAC_OPA0MUX_POSSEL_DEFAULT ( _DAC_OPA0MUX_POSSEL_DEFAULT << 0)

#define	DAC_OPA0MUX_POSSEL_DISABLE ( _DAC_OPA0MUX_POSSEL_DISABLE << 0)

#define	DAC_OPA0MUX_POSSEL_OPA0INP ( _DAC_OPA0MUX_POSSEL_OPA0INP << 0)

#define	DAC_OPA0MUX_POSSEL_OPATAP ( _DAC_OPA0MUX_POSSEL_OPATAP << 0)

#define	DAC_OPA0MUX_POSSEL_POSPAD ( _DAC_OPA0MUX_POSSEL_POSPAD << 0)

#define	DAC_OPA0MUX_PPEN (0x1UL << 12)

#define	DAC_OPA0MUX_PPEN_DEFAULT ( _DAC_OPA0MUX_PPEN_DEFAULT << 12)

#define	DAC_OPA0MUX_RESINMUX_DEFAULT ( _DAC_OPA0MUX_RESINMUX_DEFAULT << 8)

#define	DAC_OPA0MUX_RESINMUX_DISABLE ( _DAC_OPA0MUX_RESINMUX_DISABLE << 8)

#define	DAC_OPA0MUX_RESINMUX_NEGPAD ( _DAC_OPA0MUX_RESINMUX_NEGPAD << 8)

#define	DAC_OPA0MUX_RESINMUX_OPA0INP ( _DAC_OPA0MUX_RESINMUX_OPA0INP << 8)

#define	DAC_OPA0MUX_RESINMUX_POSPAD ( _DAC_OPA0MUX_RESINMUX_POSPAD << 8)

#define	DAC_OPA0MUX_RESINMUX_VSS ( _DAC_OPA0MUX_RESINMUX_VSS << 8)

#define	DAC_OPA0MUX_RESSEL_DEFAULT ( _DAC_OPA0MUX_RESSEL_DEFAULT << 28)

#define	DAC_OPA0MUX_RESSEL_RES0 ( _DAC_OPA0MUX_RESSEL_RES0 << 28)

#define	DAC_OPA0MUX_RESSEL_RES1 ( _DAC_OPA0MUX_RESSEL_RES1 << 28)

#define	DAC_OPA0MUX_RESSEL_RES2 ( _DAC_OPA0MUX_RESSEL_RES2 << 28)

#define	DAC_OPA0MUX_RESSEL_RES3 ( _DAC_OPA0MUX_RESSEL_RES3 << 28)

#define	DAC_OPA0MUX_RESSEL_RES4 ( _DAC_OPA0MUX_RESSEL_RES4 << 28)

#define	DAC_OPA0MUX_RESSEL_RES5 ( _DAC_OPA0MUX_RESSEL_RES5 << 28)

#define	DAC_OPA0MUX_RESSEL_RES6 ( _DAC_OPA0MUX_RESSEL_RES6 << 28)

#define	DAC_OPA0MUX_RESSEL_RES7 ( _DAC_OPA0MUX_RESSEL_RES7 << 28)

#define	DAC_OPA1MUX_NEGSEL_DEFAULT ( _DAC_OPA1MUX_NEGSEL_DEFAULT << 4)

#define	DAC_OPA1MUX_NEGSEL_DISABLE ( _DAC_OPA1MUX_NEGSEL_DISABLE << 4)

#define	DAC_OPA1MUX_NEGSEL_NEGPAD ( _DAC_OPA1MUX_NEGSEL_NEGPAD << 4)

#define	DAC_OPA1MUX_NEGSEL_OPATAP ( _DAC_OPA1MUX_NEGSEL_OPATAP << 4)

#define	DAC_OPA1MUX_NEGSEL_UG ( _DAC_OPA1MUX_NEGSEL_UG << 4)

#define	DAC_OPA1MUX_NEXTOUT (0x1UL << 26)

#define	DAC_OPA1MUX_NEXTOUT_DEFAULT ( _DAC_OPA1MUX_NEXTOUT_DEFAULT << 26)

#define	DAC_OPA1MUX_NPEN (0x1UL << 13)

#define	DAC_OPA1MUX_NPEN_DEFAULT ( _DAC_OPA1MUX_NPEN_DEFAULT << 13)

#define	DAC_OPA1MUX_OUTMODE_ALL ( _DAC_OPA1MUX_OUTMODE_ALL << 22)

#define	DAC_OPA1MUX_OUTMODE_ALT ( _DAC_OPA1MUX_OUTMODE_ALT << 22)

#define	DAC_OPA1MUX_OUTMODE_DEFAULT ( _DAC_OPA1MUX_OUTMODE_DEFAULT << 22)

#define	DAC_OPA1MUX_OUTMODE_DISABLE ( _DAC_OPA1MUX_OUTMODE_DISABLE << 22)

#define	DAC_OPA1MUX_OUTMODE_MAIN ( _DAC_OPA1MUX_OUTMODE_MAIN << 22)

#define	DAC_OPA1MUX_OUTPEN_DEFAULT ( _DAC_OPA1MUX_OUTPEN_DEFAULT << 14)

#define	DAC_OPA1MUX_OUTPEN_OUT0 ( _DAC_OPA1MUX_OUTPEN_OUT0 << 14)

#define	DAC_OPA1MUX_OUTPEN_OUT1 ( _DAC_OPA1MUX_OUTPEN_OUT1 << 14)

#define	DAC_OPA1MUX_OUTPEN_OUT2 ( _DAC_OPA1MUX_OUTPEN_OUT2 << 14)

#define	DAC_OPA1MUX_OUTPEN_OUT3 ( _DAC_OPA1MUX_OUTPEN_OUT3 << 14)

#define	DAC_OPA1MUX_OUTPEN_OUT4 ( _DAC_OPA1MUX_OUTPEN_OUT4 << 14)

#define	DAC_OPA1MUX_POSSEL_DAC ( _DAC_OPA1MUX_POSSEL_DAC << 0)

#define	DAC_OPA1MUX_POSSEL_DEFAULT ( _DAC_OPA1MUX_POSSEL_DEFAULT << 0)

#define	DAC_OPA1MUX_POSSEL_DISABLE ( _DAC_OPA1MUX_POSSEL_DISABLE << 0)

#define	DAC_OPA1MUX_POSSEL_OPA0INP ( _DAC_OPA1MUX_POSSEL_OPA0INP << 0)

#define	DAC_OPA1MUX_POSSEL_OPATAP ( _DAC_OPA1MUX_POSSEL_OPATAP << 0)

#define	DAC_OPA1MUX_POSSEL_POSPAD ( _DAC_OPA1MUX_POSSEL_POSPAD << 0)

#define	DAC_OPA1MUX_PPEN (0x1UL << 12)

#define	DAC_OPA1MUX_PPEN_DEFAULT ( _DAC_OPA1MUX_PPEN_DEFAULT << 12)

#define	DAC_OPA1MUX_RESINMUX_DEFAULT ( _DAC_OPA1MUX_RESINMUX_DEFAULT << 8)

#define	DAC_OPA1MUX_RESINMUX_DISABLE ( _DAC_OPA1MUX_RESINMUX_DISABLE << 8)

#define	DAC_OPA1MUX_RESINMUX_NEGPAD ( _DAC_OPA1MUX_RESINMUX_NEGPAD << 8)

#define	DAC_OPA1MUX_RESINMUX_OPA0INP ( _DAC_OPA1MUX_RESINMUX_OPA0INP << 8)

#define	DAC_OPA1MUX_RESINMUX_POSPAD ( _DAC_OPA1MUX_RESINMUX_POSPAD << 8)

#define	DAC_OPA1MUX_RESINMUX_VSS ( _DAC_OPA1MUX_RESINMUX_VSS << 8)

#define	DAC_OPA1MUX_RESSEL_DEFAULT ( _DAC_OPA1MUX_RESSEL_DEFAULT << 28)

#define	DAC_OPA1MUX_RESSEL_RES0 ( _DAC_OPA1MUX_RESSEL_RES0 << 28)

#define	DAC_OPA1MUX_RESSEL_RES1 ( _DAC_OPA1MUX_RESSEL_RES1 << 28)

#define	DAC_OPA1MUX_RESSEL_RES2 ( _DAC_OPA1MUX_RESSEL_RES2 << 28)

#define	DAC_OPA1MUX_RESSEL_RES3 ( _DAC_OPA1MUX_RESSEL_RES3 << 28)

#define	DAC_OPA1MUX_RESSEL_RES4 ( _DAC_OPA1MUX_RESSEL_RES4 << 28)

#define	DAC_OPA1MUX_RESSEL_RES5 ( _DAC_OPA1MUX_RESSEL_RES5 << 28)

#define	DAC_OPA1MUX_RESSEL_RES6 ( _DAC_OPA1MUX_RESSEL_RES6 << 28)

#define	DAC_OPA1MUX_RESSEL_RES7 ( _DAC_OPA1MUX_RESSEL_RES7 << 28)

#define	DAC_OPA2MUX_NEGSEL_DEFAULT ( _DAC_OPA2MUX_NEGSEL_DEFAULT << 4)

#define	DAC_OPA2MUX_NEGSEL_DISABLE ( _DAC_OPA2MUX_NEGSEL_DISABLE << 4)

#define	DAC_OPA2MUX_NEGSEL_NEGPAD ( _DAC_OPA2MUX_NEGSEL_NEGPAD << 4)

#define	DAC_OPA2MUX_NEGSEL_OPATAP ( _DAC_OPA2MUX_NEGSEL_OPATAP << 4)

#define	DAC_OPA2MUX_NEGSEL_UG ( _DAC_OPA2MUX_NEGSEL_UG << 4)

#define	DAC_OPA2MUX_NEXTOUT (0x1UL << 26)

#define	DAC_OPA2MUX_NEXTOUT_DEFAULT ( _DAC_OPA2MUX_NEXTOUT_DEFAULT << 26)

#define	DAC_OPA2MUX_NPEN (0x1UL << 13)

#define	DAC_OPA2MUX_NPEN_DEFAULT ( _DAC_OPA2MUX_NPEN_DEFAULT << 13)

#define	DAC_OPA2MUX_OUTMODE (0x1UL << 22)

#define	DAC_OPA2MUX_OUTMODE_DEFAULT ( _DAC_OPA2MUX_OUTMODE_DEFAULT << 22)

#define	DAC_OPA2MUX_OUTPEN_DEFAULT ( _DAC_OPA2MUX_OUTPEN_DEFAULT << 14)

#define	DAC_OPA2MUX_OUTPEN_OUT0 ( _DAC_OPA2MUX_OUTPEN_OUT0 << 14)

#define	DAC_OPA2MUX_OUTPEN_OUT1 ( _DAC_OPA2MUX_OUTPEN_OUT1 << 14)

#define	DAC_OPA2MUX_POSSEL_DEFAULT ( _DAC_OPA2MUX_POSSEL_DEFAULT << 0)

#define	DAC_OPA2MUX_POSSEL_DISABLE ( _DAC_OPA2MUX_POSSEL_DISABLE << 0)

#define	DAC_OPA2MUX_POSSEL_OPA1INP ( _DAC_OPA2MUX_POSSEL_OPA1INP << 0)

#define	DAC_OPA2MUX_POSSEL_OPATAP ( _DAC_OPA2MUX_POSSEL_OPATAP << 0)

#define	DAC_OPA2MUX_POSSEL_POSPAD ( _DAC_OPA2MUX_POSSEL_POSPAD << 0)

#define	DAC_OPA2MUX_PPEN (0x1UL << 12)

#define	DAC_OPA2MUX_PPEN_DEFAULT ( _DAC_OPA2MUX_PPEN_DEFAULT << 12)

#define	DAC_OPA2MUX_RESINMUX_DEFAULT ( _DAC_OPA2MUX_RESINMUX_DEFAULT << 8)

#define	DAC_OPA2MUX_RESINMUX_DISABLE ( _DAC_OPA2MUX_RESINMUX_DISABLE << 8)

#define	DAC_OPA2MUX_RESINMUX_NEGPAD ( _DAC_OPA2MUX_RESINMUX_NEGPAD << 8)

#define	DAC_OPA2MUX_RESINMUX_OPA1INP ( _DAC_OPA2MUX_RESINMUX_OPA1INP << 8)

#define	DAC_OPA2MUX_RESINMUX_POSPAD ( _DAC_OPA2MUX_RESINMUX_POSPAD << 8)

#define	DAC_OPA2MUX_RESINMUX_VSS ( _DAC_OPA2MUX_RESINMUX_VSS << 8)

#define	DAC_OPA2MUX_RESSEL_DEFAULT ( _DAC_OPA2MUX_RESSEL_DEFAULT << 28)

#define	DAC_OPA2MUX_RESSEL_RES0 ( _DAC_OPA2MUX_RESSEL_RES0 << 28)

#define	DAC_OPA2MUX_RESSEL_RES1 ( _DAC_OPA2MUX_RESSEL_RES1 << 28)

#define	DAC_OPA2MUX_RESSEL_RES2 ( _DAC_OPA2MUX_RESSEL_RES2 << 28)

#define	DAC_OPA2MUX_RESSEL_RES3 ( _DAC_OPA2MUX_RESSEL_RES3 << 28)

#define	DAC_OPA2MUX_RESSEL_RES4 ( _DAC_OPA2MUX_RESSEL_RES4 << 28)

#define	DAC_OPA2MUX_RESSEL_RES5 ( _DAC_OPA2MUX_RESSEL_RES5 << 28)

#define	DAC_OPA2MUX_RESSEL_RES6 ( _DAC_OPA2MUX_RESSEL_RES6 << 28)

#define	DAC_OPA2MUX_RESSEL_RES7 ( _DAC_OPA2MUX_RESSEL_RES7 << 28)

#define	DAC_OPACTRL_OPA0EN (0x1UL << 0)

#define	DAC_OPACTRL_OPA0EN_DEFAULT ( _DAC_OPACTRL_OPA0EN_DEFAULT << 0)

#define	DAC_OPACTRL_OPA0HCMDIS (0x1UL << 6)

#define	DAC_OPACTRL_OPA0HCMDIS_DEFAULT ( _DAC_OPACTRL_OPA0HCMDIS_DEFAULT << 6)

#define	DAC_OPACTRL_OPA0LPFDIS_DEFAULT ( _DAC_OPACTRL_OPA0LPFDIS_DEFAULT << 12)

#define	DAC_OPACTRL_OPA0LPFDIS_NLPFDIS ( _DAC_OPACTRL_OPA0LPFDIS_NLPFDIS << 12)

#define	DAC_OPACTRL_OPA0LPFDIS_PLPFDIS ( _DAC_OPACTRL_OPA0LPFDIS_PLPFDIS << 12)

#define	DAC_OPACTRL_OPA0SHORT (0x1UL << 22)

#define	DAC_OPACTRL_OPA0SHORT_DEFAULT ( _DAC_OPACTRL_OPA0SHORT_DEFAULT << 22)

#define	DAC_OPACTRL_OPA1EN (0x1UL << 1)

#define	DAC_OPACTRL_OPA1EN_DEFAULT ( _DAC_OPACTRL_OPA1EN_DEFAULT << 1)

#define	DAC_OPACTRL_OPA1HCMDIS (0x1UL << 7)

#define	DAC_OPACTRL_OPA1HCMDIS_DEFAULT ( _DAC_OPACTRL_OPA1HCMDIS_DEFAULT << 7)

#define	DAC_OPACTRL_OPA1LPFDIS_DEFAULT ( _DAC_OPACTRL_OPA1LPFDIS_DEFAULT << 14)

#define	DAC_OPACTRL_OPA1LPFDIS_NLPFDIS ( _DAC_OPACTRL_OPA1LPFDIS_NLPFDIS << 14)

#define	DAC_OPACTRL_OPA1LPFDIS_PLPFDIS ( _DAC_OPACTRL_OPA1LPFDIS_PLPFDIS << 14)

#define	DAC_OPACTRL_OPA1SHORT (0x1UL << 23)

#define	DAC_OPACTRL_OPA1SHORT_DEFAULT ( _DAC_OPACTRL_OPA1SHORT_DEFAULT << 23)

#define	DAC_OPACTRL_OPA2EN (0x1UL << 2)

#define	DAC_OPACTRL_OPA2EN_DEFAULT ( _DAC_OPACTRL_OPA2EN_DEFAULT << 2)

#define	DAC_OPACTRL_OPA2HCMDIS (0x1UL << 8)

#define	DAC_OPACTRL_OPA2HCMDIS_DEFAULT ( _DAC_OPACTRL_OPA2HCMDIS_DEFAULT << 8)

#define	DAC_OPACTRL_OPA2LPFDIS_DEFAULT ( _DAC_OPACTRL_OPA2LPFDIS_DEFAULT << 16)

#define	DAC_OPACTRL_OPA2LPFDIS_NLPFDIS ( _DAC_OPACTRL_OPA2LPFDIS_NLPFDIS << 16)

#define	DAC_OPACTRL_OPA2LPFDIS_PLPFDIS ( _DAC_OPACTRL_OPA2LPFDIS_PLPFDIS << 16)

#define	DAC_OPACTRL_OPA2SHORT (0x1UL << 24)

#define	DAC_OPACTRL_OPA2SHORT_DEFAULT ( _DAC_OPACTRL_OPA2SHORT_DEFAULT << 24)

#define	DAC_OPAOFFSET_OPA2OFFSET_DEFAULT ( _DAC_OPAOFFSET_OPA2OFFSET_DEFAULT << 0)

#define	DAC_STATUS_CH0DV (0x1UL << 0)

#define	DAC_STATUS_CH0DV_DEFAULT ( _DAC_STATUS_CH0DV_DEFAULT << 0)

#define	DAC_STATUS_CH1DV (0x1UL << 1)

#define	DAC_STATUS_CH1DV_DEFAULT ( _DAC_STATUS_CH1DV_DEFAULT << 1)

Macro Definition Documentation

#define _DAC_BIASPROG_BIASPROG_DEFAULT 0x00000007UL

Mode DEFAULT for DAC_BIASPROG

Definition at line 402 of file ezr32wg_dac.h .

#define _DAC_BIASPROG_BIASPROG_MASK 0xFUL

Bit mask for DAC_BIASPROG

Definition at line 401 of file ezr32wg_dac.h .

Referenced by OPAMP_Enable() .

#define _DAC_BIASPROG_BIASPROG_SHIFT 0

Shift value for DAC_BIASPROG

Definition at line 400 of file ezr32wg_dac.h .

Referenced by OPAMP_Enable() .

#define _DAC_BIASPROG_HALFBIAS_DEFAULT 0x00000001UL

Mode DEFAULT for DAC_BIASPROG

Definition at line 407 of file ezr32wg_dac.h .

#define _DAC_BIASPROG_HALFBIAS_MASK 0x40UL

Bit mask for DAC_HALFBIAS

Definition at line 406 of file ezr32wg_dac.h .

#define _DAC_BIASPROG_HALFBIAS_SHIFT 6

Shift value for DAC_HALFBIAS

Definition at line 405 of file ezr32wg_dac.h .

#define _DAC_BIASPROG_MASK 0x00004F4FUL

Mask for DAC_BIASPROG

Definition at line 399 of file ezr32wg_dac.h .

#define _DAC_BIASPROG_OPA2BIASPROG_DEFAULT 0x00000007UL

Mode DEFAULT for DAC_BIASPROG

Definition at line 411 of file ezr32wg_dac.h .

#define _DAC_BIASPROG_OPA2BIASPROG_MASK 0xF00UL

Bit mask for DAC_OPA2BIASPROG

Definition at line 410 of file ezr32wg_dac.h .

Referenced by OPAMP_Enable() .

#define _DAC_BIASPROG_OPA2BIASPROG_SHIFT 8

Shift value for DAC_OPA2BIASPROG

Definition at line 409 of file ezr32wg_dac.h .

Referenced by OPAMP_Enable() .

#define _DAC_BIASPROG_OPA2HALFBIAS_DEFAULT 0x00000001UL

Mode DEFAULT for DAC_BIASPROG

Definition at line 416 of file ezr32wg_dac.h .

#define _DAC_BIASPROG_OPA2HALFBIAS_MASK 0x4000UL

Bit mask for DAC_OPA2HALFBIAS

Definition at line 415 of file ezr32wg_dac.h .

#define _DAC_BIASPROG_OPA2HALFBIAS_SHIFT 14

Shift value for DAC_OPA2HALFBIAS

Definition at line 414 of file ezr32wg_dac.h .

#define _DAC_BIASPROG_RESETVALUE 0x00004747UL

Default value for DAC_BIASPROG

Definition at line 398 of file ezr32wg_dac.h .

Referenced by DAC_Reset() .

#define _DAC_CAL_CH0OFFSET_DEFAULT 0x00000000UL

Mode DEFAULT for DAC_CAL

Definition at line 386 of file ezr32wg_dac.h .

#define _DAC_CAL_CH0OFFSET_MASK 0x3FUL

Bit mask for DAC_CH0OFFSET

Definition at line 385 of file ezr32wg_dac.h .

Referenced by OPAMP_Enable() .

#define _DAC_CAL_CH0OFFSET_SHIFT 0

Shift value for DAC_CH0OFFSET

Definition at line 384 of file ezr32wg_dac.h .

Referenced by OPAMP_Enable() .

#define _DAC_CAL_CH1OFFSET_DEFAULT 0x00000000UL

Mode DEFAULT for DAC_CAL

Definition at line 390 of file ezr32wg_dac.h .

#define _DAC_CAL_CH1OFFSET_MASK 0x3F00UL

Bit mask for DAC_CH1OFFSET

Definition at line 389 of file ezr32wg_dac.h .

Referenced by OPAMP_Enable() .

#define _DAC_CAL_CH1OFFSET_SHIFT 8

Shift value for DAC_CH1OFFSET

Definition at line 388 of file ezr32wg_dac.h .

Referenced by OPAMP_Enable() .

#define _DAC_CAL_GAIN_DEFAULT 0x00000040UL

Mode DEFAULT for DAC_CAL

Definition at line 394 of file ezr32wg_dac.h .

#define _DAC_CAL_GAIN_MASK 0x7F0000UL

Bit mask for DAC_GAIN

Definition at line 393 of file ezr32wg_dac.h .

Referenced by OPAMP_Enable() .

#define _DAC_CAL_GAIN_SHIFT 16

Shift value for DAC_GAIN

Definition at line 392 of file ezr32wg_dac.h .

#define _DAC_CAL_MASK 0x007F3F3FUL

Mask for DAC_CAL

Definition at line 383 of file ezr32wg_dac.h .

#define _DAC_CAL_RESETVALUE 0x00400000UL

Default value for DAC_CAL

Definition at line 382 of file ezr32wg_dac.h .

#define _DAC_CH0CTRL_EN_DEFAULT 0x00000000UL

Mode DEFAULT for DAC_CH0CTRL

Definition at line 169 of file ezr32wg_dac.h .

#define _DAC_CH0CTRL_EN_MASK 0x1UL

Bit mask for DAC_EN

Definition at line 168 of file ezr32wg_dac.h .

#define _DAC_CH0CTRL_EN_SHIFT 0

Shift value for DAC_EN

Definition at line 167 of file ezr32wg_dac.h .

Referenced by DAC_Enable() , and DAC_Init() .

#define _DAC_CH0CTRL_MASK 0x000000F7UL

Mask for DAC_CH0CTRL

Definition at line 165 of file ezr32wg_dac.h .

#define _DAC_CH0CTRL_PRSEN_DEFAULT 0x00000000UL

Mode DEFAULT for DAC_CH0CTRL

Definition at line 179 of file ezr32wg_dac.h .

#define _DAC_CH0CTRL_PRSEN_MASK 0x4UL

Bit mask for DAC_PRSEN

Definition at line 178 of file ezr32wg_dac.h .

#define _DAC_CH0CTRL_PRSEN_SHIFT 2

Shift value for DAC_PRSEN

Definition at line 177 of file ezr32wg_dac.h .

#define _DAC_CH0CTRL_PRSSEL_DEFAULT 0x00000000UL

Mode DEFAULT for DAC_CH0CTRL

Definition at line 183 of file ezr32wg_dac.h .

#define _DAC_CH0CTRL_PRSSEL_MASK 0xF0UL

Bit mask for DAC_PRSSEL

Definition at line 182 of file ezr32wg_dac.h .

#define _DAC_CH0CTRL_PRSSEL_PRSCH0 0x00000000UL

Mode PRSCH0 for DAC_CH0CTRL

Definition at line 184 of file ezr32wg_dac.h .

#define _DAC_CH0CTRL_PRSSEL_PRSCH1 0x00000001UL

Mode PRSCH1 for DAC_CH0CTRL

Definition at line 185 of file ezr32wg_dac.h .

#define _DAC_CH0CTRL_PRSSEL_PRSCH10 0x0000000AUL

Mode PRSCH10 for DAC_CH0CTRL

Definition at line 194 of file ezr32wg_dac.h .

#define _DAC_CH0CTRL_PRSSEL_PRSCH11 0x0000000BUL

Mode PRSCH11 for DAC_CH0CTRL

Definition at line 195 of file ezr32wg_dac.h .

#define _DAC_CH0CTRL_PRSSEL_PRSCH2 0x00000002UL

Mode PRSCH2 for DAC_CH0CTRL

Definition at line 186 of file ezr32wg_dac.h .

#define _DAC_CH0CTRL_PRSSEL_PRSCH3 0x00000003UL

Mode PRSCH3 for DAC_CH0CTRL

Definition at line 187 of file ezr32wg_dac.h .

#define _DAC_CH0CTRL_PRSSEL_PRSCH4 0x00000004UL

Mode PRSCH4 for DAC_CH0CTRL

Definition at line 188 of file ezr32wg_dac.h .

#define _DAC_CH0CTRL_PRSSEL_PRSCH5 0x00000005UL

Mode PRSCH5 for DAC_CH0CTRL

Definition at line 189 of file ezr32wg_dac.h .

#define _DAC_CH0CTRL_PRSSEL_PRSCH6 0x00000006UL

Mode PRSCH6 for DAC_CH0CTRL

Definition at line 190 of file ezr32wg_dac.h .

#define _DAC_CH0CTRL_PRSSEL_PRSCH7 0x00000007UL

Mode PRSCH7 for DAC_CH0CTRL

Definition at line 191 of file ezr32wg_dac.h .

#define _DAC_CH0CTRL_PRSSEL_PRSCH8 0x00000008UL

Mode PRSCH8 for DAC_CH0CTRL

Definition at line 192 of file ezr32wg_dac.h .

#define _DAC_CH0CTRL_PRSSEL_PRSCH9 0x00000009UL

Mode PRSCH9 for DAC_CH0CTRL

Definition at line 193 of file ezr32wg_dac.h .

#define _DAC_CH0CTRL_PRSSEL_SHIFT 4

Shift value for DAC_PRSSEL

Definition at line 181 of file ezr32wg_dac.h .

Referenced by DAC_InitChannel() .

#define _DAC_CH0CTRL_REFREN_DEFAULT 0x00000000UL

Mode DEFAULT for DAC_CH0CTRL

Definition at line 174 of file ezr32wg_dac.h .

#define _DAC_CH0CTRL_REFREN_MASK 0x2UL

Bit mask for DAC_REFREN

Definition at line 173 of file ezr32wg_dac.h .

#define _DAC_CH0CTRL_REFREN_SHIFT 1

Shift value for DAC_REFREN

Definition at line 172 of file ezr32wg_dac.h .

#define _DAC_CH0CTRL_RESETVALUE 0x00000000UL

Default value for DAC_CH0CTRL

Definition at line 164 of file ezr32wg_dac.h .

Referenced by DAC_Reset() .

#define _DAC_CH0DATA_DATA_DEFAULT 0x00000000UL

Mode DEFAULT for DAC_CH0DATA

Definition at line 358 of file ezr32wg_dac.h .

#define _DAC_CH0DATA_DATA_MASK 0xFFFUL

Bit mask for DAC_DATA

Definition at line 357 of file ezr32wg_dac.h .

#define _DAC_CH0DATA_DATA_SHIFT 0

Shift value for DAC_DATA

Definition at line 356 of file ezr32wg_dac.h .

#define _DAC_CH0DATA_MASK 0x00000FFFUL

Mask for DAC_CH0DATA

Definition at line 355 of file ezr32wg_dac.h .

Referenced by DAC_Channel0OutputSet() .

#define _DAC_CH0DATA_RESETVALUE 0x00000000UL

Default value for DAC_CH0DATA

Definition at line 354 of file ezr32wg_dac.h .

#define _DAC_CH1CTRL_EN_DEFAULT 0x00000000UL

Mode DEFAULT for DAC_CH1CTRL

Definition at line 216 of file ezr32wg_dac.h .

#define _DAC_CH1CTRL_EN_MASK 0x1UL

Bit mask for DAC_EN

Definition at line 215 of file ezr32wg_dac.h .

#define _DAC_CH1CTRL_EN_SHIFT 0

Shift value for DAC_EN

Definition at line 214 of file ezr32wg_dac.h .

#define _DAC_CH1CTRL_MASK 0x000000F7UL

Mask for DAC_CH1CTRL

Definition at line 212 of file ezr32wg_dac.h .

#define _DAC_CH1CTRL_PRSEN_DEFAULT 0x00000000UL

Mode DEFAULT for DAC_CH1CTRL

Definition at line 226 of file ezr32wg_dac.h .

#define _DAC_CH1CTRL_PRSEN_MASK 0x4UL

Bit mask for DAC_PRSEN

Definition at line 225 of file ezr32wg_dac.h .

#define _DAC_CH1CTRL_PRSEN_SHIFT 2

Shift value for DAC_PRSEN

Definition at line 224 of file ezr32wg_dac.h .

#define _DAC_CH1CTRL_PRSSEL_DEFAULT 0x00000000UL

Mode DEFAULT for DAC_CH1CTRL

Definition at line 230 of file ezr32wg_dac.h .

#define _DAC_CH1CTRL_PRSSEL_MASK 0xF0UL

Bit mask for DAC_PRSSEL

Definition at line 229 of file ezr32wg_dac.h .

#define _DAC_CH1CTRL_PRSSEL_PRSCH0 0x00000000UL

Mode PRSCH0 for DAC_CH1CTRL

Definition at line 231 of file ezr32wg_dac.h .

#define _DAC_CH1CTRL_PRSSEL_PRSCH1 0x00000001UL

Mode PRSCH1 for DAC_CH1CTRL

Definition at line 232 of file ezr32wg_dac.h .

#define _DAC_CH1CTRL_PRSSEL_PRSCH10 0x0000000AUL

Mode PRSCH10 for DAC_CH1CTRL

Definition at line 241 of file ezr32wg_dac.h .

#define _DAC_CH1CTRL_PRSSEL_PRSCH11 0x0000000BUL

Mode PRSCH11 for DAC_CH1CTRL

Definition at line 242 of file ezr32wg_dac.h .

#define _DAC_CH1CTRL_PRSSEL_PRSCH2 0x00000002UL

Mode PRSCH2 for DAC_CH1CTRL

Definition at line 233 of file ezr32wg_dac.h .

#define _DAC_CH1CTRL_PRSSEL_PRSCH3 0x00000003UL

Mode PRSCH3 for DAC_CH1CTRL

Definition at line 234 of file ezr32wg_dac.h .

#define _DAC_CH1CTRL_PRSSEL_PRSCH4 0x00000004UL

Mode PRSCH4 for DAC_CH1CTRL

Definition at line 235 of file ezr32wg_dac.h .

#define _DAC_CH1CTRL_PRSSEL_PRSCH5 0x00000005UL

Mode PRSCH5 for DAC_CH1CTRL

Definition at line 236 of file ezr32wg_dac.h .

#define _DAC_CH1CTRL_PRSSEL_PRSCH6 0x00000006UL

Mode PRSCH6 for DAC_CH1CTRL

Definition at line 237 of file ezr32wg_dac.h .

#define _DAC_CH1CTRL_PRSSEL_PRSCH7 0x00000007UL

Mode PRSCH7 for DAC_CH1CTRL

Definition at line 238 of file ezr32wg_dac.h .

#define _DAC_CH1CTRL_PRSSEL_PRSCH8 0x00000008UL

Mode PRSCH8 for DAC_CH1CTRL

Definition at line 239 of file ezr32wg_dac.h .

#define _DAC_CH1CTRL_PRSSEL_PRSCH9 0x00000009UL

Mode PRSCH9 for DAC_CH1CTRL

Definition at line 240 of file ezr32wg_dac.h .

#define _DAC_CH1CTRL_PRSSEL_SHIFT 4

Shift value for DAC_PRSSEL

Definition at line 228 of file ezr32wg_dac.h .

#define _DAC_CH1CTRL_REFREN_DEFAULT 0x00000000UL

Mode DEFAULT for DAC_CH1CTRL

Definition at line 221 of file ezr32wg_dac.h .

#define _DAC_CH1CTRL_REFREN_MASK 0x2UL

Bit mask for DAC_REFREN

Definition at line 220 of file ezr32wg_dac.h .

#define _DAC_CH1CTRL_REFREN_SHIFT 1

Shift value for DAC_REFREN

Definition at line 219 of file ezr32wg_dac.h .

#define _DAC_CH1CTRL_RESETVALUE 0x00000000UL

Default value for DAC_CH1CTRL

Definition at line 211 of file ezr32wg_dac.h .

Referenced by DAC_Reset() .

#define _DAC_CH1DATA_DATA_DEFAULT 0x00000000UL

Mode DEFAULT for DAC_CH1DATA

Definition at line 366 of file ezr32wg_dac.h .

#define _DAC_CH1DATA_DATA_MASK 0xFFFUL

Bit mask for DAC_DATA

Definition at line 365 of file ezr32wg_dac.h .

#define _DAC_CH1DATA_DATA_SHIFT 0

Shift value for DAC_DATA

Definition at line 364 of file ezr32wg_dac.h .

#define _DAC_CH1DATA_MASK 0x00000FFFUL

Mask for DAC_CH1DATA

Definition at line 363 of file ezr32wg_dac.h .

Referenced by DAC_Channel1OutputSet() .

#define _DAC_CH1DATA_RESETVALUE 0x00000000UL

Default value for DAC_CH1DATA

Definition at line 362 of file ezr32wg_dac.h .

#define _DAC_COMBDATA_CH0DATA_DEFAULT 0x00000000UL

Mode DEFAULT for DAC_COMBDATA

Definition at line 374 of file ezr32wg_dac.h .

#define _DAC_COMBDATA_CH0DATA_MASK 0xFFFUL

Bit mask for DAC_CH0DATA

Definition at line 373 of file ezr32wg_dac.h .

#define _DAC_COMBDATA_CH0DATA_SHIFT 0

Shift value for DAC_CH0DATA

Definition at line 372 of file ezr32wg_dac.h .

#define _DAC_COMBDATA_CH1DATA_DEFAULT 0x00000000UL

Mode DEFAULT for DAC_COMBDATA

Definition at line 378 of file ezr32wg_dac.h .

#define _DAC_COMBDATA_CH1DATA_MASK 0xFFF0000UL

Bit mask for DAC_CH1DATA

Definition at line 377 of file ezr32wg_dac.h .

#define _DAC_COMBDATA_CH1DATA_SHIFT 16

Shift value for DAC_CH1DATA

Definition at line 376 of file ezr32wg_dac.h .

#define _DAC_COMBDATA_MASK 0x0FFF0FFFUL

Mask for DAC_COMBDATA

Definition at line 371 of file ezr32wg_dac.h .

#define _DAC_COMBDATA_RESETVALUE 0x00000000UL

Default value for DAC_COMBDATA

Definition at line 370 of file ezr32wg_dac.h .

#define _DAC_CTRL_CH0PRESCRST_DEFAULT 0x00000000UL

Mode DEFAULT for DAC_CTRL

Definition at line 118 of file ezr32wg_dac.h .

#define _DAC_CTRL_CH0PRESCRST_MASK 0x80UL

Bit mask for DAC_CH0PRESCRST

Definition at line 117 of file ezr32wg_dac.h .

#define _DAC_CTRL_CH0PRESCRST_SHIFT 7

Shift value for DAC_CH0PRESCRST

Definition at line 116 of file ezr32wg_dac.h .

#define _DAC_CTRL_CONVMODE_CONTINUOUS 0x00000000UL

Mode CONTINUOUS for DAC_CTRL

Definition at line 91 of file ezr32wg_dac.h .

#define _DAC_CTRL_CONVMODE_DEFAULT 0x00000000UL

Mode DEFAULT for DAC_CTRL

Definition at line 90 of file ezr32wg_dac.h .

#define _DAC_CTRL_CONVMODE_MASK 0xCUL

Bit mask for DAC_CONVMODE

Definition at line 89 of file ezr32wg_dac.h .

#define _DAC_CTRL_CONVMODE_SAMPLEHOLD 0x00000001UL

Mode SAMPLEHOLD for DAC_CTRL

Definition at line 92 of file ezr32wg_dac.h .

#define _DAC_CTRL_CONVMODE_SAMPLEOFF 0x00000002UL

Mode SAMPLEOFF for DAC_CTRL

Definition at line 93 of file ezr32wg_dac.h .

#define _DAC_CTRL_CONVMODE_SHIFT 2

Shift value for DAC_CONVMODE

Definition at line 88 of file ezr32wg_dac.h .

Referenced by DAC_Init() .

#define _DAC_CTRL_DIFF_DEFAULT 0x00000000UL

Mode DEFAULT for DAC_CTRL

Definition at line 81 of file ezr32wg_dac.h .

#define _DAC_CTRL_DIFF_MASK 0x1UL

Bit mask for DAC_DIFF

Definition at line 80 of file ezr32wg_dac.h .

#define _DAC_CTRL_DIFF_SHIFT 0

Shift value for DAC_DIFF

Definition at line 79 of file ezr32wg_dac.h .

#define _DAC_CTRL_MASK 0x003703FFUL

Mask for DAC_CTRL

Definition at line 77 of file ezr32wg_dac.h .

#define _DAC_CTRL_OUTENPRS_DEFAULT 0x00000000UL

Mode DEFAULT for DAC_CTRL

Definition at line 113 of file ezr32wg_dac.h .

#define _DAC_CTRL_OUTENPRS_MASK 0x40UL

Bit mask for DAC_OUTENPRS

Definition at line 112 of file ezr32wg_dac.h .

#define _DAC_CTRL_OUTENPRS_SHIFT 6

Shift value for DAC_OUTENPRS

Definition at line 111 of file ezr32wg_dac.h .

#define _DAC_CTRL_OUTMODE_ADC 0x00000002UL

Mode ADC for DAC_CTRL

Definition at line 103 of file ezr32wg_dac.h .

#define _DAC_CTRL_OUTMODE_DEFAULT 0x00000001UL

Mode DEFAULT for DAC_CTRL

Definition at line 101 of file ezr32wg_dac.h .

#define _DAC_CTRL_OUTMODE_DISABLE 0x00000000UL

Mode DISABLE for DAC_CTRL

Definition at line 100 of file ezr32wg_dac.h .

#define _DAC_CTRL_OUTMODE_MASK 0x30UL

Bit mask for DAC_OUTMODE

Definition at line 99 of file ezr32wg_dac.h .

#define _DAC_CTRL_OUTMODE_PIN 0x00000001UL

Mode PIN for DAC_CTRL

Definition at line 102 of file ezr32wg_dac.h .

#define _DAC_CTRL_OUTMODE_PINADC 0x00000003UL

Mode PINADC for DAC_CTRL

Definition at line 104 of file ezr32wg_dac.h .

#define _DAC_CTRL_OUTMODE_SHIFT 4

Shift value for DAC_OUTMODE

Definition at line 98 of file ezr32wg_dac.h .

Referenced by DAC_Init() .

#define _DAC_CTRL_PRESC_DEFAULT 0x00000000UL

Mode DEFAULT for DAC_CTRL

Definition at line 132 of file ezr32wg_dac.h .

#define _DAC_CTRL_PRESC_MASK 0x70000UL

Bit mask for DAC_PRESC

Definition at line 131 of file ezr32wg_dac.h .

Referenced by DAC_Init() , and DAC_PrescaleCalc() .

#define _DAC_CTRL_PRESC_NODIVISION 0x00000000UL

Mode NODIVISION for DAC_CTRL

Definition at line 133 of file ezr32wg_dac.h .

#define _DAC_CTRL_PRESC_SHIFT 16

Shift value for DAC_PRESC

Definition at line 130 of file ezr32wg_dac.h .

Referenced by DAC_Init() , and DAC_PrescaleCalc() .

#define _DAC_CTRL_REFRSEL_16CYCLES 0x00000001UL

Mode 16CYCLES for DAC_CTRL

Definition at line 140 of file ezr32wg_dac.h .

#define _DAC_CTRL_REFRSEL_32CYCLES 0x00000002UL

Mode 32CYCLES for DAC_CTRL

Definition at line 141 of file ezr32wg_dac.h .

#define _DAC_CTRL_REFRSEL_64CYCLES 0x00000003UL

Mode 64CYCLES for DAC_CTRL

Definition at line 142 of file ezr32wg_dac.h .

#define _DAC_CTRL_REFRSEL_8CYCLES 0x00000000UL

Mode 8CYCLES for DAC_CTRL

Definition at line 139 of file ezr32wg_dac.h .

#define _DAC_CTRL_REFRSEL_DEFAULT 0x00000000UL

Mode DEFAULT for DAC_CTRL

Definition at line 138 of file ezr32wg_dac.h .

#define _DAC_CTRL_REFRSEL_MASK 0x300000UL

Bit mask for DAC_REFRSEL

Definition at line 137 of file ezr32wg_dac.h .

#define _DAC_CTRL_REFRSEL_SHIFT 20

Shift value for DAC_REFRSEL

Definition at line 136 of file ezr32wg_dac.h .

Referenced by DAC_Init() .

#define _DAC_CTRL_REFSEL_1V25 0x00000000UL

Mode 1V25 for DAC_CTRL

Definition at line 123 of file ezr32wg_dac.h .

#define _DAC_CTRL_REFSEL_2V5 0x00000001UL

Mode 2V5 for DAC_CTRL

Definition at line 124 of file ezr32wg_dac.h .

#define _DAC_CTRL_REFSEL_DEFAULT 0x00000000UL

Mode DEFAULT for DAC_CTRL

Definition at line 122 of file ezr32wg_dac.h .

#define _DAC_CTRL_REFSEL_MASK 0x300UL

Bit mask for DAC_REFSEL

Definition at line 121 of file ezr32wg_dac.h .

#define _DAC_CTRL_REFSEL_SHIFT 8

Shift value for DAC_REFSEL

Definition at line 120 of file ezr32wg_dac.h .

Referenced by DAC_Init() .

#define _DAC_CTRL_REFSEL_VDD 0x00000002UL

Mode VDD for DAC_CTRL

Definition at line 125 of file ezr32wg_dac.h .

#define _DAC_CTRL_RESETVALUE 0x00000010UL

Default value for DAC_CTRL

Definition at line 76 of file ezr32wg_dac.h .

Referenced by DAC_Reset() .

#define _DAC_CTRL_SINEMODE_DEFAULT 0x00000000UL

Mode DEFAULT for DAC_CTRL

Definition at line 86 of file ezr32wg_dac.h .

#define _DAC_CTRL_SINEMODE_MASK 0x2UL

Bit mask for DAC_SINEMODE

Definition at line 85 of file ezr32wg_dac.h .

#define _DAC_CTRL_SINEMODE_SHIFT 1

Shift value for DAC_SINEMODE

Definition at line 84 of file ezr32wg_dac.h .

#define _DAC_IEN_CH0_DEFAULT 0x00000000UL

Mode DEFAULT for DAC_IEN

Definition at line 263 of file ezr32wg_dac.h .

#define _DAC_IEN_CH0_MASK 0x1UL

Bit mask for DAC_CH0

Definition at line 262 of file ezr32wg_dac.h .

#define _DAC_IEN_CH0_SHIFT 0

Shift value for DAC_CH0

Definition at line 261 of file ezr32wg_dac.h .

#define _DAC_IEN_CH0UF_DEFAULT 0x00000000UL

Mode DEFAULT for DAC_IEN

Definition at line 273 of file ezr32wg_dac.h .

#define _DAC_IEN_CH0UF_MASK 0x10UL

Bit mask for DAC_CH0UF

Definition at line 272 of file ezr32wg_dac.h .

#define _DAC_IEN_CH0UF_SHIFT 4

Shift value for DAC_CH0UF

Definition at line 271 of file ezr32wg_dac.h .

#define _DAC_IEN_CH1_DEFAULT 0x00000000UL

Mode DEFAULT for DAC_IEN

Definition at line 268 of file ezr32wg_dac.h .

#define _DAC_IEN_CH1_MASK 0x2UL

Bit mask for DAC_CH1

Definition at line 267 of file ezr32wg_dac.h .

#define _DAC_IEN_CH1_SHIFT 1

Shift value for DAC_CH1

Definition at line 266 of file ezr32wg_dac.h .

#define _DAC_IEN_CH1UF_DEFAULT 0x00000000UL

Mode DEFAULT for DAC_IEN

Definition at line 278 of file ezr32wg_dac.h .

#define _DAC_IEN_CH1UF_MASK 0x20UL

Bit mask for DAC_CH1UF

Definition at line 277 of file ezr32wg_dac.h .

#define _DAC_IEN_CH1UF_SHIFT 5

Shift value for DAC_CH1UF

Definition at line 276 of file ezr32wg_dac.h .

#define _DAC_IEN_MASK 0x00000033UL

Mask for DAC_IEN

Definition at line 259 of file ezr32wg_dac.h .

#define _DAC_IEN_RESETVALUE 0x00000000UL

Default value for DAC_IEN

Definition at line 258 of file ezr32wg_dac.h .

Referenced by DAC_Reset() .

#define _DAC_IF_CH0_DEFAULT 0x00000000UL

Mode DEFAULT for DAC_IF

Definition at line 287 of file ezr32wg_dac.h .

#define _DAC_IF_CH0_MASK 0x1UL

Bit mask for DAC_CH0

Definition at line 286 of file ezr32wg_dac.h .

#define _DAC_IF_CH0_SHIFT 0

Shift value for DAC_CH0

Definition at line 285 of file ezr32wg_dac.h .

#define _DAC_IF_CH0UF_DEFAULT 0x00000000UL

Mode DEFAULT for DAC_IF

Definition at line 297 of file ezr32wg_dac.h .

#define _DAC_IF_CH0UF_MASK 0x10UL

Bit mask for DAC_CH0UF

Definition at line 296 of file ezr32wg_dac.h .

#define _DAC_IF_CH0UF_SHIFT 4

Shift value for DAC_CH0UF

Definition at line 295 of file ezr32wg_dac.h .

#define _DAC_IF_CH1_DEFAULT 0x00000000UL

Mode DEFAULT for DAC_IF

Definition at line 292 of file ezr32wg_dac.h .

#define _DAC_IF_CH1_MASK 0x2UL

Bit mask for DAC_CH1

Definition at line 291 of file ezr32wg_dac.h .

#define _DAC_IF_CH1_SHIFT 1

Shift value for DAC_CH1

Definition at line 290 of file ezr32wg_dac.h .

#define _DAC_IF_CH1UF_DEFAULT 0x00000000UL

Mode DEFAULT for DAC_IF

Definition at line 302 of file ezr32wg_dac.h .

#define _DAC_IF_CH1UF_MASK 0x20UL

Bit mask for DAC_CH1UF

Definition at line 301 of file ezr32wg_dac.h .

#define _DAC_IF_CH1UF_SHIFT 5

Shift value for DAC_CH1UF

Definition at line 300 of file ezr32wg_dac.h .

#define _DAC_IF_MASK 0x00000033UL

Mask for DAC_IF

Definition at line 283 of file ezr32wg_dac.h .

#define _DAC_IF_RESETVALUE 0x00000000UL

Default value for DAC_IF

Definition at line 282 of file ezr32wg_dac.h .

#define _DAC_IFC_CH0_DEFAULT 0x00000000UL

Mode DEFAULT for DAC_IFC

Definition at line 335 of file ezr32wg_dac.h .

#define _DAC_IFC_CH0_MASK 0x1UL

Bit mask for DAC_CH0

Definition at line 334 of file ezr32wg_dac.h .

#define _DAC_IFC_CH0_SHIFT 0

Shift value for DAC_CH0

Definition at line 333 of file ezr32wg_dac.h .

#define _DAC_IFC_CH0UF_DEFAULT 0x00000000UL

Mode DEFAULT for DAC_IFC

Definition at line 345 of file ezr32wg_dac.h .

#define _DAC_IFC_CH0UF_MASK 0x10UL

Bit mask for DAC_CH0UF

Definition at line 344 of file ezr32wg_dac.h .

#define _DAC_IFC_CH0UF_SHIFT 4

Shift value for DAC_CH0UF

Definition at line 343 of file ezr32wg_dac.h .

#define _DAC_IFC_CH1_DEFAULT 0x00000000UL

Mode DEFAULT for DAC_IFC

Definition at line 340 of file ezr32wg_dac.h .

#define _DAC_IFC_CH1_MASK 0x2UL

Bit mask for DAC_CH1

Definition at line 339 of file ezr32wg_dac.h .

#define _DAC_IFC_CH1_SHIFT 1

Shift value for DAC_CH1

Definition at line 338 of file ezr32wg_dac.h .

#define _DAC_IFC_CH1UF_DEFAULT 0x00000000UL

Mode DEFAULT for DAC_IFC

Definition at line 350 of file ezr32wg_dac.h .

#define _DAC_IFC_CH1UF_MASK 0x20UL

Bit mask for DAC_CH1UF

Definition at line 349 of file ezr32wg_dac.h .

#define _DAC_IFC_CH1UF_SHIFT 5

Shift value for DAC_CH1UF

Definition at line 348 of file ezr32wg_dac.h .

#define _DAC_IFC_MASK 0x00000033UL

Mask for DAC_IFC

Definition at line 331 of file ezr32wg_dac.h .

Referenced by DAC_Reset() .

EZR32WG_DAC_BitFieldsDevices

Macros

Macro Definition Documentation