EFM32GG_RTC_BitFieldsDevices
Macro Definition Documentation
| #define _RTC_CNT_CNT_DEFAULT 0x00000000UL |
Mode DEFAULT for RTC_CNT
Definition at line
95
of file
efm32gg_rtc.h
.
| #define _RTC_CNT_CNT_MASK 0xFFFFFFUL |
Bit mask for RTC_CNT
Definition at line
94
of file
efm32gg_rtc.h
.
| #define _RTC_CNT_CNT_SHIFT 0 |
Shift value for RTC_CNT
Definition at line
93
of file
efm32gg_rtc.h
.
| #define _RTC_CNT_MASK 0x00FFFFFFUL |
Mask for RTC_CNT
Definition at line
92
of file
efm32gg_rtc.h
.
| #define _RTC_CNT_RESETVALUE 0x00000000UL |
Default value for RTC_CNT
Definition at line
91
of file
efm32gg_rtc.h
.
| #define _RTC_COMP0_COMP0_DEFAULT 0x00000000UL |
Mode DEFAULT for RTC_COMP0
Definition at line
103
of file
efm32gg_rtc.h
.
| #define _RTC_COMP0_COMP0_MASK 0xFFFFFFUL |
Bit mask for RTC_COMP0
Definition at line
102
of file
efm32gg_rtc.h
.
Referenced by RTC_CompareSet() .
| #define _RTC_COMP0_COMP0_SHIFT 0 |
Shift value for RTC_COMP0
Definition at line
101
of file
efm32gg_rtc.h
.
Referenced by RTC_CompareSet() .
| #define _RTC_COMP0_MASK 0x00FFFFFFUL |
Mask for RTC_COMP0
Definition at line
100
of file
efm32gg_rtc.h
.
| #define _RTC_COMP0_RESETVALUE 0x00000000UL |
Default value for RTC_COMP0
Definition at line
99
of file
efm32gg_rtc.h
.
Referenced by RTC_Reset() .
| #define _RTC_COMP1_COMP1_DEFAULT 0x00000000UL |
Mode DEFAULT for RTC_COMP1
Definition at line
111
of file
efm32gg_rtc.h
.
| #define _RTC_COMP1_COMP1_MASK 0xFFFFFFUL |
Bit mask for RTC_COMP1
Definition at line
110
of file
efm32gg_rtc.h
.
| #define _RTC_COMP1_COMP1_SHIFT 0 |
Shift value for RTC_COMP1
Definition at line
109
of file
efm32gg_rtc.h
.
| #define _RTC_COMP1_MASK 0x00FFFFFFUL |
Mask for RTC_COMP1
Definition at line
108
of file
efm32gg_rtc.h
.
| #define _RTC_COMP1_RESETVALUE 0x00000000UL |
Default value for RTC_COMP1
Definition at line
107
of file
efm32gg_rtc.h
.
Referenced by RTC_Reset() .
| #define _RTC_CTRL_COMP0TOP_DEFAULT 0x00000000UL |
Mode DEFAULT for RTC_CTRL
Definition at line
83
of file
efm32gg_rtc.h
.
| #define _RTC_CTRL_COMP0TOP_DISABLE 0x00000000UL |
Mode DISABLE for RTC_CTRL
Definition at line
84
of file
efm32gg_rtc.h
.
| #define _RTC_CTRL_COMP0TOP_ENABLE 0x00000001UL |
Mode ENABLE for RTC_CTRL
Definition at line
85
of file
efm32gg_rtc.h
.
| #define _RTC_CTRL_COMP0TOP_MASK 0x4UL |
Bit mask for RTC_COMP0TOP
Definition at line
82
of file
efm32gg_rtc.h
.
| #define _RTC_CTRL_COMP0TOP_SHIFT 2 |
Shift value for RTC_COMP0TOP
Definition at line
81
of file
efm32gg_rtc.h
.
| #define _RTC_CTRL_DEBUGRUN_DEFAULT 0x00000000UL |
Mode DEFAULT for RTC_CTRL
Definition at line
78
of file
efm32gg_rtc.h
.
| #define _RTC_CTRL_DEBUGRUN_MASK 0x2UL |
Bit mask for RTC_DEBUGRUN
Definition at line
77
of file
efm32gg_rtc.h
.
| #define _RTC_CTRL_DEBUGRUN_SHIFT 1 |
Shift value for RTC_DEBUGRUN
Definition at line
76
of file
efm32gg_rtc.h
.
| #define _RTC_CTRL_EN_DEFAULT 0x00000000UL |
Mode DEFAULT for RTC_CTRL
Definition at line
73
of file
efm32gg_rtc.h
.
| #define _RTC_CTRL_EN_MASK 0x1UL |
Bit mask for RTC_EN
Definition at line
72
of file
efm32gg_rtc.h
.
| #define _RTC_CTRL_EN_SHIFT 0 |
| #define _RTC_CTRL_MASK 0x00000007UL |
Mask for RTC_CTRL
Definition at line
69
of file
efm32gg_rtc.h
.
| #define _RTC_CTRL_RESETVALUE 0x00000000UL |
Default value for RTC_CTRL
Definition at line
68
of file
efm32gg_rtc.h
.
Referenced by RTC_Reset() , and UDELAY_Calibrate() .
| #define _RTC_FREEZE_MASK 0x00000001UL |
Mask for RTC_FREEZE
Definition at line
192
of file
efm32gg_rtc.h
.
| #define _RTC_FREEZE_REGFREEZE_DEFAULT 0x00000000UL |
Mode DEFAULT for RTC_FREEZE
Definition at line
196
of file
efm32gg_rtc.h
.
| #define _RTC_FREEZE_REGFREEZE_FREEZE 0x00000001UL |
Mode FREEZE for RTC_FREEZE
Definition at line
198
of file
efm32gg_rtc.h
.
| #define _RTC_FREEZE_REGFREEZE_MASK 0x1UL |
Bit mask for RTC_REGFREEZE
Definition at line
195
of file
efm32gg_rtc.h
.
| #define _RTC_FREEZE_REGFREEZE_SHIFT 0 |
Shift value for RTC_REGFREEZE
Definition at line
194
of file
efm32gg_rtc.h
.
| #define _RTC_FREEZE_REGFREEZE_UPDATE 0x00000000UL |
Mode UPDATE for RTC_FREEZE
Definition at line
197
of file
efm32gg_rtc.h
.
| #define _RTC_FREEZE_RESETVALUE 0x00000000UL |
Default value for RTC_FREEZE
Definition at line
191
of file
efm32gg_rtc.h
.
Referenced by RTC_Reset() .
| #define _RTC_IEN_COMP0_DEFAULT 0x00000000UL |
Mode DEFAULT for RTC_IEN
Definition at line
182
of file
efm32gg_rtc.h
.
| #define _RTC_IEN_COMP0_MASK 0x2UL |
Bit mask for RTC_COMP0
Definition at line
181
of file
efm32gg_rtc.h
.
| #define _RTC_IEN_COMP0_SHIFT 1 |
Shift value for RTC_COMP0
Definition at line
180
of file
efm32gg_rtc.h
.
| #define _RTC_IEN_COMP1_DEFAULT 0x00000000UL |
Mode DEFAULT for RTC_IEN
Definition at line
187
of file
efm32gg_rtc.h
.
| #define _RTC_IEN_COMP1_MASK 0x4UL |
Bit mask for RTC_COMP1
Definition at line
186
of file
efm32gg_rtc.h
.
| #define _RTC_IEN_COMP1_SHIFT 2 |
Shift value for RTC_COMP1
Definition at line
185
of file
efm32gg_rtc.h
.
| #define _RTC_IEN_MASK 0x00000007UL |
| #define _RTC_IEN_OF_DEFAULT 0x00000000UL |
Mode DEFAULT for RTC_IEN
Definition at line
177
of file
efm32gg_rtc.h
.
| #define _RTC_IEN_OF_MASK 0x1UL |
Bit mask for RTC_OF
Definition at line
176
of file
efm32gg_rtc.h
.
| #define _RTC_IEN_OF_SHIFT 0 |
Shift value for RTC_OF
Definition at line
175
of file
efm32gg_rtc.h
.
| #define _RTC_IEN_RESETVALUE 0x00000000UL |
Default value for RTC_IEN
Definition at line
172
of file
efm32gg_rtc.h
.
Referenced by RTC_Reset() .
| #define _RTC_IF_COMP0_DEFAULT 0x00000000UL |
Mode DEFAULT for RTC_IF
Definition at line
125
of file
efm32gg_rtc.h
.
| #define _RTC_IF_COMP0_MASK 0x2UL |
Bit mask for RTC_COMP0
Definition at line
124
of file
efm32gg_rtc.h
.
| #define _RTC_IF_COMP0_SHIFT 1 |
Shift value for RTC_COMP0
Definition at line
123
of file
efm32gg_rtc.h
.
| #define _RTC_IF_COMP1_DEFAULT 0x00000000UL |
Mode DEFAULT for RTC_IF
Definition at line
130
of file
efm32gg_rtc.h
.
| #define _RTC_IF_COMP1_MASK 0x4UL |
Bit mask for RTC_COMP1
Definition at line
129
of file
efm32gg_rtc.h
.
| #define _RTC_IF_COMP1_SHIFT 2 |
Shift value for RTC_COMP1
Definition at line
128
of file
efm32gg_rtc.h
.
| #define _RTC_IF_MASK 0x00000007UL |
Mask for RTC_IF
Definition at line
116
of file
efm32gg_rtc.h
.
| #define _RTC_IF_OF_DEFAULT 0x00000000UL |
Mode DEFAULT for RTC_IF
Definition at line
120
of file
efm32gg_rtc.h
.
| #define _RTC_IF_OF_MASK 0x1UL |
Bit mask for RTC_OF
Definition at line
119
of file
efm32gg_rtc.h
.
| #define _RTC_IF_OF_SHIFT 0 |
Shift value for RTC_OF
Definition at line
118
of file
efm32gg_rtc.h
.
| #define _RTC_IF_RESETVALUE 0x00000000UL |
Default value for RTC_IF
Definition at line
115
of file
efm32gg_rtc.h
.
| #define _RTC_IFC_COMP0_DEFAULT 0x00000000UL |
Mode DEFAULT for RTC_IFC
Definition at line
163
of file
efm32gg_rtc.h
.
| #define _RTC_IFC_COMP0_MASK 0x2UL |
Bit mask for RTC_COMP0
Definition at line
162
of file
efm32gg_rtc.h
.
| #define _RTC_IFC_COMP0_SHIFT 1 |
Shift value for RTC_COMP0
Definition at line
161
of file
efm32gg_rtc.h
.
| #define _RTC_IFC_COMP1_DEFAULT 0x00000000UL |
Mode DEFAULT for RTC_IFC
Definition at line
168
of file
efm32gg_rtc.h
.
| #define _RTC_IFC_COMP1_MASK 0x4UL |
Bit mask for RTC_COMP1
Definition at line
167
of file
efm32gg_rtc.h
.
| #define _RTC_IFC_COMP1_SHIFT 2 |
Shift value for RTC_COMP1
Definition at line
166
of file
efm32gg_rtc.h
.
| #define _RTC_IFC_MASK 0x00000007UL |
Mask for RTC_IFC
Definition at line
154
of file
efm32gg_rtc.h
.
| #define _RTC_IFC_OF_DEFAULT 0x00000000UL |
Mode DEFAULT for RTC_IFC
Definition at line
158
of file
efm32gg_rtc.h
.
| #define _RTC_IFC_OF_MASK 0x1UL |
Bit mask for RTC_OF
Definition at line
157
of file
efm32gg_rtc.h
.
| #define _RTC_IFC_OF_SHIFT 0 |
Shift value for RTC_OF
Definition at line
156
of file
efm32gg_rtc.h
.
| #define _RTC_IFC_RESETVALUE 0x00000000UL |
Default value for RTC_IFC
Definition at line
153
of file
efm32gg_rtc.h
.
Referenced by RTC_Reset() .
| #define _RTC_IFS_COMP0_DEFAULT 0x00000000UL |
Mode DEFAULT for RTC_IFS
Definition at line
144
of file
efm32gg_rtc.h
.
| #define _RTC_IFS_COMP0_MASK 0x2UL |
Bit mask for RTC_COMP0
Definition at line
143
of file
efm32gg_rtc.h
.
| #define _RTC_IFS_COMP0_SHIFT 1 |
Shift value for RTC_COMP0
Definition at line
142
of file
efm32gg_rtc.h
.
| #define _RTC_IFS_COMP1_DEFAULT 0x00000000UL |
Mode DEFAULT for RTC_IFS
Definition at line
149
of file
efm32gg_rtc.h
.
| #define _RTC_IFS_COMP1_MASK 0x4UL |
Bit mask for RTC_COMP1
Definition at line
148
of file
efm32gg_rtc.h
.
| #define _RTC_IFS_COMP1_SHIFT 2 |
Shift value for RTC_COMP1
Definition at line
147
of file
efm32gg_rtc.h
.
| #define _RTC_IFS_MASK 0x00000007UL |
Mask for RTC_IFS
Definition at line
135
of file
efm32gg_rtc.h
.
| #define _RTC_IFS_OF_DEFAULT 0x00000000UL |
Mode DEFAULT for RTC_IFS
Definition at line
139
of file
efm32gg_rtc.h
.
| #define _RTC_IFS_OF_MASK 0x1UL |
Bit mask for RTC_OF
Definition at line
138
of file
efm32gg_rtc.h
.
| #define _RTC_IFS_OF_SHIFT 0 |
Shift value for RTC_OF
Definition at line
137
of file
efm32gg_rtc.h
.
| #define _RTC_IFS_RESETVALUE 0x00000000UL |
Default value for RTC_IFS
Definition at line
134
of file
efm32gg_rtc.h
.
| #define _RTC_SYNCBUSY_COMP0_DEFAULT 0x00000000UL |
Mode DEFAULT for RTC_SYNCBUSY
Definition at line
214
of file
efm32gg_rtc.h
.
| #define _RTC_SYNCBUSY_COMP0_MASK 0x2UL |
Bit mask for RTC_COMP0
Definition at line
213
of file
efm32gg_rtc.h
.
| #define _RTC_SYNCBUSY_COMP0_SHIFT 1 |
Shift value for RTC_COMP0
Definition at line
212
of file
efm32gg_rtc.h
.
| #define _RTC_SYNCBUSY_COMP1_DEFAULT 0x00000000UL |
Mode DEFAULT for RTC_SYNCBUSY
Definition at line
219
of file
efm32gg_rtc.h
.
| #define _RTC_SYNCBUSY_COMP1_MASK 0x4UL |
Bit mask for RTC_COMP1
Definition at line
218
of file
efm32gg_rtc.h
.
| #define _RTC_SYNCBUSY_COMP1_SHIFT 2 |
Shift value for RTC_COMP1
Definition at line
217
of file
efm32gg_rtc.h
.
| #define _RTC_SYNCBUSY_CTRL_DEFAULT 0x00000000UL |
Mode DEFAULT for RTC_SYNCBUSY
Definition at line
209
of file
efm32gg_rtc.h
.
| #define _RTC_SYNCBUSY_CTRL_MASK 0x1UL |
Bit mask for RTC_CTRL
Definition at line
208
of file
efm32gg_rtc.h
.
| #define _RTC_SYNCBUSY_CTRL_SHIFT 0 |
Shift value for RTC_CTRL
Definition at line
207
of file
efm32gg_rtc.h
.
| #define _RTC_SYNCBUSY_MASK 0x00000007UL |
Mask for RTC_SYNCBUSY
Definition at line
205
of file
efm32gg_rtc.h
.
| #define _RTC_SYNCBUSY_RESETVALUE 0x00000000UL |
Default value for RTC_SYNCBUSY
Definition at line
204
of file
efm32gg_rtc.h
.
| #define RTC_CNT_CNT_DEFAULT ( _RTC_CNT_CNT_DEFAULT << 0) |
Shifted mode DEFAULT for RTC_CNT
Definition at line
96
of file
efm32gg_rtc.h
.
| #define RTC_COMP0_COMP0_DEFAULT ( _RTC_COMP0_COMP0_DEFAULT << 0) |
Shifted mode DEFAULT for RTC_COMP0
Definition at line
104
of file
efm32gg_rtc.h
.
| #define RTC_COMP1_COMP1_DEFAULT ( _RTC_COMP1_COMP1_DEFAULT << 0) |
Shifted mode DEFAULT for RTC_COMP1
Definition at line
112
of file
efm32gg_rtc.h
.
| #define RTC_CTRL_COMP0TOP (0x1UL << 2) |
Compare Channel 0 is Top Value
Definition at line
80
of file
efm32gg_rtc.h
.
Referenced by RTC_Init() .
| #define RTC_CTRL_COMP0TOP_DEFAULT ( _RTC_CTRL_COMP0TOP_DEFAULT << 2) |
Shifted mode DEFAULT for RTC_CTRL
Definition at line
86
of file
efm32gg_rtc.h
.
| #define RTC_CTRL_COMP0TOP_DISABLE ( _RTC_CTRL_COMP0TOP_DISABLE << 2) |
Shifted mode DISABLE for RTC_CTRL
Definition at line
87
of file
efm32gg_rtc.h
.
| #define RTC_CTRL_COMP0TOP_ENABLE ( _RTC_CTRL_COMP0TOP_ENABLE << 2) |
Shifted mode ENABLE for RTC_CTRL
Definition at line
88
of file
efm32gg_rtc.h
.
| #define RTC_CTRL_DEBUGRUN (0x1UL << 1) |
| #define RTC_CTRL_DEBUGRUN_DEFAULT ( _RTC_CTRL_DEBUGRUN_DEFAULT << 1) |
Shifted mode DEFAULT for RTC_CTRL
Definition at line
79
of file
efm32gg_rtc.h
.
| #define RTC_CTRL_EN (0x1UL << 0) |
RTC Enable
Definition at line
70
of file
efm32gg_rtc.h
.
Referenced by RTC_Init() , and UDELAY_Calibrate() .
| #define RTC_CTRL_EN_DEFAULT ( _RTC_CTRL_EN_DEFAULT << 0) |
Shifted mode DEFAULT for RTC_CTRL
Definition at line
74
of file
efm32gg_rtc.h
.
| #define RTC_FREEZE_REGFREEZE (0x1UL << 0) |
Register Update Freeze
Definition at line
193
of file
efm32gg_rtc.h
.
Referenced by RTC_FreezeEnable() .
| #define RTC_FREEZE_REGFREEZE_DEFAULT ( _RTC_FREEZE_REGFREEZE_DEFAULT << 0) |
Shifted mode DEFAULT for RTC_FREEZE
Definition at line
199
of file
efm32gg_rtc.h
.
| #define RTC_FREEZE_REGFREEZE_FREEZE ( _RTC_FREEZE_REGFREEZE_FREEZE << 0) |
Shifted mode FREEZE for RTC_FREEZE
Definition at line
201
of file
efm32gg_rtc.h
.
| #define RTC_FREEZE_REGFREEZE_UPDATE ( _RTC_FREEZE_REGFREEZE_UPDATE << 0) |
Shifted mode UPDATE for RTC_FREEZE
Definition at line
200
of file
efm32gg_rtc.h
.
| #define RTC_IEN_COMP0 (0x1UL << 1) |
Compare Match 0 Interrupt Enable
Definition at line
179
of file
efm32gg_rtc.h
.
| #define RTC_IEN_COMP0_DEFAULT ( _RTC_IEN_COMP0_DEFAULT << 1) |
Shifted mode DEFAULT for RTC_IEN
Definition at line
183
of file
efm32gg_rtc.h
.
| #define RTC_IEN_COMP1 (0x1UL << 2) |
Compare Match 1 Interrupt Enable
Definition at line
184
of file
efm32gg_rtc.h
.
| #define RTC_IEN_COMP1_DEFAULT ( _RTC_IEN_COMP1_DEFAULT << 2) |
Shifted mode DEFAULT for RTC_IEN
Definition at line
188
of file
efm32gg_rtc.h
.
| #define RTC_IEN_OF (0x1UL << 0) |
Overflow Interrupt Enable
Definition at line
174
of file
efm32gg_rtc.h
.
| #define RTC_IEN_OF_DEFAULT ( _RTC_IEN_OF_DEFAULT << 0) |
Shifted mode DEFAULT for RTC_IEN
Definition at line
178
of file
efm32gg_rtc.h
.
| #define RTC_IF_COMP0 (0x1UL << 1) |
Compare Match 0 Interrupt Flag
Definition at line
122
of file
efm32gg_rtc.h
.
| #define RTC_IF_COMP0_DEFAULT ( _RTC_IF_COMP0_DEFAULT << 1) |
Shifted mode DEFAULT for RTC_IF
Definition at line
126
of file
efm32gg_rtc.h
.
| #define RTC_IF_COMP1 (0x1UL << 2) |
Compare Match 1 Interrupt Flag
Definition at line
127
of file
efm32gg_rtc.h
.
| #define RTC_IF_COMP1_DEFAULT ( _RTC_IF_COMP1_DEFAULT << 2) |
Shifted mode DEFAULT for RTC_IF
Definition at line
131
of file
efm32gg_rtc.h
.
| #define RTC_IF_OF (0x1UL << 0) |
Overflow Interrupt Flag
Definition at line
117
of file
efm32gg_rtc.h
.
| #define RTC_IF_OF_DEFAULT ( _RTC_IF_OF_DEFAULT << 0) |
Shifted mode DEFAULT for RTC_IF
Definition at line
121
of file
efm32gg_rtc.h
.
| #define RTC_IFC_COMP0 (0x1UL << 1) |
Clear Compare match 0 Interrupt Flag
Definition at line
160
of file
efm32gg_rtc.h
.
| #define RTC_IFC_COMP0_DEFAULT ( _RTC_IFC_COMP0_DEFAULT << 1) |
Shifted mode DEFAULT for RTC_IFC
Definition at line
164
of file
efm32gg_rtc.h
.
| #define RTC_IFC_COMP1 (0x1UL << 2) |
Clear Compare match 1 Interrupt Flag
Definition at line
165
of file
efm32gg_rtc.h
.
| #define RTC_IFC_COMP1_DEFAULT ( _RTC_IFC_COMP1_DEFAULT << 2) |
Shifted mode DEFAULT for RTC_IFC
Definition at line
169
of file
efm32gg_rtc.h
.
| #define RTC_IFC_OF (0x1UL << 0) |
Clear Overflow Interrupt Flag
Definition at line
155
of file
efm32gg_rtc.h
.
| #define RTC_IFC_OF_DEFAULT ( _RTC_IFC_OF_DEFAULT << 0) |
Shifted mode DEFAULT for RTC_IFC
Definition at line
159
of file
efm32gg_rtc.h
.
| #define RTC_IFS_COMP0 (0x1UL << 1) |
Set Compare match 0 Interrupt Flag
Definition at line
141
of file
efm32gg_rtc.h
.
| #define RTC_IFS_COMP0_DEFAULT ( _RTC_IFS_COMP0_DEFAULT << 1) |
Shifted mode DEFAULT for RTC_IFS
Definition at line
145
of file
efm32gg_rtc.h
.
| #define RTC_IFS_COMP1 (0x1UL << 2) |
Set Compare match 1 Interrupt Flag
Definition at line
146
of file
efm32gg_rtc.h
.
| #define RTC_IFS_COMP1_DEFAULT ( _RTC_IFS_COMP1_DEFAULT << 2) |
Shifted mode DEFAULT for RTC_IFS
Definition at line
150
of file
efm32gg_rtc.h
.
| #define RTC_IFS_OF (0x1UL << 0) |
Set Overflow Interrupt Flag
Definition at line
136
of file
efm32gg_rtc.h
.
| #define RTC_IFS_OF_DEFAULT ( _RTC_IFS_OF_DEFAULT << 0) |
Shifted mode DEFAULT for RTC_IFS
Definition at line
140
of file
efm32gg_rtc.h
.
| #define RTC_SYNCBUSY_COMP0 (0x1UL << 1) |
COMP0 Register Busy
Definition at line
211
of file
efm32gg_rtc.h
.
Referenced by RTC_CompareSet() , RTC_Reset() , and UDELAY_Calibrate() .
| #define RTC_SYNCBUSY_COMP0_DEFAULT ( _RTC_SYNCBUSY_COMP0_DEFAULT << 1) |
Shifted mode DEFAULT for RTC_SYNCBUSY
Definition at line
215
of file
efm32gg_rtc.h
.
| #define RTC_SYNCBUSY_COMP1 (0x1UL << 2) |
COMP1 Register Busy
Definition at line
216
of file
efm32gg_rtc.h
.
Referenced by RTC_CompareSet() , RTC_Reset() , and UDELAY_Calibrate() .
| #define RTC_SYNCBUSY_COMP1_DEFAULT ( _RTC_SYNCBUSY_COMP1_DEFAULT << 2) |
Shifted mode DEFAULT for RTC_SYNCBUSY
Definition at line
220
of file
efm32gg_rtc.h
.
| #define RTC_SYNCBUSY_CTRL (0x1UL << 0) |
CTRL Register Busy
Definition at line
206
of file
efm32gg_rtc.h
.
Referenced by RTC_Enable() , RTC_Init() , RTC_Reset() , and UDELAY_Calibrate() .
| #define RTC_SYNCBUSY_CTRL_DEFAULT ( _RTC_SYNCBUSY_CTRL_DEFAULT << 0) |
Shifted mode DEFAULT for RTC_SYNCBUSY
Definition at line
210
of file
efm32gg_rtc.h
.