PRS_TypeDef Struct ReferenceDevices > PRS
PRS Register Declaration
Definition at line
49
of file
efm32tg11b_prs.h
.
#include <
efm32tg11b_prs.h
>
Data Fields |
|
| PRS_CH_TypeDef | CH [8U] |
| __IOM uint32_t | CTRL |
| __IOM uint32_t | DMAREQ0 |
| __IOM uint32_t | DMAREQ1 |
| __IM uint32_t | PEEK |
| uint32_t | RESERVED0 [1U] |
| uint32_t | RESERVED1 [6U] |
| uint32_t | RESERVED2 [1U] |
| uint32_t | RESERVED3 [3U] |
| uint32_t | RESERVED4 [36U] |
| __IOM uint32_t | ROUTELOC0 |
| __IOM uint32_t | ROUTELOC1 |
| __IOM uint32_t | ROUTEPEN |
| __IOM uint32_t | SWLEVEL |
| __IOM uint32_t | SWPULSE |
| __IOM uint32_t | TRACECTRL |
Field Documentation
| PRS_CH_TypeDef PRS_TypeDef::CH[8U] |
Channel registers
Definition at line
65
of file
efm32tg11b_prs.h
.
| __IOM uint32_t PRS_TypeDef::CTRL |
Control Register
Definition at line
58
of file
efm32tg11b_prs.h
.
| __IOM uint32_t PRS_TypeDef::DMAREQ0 |
DMA Request 0 Register
Definition at line
59
of file
efm32tg11b_prs.h
.
| __IOM uint32_t PRS_TypeDef::DMAREQ1 |
DMA Request 1 Register
Definition at line
60
of file
efm32tg11b_prs.h
.
| __IM uint32_t PRS_TypeDef::PEEK |
PRS Channel Values
Definition at line
62
of file
efm32tg11b_prs.h
.
| uint32_t PRS_TypeDef::RESERVED0[1U] |
Reserved for future use
Definition at line
53
of file
efm32tg11b_prs.h
.
| uint32_t PRS_TypeDef::RESERVED1[6U] |
Reserved for future use
Definition at line
57
of file
efm32tg11b_prs.h
.
| uint32_t PRS_TypeDef::RESERVED2[1U] |
Reserved for future use
Definition at line
61
of file
efm32tg11b_prs.h
.
| uint32_t PRS_TypeDef::RESERVED3[3U] |
Reserved registers
Definition at line
64
of file
efm32tg11b_prs.h
.
| uint32_t PRS_TypeDef::RESERVED4[36U] |
Reserved for future use
Definition at line
67
of file
efm32tg11b_prs.h
.
| __IOM uint32_t PRS_TypeDef::ROUTELOC0 |
I/O Routing Location Register
Definition at line
54
of file
efm32tg11b_prs.h
.
| __IOM uint32_t PRS_TypeDef::ROUTELOC1 |
I/O Routing Location Register
Definition at line
55
of file
efm32tg11b_prs.h
.
| __IOM uint32_t PRS_TypeDef::ROUTEPEN |
I/O Routing Pin Enable Register
Definition at line
52
of file
efm32tg11b_prs.h
.
| __IOM uint32_t PRS_TypeDef::SWLEVEL |
Software Level Register
Definition at line
51
of file
efm32tg11b_prs.h
.
| __IOM uint32_t PRS_TypeDef::SWPULSE |
Software Pulse Register
Definition at line
50
of file
efm32tg11b_prs.h
.
| __IOM uint32_t PRS_TypeDef::TRACECTRL |
MTB Trace Control Register
Definition at line
68
of file
efm32tg11b_prs.h
.
The documentation for this struct was generated from the following file:
-
C:/repos/embsw_super_h1/platform/Device/SiliconLabs/EFM32TG11B/Include/
efm32tg11b_prs.h