|
#define
|
_ACMP_APORTCONFLICT_APORT0XCONFLICT_DEFAULT
0x00000000UL
|
|
#define
|
_ACMP_APORTCONFLICT_APORT0XCONFLICT_MASK
0x1UL
|
|
#define
|
_ACMP_APORTCONFLICT_APORT0XCONFLICT_SHIFT
0
|
|
#define
|
_ACMP_APORTCONFLICT_APORT0YCONFLICT_DEFAULT
0x00000000UL
|
|
#define
|
_ACMP_APORTCONFLICT_APORT0YCONFLICT_MASK
0x2UL
|
|
#define
|
_ACMP_APORTCONFLICT_APORT0YCONFLICT_SHIFT
1
|
|
#define
|
_ACMP_APORTCONFLICT_APORT1XCONFLICT_DEFAULT
0x00000000UL
|
|
#define
|
_ACMP_APORTCONFLICT_APORT1XCONFLICT_MASK
0x4UL
|
|
#define
|
_ACMP_APORTCONFLICT_APORT1XCONFLICT_SHIFT
2
|
|
#define
|
_ACMP_APORTCONFLICT_APORT1YCONFLICT_DEFAULT
0x00000000UL
|
|
#define
|
_ACMP_APORTCONFLICT_APORT1YCONFLICT_MASK
0x8UL
|
|
#define
|
_ACMP_APORTCONFLICT_APORT1YCONFLICT_SHIFT
3
|
|
#define
|
_ACMP_APORTCONFLICT_APORT2XCONFLICT_DEFAULT
0x00000000UL
|
|
#define
|
_ACMP_APORTCONFLICT_APORT2XCONFLICT_MASK
0x10UL
|
|
#define
|
_ACMP_APORTCONFLICT_APORT2XCONFLICT_SHIFT
4
|
|
#define
|
_ACMP_APORTCONFLICT_APORT2YCONFLICT_DEFAULT
0x00000000UL
|
|
#define
|
_ACMP_APORTCONFLICT_APORT2YCONFLICT_MASK
0x20UL
|
|
#define
|
_ACMP_APORTCONFLICT_APORT2YCONFLICT_SHIFT
5
|
|
#define
|
_ACMP_APORTCONFLICT_APORT3XCONFLICT_DEFAULT
0x00000000UL
|
|
#define
|
_ACMP_APORTCONFLICT_APORT3XCONFLICT_MASK
0x40UL
|
|
#define
|
_ACMP_APORTCONFLICT_APORT3XCONFLICT_SHIFT
6
|
|
#define
|
_ACMP_APORTCONFLICT_APORT3YCONFLICT_DEFAULT
0x00000000UL
|
|
#define
|
_ACMP_APORTCONFLICT_APORT3YCONFLICT_MASK
0x80UL
|
|
#define
|
_ACMP_APORTCONFLICT_APORT3YCONFLICT_SHIFT
7
|
|
#define
|
_ACMP_APORTCONFLICT_APORT4XCONFLICT_DEFAULT
0x00000000UL
|
|
#define
|
_ACMP_APORTCONFLICT_APORT4XCONFLICT_MASK
0x100UL
|
|
#define
|
_ACMP_APORTCONFLICT_APORT4XCONFLICT_SHIFT
8
|
|
#define
|
_ACMP_APORTCONFLICT_APORT4YCONFLICT_DEFAULT
0x00000000UL
|
|
#define
|
_ACMP_APORTCONFLICT_APORT4YCONFLICT_MASK
0x200UL
|
|
#define
|
_ACMP_APORTCONFLICT_APORT4YCONFLICT_SHIFT
9
|
|
#define
|
_ACMP_APORTCONFLICT_MASK
0x000003FFUL
|
|
#define
|
_ACMP_APORTCONFLICT_RESETVALUE
0x00000000UL
|
|
#define
|
_ACMP_APORTREQ_APORT0XREQ_DEFAULT
0x00000000UL
|
|
#define
|
_ACMP_APORTREQ_APORT0XREQ_MASK
0x1UL
|
|
#define
|
_ACMP_APORTREQ_APORT0XREQ_SHIFT
0
|
|
#define
|
_ACMP_APORTREQ_APORT0YREQ_DEFAULT
0x00000000UL
|
|
#define
|
_ACMP_APORTREQ_APORT0YREQ_MASK
0x2UL
|
|
#define
|
_ACMP_APORTREQ_APORT0YREQ_SHIFT
1
|
|
#define
|
_ACMP_APORTREQ_APORT1XREQ_DEFAULT
0x00000000UL
|
|
#define
|
_ACMP_APORTREQ_APORT1XREQ_MASK
0x4UL
|
|
#define
|
_ACMP_APORTREQ_APORT1XREQ_SHIFT
2
|
|
#define
|
_ACMP_APORTREQ_APORT1YREQ_DEFAULT
0x00000000UL
|
|
#define
|
_ACMP_APORTREQ_APORT1YREQ_MASK
0x8UL
|
|
#define
|
_ACMP_APORTREQ_APORT1YREQ_SHIFT
3
|
|
#define
|
_ACMP_APORTREQ_APORT2XREQ_DEFAULT
0x00000000UL
|
|
#define
|
_ACMP_APORTREQ_APORT2XREQ_MASK
0x10UL
|
|
#define
|
_ACMP_APORTREQ_APORT2XREQ_SHIFT
4
|
|
#define
|
_ACMP_APORTREQ_APORT2YREQ_DEFAULT
0x00000000UL
|
|
#define
|
_ACMP_APORTREQ_APORT2YREQ_MASK
0x20UL
|
|
#define
|
_ACMP_APORTREQ_APORT2YREQ_SHIFT
5
|
|
#define
|
_ACMP_APORTREQ_APORT3XREQ_DEFAULT
0x00000000UL
|
|
#define
|
_ACMP_APORTREQ_APORT3XREQ_MASK
0x40UL
|
|
#define
|
_ACMP_APORTREQ_APORT3XREQ_SHIFT
6
|
|
#define
|
_ACMP_APORTREQ_APORT3YREQ_DEFAULT
0x00000000UL
|
|
#define
|
_ACMP_APORTREQ_APORT3YREQ_MASK
0x80UL
|
|
#define
|
_ACMP_APORTREQ_APORT3YREQ_SHIFT
7
|
|
#define
|
_ACMP_APORTREQ_APORT4XREQ_DEFAULT
0x00000000UL
|
|
#define
|
_ACMP_APORTREQ_APORT4XREQ_MASK
0x100UL
|
|
#define
|
_ACMP_APORTREQ_APORT4XREQ_SHIFT
8
|
|
#define
|
_ACMP_APORTREQ_APORT4YREQ_DEFAULT
0x00000000UL
|
|
#define
|
_ACMP_APORTREQ_APORT4YREQ_MASK
0x200UL
|
|
#define
|
_ACMP_APORTREQ_APORT4YREQ_SHIFT
9
|
|
#define
|
_ACMP_APORTREQ_MASK
0x000003FFUL
|
|
#define
|
_ACMP_APORTREQ_RESETVALUE
0x00000000UL
|
|
#define
|
_ACMP_CTRL_ACCURACY_DEFAULT
0x00000000UL
|
|
#define
|
_ACMP_CTRL_ACCURACY_HIGH
0x00000001UL
|
|
#define
|
_ACMP_CTRL_ACCURACY_LOW
0x00000000UL
|
|
#define
|
_ACMP_CTRL_ACCURACY_MASK
0x8000UL
|
|
#define
|
_ACMP_CTRL_ACCURACY_SHIFT
15
|
|
#define
|
_ACMP_CTRL_APORTVMASTERDIS_DEFAULT
0x00000000UL
|
|
#define
|
_ACMP_CTRL_APORTVMASTERDIS_MASK
0x400UL
|
|
#define
|
_ACMP_CTRL_APORTVMASTERDIS_SHIFT
10
|
|
#define
|
_ACMP_CTRL_APORTXMASTERDIS_DEFAULT
0x00000000UL
|
|
#define
|
_ACMP_CTRL_APORTXMASTERDIS_MASK
0x100UL
|
|
#define
|
_ACMP_CTRL_APORTXMASTERDIS_SHIFT
8
|
|
#define
|
_ACMP_CTRL_APORTYMASTERDIS_DEFAULT
0x00000000UL
|
|
#define
|
_ACMP_CTRL_APORTYMASTERDIS_MASK
0x200UL
|
|
#define
|
_ACMP_CTRL_APORTYMASTERDIS_SHIFT
9
|
|
#define
|
_ACMP_CTRL_BIASPROG_DEFAULT
0x00000007UL
|
|
#define
|
_ACMP_CTRL_BIASPROG_MASK
0x3F000000UL
|
|
#define
|
_ACMP_CTRL_BIASPROG_SHIFT
24
|
|
#define
|
_ACMP_CTRL_EN_DEFAULT
0x00000000UL
|
|
#define
|
_ACMP_CTRL_EN_MASK
0x1UL
|
|
#define
|
_ACMP_CTRL_EN_SHIFT
0
|
|
#define
|
_ACMP_CTRL_FULLBIAS_DEFAULT
0x00000000UL
|
|
#define
|
_ACMP_CTRL_FULLBIAS_MASK
0x80000000UL
|
|
#define
|
_ACMP_CTRL_FULLBIAS_SHIFT
31
|
|
#define
|
_ACMP_CTRL_GPIOINV_DEFAULT
0x00000000UL
|
|
#define
|
_ACMP_CTRL_GPIOINV_INV
0x00000001UL
|
|
#define
|
_ACMP_CTRL_GPIOINV_MASK
0x8UL
|
|
#define
|
_ACMP_CTRL_GPIOINV_NOTINV
0x00000000UL
|
|
#define
|
_ACMP_CTRL_GPIOINV_SHIFT
3
|
|
#define
|
_ACMP_CTRL_IFALL_DEFAULT
0x00000000UL
|
|
#define
|
_ACMP_CTRL_IFALL_DISABLED
0x00000000UL
|
|
#define
|
_ACMP_CTRL_IFALL_ENABLED
0x00000001UL
|
|
#define
|
_ACMP_CTRL_IFALL_MASK
0x200000UL
|
|
#define
|
_ACMP_CTRL_IFALL_SHIFT
21
|
|
#define
|
_ACMP_CTRL_INACTVAL_DEFAULT
0x00000000UL
|
|
#define
|
_ACMP_CTRL_INACTVAL_HIGH
0x00000001UL
|
|
#define
|
_ACMP_CTRL_INACTVAL_LOW
0x00000000UL
|
|
#define
|
_ACMP_CTRL_INACTVAL_MASK
0x4UL
|
|
#define
|
_ACMP_CTRL_INACTVAL_SHIFT
2
|
|
#define
|
_ACMP_CTRL_INPUTRANGE_DEFAULT
0x00000000UL
|
|
#define
|
_ACMP_CTRL_INPUTRANGE_FULL
0x00000000UL
|
|
#define
|
_ACMP_CTRL_INPUTRANGE_GTVDDDIV2
0x00000001UL
|
|
#define
|
_ACMP_CTRL_INPUTRANGE_LTVDDDIV2
0x00000002UL
|
|
#define
|
_ACMP_CTRL_INPUTRANGE_MASK
0xC0000UL
|
|
#define
|
_ACMP_CTRL_INPUTRANGE_SHIFT
18
|
|
#define
|
_ACMP_CTRL_IRISE_DEFAULT
0x00000000UL
|
|
#define
|
_ACMP_CTRL_IRISE_DISABLED
0x00000000UL
|
|
#define
|
_ACMP_CTRL_IRISE_ENABLED
0x00000001UL
|
|
#define
|
_ACMP_CTRL_IRISE_MASK
0x100000UL
|
|
#define
|
_ACMP_CTRL_IRISE_SHIFT
20
|
|
#define
|
_ACMP_CTRL_MASK
0xBF3CF70DUL
|
|
#define
|
_ACMP_CTRL_PWRSEL_AVDD
0x00000000UL
|
|
#define
|
_ACMP_CTRL_PWRSEL_DEFAULT
0x00000000UL
|
|
#define
|
_ACMP_CTRL_PWRSEL_DVDD
0x00000001UL
|
|
#define
|
_ACMP_CTRL_PWRSEL_IOVDD0
0x00000002UL
|
|
#define
|
_ACMP_CTRL_PWRSEL_IOVDD1
0x00000004UL
|
|
#define
|
_ACMP_CTRL_PWRSEL_MASK
0x7000UL
|
|
#define
|
_ACMP_CTRL_PWRSEL_SHIFT
12
|
|
#define
|
_ACMP_CTRL_RESETVALUE
0x07000000UL
|
|
#define
|
_ACMP_EXTIFCTRL_APORTSEL_APORT0X
0x00000000UL
|
|
#define
|
_ACMP_EXTIFCTRL_APORTSEL_APORT0Y
0x00000001UL
|
|
#define
|
_ACMP_EXTIFCTRL_APORTSEL_APORT1X
0x00000002UL
|
|
#define
|
_ACMP_EXTIFCTRL_APORTSEL_APORT1XY
0x00000004UL
|
|
#define
|
_ACMP_EXTIFCTRL_APORTSEL_APORT1Y
0x00000003UL
|
|
#define
|
_ACMP_EXTIFCTRL_APORTSEL_APORT2X
0x00000005UL
|
|
#define
|
_ACMP_EXTIFCTRL_APORTSEL_APORT2Y
0x00000006UL
|
|
#define
|
_ACMP_EXTIFCTRL_APORTSEL_APORT2YX
0x00000007UL
|
|
#define
|
_ACMP_EXTIFCTRL_APORTSEL_APORT3X
0x00000008UL
|
|
#define
|
_ACMP_EXTIFCTRL_APORTSEL_APORT3XY
0x0000000AUL
|
|
#define
|
_ACMP_EXTIFCTRL_APORTSEL_APORT3Y
0x00000009UL
|
|
#define
|
_ACMP_EXTIFCTRL_APORTSEL_APORT4X
0x0000000BUL
|
|
#define
|
_ACMP_EXTIFCTRL_APORTSEL_APORT4Y
0x0000000CUL
|
|
#define
|
_ACMP_EXTIFCTRL_APORTSEL_APORT4YX
0x0000000DUL
|
|
#define
|
_ACMP_EXTIFCTRL_APORTSEL_DEFAULT
0x00000000UL
|
|
#define
|
_ACMP_EXTIFCTRL_APORTSEL_MASK
0xF0UL
|
|
#define
|
_ACMP_EXTIFCTRL_APORTSEL_SHIFT
4
|
|
#define
|
_ACMP_EXTIFCTRL_EN_DEFAULT
0x00000000UL
|
|
#define
|
_ACMP_EXTIFCTRL_EN_MASK
0x1UL
|
|
#define
|
_ACMP_EXTIFCTRL_EN_SHIFT
0
|
|
#define
|
_ACMP_EXTIFCTRL_MASK
0x000000F1UL
|
|
#define
|
_ACMP_EXTIFCTRL_RESETVALUE
0x00000000UL
|
|
#define
|
_ACMP_HYSTERESIS0_DIVVA_DEFAULT
0x00000000UL
|
|
#define
|
_ACMP_HYSTERESIS0_DIVVA_MASK
0x3F0000UL
|
|
#define
|
_ACMP_HYSTERESIS0_DIVVA_SHIFT
16
|
|
#define
|
_ACMP_HYSTERESIS0_DIVVB_DEFAULT
0x00000000UL
|
|
#define
|
_ACMP_HYSTERESIS0_DIVVB_MASK
0x3F000000UL
|
|
#define
|
_ACMP_HYSTERESIS0_DIVVB_SHIFT
24
|
|
#define
|
_ACMP_HYSTERESIS0_HYST_DEFAULT
0x00000000UL
|
|
#define
|
_ACMP_HYSTERESIS0_HYST_HYST0
0x00000000UL
|
|
#define
|
_ACMP_HYSTERESIS0_HYST_HYST1
0x00000001UL
|
|
#define
|
_ACMP_HYSTERESIS0_HYST_HYST10
0x0000000AUL
|
|
#define
|
_ACMP_HYSTERESIS0_HYST_HYST11
0x0000000BUL
|
|
#define
|
_ACMP_HYSTERESIS0_HYST_HYST12
0x0000000CUL
|
|
#define
|
_ACMP_HYSTERESIS0_HYST_HYST13
0x0000000DUL
|
|
#define
|
_ACMP_HYSTERESIS0_HYST_HYST14
0x0000000EUL
|
|
#define
|
_ACMP_HYSTERESIS0_HYST_HYST15
0x0000000FUL
|
|
#define
|
_ACMP_HYSTERESIS0_HYST_HYST2
0x00000002UL
|
|
#define
|
_ACMP_HYSTERESIS0_HYST_HYST3
0x00000003UL
|
|
#define
|
_ACMP_HYSTERESIS0_HYST_HYST4
0x00000004UL
|
|
#define
|
_ACMP_HYSTERESIS0_HYST_HYST5
0x00000005UL
|
|
#define
|
_ACMP_HYSTERESIS0_HYST_HYST6
0x00000006UL
|
|
#define
|
_ACMP_HYSTERESIS0_HYST_HYST7
0x00000007UL
|
|
#define
|
_ACMP_HYSTERESIS0_HYST_HYST8
0x00000008UL
|
|
#define
|
_ACMP_HYSTERESIS0_HYST_HYST9
0x00000009UL
|
|
#define
|
_ACMP_HYSTERESIS0_HYST_MASK
0xFUL
|
|
#define
|
_ACMP_HYSTERESIS0_HYST_SHIFT
0
|
|
#define
|
_ACMP_HYSTERESIS0_MASK
0x3F3F000FUL
|
|
#define
|
_ACMP_HYSTERESIS0_RESETVALUE
0x00000000UL
|
|
#define
|
_ACMP_HYSTERESIS1_DIVVA_DEFAULT
0x00000000UL
|
|
#define
|
_ACMP_HYSTERESIS1_DIVVA_MASK
0x3F0000UL
|
|
#define
|
_ACMP_HYSTERESIS1_DIVVA_SHIFT
16
|
|
#define
|
_ACMP_HYSTERESIS1_DIVVB_DEFAULT
0x00000000UL
|
|
#define
|
_ACMP_HYSTERESIS1_DIVVB_MASK
0x3F000000UL
|
|
#define
|
_ACMP_HYSTERESIS1_DIVVB_SHIFT
24
|
|
#define
|
_ACMP_HYSTERESIS1_HYST_DEFAULT
0x00000000UL
|
|
#define
|
_ACMP_HYSTERESIS1_HYST_HYST0
0x00000000UL
|
|
#define
|
_ACMP_HYSTERESIS1_HYST_HYST1
0x00000001UL
|
|
#define
|
_ACMP_HYSTERESIS1_HYST_HYST10
0x0000000AUL
|
|
#define
|
_ACMP_HYSTERESIS1_HYST_HYST11
0x0000000BUL
|
|
#define
|
_ACMP_HYSTERESIS1_HYST_HYST12
0x0000000CUL
|
|
#define
|
_ACMP_HYSTERESIS1_HYST_HYST13
0x0000000DUL
|
|
#define
|
_ACMP_HYSTERESIS1_HYST_HYST14
0x0000000EUL
|
|
#define
|
_ACMP_HYSTERESIS1_HYST_HYST15
0x0000000FUL
|
|
#define
|
_ACMP_HYSTERESIS1_HYST_HYST2
0x00000002UL
|
|
#define
|
_ACMP_HYSTERESIS1_HYST_HYST3
0x00000003UL
|
|
#define
|
_ACMP_HYSTERESIS1_HYST_HYST4
0x00000004UL
|
|
#define
|
_ACMP_HYSTERESIS1_HYST_HYST5
0x00000005UL
|
|
#define
|
_ACMP_HYSTERESIS1_HYST_HYST6
0x00000006UL
|
|
#define
|
_ACMP_HYSTERESIS1_HYST_HYST7
0x00000007UL
|
|
#define
|
_ACMP_HYSTERESIS1_HYST_HYST8
0x00000008UL
|
|
#define
|
_ACMP_HYSTERESIS1_HYST_HYST9
0x00000009UL
|
|
#define
|
_ACMP_HYSTERESIS1_HYST_MASK
0xFUL
|
|
#define
|
_ACMP_HYSTERESIS1_HYST_SHIFT
0
|
|
#define
|
_ACMP_HYSTERESIS1_MASK
0x3F3F000FUL
|
|
#define
|
_ACMP_HYSTERESIS1_RESETVALUE
0x00000000UL
|
|
#define
|
_ACMP_IEN_APORTCONFLICT_DEFAULT
0x00000000UL
|
|
#define
|
_ACMP_IEN_APORTCONFLICT_MASK
0x4UL
|
|
#define
|
_ACMP_IEN_APORTCONFLICT_SHIFT
2
|
|
#define
|
_ACMP_IEN_EDGE_DEFAULT
0x00000000UL
|
|
#define
|
_ACMP_IEN_EDGE_MASK
0x1UL
|
|
#define
|
_ACMP_IEN_EDGE_SHIFT
0
|
|
#define
|
_ACMP_IEN_MASK
0x00000007UL
|
|
#define
|
_ACMP_IEN_RESETVALUE
0x00000000UL
|
|
#define
|
_ACMP_IEN_WARMUP_DEFAULT
0x00000000UL
|
|
#define
|
_ACMP_IEN_WARMUP_MASK
0x2UL
|
|
#define
|
_ACMP_IEN_WARMUP_SHIFT
1
|
|
#define
|
_ACMP_IF_APORTCONFLICT_DEFAULT
0x00000000UL
|
|
#define
|
_ACMP_IF_APORTCONFLICT_MASK
0x4UL
|
|
#define
|
_ACMP_IF_APORTCONFLICT_SHIFT
2
|
|
#define
|
_ACMP_IF_EDGE_DEFAULT
0x00000000UL
|
|
#define
|
_ACMP_IF_EDGE_MASK
0x1UL
|
|
#define
|
_ACMP_IF_EDGE_SHIFT
0
|
|
#define
|
_ACMP_IF_MASK
0x00000007UL
|
|
#define
|
_ACMP_IF_RESETVALUE
0x00000000UL
|
|
#define
|
_ACMP_IF_WARMUP_DEFAULT
0x00000000UL
|
|
#define
|
_ACMP_IF_WARMUP_MASK
0x2UL
|
|
#define
|
_ACMP_IF_WARMUP_SHIFT
1
|
|
#define
|
_ACMP_IFC_APORTCONFLICT_DEFAULT
0x00000000UL
|
|
#define
|
_ACMP_IFC_APORTCONFLICT_MASK
0x4UL
|
|
#define
|
_ACMP_IFC_APORTCONFLICT_SHIFT
2
|
|
#define
|
_ACMP_IFC_EDGE_DEFAULT
0x00000000UL
|
|
#define
|
_ACMP_IFC_EDGE_MASK
0x1UL
|
|
#define
|
_ACMP_IFC_EDGE_SHIFT
0
|
|
#define
|
_ACMP_IFC_MASK
0x00000007UL
|
|
#define
|
_ACMP_IFC_RESETVALUE
0x00000000UL
|
|
#define
|
_ACMP_IFC_WARMUP_DEFAULT
0x00000000UL
|
|
#define
|
_ACMP_IFC_WARMUP_MASK
0x2UL
|
|
#define
|
_ACMP_IFC_WARMUP_SHIFT
1
|
|
#define
|
_ACMP_IFS_APORTCONFLICT_DEFAULT
0x00000000UL
|
|
#define
|
_ACMP_IFS_APORTCONFLICT_MASK
0x4UL
|
|
#define
|
_ACMP_IFS_APORTCONFLICT_SHIFT
2
|
|
#define
|
_ACMP_IFS_EDGE_DEFAULT
0x00000000UL
|
|
#define
|
_ACMP_IFS_EDGE_MASK
0x1UL
|
|
#define
|
_ACMP_IFS_EDGE_SHIFT
0
|
|
#define
|
_ACMP_IFS_MASK
0x00000007UL
|
|
#define
|
_ACMP_IFS_RESETVALUE
0x00000000UL
|
|
#define
|
_ACMP_IFS_WARMUP_DEFAULT
0x00000000UL
|
|
#define
|
_ACMP_IFS_WARMUP_MASK
0x2UL
|
|
#define
|
_ACMP_IFS_WARMUP_SHIFT
1
|
|
#define
|
_ACMP_INPUTSEL_CSRESEN_DEFAULT
0x00000000UL
|
|
#define
|
_ACMP_INPUTSEL_CSRESEN_MASK
0x4000000UL
|
|
#define
|
_ACMP_INPUTSEL_CSRESEN_SHIFT
26
|
|
#define
|
_ACMP_INPUTSEL_CSRESSEL_DEFAULT
0x00000000UL
|
|
#define
|
_ACMP_INPUTSEL_CSRESSEL_MASK
0x70000000UL
|
|
#define
|
_ACMP_INPUTSEL_CSRESSEL_RES0
0x00000000UL
|
|
#define
|
_ACMP_INPUTSEL_CSRESSEL_RES1
0x00000001UL
|
|
#define
|
_ACMP_INPUTSEL_CSRESSEL_RES2
0x00000002UL
|
|
#define
|
_ACMP_INPUTSEL_CSRESSEL_RES3
0x00000003UL
|
|
#define
|
_ACMP_INPUTSEL_CSRESSEL_RES4
0x00000004UL
|
|
#define
|
_ACMP_INPUTSEL_CSRESSEL_RES5
0x00000005UL
|
|
#define
|
_ACMP_INPUTSEL_CSRESSEL_RES6
0x00000006UL
|
|
#define
|
_ACMP_INPUTSEL_CSRESSEL_RES7
0x00000007UL
|
|
#define
|
_ACMP_INPUTSEL_CSRESSEL_SHIFT
28
|
|
#define
|
_ACMP_INPUTSEL_MASK
0x757FFFFFUL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT0XCH0
0x00000000UL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT0XCH1
0x00000001UL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT0XCH10
0x0000000AUL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT0XCH11
0x0000000BUL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT0XCH12
0x0000000CUL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT0XCH13
0x0000000DUL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT0XCH14
0x0000000EUL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT0XCH15
0x0000000FUL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT0XCH2
0x00000002UL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT0XCH3
0x00000003UL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT0XCH4
0x00000004UL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT0XCH5
0x00000005UL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT0XCH6
0x00000006UL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT0XCH7
0x00000007UL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT0XCH8
0x00000008UL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT0XCH9
0x00000009UL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT0YCH0
0x00000010UL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT0YCH1
0x00000011UL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT0YCH10
0x0000001AUL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT0YCH11
0x0000001BUL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT0YCH12
0x0000001CUL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT0YCH13
0x0000001DUL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT0YCH14
0x0000001EUL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT0YCH15
0x0000001FUL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT0YCH2
0x00000012UL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT0YCH3
0x00000013UL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT0YCH4
0x00000014UL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT0YCH5
0x00000015UL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT0YCH6
0x00000016UL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT0YCH7
0x00000017UL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT0YCH8
0x00000018UL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT0YCH9
0x00000019UL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT1XCH0
0x00000020UL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT1XCH10
0x0000002AUL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT1XCH12
0x0000002CUL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT1XCH14
0x0000002EUL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT1XCH16
0x00000030UL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT1XCH18
0x00000032UL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT1XCH2
0x00000022UL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT1XCH20
0x00000034UL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT1XCH22
0x00000036UL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT1XCH24
0x00000038UL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT1XCH26
0x0000003AUL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT1XCH28
0x0000003CUL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT1XCH30
0x0000003EUL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT1XCH4
0x00000024UL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT1XCH6
0x00000026UL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT1XCH8
0x00000028UL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT1YCH1
0x00000021UL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT1YCH11
0x0000002BUL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT1YCH13
0x0000002DUL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT1YCH15
0x0000002FUL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT1YCH17
0x00000031UL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT1YCH19
0x00000033UL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT1YCH21
0x00000035UL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT1YCH23
0x00000037UL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT1YCH25
0x00000039UL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT1YCH27
0x0000003BUL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT1YCH29
0x0000003DUL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT1YCH3
0x00000023UL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT1YCH31
0x0000003FUL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT1YCH5
0x00000025UL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT1YCH7
0x00000027UL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT1YCH9
0x00000029UL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT2XCH1
0x00000041UL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT2XCH11
0x0000004BUL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT2XCH13
0x0000004DUL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT2XCH15
0x0000004FUL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT2XCH17
0x00000051UL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT2XCH19
0x00000053UL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT2XCH21
0x00000055UL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT2XCH23
0x00000057UL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT2XCH25
0x00000059UL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT2XCH27
0x0000005BUL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT2XCH29
0x0000005DUL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT2XCH3
0x00000043UL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT2XCH31
0x0000005FUL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT2XCH5
0x00000045UL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT2XCH7
0x00000047UL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT2XCH9
0x00000049UL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT2YCH0
0x00000040UL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT2YCH10
0x0000004AUL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT2YCH12
0x0000004CUL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT2YCH14
0x0000004EUL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT2YCH16
0x00000050UL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT2YCH18
0x00000052UL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT2YCH2
0x00000042UL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT2YCH20
0x00000054UL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT2YCH22
0x00000056UL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT2YCH24
0x00000058UL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT2YCH26
0x0000005AUL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT2YCH28
0x0000005CUL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT2YCH30
0x0000005EUL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT2YCH4
0x00000044UL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT2YCH6
0x00000046UL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT2YCH8
0x00000048UL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT3XCH0
0x00000060UL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT3XCH10
0x0000006AUL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT3XCH12
0x0000006CUL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT3XCH14
0x0000006EUL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT3XCH16
0x00000070UL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT3XCH18
0x00000072UL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT3XCH2
0x00000062UL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT3XCH20
0x00000074UL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT3XCH22
0x00000076UL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT3XCH24
0x00000078UL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT3XCH26
0x0000007AUL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT3XCH28
0x0000007CUL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT3XCH30
0x0000007EUL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT3XCH4
0x00000064UL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT3XCH6
0x00000066UL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT3XCH8
0x00000068UL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT3YCH1
0x00000061UL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT3YCH11
0x0000006BUL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT3YCH13
0x0000006DUL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT3YCH15
0x0000006FUL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT3YCH17
0x00000071UL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT3YCH19
0x00000073UL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT3YCH21
0x00000075UL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT3YCH23
0x00000077UL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT3YCH25
0x00000079UL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT3YCH27
0x0000007BUL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT3YCH29
0x0000007DUL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT3YCH3
0x00000063UL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT3YCH31
0x0000007FUL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT3YCH5
0x00000065UL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT3YCH7
0x00000067UL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT3YCH9
0x00000069UL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT4XCH1
0x00000081UL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT4XCH11
0x0000008BUL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT4XCH13
0x0000008DUL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT4XCH15
0x0000009FUL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT4XCH17
0x00000091UL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT4XCH19
0x00000093UL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT4XCH21
0x00000095UL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT4XCH23
0x00000097UL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT4XCH25
0x00000099UL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT4XCH27
0x0000009BUL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT4XCH29
0x0000009DUL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT4XCH3
0x00000083UL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT4XCH31
0x0000009FUL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT4XCH5
0x00000085UL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT4XCH7
0x00000087UL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT4XCH9
0x00000089UL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT4YCH0
0x00000080UL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT4YCH10
0x0000008AUL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT4YCH12
0x0000008CUL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT4YCH14
0x0000009EUL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT4YCH16
0x00000090UL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT4YCH18
0x00000092UL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT4YCH2
0x00000082UL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT4YCH20
0x00000094UL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT4YCH22
0x00000096UL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT4YCH24
0x00000098UL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT4YCH26
0x0000009AUL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT4YCH28
0x0000009CUL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT4YCH30
0x0000009EUL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT4YCH4
0x00000084UL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT4YCH6
0x00000086UL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_APORT4YCH8
0x00000088UL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_DACOUT0
0x000000F2UL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_DACOUT1
0x000000F3UL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_DEFAULT
0x00000000UL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_MASK
0xFF00UL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_SHIFT
8
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_VADIV
0x000000FDUL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_VBDIV
0x000000FCUL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_VDD
0x000000FEUL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_VLP
0x000000FBUL
|
|
#define
|
_ACMP_INPUTSEL_NEGSEL_VSS
0x000000FFUL
|
|
#define
|
_ACMP_INPUTSEL_POSSEL_APORT0XCH0
0x00000000UL
|
|
#define
|
_ACMP_INPUTSEL_POSSEL_APORT0XCH1
0x00000001UL
|
|
#define
|
_ACMP_INPUTSEL_POSSEL_APORT0XCH10
0x0000000AUL
|
|
#define
|
_ACMP_INPUTSEL_POSSEL_APORT0XCH11
0x0000000BUL
|
|
#define
|
_ACMP_INPUTSEL_POSSEL_APORT0XCH12
0x0000000CUL
|
|
#define
|
_ACMP_INPUTSEL_POSSEL_APORT0XCH13
0x0000000DUL
|
|
#define
|
_ACMP_INPUTSEL_POSSEL_APORT0XCH14
0x0000000EUL
|
|
#define
|
_ACMP_INPUTSEL_POSSEL_APORT0XCH15
0x0000000FUL
|
|
#define
|
_ACMP_INPUTSEL_POSSEL_APORT0XCH2
0x00000002UL
|
|
#define
|
_ACMP_INPUTSEL_POSSEL_APORT0XCH3
0x00000003UL
|
|
#define
|
_ACMP_INPUTSEL_POSSEL_APORT0XCH4
0x00000004UL
|
|
#define
|
_ACMP_INPUTSEL_POSSEL_APORT0XCH5
0x00000005UL
|
|
#define
|
_ACMP_INPUTSEL_POSSEL_APORT0XCH6
0x00000006UL
|
|
#define
|
_ACMP_INPUTSEL_POSSEL_APORT0XCH7
0x00000007UL
|
|
#define
|
_ACMP_INPUTSEL_POSSEL_APORT0XCH8
0x00000008UL
|
|
#define
|
|