DMAREQ Bit FieldsDevices > DMAREQ

Macros

#define DMAREQ_ADC0_SCAN ((8 << 16) + 1)
#define DMAREQ_ADC0_SINGLE ((8 << 16) + 0)
#define DMAREQ_CRYPTO0_DATA0RD ((49 << 16) + 2)
#define DMAREQ_CRYPTO0_DATA0WR ((49 << 16) + 0)
#define DMAREQ_CRYPTO0_DATA0XWR ((49 << 16) + 1)
#define DMAREQ_CRYPTO0_DATA1RD ((49 << 16) + 4)
#define DMAREQ_CRYPTO0_DATA1WR ((49 << 16) + 3)
#define DMAREQ_CRYPTO_DATA0RD DMAREQ_CRYPTO0_DATA0RD
#define DMAREQ_CRYPTO_DATA0WR DMAREQ_CRYPTO0_DATA0WR
#define DMAREQ_CRYPTO_DATA0XWR DMAREQ_CRYPTO0_DATA0XWR
#define DMAREQ_CRYPTO_DATA1RD DMAREQ_CRYPTO0_DATA1RD
#define DMAREQ_CRYPTO_DATA1WR DMAREQ_CRYPTO0_DATA1WR
#define DMAREQ_I2C0_RXDATAV ((20 << 16) + 0)
#define DMAREQ_I2C0_TXBL ((20 << 16) + 1)
#define DMAREQ_LESENSE_BUFDATAV ((51 << 16) + 0)
#define DMAREQ_LEUART0_RXDATAV ((16 << 16) + 0)
#define DMAREQ_LEUART0_TXBL ((16 << 16) + 1)
#define DMAREQ_LEUART0_TXEMPTY ((16 << 16) + 2)
#define DMAREQ_MSC_WDATA ((48 << 16) + 0)
#define DMAREQ_PRS_REQ0 ((1 << 16) + 0)
#define DMAREQ_PRS_REQ1 ((1 << 16) + 1)
#define DMAREQ_TIMER0_CC0 ((24 << 16) + 1)
#define DMAREQ_TIMER0_CC1 ((24 << 16) + 2)
#define DMAREQ_TIMER0_CC2 ((24 << 16) + 3)
#define DMAREQ_TIMER0_UFOF ((24 << 16) + 0)
#define DMAREQ_TIMER1_CC0 ((25 << 16) + 1)
#define DMAREQ_TIMER1_CC1 ((25 << 16) + 2)
#define DMAREQ_TIMER1_CC2 ((25 << 16) + 3)
#define DMAREQ_TIMER1_CC3 ((25 << 16) + 4)
#define DMAREQ_TIMER1_UFOF ((25 << 16) + 0)
#define DMAREQ_USART0_RXDATAV ((12 << 16) + 0)
#define DMAREQ_USART0_TXBL ((12 << 16) + 1)
#define DMAREQ_USART0_TXEMPTY ((12 << 16) + 2)
#define DMAREQ_USART1_RXDATAV ((13 << 16) + 0)
#define DMAREQ_USART1_RXDATAVRIGHT ((13 << 16) + 3)
#define DMAREQ_USART1_TXBL ((13 << 16) + 1)
#define DMAREQ_USART1_TXBLRIGHT ((13 << 16) + 4)
#define DMAREQ_USART1_TXEMPTY ((13 << 16) + 2)
#define DMAREQ_VDAC0_CH0 ((10 << 16) + 0)
#define DMAREQ_VDAC0_CH1 ((10 << 16) + 1)
#define DMAREQ_WTIMER0_CC0 ((26 << 16) + 1)
#define DMAREQ_WTIMER0_CC1 ((26 << 16) + 2)
#define DMAREQ_WTIMER0_CC2 ((26 << 16) + 3)
#define DMAREQ_WTIMER0_UFOF ((26 << 16) + 0)

Macro Definition Documentation

#define DMAREQ_ADC0_SCAN   ((8 << 16) + 1)

DMA channel select for ADC0_SCAN

Definition at line 53 of file efr32fg14p_dmareq.h .

#define DMAREQ_ADC0_SINGLE   ((8 << 16) + 0)

DMA channel select for ADC0_SINGLE

Definition at line 52 of file efr32fg14p_dmareq.h .

#define DMAREQ_CRYPTO0_DATA0RD   ((49 << 16) + 2)

DMA channel select for CRYPTO0_DATA0RD

Definition at line 87 of file efr32fg14p_dmareq.h .

#define DMAREQ_CRYPTO0_DATA0WR   ((49 << 16) + 0)

DMA channel select for CRYPTO0_DATA0WR

Definition at line 83 of file efr32fg14p_dmareq.h .

#define DMAREQ_CRYPTO0_DATA0XWR   ((49 << 16) + 1)

DMA channel select for CRYPTO0_DATA0XWR

Definition at line 85 of file efr32fg14p_dmareq.h .

#define DMAREQ_CRYPTO0_DATA1RD   ((49 << 16) + 4)

DMA channel select for CRYPTO0_DATA1RD

Definition at line 91 of file efr32fg14p_dmareq.h .

#define DMAREQ_CRYPTO0_DATA1WR   ((49 << 16) + 3)

DMA channel select for CRYPTO0_DATA1WR

Definition at line 89 of file efr32fg14p_dmareq.h .

#define DMAREQ_CRYPTO_DATA0RD DMAREQ_CRYPTO0_DATA0RD

Alias for DMAREQ_CRYPTO0_DATA0RD

Definition at line 88 of file efr32fg14p_dmareq.h .

#define DMAREQ_CRYPTO_DATA0WR DMAREQ_CRYPTO0_DATA0WR

Alias for DMAREQ_CRYPTO0_DATA0WR

Definition at line 84 of file efr32fg14p_dmareq.h .

#define DMAREQ_CRYPTO_DATA0XWR DMAREQ_CRYPTO0_DATA0XWR

Alias for DMAREQ_CRYPTO0_DATA0XWR

Definition at line 86 of file efr32fg14p_dmareq.h .

#define DMAREQ_CRYPTO_DATA1RD DMAREQ_CRYPTO0_DATA1RD

Alias for DMAREQ_CRYPTO0_DATA1RD

Definition at line 92 of file efr32fg14p_dmareq.h .

#define DMAREQ_CRYPTO_DATA1WR DMAREQ_CRYPTO0_DATA1WR

Alias for DMAREQ_CRYPTO0_DATA1WR

Definition at line 90 of file efr32fg14p_dmareq.h .

#define DMAREQ_I2C0_RXDATAV   ((20 << 16) + 0)

DMA channel select for I2C0_RXDATAV

Definition at line 67 of file efr32fg14p_dmareq.h .

#define DMAREQ_I2C0_TXBL   ((20 << 16) + 1)

DMA channel select for I2C0_TXBL

Definition at line 68 of file efr32fg14p_dmareq.h .

#define DMAREQ_LESENSE_BUFDATAV   ((51 << 16) + 0)

DMA channel select for LESENSE_BUFDATAV

Definition at line 93 of file efr32fg14p_dmareq.h .

#define DMAREQ_LEUART0_RXDATAV   ((16 << 16) + 0)

DMA channel select for LEUART0_RXDATAV

Definition at line 64 of file efr32fg14p_dmareq.h .

#define DMAREQ_LEUART0_TXBL   ((16 << 16) + 1)

DMA channel select for LEUART0_TXBL

Definition at line 65 of file efr32fg14p_dmareq.h .

#define DMAREQ_LEUART0_TXEMPTY   ((16 << 16) + 2)

DMA channel select for LEUART0_TXEMPTY

Definition at line 66 of file efr32fg14p_dmareq.h .

#define DMAREQ_MSC_WDATA   ((48 << 16) + 0)

DMA channel select for MSC_WDATA

Definition at line 82 of file efr32fg14p_dmareq.h .

#define DMAREQ_PRS_REQ0   ((1 << 16) + 0)

DMA channel select for PRS_REQ0

Definition at line 50 of file efr32fg14p_dmareq.h .

#define DMAREQ_PRS_REQ1   ((1 << 16) + 1)

DMA channel select for PRS_REQ1

Definition at line 51 of file efr32fg14p_dmareq.h .

#define DMAREQ_TIMER0_CC0   ((24 << 16) + 1)

DMA channel select for TIMER0_CC0

Definition at line 70 of file efr32fg14p_dmareq.h .

#define DMAREQ_TIMER0_CC1   ((24 << 16) + 2)

DMA channel select for TIMER0_CC1

Definition at line 71 of file efr32fg14p_dmareq.h .

#define DMAREQ_TIMER0_CC2   ((24 << 16) + 3)

DMA channel select for TIMER0_CC2

Definition at line 72 of file efr32fg14p_dmareq.h .

#define DMAREQ_TIMER0_UFOF   ((24 << 16) + 0)

DMA channel select for TIMER0_UFOF

Definition at line 69 of file efr32fg14p_dmareq.h .

#define DMAREQ_TIMER1_CC0   ((25 << 16) + 1)

DMA channel select for TIMER1_CC0

Definition at line 74 of file efr32fg14p_dmareq.h .

#define DMAREQ_TIMER1_CC1   ((25 << 16) + 2)

DMA channel select for TIMER1_CC1

Definition at line 75 of file efr32fg14p_dmareq.h .

#define DMAREQ_TIMER1_CC2   ((25 << 16) + 3)

DMA channel select for TIMER1_CC2

Definition at line 76 of file efr32fg14p_dmareq.h .

#define DMAREQ_TIMER1_CC3   ((25 << 16) + 4)

DMA channel select for TIMER1_CC3

Definition at line 77 of file efr32fg14p_dmareq.h .

#define DMAREQ_TIMER1_UFOF   ((25 << 16) + 0)

DMA channel select for TIMER1_UFOF

Definition at line 73 of file efr32fg14p_dmareq.h .

#define DMAREQ_USART0_RXDATAV   ((12 << 16) + 0)

DMA channel select for USART0_RXDATAV

Definition at line 56 of file efr32fg14p_dmareq.h .

#define DMAREQ_USART0_TXBL   ((12 << 16) + 1)

DMA channel select for USART0_TXBL

Definition at line 57 of file efr32fg14p_dmareq.h .

#define DMAREQ_USART0_TXEMPTY   ((12 << 16) + 2)

DMA channel select for USART0_TXEMPTY

Definition at line 58 of file efr32fg14p_dmareq.h .

#define DMAREQ_USART1_RXDATAV   ((13 << 16) + 0)

DMA channel select for USART1_RXDATAV

Definition at line 59 of file efr32fg14p_dmareq.h .

#define DMAREQ_USART1_RXDATAVRIGHT   ((13 << 16) + 3)

DMA channel select for USART1_RXDATAVRIGHT

Definition at line 62 of file efr32fg14p_dmareq.h .

#define DMAREQ_USART1_TXBL   ((13 << 16) + 1)

DMA channel select for USART1_TXBL

Definition at line 60 of file efr32fg14p_dmareq.h .

#define DMAREQ_USART1_TXBLRIGHT   ((13 << 16) + 4)

DMA channel select for USART1_TXBLRIGHT

Definition at line 63 of file efr32fg14p_dmareq.h .

#define DMAREQ_USART1_TXEMPTY   ((13 << 16) + 2)

DMA channel select for USART1_TXEMPTY

Definition at line 61 of file efr32fg14p_dmareq.h .

#define DMAREQ_VDAC0_CH0   ((10 << 16) + 0)

DMA channel select for VDAC0_CH0

Definition at line 54 of file efr32fg14p_dmareq.h .

#define DMAREQ_VDAC0_CH1   ((10 << 16) + 1)

DMA channel select for VDAC0_CH1

Definition at line 55 of file efr32fg14p_dmareq.h .

#define DMAREQ_WTIMER0_CC0   ((26 << 16) + 1)

DMA channel select for WTIMER0_CC0

Definition at line 79 of file efr32fg14p_dmareq.h .

#define DMAREQ_WTIMER0_CC1   ((26 << 16) + 2)

DMA channel select for WTIMER0_CC1

Definition at line 80 of file efr32fg14p_dmareq.h .

#define DMAREQ_WTIMER0_CC2   ((26 << 16) + 3)

DMA channel select for WTIMER0_CC2

Definition at line 81 of file efr32fg14p_dmareq.h .

#define DMAREQ_WTIMER0_UFOF   ((26 << 16) + 0)

DMA channel select for WTIMER0_UFOF

Definition at line 78 of file efr32fg14p_dmareq.h .