ETH Bit FieldsDevices > ETH

Macros

#define _ETH_ALIGNERRS_COUNT_DEFAULT   0x00000000UL
 
#define _ETH_ALIGNERRS_COUNT_MASK   0x3FFUL
 
#define _ETH_ALIGNERRS_COUNT_SHIFT   0
 
#define _ETH_ALIGNERRS_MASK   0x000003FFUL
 
#define _ETH_ALIGNERRS_RESETVALUE   0x00000000UL
 
#define _ETH_AUTOFLUSHEDPKTS_COUNT_DEFAULT   0x00000000UL
 
#define _ETH_AUTOFLUSHEDPKTS_COUNT_MASK   0xFFFFUL
 
#define _ETH_AUTOFLUSHEDPKTS_COUNT_SHIFT   0
 
#define _ETH_AUTOFLUSHEDPKTS_MASK   0x0000FFFFUL
 
#define _ETH_AUTOFLUSHEDPKTS_RESETVALUE   0x00000000UL
 
#define _ETH_BROADCASTRXED_COUNT_DEFAULT   0x00000000UL
 
#define _ETH_BROADCASTRXED_COUNT_MASK   0xFFFFFFFFUL
 
#define _ETH_BROADCASTRXED_COUNT_SHIFT   0
 
#define _ETH_BROADCASTRXED_MASK   0xFFFFFFFFUL
 
#define _ETH_BROADCASTRXED_RESETVALUE   0x00000000UL
 
#define _ETH_BROADCASTTXED_COUNT_DEFAULT   0x00000000UL
 
#define _ETH_BROADCASTTXED_COUNT_MASK   0xFFFFFFFFUL
 
#define _ETH_BROADCASTTXED_COUNT_SHIFT   0
 
#define _ETH_BROADCASTTXED_MASK   0xFFFFFFFFUL
 
#define _ETH_BROADCASTTXED_RESETVALUE   0x00000000UL
 
#define _ETH_CRSERRS_COUNT_DEFAULT   0x00000000UL
 
#define _ETH_CRSERRS_COUNT_MASK   0x3FFUL
 
#define _ETH_CRSERRS_COUNT_SHIFT   0
 
#define _ETH_CRSERRS_MASK   0x000003FFUL
 
#define _ETH_CRSERRS_RESETVALUE   0x00000000UL
 
#define _ETH_CTRL_GBLCLKEN_DEFAULT   0x00000000UL
 
#define _ETH_CTRL_GBLCLKEN_MASK   0x200UL
 
#define _ETH_CTRL_GBLCLKEN_SHIFT   9
 
#define _ETH_CTRL_MASK   0x000007F7UL
 
#define _ETH_CTRL_MIISEL_DEFAULT   0x00000000UL
 
#define _ETH_CTRL_MIISEL_MASK   0x100UL
 
#define _ETH_CTRL_MIISEL_MII   0x00000001UL
 
#define _ETH_CTRL_MIISEL_RMII   0x00000000UL
 
#define _ETH_CTRL_MIISEL_SHIFT   8
 
#define _ETH_CTRL_RESETVALUE   0x00000000UL
 
#define _ETH_CTRL_TSUCLKSEL_DEFAULT   0x00000000UL
 
#define _ETH_CTRL_TSUCLKSEL_MASK   0x7UL
 
#define _ETH_CTRL_TSUCLKSEL_NOCLOCK   0x00000000UL
 
#define _ETH_CTRL_TSUCLKSEL_PLL   0x00000001UL
 
#define _ETH_CTRL_TSUCLKSEL_REFCLK   0x00000003UL
 
#define _ETH_CTRL_TSUCLKSEL_RXCLK   0x00000002UL
 
#define _ETH_CTRL_TSUCLKSEL_SHIFT   0
 
#define _ETH_CTRL_TSUCLKSEL_TSUEXTCLK   0x00000004UL
 
#define _ETH_CTRL_TSUPRESC_DEFAULT   0x00000000UL
 
#define _ETH_CTRL_TSUPRESC_MASK   0xF0UL
 
#define _ETH_CTRL_TSUPRESC_SHIFT   4
 
#define _ETH_CTRL_TXREFCLKSEL_DEFAULT   0x00000000UL
 
#define _ETH_CTRL_TXREFCLKSEL_MASK   0x400UL
 
#define _ETH_CTRL_TXREFCLKSEL_REFCLKINT   0x00000000UL
 
#define _ETH_CTRL_TXREFCLKSEL_REFCLKPIN   0x00000001UL
 
#define _ETH_CTRL_TXREFCLKSEL_SHIFT   10
 
#define _ETH_DEFERREDFRAMES_COUNT_DEFAULT   0x00000000UL
 
#define _ETH_DEFERREDFRAMES_COUNT_MASK   0x3FFFFUL
 
#define _ETH_DEFERREDFRAMES_COUNT_SHIFT   0
 
#define _ETH_DEFERREDFRAMES_MASK   0x0003FFFFUL
 
#define _ETH_DEFERREDFRAMES_RESETVALUE   0x00000000UL
 
#define _ETH_DMACFG_AMBABRSTLEN_DEFAULT   0x00000004UL
 
#define _ETH_DMACFG_AMBABRSTLEN_MASK   0x1FUL
 
#define _ETH_DMACFG_AMBABRSTLEN_SHIFT   0
 
#define _ETH_DMACFG_FRCDISCARDONERR_DEFAULT   0x00000000UL
 
#define _ETH_DMACFG_FRCDISCARDONERR_MASK   0x1000000UL
 
#define _ETH_DMACFG_FRCDISCARDONERR_SHIFT   24
 
#define _ETH_DMACFG_FRCMAXAMBABRSTRX_DEFAULT   0x00000000UL
 
#define _ETH_DMACFG_FRCMAXAMBABRSTRX_MASK   0x2000000UL
 
#define _ETH_DMACFG_FRCMAXAMBABRSTRX_SHIFT   25
 
#define _ETH_DMACFG_FRCMAXAMBABRSTTX_DEFAULT   0x00000000UL
 
#define _ETH_DMACFG_FRCMAXAMBABRSTTX_MASK   0x4000000UL
 
#define _ETH_DMACFG_FRCMAXAMBABRSTTX_SHIFT   26
 
#define _ETH_DMACFG_HDRDATASPLITEN_DEFAULT   0x00000000UL
 
#define _ETH_DMACFG_HDRDATASPLITEN_MASK   0x20UL
 
#define _ETH_DMACFG_HDRDATASPLITEN_SHIFT   5
 
#define _ETH_DMACFG_INFLASTDBUFSIZEEN_DEFAULT   0x00000000UL
 
#define _ETH_DMACFG_INFLASTDBUFSIZEEN_MASK   0x1000UL
 
#define _ETH_DMACFG_INFLASTDBUFSIZEEN_SHIFT   12
 
#define _ETH_DMACFG_MASK   0x37FF1F3FUL
 
#define _ETH_DMACFG_RESETVALUE   0x00020704UL
 
#define _ETH_DMACFG_RXBDEXTNDMODEEN_DEFAULT   0x00000000UL
 
#define _ETH_DMACFG_RXBDEXTNDMODEEN_MASK   0x10000000UL
 
#define _ETH_DMACFG_RXBDEXTNDMODEEN_SHIFT   28
 
#define _ETH_DMACFG_RXBUFSIZE_DEFAULT   0x00000002UL
 
#define _ETH_DMACFG_RXBUFSIZE_MASK   0xFF0000UL
 
#define _ETH_DMACFG_RXBUFSIZE_SHIFT   16
 
#define _ETH_DMACFG_RXPBUFSIZE_DEFAULT   0x00000003UL
 
#define _ETH_DMACFG_RXPBUFSIZE_MASK   0x300UL
 
#define _ETH_DMACFG_RXPBUFSIZE_SHIFT   8
 
#define _ETH_DMACFG_RXPBUFSIZE_SIZE0   0x00000000UL
 
#define _ETH_DMACFG_RXPBUFSIZE_SIZE1   0x00000001UL
 
#define _ETH_DMACFG_RXPBUFSIZE_SIZE2   0x00000002UL
 
#define _ETH_DMACFG_RXPBUFSIZE_SIZE3   0x00000003UL
 
#define _ETH_DMACFG_TXBDEXTENDMODEEN_DEFAULT   0x00000000UL
 
#define _ETH_DMACFG_TXBDEXTENDMODEEN_MASK   0x20000000UL
 
#define _ETH_DMACFG_TXBDEXTENDMODEEN_SHIFT   29
 
#define _ETH_DMACFG_TXPBUFSIZE_DEFAULT   0x00000001UL
 
#define _ETH_DMACFG_TXPBUFSIZE_MASK   0x400UL
 
#define _ETH_DMACFG_TXPBUFSIZE_SHIFT   10
 
#define _ETH_DMACFG_TXPBUFSIZE_SIZE0   0x00000000UL
 
#define _ETH_DMACFG_TXPBUFSIZE_SIZE1   0x00000001UL
 
#define _ETH_DMACFG_TXPBUFTCPEN_DEFAULT   0x00000000UL
 
#define _ETH_DMACFG_TXPBUFTCPEN_MASK   0x800UL
 
#define _ETH_DMACFG_TXPBUFTCPEN_SHIFT   11
 
#define _ETH_EXCESSCOLS_COUNT_DEFAULT   0x00000000UL
 
#define _ETH_EXCESSCOLS_COUNT_MASK   0x3FFUL
 
#define _ETH_EXCESSCOLS_COUNT_SHIFT   0
 
#define _ETH_EXCESSCOLS_MASK   0x000003FFUL
 
#define _ETH_EXCESSCOLS_RESETVALUE   0x00000000UL
 
#define _ETH_EXCESSIVERXLEN_COUNT_DEFAULT   0x00000000UL
 
#define _ETH_EXCESSIVERXLEN_COUNT_MASK   0x3FFUL
 
#define _ETH_EXCESSIVERXLEN_COUNT_SHIFT   0
 
#define _ETH_EXCESSIVERXLEN_MASK   0x000003FFUL
 
#define _ETH_EXCESSIVERXLEN_RESETVALUE   0x00000000UL
 
#define _ETH_FCSERRS_COUNT_DEFAULT   0x00000000UL
 
#define _ETH_FCSERRS_COUNT_MASK   0x3FFUL
 
#define _ETH_FCSERRS_COUNT_SHIFT   0
 
#define _ETH_FCSERRS_MASK   0x000003FFUL
 
#define _ETH_FCSERRS_RESETVALUE   0x00000000UL
 
#define _ETH_FRAMESRXED1024_COUNT_DEFAULT   0x00000000UL
 
#define _ETH_FRAMESRXED1024_COUNT_MASK   0xFFFFFFFFUL
 
#define _ETH_FRAMESRXED1024_COUNT_SHIFT   0
 
#define _ETH_FRAMESRXED1024_MASK   0xFFFFFFFFUL
 
#define _ETH_FRAMESRXED1024_RESETVALUE   0x00000000UL
 
#define _ETH_FRAMESRXED128_COUNT_DEFAULT   0x00000000UL
 
#define _ETH_FRAMESRXED128_COUNT_MASK   0xFFFFFFFFUL
 
#define _ETH_FRAMESRXED128_COUNT_SHIFT   0
 
#define _ETH_FRAMESRXED128_MASK   0xFFFFFFFFUL
 
#define _ETH_FRAMESRXED128_RESETVALUE   0x00000000UL
 
#define _ETH_FRAMESRXED1519_COUNT_DEFAULT   0x00000000UL
 
#define _ETH_FRAMESRXED1519_COUNT_MASK   0xFFFFFFFFUL
 
#define _ETH_FRAMESRXED1519_COUNT_SHIFT   0
 
#define _ETH_FRAMESRXED1519_MASK   0xFFFFFFFFUL
 
#define _ETH_FRAMESRXED1519_RESETVALUE   0x00000000UL
 
#define _ETH_FRAMESRXED256_COUNT_DEFAULT   0x00000000UL
 
#define _ETH_FRAMESRXED256_COUNT_MASK   0xFFFFFFFFUL
 
#define _ETH_FRAMESRXED256_COUNT_SHIFT   0
 
#define _ETH_FRAMESRXED256_MASK   0xFFFFFFFFUL
 
#define _ETH_FRAMESRXED256_RESETVALUE   0x00000000UL
 
#define _ETH_FRAMESRXED512_COUNT_DEFAULT   0x00000000UL
 
#define _ETH_FRAMESRXED512_COUNT_MASK   0xFFFFFFFFUL
 
#define _ETH_FRAMESRXED512_COUNT_SHIFT   0
 
#define _ETH_FRAMESRXED512_MASK   0xFFFFFFFFUL
 
#define _ETH_FRAMESRXED512_RESETVALUE   0x00000000UL
 
#define _ETH_FRAMESRXED64_COUNT_DEFAULT   0x00000000UL
 
#define _ETH_FRAMESRXED64_COUNT_MASK   0xFFFFFFFFUL
 
#define _ETH_FRAMESRXED64_COUNT_SHIFT   0
 
#define _ETH_FRAMESRXED64_MASK   0xFFFFFFFFUL
 
#define _ETH_FRAMESRXED64_RESETVALUE   0x00000000UL
 
#define _ETH_FRAMESRXED65_COUNT_DEFAULT   0x00000000UL
 
#define _ETH_FRAMESRXED65_COUNT_MASK   0xFFFFFFFFUL
 
#define _ETH_FRAMESRXED65_COUNT_SHIFT   0
 
#define _ETH_FRAMESRXED65_MASK   0xFFFFFFFFUL
 
#define _ETH_FRAMESRXED65_RESETVALUE   0x00000000UL
 
#define _ETH_FRAMESRXEDOK_COUNT_DEFAULT   0x00000000UL
 
#define _ETH_FRAMESRXEDOK_COUNT_MASK   0xFFFFFFFFUL
 
#define _ETH_FRAMESRXEDOK_COUNT_SHIFT   0
 
#define _ETH_FRAMESRXEDOK_MASK   0xFFFFFFFFUL
 
#define _ETH_FRAMESRXEDOK_RESETVALUE   0x00000000UL
 
#define _ETH_FRAMESTXED1024_COUNT_DEFAULT   0x00000000UL
 
#define _ETH_FRAMESTXED1024_COUNT_MASK   0xFFFFFFFFUL
 
#define _ETH_FRAMESTXED1024_COUNT_SHIFT   0
 
#define _ETH_FRAMESTXED1024_MASK   0xFFFFFFFFUL
 
#define _ETH_FRAMESTXED1024_RESETVALUE   0x00000000UL
 
#define _ETH_FRAMESTXED128_COUNT_DEFAULT   0x00000000UL
 
#define _ETH_FRAMESTXED128_COUNT_MASK   0xFFFFFFFFUL
 
#define _ETH_FRAMESTXED128_COUNT_SHIFT   0
 
#define _ETH_FRAMESTXED128_MASK   0xFFFFFFFFUL
 
#define _ETH_FRAMESTXED128_RESETVALUE   0x00000000UL
 
#define _ETH_FRAMESTXED1519_COUNT_DEFAULT   0x00000000UL
 
#define _ETH_FRAMESTXED1519_COUNT_MASK   0xFFFFFFFFUL
 
#define _ETH_FRAMESTXED1519_COUNT_SHIFT   0
 
#define _ETH_FRAMESTXED1519_MASK   0xFFFFFFFFUL
 
#define _ETH_FRAMESTXED1519_RESETVALUE   0x00000000UL
 
#define _ETH_FRAMESTXED256_COUNT_DEFAULT   0x00000000UL
 
#define _ETH_FRAMESTXED256_COUNT_MASK   0xFFFFFFFFUL
 
#define _ETH_FRAMESTXED256_COUNT_SHIFT   0
 
#define _ETH_FRAMESTXED256_MASK   0xFFFFFFFFUL
 
#define _ETH_FRAMESTXED256_RESETVALUE   0x00000000UL
 
#define _ETH_FRAMESTXED512_COUNT_DEFAULT   0x00000000UL
 
#define _ETH_FRAMESTXED512_COUNT_MASK   0xFFFFFFFFUL
 
#define _ETH_FRAMESTXED512_COUNT_SHIFT   0
 
#define _ETH_FRAMESTXED512_MASK   0xFFFFFFFFUL
 
#define _ETH_FRAMESTXED512_RESETVALUE   0x00000000UL
 
#define _ETH_FRAMESTXED64_COUNT_DEFAULT   0x00000000UL
 
#define _ETH_FRAMESTXED64_COUNT_MASK   0xFFFFFFFFUL
 
#define _ETH_FRAMESTXED64_COUNT_SHIFT   0
 
#define _ETH_FRAMESTXED64_MASK   0xFFFFFFFFUL
 
#define _ETH_FRAMESTXED64_RESETVALUE   0x00000000UL
 
#define _ETH_FRAMESTXED65_COUNT_DEFAULT   0x00000000UL
 
#define _ETH_FRAMESTXED65_COUNT_MASK   0xFFFFFFFFUL
 
#define _ETH_FRAMESTXED65_COUNT_SHIFT   0
 
#define _ETH_FRAMESTXED65_MASK   0xFFFFFFFFUL
 
#define _ETH_FRAMESTXED65_RESETVALUE   0x00000000UL
 
#define _ETH_FRAMESTXEDOK_COUNT_DEFAULT   0x00000000UL
 
#define _ETH_FRAMESTXEDOK_COUNT_MASK   0xFFFFFFFFUL
 
#define _ETH_FRAMESTXEDOK_COUNT_SHIFT   0
 
#define _ETH_FRAMESTXEDOK_MASK   0xFFFFFFFFUL
 
#define _ETH_FRAMESTXEDOK_RESETVALUE   0x00000000UL
 
#define _ETH_HASHBOTTOM_ADDR_DEFAULT   0x00000000UL
 
#define _ETH_HASHBOTTOM_ADDR_MASK   0xFFFFFFFFUL
 
#define _ETH_HASHBOTTOM_ADDR_SHIFT   0
 
#define _ETH_HASHBOTTOM_MASK   0xFFFFFFFFUL
 
#define _ETH_HASHBOTTOM_RESETVALUE   0x00000000UL
 
#define _ETH_HASHTOP_ADDR_DEFAULT   0x00000000UL
 
#define _ETH_HASHTOP_ADDR_MASK   0xFFFFFFFFUL
 
#define _ETH_HASHTOP_ADDR_SHIFT   0
 
#define _ETH_HASHTOP_MASK   0xFFFFFFFFUL
 
#define _ETH_HASHTOP_RESETVALUE   0x00000000UL
 
#define _ETH_IENC_AMBAERR_DEFAULT   0x00000000UL
 
#define _ETH_IENC_AMBAERR_MASK   0x40UL
 
#define _ETH_IENC_AMBAERR_SHIFT   6
 
#define _ETH_IENC_MASK   0x3FFC7CFFUL
 
#define _ETH_IENC_MNGMNTDONE_DEFAULT   0x00000000UL
 
#define _ETH_IENC_MNGMNTDONE_MASK   0x1UL
 
#define _ETH_IENC_MNGMNTDONE_SHIFT   0
 
#define _ETH_IENC_NONZEROPFRMQUANT_DEFAULT   0x00000000UL
 
#define _ETH_IENC_NONZEROPFRMQUANT_MASK   0x1000UL
 
#define _ETH_IENC_NONZEROPFRMQUANT_SHIFT   12
 
#define _ETH_IENC_PAUSETIMEZERO_DEFAULT   0x00000000UL
 
#define _ETH_IENC_PAUSETIMEZERO_MASK   0x2000UL
 
#define _ETH_IENC_PAUSETIMEZERO_SHIFT   13
 
#define _ETH_IENC_PFRMTX_DEFAULT   0x00000000UL
 
#define _ETH_IENC_PFRMTX_MASK   0x4000UL
 
#define _ETH_IENC_PFRMTX_SHIFT   14
 
#define _ETH_IENC_PTPDLYREQFRMRX_DEFAULT   0x00000000UL
 
#define _ETH_IENC_PTPDLYREQFRMRX_MASK   0x40000UL
 
#define _ETH_IENC_PTPDLYREQFRMRX_SHIFT   18
 
#define _ETH_IENC_PTPDLYREQFRMTX_DEFAULT   0x00000000UL
 
#define _ETH_IENC_PTPDLYREQFRMTX_MASK   0x100000UL
 
#define _ETH_IENC_PTPDLYREQFRMTX_SHIFT   20
 
#define _ETH_IENC_PTPPDLYREQFRMRX_DEFAULT   0x00000000UL
 
#define _ETH_IENC_PTPPDLYREQFRMRX_MASK   0x400000UL
 
#define _ETH_IENC_PTPPDLYREQFRMRX_SHIFT   22
 
#define _ETH_IENC_PTPPDLYREQFRMTX_DEFAULT   0x00000000UL
 
#define _ETH_IENC_PTPPDLYREQFRMTX_MASK   0x1000000UL
 
#define _ETH_IENC_PTPPDLYREQFRMTX_SHIFT   24
 
#define _ETH_IENC_PTPPDLYRESPFRMRX_DEFAULT   0x00000000UL
 
#define _ETH_IENC_PTPPDLYRESPFRMRX_MASK   0x800000UL
 
#define _ETH_IENC_PTPPDLYRESPFRMRX_SHIFT   23
 
#define _ETH_IENC_PTPPDLYRESPFRMTX_DEFAULT   0x00000000UL
 
#define _ETH_IENC_PTPPDLYRESPFRMTX_MASK   0x2000000UL
 
#define _ETH_IENC_PTPPDLYRESPFRMTX_SHIFT   25
 
#define _ETH_IENC_PTPSYNCFRMRX_DEFAULT   0x00000000UL
 
#define _ETH_IENC_PTPSYNCFRMRX_MASK   0x80000UL
 
#define _ETH_IENC_PTPSYNCFRMRX_SHIFT   19
 
#define _ETH_IENC_PTPSYNCFRMTX_DEFAULT   0x00000000UL
 
#define _ETH_IENC_PTPSYNCFRMTX_MASK   0x200000UL
 
#define _ETH_IENC_PTPSYNCFRMTX_SHIFT   21
 
#define _ETH_IENC_RESETVALUE   0x00000000UL
 
#define _ETH_IENC_RESPNOTOK_DEFAULT   0x00000000UL
 
#define _ETH_IENC_RESPNOTOK_MASK   0x800UL
 
#define _ETH_IENC_RESPNOTOK_SHIFT   11
 
#define _ETH_IENC_RTRYLMTORLATECOL_DEFAULT   0x00000000UL
 
#define _ETH_IENC_RTRYLMTORLATECOL_MASK   0x20UL
 
#define _ETH_IENC_RTRYLMTORLATECOL_SHIFT   5
 
#define _ETH_IENC_RXCMPLT_DEFAULT   0x00000000UL
 
#define _ETH_IENC_RXCMPLT_MASK   0x2UL
 
#define _ETH_IENC_RXCMPLT_SHIFT   1
 
#define _ETH_IENC_RXLPIINDC_DEFAULT   0x00000000UL
 
#define _ETH_IENC_RXLPIINDC_MASK   0x8000000UL
 
#define _ETH_IENC_RXLPIINDC_SHIFT   27
 
#define _ETH_IENC_RXOVERRUN_DEFAULT   0x00000000UL
 
#define _ETH_IENC_RXOVERRUN_MASK   0x400UL
 
#define _ETH_IENC_RXOVERRUN_SHIFT   10
 
#define _ETH_IENC_RXUSEDBITREAD_DEFAULT   0x00000000UL
 
#define _ETH_IENC_RXUSEDBITREAD_MASK   0x4UL
 
#define _ETH_IENC_RXUSEDBITREAD_SHIFT   2
 
#define _ETH_IENC_TSUSECREGINCR_DEFAULT   0x00000000UL
 
#define _ETH_IENC_TSUSECREGINCR_MASK   0x4000000UL
 
#define _ETH_IENC_TSUSECREGINCR_SHIFT   26
 
#define _ETH_IENC_TSUTIMERCOMP_DEFAULT   0x00000000UL
 
#define _ETH_IENC_TSUTIMERCOMP_MASK   0x20000000UL
 
#define _ETH_IENC_TSUTIMERCOMP_SHIFT   29
 
#define _ETH_IENC_TXCMPLT_DEFAULT   0x00000000UL
 
#define _ETH_IENC_TXCMPLT_MASK   0x80UL
 
#define _ETH_IENC_TXCMPLT_SHIFT   7
 
#define _ETH_IENC_TXUNDERRUN_DEFAULT   0x00000000UL
 
#define _ETH_IENC_TXUNDERRUN_MASK   0x10UL
 
#define _ETH_IENC_TXUNDERRUN_SHIFT   4
 
#define _ETH_IENC_TXUSEDBITREAD_DEFAULT   0x00000000UL
 
#define _ETH_IENC_TXUSEDBITREAD_MASK   0x8UL
 
#define _ETH_IENC_TXUSEDBITREAD_SHIFT   3
 
#define _ETH_IENC_WOLEVNTRX_DEFAULT   0x00000000UL
 
#define _ETH_IENC_WOLEVNTRX_MASK   0x10000000UL
 
#define _ETH_IENC_WOLEVNTRX_SHIFT   28
 
#define _ETH_IENRO_AMBAERR_DEFAULT   0x00000001UL
 
#define _ETH_IENRO_AMBAERR_MASK   0x40UL
 
#define _ETH_IENRO_AMBAERR_SHIFT   6
 
#define _ETH_IENRO_MASK   0x3FFC7DFFUL
 
#define _ETH_IENRO_MNGMNTDONE_DEFAULT   0x00000001UL
 
#define _ETH_IENRO_MNGMNTDONE_MASK   0x1UL
 
#define _ETH_IENRO_MNGMNTDONE_SHIFT   0
 
#define _ETH_IENRO_NONZEROPFRMQUANT_DEFAULT   0x00000001UL
 
#define _ETH_IENRO_NONZEROPFRMQUANT_MASK   0x1000UL
 
#define _ETH_IENRO_NONZEROPFRMQUANT_SHIFT   12
 
#define _ETH_IENRO_PAUSETIMEZERO_DEFAULT   0x00000001UL
 
#define _ETH_IENRO_PAUSETIMEZERO_MASK   0x2000UL
 
#define _ETH_IENRO_PAUSETIMEZERO_SHIFT   13
 
#define _ETH_IENRO_PFRMTX_DEFAULT   0x00000001UL
 
#define _ETH_IENRO_PFRMTX_MASK   0x4000UL
 
#define _ETH_IENRO_PFRMTX_SHIFT   14
 
#define _ETH_IENRO_PTPDLYREQFRMRX_DEFAULT   0x00000001UL
 
#define _ETH_IENRO_PTPDLYREQFRMRX_MASK   0x40000UL
 
#define _ETH_IENRO_PTPDLYREQFRMRX_SHIFT   18
 
#define _ETH_IENRO_PTPDLYREQFRMTX_DEFAULT   0x00000001UL
 
#define _ETH_IENRO_PTPDLYREQFRMTX_MASK   0x100000UL
 
#define _ETH_IENRO_PTPDLYREQFRMTX_SHIFT   20
 
#define _ETH_IENRO_PTPPDLYREQFRMRX_DEFAULT   0x00000001UL
 
#define _ETH_IENRO_PTPPDLYREQFRMRX_MASK   0x400000UL
 
#define _ETH_IENRO_PTPPDLYREQFRMRX_SHIFT   22
 
#define _ETH_IENRO_PTPPDLYREQFRMTX_DEFAULT   0x00000001UL
 
#define _ETH_IENRO_PTPPDLYREQFRMTX_MASK   0x1000000UL
 
#define _ETH_IENRO_PTPPDLYREQFRMTX_SHIFT   24
 
#define _ETH_IENRO_PTPPDLYRESPFRMRX_DEFAULT   0x00000001UL
 
#define _ETH_IENRO_PTPPDLYRESPFRMRX_MASK   0x800000UL
 
#define _ETH_IENRO_PTPPDLYRESPFRMRX_SHIFT   23
 
#define _ETH_IENRO_PTPPDLYRESPFRMTX_DEFAULT   0x00000001UL
 
#define _ETH_IENRO_PTPPDLYRESPFRMTX_MASK   0x2000000UL
 
#define _ETH_IENRO_PTPPDLYRESPFRMTX_SHIFT   25
 
#define _ETH_IENRO_PTPSYNCFRMRX_DEFAULT   0x00000001UL
 
#define _ETH_IENRO_PTPSYNCFRMRX_MASK   0x80000UL
 
#define _ETH_IENRO_PTPSYNCFRMRX_SHIFT   19
 
#define _ETH_IENRO_PTPSYNCFRMTX_DEFAULT   0x00000001UL
 
#define _ETH_IENRO_PTPSYNCFRMTX_MASK   0x200000UL
 
#define _ETH_IENRO_PTPSYNCFRMTX_SHIFT   21
 
#define _ETH_IENRO_RESETVALUE   0x3FFC7DFFUL
 
#define _ETH_IENRO_RESPNOTOK_DEFAULT   0x00000001UL
 
#define _ETH_IENRO_RESPNOTOK_MASK   0x800UL
 
#define _ETH_IENRO_RESPNOTOK_SHIFT   11
 
#define _ETH_IENRO_RTRYLMTORLATECOL_DEFAULT   0x00000001UL
 
#define _ETH_IENRO_RTRYLMTORLATECOL_MASK   0x20UL
 
#define _ETH_IENRO_RTRYLMTORLATECOL_SHIFT   5
 
#define _ETH_IENRO_RXCMPLT_DEFAULT   0x00000001UL
 
#define _ETH_IENRO_RXCMPLT_MASK   0x2UL
 
#define _ETH_IENRO_RXCMPLT_SHIFT   1
 
#define _ETH_IENRO_RXLPIINDC_DEFAULT   0x00000001UL
 
#define _ETH_IENRO_RXLPIINDC_MASK   0x8000000UL
 
#define _ETH_IENRO_RXLPIINDC_SHIFT   27
 
#define _ETH_IENRO_RXOVERRUN_DEFAULT   0x00000001UL
 
#define _ETH_IENRO_RXOVERRUN_MASK   0x400UL
 
#define _ETH_IENRO_RXOVERRUN_SHIFT   10
 
#define _ETH_IENRO_RXUSEDBITREAD_DEFAULT   0x00000001UL
 
#define _ETH_IENRO_RXUSEDBITREAD_MASK   0x4UL
 
#define _ETH_IENRO_RXUSEDBITREAD_SHIFT   2
 
#define _ETH_IENRO_TSUSECREGINCR_DEFAULT   0x00000001UL
 
#define _ETH_IENRO_TSUSECREGINCR_MASK   0x4000000UL
 
#define _ETH_IENRO_TSUSECREGINCR_SHIFT   26
 
#define _ETH_IENRO_TSUTIMERCOMP_DEFAULT   0x00000001UL
 
#define _ETH_IENRO_TSUTIMERCOMP_MASK   0x20000000UL
 
#define _ETH_IENRO_TSUTIMERCOMP_SHIFT   29
 
#define _ETH_IENRO_TXCMPLT_DEFAULT   0x00000001UL
 
#define _ETH_IENRO_TXCMPLT_MASK   0x80UL
 
#define _ETH_IENRO_TXCMPLT_SHIFT   7
 
#define _ETH_IENRO_TXUNDERRUN_DEFAULT   0x00000001UL
 
#define _ETH_IENRO_TXUNDERRUN_MASK   0x10UL
 
#define _ETH_IENRO_TXUNDERRUN_SHIFT   4
 
#define _ETH_IENRO_TXUSEDBITREAD_DEFAULT   0x00000001UL
 
#define _ETH_IENRO_TXUSEDBITREAD_MASK   0x8UL
 
#define _ETH_IENRO_TXUSEDBITREAD_SHIFT   3
 
#define _ETH_IENRO_UNUSED_DEFAULT   0x00000001UL
 
#define _ETH_IENRO_UNUSED_MASK   0x100UL
 
#define _ETH_IENRO_UNUSED_SHIFT   8
 
#define _ETH_IENRO_WOLEVNTRX_DEFAULT   0x00000001UL
 
#define _ETH_IENRO_WOLEVNTRX_MASK   0x10000000UL
 
#define _ETH_IENRO_WOLEVNTRX_SHIFT   28
 
#define _ETH_IENS_AMBAERR_DEFAULT   0x00000000UL
 
#define _ETH_IENS_AMBAERR_MASK   0x40UL
 
#define _ETH_IENS_AMBAERR_SHIFT   6
 
#define _ETH_IENS_MASK   0x3FFC7CFFUL
 
#define _ETH_IENS_MNGMNTDONE_DEFAULT   0x00000000UL
 
#define _ETH_IENS_MNGMNTDONE_MASK   0x1UL
 
#define _ETH_IENS_MNGMNTDONE_SHIFT   0
 
#define _ETH_IENS_NONZEROPFRMQUANT_DEFAULT   0x00000000UL
 
#define _ETH_IENS_NONZEROPFRMQUANT_MASK   0x1000UL
 
#define _ETH_IENS_NONZEROPFRMQUANT_SHIFT   12
 
#define _ETH_IENS_PAUSETIMEZERO_DEFAULT   0x00000000UL
 
#define _ETH_IENS_PAUSETIMEZERO_MASK   0x2000UL
 
#define _ETH_IENS_PAUSETIMEZERO_SHIFT   13
 
#define _ETH_IENS_PFRMTX_DEFAULT   0x00000000UL
 
#define _ETH_IENS_PFRMTX_MASK   0x4000UL
 
#define _ETH_IENS_PFRMTX_SHIFT   14
 
#define _ETH_IENS_PTPDLYREQFRMRX_DEFAULT   0x00000000UL
 
#define _ETH_IENS_PTPDLYREQFRMRX_MASK   0x40000UL
 
#define _ETH_IENS_PTPDLYREQFRMRX_SHIFT   18
 
#define _ETH_IENS_PTPDLYREQFRMTX_DEFAULT   0x00000000UL
 
#define _ETH_IENS_PTPDLYREQFRMTX_MASK   0x100000UL
 
#define _ETH_IENS_PTPDLYREQFRMTX_SHIFT   20
 
#define _ETH_IENS_PTPPDLYREQFRMRX_DEFAULT   0x00000000UL
 
#define _ETH_IENS_PTPPDLYREQFRMRX_MASK   0x400000UL
 
#define _ETH_IENS_PTPPDLYREQFRMRX_SHIFT   22
 
#define _ETH_IENS_PTPPDLYREQFRMTX_DEFAULT   0x00000000UL
 
#define _ETH_IENS_PTPPDLYREQFRMTX_MASK   0x1000000UL
 
#define _ETH_IENS_PTPPDLYREQFRMTX_SHIFT   24
 
#define _ETH_IENS_PTPPDLYRESPFRMRX_DEFAULT   0x00000000UL
 
#define _ETH_IENS_PTPPDLYRESPFRMRX_MASK   0x800000UL
 
#define _ETH_IENS_PTPPDLYRESPFRMRX_SHIFT   23
 
#define _ETH_IENS_PTPPDLYRESPFRMTX_DEFAULT   0x00000000UL
 
#define _ETH_IENS_PTPPDLYRESPFRMTX_MASK   0x2000000UL
 
#define _ETH_IENS_PTPPDLYRESPFRMTX_SHIFT   25
 
#define _ETH_IENS_PTPSYNCFRMRX_DEFAULT   0x00000000UL
 
#define _ETH_IENS_PTPSYNCFRMRX_MASK   0x80000UL
 
#define _ETH_IENS_PTPSYNCFRMRX_SHIFT   19
 
#define _ETH_IENS_PTPSYNCFRMTX_DEFAULT   0x00000000UL
 
#define _ETH_IENS_PTPSYNCFRMTX_MASK   0x200000UL
 
#define _ETH_IENS_PTPSYNCFRMTX_SHIFT   21
 
#define _ETH_IENS_RESETVALUE   0x00000000UL
 
#define _ETH_IENS_RESPNOTOK_DEFAULT   0x00000000UL
 
#define _ETH_IENS_RESPNOTOK_MASK   0x800UL
 
#define _ETH_IENS_RESPNOTOK_SHIFT   11
 
#define _ETH_IENS_RTRYLMTORLATECOL_DEFAULT   0x00000000UL
 
#define _ETH_IENS_RTRYLMTORLATECOL_MASK   0x20UL
 
#define _ETH_IENS_RTRYLMTORLATECOL_SHIFT   5
 
#define _ETH_IENS_RXCMPLT_DEFAULT   0x00000000UL
 
#define _ETH_IENS_RXCMPLT_MASK   0x2UL
 
#define _ETH_IENS_RXCMPLT_SHIFT   1
 
#define _ETH_IENS_RXLPIINDC_DEFAULT   0x00000000UL
 
#define _ETH_IENS_RXLPIINDC_MASK   0x8000000UL
 
#define _ETH_IENS_RXLPIINDC_SHIFT   27
 
#define _ETH_IENS_RXOVERRUN_DEFAULT   0x00000000UL
 
#define _ETH_IENS_RXOVERRUN_MASK   0x400UL
 
#define _ETH_IENS_RXOVERRUN_SHIFT   10
 
#define _ETH_IENS_RXUSEDBITREAD_DEFAULT   0x00000000UL
 
#define _ETH_IENS_RXUSEDBITREAD_MASK   0x4UL
 
#define _ETH_IENS_RXUSEDBITREAD_SHIFT   2
 
#define _ETH_IENS_TSUSECREGINCR_DEFAULT   0x00000000UL
 
#define _ETH_IENS_TSUSECREGINCR_MASK   0x4000000UL
 
#define _ETH_IENS_TSUSECREGINCR_SHIFT   26
 
#define _ETH_IENS_TSUTIMERCOMP_DEFAULT   0x00000000UL
 
#define _ETH_IENS_TSUTIMERCOMP_MASK   0x20000000UL
 
#define _ETH_IENS_TSUTIMERCOMP_SHIFT   29
 
#define _ETH_IENS_TXCMPLT_DEFAULT   0x00000000UL
 
#define _ETH_IENS_TXCMPLT_MASK   0x80UL
 
#define _ETH_IENS_TXCMPLT_SHIFT   7
 
#define _ETH_IENS_TXUNDERRUN_DEFAULT   0x00000000UL
 
#define _ETH_IENS_TXUNDERRUN_MASK   0x10UL
 
#define _ETH_IENS_TXUNDERRUN_SHIFT   4
 
#define _ETH_IENS_TXUSEDBITREAD_DEFAULT   0x00000000UL
 
#define _ETH_IENS_TXUSEDBITREAD_MASK   0x8UL
 
#define _ETH_IENS_TXUSEDBITREAD_SHIFT   3
 
#define _ETH_IENS_WOLEVNTRX_DEFAULT   0x00000000UL
 
#define _ETH_IENS_WOLEVNTRX_MASK   0x10000000UL
 
#define _ETH_IENS_WOLEVNTRX_SHIFT   28
 
#define _ETH_IFCR_AMBAERR_DEFAULT   0x00000000UL
 
#define _ETH_IFCR_AMBAERR_MASK   0x40UL
 
#define _ETH_IFCR_AMBAERR_SHIFT   6
 
#define _ETH_IFCR_MASK   0x3FFC7CFFUL
 
#define _ETH_IFCR_MNGMNTDONE_DEFAULT   0x00000000UL
 
#define _ETH_IFCR_MNGMNTDONE_MASK   0x1UL
 
#define _ETH_IFCR_MNGMNTDONE_SHIFT   0
 
#define _ETH_IFCR_NONZEROPFRMQUANT_DEFAULT   0x00000000UL
 
#define _ETH_IFCR_NONZEROPFRMQUANT_MASK   0x1000UL
 
#define _ETH_IFCR_NONZEROPFRMQUANT_SHIFT   12
 
#define _ETH_IFCR_PAUSETIMEZERO_DEFAULT   0x00000000UL
 
#define _ETH_IFCR_PAUSETIMEZERO_MASK   0x2000UL
 
#define _ETH_IFCR_PAUSETIMEZERO_SHIFT   13
 
#define _ETH_IFCR_PFRMTX_DEFAULT   0x00000000UL
 
#define _ETH_IFCR_PFRMTX_MASK   0x4000UL
 
#define _ETH_IFCR_PFRMTX_SHIFT   14
 
#define _ETH_IFCR_PTPDLYREQFRMRX_DEFAULT   0x00000000UL
 
#define _ETH_IFCR_PTPDLYREQFRMRX_MASK   0x40000UL
 
#define _ETH_IFCR_PTPDLYREQFRMRX_SHIFT   18
 
#define _ETH_IFCR_PTPDLYREQFRMTX_DEFAULT   0x00000000UL
 
#define _ETH_IFCR_PTPDLYREQFRMTX_MASK   0x100000UL
 
#define _ETH_IFCR_PTPDLYREQFRMTX_SHIFT   20
 
#define _ETH_IFCR_PTPPDLYREQFRMRX_DEFAULT   0x00000000UL
 
#define _ETH_IFCR_PTPPDLYREQFRMRX_MASK   0x400000UL
 
#define _ETH_IFCR_PTPPDLYREQFRMRX_SHIFT   22
 
#define _ETH_IFCR_PTPPDLYREQFRMTX_DEFAULT   0x00000000UL
 
#define _ETH_IFCR_PTPPDLYREQFRMTX_MASK   0x1000000UL
 
#define _ETH_IFCR_PTPPDLYREQFRMTX_SHIFT   24
 
#define _ETH_IFCR_PTPPDLYRESPFRMRX_DEFAULT   0x00000000UL
 
#define _ETH_IFCR_PTPPDLYRESPFRMRX_MASK   0x800000UL
 
#define _ETH_IFCR_PTPPDLYRESPFRMRX_SHIFT   23
 
#define _ETH_IFCR_PTPPDLYRESPFRMTX_DEFAULT   0x00000000UL
 
#define _ETH_IFCR_PTPPDLYRESPFRMTX_MASK   0x2000000UL
 
#define _ETH_IFCR_PTPPDLYRESPFRMTX_SHIFT   25
 
#define _ETH_IFCR_PTPSYNCFRMRX_DEFAULT   0x00000000UL
 
#define _ETH_IFCR_PTPSYNCFRMRX_MASK   0x80000UL
 
#define _ETH_IFCR_PTPSYNCFRMRX_SHIFT   19
 
#define _ETH_IFCR_PTPSYNCFRMTX_DEFAULT   0x00000000UL
 
#define _ETH_IFCR_PTPSYNCFRMTX_MASK   0x200000UL
 
#define _ETH_IFCR_PTPSYNCFRMTX_SHIFT   21
 
#define _ETH_IFCR_RESETVALUE   0x00000000UL
 
#define _ETH_IFCR_RESPNOTOK_DEFAULT   0x00000000UL
 
#define _ETH_IFCR_RESPNOTOK_MASK   0x800UL
 
#define _ETH_IFCR_RESPNOTOK_SHIFT   11
 
#define _ETH_IFCR_RTRYLMTORLATECOL_DEFAULT   0x00000000UL
 
#define _ETH_IFCR_RTRYLMTORLATECOL_MASK   0x20UL
 
#define _ETH_IFCR_RTRYLMTORLATECOL_SHIFT   5
 
#define _ETH_IFCR_RXCMPLT_DEFAULT   0x00000000UL
 
#define _ETH_IFCR_RXCMPLT_MASK   0x2UL
 
#define _ETH_IFCR_RXCMPLT_SHIFT   1
 
#define _ETH_IFCR_RXLPIINDC_DEFAULT   0x00000000UL
 
#define _ETH_IFCR_RXLPIINDC_MASK   0x8000000UL
 
#define _ETH_IFCR_RXLPIINDC_SHIFT   27
 
#define _ETH_IFCR_RXOVERRUN_DEFAULT   0x00000000UL
 
#define _ETH_IFCR_RXOVERRUN_MASK   0x400UL
 
#define _ETH_IFCR_RXOVERRUN_SHIFT   10
 
#define _ETH_IFCR_RXUSEDBITREAD_DEFAULT   0x00000000UL
 
#define _ETH_IFCR_RXUSEDBITREAD_MASK   0x4UL
 
#define _ETH_IFCR_RXUSEDBITREAD_SHIFT   2
 
#define _ETH_IFCR_TSUSECREGINCR_DEFAULT   0x00000000UL
 
#define _ETH_IFCR_TSUSECREGINCR_MASK   0x4000000UL
 
#define _ETH_IFCR_TSUSECREGINCR_SHIFT   26
 
#define _ETH_IFCR_TSUTIMERCOMP_DEFAULT   0x00000000UL
 
#define _ETH_IFCR_TSUTIMERCOMP_MASK   0x20000000UL
 
#define _ETH_IFCR_TSUTIMERCOMP_SHIFT   29
 
#define _ETH_IFCR_TXCMPLT_DEFAULT   0x00000000UL
 
#define _ETH_IFCR_TXCMPLT_MASK   0x80UL
 
#define _ETH_IFCR_TXCMPLT_SHIFT   7
 
#define _ETH_IFCR_TXUNDERRUN_DEFAULT   0x00000000UL
 
#define _ETH_IFCR_TXUNDERRUN_MASK   0x10UL
 
#define _ETH_IFCR_TXUNDERRUN_SHIFT   4
 
#define _ETH_IFCR_TXUSEDBITREAD_DEFAULT   0x00000000UL
 
#define _ETH_IFCR_TXUSEDBITREAD_MASK   0x8UL
 
#define _ETH_IFCR_TXUSEDBITREAD_SHIFT   3
 
#define _ETH_IFCR_WOLEVNTRX_DEFAULT   0x00000000UL
 
#define _ETH_IFCR_WOLEVNTRX_MASK   0x10000000UL
 
#define _ETH_IFCR_WOLEVNTRX_SHIFT   28
 
#define _ETH_IMOD_MASK   0x00FF00FFUL
 
#define _ETH_IMOD_RESETVALUE   0x00000000UL
 
#define _ETH_IMOD_RXINTMOD_DEFAULT   0x00000000UL
 
#define _ETH_IMOD_RXINTMOD_MASK   0xFFUL
 
#define _ETH_IMOD_RXINTMOD_SHIFT   0
 
#define _ETH_IMOD_TXINTMOD_DEFAULT   0x00000000UL
 
#define _ETH_IMOD_TXINTMOD_MASK   0xFF0000UL
 
#define _ETH_IMOD_TXINTMOD_SHIFT   16
 
#define _ETH_JUMBOMAXLEN_JUMBOMAXLEN_DEFAULT   0x00002800UL
 
#define _ETH_JUMBOMAXLEN_JUMBOMAXLEN_MASK   0x3FFFUL
 
#define _ETH_JUMBOMAXLEN_JUMBOMAXLEN_SHIFT   0
 
#define _ETH_JUMBOMAXLEN_MASK   0x00003FFFUL
 
#define _ETH_JUMBOMAXLEN_RESETVALUE   0x00002800UL
 
#define _ETH_LATECOLS_COUNT_DEFAULT   0x00000000UL
 
#define _ETH_LATECOLS_COUNT_MASK   0x3FFUL
 
#define _ETH_LATECOLS_COUNT_SHIFT   0
 
#define _ETH_LATECOLS_MASK   0x000003FFUL
 
#define _ETH_LATECOLS_RESETVALUE   0x00000000UL
 
#define _ETH_MASKADD1BOTTOM_ADDRMASK_DEFAULT   0x00000000UL
 
#define _ETH_MASKADD1BOTTOM_ADDRMASK_MASK   0xFFFFFFFFUL
 
#define _ETH_MASKADD1BOTTOM_ADDRMASK_SHIFT   0
 
#define _ETH_MASKADD1BOTTOM_MASK   0xFFFFFFFFUL
 
#define _ETH_MASKADD1BOTTOM_RESETVALUE   0x00000000UL
 
#define _ETH_MASKADD1TOP_ADDRMASK_DEFAULT   0x00000000UL
 
#define _ETH_MASKADD1TOP_ADDRMASK_MASK   0xFFFFUL
 
#define _ETH_MASKADD1TOP_ADDRMASK_SHIFT   0
 
#define _ETH_MASKADD1TOP_MASK   0x0000FFFFUL
 
#define _ETH_MASKADD1TOP_RESETVALUE   0x00000000UL
 
#define _ETH_MULTICASTRXED_COUNT_DEFAULT   0x00000000UL
 
#define _ETH_MULTICASTRXED_COUNT_MASK   0xFFFFFFFFUL
 
#define _ETH_MULTICASTRXED_COUNT_SHIFT   0
 
#define _ETH_MULTICASTRXED_MASK   0xFFFFFFFFUL
 
#define _ETH_MULTICASTRXED_RESETVALUE   0x00000000UL
 
#define _ETH_MULTICASTTXED_COUNT_DEFAULT   0x00000000UL
 
#define _ETH_MULTICASTTXED_COUNT_MASK   0xFFFFFFFFUL
 
#define _ETH_MULTICASTTXED_COUNT_SHIFT   0
 
#define _ETH_MULTICASTTXED_MASK   0xFFFFFFFFUL
 
#define _ETH_MULTICASTTXED_RESETVALUE   0x00000000UL
 
#define _ETH_MULTICOLS_COUNT_DEFAULT   0x00000000UL
 
#define _ETH_MULTICOLS_COUNT_MASK   0x3FFFFUL
 
#define _ETH_MULTICOLS_COUNT_SHIFT   0
 
#define _ETH_MULTICOLS_MASK   0x0003FFFFUL
 
#define _ETH_MULTICOLS_RESETVALUE   0x00000000UL
 
#define _ETH_NETWORKCFG_COPYALLFRAMES_DEFAULT   0x00000000UL
 
#define _ETH_NETWORKCFG_COPYALLFRAMES_MASK   0x10UL
 
#define _ETH_NETWORKCFG_COPYALLFRAMES_SHIFT   4
 
#define _ETH_NETWORKCFG_DISCOPYOFPFRAMES_DEFAULT   0x00000000UL
 
#define _ETH_NETWORKCFG_DISCOPYOFPFRAMES_MASK   0x800000UL
 
#define _ETH_NETWORKCFG_DISCOPYOFPFRAMES_SHIFT   23
 
#define _ETH_NETWORKCFG_DISCRDNONVLANFRAMES_DEFAULT   0x00000000UL
 
#define _ETH_NETWORKCFG_DISCRDNONVLANFRAMES_MASK   0x4UL
 
#define _ETH_NETWORKCFG_DISCRDNONVLANFRAMES_SHIFT   2
 
#define _ETH_NETWORKCFG_ENHALFDUPLEXRX_DEFAULT   0x00000000UL
 
#define _ETH_NETWORKCFG_ENHALFDUPLEXRX_MASK   0x2000000UL
 
#define _ETH_NETWORKCFG_ENHALFDUPLEXRX_SHIFT   25
 
#define _ETH_NETWORKCFG_FCSREMOVE_DEFAULT   0x00000000UL
 
#define _ETH_NETWORKCFG_FCSREMOVE_MASK   0x20000UL
 
#define _ETH_NETWORKCFG_FCSREMOVE_SHIFT   17
 
#define _ETH_NETWORKCFG_FULLDUPLEX_DEFAULT   0x00000000UL
 
#define _ETH_NETWORKCFG_FULLDUPLEX_MASK   0x2UL
 
#define _ETH_NETWORKCFG_FULLDUPLEX_SHIFT   1
 
#define _ETH_NETWORKCFG_IGNOREIPGRXER_DEFAULT   0x00000000UL
 
#define _ETH_NETWORKCFG_IGNOREIPGRXER_MASK   0x40000000UL
 
#define _ETH_NETWORKCFG_IGNOREIPGRXER_SHIFT   30
 
#define _ETH_NETWORKCFG_IGNORERXFCS_DEFAULT   0x00000000UL
 
#define _ETH_NETWORKCFG_IGNORERXFCS_MASK   0x4000000UL
 
#define _ETH_NETWORKCFG_IGNORERXFCS_SHIFT   26
 
#define _ETH_NETWORKCFG_IPGSTRTCHEN_DEFAULT   0x00000000UL
 
#define _ETH_NETWORKCFG_IPGSTRTCHEN_MASK   0x10000000UL
 
#define _ETH_NETWORKCFG_IPGSTRTCHEN_SHIFT   28
 
#define _ETH_NETWORKCFG_JUMBOFRAMES_DEFAULT   0x00000000UL
 
#define _ETH_NETWORKCFG_JUMBOFRAMES_MASK   0x8UL
 
#define _ETH_NETWORKCFG_JUMBOFRAMES_SHIFT   3
 
#define _ETH_NETWORKCFG_LENFIELDERRFRMDISCRD_DEFAULT   0x00000000UL
 
#define _ETH_NETWORKCFG_LENFIELDERRFRMDISCRD_MASK   0x10000UL
 
#define _ETH_NETWORKCFG_LENFIELDERRFRMDISCRD_SHIFT   16
 
#define _ETH_NETWORKCFG_MASK   0x779FF1FFUL
 
#define _ETH_NETWORKCFG_MDCCLKDIV_DEFAULT   0x00000002UL
 
#define _ETH_NETWORKCFG_MDCCLKDIV_DIVBY128   0x00000006UL
 
#define _ETH_NETWORKCFG_MDCCLKDIV_DIVBY16   0x00000001UL
 
#define _ETH_NETWORKCFG_MDCCLKDIV_DIVBY224   0x00000007UL
 
#define _ETH_NETWORKCFG_MDCCLKDIV_DIVBY32   0x00000002UL
 
#define _ETH_NETWORKCFG_MDCCLKDIV_DIVBY48   0x00000003UL
 
#define _ETH_NETWORKCFG_MDCCLKDIV_DIVBY64   0x00000004UL
 
#define _ETH_NETWORKCFG_MDCCLKDIV_DIVBY8   0x00000000UL
 
#define _ETH_NETWORKCFG_MDCCLKDIV_DIVBY96   0x00000005UL
 
#define _ETH_NETWORKCFG_MDCCLKDIV_MASK   0x1C0000UL
 
#define _ETH_NETWORKCFG_MDCCLKDIV_SHIFT   18
 
#define _ETH_NETWORKCFG_MULTICASTHASHEN_DEFAULT   0x00000000UL
 
#define _ETH_NETWORKCFG_MULTICASTHASHEN_MASK   0x40UL
 
#define _ETH_NETWORKCFG_MULTICASTHASHEN_SHIFT   6
 
#define _ETH_NETWORKCFG_NOBROADCAST_DEFAULT   0x00000000UL
 
#define _ETH_NETWORKCFG_NOBROADCAST_MASK   0x20UL
 
#define _ETH_NETWORKCFG_NOBROADCAST_SHIFT   5
 
#define _ETH_NETWORKCFG_NSPCHANGE_DEFAULT   0x00000000UL
 
#define _ETH_NETWORKCFG_NSPCHANGE_MASK   0x20000000UL
 
#define _ETH_NETWORKCFG_NSPCHANGE_SHIFT   29
 
#define _ETH_NETWORKCFG_PAUSEEN_DEFAULT   0x00000000UL
 
#define _ETH_NETWORKCFG_PAUSEEN_MASK   0x2000UL
 
#define _ETH_NETWORKCFG_PAUSEEN_SHIFT   13
 
#define _ETH_NETWORKCFG_RESETVALUE   0x00080000UL
 
#define _ETH_NETWORKCFG_RETRYTEST_DEFAULT   0x00000000UL
 
#define _ETH_NETWORKCFG_RETRYTEST_MASK   0x1000UL
 
#define _ETH_NETWORKCFG_RETRYTEST_SHIFT   12
 
#define _ETH_NETWORKCFG_RX1536BYTEFRAMES_DEFAULT   0x00000000UL
 
#define _ETH_NETWORKCFG_RX1536BYTEFRAMES_MASK   0x100UL
 
#define _ETH_NETWORKCFG_RX1536BYTEFRAMES_SHIFT   8
 
#define _ETH_NETWORKCFG_RXBUFFOFFSET_DEFAULT   0x00000000UL
 
#define _ETH_NETWORKCFG_RXBUFFOFFSET_MASK   0xC000UL
 
#define _ETH_NETWORKCFG_RXBUFFOFFSET_SHIFT   14
 
#define _ETH_NETWORKCFG_RXCHKSUMOFFLOADEN_DEFAULT   0x00000000UL
 
#define _ETH_NETWORKCFG_RXCHKSUMOFFLOADEN_MASK   0x1000000UL
 
#define _ETH_NETWORKCFG_RXCHKSUMOFFLOADEN_SHIFT   24
 
#define _ETH_NETWORKCFG_SPEED_DEFAULT   0x00000000UL
 
#define _ETH_NETWORKCFG_SPEED_MASK   0x1UL
 
#define _ETH_NETWORKCFG_SPEED_SHIFT   0
 
#define _ETH_NETWORKCFG_UNICASTHASHEN_DEFAULT   0x00000000UL
 
#define _ETH_NETWORKCFG_UNICASTHASHEN_MASK   0x80UL
 
#define _ETH_NETWORKCFG_UNICASTHASHEN_SHIFT   7
 
#define _ETH_NETWORKCTRL_BACKPRESSURE_DEFAULT   0x00000000UL
 
#define _ETH_NETWORKCTRL_BACKPRESSURE_MASK   0x100UL
 
#define _ETH_NETWORKCTRL_BACKPRESSURE_SHIFT   8
 
#define _ETH_NETWORKCTRL_CLRALLSTATSREGS_DEFAULT   0x00000000UL
 
#define _ETH_NETWORKCTRL_CLRALLSTATSREGS_MASK   0x20UL
 
#define _ETH_NETWORKCTRL_CLRALLSTATSREGS_SHIFT   5
 
#define _ETH_NETWORKCTRL_ENBRX_DEFAULT   0x00000000UL
 
#define _ETH_NETWORKCTRL_ENBRX_MASK   0x4UL
 
#define _ETH_NETWORKCTRL_ENBRX_SHIFT   2
 
#define _ETH_NETWORKCTRL_ENBTX_DEFAULT   0x00000000UL
 
#define _ETH_NETWORKCTRL_ENBTX_MASK   0x8UL
 
#define _ETH_NETWORKCTRL_ENBTX_SHIFT   3
 
#define _ETH_NETWORKCTRL_FLUSHRXPKT_DEFAULT   0x00000000UL
 
#define _ETH_NETWORKCTRL_FLUSHRXPKT_MASK   0x40000UL
 
#define _ETH_NETWORKCTRL_FLUSHRXPKT_SHIFT   18
 
#define _ETH_NETWORKCTRL_INCALLSTATSREGS_DEFAULT   0x00000000UL
 
#define _ETH_NETWORKCTRL_INCALLSTATSREGS_MASK   0x40UL
 
#define _ETH_NETWORKCTRL_INCALLSTATSREGS_SHIFT   6
 
#define _ETH_NETWORKCTRL_LOOPBACKLOCAL_DEFAULT   0x00000000UL
 
#define _ETH_NETWORKCTRL_LOOPBACKLOCAL_MASK   0x2UL
 
#define _ETH_NETWORKCTRL_LOOPBACKLOCAL_SHIFT   1
 
#define _ETH_NETWORKCTRL_MANPORTEN_DEFAULT   0x00000000UL
 
#define _ETH_NETWORKCTRL_MANPORTEN_MASK   0x10UL
 
#define _ETH_NETWORKCTRL_MANPORTEN_SHIFT   4
 
#define _ETH_NETWORKCTRL_MASK   0x035F9FFEUL
 
#define _ETH_NETWORKCTRL_ONESTEPSYNCMODE_DEFAULT   0x00000000UL
 
#define _ETH_NETWORKCTRL_ONESTEPSYNCMODE_MASK   0x1000000UL
 
#define _ETH_NETWORKCTRL_ONESTEPSYNCMODE_SHIFT   24
 
#define _ETH_NETWORKCTRL_PFCCTRL_DEFAULT   0x00000000UL
 
#define _ETH_NETWORKCTRL_PFCCTRL_MASK   0x2000000UL
 
#define _ETH_NETWORKCTRL_PFCCTRL_SHIFT   25
 
#define _ETH_NETWORKCTRL_PFCENB_DEFAULT   0x00000000UL
 
#define _ETH_NETWORKCTRL_PFCENB_MASK   0x10000UL
 
#define _ETH_NETWORKCTRL_PFCENB_SHIFT   16
 
#define _ETH_NETWORKCTRL_PTPUNICASTEN_DEFAULT   0x00000000UL
 
#define _ETH_NETWORKCTRL_PTPUNICASTEN_MASK   0x100000UL
 
#define _ETH_NETWORKCTRL_PTPUNICASTEN_SHIFT   20
 
#define _ETH_NETWORKCTRL_RESETVALUE   0x00000000UL
 
#define _ETH_NETWORKCTRL_STATSWREN_DEFAULT   0x00000000UL
 
#define _ETH_NETWORKCTRL_STATSWREN_MASK   0x80UL
 
#define _ETH_NETWORKCTRL_STATSWREN_SHIFT   7
 
#define _ETH_NETWORKCTRL_STORERXTS_DEFAULT   0x00000000UL
 
#define _ETH_NETWORKCTRL_STORERXTS_MASK   0x8000UL
 
#define _ETH_NETWORKCTRL_STORERXTS_SHIFT   15
 
#define _ETH_NETWORKCTRL_STOREUDPOFFSET_DEFAULT   0x00000000UL
 
#define _ETH_NETWORKCTRL_STOREUDPOFFSET_MASK   0x400000UL
 
#define _ETH_NETWORKCTRL_STOREUDPOFFSET_SHIFT   22
 
#define _ETH_NETWORKCTRL_TXHALT_DEFAULT   0x00000000UL
 
#define _ETH_NETWORKCTRL_TXHALT_MASK   0x400UL
 
#define _ETH_NETWORKCTRL_TXHALT_SHIFT   10
 
#define _ETH_NETWORKCTRL_TXLPIEN_DEFAULT   0x00000000UL
 
#define _ETH_NETWORKCTRL_TXLPIEN_MASK   0x80000UL
 
#define _ETH_NETWORKCTRL_TXLPIEN_SHIFT   19
 
#define _ETH_NETWORKCTRL_TXPFCPRIORPFRM_DEFAULT   0x00000000UL
 
#define _ETH_NETWORKCTRL_TXPFCPRIORPFRM_MASK   0x20000UL
 
#define _ETH_NETWORKCTRL_TXPFCPRIORPFRM_SHIFT   17
 
#define _ETH_NETWORKCTRL_TXPFRMREQ_DEFAULT   0x00000000UL
 
#define _ETH_NETWORKCTRL_TXPFRMREQ_MASK   0x800UL
 
#define _ETH_NETWORKCTRL_TXPFRMREQ_SHIFT   11
 
#define _ETH_NETWORKCTRL_TXPFRMZERO_DEFAULT   0x00000000UL
 
#define _ETH_NETWORKCTRL_TXPFRMZERO_MASK   0x1000UL
 
#define _ETH_NETWORKCTRL_TXPFRMZERO_SHIFT   12
 
#define _ETH_NETWORKCTRL_TXSTRT_DEFAULT   0x00000000UL
 
#define _ETH_NETWORKCTRL_TXSTRT_MASK   0x200UL
 
#define _ETH_NETWORKCTRL_TXSTRT_SHIFT   9
 
#define _ETH_NETWORKSTATUS_LPIINDICATE_DEFAULT   0x00000000UL
 
#define _ETH_NETWORKSTATUS_LPIINDICATE_MASK   0x80UL
 
#define _ETH_NETWORKSTATUS_LPIINDICATE_SHIFT   7
 
#define _ETH_NETWORKSTATUS_MANDONE_DEFAULT   0x00000001UL
 
#define _ETH_NETWORKSTATUS_MANDONE_MASK   0x4UL
 
#define _ETH_NETWORKSTATUS_MANDONE_SHIFT   2
 
#define _ETH_NETWORKSTATUS_MASK   0x000000C6UL
 
#define _ETH_NETWORKSTATUS_MDIOIN_DEFAULT   0x00000000UL
 
#define _ETH_NETWORKSTATUS_MDIOIN_MASK   0x2UL
 
#define _ETH_NETWORKSTATUS_MDIOIN_SHIFT   1
 
#define _ETH_NETWORKSTATUS_PFCNEGOTIATE_DEFAULT   0x00000000UL
 
#define _ETH_NETWORKSTATUS_PFCNEGOTIATE_MASK   0x40UL
 
#define _ETH_NETWORKSTATUS_PFCNEGOTIATE_SHIFT   6
 
#define _ETH_NETWORKSTATUS_RESETVALUE   0x00000004UL
 
#define _ETH_OCTETSRXEDBOTTOM_COUNT_DEFAULT   0x00000000UL
 
#define _ETH_OCTETSRXEDBOTTOM_COUNT_MASK   0xFFFFFFFFUL
 
#define _ETH_OCTETSRXEDBOTTOM_COUNT_SHIFT   0
 
#define _ETH_OCTETSRXEDBOTTOM_MASK   0xFFFFFFFFUL
 
#define _ETH_OCTETSRXEDBOTTOM_RESETVALUE   0x00000000UL
 
#define _ETH_OCTETSRXEDTOP_COUNT_DEFAULT   0x00000000UL
 
#define _ETH_OCTETSRXEDTOP_COUNT_MASK   0xFFFFUL
 
#define _ETH_OCTETSRXEDTOP_COUNT_SHIFT   0
 
#define _ETH_OCTETSRXEDTOP_MASK   0x0000FFFFUL
 
#define _ETH_OCTETSRXEDTOP_RESETVALUE   0x00000000UL
 
#define _ETH_OCTETSTXEDBOTTOM_COUNT_DEFAULT   0x00000000UL
 
#define _ETH_OCTETSTXEDBOTTOM_COUNT_MASK   0xFFFFFFFFUL
 
#define _ETH_OCTETSTXEDBOTTOM_COUNT_SHIFT   0
 
#define _ETH_OCTETSTXEDBOTTOM_MASK   0xFFFFFFFFUL
 
#define _ETH_OCTETSTXEDBOTTOM_RESETVALUE   0x00000000UL
 
#define _ETH_OCTETSTXEDTOP_COUNT_DEFAULT   0x00000000UL
 
#define _ETH_OCTETSTXEDTOP_COUNT_MASK   0xFFFFUL
 
#define _ETH_OCTETSTXEDTOP_COUNT_SHIFT   0
 
#define _ETH_OCTETSTXEDTOP_MASK   0x0000FFFFUL
 
#define _ETH_OCTETSTXEDTOP_RESETVALUE   0x00000000UL
 
#define _ETH_PBUFRXCUTTHRU_DMARXCUTTHRU_DEFAULT   0x00000000UL
 
#define _ETH_PBUFRXCUTTHRU_DMARXCUTTHRU_MASK   0x80000000UL
 
#define _ETH_PBUFRXCUTTHRU_DMARXCUTTHRU_SHIFT   31
 
#define _ETH_PBUFRXCUTTHRU_DMARXCUTTHRUTHR_DEFAULT   0x000003FFUL
 
#define _ETH_PBUFRXCUTTHRU_DMARXCUTTHRUTHR_MASK   0x3FFUL
 
#define _ETH_PBUFRXCUTTHRU_DMARXCUTTHRUTHR_SHIFT   0
 
#define _ETH_PBUFRXCUTTHRU_MASK   0x800003FFUL
 
#define _ETH_PBUFRXCUTTHRU_RESETVALUE   0x000003FFUL
 
#define _ETH_PBUFTXCUTTHRU_DMATXCUTTHRU_DEFAULT   0x00000000UL
 
#define _ETH_PBUFTXCUTTHRU_DMATXCUTTHRU_MASK   0x80000000UL
 
#define _ETH_PBUFTXCUTTHRU_DMATXCUTTHRU_SHIFT   31
 
#define _ETH_PBUFTXCUTTHRU_DMATXCUTTHRUTHR_DEFAULT   0x000003FFUL
 
#define _ETH_PBUFTXCUTTHRU_DMATXCUTTHRUTHR_MASK   0x3FFUL
 
#define _ETH_PBUFTXCUTTHRU_DMATXCUTTHRUTHR_SHIFT   0
 
#define _ETH_PBUFTXCUTTHRU_MASK   0x800003FFUL
 
#define _ETH_PBUFTXCUTTHRU_RESETVALUE   0x000003FFUL
 
#define _ETH_PFRAMESRXED_COUNT_DEFAULT   0x00000000UL
 
#define _ETH_PFRAMESRXED_COUNT_MASK   0xFFFFUL
 
#define _ETH_PFRAMESRXED_COUNT_SHIFT   0
 
#define _ETH_PFRAMESRXED_MASK   0x0000FFFFUL
 
#define _ETH_PFRAMESRXED_RESETVALUE   0x00000000UL
 
#define _ETH_PFRAMESTXED_COUNT_DEFAULT   0x00000000UL
 
#define _ETH_PFRAMESTXED_COUNT_MASK   0xFFFFUL
 
#define _ETH_PFRAMESTXED_COUNT_SHIFT   0
 
#define _ETH_PFRAMESTXED_MASK   0x0000FFFFUL
 
#define _ETH_PFRAMESTXED_RESETVALUE   0x00000000UL
 
#define _ETH_PHYMNGMNT_MASK   0xFFFFFFFFUL
 
#define _ETH_PHYMNGMNT_OPERATION_DEFAULT   0x00000000UL
 
#define _ETH_PHYMNGMNT_OPERATION_MASK   0x30000000UL
 
#define _ETH_PHYMNGMNT_OPERATION_SHIFT   28
 
#define _ETH_PHYMNGMNT_PHYADDR_DEFAULT   0x00000000UL
 
#define _ETH_PHYMNGMNT_PHYADDR_MASK   0xF800000UL
 
#define _ETH_PHYMNGMNT_PHYADDR_SHIFT   23
 
#define _ETH_PHYMNGMNT_PHYRWDATA_DEFAULT   0x00000000UL
 
#define _ETH_PHYMNGMNT_PHYRWDATA_MASK   0xFFFFUL
 
#define _ETH_PHYMNGMNT_PHYRWDATA_SHIFT   0
 
#define _ETH_PHYMNGMNT_REGADDR_DEFAULT   0x00000000UL
 
#define _ETH_PHYMNGMNT_REGADDR_MASK   0x7C0000UL
 
#define _ETH_PHYMNGMNT_REGADDR_SHIFT   18
 
#define _ETH_PHYMNGMNT_RESETVALUE   0x00000000UL
 
#define _ETH_PHYMNGMNT_WRITE0_DEFAULT   0x00000000UL
 
#define _ETH_PHYMNGMNT_WRITE0_MASK   0x80000000UL
 
#define _ETH_PHYMNGMNT_WRITE0_SHIFT   31
 
#define _ETH_PHYMNGMNT_WRITE10_DEFAULT   0x00000000UL
 
#define _ETH_PHYMNGMNT_WRITE10_MASK   0x30000UL
 
#define _ETH_PHYMNGMNT_WRITE10_SHIFT   16
 
#define _ETH_PHYMNGMNT_WRITE1_DEFAULT   0x00000000UL
 
#define _ETH_PHYMNGMNT_WRITE1_MASK   0x40000000UL
 
#define _ETH_PHYMNGMNT_WRITE1_SHIFT   30
 
#define _ETH_ROUTELOC0_MASK   0x03030301UL
 
#define _ETH_ROUTELOC0_MIICOLLOC_DEFAULT   0x00000000UL
 
#define _ETH_ROUTELOC0_MIICOLLOC_LOC0   0x00000000UL
 
#define _ETH_ROUTELOC0_MIICOLLOC_LOC1   0x00000001UL
 
#define _ETH_ROUTELOC0_MIICOLLOC_LOC2   0x00000002UL
 
#define _ETH_ROUTELOC0_MIICOLLOC_MASK   0x3000000UL
 
#define _ETH_ROUTELOC0_MIICOLLOC_SHIFT   24
 
#define _ETH_ROUTELOC0_MIICRSLOC_DEFAULT   0x00000000UL
 
#define _ETH_ROUTELOC0_MIICRSLOC_LOC0   0x00000000UL
 
#define _ETH_ROUTELOC0_MIICRSLOC_LOC1   0x00000001UL
 
#define _ETH_ROUTELOC0_MIICRSLOC_LOC2   0x00000002UL
 
#define _ETH_ROUTELOC0_MIICRSLOC_MASK   0x30000UL
 
#define _ETH_ROUTELOC0_MIICRSLOC_SHIFT   16
 
#define _ETH_ROUTELOC0_MIIRXLOC_DEFAULT   0x00000000UL
 
#define _ETH_ROUTELOC0_MIIRXLOC_LOC0   0x00000000UL
 
#define _ETH_ROUTELOC0_MIIRXLOC_LOC1   0x00000001UL
 
#define _ETH_ROUTELOC0_MIIRXLOC_LOC2   0x00000002UL
 
#define _ETH_ROUTELOC0_MIIRXLOC_MASK   0x300UL
 
#define _ETH_ROUTELOC0_MIIRXLOC_SHIFT   8
 
#define _ETH_ROUTELOC0_MIITXLOC_DEFAULT   0x00000000UL
 
#define _ETH_ROUTELOC0_MIITXLOC_LOC0   0x00000000UL
 
#define _ETH_ROUTELOC0_MIITXLOC_LOC1   0x00000001UL
 
#define _ETH_ROUTELOC0_MIITXLOC_MASK   0x1UL
 
#define _ETH_ROUTELOC0_MIITXLOC_SHIFT   0
 
#define _ETH_ROUTELOC0_RESETVALUE   0x00000000UL
 
#define _ETH_ROUTELOC1_MASK   0x01030303UL
 
#define _ETH_ROUTELOC1_MDIOLOC_DEFAULT   0x00000000UL
 
#define _ETH_ROUTELOC1_MDIOLOC_LOC0   0x00000000UL
 
#define _ETH_ROUTELOC1_MDIOLOC_LOC1   0x00000001UL
 
#define _ETH_ROUTELOC1_MDIOLOC_LOC2   0x00000002UL
 
#define _ETH_ROUTELOC1_MDIOLOC_LOC3   0x00000003UL
 
#define _ETH_ROUTELOC1_MDIOLOC_MASK   0x30000UL
 
#define _ETH_ROUTELOC1_MDIOLOC_SHIFT   16
 
#define _ETH_ROUTELOC1_RESETVALUE   0x00000000UL
 
#define _ETH_ROUTELOC1_RMIILOC_DEFAULT   0x00000000UL
 
#define _ETH_ROUTELOC1_RMIILOC_LOC0   0x00000000UL
 
#define _ETH_ROUTELOC1_RMIILOC_LOC1   0x00000001UL
 
#define _ETH_ROUTELOC1_RMIILOC_MASK   0x1000000UL
 
#define _ETH_ROUTELOC1_RMIILOC_SHIFT   24
 
#define _ETH_ROUTELOC1_TSUEXTCLKLOC_DEFAULT   0x00000000UL
 
#define _ETH_ROUTELOC1_TSUEXTCLKLOC_LOC0   0x00000000UL
 
#define _ETH_ROUTELOC1_TSUEXTCLKLOC_LOC1   0x00000001UL
 
#define _ETH_ROUTELOC1_TSUEXTCLKLOC_LOC2   0x00000002UL
 
#define _ETH_ROUTELOC1_TSUEXTCLKLOC_LOC3   0x00000003UL
 
#define _ETH_ROUTELOC1_TSUEXTCLKLOC_MASK   0x3UL
 
#define _ETH_ROUTELOC1_TSUEXTCLKLOC_SHIFT   0
 
#define _ETH_ROUTELOC1_TSUTMRTOGLOC_DEFAULT   0x00000000UL
 
#define _ETH_ROUTELOC1_TSUTMRTOGLOC_LOC0   0x00000000UL
 
#define _ETH_ROUTELOC1_TSUTMRTOGLOC_LOC1   0x00000001UL
 
#define _ETH_ROUTELOC1_TSUTMRTOGLOC_LOC2   0x00000002UL
 
#define _ETH_ROUTELOC1_TSUTMRTOGLOC_LOC3   0x00000003UL
 
#define _ETH_ROUTELOC1_TSUTMRTOGLOC_MASK   0x300UL
 
#define _ETH_ROUTELOC1_TSUTMRTOGLOC_SHIFT   8
 
#define _ETH_ROUTEPEN_MASK   0x0000003FUL
 
#define _ETH_ROUTEPEN_MDIOPEN_DEFAULT   0x00000000UL
 
#define _ETH_ROUTEPEN_MDIOPEN_DISABLE   0x00000000UL
 
#define _ETH_ROUTEPEN_MDIOPEN_ENABLE   0x00000001UL
 
#define _ETH_ROUTEPEN_MDIOPEN_MASK   0x1UL
 
#define _ETH_ROUTEPEN_MDIOPEN_SHIFT   0
 
#define _ETH_ROUTEPEN_MIIPEN_DEFAULT   0x00000000UL
 
#define _ETH_ROUTEPEN_MIIPEN_DISABLE   0x00000000UL
 
#define _ETH_ROUTEPEN_MIIPEN_ENABLE   0x00000001UL
 
#define _ETH_ROUTEPEN_MIIPEN_MASK   0x8UL
 
#define _ETH_ROUTEPEN_MIIPEN_SHIFT   3
 
#define _ETH_ROUTEPEN_MIIRXERPEN_DEFAULT   0x00000000UL
 
#define _ETH_ROUTEPEN_MIIRXERPEN_DISABLE   0x00000000UL
 
#define _ETH_ROUTEPEN_MIIRXERPEN_ENABLE   0x00000001UL
 
#define _ETH_ROUTEPEN_MIIRXERPEN_MASK   0x4UL
 
#define _ETH_ROUTEPEN_MIIRXERPEN_SHIFT   2
 
#define _ETH_ROUTEPEN_MIITXERPEN_DEFAULT   0x00000000UL
 
#define _ETH_ROUTEPEN_MIITXERPEN_DISABLE   0x00000000UL
 
#define _ETH_ROUTEPEN_MIITXERPEN_ENABLE   0x00000001UL
 
#define _ETH_ROUTEPEN_MIITXERPEN_MASK   0x2UL
 
#define _ETH_ROUTEPEN_MIITXERPEN_SHIFT   1
 
#define _ETH_ROUTEPEN_RESETVALUE   0x00000000UL
 
#define _ETH_ROUTEPEN_RMIIPEN_DEFAULT   0x00000000UL
 
#define _ETH_ROUTEPEN_RMIIPEN_DISABLE   0x00000000UL
 
#define _ETH_ROUTEPEN_RMIIPEN_ENABLE   0x00000001UL
 
#define _ETH_ROUTEPEN_RMIIPEN_MASK   0x10UL
 
#define _ETH_ROUTEPEN_RMIIPEN_SHIFT   4
 
#define _ETH_ROUTEPEN_TSUTMRTOGPEN_DEFAULT   0x00000000UL
 
#define _ETH_ROUTEPEN_TSUTMRTOGPEN_DISABLE   0x00000000UL
 
#define _ETH_ROUTEPEN_TSUTMRTOGPEN_ENABLE   0x00000001UL
 
#define _ETH_ROUTEPEN_TSUTMRTOGPEN_MASK   0x20UL
 
#define _ETH_ROUTEPEN_TSUTMRTOGPEN_SHIFT   5
 
#define _ETH_RXBDCTRL_MASK   0x00000030UL
 
#define _ETH_RXBDCTRL_RESETVALUE   0x00000000UL
 
#define _ETH_RXBDCTRL_RXBDTSMODE_DEFAULT   0x00000000UL
 
#define _ETH_RXBDCTRL_RXBDTSMODE_MASK   0x30UL
 
#define _ETH_RXBDCTRL_RXBDTSMODE_SHIFT   4
 
#define _ETH_RXIPCKERRS_COUNT_DEFAULT   0x00000000UL
 
#define _ETH_RXIPCKERRS_COUNT_MASK   0xFFUL
 
#define _ETH_RXIPCKERRS_COUNT_SHIFT   0
 
#define _ETH_RXIPCKERRS_MASK   0x000000FFUL
 
#define _ETH_RXIPCKERRS_RESETVALUE   0x00000000UL
 
#define _ETH_RXJABBERS_COUNT_DEFAULT   0x00000000UL
 
#define _ETH_RXJABBERS_COUNT_MASK   0x3FFUL
 
#define _ETH_RXJABBERS_COUNT_SHIFT   0
 
#define _ETH_RXJABBERS_MASK   0x000003FFUL
 
#define _ETH_RXJABBERS_RESETVALUE   0x00000000UL
 
#define _ETH_RXLENERRS_COUNT_DEFAULT   0x00000000UL
 
#define _ETH_RXLENERRS_COUNT_MASK   0x3FFUL
 
#define _ETH_RXLENERRS_COUNT_SHIFT   0
 
#define _ETH_RXLENERRS_MASK   0x000003FFUL
 
#define _ETH_RXLENERRS_RESETVALUE   0x00000000UL
 
#define _ETH_RXLPI_COUNT_DEFAULT   0x00000000UL
 
#define _ETH_RXLPI_COUNT_MASK   0xFFFFUL
 
#define _ETH_RXLPI_COUNT_SHIFT   0
 
#define _ETH_RXLPI_MASK   0x0000FFFFUL
 
#define _ETH_RXLPI_RESETVALUE   0x00000000UL
 
#define _ETH_RXLPITIME_LPITIME_DEFAULT   0x00000000UL
 
#define _ETH_RXLPITIME_LPITIME_MASK   0xFFFFFFUL
 
#define _ETH_RXLPITIME_LPITIME_SHIFT   0
 
#define _ETH_RXLPITIME_MASK   0x00FFFFFFUL
 
#define _ETH_RXLPITIME_RESETVALUE   0x00000000UL
 
#define _ETH_RXOVERRUNS_COUNT_DEFAULT   0x00000000UL
 
#define _ETH_RXOVERRUNS_COUNT_MASK   0x3FFUL
 
#define _ETH_RXOVERRUNS_COUNT_SHIFT   0
 
#define _ETH_RXOVERRUNS_MASK   0x000003FFUL
 
#define _ETH_RXOVERRUNS_RESETVALUE   0x00000000UL
 
#define _ETH_RXPAUSEQUANT_MASK   0x0000FFFFUL
 
#define _ETH_RXPAUSEQUANT_QUANT_DEFAULT   0x00000000UL
 
#define _ETH_RXPAUSEQUANT_QUANT_MASK   0xFFFFUL
 
#define _ETH_RXPAUSEQUANT_QUANT_SHIFT   0
 
#define _ETH_RXPAUSEQUANT_RESETVALUE   0x00000000UL
 
#define _ETH_RXPTPUNICAST_ADDR_DEFAULT   0x00000000UL
 
#define _ETH_RXPTPUNICAST_ADDR_MASK   0xFFFFFFFFUL
 
#define _ETH_RXPTPUNICAST_ADDR_SHIFT   0
 
#define _ETH_RXPTPUNICAST_MASK   0xFFFFFFFFUL
 
#define _ETH_RXPTPUNICAST_RESETVALUE   0x00000000UL
 
#define _ETH_RXQPTR_DMARXQPTR_DEFAULT   0x00000000UL
 
#define _ETH_RXQPTR_DMARXQPTR_MASK   0xFFFFFFFCUL
 
#define _ETH_RXQPTR_DMARXQPTR_SHIFT   2
 
#define _ETH_RXQPTR_MASK   0xFFFFFFFCUL
 
#define _ETH_RXQPTR_RESETVALUE   0x00000000UL
 
#define _ETH_RXRESOURCEERRS_COUNT_DEFAULT   0x00000000UL
 
#define _ETH_RXRESOURCEERRS_COUNT_MASK   0x3FFFFUL
 
#define _ETH_RXRESOURCEERRS_COUNT_SHIFT   0
 
#define _ETH_RXRESOURCEERRS_MASK   0x0003FFFFUL
 
#define _ETH_RXRESOURCEERRS_RESETVALUE   0x00000000UL
 
#define _ETH_RXSTATUS_BUFFNOTAVAIL_DEFAULT   0x00000000UL
 
#define _ETH_RXSTATUS_BUFFNOTAVAIL_MASK   0x1UL
 
#define _ETH_RXSTATUS_BUFFNOTAVAIL_SHIFT   0
 
#define _ETH_RXSTATUS_FRMRX_DEFAULT   0x00000000UL
 
#define _ETH_RXSTATUS_FRMRX_MASK   0x2UL
 
#define _ETH_RXSTATUS_FRMRX_SHIFT   1
 
#define _ETH_RXSTATUS_MASK   0x0000000FUL
 
#define _ETH_RXSTATUS_RESETVALUE   0x00000000UL
 
#define _ETH_RXSTATUS_RESPNOTOK_DEFAULT   0x00000000UL
 
#define _ETH_RXSTATUS_RESPNOTOK_MASK   0x8UL
 
#define _ETH_RXSTATUS_RESPNOTOK_SHIFT   3
 
#define _ETH_RXSTATUS_RXOVERRUN_DEFAULT   0x00000000UL
 
#define _ETH_RXSTATUS_RXOVERRUN_MASK   0x4UL
 
#define _ETH_RXSTATUS_RXOVERRUN_SHIFT   2
 
#define _ETH_RXSYMBOLERRS_COUNT_DEFAULT   0x00000000UL
 
#define _ETH_RXSYMBOLERRS_COUNT_MASK   0x3FFUL
 
#define _ETH_RXSYMBOLERRS_COUNT_SHIFT   0
 
#define _ETH_RXSYMBOLERRS_MASK   0x000003FFUL
 
#define _ETH_RXSYMBOLERRS_RESETVALUE   0x00000000UL
 
#define _ETH_RXTCPCKERRS_COUNT_DEFAULT   0x00000000UL
 
#define _ETH_RXTCPCKERRS_COUNT_MASK   0xFFUL
 
#define _ETH_RXTCPCKERRS_COUNT_SHIFT   0
 
#define _ETH_RXTCPCKERRS_MASK   0x000000FFUL
 
#define _ETH_RXTCPCKERRS_RESETVALUE   0x00000000UL
 
#define _ETH_RXUDPCKERRS_COUNT_DEFAULT   0x00000000UL
 
#define _ETH_RXUDPCKERRS_COUNT_MASK   0xFFUL
 
#define _ETH_RXUDPCKERRS_COUNT_SHIFT   0
 
#define _ETH_RXUDPCKERRS_MASK   0x000000FFUL
 
#define _ETH_RXUDPCKERRS_RESETVALUE   0x00000000UL
 
#define _ETH_SINGLECOLS_COUNT_DEFAULT   0x00000000UL
 
#define _ETH_SINGLECOLS_COUNT_MASK   0x3FFFFUL
 
#define _ETH_SINGLECOLS_COUNT_SHIFT   0
 
#define _ETH_SINGLECOLS_MASK   0x0003FFFFUL
 
#define _ETH_SINGLECOLS_RESETVALUE   0x00000000UL
 
#define _ETH_SPECADDR1BOTTOM_ADDR_DEFAULT   0x00000000UL
 
#define _ETH_SPECADDR1BOTTOM_ADDR_MASK   0xFFFFFFFFUL
 
#define _ETH_SPECADDR1BOTTOM_ADDR_SHIFT   0
 
#define _ETH_SPECADDR1BOTTOM_MASK   0xFFFFFFFFUL
 
#define _ETH_SPECADDR1BOTTOM_RESETVALUE   0x00000000UL
 
#define _ETH_SPECADDR1TOP_ADDR_DEFAULT   0x00000000UL
 
#define _ETH_SPECADDR1TOP_ADDR_MASK   0xFFFFUL
 
#define _ETH_SPECADDR1TOP_ADDR_SHIFT   0
 
#define _ETH_SPECADDR1TOP_FILTERTYPE_DA   0x00000000UL
 
#define _ETH_SPECADDR1TOP_FILTERTYPE_DEFAULT   0x00000000UL
 
#define _ETH_SPECADDR1TOP_FILTERTYPE_MASK   0x10000UL
 
#define _ETH_SPECADDR1TOP_FILTERTYPE_SA   0x00000001UL
 
#define _ETH_SPECADDR1TOP_FILTERTYPE_SHIFT   16
 
#define _ETH_SPECADDR1TOP_MASK   0x0001FFFFUL
 
#define _ETH_SPECADDR1TOP_RESETVALUE   0x00000000UL
 
#define _ETH_SPECADDR2BOTTOM_ADDR_DEFAULT   0x00000000UL
 
#define _ETH_SPECADDR2BOTTOM_ADDR_MASK   0xFFFFFFFFUL
 
#define _ETH_SPECADDR2BOTTOM_ADDR_SHIFT   0
 
#define _ETH_SPECADDR2BOTTOM_MASK   0xFFFFFFFFUL
 
#define _ETH_SPECADDR2BOTTOM_RESETVALUE   0x00000000UL
 
#define _ETH_SPECADDR2TOP_ADDR_DEFAULT   0x00000000UL
 
#define _ETH_SPECADDR2TOP_ADDR_MASK   0xFFFFUL
 
#define _ETH_SPECADDR2TOP_ADDR_SHIFT   0
 
#define _ETH_SPECADDR2TOP_FILTERBYTEMASK_DEFAULT   0x00000000UL
 
#define _ETH_SPECADDR2TOP_FILTERBYTEMASK_MASK   0x3F000000UL
 
#define _ETH_SPECADDR2TOP_FILTERBYTEMASK_SHIFT   24
 
#define _ETH_SPECADDR2TOP_FILTERTYPE_DA   0x00000000UL
 
#define _ETH_SPECADDR2TOP_FILTERTYPE_DEFAULT   0x00000000UL
 
#define _ETH_SPECADDR2TOP_FILTERTYPE_MASK   0x10000UL
 
#define _ETH_SPECADDR2TOP_FILTERTYPE_SA   0x00000001UL
 
#define _ETH_SPECADDR2TOP_FILTERTYPE_SHIFT   16
 
#define _ETH_SPECADDR2TOP_MASK   0x3F01FFFFUL
 
#define _ETH_SPECADDR2TOP_RESETVALUE   0x00000000UL
 
#define _ETH_SPECADDR3BOTTOM_ADDR_DEFAULT   0x00000000UL
 
#define _ETH_SPECADDR3BOTTOM_ADDR_MASK   0xFFFFFFFFUL
 
#define _ETH_SPECADDR3BOTTOM_ADDR_SHIFT   0
 
#define _ETH_SPECADDR3BOTTOM_MASK   0xFFFFFFFFUL
 
#define _ETH_SPECADDR3BOTTOM_RESETVALUE   0x00000000UL
 
#define _ETH_SPECADDR3TOP_ADDR_DEFAULT   0x00000000UL
 
#define _ETH_SPECADDR3TOP_ADDR_MASK   0xFFFFUL
 
#define _ETH_SPECADDR3TOP_ADDR_SHIFT   0
 
#define _ETH_SPECADDR3TOP_FILTERBYTEMASK_DEFAULT   0x00000000UL
 
#define _ETH_SPECADDR3TOP_FILTERBYTEMASK_MASK   0x3F000000UL
 
#define _ETH_SPECADDR3TOP_FILTERBYTEMASK_SHIFT   24
 
#define _ETH_SPECADDR3TOP_FILTERTYPE_DA   0x00000000UL
 
#define _ETH_SPECADDR3TOP_FILTERTYPE_DEFAULT   0x00000000UL
 
#define _ETH_SPECADDR3TOP_FILTERTYPE_MASK   0x10000UL
 
#define _ETH_SPECADDR3TOP_FILTERTYPE_SA   0x00000001UL
 
#define _ETH_SPECADDR3TOP_FILTERTYPE_SHIFT   16
 
#define _ETH_SPECADDR3TOP_MASK   0x3F01FFFFUL
 
#define _ETH_SPECADDR3TOP_RESETVALUE   0x00000000UL
 
#define _ETH_SPECADDR4BOTTOM_ADDR_DEFAULT   0x00000000UL
 
#define _ETH_SPECADDR4BOTTOM_ADDR_MASK   0xFFFFFFFFUL
 
#define _ETH_SPECADDR4BOTTOM_ADDR_SHIFT   0
 
#define _ETH_SPECADDR4BOTTOM_MASK   0xFFFFFFFFUL
 
#define _ETH_SPECADDR4BOTTOM_RESETVALUE   0x00000000UL
 
#define _ETH_SPECADDR4TOP_ADDR_DEFAULT   0x00000000UL
 
#define _ETH_SPECADDR4TOP_ADDR_MASK   0xFFFFUL
 
#define _ETH_SPECADDR4TOP_ADDR_SHIFT   0
 
#define _ETH_SPECADDR4TOP_FILTERBYTEMASK_DEFAULT   0x00000000UL
 
#define _ETH_SPECADDR4TOP_FILTERBYTEMASK_MASK   0x3F000000UL
 
#define _ETH_SPECADDR4TOP_FILTERBYTEMASK_SHIFT   24
 
#define _ETH_SPECADDR4TOP_FILTERTYPE_DA   0x00000000UL
 
#define _ETH_SPECADDR4TOP_FILTERTYPE_DEFAULT   0x00000000UL
 
#define _ETH_SPECADDR4TOP_FILTERTYPE_MASK   0x10000UL
 
#define _ETH_SPECADDR4TOP_FILTERTYPE_SA   0x00000001UL
 
#define _ETH_SPECADDR4TOP_FILTERTYPE_SHIFT   16
 
#define _ETH_SPECADDR4TOP_MASK   0x3F01FFFFUL
 
#define _ETH_SPECADDR4TOP_RESETVALUE   0x00000000UL
 
#define _ETH_SPECTYPE1_ENBCOPY_DEFAULT   0x00000000UL
 
#define _ETH_SPECTYPE1_ENBCOPY_MASK   0x80000000UL
 
#define _ETH_SPECTYPE1_ENBCOPY_SHIFT   31
 
#define _ETH_SPECTYPE1_MASK   0x8000FFFFUL
 
#define _ETH_SPECTYPE1_MATCH_DEFAULT   0x00000000UL
 
#define _ETH_SPECTYPE1_MATCH_MASK   0xFFFFUL
 
#define _ETH_SPECTYPE1_MATCH_SHIFT   0
 
#define _ETH_SPECTYPE1_RESETVALUE   0x00000000UL
 
#define _ETH_SPECTYPE2_ENBCOPY_DEFAULT   0x00000000UL
 
#define _ETH_SPECTYPE2_ENBCOPY_MASK   0x80000000UL
 
#define _ETH_SPECTYPE2_ENBCOPY_SHIFT   31
 
#define _ETH_SPECTYPE2_MASK   0x8000FFFFUL
 
#define _ETH_SPECTYPE2_MATCH_DEFAULT   0x00000000UL
 
#define _ETH_SPECTYPE2_MATCH_MASK   0xFFFFUL
 
#define _ETH_SPECTYPE2_MATCH_SHIFT   0
 
#define _ETH_SPECTYPE2_RESETVALUE   0x00000000UL
 
#define _ETH_SPECTYPE3_ENBCOPY_DEFAULT   0x00000000UL
 
#define _ETH_SPECTYPE3_ENBCOPY_MASK   0x80000000UL
 
#define _ETH_SPECTYPE3_ENBCOPY_SHIFT   31
 
#define _ETH_SPECTYPE3_MASK   0x8000FFFFUL
 
#define _ETH_SPECTYPE3_MATCH_DEFAULT   0x00000000UL
 
#define _ETH_SPECTYPE3_MATCH_MASK   0xFFFFUL
 
#define _ETH_SPECTYPE3_MATCH_SHIFT   0
 
#define _ETH_SPECTYPE3_RESETVALUE   0x00000000UL
 
#define _ETH_SPECTYPE4_ENBCOPY_DEFAULT   0x00000000UL
 
#define _ETH_SPECTYPE4_ENBCOPY_MASK   0x80000000UL
 
#define _ETH_SPECTYPE4_ENBCOPY_SHIFT   31
 
#define _ETH_SPECTYPE4_MASK   0x8000FFFFUL
 
#define _ETH_SPECTYPE4_MATCH_DEFAULT   0x00000000UL
 
#define _ETH_SPECTYPE4_MATCH_MASK   0xFFFFUL
 
#define _ETH_SPECTYPE4_MATCH_SHIFT   0
 
#define _ETH_SPECTYPE4_RESETVALUE   0x00000000UL
 
#define _ETH_STACKEDVLAN_ENBPROCESSING_DEFAULT   0x00000000UL
 
#define _ETH_STACKEDVLAN_ENBPROCESSING_MASK   0x80000000UL
 
#define _ETH_STACKEDVLAN_ENBPROCESSING_SHIFT   31
 
#define _ETH_STACKEDVLAN_MASK   0x8000FFFFUL
 
#define _ETH_STACKEDVLAN_MATCH_DEFAULT   0x00000000UL
 
#define _ETH_STACKEDVLAN_MATCH_MASK   0xFFFFUL
 
#define _ETH_STACKEDVLAN_MATCH_SHIFT   0
 
#define _ETH_STACKEDVLAN_RESETVALUE   0x00000000UL
 
#define _ETH_STRETCHRATIO_IPGSTRETCH_DEFAULT   0x00000000UL
 
#define _ETH_STRETCHRATIO_IPGSTRETCH_MASK   0xFFFFUL
 
#define _ETH_STRETCHRATIO_IPGSTRETCH_SHIFT   0
 
#define _ETH_STRETCHRATIO_MASK   0x0000FFFFUL
 
#define _ETH_STRETCHRATIO_RESETVALUE   0x00000000UL
 
#define _ETH_SYSWAKETIME_MASK   0x0000FFFFUL
 
#define _ETH_SYSWAKETIME_RESETVALUE   0x00000000UL
 
#define _ETH_SYSWAKETIME_SYSWAKETIME_DEFAULT   0x00000000UL
 
#define _ETH_SYSWAKETIME_SYSWAKETIME_MASK   0xFFFFUL
 
#define _ETH_SYSWAKETIME_SYSWAKETIME_SHIFT   0
 
#define _ETH_TSUMSBSECCMP_COMPVAL_DEFAULT   0x00000000UL
 
#define _ETH_TSUMSBSECCMP_COMPVAL_MASK   0xFFFFUL
 
#define _ETH_TSUMSBSECCMP_COMPVAL_SHIFT   0
 
#define _ETH_TSUMSBSECCMP_MASK   0x0000FFFFUL
 
#define _ETH_TSUMSBSECCMP_RESETVALUE   0x00000000UL
 
#define _ETH_TSUNSECCMP_COMPVAL_DEFAULT   0x00000000UL
 
#define _ETH_TSUNSECCMP_COMPVAL_MASK   0x3FFFFFUL
 
#define _ETH_TSUNSECCMP_COMPVAL_SHIFT   0
 
#define _ETH_TSUNSECCMP_MASK   0x003FFFFFUL
 
#define _ETH_TSUNSECCMP_RESETVALUE   0x00000000UL
 
#define _ETH_TSUPEERRXMSBSEC_MASK   0x0000FFFFUL
 
#define _ETH_TSUPEERRXMSBSEC_RESETVALUE   0x00000000UL
 
#define _ETH_TSUPEERRXMSBSEC_TIMERSEC_DEFAULT   0x00000000UL
 
#define _ETH_TSUPEERRXMSBSEC_TIMERSEC_MASK   0xFFFFUL
 
#define _ETH_TSUPEERRXMSBSEC_TIMERSEC_SHIFT   0
 
#define _ETH_TSUPEERRXNSEC_MASK   0x3FFFFFFFUL
 
#define _ETH_TSUPEERRXNSEC_RESETVALUE   0x00000000UL
 
#define _ETH_TSUPEERRXNSEC_TIMER_DEFAULT   0x00000000UL
 
#define _ETH_TSUPEERRXNSEC_TIMER_MASK   0x3FFFFFFFUL
 
#define _ETH_TSUPEERRXNSEC_TIMER_SHIFT   0
 
#define _ETH_TSUPEERRXSEC_MASK   0xFFFFFFFFUL
 
#define _ETH_TSUPEERRXSEC_RESETVALUE   0x00000000UL
 
#define _ETH_TSUPEERRXSEC_TIMER_DEFAULT   0x00000000UL
 
#define _ETH_TSUPEERRXSEC_TIMER_MASK   0xFFFFFFFFUL
 
#define _ETH_TSUPEERRXSEC_TIMER_SHIFT   0
 
#define _ETH_TSUPEERTXMSBSEC_MASK   0x0000FFFFUL
 
#define _ETH_TSUPEERTXMSBSEC_RESETVALUE   0x00000000UL
 
#define _ETH_TSUPEERTXMSBSEC_TIMERSEC_DEFAULT   0x00000000UL
 
#define _ETH_TSUPEERTXMSBSEC_TIMERSEC_MASK   0xFFFFUL
 
#define _ETH_TSUPEERTXMSBSEC_TIMERSEC_SHIFT   0
 
#define _ETH_TSUPEERTXNSEC_MASK   0x3FFFFFFFUL
 
#define _ETH_TSUPEERTXNSEC_RESETVALUE   0x00000000UL
 
#define _ETH_TSUPEERTXNSEC_TIMER_DEFAULT   0x00000000UL
 
#define _ETH_TSUPEERTXNSEC_TIMER_MASK   0x3FFFFFFFUL
 
#define _ETH_TSUPEERTXNSEC_TIMER_SHIFT   0
 
#define _ETH_TSUPEERTXSEC_MASK   0xFFFFFFFFUL
 
#define _ETH_TSUPEERTXSEC_RESETVALUE   0x00000000UL
 
#define _ETH_TSUPEERTXSEC_TIMER_DEFAULT   0x00000000UL
 
#define _ETH_TSUPEERTXSEC_TIMER_MASK   0xFFFFFFFFUL
 
#define _ETH_TSUPEERTXSEC_TIMER_SHIFT   0
 
#define _ETH_TSUPTPRXMSBSEC_MASK   0x0000FFFFUL
 
#define _ETH_TSUPTPRXMSBSEC_RESETVALUE   0x00000000UL
 
#define _ETH_TSUPTPRXMSBSEC_TIMERSEC_DEFAULT   0x00000000UL
 
#define _ETH_TSUPTPRXMSBSEC_TIMERSEC_MASK   0xFFFFUL
 
#define _ETH_TSUPTPRXMSBSEC_TIMERSEC_SHIFT   0
 
#define _ETH_TSUPTPRXNSEC_MASK   0x3FFFFFFFUL
 
#define _ETH_TSUPTPRXNSEC_RESETVALUE   0x00000000UL
 
#define _ETH_TSUPTPRXNSEC_TIMER_DEFAULT   0x00000000UL
 
#define _ETH_TSUPTPRXNSEC_TIMER_MASK   0x3FFFFFFFUL
 
#define _ETH_TSUPTPRXNSEC_TIMER_SHIFT   0
 
#define _ETH_TSUPTPRXSEC_MASK   0xFFFFFFFFUL
 
#define _ETH_TSUPTPRXSEC_RESETVALUE   0x00000000UL
 
#define _ETH_TSUPTPRXSEC_TIMER_DEFAULT   0x00000000UL
 
#define _ETH_TSUPTPRXSEC_TIMER_MASK   0xFFFFFFFFUL
 
#define _ETH_TSUPTPRXSEC_TIMER_SHIFT   0
 
#define _ETH_TSUPTPTXMSBSEC_MASK   0x0000FFFFUL
 
#define _ETH_TSUPTPTXMSBSEC_RESETVALUE   0x00000000UL
 
#define _ETH_TSUPTPTXMSBSEC_TIMERSEC_DEFAULT   0x00000000UL
 
#define _ETH_TSUPTPTXMSBSEC_TIMERSEC_MASK   0xFFFFUL
 
#define _ETH_TSUPTPTXMSBSEC_TIMERSEC_SHIFT   0
 
#define _ETH_TSUPTPTXNSEC_MASK   0x3FFFFFFFUL
 
#define _ETH_TSUPTPTXNSEC_RESETVALUE   0x00000000UL
 
#define _ETH_TSUPTPTXNSEC_TIMER_DEFAULT   0x00000000UL
 
#define _ETH_TSUPTPTXNSEC_TIMER_MASK   0x3FFFFFFFUL
 
#define _ETH_TSUPTPTXNSEC_TIMER_SHIFT   0
 
#define _ETH_TSUPTPTXSEC_MASK   0xFFFFFFFFUL
 
#define _ETH_TSUPTPTXSEC_RESETVALUE   0x00000000UL
 
#define _ETH_TSUPTPTXSEC_TIMER_DEFAULT   0x00000000UL
 
#define _ETH_TSUPTPTXSEC_TIMER_MASK   0xFFFFFFFFUL
 
#define _ETH_TSUPTPTXSEC_TIMER_SHIFT   0
 
#define _ETH_TSUSECCMP_COMPVAL_DEFAULT   0x00000000UL
 
#define _ETH_TSUSECCMP_COMPVAL_MASK   0xFFFFFFFFUL
 
#define _ETH_TSUSECCMP_COMPVAL_SHIFT   0
 
#define _ETH_TSUSECCMP_MASK   0xFFFFFFFFUL
 
#define _ETH_TSUSECCMP_RESETVALUE   0x00000000UL
 
#define _ETH_TSUTIMERADJUST_ADDSUBTRACT_DEFAULT   0x00000000UL
 
#define _ETH_TSUTIMERADJUST_ADDSUBTRACT_MASK   0x80000000UL
 
#define _ETH_TSUTIMERADJUST_ADDSUBTRACT_SHIFT   31
 
#define _ETH_TSUTIMERADJUST_INCREMENTVAL_DEFAULT   0x00000000UL
 
#define _ETH_TSUTIMERADJUST_INCREMENTVAL_MASK   0x3FFFFFFFUL
 
#define _ETH_TSUTIMERADJUST_INCREMENTVAL_SHIFT   0
 
#define _ETH_TSUTIMERADJUST_MASK   0xBFFFFFFFUL
 
#define _ETH_TSUTIMERADJUST_RESETVALUE   0x00000000UL
 
#define _ETH_TSUTIMERINCR_ALTNSINCR_DEFAULT   0x00000000UL
 
#define _ETH_TSUTIMERINCR_ALTNSINCR_MASK   0xFF00UL
 
#define _ETH_TSUTIMERINCR_ALTNSINCR_SHIFT   8
 
#define _ETH_TSUTIMERINCR_MASK   0x00FFFFFFUL
 
#define _ETH_TSUTIMERINCR_NSINCREMENT_DEFAULT   0x00000000UL
 
#define _ETH_TSUTIMERINCR_NSINCREMENT_MASK   0xFFUL
 
#define _ETH_TSUTIMERINCR_NSINCREMENT_SHIFT   0
 
#define _ETH_TSUTIMERINCR_NUMINCS_DEFAULT   0x00000000UL
 
#define _ETH_TSUTIMERINCR_NUMINCS_MASK   0xFF0000UL
 
#define _ETH_TSUTIMERINCR_NUMINCS_SHIFT   16
 
#define _ETH_TSUTIMERINCR_RESETVALUE   0x00000000UL
 
#define _ETH_TSUTIMERINCRSUBNSEC_MASK   0xFF00FFFFUL
 
#define _ETH_TSUTIMERINCRSUBNSEC_RESETVALUE   0x00000000UL
 
#define _ETH_TSUTIMERINCRSUBNSEC_SUBNSINCR_DEFAULT   0x00000000UL
 
#define _ETH_TSUTIMERINCRSUBNSEC_SUBNSINCR_MASK   0xFFFFUL
 
#define _ETH_TSUTIMERINCRSUBNSEC_SUBNSINCR_SHIFT   0
 
#define _ETH_TSUTIMERINCRSUBNSEC_SUBNSINCRLSB_DEFAULT   0x00000000UL
 
#define _ETH_TSUTIMERINCRSUBNSEC_SUBNSINCRLSB_MASK   0xFF000000UL
 
#define _ETH_TSUTIMERINCRSUBNSEC_SUBNSINCRLSB_SHIFT   24
 
#define _ETH_TSUTIMERMSBSEC_MASK   0x0000FFFFUL
 
#define _ETH_TSUTIMERMSBSEC_RESETVALUE   0x00000000UL
 
#define _ETH_TSUTIMERMSBSEC_TIMER_DEFAULT   0x00000000UL
 
#define _ETH_TSUTIMERMSBSEC_TIMER_MASK   0xFFFFUL
 
#define _ETH_TSUTIMERMSBSEC_TIMER_SHIFT   0
 
#define _ETH_TSUTIMERNSEC_MASK   0x3FFFFFFFUL
 
#define _ETH_TSUTIMERNSEC_RESETVALUE   0x00000000UL
 
#define _ETH_TSUTIMERNSEC_TIMER_DEFAULT   0x00000000UL
 
#define _ETH_TSUTIMERNSEC_TIMER_MASK   0x3FFFFFFFUL
 
#define _ETH_TSUTIMERNSEC_TIMER_SHIFT   0
 
#define _ETH_TSUTIMERSEC_MASK   0xFFFFFFFFUL
 
#define _ETH_TSUTIMERSEC_RESETVALUE   0x00000000UL
 
#define _ETH_TSUTIMERSEC_TIMER_DEFAULT   0x00000000UL
 
#define _ETH_TSUTIMERSEC_TIMER_MASK   0xFFFFFFFFUL
 
#define _ETH_TSUTIMERSEC_TIMER_SHIFT   0
 
#define _ETH_TXBDCTRL_MASK   0x00000030UL
 
#define _ETH_TXBDCTRL_RESETVALUE   0x00000000UL
 
#define _ETH_TXBDCTRL_TXBDTSMODE_DEFAULT   0x00000000UL
 
#define _ETH_TXBDCTRL_TXBDTSMODE_MASK   0x30UL
 
#define _ETH_TXBDCTRL_TXBDTSMODE_SHIFT   4
 
#define _ETH_TXLPI_COUNT_DEFAULT   0x00000000UL
 
#define _ETH_TXLPI_COUNT_MASK   0xFFFFUL
 
#define _ETH_TXLPI_COUNT_SHIFT   0
 
#define _ETH_TXLPI_MASK   0x0000FFFFUL
 
#define _ETH_TXLPI_RESETVALUE   0x00000000UL
 
#define _ETH_TXLPITIME_LPITIME_DEFAULT   0x00000000UL
 
#define _ETH_TXLPITIME_LPITIME_MASK   0xFFFFFFUL
 
#define _ETH_TXLPITIME_LPITIME_SHIFT   0
 
#define _ETH_TXLPITIME_MASK   0x00FFFFFFUL
 
#define _ETH_TXLPITIME_RESETVALUE   0x00000000UL
 
#define _ETH_TXPAUSEQUANT1_MASK   0xFFFFFFFFUL
 
#define _ETH_TXPAUSEQUANT1_QUANTP2_DEFAULT   0x0000FFFFUL
 
#define _ETH_TXPAUSEQUANT1_QUANTP2_MASK   0xFFFFUL
 
#define _ETH_TXPAUSEQUANT1_QUANTP2_SHIFT   0
 
#define _ETH_TXPAUSEQUANT1_QUANTP3_DEFAULT   0x0000FFFFUL
 
#define _ETH_TXPAUSEQUANT1_QUANTP3_MASK   0xFFFF0000UL
 
#define _ETH_TXPAUSEQUANT1_QUANTP3_SHIFT   16
 
#define _ETH_TXPAUSEQUANT1_RESETVALUE   0xFFFFFFFFUL
 
#define _ETH_TXPAUSEQUANT2_MASK   0xFFFFFFFFUL
 
#define _ETH_TXPAUSEQUANT2_QUANTP4_DEFAULT   0x0000FFFFUL
 
#define _ETH_TXPAUSEQUANT2_QUANTP4_MASK   0xFFFFUL
 
#define _ETH_TXPAUSEQUANT2_QUANTP4_SHIFT   0
 
#define _ETH_TXPAUSEQUANT2_QUANTP5_DEFAULT   0x0000FFFFUL
 
#define _ETH_TXPAUSEQUANT2_QUANTP5_MASK   0xFFFF0000UL
 
#define _ETH_TXPAUSEQUANT2_QUANTP5_SHIFT   16
 
#define _ETH_TXPAUSEQUANT2_RESETVALUE   0xFFFFFFFFUL
 
#define _ETH_TXPAUSEQUANT3_MASK   0xFFFFFFFFUL
 
#define _ETH_TXPAUSEQUANT3_QUANTP6_DEFAULT   0x0000FFFFUL
 
#define _ETH_TXPAUSEQUANT3_QUANTP6_MASK   0xFFFFUL
 
#define _ETH_TXPAUSEQUANT3_QUANTP6_SHIFT   0
 
#define _ETH_TXPAUSEQUANT3_QUANTP7_DEFAULT   0x0000FFFFUL
 
#define _ETH_TXPAUSEQUANT3_QUANTP7_MASK   0xFFFF0000UL
 
#define _ETH_TXPAUSEQUANT3_QUANTP7_SHIFT   16
 
#define _ETH_TXPAUSEQUANT3_RESETVALUE   0xFFFFFFFFUL
 
#define _ETH_TXPAUSEQUANT_MASK   0xFFFFFFFFUL
 
#define _ETH_TXPAUSEQUANT_QUANT_DEFAULT   0x0000FFFFUL
 
#define _ETH_TXPAUSEQUANT_QUANT_MASK   0xFFFFUL
 
#define _ETH_TXPAUSEQUANT_QUANT_SHIFT   0
 
#define _ETH_TXPAUSEQUANT_QUANTP1_DEFAULT   0x0000FFFFUL
 
#define _ETH_TXPAUSEQUANT_QUANTP1_MASK   0xFFFF0000UL
 
#define _ETH_TXPAUSEQUANT_QUANTP1_SHIFT   16
 
#define _ETH_TXPAUSEQUANT_RESETVALUE   0xFFFFFFFFUL
 
#define _ETH_TXPFCPAUSE_MASK   0x0000FFFFUL
 
#define _ETH_TXPFCPAUSE_RESETVALUE   0x00000000UL
 
#define _ETH_TXPFCPAUSE_VECTOR_DEFAULT   0x00000000UL
 
#define _ETH_TXPFCPAUSE_VECTOR_MASK   0xFF00UL
 
#define _ETH_TXPFCPAUSE_VECTOR_SHIFT   8
 
#define _ETH_TXPFCPAUSE_VECTORENB_DEFAULT   0x00000000UL
 
#define _ETH_TXPFCPAUSE_VECTORENB_MASK   0xFFUL
 
#define _ETH_TXPFCPAUSE_VECTORENB_SHIFT   0
 
#define _ETH_TXPTPUNICAST_ADDR_DEFAULT   0x00000000UL
 
#define _ETH_TXPTPUNICAST_ADDR_MASK   0xFFFFFFFFUL
 
#define _ETH_TXPTPUNICAST_ADDR_SHIFT   0
 
#define _ETH_TXPTPUNICAST_MASK   0xFFFFFFFFUL
 
#define _ETH_TXPTPUNICAST_RESETVALUE   0x00000000UL
 
#define _ETH_TXQPTR_DMATXQPTR_DEFAULT   0x00000000UL
 
#define _ETH_TXQPTR_DMATXQPTR_MASK   0xFFFFFFFCUL
 
#define _ETH_TXQPTR_DMATXQPTR_SHIFT   2
 
#define _ETH_TXQPTR_MASK   0xFFFFFFFCUL
 
#define _ETH_TXQPTR_RESETVALUE   0x00000000UL
 
#define _ETH_TXSTATUS_AMBAERR_DEFAULT   0x00000000UL
 
#define _ETH_TXSTATUS_AMBAERR_MASK   0x10UL
 
#define _ETH_TXSTATUS_AMBAERR_SHIFT   4
 
#define _ETH_TXSTATUS_COLOCCRD_DEFAULT   0x00000000UL
 
#define _ETH_TXSTATUS_COLOCCRD_MASK   0x2UL
 
#define _ETH_TXSTATUS_COLOCCRD_SHIFT   1
 
#define _ETH_TXSTATUS_LATECOLOCCRD_DEFAULT   0x00000000UL
 
#define _ETH_TXSTATUS_LATECOLOCCRD_MASK   0x80UL
 
#define _ETH_TXSTATUS_LATECOLOCCRD_SHIFT   7
 
#define _ETH_TXSTATUS_MASK   0x000001FFUL
 
#define _ETH_TXSTATUS_RESETVALUE   0x00000000UL
 
#define _ETH_TXSTATUS_RESPNOTOK_DEFAULT   0x00000000UL
 
#define _ETH_TXSTATUS_RESPNOTOK_MASK   0x100UL
 
#define _ETH_TXSTATUS_RESPNOTOK_SHIFT   8
 
#define _ETH_TXSTATUS_RETRYLMTEXCD_DEFAULT   0x00000000UL
 
#define _ETH_TXSTATUS_RETRYLMTEXCD_MASK   0x4UL
 
#define _ETH_TXSTATUS_RETRYLMTEXCD_SHIFT   2
 
#define _ETH_TXSTATUS_TXCMPLT_DEFAULT   0x00000000UL
 
#define _ETH_TXSTATUS_TXCMPLT_MASK   0x20UL
 
#define _ETH_TXSTATUS_TXCMPLT_SHIFT   5
 
#define _ETH_TXSTATUS_TXGO_DEFAULT   0x00000000UL
 
#define _ETH_TXSTATUS_TXGO_MASK   0x8UL
 
#define _ETH_TXSTATUS_TXGO_SHIFT   3
 
#define _ETH_TXSTATUS_TXUNDERRUN_DEFAULT   0x00000000UL
 
#define _ETH_TXSTATUS_TXUNDERRUN_MASK   0x40UL
 
#define _ETH_TXSTATUS_TXUNDERRUN_SHIFT   6
 
#define _ETH_TXSTATUS_USEDBITREAD_DEFAULT   0x00000000UL
 
#define _ETH_TXSTATUS_USEDBITREAD_MASK   0x1UL
 
#define _ETH_TXSTATUS_USEDBITREAD_SHIFT   0
 
#define _ETH_TXUNDERRUNS_COUNT_DEFAULT   0x00000000UL
 
#define _ETH_TXUNDERRUNS_COUNT_MASK   0x3FFUL
 
#define _ETH_TXUNDERRUNS_COUNT_SHIFT   0
 
#define _ETH_TXUNDERRUNS_MASK   0x000003FFUL
 
#define _ETH_TXUNDERRUNS_RESETVALUE   0x00000000UL
 
#define _ETH_UNDERSIZEFRAMES_COUNT_DEFAULT   0x00000000UL
 
#define _ETH_UNDERSIZEFRAMES_COUNT_MASK   0x3FFUL
 
#define _ETH_UNDERSIZEFRAMES_COUNT_SHIFT   0
 
#define _ETH_UNDERSIZEFRAMES_MASK   0x000003FFUL
 
#define _ETH_UNDERSIZEFRAMES_RESETVALUE   0x00000000UL
 
#define _ETH_WOLREG_ADDR_DEFAULT   0x00000000UL
 
#define _ETH_WOLREG_ADDR_MASK   0xFFFFUL
 
#define _ETH_WOLREG_ADDR_SHIFT   0
 
#define _ETH_WOLREG_MASK   0x000FFFFFUL
 
#define _ETH_WOLREG_RESETVALUE   0x00000000UL
 
#define _ETH_WOLREG_WOLMASK0_DEFAULT   0x00000000UL
 
#define _ETH_WOLREG_WOLMASK0_MASK   0x10000UL
 
#define _ETH_WOLREG_WOLMASK0_SHIFT   16
 
#define _ETH_WOLREG_WOLMASK1_DEFAULT   0x00000000UL
 
#define _ETH_WOLREG_WOLMASK1_MASK   0x20000UL
 
#define _ETH_WOLREG_WOLMASK1_SHIFT   17
 
#define _ETH_WOLREG_WOLMASK2_DEFAULT   0x00000000UL
 
#define _ETH_WOLREG_WOLMASK2_MASK   0x40000UL
 
#define _ETH_WOLREG_WOLMASK2_SHIFT   18
 
#define _ETH_WOLREG_WOLMASK3_DEFAULT   0x00000000UL
 
#define _ETH_WOLREG_WOLMASK3_MASK   0x80000UL
 
#define _ETH_WOLREG_WOLMASK3_SHIFT   19
 
#define ETH_ALIGNERRS_COUNT_DEFAULT   (_ETH_ALIGNERRS_COUNT_DEFAULT << 0)
 
#define ETH_AUTOFLUSHEDPKTS_COUNT_DEFAULT   (_ETH_AUTOFLUSHEDPKTS_COUNT_DEFAULT << 0)
 
#define ETH_BROADCASTRXED_COUNT_DEFAULT   (_ETH_BROADCASTRXED_COUNT_DEFAULT << 0)
 
#define ETH_BROADCASTTXED_COUNT_DEFAULT   (_ETH_BROADCASTTXED_COUNT_DEFAULT << 0)
 
#define ETH_CRSERRS_COUNT_DEFAULT   (_ETH_CRSERRS_COUNT_DEFAULT << 0)
 
#define ETH_CTRL_GBLCLKEN   (0x1UL << 9)
 
#define ETH_CTRL_GBLCLKEN_DEFAULT   (_ETH_CTRL_GBLCLKEN_DEFAULT << 9)
 
#define ETH_CTRL_MIISEL   (0x1UL << 8)
 
#define ETH_CTRL_MIISEL_DEFAULT   (_ETH_CTRL_MIISEL_DEFAULT << 8)
 
#define ETH_CTRL_MIISEL_MII   (_ETH_CTRL_MIISEL_MII << 8)
 
#define ETH_CTRL_MIISEL_RMII   (_ETH_CTRL_MIISEL_RMII << 8)
 
#define ETH_CTRL_TSUCLKSEL_DEFAULT   (_ETH_CTRL_TSUCLKSEL_DEFAULT << 0)
 
#define ETH_CTRL_TSUCLKSEL_NOCLOCK   (_ETH_CTRL_TSUCLKSEL_NOCLOCK << 0)
 
#define ETH_CTRL_TSUCLKSEL_PLL   (_ETH_CTRL_TSUCLKSEL_PLL << 0)
 
#define ETH_CTRL_TSUCLKSEL_REFCLK   (_ETH_CTRL_TSUCLKSEL_REFCLK << 0)
 
#define ETH_CTRL_TSUCLKSEL_RXCLK   (_ETH_CTRL_TSUCLKSEL_RXCLK << 0)
 
#define ETH_CTRL_TSUCLKSEL_TSUEXTCLK   (_ETH_CTRL_TSUCLKSEL_TSUEXTCLK << 0)
 
#define ETH_CTRL_TSUPRESC_DEFAULT   (_ETH_CTRL_TSUPRESC_DEFAULT << 4)
 
#define ETH_CTRL_TXREFCLKSEL   (0x1UL << 10)
 
#define ETH_CTRL_TXREFCLKSEL_DEFAULT   (_ETH_CTRL_TXREFCLKSEL_DEFAULT << 10)
 
#define ETH_CTRL_TXREFCLKSEL_REFCLKINT   (_ETH_CTRL_TXREFCLKSEL_REFCLKINT << 10)
 
#define ETH_CTRL_TXREFCLKSEL_REFCLKPIN   (_ETH_CTRL_TXREFCLKSEL_REFCLKPIN << 10)
 
#define ETH_DEFERREDFRAMES_COUNT_DEFAULT   (_ETH_DEFERREDFRAMES_COUNT_DEFAULT << 0)
 
#define ETH_DMACFG_AMBABRSTLEN_DEFAULT   (_ETH_DMACFG_AMBABRSTLEN_DEFAULT << 0)
 
#define ETH_DMACFG_FRCDISCARDONERR   (0x1UL << 24)
 
#define ETH_DMACFG_FRCDISCARDONERR_DEFAULT   (_ETH_DMACFG_FRCDISCARDONERR_DEFAULT << 24)
 
#define ETH_DMACFG_FRCMAXAMBABRSTRX   (0x1UL << 25)
 
#define ETH_DMACFG_FRCMAXAMBABRSTRX_DEFAULT   (_ETH_DMACFG_FRCMAXAMBABRSTRX_DEFAULT << 25)
 
#define ETH_DMACFG_FRCMAXAMBABRSTTX   (0x1UL << 26)
 
#define ETH_DMACFG_FRCMAXAMBABRSTTX_DEFAULT   (_ETH_DMACFG_FRCMAXAMBABRSTTX_DEFAULT << 26)
 
#define ETH_DMACFG_HDRDATASPLITEN   (0x1UL << 5)
 
#define ETH_DMACFG_HDRDATASPLITEN_DEFAULT   (_ETH_DMACFG_HDRDATASPLITEN_DEFAULT << 5)
 
#define ETH_DMACFG_INFLASTDBUFSIZEEN   (0x1UL << 12)
 
#define ETH_DMACFG_INFLASTDBUFSIZEEN_DEFAULT   (_ETH_DMACFG_INFLASTDBUFSIZEEN_DEFAULT << 12)
 
#define ETH_DMACFG_RXBDEXTNDMODEEN   (0x1UL << 28)
 
#define ETH_DMACFG_RXBDEXTNDMODEEN_DEFAULT   (_ETH_DMACFG_RXBDEXTNDMODEEN_DEFAULT << 28)
 
#define ETH_DMACFG_RXBUFSIZE_DEFAULT   (_ETH_DMACFG_RXBUFSIZE_DEFAULT << 16)
 
#define ETH_DMACFG_RXPBUFSIZE_DEFAULT   (_ETH_DMACFG_RXPBUFSIZE_DEFAULT << 8)
 
#define ETH_DMACFG_RXPBUFSIZE_SIZE0   (_ETH_DMACFG_RXPBUFSIZE_SIZE0 << 8)
 
#define ETH_DMACFG_RXPBUFSIZE_SIZE1   (_ETH_DMACFG_RXPBUFSIZE_SIZE1 << 8)
 
#define ETH_DMACFG_RXPBUFSIZE_SIZE2   (_ETH_DMACFG_RXPBUFSIZE_SIZE2 << 8)
 
#define ETH_DMACFG_RXPBUFSIZE_SIZE3   (_ETH_DMACFG_RXPBUFSIZE_SIZE3 << 8)
 
#define ETH_DMACFG_TXBDEXTENDMODEEN   (0x1UL << 29)
 
#define ETH_DMACFG_TXBDEXTENDMODEEN_DEFAULT   (_ETH_DMACFG_TXBDEXTENDMODEEN_DEFAULT << 29)
 
#define ETH_DMACFG_TXPBUFSIZE   (0x1UL << 10)
 
#define ETH_DMACFG_TXPBUFSIZE_DEFAULT   (_ETH_DMACFG_TXPBUFSIZE_DEFAULT << 10)
 
#define ETH_DMACFG_TXPBUFSIZE_SIZE0   (_ETH_DMACFG_TXPBUFSIZE_SIZE0 << 10)
 
#define ETH_DMACFG_TXPBUFSIZE_SIZE1   (_ETH_DMACFG_TXPBUFSIZE_SIZE1 << 10)
 
#define ETH_DMACFG_TXPBUFTCPEN   (0x1UL << 11)
 
#define ETH_DMACFG_TXPBUFTCPEN_DEFAULT   (_ETH_DMACFG_TXPBUFTCPEN_DEFAULT << 11)
 
#define ETH_EXCESSCOLS_COUNT_DEFAULT   (_ETH_EXCESSCOLS_COUNT_DEFAULT << 0)
 
#define ETH_EXCESSIVERXLEN_COUNT_DEFAULT   (_ETH_EXCESSIVERXLEN_COUNT_DEFAULT << 0)
 
#define ETH_FCSERRS_COUNT_DEFAULT   (_ETH_FCSERRS_COUNT_DEFAULT << 0)
 
#define ETH_FRAMESRXED1024_COUNT_DEFAULT   (_ETH_FRAMESRXED1024_COUNT_DEFAULT << 0)
 
#define ETH_FRAMESRXED128_COUNT_DEFAULT   (_ETH_FRAMESRXED128_COUNT_DEFAULT << 0)
 
#define ETH_FRAMESRXED1519_COUNT_DEFAULT   (_ETH_FRAMESRXED1519_COUNT_DEFAULT << 0)
 
#define ETH_FRAMESRXED256_COUNT_DEFAULT   (_ETH_FRAMESRXED256_COUNT_DEFAULT << 0)
 
#define ETH_FRAMESRXED512_COUNT_DEFAULT   (_ETH_FRAMESRXED512_COUNT_DEFAULT << 0)
 
#define ETH_FRAMESRXED64_COUNT_DEFAULT   (_ETH_FRAMESRXED64_COUNT_DEFAULT << 0)
 
#define ETH_FRAMESRXED65_COUNT_DEFAULT   (_ETH_FRAMESRXED65_COUNT_DEFAULT << 0)
 
#define ETH_FRAMESRXEDOK_COUNT_DEFAULT   (_ETH_FRAMESRXEDOK_COUNT_DEFAULT << 0)
 
#define ETH_FRAMESTXED1024_COUNT_DEFAULT   (_ETH_FRAMESTXED1024_COUNT_DEFAULT << 0)
 
#define ETH_FRAMESTXED128_COUNT_DEFAULT   (_ETH_FRAMESTXED128_COUNT_DEFAULT << 0)
 
#define ETH_FRAMESTXED1519_COUNT_DEFAULT   (_ETH_FRAMESTXED1519_COUNT_DEFAULT << 0)
 
#define ETH_FRAMESTXED256_COUNT_DEFAULT   (_ETH_FRAMESTXED256_COUNT_DEFAULT << 0)
 
#define ETH_FRAMESTXED512_COUNT_DEFAULT   (_ETH_FRAMESTXED512_COUNT_DEFAULT << 0)
 
#define ETH_FRAMESTXED64_COUNT_DEFAULT   (_ETH_FRAMESTXED64_COUNT_DEFAULT << 0)
 
#define ETH_FRAMESTXED65_COUNT_DEFAULT   (_ETH_FRAMESTXED65_COUNT_DEFAULT << 0)
 
#define ETH_FRAMESTXEDOK_COUNT_DEFAULT   (_ETH_FRAMESTXEDOK_COUNT_DEFAULT << 0)
 
#define ETH_HASHBOTTOM_ADDR_DEFAULT   (_ETH_HASHBOTTOM_ADDR_DEFAULT << 0)
 
#define ETH_HASHTOP_ADDR_DEFAULT   (_ETH_HASHTOP_ADDR_DEFAULT << 0)
 
#define ETH_IENC_AMBAERR   (0x1UL << 6)
 
#define ETH_IENC_AMBAERR_DEFAULT   (_ETH_IENC_AMBAERR_DEFAULT << 6)
 
#define ETH_IENC_MNGMNTDONE   (0x1UL << 0)
 
#define ETH_IENC_MNGMNTDONE_DEFAULT   (_ETH_IENC_MNGMNTDONE_DEFAULT << 0)
 
#define ETH_IENC_NONZEROPFRMQUANT   (0x1UL << 12)
 
#define ETH_IENC_NONZEROPFRMQUANT_DEFAULT   (_ETH_IENC_NONZEROPFRMQUANT_DEFAULT << 12)
 
#define ETH_IENC_PAUSETIMEZERO   (0x1UL << 13)
 
#define ETH_IENC_PAUSETIMEZERO_DEFAULT   (_ETH_IENC_PAUSETIMEZERO_DEFAULT << 13)
 
#define ETH_IENC_PFRMTX   (0x1UL << 14)
 
#define ETH_IENC_PFRMTX_DEFAULT   (_ETH_IENC_PFRMTX_DEFAULT << 14)
 
#define ETH_IENC_PTPDLYREQFRMRX   (0x1UL << 18)
 
#define ETH_IENC_PTPDLYREQFRMRX_DEFAULT   (_ETH_IENC_PTPDLYREQFRMRX_DEFAULT << 18)
 
#define ETH_IENC_PTPDLYREQFRMTX   (0x1UL << 20)
 
#define ETH_IENC_PTPDLYREQFRMTX_DEFAULT   (_ETH_IENC_PTPDLYREQFRMTX_DEFAULT << 20)
 
#define ETH_IENC_PTPPDLYREQFRMRX   (0x1UL << 22)
 
#define ETH_IENC_PTPPDLYREQFRMRX_DEFAULT   (_ETH_IENC_PTPPDLYREQFRMRX_DEFAULT << 22)
 
#define ETH_IENC_PTPPDLYREQFRMTX   (0x1UL << 24)
 
#define ETH_IENC_PTPPDLYREQFRMTX_DEFAULT   (_ETH_IENC_PTPPDLYREQFRMTX_DEFAULT << 24)
 
#define ETH_IENC_PTPPDLYRESPFRMRX   (0x1UL << 23)
 
#define ETH_IENC_PTPPDLYRESPFRMRX_DEFAULT   (_ETH_IENC_PTPPDLYRESPFRMRX_DEFAULT << 23)
 
#define ETH_IENC_PTPPDLYRESPFRMTX   (0x1UL << 25)
 
#define ETH_IENC_PTPPDLYRESPFRMTX_DEFAULT   (_ETH_IENC_PTPPDLYRESPFRMTX_DEFAULT << 25)
 
#define ETH_IENC_PTPSYNCFRMRX   (0x1UL << 19)
 
#define ETH_IENC_PTPSYNCFRMRX_DEFAULT   (_ETH_IENC_PTPSYNCFRMRX_DEFAULT << 19)
 
#define ETH_IENC_PTPSYNCFRMTX   (0x1UL << 21)
 
#define ETH_IENC_PTPSYNCFRMTX_DEFAULT   (_ETH_IENC_PTPSYNCFRMTX_DEFAULT << 21)
 
#define ETH_IENC_RESPNOTOK   (0x1UL << 11)
 
#define ETH_IENC_RESPNOTOK_DEFAULT   (_ETH_IENC_RESPNOTOK_DEFAULT << 11)
 
#define ETH_IENC_RTRYLMTORLATECOL   (0x1UL << 5)
 
#define ETH_IENC_RTRYLMTORLATECOL_DEFAULT   (_ETH_IENC_RTRYLMTORLATECOL_DEFAULT << 5)
 
#define ETH_IENC_RXCMPLT   (0x1UL << 1)
 
#define ETH_IENC_RXCMPLT_DEFAULT   (_ETH_IENC_RXCMPLT_DEFAULT << 1)
 
#define ETH_IENC_RXLPIINDC   (0x1UL << 27)
 
#define ETH_IENC_RXLPIINDC_DEFAULT   (_ETH_IENC_RXLPIINDC_DEFAULT << 27)
 
#define ETH_IENC_RXOVERRUN   (0x1UL << 10)
 
#define ETH_IENC_RXOVERRUN_DEFAULT   (_ETH_IENC_RXOVERRUN_DEFAULT << 10)
 
#define ETH_IENC_RXUSEDBITREAD   (0x1UL << 2)
 
#define ETH_IENC_RXUSEDBITREAD_DEFAULT   (_ETH_IENC_RXUSEDBITREAD_DEFAULT << 2)
 
#define ETH_IENC_TSUSECREGINCR   (0x1UL << 26)
 
#define ETH_IENC_TSUSECREGINCR_DEFAULT   (_ETH_IENC_TSUSECREGINCR_DEFAULT << 26)
 
#define ETH_IENC_TSUTIMERCOMP   (0x1UL << 29)
 
#define ETH_IENC_TSUTIMERCOMP_DEFAULT   (_ETH_IENC_TSUTIMERCOMP_DEFAULT << 29)
 
#define ETH_IENC_TXCMPLT   (0x1UL << 7)
 
#define ETH_IENC_TXCMPLT_DEFAULT   (_ETH_IENC_TXCMPLT_DEFAULT << 7)
 
#define ETH_IENC_TXUNDERRUN   (0x1UL << 4)
 
#define ETH_IENC_TXUNDERRUN_DEFAULT   (_ETH_IENC_TXUNDERRUN_DEFAULT << 4)
 
#define ETH_IENC_TXUSEDBITREAD   (0x1UL << 3)
 
#define ETH_IENC_TXUSEDBITREAD_DEFAULT   (_ETH_IENC_TXUSEDBITREAD_DEFAULT << 3)
 
#define ETH_IENC_WOLEVNTRX   (0x1UL << 28)
 
#define ETH_IENC_WOLEVNTRX_DEFAULT   (_ETH_IENC_WOLEVNTRX_DEFAULT << 28)
 
#define ETH_IENRO_AMBAERR   (0x1UL << 6)
 
#define ETH_IENRO_AMBAERR_DEFAULT   (_ETH_IENRO_AMBAERR_DEFAULT << 6)
 
#define ETH_IENRO_MNGMNTDONE   (0x1UL << 0)
 
#define ETH_IENRO_MNGMNTDONE_DEFAULT   (_ETH_IENRO_MNGMNTDONE_DEFAULT << 0)
 
#define ETH_IENRO_NONZEROPFRMQUANT   (0x1UL << 12)
 
#define ETH_IENRO_NONZEROPFRMQUANT_DEFAULT   (_ETH_IENRO_NONZEROPFRMQUANT_DEFAULT << 12)
 
#define ETH_IENRO_PAUSETIMEZERO   (0x1UL << 13)
 
#define ETH_IENRO_PAUSETIMEZERO_DEFAULT   (_ETH_IENRO_PAUSETIMEZERO_DEFAULT << 13)
 
#define ETH_IENRO_PFRMTX   (0x1UL << 14)
 
#define ETH_IENRO_PFRMTX_DEFAULT   (_ETH_IENRO_PFRMTX_DEFAULT << 14)
 
#define ETH_IENRO_PTPDLYREQFRMRX   (0x1UL << 18)
 
#define ETH_IENRO_PTPDLYREQFRMRX_DEFAULT   (_ETH_IENRO_PTPDLYREQFRMRX_DEFAULT << 18)
 
#define ETH_IENRO_PTPDLYREQFRMTX   (0x1UL << 20)
 
#define ETH_IENRO_PTPDLYREQFRMTX_DEFAULT   (_ETH_IENRO_PTPDLYREQFRMTX_DEFAULT << 20)
 
#define ETH_IENRO_PTPPDLYREQFRMRX   (0x1UL << 22)
 
#define ETH_IENRO_PTPPDLYREQFRMRX_DEFAULT   (_ETH_IENRO_PTPPDLYREQFRMRX_DEFAULT << 22)
 
#define ETH_IENRO_PTPPDLYREQFRMTX   (0x1UL << 24)
 
#define ETH_IENRO_PTPPDLYREQFRMTX_DEFAULT   (_ETH_IENRO_PTPPDLYREQFRMTX_DEFAULT << 24)
 
#define ETH_IENRO_PTPPDLYRESPFRMRX   (0x1UL << 23)
 
#define ETH_IENRO_PTPPDLYRESPFRMRX_DEFAULT   (_ETH_IENRO_PTPPDLYRESPFRMRX_DEFAULT << 23)
 
#define ETH_IENRO_PTPPDLYRESPFRMTX   (0x1UL << 25)
 
#define ETH_IENRO_PTPPDLYRESPFRMTX_DEFAULT   (_ETH_IENRO_PTPPDLYRESPFRMTX_DEFAULT << 25)
 
#define ETH_IENRO_PTPSYNCFRMRX   (0x1UL << 19)
 
#define ETH_IENRO_PTPSYNCFRMRX_DEFAULT   (_ETH_IENRO_PTPSYNCFRMRX_DEFAULT << 19)
 
#define ETH_IENRO_PTPSYNCFRMTX   (0x1UL << 21)
 
#define ETH_IENRO_PTPSYNCFRMTX_DEFAULT   (_ETH_IENRO_PTPSYNCFRMTX_DEFAULT << 21)
 
#define ETH_IENRO_RESPNOTOK   (0x1UL << 11)
 
#define ETH_IENRO_RESPNOTOK_DEFAULT   (_ETH_IENRO_RESPNOTOK_DEFAULT << 11)
 
#define ETH_IENRO_RTRYLMTORLATECOL   (0x1UL << 5)
 
#define ETH_IENRO_RTRYLMTORLATECOL_DEFAULT   (_ETH_IENRO_RTRYLMTORLATECOL_DEFAULT << 5)
 
#define ETH_IENRO_RXCMPLT   (0x1UL << 1)
 
#define ETH_IENRO_RXCMPLT_DEFAULT   (_ETH_IENRO_RXCMPLT_DEFAULT << 1)
 
#define ETH_IENRO_RXLPIINDC   (0x1UL << 27)
 
#define ETH_IENRO_RXLPIINDC_DEFAULT   (_ETH_IENRO_RXLPIINDC_DEFAULT << 27)
 
#define ETH_IENRO_RXOVERRUN   (0x1UL << 10)
 
#define ETH_IENRO_RXOVERRUN_DEFAULT   (_ETH_IENRO_RXOVERRUN_DEFAULT << 10)
 
#define ETH_IENRO_RXUSEDBITREAD   (0x1UL << 2)
 
#define ETH_IENRO_RXUSEDBITREAD_DEFAULT   (_ETH_IENRO_RXUSEDBITREAD_DEFAULT << 2)
 
#define ETH_IENRO_TSUSECREGINCR   (0x1UL << 26)
 
#define ETH_IENRO_TSUSECREGINCR_DEFAULT   (_ETH_IENRO_TSUSECREGINCR_DEFAULT << 26)
 
#define ETH_IENRO_TSUTIMERCOMP   (0x1UL << 29)
 
#define ETH_IENRO_TSUTIMERCOMP_DEFAULT   (_ETH_IENRO_TSUTIMERCOMP_DEFAULT << 29)
 
#define ETH_IENRO_TXCMPLT   (0x1UL << 7)
 
#define ETH_IENRO_TXCMPLT_DEFAULT   (_ETH_IENRO_TXCMPLT_DEFAULT << 7)
 
#define ETH_IENRO_TXUNDERRUN   (0x1UL << 4)
 
#define ETH_IENRO_TXUNDERRUN_DEFAULT   (_ETH_IENRO_TXUNDERRUN_DEFAULT << 4)
 
#define ETH_IENRO_TXUSEDBITREAD   (0x1UL << 3)
 
#define ETH_IENRO_TXUSEDBITREAD_DEFAULT   (_ETH_IENRO_TXUSEDBITREAD_DEFAULT << 3)
 
#define ETH_IENRO_UNUSED   (0x1UL << 8)
 
#define ETH_IENRO_UNUSED_DEFAULT   (_ETH_IENRO_UNUSED_DEFAULT << 8)
 
#define ETH_IENRO_WOLEVNTRX   (0x1UL << 28)
 
#define ETH_IENRO_WOLEVNTRX_DEFAULT   (_ETH_IENRO_WOLEVNTRX_DEFAULT << 28)
 
#define ETH_IENS_AMBAERR   (0x1UL << 6)
 
#define ETH_IENS_AMBAERR_DEFAULT   (_ETH_IENS_AMBAERR_DEFAULT << 6)
 
#define ETH_IENS_MNGMNTDONE   (0x1UL << 0)
 
#define ETH_IENS_MNGMNTDONE_DEFAULT   (_ETH_IENS_MNGMNTDONE_DEFAULT << 0)
 
#define ETH_IENS_NONZEROPFRMQUANT   (0x1UL << 12)
 
#define ETH_IENS_NONZEROPFRMQUANT_DEFAULT   (_ETH_IENS_NONZEROPFRMQUANT_DEFAULT << 12)
 
#define ETH_IENS_PAUSETIMEZERO   (0x1UL << 13)
 
#define ETH_IENS_PAUSETIMEZERO_DEFAULT   (_ETH_IENS_PAUSETIMEZERO_DEFAULT << 13)
 
#define ETH_IENS_PFRMTX   (0x1UL << 14)
 
#define ETH_IENS_PFRMTX_DEFAULT   (_ETH_IENS_PFRMTX_DEFAULT << 14)
 
#define ETH_IENS_PTPDLYREQFRMRX   (0x1UL << 18)
 
#define ETH_IENS_PTPDLYREQFRMRX_DEFAULT   (_ETH_IENS_PTPDLYREQFRMRX_DEFAULT << 18)
 
#define ETH_IENS_PTPDLYREQFRMTX   (0x1UL << 20)
 
#define ETH_IENS_PTPDLYREQFRMTX_DEFAULT   (_ETH_IENS_PTPDLYREQFRMTX_DEFAULT << 20)
 
#define ETH_IENS_PTPPDLYREQFRMRX   (0x1UL << 22)
 
#define ETH_IENS_PTPPDLYREQFRMRX_DEFAULT   (_ETH_IENS_PTPPDLYREQFRMRX_DEFAULT << 22)
 
#define ETH_IENS_PTPPDLYREQFRMTX   (0x1UL << 24)
 
#define ETH_IENS_PTPPDLYREQFRMTX_DEFAULT   (_ETH_IENS_PTPPDLYREQFRMTX_DEFAULT << 24)
 
#define ETH_IENS_PTPPDLYRESPFRMRX   (0x1UL << 23)
 
#define ETH_IENS_PTPPDLYRESPFRMRX_DEFAULT   (_ETH_IENS_PTPPDLYRESPFRMRX_DEFAULT << 23)
 
#define ETH_IENS_PTPPDLYRESPFRMTX   (0x1UL << 25)
 
#define ETH_IENS_PTPPDLYRESPFRMTX_DEFAULT   (_ETH_IENS_PTPPDLYRESPFRMTX_DEFAULT << 25)
 
#define ETH_IENS_PTPSYNCFRMRX   (0x1UL << 19)
 
#define ETH_IENS_PTPSYNCFRMRX_DEFAULT   (_ETH_IENS_PTPSYNCFRMRX_DEFAULT << 19)
 
#define ETH_IENS_PTPSYNCFRMTX   (0x1UL << 21)
 
#define ETH_IENS_PTPSYNCFRMTX_DEFAULT   (_ETH_IENS_PTPSYNCFRMTX_DEFAULT << 21)
 
#define ETH_IENS_RESPNOTOK   (0x1UL << 11)
 
#define ETH_IENS_RESPNOTOK_DEFAULT   (_ETH_IENS_RESPNOTOK_DEFAULT << 11)
 
#define ETH_IENS_RTRYLMTORLATECOL   (0x1UL << 5)
 
#define ETH_IENS_RTRYLMTORLATECOL_DEFAULT   (_ETH_IENS_RTRYLMTORLATECOL_DEFAULT << 5)
 
#define ETH_IENS_RXCMPLT   (0x1UL << 1)
 
#define ETH_IENS_RXCMPLT_DEFAULT   (_ETH_IENS_RXCMPLT_DEFAULT << 1)
 
#define ETH_IENS_RXLPIINDC   (0x1UL << 27)
 
#define ETH_IENS_RXLPIINDC_DEFAULT   (_ETH_IENS_RXLPIINDC_DEFAULT << 27)
 
#define ETH_IENS_RXOVERRUN   (0x1UL << 10)
 
#define ETH_IENS_RXOVERRUN_DEFAULT   (_ETH_IENS_RXOVERRUN_DEFAULT << 10)
 
#define ETH_IENS_RXUSEDBITREAD   (0x1UL << 2)
 
#define ETH_IENS_RXUSEDBITREAD_DEFAULT   (_ETH_IENS_RXUSEDBITREAD_DEFAULT << 2)
 
#define ETH_IENS_TSUSECREGINCR   (0x1UL << 26)
 
#define ETH_IENS_TSUSECREGINCR_DEFAULT   (_ETH_IENS_TSUSECREGINCR_DEFAULT << 26)
 
#define ETH_IENS_TSUTIMERCOMP   (0x1UL << 29)
 
#define ETH_IENS_TSUTIMERCOMP_DEFAULT   (_ETH_IENS_TSUTIMERCOMP_DEFAULT << 29)
 
#define ETH_IENS_TXCMPLT   (0x1UL << 7)
 
#define ETH_IENS_TXCMPLT_DEFAULT   (_ETH_IENS_TXCMPLT_DEFAULT << 7)
 
#define ETH_IENS_TXUNDERRUN   (0x1UL << 4)
 
#define ETH_IENS_TXUNDERRUN_DEFAULT   (_ETH_IENS_TXUNDERRUN_DEFAULT << 4)
 
#define ETH_IENS_TXUSEDBITREAD   (0x1UL << 3)
 
#define ETH_IENS_TXUSEDBITREAD_DEFAULT   (_ETH_IENS_TXUSEDBITREAD_DEFAULT << 3)
 
#define ETH_IENS_WOLEVNTRX   (0x1UL << 28)
 
#define ETH_IENS_WOLEVNTRX_DEFAULT   (_ETH_IENS_WOLEVNTRX_DEFAULT << 28)
 
#define ETH_IFCR_AMBAERR   (0x1UL << 6)
 
#define ETH_IFCR_AMBAERR_DEFAULT   (_ETH_IFCR_AMBAERR_DEFAULT << 6)
 
#define ETH_IFCR_MNGMNTDONE   (0x1UL << 0)
 
#define ETH_IFCR_MNGMNTDONE_DEFAULT   (_ETH_IFCR_MNGMNTDONE_DEFAULT << 0)
 
#define ETH_IFCR_NONZEROPFRMQUANT   (0x1UL << 12)
 
#define ETH_IFCR_NONZEROPFRMQUANT_DEFAULT   (_ETH_IFCR_NONZEROPFRMQUANT_DEFAULT << 12)
 
#define ETH_IFCR_PAUSETIMEZERO   (0x1UL << 13)
 
#define ETH_IFCR_PAUSETIMEZERO_DEFAULT   (_ETH_IFCR_PAUSETIMEZERO_DEFAULT << 13)
 
#define ETH_IFCR_PFRMTX   (0x1UL << 14)
 
#define ETH_IFCR_PFRMTX_DEFAULT   (_ETH_IFCR_PFRMTX_DEFAULT << 14)
 
#define ETH_IFCR_PTPDLYREQFRMRX   (0x1UL << 18)
 
#define ETH_IFCR_PTPDLYREQFRMRX_DEFAULT   (_ETH_IFCR_PTPDLYREQFRMRX_DEFAULT << 18)
 
#define ETH_IFCR_PTPDLYREQFRMTX   (0x1UL << 20)
 
#define ETH_IFCR_PTPDLYREQFRMTX_DEFAULT   (_ETH_IFCR_PTPDLYREQFRMTX_DEFAULT << 20)
 
#define ETH_IFCR_PTPPDLYREQFRMRX   (0x1UL << 22)
 
#define ETH_IFCR_PTPPDLYREQFRMRX_DEFAULT   (_ETH_IFCR_PTPPDLYREQFRMRX_DEFAULT << 22)
 
#define ETH_IFCR_PTPPDLYREQFRMTX   (0x1UL << 24)
 
#define ETH_IFCR_PTPPDLYREQFRMTX_DEFAULT   (_ETH_IFCR_PTPPDLYREQFRMTX_DEFAULT << 24)
 
#define ETH_IFCR_PTPPDLYRESPFRMRX   (0x1UL << 23)
 
#define ETH_IFCR_PTPPDLYRESPFRMRX_DEFAULT   (_ETH_IFCR_PTPPDLYRESPFRMRX_DEFAULT << 23)
 
#define ETH_IFCR_PTPPDLYRESPFRMTX   (0x1UL << 25)
 
#define ETH_IFCR_PTPPDLYRESPFRMTX_DEFAULT   (_ETH_IFCR_PTPPDLYRESPFRMTX_DEFAULT << 25)
 
#define ETH_IFCR_PTPSYNCFRMRX   (0x1UL << 19)
 
#define ETH_IFCR_PTPSYNCFRMRX_DEFAULT   (_ETH_IFCR_PTPSYNCFRMRX_DEFAULT << 19)
 
#define ETH_IFCR_PTPSYNCFRMTX   (0x1UL << 21)
 
#define ETH_IFCR_PTPSYNCFRMTX_DEFAULT   (_ETH_IFCR_PTPSYNCFRMTX_DEFAULT << 21)
 
#define ETH_IFCR_RESPNOTOK   (0x1UL << 11)
 
#define ETH_IFCR_RESPNOTOK_DEFAULT   (_ETH_IFCR_RESPNOTOK_DEFAULT << 11)
 
#define ETH_IFCR_RTRYLMTORLATECOL   (0x1UL << 5)
 
#define ETH_IFCR_RTRYLMTORLATECOL_DEFAULT   (_ETH_IFCR_RTRYLMTORLATECOL_DEFAULT << 5)
 
#define ETH_IFCR_RXCMPLT   (0x1UL << 1)
 
#define ETH_IFCR_RXCMPLT_DEFAULT   (_ETH_IFCR_RXCMPLT_DEFAULT << 1)
 
#define ETH_IFCR_RXLPIINDC   (0x1UL << 27)
 
#define ETH_IFCR_RXLPIINDC_DEFAULT   (_ETH_IFCR_RXLPIINDC_DEFAULT << 27)
 
#define ETH_IFCR_RXOVERRUN   (0x1UL << 10)
 
#define ETH_IFCR_RXOVERRUN_DEFAULT   (_ETH_IFCR_RXOVERRUN_DEFAULT << 10)
 
#define ETH_IFCR_RXUSEDBITREAD   (0x1UL << 2)
 
#define ETH_IFCR_RXUSEDBITREAD_DEFAULT   (_ETH_IFCR_RXUSEDBITREAD_DEFAULT << 2)
 
#define ETH_IFCR_TSUSECREGINCR   (0x1UL << 26)
 
#define ETH_IFCR_TSUSECREGINCR_DEFAULT   (_ETH_IFCR_TSUSECREGINCR_DEFAULT << 26)
 
#define ETH_IFCR_TSUTIMERCOMP   (0x1UL << 29)
 
#define ETH_IFCR_TSUTIMERCOMP_DEFAULT   (_ETH_IFCR_TSUTIMERCOMP_DEFAULT << 29)
 
#define ETH_IFCR_TXCMPLT   (0x1UL << 7)
 
#define ETH_IFCR_TXCMPLT_DEFAULT   (_ETH_IFCR_TXCMPLT_DEFAULT << 7)
 
#define ETH_IFCR_TXUNDERRUN   (0x1UL << 4)
 
#define ETH_IFCR_TXUNDERRUN_DEFAULT   (_ETH_IFCR_TXUNDERRUN_DEFAULT << 4)
 
#define ETH_IFCR_TXUSEDBITREAD   (0x1UL << 3)
 
#define ETH_IFCR_TXUSEDBITREAD_DEFAULT   (_ETH_IFCR_TXUSEDBITREAD_DEFAULT << 3)
 
#define ETH_IFCR_WOLEVNTRX   (0x1UL << 28)
 
#define ETH_IFCR_WOLEVNTRX_DEFAULT   (_ETH_IFCR_WOLEVNTRX_DEFAULT << 28)
 
#define ETH_IMOD_RXINTMOD_DEFAULT   (_ETH_IMOD_RXINTMOD_DEFAULT << 0)
 
#define ETH_IMOD_TXINTMOD_DEFAULT   (_ETH_IMOD_TXINTMOD_DEFAULT << 16)
 
#define ETH_JUMBOMAXLEN_JUMBOMAXLEN_DEFAULT   (_ETH_JUMBOMAXLEN_JUMBOMAXLEN_DEFAULT << 0)
 
#define ETH_LATECOLS_COUNT_DEFAULT   (_ETH_LATECOLS_COUNT_DEFAULT << 0)
 
#define ETH_MASKADD1BOTTOM_ADDRMASK_DEFAULT   (_ETH_MASKADD1BOTTOM_ADDRMASK_DEFAULT << 0)
 
#define ETH_MASKADD1TOP_ADDRMASK_DEFAULT   (_ETH_MASKADD1TOP_ADDRMASK_DEFAULT << 0)
 
#define ETH_MULTICASTRXED_COUNT_DEFAULT   (_ETH_MULTICASTRXED_COUNT_DEFAULT << 0)
 
#define ETH_MULTICASTTXED_COUNT_DEFAULT   (_ETH_MULTICASTTXED_COUNT_DEFAULT << 0)
 
#define ETH_MULTICOLS_COUNT_DEFAULT   (_ETH_MULTICOLS_COUNT_DEFAULT << 0)
 
#define ETH_NETWORKCFG_COPYALLFRAMES   (0x1UL << 4)
 
#define ETH_NETWORKCFG_COPYALLFRAMES_DEFAULT   (_ETH_NETWORKCFG_COPYALLFRAMES_DEFAULT << 4)
 
#define ETH_NETWORKCFG_DISCOPYOFPFRAMES   (0x1UL << 23)
 
#define ETH_NETWORKCFG_DISCOPYOFPFRAMES_DEFAULT   (_ETH_NETWORKCFG_DISCOPYOFPFRAMES_DEFAULT << 23)
 
#define ETH_NETWORKCFG_DISCRDNONVLANFRAMES   (0x1UL << 2)
 
#define ETH_NETWORKCFG_DISCRDNONVLANFRAMES_DEFAULT   (_ETH_NETWORKCFG_DISCRDNONVLANFRAMES_DEFAULT << 2)
 
#define ETH_NETWORKCFG_ENHALFDUPLEXRX   (0x1UL << 25)
 
#define ETH_NETWORKCFG_ENHALFDUPLEXRX_DEFAULT   (_ETH_NETWORKCFG_ENHALFDUPLEXRX_DEFAULT << 25)
 
#define ETH_NETWORKCFG_FCSREMOVE   (0x1UL << 17)
 
#define ETH_NETWORKCFG_FCSREMOVE_DEFAULT   (_ETH_NETWORKCFG_FCSREMOVE_DEFAULT << 17)
 
#define ETH_NETWORKCFG_FULLDUPLEX   (0x1UL << 1)
 
#define ETH_NETWORKCFG_FULLDUPLEX_DEFAULT   (_ETH_NETWORKCFG_FULLDUPLEX_DEFAULT << 1)
 
#define ETH_NETWORKCFG_IGNOREIPGRXER   (0x1UL << 30)
 
#define ETH_NETWORKCFG_IGNOREIPGRXER_DEFAULT   (_ETH_NETWORKCFG_IGNOREIPGRXER_DEFAULT << 30)
 
#define ETH_NETWORKCFG_IGNORERXFCS   (0x1UL << 26)
 
#define ETH_NETWORKCFG_IGNORERXFCS_DEFAULT   (_ETH_NETWORKCFG_IGNORERXFCS_DEFAULT << 26)
 
#define ETH_NETWORKCFG_IPGSTRTCHEN   (0x1UL << 28)
 
#define ETH_NETWORKCFG_IPGSTRTCHEN_DEFAULT   (_ETH_NETWORKCFG_IPGSTRTCHEN_DEFAULT << 28)
 
#define ETH_NETWORKCFG_JUMBOFRAMES   (0x1UL << 3)
 
#define ETH_NETWORKCFG_JUMBOFRAMES_DEFAULT   (_ETH_NETWORKCFG_JUMBOFRAMES_DEFAULT << 3)
 
#define ETH_NETWORKCFG_LENFIELDERRFRMDISCRD   (0x1UL << 16)
 
#define ETH_NETWORKCFG_LENFIELDERRFRMDISCRD_DEFAULT   (_ETH_NETWORKCFG_LENFIELDERRFRMDISCRD_DEFAULT << 16)
 
#define ETH_NETWORKCFG_MDCCLKDIV_DEFAULT   (_ETH_NETWORKCFG_MDCCLKDIV_DEFAULT << 18)
 
#define ETH_NETWORKCFG_MDCCLKDIV_DIVBY128   (_ETH_NETWORKCFG_MDCCLKDIV_DIVBY128 << 18)
 
#define ETH_NETWORKCFG_MDCCLKDIV_DIVBY16   (_ETH_NETWORKCFG_MDCCLKDIV_DIVBY16 << 18)
 
#define ETH_NETWORKCFG_MDCCLKDIV_DIVBY224   (_ETH_NETWORKCFG_MDCCLKDIV_DIVBY224 << 18)
 
#define ETH_NETWORKCFG_MDCCLKDIV_DIVBY32   (_ETH_NETWORKCFG_MDCCLKDIV_DIVBY32 << 18)
 
#define ETH_NETWORKCFG_MDCCLKDIV_DIVBY48   (_ETH_NETWORKCFG_MDCCLKDIV_DIVBY48 << 18)
 
#define ETH_NETWORKCFG_MDCCLKDIV_DIVBY64   (_ETH_NETWORKCFG_MDCCLKDIV_DIVBY64 << 18)
 
#define ETH_NETWORKCFG_MDCCLKDIV_DIVBY8   (_ETH_NETWORKCFG_MDCCLKDIV_DIVBY8 << 18)
 
#define ETH_NETWORKCFG_MDCCLKDIV_DIVBY96   (_ETH_NETWORKCFG_MDCCLKDIV_DIVBY96 << 18)
 
#define ETH_NETWORKCFG_MULTICASTHASHEN   (0x1UL << 6)
 
#define ETH_NETWORKCFG_MULTICASTHASHEN_DEFAULT   (_ETH_NETWORKCFG_MULTICASTHASHEN_DEFAULT << 6)
 
#define ETH_NETWORKCFG_NOBROADCAST   (0x1UL << 5)
 
#define ETH_NETWORKCFG_NOBROADCAST_DEFAULT   (_ETH_NETWORKCFG_NOBROADCAST_DEFAULT << 5)
 
#define ETH_NETWORKCFG_NSPCHANGE   (0x1UL << 29)
 
#define ETH_NETWORKCFG_NSPCHANGE_DEFAULT   (_ETH_NETWORKCFG_NSPCHANGE_DEFAULT << 29)
 
#define ETH_NETWORKCFG_PAUSEEN   (0x1UL << 13)
 
#define ETH_NETWORKCFG_PAUSEEN_DEFAULT   (_ETH_NETWORKCFG_PAUSEEN_DEFAULT << 13)
 
#define ETH_NETWORKCFG_RETRYTEST   (0x1UL << 12)
 
#define ETH_NETWORKCFG_RETRYTEST_DEFAULT   (_ETH_NETWORKCFG_RETRYTEST_DEFAULT << 12)
 
#define ETH_NETWORKCFG_RX1536BYTEFRAMES   (0x1UL << 8)
 
#define ETH_NETWORKCFG_RX1536BYTEFRAMES_DEFAULT   (_ETH_NETWORKCFG_RX1536BYTEFRAMES_DEFAULT << 8)
 
#define ETH_NETWORKCFG_RXBUFFOFFSET_DEFAULT   (_ETH_NETWORKCFG_RXBUFFOFFSET_DEFAULT << 14)
 
#define ETH_NETWORKCFG_RXCHKSUMOFFLOADEN   (0x1UL << 24)
 
#define ETH_NETWORKCFG_RXCHKSUMOFFLOADEN_DEFAULT   (_ETH_NETWORKCFG_RXCHKSUMOFFLOADEN_DEFAULT << 24)
 
#define ETH_NETWORKCFG_SPEED   (0x1UL << 0)
 
#define ETH_NETWORKCFG_SPEED_DEFAULT   (_ETH_NETWORKCFG_SPEED_DEFAULT << 0)
 
#define ETH_NETWORKCFG_UNICASTHASHEN   (0x1UL << 7)
 
#define ETH_NETWORKCFG_UNICASTHASHEN_DEFAULT   (_ETH_NETWORKCFG_UNICASTHASHEN_DEFAULT << 7)
 
#define ETH_NETWORKCTRL_BACKPRESSURE   (0x1UL << 8)
 
#define ETH_NETWORKCTRL_BACKPRESSURE_DEFAULT   (_ETH_NETWORKCTRL_BACKPRESSURE_DEFAULT << 8)
 
#define ETH_NETWORKCTRL_CLRALLSTATSREGS   (0x1UL << 5)
 
#define ETH_NETWORKCTRL_CLRALLSTATSREGS_DEFAULT   (_ETH_NETWORKCTRL_CLRALLSTATSREGS_DEFAULT << 5)
 
#define ETH_NETWORKCTRL_ENBRX   (0x1UL << 2)
 
#define ETH_NETWORKCTRL_ENBRX_DEFAULT   (_ETH_NETWORKCTRL_ENBRX_DEFAULT << 2)
 
#define ETH_NETWORKCTRL_ENBTX   (0x1UL << 3)
 
#define ETH_NETWORKCTRL_ENBTX_DEFAULT   (_ETH_NETWORKCTRL_ENBTX_DEFAULT << 3)
 
#define ETH_NETWORKCTRL_FLUSHRXPKT   (0x1UL << 18)
 
#define ETH_NETWORKCTRL_FLUSHRXPKT_DEFAULT   (_ETH_NETWORKCTRL_FLUSHRXPKT_DEFAULT << 18)
 
#define ETH_NETWORKCTRL_INCALLSTATSREGS   (0x1UL << 6)
 
#define ETH_NETWORKCTRL_INCALLSTATSREGS_DEFAULT   (_ETH_NETWORKCTRL_INCALLSTATSREGS_DEFAULT << 6)
 
#define ETH_NETWORKCTRL_LOOPBACKLOCAL   (0x1UL << 1)
 
#define ETH_NETWORKCTRL_LOOPBACKLOCAL_DEFAULT   (_ETH_NETWORKCTRL_LOOPBACKLOCAL_DEFAULT << 1)
 
#define ETH_NETWORKCTRL_MANPORTEN   (0x1UL << 4)
 
#define ETH_NETWORKCTRL_MANPORTEN_DEFAULT   (_ETH_NETWORKCTRL_MANPORTEN_DEFAULT << 4)
 
#define ETH_NETWORKCTRL_ONESTEPSYNCMODE   (0x1UL << 24)
 
#define ETH_NETWORKCTRL_ONESTEPSYNCMODE_DEFAULT   (_ETH_NETWORKCTRL_ONESTEPSYNCMODE_DEFAULT << 24)
 
#define ETH_NETWORKCTRL_PFCCTRL   (0x1UL << 25)
 
#define ETH_NETWORKCTRL_PFCCTRL_DEFAULT   (_ETH_NETWORKCTRL_PFCCTRL_DEFAULT << 25)
 
#define ETH_NETWORKCTRL_PFCENB   (0x1UL << 16)
 
#define ETH_NETWORKCTRL_PFCENB_DEFAULT   (_ETH_NETWORKCTRL_PFCENB_DEFAULT << 16)
 
#define ETH_NETWORKCTRL_PTPUNICASTEN   (0x1UL << 20)
 
#define ETH_NETWORKCTRL_PTPUNICASTEN_DEFAULT   (_ETH_NETWORKCTRL_PTPUNICASTEN_DEFAULT << 20)
 
#define ETH_NETWORKCTRL_STATSWREN   (0x1UL << 7)
 
#define ETH_NETWORKCTRL_STATSWREN_DEFAULT   (_ETH_NETWORKCTRL_STATSWREN_DEFAULT << 7)
 
#define ETH_NETWORKCTRL_STORERXTS   (0x1UL << 15)
 
#define ETH_NETWORKCTRL_STORERXTS_DEFAULT   (_ETH_NETWORKCTRL_STORERXTS_DEFAULT << 15)
 
#define ETH_NETWORKCTRL_STOREUDPOFFSET   (0x1UL << 22)
 
#define ETH_NETWORKCTRL_STOREUDPOFFSET_DEFAULT   (_ETH_NETWORKCTRL_STOREUDPOFFSET_DEFAULT << 22)
 
#define ETH_NETWORKCTRL_TXHALT   (0x1UL << 10)
 
#define ETH_NETWORKCTRL_TXHALT_DEFAULT   (_ETH_NETWORKCTRL_TXHALT_DEFAULT << 10)
 
#define ETH_NETWORKCTRL_TXLPIEN   (0x1UL << 19)
 
#define ETH_NETWORKCTRL_TXLPIEN_DEFAULT   (_ETH_NETWORKCTRL_TXLPIEN_DEFAULT << 19)
 
#define ETH_NETWORKCTRL_TXPFCPRIORPFRM   (0x1UL << 17)
 
#define ETH_NETWORKCTRL_TXPFCPRIORPFRM_DEFAULT   (_ETH_NETWORKCTRL_TXPFCPRIORPFRM_DEFAULT << 17)
 
#define ETH_NETWORKCTRL_TXPFRMREQ   (0x1UL << 11)
 
#define ETH_NETWORKCTRL_TXPFRMREQ_DEFAULT   (_ETH_NETWORKCTRL_TXPFRMREQ_DEFAULT << 11)
 
#define ETH_NETWORKCTRL_TXPFRMZERO   (0x1UL << 12)
 
#define ETH_NETWORKCTRL_TXPFRMZERO_DEFAULT   (_ETH_NETWORKCTRL_TXPFRMZERO_DEFAULT << 12)
 
#define ETH_NETWORKCTRL_TXSTRT   (0x1UL << 9)
 
#define ETH_NETWORKCTRL_TXSTRT_DEFAULT   (_ETH_NETWORKCTRL_TXSTRT_DEFAULT << 9)
 
#define ETH_NETWORKSTATUS_LPIINDICATE   (0x1UL << 7)
 
#define ETH_NETWORKSTATUS_LPIINDICATE_DEFAULT   (_ETH_NETWORKSTATUS_LPIINDICATE_DEFAULT << 7)
 
#define ETH_NETWORKSTATUS_MANDONE   (0x1UL << 2)
 
#define ETH_NETWORKSTATUS_MANDONE_DEFAULT   (_ETH_NETWORKSTATUS_MANDONE_DEFAULT << 2)
 
#define ETH_NETWORKSTATUS_MDIOIN   (0x1UL << 1)
 
#define ETH_NETWORKSTATUS_MDIOIN_DEFAULT   (_ETH_NETWORKSTATUS_MDIOIN_DEFAULT << 1)
 
#define ETH_NETWORKSTATUS_PFCNEGOTIATE   (0x1UL << 6)
 
#define ETH_NETWORKSTATUS_PFCNEGOTIATE_DEFAULT   (_ETH_NETWORKSTATUS_PFCNEGOTIATE_DEFAULT << 6)
 
#define ETH_OCTETSRXEDBOTTOM_COUNT_DEFAULT   (_ETH_OCTETSRXEDBOTTOM_COUNT_DEFAULT << 0)
 
#define ETH_OCTETSRXEDTOP_COUNT_DEFAULT   (_ETH_OCTETSRXEDTOP_COUNT_DEFAULT << 0)
 
#define ETH_OCTETSTXEDBOTTOM_COUNT_DEFAULT   (_ETH_OCTETSTXEDBOTTOM_COUNT_DEFAULT << 0)
 
#define ETH_OCTETSTXEDTOP_COUNT_DEFAULT   (_ETH_OCTETSTXEDTOP_COUNT_DEFAULT << 0)
 
#define ETH_PBUFRXCUTTHRU_DMARXCUTTHRU   (0x1UL << 31)
 
#define ETH_PBUFRXCUTTHRU_DMARXCUTTHRU_DEFAULT   (_ETH_PBUFRXCUTTHRU_DMARXCUTTHRU_DEFAULT << 31)
 
#define ETH_PBUFRXCUTTHRU_DMARXCUTTHRUTHR_DEFAULT   (_ETH_PBUFRXCUTTHRU_DMARXCUTTHRUTHR_DEFAULT << 0)
 
#define ETH_PBUFTXCUTTHRU_DMATXCUTTHRU   (0x1UL << 31)
 
#define ETH_PBUFTXCUTTHRU_DMATXCUTTHRU_DEFAULT   (_ETH_PBUFTXCUTTHRU_DMATXCUTTHRU_DEFAULT << 31)
 
#define ETH_PBUFTXCUTTHRU_DMATXCUTTHRUTHR_DEFAULT   (_ETH_PBUFTXCUTTHRU_DMATXCUTTHRUTHR_DEFAULT << 0)
 
#define ETH_PFRAMESRXED_COUNT_DEFAULT   (_ETH_PFRAMESRXED_COUNT_DEFAULT << 0)
 
#define ETH_PFRAMESTXED_COUNT_DEFAULT   (_ETH_PFRAMESTXED_COUNT_DEFAULT << 0)
 
#define ETH_PHYMNGMNT_OPERATION_DEFAULT   (_ETH_PHYMNGMNT_OPERATION_DEFAULT << 28)
 
#define ETH_PHYMNGMNT_PHYADDR_DEFAULT   (_ETH_PHYMNGMNT_PHYADDR_DEFAULT << 23)
 
#define ETH_PHYMNGMNT_PHYRWDATA_DEFAULT   (_ETH_PHYMNGMNT_PHYRWDATA_DEFAULT << 0)
 
#define ETH_PHYMNGMNT_REGADDR_DEFAULT   (_ETH_PHYMNGMNT_REGADDR_DEFAULT << 18)
 
#define ETH_PHYMNGMNT_WRITE0   (0x1UL << 31)
 
#define ETH_PHYMNGMNT_WRITE0_DEFAULT   (_ETH_PHYMNGMNT_WRITE0_DEFAULT << 31)
 
#define ETH_PHYMNGMNT_WRITE1   (0x1UL << 30)
 
#define ETH_PHYMNGMNT_WRITE10_DEFAULT   (_ETH_PHYMNGMNT_WRITE10_DEFAULT << 16)
 
#define ETH_PHYMNGMNT_WRITE1_DEFAULT   (_ETH_PHYMNGMNT_WRITE1_DEFAULT << 30)
 
#define ETH_ROUTELOC0_MIICOLLOC_DEFAULT   (_ETH_ROUTELOC0_MIICOLLOC_DEFAULT << 24)
 
#define ETH_ROUTELOC0_MIICOLLOC_LOC0   (_ETH_ROUTELOC0_MIICOLLOC_LOC0 << 24)
 
#define ETH_ROUTELOC0_MIICOLLOC_LOC1   (_ETH_ROUTELOC0_MIICOLLOC_LOC1 << 24)
 
#define ETH_ROUTELOC0_MIICOLLOC_LOC2   (_ETH_ROUTELOC0_MIICOLLOC_LOC2 << 24)
 
#define ETH_ROUTELOC0_MIICRSLOC_DEFAULT   (_ETH_ROUTELOC0_MIICRSLOC_DEFAULT << 16)
 
#define ETH_ROUTELOC0_MIICRSLOC_LOC0   (_ETH_ROUTELOC0_MIICRSLOC_LOC0 << 16)
 
#define ETH_ROUTELOC0_MIICRSLOC_LOC1   (_ETH_ROUTELOC0_MIICRSLOC_LOC1 << 16)
 
#define ETH_ROUTELOC0_MIICRSLOC_LOC2   (_ETH_ROUTELOC0_MIICRSLOC_LOC2 << 16)
 
#define ETH_ROUTELOC0_MIIRXLOC_DEFAULT   (_ETH_ROUTELOC0_MIIRXLOC_DEFAULT << 8)
 
#define ETH_ROUTELOC0_MIIRXLOC_LOC0   (_ETH_ROUTELOC0_MIIRXLOC_LOC0 << 8)
 
#define ETH_ROUTELOC0_MIIRXLOC_LOC1   (_ETH_ROUTELOC0_MIIRXLOC_LOC1 << 8)
 
#define ETH_ROUTELOC0_MIIRXLOC_LOC2   (_ETH_ROUTELOC0_MIIRXLOC_LOC2 << 8)
 
#define ETH_ROUTELOC0_MIITXLOC_DEFAULT   (_ETH_ROUTELOC0_MIITXLOC_DEFAULT << 0)
 
#define ETH_ROUTELOC0_MIITXLOC_LOC0   (_ETH_ROUTELOC0_MIITXLOC_LOC0 << 0)
 
#define ETH_ROUTELOC0_MIITXLOC_LOC1   (_ETH_ROUTELOC0_MIITXLOC_LOC1 << 0)
 
#define ETH_ROUTELOC1_MDIOLOC_DEFAULT   (_ETH_ROUTELOC1_MDIOLOC_DEFAULT << 16)
 
#define ETH_ROUTELOC1_MDIOLOC_LOC0   (_ETH_ROUTELOC1_MDIOLOC_LOC0 << 16)
 
#define ETH_ROUTELOC1_MDIOLOC_LOC1   (_ETH_ROUTELOC1_MDIOLOC_LOC1 << 16)
 
#define ETH_ROUTELOC1_MDIOLOC_LOC2   (_ETH_ROUTELOC1_MDIOLOC_LOC2 << 16)
 
#define ETH_ROUTELOC1_MDIOLOC_LOC3   (_ETH_ROUTELOC1_MDIOLOC_LOC3 << 16)
 
#define ETH_ROUTELOC1_RMIILOC_DEFAULT   (_ETH_ROUTELOC1_RMIILOC_DEFAULT << 24)
 
#define ETH_ROUTELOC1_RMIILOC_LOC0   (_ETH_ROUTELOC1_RMIILOC_LOC0 << 24)
 
#define ETH_ROUTELOC1_RMIILOC_LOC1   (_ETH_ROUTELOC1_RMIILOC_LOC1 << 24)
 
#define ETH_ROUTELOC1_TSUEXTCLKLOC_DEFAULT   (_ETH_ROUTELOC1_TSUEXTCLKLOC_DEFAULT << 0)
 
#define ETH_ROUTELOC1_TSUEXTCLKLOC_LOC0   (_ETH_ROUTELOC1_TSUEXTCLKLOC_LOC0 << 0)
 
#define ETH_ROUTELOC1_TSUEXTCLKLOC_LOC1   (_ETH_ROUTELOC1_TSUEXTCLKLOC_LOC1 << 0)
 
#define ETH_ROUTELOC1_TSUEXTCLKLOC_LOC2   (_ETH_ROUTELOC1_TSUEXTCLKLOC_LOC2 << 0)
 
#define ETH_ROUTELOC1_TSUEXTCLKLOC_LOC3   (_ETH_ROUTELOC1_TSUEXTCLKLOC_LOC3 << 0)
 
#define ETH_ROUTELOC1_TSUTMRTOGLOC_DEFAULT   (_ETH_ROUTELOC1_TSUTMRTOGLOC_DEFAULT << 8)
 
#define ETH_ROUTELOC1_TSUTMRTOGLOC_LOC0   (_ETH_ROUTELOC1_TSUTMRTOGLOC_LOC0 << 8)
 
#define ETH_ROUTELOC1_TSUTMRTOGLOC_LOC1   (_ETH_ROUTELOC1_TSUTMRTOGLOC_LOC1 << 8)
 
#define ETH_ROUTELOC1_TSUTMRTOGLOC_LOC2   (_ETH_ROUTELOC1_TSUTMRTOGLOC_LOC2 << 8)
 
#define ETH_ROUTELOC1_TSUTMRTOGLOC_LOC3   (_ETH_ROUTELOC1_TSUTMRTOGLOC_LOC3 << 8)
 
#define ETH_ROUTEPEN_MDIOPEN   (0x1UL << 0)
 
#define ETH_ROUTEPEN_MDIOPEN_DEFAULT   (_ETH_ROUTEPEN_MDIOPEN_DEFAULT << 0)
 
#define ETH_ROUTEPEN_MDIOPEN_DISABLE   (_ETH_ROUTEPEN_MDIOPEN_DISABLE << 0)
 
#define ETH_ROUTEPEN_MDIOPEN_ENABLE   (_ETH_ROUTEPEN_MDIOPEN_ENABLE << 0)
 
#define ETH_ROUTEPEN_MIIPEN   (0x1UL << 3)
 
#define ETH_ROUTEPEN_MIIPEN_DEFAULT   (_ETH_ROUTEPEN_MIIPEN_DEFAULT << 3)
 
#define ETH_ROUTEPEN_MIIPEN_DISABLE   (_ETH_ROUTEPEN_MIIPEN_DISABLE << 3)
 
#define ETH_ROUTEPEN_MIIPEN_ENABLE   (_ETH_ROUTEPEN_MIIPEN_ENABLE << 3)
 
#define ETH_ROUTEPEN_MIIRXERPEN   (0x1UL << 2)
 
#define ETH_ROUTEPEN_MIIRXERPEN_DEFAULT   (_ETH_ROUTEPEN_MIIRXERPEN_DEFAULT << 2)
 
#define ETH_ROUTEPEN_MIIRXERPEN_DISABLE   (_ETH_ROUTEPEN_MIIRXERPEN_DISABLE << 2)
 
#define ETH_ROUTEPEN_MIIRXERPEN_ENABLE   (_ETH_ROUTEPEN_MIIRXERPEN_ENABLE << 2)
 
#define ETH_ROUTEPEN_MIITXERPEN   (0x1UL << 1)
 
#define ETH_ROUTEPEN_MIITXERPEN_DEFAULT   (_ETH_ROUTEPEN_MIITXERPEN_DEFAULT << 1)
 
#define ETH_ROUTEPEN_MIITXERPEN_DISABLE   (_ETH_ROUTEPEN_MIITXERPEN_DISABLE << 1)
 
#define ETH_ROUTEPEN_MIITXERPEN_ENABLE   (_ETH_ROUTEPEN_MIITXERPEN_ENABLE << 1)
 
#define ETH_ROUTEPEN_RMIIPEN   (0x1UL << 4)
 
#define ETH_ROUTEPEN_RMIIPEN_DEFAULT   (_ETH_ROUTEPEN_RMIIPEN_DEFAULT << 4)
 
#define ETH_ROUTEPEN_RMIIPEN_DISABLE   (_ETH_ROUTEPEN_RMIIPEN_DISABLE << 4)
 
#define ETH_ROUTEPEN_RMIIPEN_ENABLE   (_ETH_ROUTEPEN_RMIIPEN_ENABLE << 4)
 
#define ETH_ROUTEPEN_TSUTMRTOGPEN   (0x1UL << 5)
 
#define ETH_ROUTEPEN_TSUTMRTOGPEN_DEFAULT   (_ETH_ROUTEPEN_TSUTMRTOGPEN_DEFAULT << 5)
 
#define ETH_ROUTEPEN_TSUTMRTOGPEN_DISABLE   (_ETH_ROUTEPEN_TSUTMRTOGPEN_DISABLE << 5)
 
#define ETH_ROUTEPEN_TSUTMRTOGPEN_ENABLE   (_ETH_ROUTEPEN_TSUTMRTOGPEN_ENABLE << 5)
 
#define ETH_RXBDCTRL_RXBDTSMODE_DEFAULT   (_ETH_RXBDCTRL_RXBDTSMODE_DEFAULT << 4)
 
#define ETH_RXIPCKERRS_COUNT_DEFAULT   (_ETH_RXIPCKERRS_COUNT_DEFAULT << 0)
 
#define ETH_RXJABBERS_COUNT_DEFAULT   (_ETH_RXJABBERS_COUNT_DEFAULT << 0)
 
#define ETH_RXLENERRS_COUNT_DEFAULT   (_ETH_RXLENERRS_COUNT_DEFAULT << 0)
 
#define ETH_RXLPI_COUNT_DEFAULT   (_ETH_RXLPI_COUNT_DEFAULT << 0)
 
#define ETH_RXLPITIME_LPITIME_DEFAULT   (_ETH_RXLPITIME_LPITIME_DEFAULT << 0)
 
#define ETH_RXOVERRUNS_COUNT_DEFAULT   (_ETH_RXOVERRUNS_COUNT_DEFAULT << 0)
 
#define ETH_RXPAUSEQUANT_QUANT_DEFAULT   (_ETH_RXPAUSEQUANT_QUANT_DEFAULT << 0)
 
#define ETH_RXPTPUNICAST_ADDR_DEFAULT   (_ETH_RXPTPUNICAST_ADDR_DEFAULT << 0)
 
#define ETH_RXQPTR_DMARXQPTR_DEFAULT   (_ETH_RXQPTR_DMARXQPTR_DEFAULT << 2)
 
#define ETH_RXRESOURCEERRS_COUNT_DEFAULT   (_ETH_RXRESOURCEERRS_COUNT_DEFAULT << 0)
 
#define ETH_RXSTATUS_BUFFNOTAVAIL   (0x1UL << 0)
 
#define ETH_RXSTATUS_BUFFNOTAVAIL_DEFAULT   (_ETH_RXSTATUS_BUFFNOTAVAIL_DEFAULT << 0)
 
#define ETH_RXSTATUS_FRMRX   (0x1UL << 1)
 
#define ETH_RXSTATUS_FRMRX_DEFAULT   (_ETH_RXSTATUS_FRMRX_DEFAULT << 1)
 
#define ETH_RXSTATUS_RESPNOTOK   (0x1UL << 3)
 
#define ETH_RXSTATUS_RESPNOTOK_DEFAULT   (_ETH_RXSTATUS_RESPNOTOK_DEFAULT << 3)
 
#define ETH_RXSTATUS_RXOVERRUN   (0x1UL << 2)
 
#define ETH_RXSTATUS_RXOVERRUN_DEFAULT   (_ETH_RXSTATUS_RXOVERRUN_DEFAULT << 2)
 
#define ETH_RXSYMBOLERRS_COUNT_DEFAULT   (_ETH_RXSYMBOLERRS_COUNT_DEFAULT << 0)
 
#define ETH_RXTCPCKERRS_COUNT_DEFAULT   (_ETH_RXTCPCKERRS_COUNT_DEFAULT << 0)
 
#define ETH_RXUDPCKERRS_COUNT_DEFAULT   (_ETH_RXUDPCKERRS_COUNT_DEFAULT << 0)
 
#define ETH_SINGLECOLS_COUNT_DEFAULT   (_ETH_SINGLECOLS_COUNT_DEFAULT << 0)
 
#define ETH_SPECADDR1BOTTOM_ADDR_DEFAULT   (_ETH_SPECADDR1BOTTOM_ADDR_DEFAULT << 0)
 
#define ETH_SPECADDR1TOP_ADDR_DEFAULT   (_ETH_SPECADDR1TOP_ADDR_DEFAULT << 0)
 
#define ETH_SPECADDR1TOP_FILTERTYPE   (0x1UL << 16)
 
#define ETH_SPECADDR1TOP_FILTERTYPE_DA   (_ETH_SPECADDR1TOP_FILTERTYPE_DA << 16)
 
#define ETH_SPECADDR1TOP_FILTERTYPE_DEFAULT   (_ETH_SPECADDR1TOP_FILTERTYPE_DEFAULT << 16)
 
#define ETH_SPECADDR1TOP_FILTERTYPE_SA   (_ETH_SPECADDR1TOP_FILTERTYPE_SA << 16)
 
#define ETH_SPECADDR2BOTTOM_ADDR_DEFAULT   (_ETH_SPECADDR2BOTTOM_ADDR_DEFAULT << 0)
 
#define ETH_SPECADDR2TOP_ADDR_DEFAULT   (_ETH_SPECADDR2TOP_ADDR_DEFAULT << 0)
 
#define ETH_SPECADDR2TOP_FILTERBYTEMASK_DEFAULT   (_ETH_SPECADDR2TOP_FILTERBYTEMASK_DEFAULT << 24)
 
#define ETH_SPECADDR2TOP_FILTERTYPE   (0x1UL << 16)
 
#define ETH_SPECADDR2TOP_FILTERTYPE_DA   (_ETH_SPECADDR2TOP_FILTERTYPE_DA << 16)
 
#define ETH_SPECADDR2TOP_FILTERTYPE_DEFAULT   (_ETH_SPECADDR2TOP_FILTERTYPE_DEFAULT << 16)
 
#define ETH_SPECADDR2TOP_FILTERTYPE_SA   (_ETH_SPECADDR2TOP_FILTERTYPE_SA << 16)
 
#define ETH_SPECADDR3BOTTOM_ADDR_DEFAULT   (_ETH_SPECADDR3BOTTOM_ADDR_DEFAULT << 0)
 
#define ETH_SPECADDR3TOP_ADDR_DEFAULT   (_ETH_SPECADDR3TOP_ADDR_DEFAULT << 0)
 
#define ETH_SPECADDR3TOP_FILTERBYTEMASK_DEFAULT   (_ETH_SPECADDR3TOP_FILTERBYTEMASK_DEFAULT << 24)
 
#define ETH_SPECADDR3TOP_FILTERTYPE   (0x1UL << 16)
 
#define ETH_SPECADDR3TOP_FILTERTYPE_DA   (_ETH_SPECADDR3TOP_FILTERTYPE_DA << 16)
 
#define ETH_SPECADDR3TOP_FILTERTYPE_DEFAULT   (_ETH_SPECADDR3TOP_FILTERTYPE_DEFAULT << 16)
 
#define ETH_SPECADDR3TOP_FILTERTYPE_SA   (_ETH_SPECADDR3TOP_FILTERTYPE_SA << 16)
 
#define ETH_SPECADDR4BOTTOM_ADDR_DEFAULT   (_ETH_SPECADDR4BOTTOM_ADDR_DEFAULT << 0)
 
#define ETH_SPECADDR4TOP_ADDR_DEFAULT   (_ETH_SPECADDR4TOP_ADDR_DEFAULT << 0)
 
#define ETH_SPECADDR4TOP_FILTERBYTEMASK_DEFAULT   (_ETH_SPECADDR4TOP_FILTERBYTEMASK_DEFAULT << 24)
 
#define ETH_SPECADDR4TOP_FILTERTYPE   (0x1UL << 16)
 
#define ETH_SPECADDR4TOP_FILTERTYPE_DA   (_ETH_SPECADDR4TOP_FILTERTYPE_DA << 16)
 
#define ETH_SPECADDR4TOP_FILTERTYPE_DEFAULT   (_ETH_SPECADDR4TOP_FILTERTYPE_DEFAULT << 16)
 
#define ETH_SPECADDR4TOP_FILTERTYPE_SA   (_ETH_SPECADDR4TOP_FILTERTYPE_SA << 16)
 
#define ETH_SPECTYPE1_ENBCOPY   (0x1UL << 31)
 
#define ETH_SPECTYPE1_ENBCOPY_DEFAULT   (_ETH_SPECTYPE1_ENBCOPY_DEFAULT << 31)
 
#define ETH_SPECTYPE1_MATCH_DEFAULT   (_ETH_SPECTYPE1_MATCH_DEFAULT << 0)
 
#define ETH_SPECTYPE2_ENBCOPY   (0x1UL << 31)
 
#define ETH_SPECTYPE2_ENBCOPY_DEFAULT   (_ETH_SPECTYPE2_ENBCOPY_DEFAULT << 31)
 
#define ETH_SPECTYPE2_MATCH_DEFAULT   (_ETH_SPECTYPE2_MATCH_DEFAULT << 0)
 
#define ETH_SPECTYPE3_ENBCOPY   (0x1UL << 31)
 
#define ETH_SPECTYPE3_ENBCOPY_DEFAULT   (_ETH_SPECTYPE3_ENBCOPY_DEFAULT << 31)
 
#define ETH_SPECTYPE3_MATCH_DEFAULT   (_ETH_SPECTYPE3_MATCH_DEFAULT << 0)
 
#define ETH_SPECTYPE4_ENBCOPY   (0x1UL << 31)
 
#define ETH_SPECTYPE4_ENBCOPY_DEFAULT   (_ETH_SPECTYPE4_ENBCOPY_DEFAULT << 31)
 
#define ETH_SPECTYPE4_MATCH_DEFAULT   (_ETH_SPECTYPE4_MATCH_DEFAULT << 0)
 
#define ETH_STACKEDVLAN_ENBPROCESSING   (0x1UL << 31)
 
#define ETH_STACKEDVLAN_ENBPROCESSING_DEFAULT   (_ETH_STACKEDVLAN_ENBPROCESSING_DEFAULT << 31)
 
#define ETH_STACKEDVLAN_MATCH_DEFAULT   (_ETH_STACKEDVLAN_MATCH_DEFAULT << 0)
 
#define ETH_STRETCHRATIO_IPGSTRETCH_DEFAULT   (_ETH_STRETCHRATIO_IPGSTRETCH_DEFAULT << 0)
 
#define ETH_SYSWAKETIME_SYSWAKETIME_DEFAULT   (_ETH_SYSWAKETIME_SYSWAKETIME_DEFAULT << 0)
 
#define ETH_TSUMSBSECCMP_COMPVAL_DEFAULT   (_ETH_TSUMSBSECCMP_COMPVAL_DEFAULT << 0)
 
#define ETH_TSUNSECCMP_COMPVAL_DEFAULT   (_ETH_TSUNSECCMP_COMPVAL_DEFAULT << 0)
 
#define ETH_TSUPEERRXMSBSEC_TIMERSEC_DEFAULT   (_ETH_TSUPEERRXMSBSEC_TIMERSEC_DEFAULT << 0)
 
#define ETH_TSUPEERRXNSEC_TIMER_DEFAULT   (_ETH_TSUPEERRXNSEC_TIMER_DEFAULT << 0)
 
#define ETH_TSUPEERRXSEC_TIMER_DEFAULT   (_ETH_TSUPEERRXSEC_TIMER_DEFAULT << 0)
 
#define ETH_TSUPEERTXMSBSEC_TIMERSEC_DEFAULT   (_ETH_TSUPEERTXMSBSEC_TIMERSEC_DEFAULT << 0)
 
#define ETH_TSUPEERTXNSEC_TIMER_DEFAULT   (_ETH_TSUPEERTXNSEC_TIMER_DEFAULT << 0)
 
#define ETH_TSUPEERTXSEC_TIMER_DEFAULT   (_ETH_TSUPEERTXSEC_TIMER_DEFAULT << 0)
 
#define ETH_TSUPTPRXMSBSEC_TIMERSEC_DEFAULT   (_ETH_TSUPTPRXMSBSEC_TIMERSEC_DEFAULT << 0)
 
#define ETH_TSUPTPRXNSEC_TIMER_DEFAULT   (_ETH_TSUPTPRXNSEC_TIMER_DEFAULT << 0)
 
#define ETH_TSUPTPRXSEC_TIMER_DEFAULT   (_ETH_TSUPTPRXSEC_TIMER_DEFAULT << 0)
 
#define ETH_TSUPTPTXMSBSEC_TIMERSEC_DEFAULT   (_ETH_TSUPTPTXMSBSEC_TIMERSEC_DEFAULT << 0)
 
#define ETH_TSUPTPTXNSEC_TIMER_DEFAULT   (_ETH_TSUPTPTXNSEC_TIMER_DEFAULT << 0)
 
#define ETH_TSUPTPTXSEC_TIMER_DEFAULT   (_ETH_TSUPTPTXSEC_TIMER_DEFAULT << 0)
 
#define ETH_TSUSECCMP_COMPVAL_DEFAULT   (_ETH_TSUSECCMP_COMPVAL_DEFAULT << 0)
 
#define ETH_TSUTIMERADJUST_ADDSUBTRACT   (0x1UL << 31)
 
#define ETH_TSUTIMERADJUST_ADDSUBTRACT_DEFAULT   (_ETH_TSUTIMERADJUST_ADDSUBTRACT_DEFAULT << 31)
 
#define ETH_TSUTIMERADJUST_INCREMENTVAL_DEFAULT   (_ETH_TSUTIMERADJUST_INCREMENTVAL_DEFAULT << 0)
 
#define ETH_TSUTIMERINCR_ALTNSINCR_DEFAULT   (_ETH_TSUTIMERINCR_ALTNSINCR_DEFAULT << 8)
 
#define ETH_TSUTIMERINCR_NSINCREMENT_DEFAULT   (_ETH_TSUTIMERINCR_NSINCREMENT_DEFAULT << 0)
 
#define ETH_TSUTIMERINCR_NUMINCS_DEFAULT   (_ETH_TSUTIMERINCR_NUMINCS_DEFAULT << 16)
 
#define ETH_TSUTIMERINCRSUBNSEC_SUBNSINCR_DEFAULT   (_ETH_TSUTIMERINCRSUBNSEC_SUBNSINCR_DEFAULT << 0)
 
#define ETH_TSUTIMERINCRSUBNSEC_SUBNSINCRLSB_DEFAULT   (_ETH_TSUTIMERINCRSUBNSEC_SUBNSINCRLSB_DEFAULT << 24)
 
#define ETH_TSUTIMERMSBSEC_TIMER_DEFAULT   (_ETH_TSUTIMERMSBSEC_TIMER_DEFAULT << 0)
 
#define ETH_TSUTIMERNSEC_TIMER_DEFAULT   (_ETH_TSUTIMERNSEC_TIMER_DEFAULT << 0)
 
#define ETH_TSUTIMERSEC_TIMER_DEFAULT   (_ETH_TSUTIMERSEC_TIMER_DEFAULT << 0)
 
#define ETH_TXBDCTRL_TXBDTSMODE_DEFAULT   (_ETH_TXBDCTRL_TXBDTSMODE_DEFAULT << 4)
 
#define ETH_TXLPI_COUNT_DEFAULT   (_ETH_TXLPI_COUNT_DEFAULT << 0)
 
#define ETH_TXLPITIME_LPITIME_DEFAULT   (_ETH_TXLPITIME_LPITIME_DEFAULT << 0)
 
#define ETH_TXPAUSEQUANT1_QUANTP2_DEFAULT   (_ETH_TXPAUSEQUANT1_QUANTP2_DEFAULT << 0)
 
#define ETH_TXPAUSEQUANT1_QUANTP3_DEFAULT   (_ETH_TXPAUSEQUANT1_QUANTP3_DEFAULT << 16)
 
#define ETH_TXPAUSEQUANT2_QUANTP4_DEFAULT   (_ETH_TXPAUSEQUANT2_QUANTP4_DEFAULT << 0)
 
#define ETH_TXPAUSEQUANT2_QUANTP5_DEFAULT   (_ETH_TXPAUSEQUANT2_QUANTP5_DEFAULT << 16)
 
#define ETH_TXPAUSEQUANT3_QUANTP6_DEFAULT   (_ETH_TXPAUSEQUANT3_QUANTP6_DEFAULT << 0)
 
#define ETH_TXPAUSEQUANT3_QUANTP7_DEFAULT   (_ETH_TXPAUSEQUANT3_QUANTP7_DEFAULT << 16)
 
#define ETH_TXPAUSEQUANT_QUANT_DEFAULT   (_ETH_TXPAUSEQUANT_QUANT_DEFAULT << 0)
 
#define ETH_TXPAUSEQUANT_QUANTP1_DEFAULT   (_ETH_TXPAUSEQUANT_QUANTP1_DEFAULT << 16)
 
#define ETH_TXPFCPAUSE_VECTOR_DEFAULT   (_ETH_TXPFCPAUSE_VECTOR_DEFAULT << 8)
 
#define ETH_TXPFCPAUSE_VECTORENB_DEFAULT   (_ETH_TXPFCPAUSE_VECTORENB_DEFAULT << 0)
 
#define ETH_TXPTPUNICAST_ADDR_DEFAULT   (_ETH_TXPTPUNICAST_ADDR_DEFAULT << 0)
 
#define ETH_TXQPTR_DMATXQPTR_DEFAULT   (_ETH_TXQPTR_DMATXQPTR_DEFAULT << 2)
 
#define ETH_TXSTATUS_AMBAERR   (0x1UL << 4)
 
#define ETH_TXSTATUS_AMBAERR_DEFAULT   (_ETH_TXSTATUS_AMBAERR_DEFAULT << 4)
 
#define ETH_TXSTATUS_COLOCCRD   (0x1UL << 1)
 
#define ETH_TXSTATUS_COLOCCRD_DEFAULT   (_ETH_TXSTATUS_COLOCCRD_DEFAULT << 1)
 
#define ETH_TXSTATUS_LATECOLOCCRD   (0x1UL << 7)
 
#define ETH_TXSTATUS_LATECOLOCCRD_DEFAULT   (_ETH_TXSTATUS_LATECOLOCCRD_DEFAULT << 7)
 
#define ETH_TXSTATUS_RESPNOTOK   (0x1UL << 8)
 
#define ETH_TXSTATUS_RESPNOTOK_DEFAULT   (_ETH_TXSTATUS_RESPNOTOK_DEFAULT << 8)
 
#define ETH_TXSTATUS_RETRYLMTEXCD   (0x1UL << 2)
 
#define ETH_TXSTATUS_RETRYLMTEXCD_DEFAULT   (_ETH_TXSTATUS_RETRYLMTEXCD_DEFAULT << 2)
 
#define ETH_TXSTATUS_TXCMPLT   (0x1UL << 5)
 
#define ETH_TXSTATUS_TXCMPLT_DEFAULT   (_ETH_TXSTATUS_TXCMPLT_DEFAULT << 5)
 
#define ETH_TXSTATUS_TXGO   (0x1UL << 3)
 
#define ETH_TXSTATUS_TXGO_DEFAULT   (_ETH_TXSTATUS_TXGO_DEFAULT << 3)
 
#define ETH_TXSTATUS_TXUNDERRUN   (0x1UL << 6)
 
#define ETH_TXSTATUS_TXUNDERRUN_DEFAULT   (_ETH_TXSTATUS_TXUNDERRUN_DEFAULT << 6)
 
#define ETH_TXSTATUS_USEDBITREAD   (0x1UL << 0)
 
#define ETH_TXSTATUS_USEDBITREAD_DEFAULT   (_ETH_TXSTATUS_USEDBITREAD_DEFAULT << 0)
 
#define ETH_TXUNDERRUNS_COUNT_DEFAULT   (_ETH_TXUNDERRUNS_COUNT_DEFAULT << 0)
 
#define ETH_UNDERSIZEFRAMES_COUNT_DEFAULT   (_ETH_UNDERSIZEFRAMES_COUNT_DEFAULT << 0)
 
#define ETH_WOLREG_ADDR_DEFAULT   (_ETH_WOLREG_ADDR_DEFAULT << 0)
 
#define ETH_WOLREG_WOLMASK0   (0x1UL << 16)
 
#define ETH_WOLREG_WOLMASK0_DEFAULT   (_ETH_WOLREG_WOLMASK0_DEFAULT << 16)
 
#define ETH_WOLREG_WOLMASK1   (0x1UL << 17)
 
#define ETH_WOLREG_WOLMASK1_DEFAULT   (_ETH_WOLREG_WOLMASK1_DEFAULT << 17)
 
#define ETH_WOLREG_WOLMASK2   (0x1UL << 18)
 
#define ETH_WOLREG_WOLMASK2_DEFAULT   (_ETH_WOLREG_WOLMASK2_DEFAULT << 18)
 
#define ETH_WOLREG_WOLMASK3   (0x1UL << 19)
 
#define ETH_WOLREG_WOLMASK3_DEFAULT   (_ETH_WOLREG_WOLMASK3_DEFAULT << 19)
 

Macro Definition Documentation

#define _ETH_ALIGNERRS_COUNT_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_ALIGNERRS

Definition at line 1899 of file efm32gg11b_eth.h.

#define _ETH_ALIGNERRS_COUNT_MASK   0x3FFUL

Bit mask for ETH_COUNT

Definition at line 1898 of file efm32gg11b_eth.h.

#define _ETH_ALIGNERRS_COUNT_SHIFT   0

Shift value for ETH_COUNT

Definition at line 1897 of file efm32gg11b_eth.h.

#define _ETH_ALIGNERRS_MASK   0x000003FFUL

Mask for ETH_ALIGNERRS

Definition at line 1896 of file efm32gg11b_eth.h.

#define _ETH_ALIGNERRS_RESETVALUE   0x00000000UL

Default value for ETH_ALIGNERRS

Definition at line 1895 of file efm32gg11b_eth.h.

#define _ETH_AUTOFLUSHEDPKTS_COUNT_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_AUTOFLUSHEDPKTS

Definition at line 1947 of file efm32gg11b_eth.h.

#define _ETH_AUTOFLUSHEDPKTS_COUNT_MASK   0xFFFFUL

Bit mask for ETH_COUNT

Definition at line 1946 of file efm32gg11b_eth.h.

#define _ETH_AUTOFLUSHEDPKTS_COUNT_SHIFT   0

Shift value for ETH_COUNT

Definition at line 1945 of file efm32gg11b_eth.h.

#define _ETH_AUTOFLUSHEDPKTS_MASK   0x0000FFFFUL

Mask for ETH_AUTOFLUSHEDPKTS

Definition at line 1944 of file efm32gg11b_eth.h.

#define _ETH_AUTOFLUSHEDPKTS_RESETVALUE   0x00000000UL

Default value for ETH_AUTOFLUSHEDPKTS

Definition at line 1943 of file efm32gg11b_eth.h.

#define _ETH_BROADCASTRXED_COUNT_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_BROADCASTRXED

Definition at line 1771 of file efm32gg11b_eth.h.

#define _ETH_BROADCASTRXED_COUNT_MASK   0xFFFFFFFFUL

Bit mask for ETH_COUNT

Definition at line 1770 of file efm32gg11b_eth.h.

#define _ETH_BROADCASTRXED_COUNT_SHIFT   0

Shift value for ETH_COUNT

Definition at line 1769 of file efm32gg11b_eth.h.

#define _ETH_BROADCASTRXED_MASK   0xFFFFFFFFUL

Mask for ETH_BROADCASTRXED

Definition at line 1768 of file efm32gg11b_eth.h.

#define _ETH_BROADCASTRXED_RESETVALUE   0x00000000UL

Default value for ETH_BROADCASTRXED

Definition at line 1767 of file efm32gg11b_eth.h.

#define _ETH_BROADCASTTXED_COUNT_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_BROADCASTTXED

Definition at line 1611 of file efm32gg11b_eth.h.

#define _ETH_BROADCASTTXED_COUNT_MASK   0xFFFFFFFFUL

Bit mask for ETH_COUNT

Definition at line 1610 of file efm32gg11b_eth.h.

#define _ETH_BROADCASTTXED_COUNT_SHIFT   0

Shift value for ETH_COUNT

Definition at line 1609 of file efm32gg11b_eth.h.

#define _ETH_BROADCASTTXED_MASK   0xFFFFFFFFUL

Mask for ETH_BROADCASTTXED

Definition at line 1608 of file efm32gg11b_eth.h.

#define _ETH_BROADCASTTXED_RESETVALUE   0x00000000UL

Default value for ETH_BROADCASTTXED

Definition at line 1607 of file efm32gg11b_eth.h.

#define _ETH_CRSERRS_COUNT_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_CRSERRS

Definition at line 1739 of file efm32gg11b_eth.h.

#define _ETH_CRSERRS_COUNT_MASK   0x3FFUL

Bit mask for ETH_COUNT

Definition at line 1738 of file efm32gg11b_eth.h.

#define _ETH_CRSERRS_COUNT_SHIFT   0

Shift value for ETH_COUNT

Definition at line 1737 of file efm32gg11b_eth.h.

#define _ETH_CRSERRS_MASK   0x000003FFUL

Mask for ETH_CRSERRS

Definition at line 1736 of file efm32gg11b_eth.h.

#define _ETH_CRSERRS_RESETVALUE   0x00000000UL

Default value for ETH_CRSERRS

Definition at line 1735 of file efm32gg11b_eth.h.

#define _ETH_CTRL_GBLCLKEN_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_CTRL

Definition at line 2344 of file efm32gg11b_eth.h.

#define _ETH_CTRL_GBLCLKEN_MASK   0x200UL

Bit mask for ETH_GBLCLKEN

Definition at line 2343 of file efm32gg11b_eth.h.

#define _ETH_CTRL_GBLCLKEN_SHIFT   9

Shift value for ETH_GBLCLKEN

Definition at line 2342 of file efm32gg11b_eth.h.

#define _ETH_CTRL_MASK   0x000007F7UL

Mask for ETH_CTRL

Definition at line 2313 of file efm32gg11b_eth.h.

#define _ETH_CTRL_MIISEL_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_CTRL

Definition at line 2335 of file efm32gg11b_eth.h.

#define _ETH_CTRL_MIISEL_MASK   0x100UL

Bit mask for ETH_MIISEL

Definition at line 2334 of file efm32gg11b_eth.h.

#define _ETH_CTRL_MIISEL_MII   0x00000001UL

Mode MII for ETH_CTRL

Definition at line 2337 of file efm32gg11b_eth.h.

#define _ETH_CTRL_MIISEL_RMII   0x00000000UL

Mode RMII for ETH_CTRL

Definition at line 2336 of file efm32gg11b_eth.h.

#define _ETH_CTRL_MIISEL_SHIFT   8

Shift value for ETH_MIISEL

Definition at line 2333 of file efm32gg11b_eth.h.

#define _ETH_CTRL_RESETVALUE   0x00000000UL

Default value for ETH_CTRL

Definition at line 2312 of file efm32gg11b_eth.h.

#define _ETH_CTRL_TSUCLKSEL_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_CTRL

Definition at line 2316 of file efm32gg11b_eth.h.

#define _ETH_CTRL_TSUCLKSEL_MASK   0x7UL

Bit mask for ETH_TSUCLKSEL

Definition at line 2315 of file efm32gg11b_eth.h.

#define _ETH_CTRL_TSUCLKSEL_NOCLOCK   0x00000000UL

Mode NOCLOCK for ETH_CTRL

Definition at line 2317 of file efm32gg11b_eth.h.

#define _ETH_CTRL_TSUCLKSEL_PLL   0x00000001UL

Mode PLL for ETH_CTRL

Definition at line 2318 of file efm32gg11b_eth.h.

#define _ETH_CTRL_TSUCLKSEL_REFCLK   0x00000003UL

Mode REFCLK for ETH_CTRL

Definition at line 2320 of file efm32gg11b_eth.h.

#define _ETH_CTRL_TSUCLKSEL_RXCLK   0x00000002UL

Mode RXCLK for ETH_CTRL

Definition at line 2319 of file efm32gg11b_eth.h.

#define _ETH_CTRL_TSUCLKSEL_SHIFT   0

Shift value for ETH_TSUCLKSEL

Definition at line 2314 of file efm32gg11b_eth.h.

#define _ETH_CTRL_TSUCLKSEL_TSUEXTCLK   0x00000004UL

Mode TSUEXTCLK for ETH_CTRL

Definition at line 2321 of file efm32gg11b_eth.h.

#define _ETH_CTRL_TSUPRESC_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_CTRL

Definition at line 2330 of file efm32gg11b_eth.h.

#define _ETH_CTRL_TSUPRESC_MASK   0xF0UL

Bit mask for ETH_TSUPRESC

Definition at line 2329 of file efm32gg11b_eth.h.

#define _ETH_CTRL_TSUPRESC_SHIFT   4

Shift value for ETH_TSUPRESC

Definition at line 2328 of file efm32gg11b_eth.h.

#define _ETH_CTRL_TXREFCLKSEL_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_CTRL

Definition at line 2349 of file efm32gg11b_eth.h.

#define _ETH_CTRL_TXREFCLKSEL_MASK   0x400UL

Bit mask for ETH_TXREFCLKSEL

Definition at line 2348 of file efm32gg11b_eth.h.

#define _ETH_CTRL_TXREFCLKSEL_REFCLKINT   0x00000000UL

Mode REFCLKINT for ETH_CTRL

Definition at line 2350 of file efm32gg11b_eth.h.

#define _ETH_CTRL_TXREFCLKSEL_REFCLKPIN   0x00000001UL

Mode REFCLKPIN for ETH_CTRL

Definition at line 2351 of file efm32gg11b_eth.h.

#define _ETH_CTRL_TXREFCLKSEL_SHIFT   10

Shift value for ETH_TXREFCLKSEL

Definition at line 2347 of file efm32gg11b_eth.h.

#define _ETH_DEFERREDFRAMES_COUNT_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_DEFERREDFRAMES

Definition at line 1731 of file efm32gg11b_eth.h.

#define _ETH_DEFERREDFRAMES_COUNT_MASK   0x3FFFFUL

Bit mask for ETH_COUNT

Definition at line 1730 of file efm32gg11b_eth.h.

#define _ETH_DEFERREDFRAMES_COUNT_SHIFT   0

Shift value for ETH_COUNT

Definition at line 1729 of file efm32gg11b_eth.h.

#define _ETH_DEFERREDFRAMES_MASK   0x0003FFFFUL

Mask for ETH_DEFERREDFRAMES

Definition at line 1728 of file efm32gg11b_eth.h.

#define _ETH_DEFERREDFRAMES_RESETVALUE   0x00000000UL

Default value for ETH_DEFERREDFRAMES

Definition at line 1727 of file efm32gg11b_eth.h.

#define _ETH_DMACFG_AMBABRSTLEN_DEFAULT   0x00000004UL

Mode DEFAULT for ETH_DMACFG

Definition at line 467 of file efm32gg11b_eth.h.

#define _ETH_DMACFG_AMBABRSTLEN_MASK   0x1FUL

Bit mask for ETH_AMBABRSTLEN

Definition at line 466 of file efm32gg11b_eth.h.

#define _ETH_DMACFG_AMBABRSTLEN_SHIFT   0

Shift value for ETH_AMBABRSTLEN

Definition at line 465 of file efm32gg11b_eth.h.

#define _ETH_DMACFG_FRCDISCARDONERR_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_DMACFG

Definition at line 512 of file efm32gg11b_eth.h.

#define _ETH_DMACFG_FRCDISCARDONERR_MASK   0x1000000UL

Bit mask for ETH_FRCDISCARDONERR

Definition at line 511 of file efm32gg11b_eth.h.

#define _ETH_DMACFG_FRCDISCARDONERR_SHIFT   24

Shift value for ETH_FRCDISCARDONERR

Definition at line 510 of file efm32gg11b_eth.h.

#define _ETH_DMACFG_FRCMAXAMBABRSTRX_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_DMACFG

Definition at line 517 of file efm32gg11b_eth.h.

#define _ETH_DMACFG_FRCMAXAMBABRSTRX_MASK   0x2000000UL

Bit mask for ETH_FRCMAXAMBABRSTRX

Definition at line 516 of file efm32gg11b_eth.h.

#define _ETH_DMACFG_FRCMAXAMBABRSTRX_SHIFT   25

Shift value for ETH_FRCMAXAMBABRSTRX

Definition at line 515 of file efm32gg11b_eth.h.

#define _ETH_DMACFG_FRCMAXAMBABRSTTX_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_DMACFG

Definition at line 522 of file efm32gg11b_eth.h.

#define _ETH_DMACFG_FRCMAXAMBABRSTTX_MASK   0x4000000UL

Bit mask for ETH_FRCMAXAMBABRSTTX

Definition at line 521 of file efm32gg11b_eth.h.

#define _ETH_DMACFG_FRCMAXAMBABRSTTX_SHIFT   26

Shift value for ETH_FRCMAXAMBABRSTTX

Definition at line 520 of file efm32gg11b_eth.h.

#define _ETH_DMACFG_HDRDATASPLITEN_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_DMACFG

Definition at line 472 of file efm32gg11b_eth.h.

#define _ETH_DMACFG_HDRDATASPLITEN_MASK   0x20UL

Bit mask for ETH_HDRDATASPLITEN

Definition at line 471 of file efm32gg11b_eth.h.

#define _ETH_DMACFG_HDRDATASPLITEN_SHIFT   5

Shift value for ETH_HDRDATASPLITEN

Definition at line 470 of file efm32gg11b_eth.h.

#define _ETH_DMACFG_INFLASTDBUFSIZEEN_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_DMACFG

Definition at line 503 of file efm32gg11b_eth.h.

#define _ETH_DMACFG_INFLASTDBUFSIZEEN_MASK   0x1000UL

Bit mask for ETH_INFLASTDBUFSIZEEN

Definition at line 502 of file efm32gg11b_eth.h.

#define _ETH_DMACFG_INFLASTDBUFSIZEEN_SHIFT   12

Shift value for ETH_INFLASTDBUFSIZEEN

Definition at line 501 of file efm32gg11b_eth.h.

#define _ETH_DMACFG_MASK   0x37FF1F3FUL

Mask for ETH_DMACFG

Definition at line 464 of file efm32gg11b_eth.h.

#define _ETH_DMACFG_RESETVALUE   0x00020704UL

Default value for ETH_DMACFG

Definition at line 463 of file efm32gg11b_eth.h.

#define _ETH_DMACFG_RXBDEXTNDMODEEN_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_DMACFG

Definition at line 527 of file efm32gg11b_eth.h.

#define _ETH_DMACFG_RXBDEXTNDMODEEN_MASK   0x10000000UL

Bit mask for ETH_RXBDEXTNDMODEEN

Definition at line 526 of file efm32gg11b_eth.h.

#define _ETH_DMACFG_RXBDEXTNDMODEEN_SHIFT   28

Shift value for ETH_RXBDEXTNDMODEEN

Definition at line 525 of file efm32gg11b_eth.h.

#define _ETH_DMACFG_RXBUFSIZE_DEFAULT   0x00000002UL

Mode DEFAULT for ETH_DMACFG

Definition at line 507 of file efm32gg11b_eth.h.

#define _ETH_DMACFG_RXBUFSIZE_MASK   0xFF0000UL

Bit mask for ETH_RXBUFSIZE

Definition at line 506 of file efm32gg11b_eth.h.

#define _ETH_DMACFG_RXBUFSIZE_SHIFT   16

Shift value for ETH_RXBUFSIZE

Definition at line 505 of file efm32gg11b_eth.h.

#define _ETH_DMACFG_RXPBUFSIZE_DEFAULT   0x00000003UL

Mode DEFAULT for ETH_DMACFG

Definition at line 479 of file efm32gg11b_eth.h.

#define _ETH_DMACFG_RXPBUFSIZE_MASK   0x300UL

Bit mask for ETH_RXPBUFSIZE

Definition at line 475 of file efm32gg11b_eth.h.

#define _ETH_DMACFG_RXPBUFSIZE_SHIFT   8

Shift value for ETH_RXPBUFSIZE

Definition at line 474 of file efm32gg11b_eth.h.

#define _ETH_DMACFG_RXPBUFSIZE_SIZE0   0x00000000UL

Mode SIZE0 for ETH_DMACFG

Definition at line 476 of file efm32gg11b_eth.h.

#define _ETH_DMACFG_RXPBUFSIZE_SIZE1   0x00000001UL

Mode SIZE1 for ETH_DMACFG

Definition at line 477 of file efm32gg11b_eth.h.

#define _ETH_DMACFG_RXPBUFSIZE_SIZE2   0x00000002UL

Mode SIZE2 for ETH_DMACFG

Definition at line 478 of file efm32gg11b_eth.h.

#define _ETH_DMACFG_RXPBUFSIZE_SIZE3   0x00000003UL

Mode SIZE3 for ETH_DMACFG

Definition at line 480 of file efm32gg11b_eth.h.

#define _ETH_DMACFG_TXBDEXTENDMODEEN_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_DMACFG

Definition at line 532 of file efm32gg11b_eth.h.

#define _ETH_DMACFG_TXBDEXTENDMODEEN_MASK   0x20000000UL

Bit mask for ETH_TXBDEXTENDMODEEN

Definition at line 531 of file efm32gg11b_eth.h.

#define _ETH_DMACFG_TXBDEXTENDMODEEN_SHIFT   29

Shift value for ETH_TXBDEXTENDMODEEN

Definition at line 530 of file efm32gg11b_eth.h.

#define _ETH_DMACFG_TXPBUFSIZE_DEFAULT   0x00000001UL

Mode DEFAULT for ETH_DMACFG

Definition at line 490 of file efm32gg11b_eth.h.

#define _ETH_DMACFG_TXPBUFSIZE_MASK   0x400UL

Bit mask for ETH_TXPBUFSIZE

Definition at line 488 of file efm32gg11b_eth.h.

#define _ETH_DMACFG_TXPBUFSIZE_SHIFT   10

Shift value for ETH_TXPBUFSIZE

Definition at line 487 of file efm32gg11b_eth.h.

#define _ETH_DMACFG_TXPBUFSIZE_SIZE0   0x00000000UL

Mode SIZE0 for ETH_DMACFG

Definition at line 489 of file efm32gg11b_eth.h.

#define _ETH_DMACFG_TXPBUFSIZE_SIZE1   0x00000001UL

Mode SIZE1 for ETH_DMACFG

Definition at line 491 of file efm32gg11b_eth.h.

#define _ETH_DMACFG_TXPBUFTCPEN_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_DMACFG

Definition at line 498 of file efm32gg11b_eth.h.

#define _ETH_DMACFG_TXPBUFTCPEN_MASK   0x800UL

Bit mask for ETH_TXPBUFTCPEN

Definition at line 497 of file efm32gg11b_eth.h.

#define _ETH_DMACFG_TXPBUFTCPEN_SHIFT   11

Shift value for ETH_TXPBUFTCPEN

Definition at line 496 of file efm32gg11b_eth.h.

#define _ETH_EXCESSCOLS_COUNT_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_EXCESSCOLS

Definition at line 1715 of file efm32gg11b_eth.h.

#define _ETH_EXCESSCOLS_COUNT_MASK   0x3FFUL

Bit mask for ETH_COUNT

Definition at line 1714 of file efm32gg11b_eth.h.

#define _ETH_EXCESSCOLS_COUNT_SHIFT   0

Shift value for ETH_COUNT

Definition at line 1713 of file efm32gg11b_eth.h.

#define _ETH_EXCESSCOLS_MASK   0x000003FFUL

Mask for ETH_EXCESSCOLS

Definition at line 1712 of file efm32gg11b_eth.h.

#define _ETH_EXCESSCOLS_RESETVALUE   0x00000000UL

Default value for ETH_EXCESSCOLS

Definition at line 1711 of file efm32gg11b_eth.h.

#define _ETH_EXCESSIVERXLEN_COUNT_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_EXCESSIVERXLEN

Definition at line 1859 of file efm32gg11b_eth.h.

#define _ETH_EXCESSIVERXLEN_COUNT_MASK   0x3FFUL

Bit mask for ETH_COUNT

Definition at line 1858 of file efm32gg11b_eth.h.

#define _ETH_EXCESSIVERXLEN_COUNT_SHIFT   0

Shift value for ETH_COUNT

Definition at line 1857 of file efm32gg11b_eth.h.

#define _ETH_EXCESSIVERXLEN_MASK   0x000003FFUL

Mask for ETH_EXCESSIVERXLEN

Definition at line 1856 of file efm32gg11b_eth.h.

#define _ETH_EXCESSIVERXLEN_RESETVALUE   0x00000000UL

Default value for ETH_EXCESSIVERXLEN

Definition at line 1855 of file efm32gg11b_eth.h.

#define _ETH_FCSERRS_COUNT_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_FCSERRS

Definition at line 1875 of file efm32gg11b_eth.h.

#define _ETH_FCSERRS_COUNT_MASK   0x3FFUL

Bit mask for ETH_COUNT

Definition at line 1874 of file efm32gg11b_eth.h.

#define _ETH_FCSERRS_COUNT_SHIFT   0

Shift value for ETH_COUNT

Definition at line 1873 of file efm32gg11b_eth.h.

#define _ETH_FCSERRS_MASK   0x000003FFUL

Mask for ETH_FCSERRS

Definition at line 1872 of file efm32gg11b_eth.h.

#define _ETH_FCSERRS_RESETVALUE   0x00000000UL

Default value for ETH_FCSERRS

Definition at line 1871 of file efm32gg11b_eth.h.

#define _ETH_FRAMESRXED1024_COUNT_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_FRAMESRXED1024

Definition at line 1835 of file efm32gg11b_eth.h.

#define _ETH_FRAMESRXED1024_COUNT_MASK   0xFFFFFFFFUL

Bit mask for ETH_COUNT

Definition at line 1834 of file efm32gg11b_eth.h.

#define _ETH_FRAMESRXED1024_COUNT_SHIFT   0

Shift value for ETH_COUNT

Definition at line 1833 of file efm32gg11b_eth.h.

#define _ETH_FRAMESRXED1024_MASK   0xFFFFFFFFUL

Mask for ETH_FRAMESRXED1024

Definition at line 1832 of file efm32gg11b_eth.h.

#define _ETH_FRAMESRXED1024_RESETVALUE   0x00000000UL

Default value for ETH_FRAMESRXED1024

Definition at line 1831 of file efm32gg11b_eth.h.

#define _ETH_FRAMESRXED128_COUNT_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_FRAMESRXED128

Definition at line 1811 of file efm32gg11b_eth.h.

#define _ETH_FRAMESRXED128_COUNT_MASK   0xFFFFFFFFUL

Bit mask for ETH_COUNT

Definition at line 1810 of file efm32gg11b_eth.h.

#define _ETH_FRAMESRXED128_COUNT_SHIFT   0

Shift value for ETH_COUNT

Definition at line 1809 of file efm32gg11b_eth.h.

#define _ETH_FRAMESRXED128_MASK   0xFFFFFFFFUL

Mask for ETH_FRAMESRXED128

Definition at line 1808 of file efm32gg11b_eth.h.

#define _ETH_FRAMESRXED128_RESETVALUE   0x00000000UL

Default value for ETH_FRAMESRXED128

Definition at line 1807 of file efm32gg11b_eth.h.

#define _ETH_FRAMESRXED1519_COUNT_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_FRAMESRXED1519

Definition at line 1843 of file efm32gg11b_eth.h.

#define _ETH_FRAMESRXED1519_COUNT_MASK   0xFFFFFFFFUL

Bit mask for ETH_COUNT

Definition at line 1842 of file efm32gg11b_eth.h.

#define _ETH_FRAMESRXED1519_COUNT_SHIFT   0

Shift value for ETH_COUNT

Definition at line 1841 of file efm32gg11b_eth.h.

#define _ETH_FRAMESRXED1519_MASK   0xFFFFFFFFUL

Mask for ETH_FRAMESRXED1519

Definition at line 1840 of file efm32gg11b_eth.h.

#define _ETH_FRAMESRXED1519_RESETVALUE   0x00000000UL

Default value for ETH_FRAMESRXED1519

Definition at line 1839 of file efm32gg11b_eth.h.

#define _ETH_FRAMESRXED256_COUNT_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_FRAMESRXED256

Definition at line 1819 of file efm32gg11b_eth.h.

#define _ETH_FRAMESRXED256_COUNT_MASK   0xFFFFFFFFUL

Bit mask for ETH_COUNT

Definition at line 1818 of file efm32gg11b_eth.h.

#define _ETH_FRAMESRXED256_COUNT_SHIFT   0

Shift value for ETH_COUNT

Definition at line 1817 of file efm32gg11b_eth.h.

#define _ETH_FRAMESRXED256_MASK   0xFFFFFFFFUL

Mask for ETH_FRAMESRXED256

Definition at line 1816 of file efm32gg11b_eth.h.

#define _ETH_FRAMESRXED256_RESETVALUE   0x00000000UL

Default value for ETH_FRAMESRXED256

Definition at line 1815 of file efm32gg11b_eth.h.

#define _ETH_FRAMESRXED512_COUNT_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_FRAMESRXED512

Definition at line 1827 of file efm32gg11b_eth.h.

#define _ETH_FRAMESRXED512_COUNT_MASK   0xFFFFFFFFUL

Bit mask for ETH_COUNT

Definition at line 1826 of file efm32gg11b_eth.h.

#define _ETH_FRAMESRXED512_COUNT_SHIFT   0

Shift value for ETH_COUNT

Definition at line 1825 of file efm32gg11b_eth.h.

#define _ETH_FRAMESRXED512_MASK   0xFFFFFFFFUL

Mask for ETH_FRAMESRXED512

Definition at line 1824 of file efm32gg11b_eth.h.

#define _ETH_FRAMESRXED512_RESETVALUE   0x00000000UL

Default value for ETH_FRAMESRXED512

Definition at line 1823 of file efm32gg11b_eth.h.

#define _ETH_FRAMESRXED64_COUNT_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_FRAMESRXED64

Definition at line 1795 of file efm32gg11b_eth.h.

#define _ETH_FRAMESRXED64_COUNT_MASK   0xFFFFFFFFUL

Bit mask for ETH_COUNT

Definition at line 1794 of file efm32gg11b_eth.h.

#define _ETH_FRAMESRXED64_COUNT_SHIFT   0

Shift value for ETH_COUNT

Definition at line 1793 of file efm32gg11b_eth.h.

#define _ETH_FRAMESRXED64_MASK   0xFFFFFFFFUL

Mask for ETH_FRAMESRXED64

Definition at line 1792 of file efm32gg11b_eth.h.

#define _ETH_FRAMESRXED64_RESETVALUE   0x00000000UL

Default value for ETH_FRAMESRXED64

Definition at line 1791 of file efm32gg11b_eth.h.

#define _ETH_FRAMESRXED65_COUNT_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_FRAMESRXED65

Definition at line 1803 of file efm32gg11b_eth.h.

#define _ETH_FRAMESRXED65_COUNT_MASK   0xFFFFFFFFUL

Bit mask for ETH_COUNT

Definition at line 1802 of file efm32gg11b_eth.h.

#define _ETH_FRAMESRXED65_COUNT_SHIFT   0

Shift value for ETH_COUNT

Definition at line 1801 of file efm32gg11b_eth.h.

#define _ETH_FRAMESRXED65_MASK   0xFFFFFFFFUL

Mask for ETH_FRAMESRXED65

Definition at line 1800 of file efm32gg11b_eth.h.

#define _ETH_FRAMESRXED65_RESETVALUE   0x00000000UL

Default value for ETH_FRAMESRXED65

Definition at line 1799 of file efm32gg11b_eth.h.

#define _ETH_FRAMESRXEDOK_COUNT_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_FRAMESRXEDOK

Definition at line 1763 of file efm32gg11b_eth.h.

#define _ETH_FRAMESRXEDOK_COUNT_MASK   0xFFFFFFFFUL

Bit mask for ETH_COUNT

Definition at line 1762 of file efm32gg11b_eth.h.

#define _ETH_FRAMESRXEDOK_COUNT_SHIFT   0

Shift value for ETH_COUNT

Definition at line 1761 of file efm32gg11b_eth.h.

#define _ETH_FRAMESRXEDOK_MASK   0xFFFFFFFFUL

Mask for ETH_FRAMESRXEDOK

Definition at line 1760 of file efm32gg11b_eth.h.

#define _ETH_FRAMESRXEDOK_RESETVALUE   0x00000000UL

Default value for ETH_FRAMESRXEDOK

Definition at line 1759 of file efm32gg11b_eth.h.

#define _ETH_FRAMESTXED1024_COUNT_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_FRAMESTXED1024

Definition at line 1675 of file efm32gg11b_eth.h.

#define _ETH_FRAMESTXED1024_COUNT_MASK   0xFFFFFFFFUL

Bit mask for ETH_COUNT

Definition at line 1674 of file efm32gg11b_eth.h.

#define _ETH_FRAMESTXED1024_COUNT_SHIFT   0

Shift value for ETH_COUNT

Definition at line 1673 of file efm32gg11b_eth.h.

#define _ETH_FRAMESTXED1024_MASK   0xFFFFFFFFUL

Mask for ETH_FRAMESTXED1024

Definition at line 1672 of file efm32gg11b_eth.h.

#define _ETH_FRAMESTXED1024_RESETVALUE   0x00000000UL

Default value for ETH_FRAMESTXED1024

Definition at line 1671 of file efm32gg11b_eth.h.

#define _ETH_FRAMESTXED128_COUNT_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_FRAMESTXED128

Definition at line 1651 of file efm32gg11b_eth.h.

#define _ETH_FRAMESTXED128_COUNT_MASK   0xFFFFFFFFUL

Bit mask for ETH_COUNT

Definition at line 1650 of file efm32gg11b_eth.h.

#define _ETH_FRAMESTXED128_COUNT_SHIFT   0

Shift value for ETH_COUNT

Definition at line 1649 of file efm32gg11b_eth.h.

#define _ETH_FRAMESTXED128_MASK   0xFFFFFFFFUL

Mask for ETH_FRAMESTXED128

Definition at line 1648 of file efm32gg11b_eth.h.

#define _ETH_FRAMESTXED128_RESETVALUE   0x00000000UL

Default value for ETH_FRAMESTXED128

Definition at line 1647 of file efm32gg11b_eth.h.

#define _ETH_FRAMESTXED1519_COUNT_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_FRAMESTXED1519

Definition at line 1683 of file efm32gg11b_eth.h.

#define _ETH_FRAMESTXED1519_COUNT_MASK   0xFFFFFFFFUL

Bit mask for ETH_COUNT

Definition at line 1682 of file efm32gg11b_eth.h.

#define _ETH_FRAMESTXED1519_COUNT_SHIFT   0

Shift value for ETH_COUNT

Definition at line 1681 of file efm32gg11b_eth.h.

#define _ETH_FRAMESTXED1519_MASK   0xFFFFFFFFUL

Mask for ETH_FRAMESTXED1519

Definition at line 1680 of file efm32gg11b_eth.h.

#define _ETH_FRAMESTXED1519_RESETVALUE   0x00000000UL

Default value for ETH_FRAMESTXED1519

Definition at line 1679 of file efm32gg11b_eth.h.

#define _ETH_FRAMESTXED256_COUNT_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_FRAMESTXED256

Definition at line 1659 of file efm32gg11b_eth.h.

#define _ETH_FRAMESTXED256_COUNT_MASK   0xFFFFFFFFUL

Bit mask for ETH_COUNT

Definition at line 1658 of file efm32gg11b_eth.h.

#define _ETH_FRAMESTXED256_COUNT_SHIFT   0

Shift value for ETH_COUNT

Definition at line 1657 of file efm32gg11b_eth.h.

#define _ETH_FRAMESTXED256_MASK   0xFFFFFFFFUL

Mask for ETH_FRAMESTXED256

Definition at line 1656 of file efm32gg11b_eth.h.

#define _ETH_FRAMESTXED256_RESETVALUE   0x00000000UL

Default value for ETH_FRAMESTXED256

Definition at line 1655 of file efm32gg11b_eth.h.

#define _ETH_FRAMESTXED512_COUNT_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_FRAMESTXED512

Definition at line 1667 of file efm32gg11b_eth.h.

#define _ETH_FRAMESTXED512_COUNT_MASK   0xFFFFFFFFUL

Bit mask for ETH_COUNT

Definition at line 1666 of file efm32gg11b_eth.h.

#define _ETH_FRAMESTXED512_COUNT_SHIFT   0

Shift value for ETH_COUNT

Definition at line 1665 of file efm32gg11b_eth.h.

#define _ETH_FRAMESTXED512_MASK   0xFFFFFFFFUL

Mask for ETH_FRAMESTXED512

Definition at line 1664 of file efm32gg11b_eth.h.

#define _ETH_FRAMESTXED512_RESETVALUE   0x00000000UL

Default value for ETH_FRAMESTXED512

Definition at line 1663 of file efm32gg11b_eth.h.

#define _ETH_FRAMESTXED64_COUNT_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_FRAMESTXED64

Definition at line 1635 of file efm32gg11b_eth.h.

#define _ETH_FRAMESTXED64_COUNT_MASK   0xFFFFFFFFUL

Bit mask for ETH_COUNT

Definition at line 1634 of file efm32gg11b_eth.h.

#define _ETH_FRAMESTXED64_COUNT_SHIFT   0

Shift value for ETH_COUNT

Definition at line 1633 of file efm32gg11b_eth.h.

#define _ETH_FRAMESTXED64_MASK   0xFFFFFFFFUL

Mask for ETH_FRAMESTXED64

Definition at line 1632 of file efm32gg11b_eth.h.

#define _ETH_FRAMESTXED64_RESETVALUE   0x00000000UL

Default value for ETH_FRAMESTXED64

Definition at line 1631 of file efm32gg11b_eth.h.

#define _ETH_FRAMESTXED65_COUNT_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_FRAMESTXED65

Definition at line 1643 of file efm32gg11b_eth.h.

#define _ETH_FRAMESTXED65_COUNT_MASK   0xFFFFFFFFUL

Bit mask for ETH_COUNT

Definition at line 1642 of file efm32gg11b_eth.h.

#define _ETH_FRAMESTXED65_COUNT_SHIFT   0

Shift value for ETH_COUNT

Definition at line 1641 of file efm32gg11b_eth.h.

#define _ETH_FRAMESTXED65_MASK   0xFFFFFFFFUL

Mask for ETH_FRAMESTXED65

Definition at line 1640 of file efm32gg11b_eth.h.

#define _ETH_FRAMESTXED65_RESETVALUE   0x00000000UL

Default value for ETH_FRAMESTXED65

Definition at line 1639 of file efm32gg11b_eth.h.

#define _ETH_FRAMESTXEDOK_COUNT_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_FRAMESTXEDOK

Definition at line 1603 of file efm32gg11b_eth.h.

#define _ETH_FRAMESTXEDOK_COUNT_MASK   0xFFFFFFFFUL

Bit mask for ETH_COUNT

Definition at line 1602 of file efm32gg11b_eth.h.

#define _ETH_FRAMESTXEDOK_COUNT_SHIFT   0

Shift value for ETH_COUNT

Definition at line 1601 of file efm32gg11b_eth.h.

#define _ETH_FRAMESTXEDOK_MASK   0xFFFFFFFFUL

Mask for ETH_FRAMESTXEDOK

Definition at line 1600 of file efm32gg11b_eth.h.

#define _ETH_FRAMESTXEDOK_RESETVALUE   0x00000000UL

Default value for ETH_FRAMESTXEDOK

Definition at line 1599 of file efm32gg11b_eth.h.

#define _ETH_HASHBOTTOM_ADDR_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_HASHBOTTOM

Definition at line 1258 of file efm32gg11b_eth.h.

#define _ETH_HASHBOTTOM_ADDR_MASK   0xFFFFFFFFUL

Bit mask for ETH_ADDR

Definition at line 1257 of file efm32gg11b_eth.h.

#define _ETH_HASHBOTTOM_ADDR_SHIFT   0

Shift value for ETH_ADDR

Definition at line 1256 of file efm32gg11b_eth.h.

#define _ETH_HASHBOTTOM_MASK   0xFFFFFFFFUL

Mask for ETH_HASHBOTTOM

Definition at line 1255 of file efm32gg11b_eth.h.

#define _ETH_HASHBOTTOM_RESETVALUE   0x00000000UL

Default value for ETH_HASHBOTTOM

Definition at line 1254 of file efm32gg11b_eth.h.

#define _ETH_HASHTOP_ADDR_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_HASHTOP

Definition at line 1266 of file efm32gg11b_eth.h.

#define _ETH_HASHTOP_ADDR_MASK   0xFFFFFFFFUL

Bit mask for ETH_ADDR

Definition at line 1265 of file efm32gg11b_eth.h.

#define _ETH_HASHTOP_ADDR_SHIFT   0

Shift value for ETH_ADDR

Definition at line 1264 of file efm32gg11b_eth.h.

#define _ETH_HASHTOP_MASK   0xFFFFFFFFUL

Mask for ETH_HASHTOP

Definition at line 1263 of file efm32gg11b_eth.h.

#define _ETH_HASHTOP_RESETVALUE   0x00000000UL

Default value for ETH_HASHTOP

Definition at line 1262 of file efm32gg11b_eth.h.

#define _ETH_IENC_AMBAERR_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_IENC

Definition at line 918 of file efm32gg11b_eth.h.

#define _ETH_IENC_AMBAERR_MASK   0x40UL

Bit mask for ETH_AMBAERR

Definition at line 917 of file efm32gg11b_eth.h.

#define _ETH_IENC_AMBAERR_SHIFT   6

Shift value for ETH_AMBAERR

Definition at line 916 of file efm32gg11b_eth.h.

#define _ETH_IENC_MASK   0x3FFC7CFFUL

Mask for ETH_IENC

Definition at line 884 of file efm32gg11b_eth.h.

#define _ETH_IENC_MNGMNTDONE_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_IENC

Definition at line 888 of file efm32gg11b_eth.h.

#define _ETH_IENC_MNGMNTDONE_MASK   0x1UL

Bit mask for ETH_MNGMNTDONE

Definition at line 887 of file efm32gg11b_eth.h.

#define _ETH_IENC_MNGMNTDONE_SHIFT   0

Shift value for ETH_MNGMNTDONE

Definition at line 886 of file efm32gg11b_eth.h.

#define _ETH_IENC_NONZEROPFRMQUANT_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_IENC

Definition at line 938 of file efm32gg11b_eth.h.

#define _ETH_IENC_NONZEROPFRMQUANT_MASK   0x1000UL

Bit mask for ETH_NONZEROPFRMQUANT

Definition at line 937 of file efm32gg11b_eth.h.

#define _ETH_IENC_NONZEROPFRMQUANT_SHIFT   12

Shift value for ETH_NONZEROPFRMQUANT

Definition at line 936 of file efm32gg11b_eth.h.

#define _ETH_IENC_PAUSETIMEZERO_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_IENC

Definition at line 943 of file efm32gg11b_eth.h.

#define _ETH_IENC_PAUSETIMEZERO_MASK   0x2000UL

Bit mask for ETH_PAUSETIMEZERO

Definition at line 942 of file efm32gg11b_eth.h.

#define _ETH_IENC_PAUSETIMEZERO_SHIFT   13

Shift value for ETH_PAUSETIMEZERO

Definition at line 941 of file efm32gg11b_eth.h.

#define _ETH_IENC_PFRMTX_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_IENC

Definition at line 948 of file efm32gg11b_eth.h.

#define _ETH_IENC_PFRMTX_MASK   0x4000UL

Bit mask for ETH_PFRMTX

Definition at line 947 of file efm32gg11b_eth.h.

#define _ETH_IENC_PFRMTX_SHIFT   14

Shift value for ETH_PFRMTX

Definition at line 946 of file efm32gg11b_eth.h.

#define _ETH_IENC_PTPDLYREQFRMRX_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_IENC

Definition at line 953 of file efm32gg11b_eth.h.

#define _ETH_IENC_PTPDLYREQFRMRX_MASK   0x40000UL

Bit mask for ETH_PTPDLYREQFRMRX

Definition at line 952 of file efm32gg11b_eth.h.

#define _ETH_IENC_PTPDLYREQFRMRX_SHIFT   18

Shift value for ETH_PTPDLYREQFRMRX

Definition at line 951 of file efm32gg11b_eth.h.

#define _ETH_IENC_PTPDLYREQFRMTX_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_IENC

Definition at line 963 of file efm32gg11b_eth.h.

#define _ETH_IENC_PTPDLYREQFRMTX_MASK   0x100000UL

Bit mask for ETH_PTPDLYREQFRMTX

Definition at line 962 of file efm32gg11b_eth.h.

#define _ETH_IENC_PTPDLYREQFRMTX_SHIFT   20

Shift value for ETH_PTPDLYREQFRMTX

Definition at line 961 of file efm32gg11b_eth.h.

#define _ETH_IENC_PTPPDLYREQFRMRX_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_IENC

Definition at line 973 of file efm32gg11b_eth.h.

#define _ETH_IENC_PTPPDLYREQFRMRX_MASK   0x400000UL

Bit mask for ETH_PTPPDLYREQFRMRX

Definition at line 972 of file efm32gg11b_eth.h.

#define _ETH_IENC_PTPPDLYREQFRMRX_SHIFT   22

Shift value for ETH_PTPPDLYREQFRMRX

Definition at line 971 of file efm32gg11b_eth.h.

#define _ETH_IENC_PTPPDLYREQFRMTX_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_IENC

Definition at line 983 of file efm32gg11b_eth.h.

#define _ETH_IENC_PTPPDLYREQFRMTX_MASK   0x1000000UL

Bit mask for ETH_PTPPDLYREQFRMTX

Definition at line 982 of file efm32gg11b_eth.h.

#define _ETH_IENC_PTPPDLYREQFRMTX_SHIFT   24

Shift value for ETH_PTPPDLYREQFRMTX

Definition at line 981 of file efm32gg11b_eth.h.

#define _ETH_IENC_PTPPDLYRESPFRMRX_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_IENC

Definition at line 978 of file efm32gg11b_eth.h.

#define _ETH_IENC_PTPPDLYRESPFRMRX_MASK   0x800000UL

Bit mask for ETH_PTPPDLYRESPFRMRX

Definition at line 977 of file efm32gg11b_eth.h.

#define _ETH_IENC_PTPPDLYRESPFRMRX_SHIFT   23

Shift value for ETH_PTPPDLYRESPFRMRX

Definition at line 976 of file efm32gg11b_eth.h.

#define _ETH_IENC_PTPPDLYRESPFRMTX_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_IENC

Definition at line 988 of file efm32gg11b_eth.h.

#define _ETH_IENC_PTPPDLYRESPFRMTX_MASK   0x2000000UL

Bit mask for ETH_PTPPDLYRESPFRMTX

Definition at line 987 of file efm32gg11b_eth.h.

#define _ETH_IENC_PTPPDLYRESPFRMTX_SHIFT   25

Shift value for ETH_PTPPDLYRESPFRMTX

Definition at line 986 of file efm32gg11b_eth.h.

#define _ETH_IENC_PTPSYNCFRMRX_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_IENC

Definition at line 958 of file efm32gg11b_eth.h.

#define _ETH_IENC_PTPSYNCFRMRX_MASK   0x80000UL

Bit mask for ETH_PTPSYNCFRMRX

Definition at line 957 of file efm32gg11b_eth.h.

#define _ETH_IENC_PTPSYNCFRMRX_SHIFT   19

Shift value for ETH_PTPSYNCFRMRX

Definition at line 956 of file efm32gg11b_eth.h.

#define _ETH_IENC_PTPSYNCFRMTX_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_IENC

Definition at line 968 of file efm32gg11b_eth.h.

#define _ETH_IENC_PTPSYNCFRMTX_MASK   0x200000UL

Bit mask for ETH_PTPSYNCFRMTX

Definition at line 967 of file efm32gg11b_eth.h.

#define _ETH_IENC_PTPSYNCFRMTX_SHIFT   21

Shift value for ETH_PTPSYNCFRMTX

Definition at line 966 of file efm32gg11b_eth.h.

#define _ETH_IENC_RESETVALUE   0x00000000UL

Default value for ETH_IENC

Definition at line 883 of file efm32gg11b_eth.h.

#define _ETH_IENC_RESPNOTOK_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_IENC

Definition at line 933 of file efm32gg11b_eth.h.

#define _ETH_IENC_RESPNOTOK_MASK   0x800UL

Bit mask for ETH_RESPNOTOK

Definition at line 932 of file efm32gg11b_eth.h.

#define _ETH_IENC_RESPNOTOK_SHIFT   11

Shift value for ETH_RESPNOTOK

Definition at line 931 of file efm32gg11b_eth.h.

#define _ETH_IENC_RTRYLMTORLATECOL_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_IENC

Definition at line 913 of file efm32gg11b_eth.h.

#define _ETH_IENC_RTRYLMTORLATECOL_MASK   0x20UL

Bit mask for ETH_RTRYLMTORLATECOL

Definition at line 912 of file efm32gg11b_eth.h.

#define _ETH_IENC_RTRYLMTORLATECOL_SHIFT   5

Shift value for ETH_RTRYLMTORLATECOL

Definition at line 911 of file efm32gg11b_eth.h.

#define _ETH_IENC_RXCMPLT_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_IENC

Definition at line 893 of file efm32gg11b_eth.h.

#define _ETH_IENC_RXCMPLT_MASK   0x2UL

Bit mask for ETH_RXCMPLT

Definition at line 892 of file efm32gg11b_eth.h.

#define _ETH_IENC_RXCMPLT_SHIFT   1

Shift value for ETH_RXCMPLT

Definition at line 891 of file efm32gg11b_eth.h.

#define _ETH_IENC_RXLPIINDC_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_IENC

Definition at line 998 of file efm32gg11b_eth.h.

#define _ETH_IENC_RXLPIINDC_MASK   0x8000000UL

Bit mask for ETH_RXLPIINDC

Definition at line 997 of file efm32gg11b_eth.h.

#define _ETH_IENC_RXLPIINDC_SHIFT   27

Shift value for ETH_RXLPIINDC

Definition at line 996 of file efm32gg11b_eth.h.

#define _ETH_IENC_RXOVERRUN_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_IENC

Definition at line 928 of file efm32gg11b_eth.h.

#define _ETH_IENC_RXOVERRUN_MASK   0x400UL

Bit mask for ETH_RXOVERRUN

Definition at line 927 of file efm32gg11b_eth.h.

#define _ETH_IENC_RXOVERRUN_SHIFT   10

Shift value for ETH_RXOVERRUN

Definition at line 926 of file efm32gg11b_eth.h.

#define _ETH_IENC_RXUSEDBITREAD_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_IENC

Definition at line 898 of file efm32gg11b_eth.h.

#define _ETH_IENC_RXUSEDBITREAD_MASK   0x4UL

Bit mask for ETH_RXUSEDBITREAD

Definition at line 897 of file efm32gg11b_eth.h.

#define _ETH_IENC_RXUSEDBITREAD_SHIFT   2

Shift value for ETH_RXUSEDBITREAD

Definition at line 896 of file efm32gg11b_eth.h.

#define _ETH_IENC_TSUSECREGINCR_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_IENC

Definition at line 993 of file efm32gg11b_eth.h.

#define _ETH_IENC_TSUSECREGINCR_MASK   0x4000000UL

Bit mask for ETH_TSUSECREGINCR

Definition at line 992 of file efm32gg11b_eth.h.

#define _ETH_IENC_TSUSECREGINCR_SHIFT   26

Shift value for ETH_TSUSECREGINCR

Definition at line 991 of file efm32gg11b_eth.h.

#define _ETH_IENC_TSUTIMERCOMP_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_IENC

Definition at line 1008 of file efm32gg11b_eth.h.

#define _ETH_IENC_TSUTIMERCOMP_MASK   0x20000000UL

Bit mask for ETH_TSUTIMERCOMP

Definition at line 1007 of file efm32gg11b_eth.h.

#define _ETH_IENC_TSUTIMERCOMP_SHIFT   29

Shift value for ETH_TSUTIMERCOMP

Definition at line 1006 of file efm32gg11b_eth.h.

#define _ETH_IENC_TXCMPLT_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_IENC

Definition at line 923 of file efm32gg11b_eth.h.

#define _ETH_IENC_TXCMPLT_MASK   0x80UL

Bit mask for ETH_TXCMPLT

Definition at line 922 of file efm32gg11b_eth.h.

#define _ETH_IENC_TXCMPLT_SHIFT   7

Shift value for ETH_TXCMPLT

Definition at line 921 of file efm32gg11b_eth.h.

#define _ETH_IENC_TXUNDERRUN_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_IENC

Definition at line 908 of file efm32gg11b_eth.h.

#define _ETH_IENC_TXUNDERRUN_MASK   0x10UL

Bit mask for ETH_TXUNDERRUN

Definition at line 907 of file efm32gg11b_eth.h.

#define _ETH_IENC_TXUNDERRUN_SHIFT   4

Shift value for ETH_TXUNDERRUN

Definition at line 906 of file efm32gg11b_eth.h.

#define _ETH_IENC_TXUSEDBITREAD_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_IENC

Definition at line 903 of file efm32gg11b_eth.h.

#define _ETH_IENC_TXUSEDBITREAD_MASK   0x8UL

Bit mask for ETH_TXUSEDBITREAD

Definition at line 902 of file efm32gg11b_eth.h.

#define _ETH_IENC_TXUSEDBITREAD_SHIFT   3

Shift value for ETH_TXUSEDBITREAD

Definition at line 901 of file efm32gg11b_eth.h.

#define _ETH_IENC_WOLEVNTRX_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_IENC

Definition at line 1003 of file efm32gg11b_eth.h.

#define _ETH_IENC_WOLEVNTRX_MASK   0x10000000UL

Bit mask for ETH_WOLEVNTRX

Definition at line 1002 of file efm32gg11b_eth.h.

#define _ETH_IENC_WOLEVNTRX_SHIFT   28

Shift value for ETH_WOLEVNTRX

Definition at line 1001 of file efm32gg11b_eth.h.

#define _ETH_IENRO_AMBAERR_DEFAULT   0x00000001UL

Mode DEFAULT for ETH_IENRO

Definition at line 1047 of file efm32gg11b_eth.h.

#define _ETH_IENRO_AMBAERR_MASK   0x40UL

Bit mask for ETH_AMBAERR

Definition at line 1046 of file efm32gg11b_eth.h.

#define _ETH_IENRO_AMBAERR_SHIFT   6

Shift value for ETH_AMBAERR

Definition at line 1045 of file efm32gg11b_eth.h.

#define _ETH_IENRO_MASK   0x3FFC7DFFUL

Mask for ETH_IENRO

Definition at line 1013 of file efm32gg11b_eth.h.

#define _ETH_IENRO_MNGMNTDONE_DEFAULT   0x00000001UL

Mode DEFAULT for ETH_IENRO

Definition at line 1017 of file efm32gg11b_eth.h.

#define _ETH_IENRO_MNGMNTDONE_MASK   0x1UL

Bit mask for ETH_MNGMNTDONE

Definition at line 1016 of file efm32gg11b_eth.h.

#define _ETH_IENRO_MNGMNTDONE_SHIFT   0

Shift value for ETH_MNGMNTDONE

Definition at line 1015 of file efm32gg11b_eth.h.

#define _ETH_IENRO_NONZEROPFRMQUANT_DEFAULT   0x00000001UL

Mode DEFAULT for ETH_IENRO

Definition at line 1072 of file efm32gg11b_eth.h.

#define _ETH_IENRO_NONZEROPFRMQUANT_MASK   0x1000UL

Bit mask for ETH_NONZEROPFRMQUANT

Definition at line 1071 of file efm32gg11b_eth.h.

#define _ETH_IENRO_NONZEROPFRMQUANT_SHIFT   12

Shift value for ETH_NONZEROPFRMQUANT

Definition at line 1070 of file efm32gg11b_eth.h.

#define _ETH_IENRO_PAUSETIMEZERO_DEFAULT   0x00000001UL

Mode DEFAULT for ETH_IENRO

Definition at line 1077 of file efm32gg11b_eth.h.

#define _ETH_IENRO_PAUSETIMEZERO_MASK   0x2000UL

Bit mask for ETH_PAUSETIMEZERO

Definition at line 1076 of file efm32gg11b_eth.h.

#define _ETH_IENRO_PAUSETIMEZERO_SHIFT   13

Shift value for ETH_PAUSETIMEZERO

Definition at line 1075 of file efm32gg11b_eth.h.

#define _ETH_IENRO_PFRMTX_DEFAULT   0x00000001UL

Mode DEFAULT for ETH_IENRO

Definition at line 1082 of file efm32gg11b_eth.h.

#define _ETH_IENRO_PFRMTX_MASK   0x4000UL

Bit mask for ETH_PFRMTX

Definition at line 1081 of file efm32gg11b_eth.h.

#define _ETH_IENRO_PFRMTX_SHIFT   14

Shift value for ETH_PFRMTX

Definition at line 1080 of file efm32gg11b_eth.h.

#define _ETH_IENRO_PTPDLYREQFRMRX_DEFAULT   0x00000001UL

Mode DEFAULT for ETH_IENRO

Definition at line 1087 of file efm32gg11b_eth.h.

#define _ETH_IENRO_PTPDLYREQFRMRX_MASK   0x40000UL

Bit mask for ETH_PTPDLYREQFRMRX

Definition at line 1086 of file efm32gg11b_eth.h.

#define _ETH_IENRO_PTPDLYREQFRMRX_SHIFT   18

Shift value for ETH_PTPDLYREQFRMRX

Definition at line 1085 of file efm32gg11b_eth.h.

#define _ETH_IENRO_PTPDLYREQFRMTX_DEFAULT   0x00000001UL

Mode DEFAULT for ETH_IENRO

Definition at line 1097 of file efm32gg11b_eth.h.

#define _ETH_IENRO_PTPDLYREQFRMTX_MASK   0x100000UL

Bit mask for ETH_PTPDLYREQFRMTX

Definition at line 1096 of file efm32gg11b_eth.h.

#define _ETH_IENRO_PTPDLYREQFRMTX_SHIFT   20

Shift value for ETH_PTPDLYREQFRMTX

Definition at line 1095 of file efm32gg11b_eth.h.

#define _ETH_IENRO_PTPPDLYREQFRMRX_DEFAULT   0x00000001UL

Mode DEFAULT for ETH_IENRO

Definition at line 1107 of file efm32gg11b_eth.h.

#define _ETH_IENRO_PTPPDLYREQFRMRX_MASK   0x400000UL

Bit mask for ETH_PTPPDLYREQFRMRX

Definition at line 1106 of file efm32gg11b_eth.h.

#define _ETH_IENRO_PTPPDLYREQFRMRX_SHIFT   22

Shift value for ETH_PTPPDLYREQFRMRX

Definition at line 1105 of file efm32gg11b_eth.h.

#define _ETH_IENRO_PTPPDLYREQFRMTX_DEFAULT   0x00000001UL

Mode DEFAULT for ETH_IENRO

Definition at line 1117 of file efm32gg11b_eth.h.

#define _ETH_IENRO_PTPPDLYREQFRMTX_MASK   0x1000000UL

Bit mask for ETH_PTPPDLYREQFRMTX

Definition at line 1116 of file efm32gg11b_eth.h.

#define _ETH_IENRO_PTPPDLYREQFRMTX_SHIFT   24

Shift value for ETH_PTPPDLYREQFRMTX

Definition at line 1115 of file efm32gg11b_eth.h.

#define _ETH_IENRO_PTPPDLYRESPFRMRX_DEFAULT   0x00000001UL

Mode DEFAULT for ETH_IENRO

Definition at line 1112 of file efm32gg11b_eth.h.

#define _ETH_IENRO_PTPPDLYRESPFRMRX_MASK   0x800000UL

Bit mask for ETH_PTPPDLYRESPFRMRX

Definition at line 1111 of file efm32gg11b_eth.h.

#define _ETH_IENRO_PTPPDLYRESPFRMRX_SHIFT   23

Shift value for ETH_PTPPDLYRESPFRMRX

Definition at line 1110 of file efm32gg11b_eth.h.

#define _ETH_IENRO_PTPPDLYRESPFRMTX_DEFAULT   0x00000001UL

Mode DEFAULT for ETH_IENRO

Definition at line 1122 of file efm32gg11b_eth.h.

#define _ETH_IENRO_PTPPDLYRESPFRMTX_MASK   0x2000000UL

Bit mask for ETH_PTPPDLYRESPFRMTX

Definition at line 1121 of file efm32gg11b_eth.h.

#define _ETH_IENRO_PTPPDLYRESPFRMTX_SHIFT   25

Shift value for ETH_PTPPDLYRESPFRMTX

Definition at line 1120 of file efm32gg11b_eth.h.

#define _ETH_IENRO_PTPSYNCFRMRX_DEFAULT   0x00000001UL

Mode DEFAULT for ETH_IENRO

Definition at line 1092 of file efm32gg11b_eth.h.

#define _ETH_IENRO_PTPSYNCFRMRX_MASK   0x80000UL

Bit mask for ETH_PTPSYNCFRMRX

Definition at line 1091 of file efm32gg11b_eth.h.

#define _ETH_IENRO_PTPSYNCFRMRX_SHIFT   19

Shift value for ETH_PTPSYNCFRMRX

Definition at line 1090 of file efm32gg11b_eth.h.

#define _ETH_IENRO_PTPSYNCFRMTX_DEFAULT   0x00000001UL

Mode DEFAULT for ETH_IENRO

Definition at line 1102 of file efm32gg11b_eth.h.

#define _ETH_IENRO_PTPSYNCFRMTX_MASK   0x200000UL

Bit mask for ETH_PTPSYNCFRMTX

Definition at line 1101 of file efm32gg11b_eth.h.

#define _ETH_IENRO_PTPSYNCFRMTX_SHIFT   21

Shift value for ETH_PTPSYNCFRMTX

Definition at line 1100 of file efm32gg11b_eth.h.

#define _ETH_IENRO_RESETVALUE   0x3FFC7DFFUL

Default value for ETH_IENRO

Definition at line 1012 of file efm32gg11b_eth.h.

#define _ETH_IENRO_RESPNOTOK_DEFAULT   0x00000001UL

Mode DEFAULT for ETH_IENRO

Definition at line 1067 of file efm32gg11b_eth.h.

#define _ETH_IENRO_RESPNOTOK_MASK   0x800UL

Bit mask for ETH_RESPNOTOK

Definition at line 1066 of file efm32gg11b_eth.h.

#define _ETH_IENRO_RESPNOTOK_SHIFT   11

Shift value for ETH_RESPNOTOK

Definition at line 1065 of file efm32gg11b_eth.h.

#define _ETH_IENRO_RTRYLMTORLATECOL_DEFAULT   0x00000001UL

Mode DEFAULT for ETH_IENRO

Definition at line 1042 of file efm32gg11b_eth.h.

#define _ETH_IENRO_RTRYLMTORLATECOL_MASK   0x20UL

Bit mask for ETH_RTRYLMTORLATECOL

Definition at line 1041 of file efm32gg11b_eth.h.

#define _ETH_IENRO_RTRYLMTORLATECOL_SHIFT   5

Shift value for ETH_RTRYLMTORLATECOL

Definition at line 1040 of file efm32gg11b_eth.h.

#define _ETH_IENRO_RXCMPLT_DEFAULT   0x00000001UL

Mode DEFAULT for ETH_IENRO

Definition at line 1022 of file efm32gg11b_eth.h.

#define _ETH_IENRO_RXCMPLT_MASK   0x2UL

Bit mask for ETH_RXCMPLT

Definition at line 1021 of file efm32gg11b_eth.h.

#define _ETH_IENRO_RXCMPLT_SHIFT   1

Shift value for ETH_RXCMPLT

Definition at line 1020 of file efm32gg11b_eth.h.

#define _ETH_IENRO_RXLPIINDC_DEFAULT   0x00000001UL

Mode DEFAULT for ETH_IENRO

Definition at line 1132 of file efm32gg11b_eth.h.

#define _ETH_IENRO_RXLPIINDC_MASK   0x8000000UL

Bit mask for ETH_RXLPIINDC

Definition at line 1131 of file efm32gg11b_eth.h.

#define _ETH_IENRO_RXLPIINDC_SHIFT   27

Shift value for ETH_RXLPIINDC

Definition at line 1130 of file efm32gg11b_eth.h.

#define _ETH_IENRO_RXOVERRUN_DEFAULT   0x00000001UL

Mode DEFAULT for ETH_IENRO

Definition at line 1062 of file efm32gg11b_eth.h.

#define _ETH_IENRO_RXOVERRUN_MASK   0x400UL

Bit mask for ETH_RXOVERRUN

Definition at line 1061 of file efm32gg11b_eth.h.

#define _ETH_IENRO_RXOVERRUN_SHIFT   10

Shift value for ETH_RXOVERRUN

Definition at line 1060 of file efm32gg11b_eth.h.

#define _ETH_IENRO_RXUSEDBITREAD_DEFAULT   0x00000001UL

Mode DEFAULT for ETH_IENRO

Definition at line 1027 of file efm32gg11b_eth.h.

#define _ETH_IENRO_RXUSEDBITREAD_MASK   0x4UL

Bit mask for ETH_RXUSEDBITREAD

Definition at line 1026 of file efm32gg11b_eth.h.

#define _ETH_IENRO_RXUSEDBITREAD_SHIFT   2

Shift value for ETH_RXUSEDBITREAD

Definition at line 1025 of file efm32gg11b_eth.h.

#define _ETH_IENRO_TSUSECREGINCR_DEFAULT   0x00000001UL

Mode DEFAULT for ETH_IENRO

Definition at line 1127 of file efm32gg11b_eth.h.

#define _ETH_IENRO_TSUSECREGINCR_MASK   0x4000000UL

Bit mask for ETH_TSUSECREGINCR

Definition at line 1126 of file efm32gg11b_eth.h.

#define _ETH_IENRO_TSUSECREGINCR_SHIFT   26

Shift value for ETH_TSUSECREGINCR

Definition at line 1125 of file efm32gg11b_eth.h.

#define _ETH_IENRO_TSUTIMERCOMP_DEFAULT   0x00000001UL

Mode DEFAULT for ETH_IENRO

Definition at line 1142 of file efm32gg11b_eth.h.

#define _ETH_IENRO_TSUTIMERCOMP_MASK   0x20000000UL

Bit mask for ETH_TSUTIMERCOMP

Definition at line 1141 of file efm32gg11b_eth.h.

#define _ETH_IENRO_TSUTIMERCOMP_SHIFT   29

Shift value for ETH_TSUTIMERCOMP

Definition at line 1140 of file efm32gg11b_eth.h.

#define _ETH_IENRO_TXCMPLT_DEFAULT   0x00000001UL

Mode DEFAULT for ETH_IENRO

Definition at line 1052 of file efm32gg11b_eth.h.

#define _ETH_IENRO_TXCMPLT_MASK   0x80UL

Bit mask for ETH_TXCMPLT

Definition at line 1051 of file efm32gg11b_eth.h.

#define _ETH_IENRO_TXCMPLT_SHIFT   7

Shift value for ETH_TXCMPLT

Definition at line 1050 of file efm32gg11b_eth.h.

#define _ETH_IENRO_TXUNDERRUN_DEFAULT   0x00000001UL

Mode DEFAULT for ETH_IENRO

Definition at line 1037 of file efm32gg11b_eth.h.

#define _ETH_IENRO_TXUNDERRUN_MASK   0x10UL

Bit mask for ETH_TXUNDERRUN

Definition at line 1036 of file efm32gg11b_eth.h.

#define _ETH_IENRO_TXUNDERRUN_SHIFT   4

Shift value for ETH_TXUNDERRUN

Definition at line 1035 of file efm32gg11b_eth.h.

#define _ETH_IENRO_TXUSEDBITREAD_DEFAULT   0x00000001UL

Mode DEFAULT for ETH_IENRO

Definition at line 1032 of file efm32gg11b_eth.h.

#define _ETH_IENRO_TXUSEDBITREAD_MASK   0x8UL

Bit mask for ETH_TXUSEDBITREAD

Definition at line 1031 of file efm32gg11b_eth.h.

#define _ETH_IENRO_TXUSEDBITREAD_SHIFT   3

Shift value for ETH_TXUSEDBITREAD

Definition at line 1030 of file efm32gg11b_eth.h.

#define _ETH_IENRO_UNUSED_DEFAULT   0x00000001UL

Mode DEFAULT for ETH_IENRO

Definition at line 1057 of file efm32gg11b_eth.h.

#define _ETH_IENRO_UNUSED_MASK   0x100UL

Bit mask for ETH_UNUSED

Definition at line 1056 of file efm32gg11b_eth.h.

#define _ETH_IENRO_UNUSED_SHIFT   8

Shift value for ETH_UNUSED

Definition at line 1055 of file efm32gg11b_eth.h.

#define _ETH_IENRO_WOLEVNTRX_DEFAULT   0x00000001UL

Mode DEFAULT for ETH_IENRO

Definition at line 1137 of file efm32gg11b_eth.h.

#define _ETH_IENRO_WOLEVNTRX_MASK   0x10000000UL

Bit mask for ETH_WOLEVNTRX

Definition at line 1136 of file efm32gg11b_eth.h.

#define _ETH_IENRO_WOLEVNTRX_SHIFT   28

Shift value for ETH_WOLEVNTRX

Definition at line 1135 of file efm32gg11b_eth.h.

#define _ETH_IENS_AMBAERR_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_IENS

Definition at line 789 of file efm32gg11b_eth.h.

#define _ETH_IENS_AMBAERR_MASK   0x40UL

Bit mask for ETH_AMBAERR

Definition at line 788 of file efm32gg11b_eth.h.

#define _ETH_IENS_AMBAERR_SHIFT   6

Shift value for ETH_AMBAERR

Definition at line 787 of file efm32gg11b_eth.h.

#define _ETH_IENS_MASK   0x3FFC7CFFUL

Mask for ETH_IENS

Definition at line 755 of file efm32gg11b_eth.h.

#define _ETH_IENS_MNGMNTDONE_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_IENS

Definition at line 759 of file efm32gg11b_eth.h.

#define _ETH_IENS_MNGMNTDONE_MASK   0x1UL

Bit mask for ETH_MNGMNTDONE

Definition at line 758 of file efm32gg11b_eth.h.

#define _ETH_IENS_MNGMNTDONE_SHIFT   0

Shift value for ETH_MNGMNTDONE

Definition at line 757 of file efm32gg11b_eth.h.

#define _ETH_IENS_NONZEROPFRMQUANT_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_IENS

Definition at line 809 of file efm32gg11b_eth.h.

#define _ETH_IENS_NONZEROPFRMQUANT_MASK   0x1000UL

Bit mask for ETH_NONZEROPFRMQUANT

Definition at line 808 of file efm32gg11b_eth.h.

#define _ETH_IENS_NONZEROPFRMQUANT_SHIFT   12

Shift value for ETH_NONZEROPFRMQUANT

Definition at line 807 of file efm32gg11b_eth.h.

#define _ETH_IENS_PAUSETIMEZERO_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_IENS

Definition at line 814 of file efm32gg11b_eth.h.

#define _ETH_IENS_PAUSETIMEZERO_MASK   0x2000UL

Bit mask for ETH_PAUSETIMEZERO

Definition at line 813 of file efm32gg11b_eth.h.

#define _ETH_IENS_PAUSETIMEZERO_SHIFT   13

Shift value for ETH_PAUSETIMEZERO

Definition at line 812 of file efm32gg11b_eth.h.

#define _ETH_IENS_PFRMTX_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_IENS

Definition at line 819 of file efm32gg11b_eth.h.

#define _ETH_IENS_PFRMTX_MASK   0x4000UL

Bit mask for ETH_PFRMTX

Definition at line 818 of file efm32gg11b_eth.h.

#define _ETH_IENS_PFRMTX_SHIFT   14

Shift value for ETH_PFRMTX

Definition at line 817 of file efm32gg11b_eth.h.

#define _ETH_IENS_PTPDLYREQFRMRX_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_IENS

Definition at line 824 of file efm32gg11b_eth.h.

#define _ETH_IENS_PTPDLYREQFRMRX_MASK   0x40000UL

Bit mask for ETH_PTPDLYREQFRMRX

Definition at line 823 of file efm32gg11b_eth.h.

#define _ETH_IENS_PTPDLYREQFRMRX_SHIFT   18

Shift value for ETH_PTPDLYREQFRMRX

Definition at line 822 of file efm32gg11b_eth.h.

#define _ETH_IENS_PTPDLYREQFRMTX_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_IENS

Definition at line 834 of file efm32gg11b_eth.h.

#define _ETH_IENS_PTPDLYREQFRMTX_MASK   0x100000UL

Bit mask for ETH_PTPDLYREQFRMTX

Definition at line 833 of file efm32gg11b_eth.h.

#define _ETH_IENS_PTPDLYREQFRMTX_SHIFT   20

Shift value for ETH_PTPDLYREQFRMTX

Definition at line 832 of file efm32gg11b_eth.h.

#define _ETH_IENS_PTPPDLYREQFRMRX_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_IENS

Definition at line 844 of file efm32gg11b_eth.h.

#define _ETH_IENS_PTPPDLYREQFRMRX_MASK   0x400000UL

Bit mask for ETH_PTPPDLYREQFRMRX

Definition at line 843 of file efm32gg11b_eth.h.

#define _ETH_IENS_PTPPDLYREQFRMRX_SHIFT   22

Shift value for ETH_PTPPDLYREQFRMRX

Definition at line 842 of file efm32gg11b_eth.h.

#define _ETH_IENS_PTPPDLYREQFRMTX_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_IENS

Definition at line 854 of file efm32gg11b_eth.h.

#define _ETH_IENS_PTPPDLYREQFRMTX_MASK   0x1000000UL

Bit mask for ETH_PTPPDLYREQFRMTX

Definition at line 853 of file efm32gg11b_eth.h.

#define _ETH_IENS_PTPPDLYREQFRMTX_SHIFT   24

Shift value for ETH_PTPPDLYREQFRMTX

Definition at line 852 of file efm32gg11b_eth.h.

#define _ETH_IENS_PTPPDLYRESPFRMRX_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_IENS

Definition at line 849 of file efm32gg11b_eth.h.

#define _ETH_IENS_PTPPDLYRESPFRMRX_MASK   0x800000UL

Bit mask for ETH_PTPPDLYRESPFRMRX

Definition at line 848 of file efm32gg11b_eth.h.

#define _ETH_IENS_PTPPDLYRESPFRMRX_SHIFT   23

Shift value for ETH_PTPPDLYRESPFRMRX

Definition at line 847 of file efm32gg11b_eth.h.

#define _ETH_IENS_PTPPDLYRESPFRMTX_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_IENS

Definition at line 859 of file efm32gg11b_eth.h.

#define _ETH_IENS_PTPPDLYRESPFRMTX_MASK   0x2000000UL

Bit mask for ETH_PTPPDLYRESPFRMTX

Definition at line 858 of file efm32gg11b_eth.h.

#define _ETH_IENS_PTPPDLYRESPFRMTX_SHIFT   25

Shift value for ETH_PTPPDLYRESPFRMTX

Definition at line 857 of file efm32gg11b_eth.h.

#define _ETH_IENS_PTPSYNCFRMRX_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_IENS

Definition at line 829 of file efm32gg11b_eth.h.

#define _ETH_IENS_PTPSYNCFRMRX_MASK   0x80000UL

Bit mask for ETH_PTPSYNCFRMRX

Definition at line 828 of file efm32gg11b_eth.h.

#define _ETH_IENS_PTPSYNCFRMRX_SHIFT   19

Shift value for ETH_PTPSYNCFRMRX

Definition at line 827 of file efm32gg11b_eth.h.

#define _ETH_IENS_PTPSYNCFRMTX_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_IENS

Definition at line 839 of file efm32gg11b_eth.h.

#define _ETH_IENS_PTPSYNCFRMTX_MASK   0x200000UL

Bit mask for ETH_PTPSYNCFRMTX

Definition at line 838 of file efm32gg11b_eth.h.

#define _ETH_IENS_PTPSYNCFRMTX_SHIFT   21

Shift value for ETH_PTPSYNCFRMTX

Definition at line 837 of file efm32gg11b_eth.h.

#define _ETH_IENS_RESETVALUE   0x00000000UL

Default value for ETH_IENS

Definition at line 754 of file efm32gg11b_eth.h.

#define _ETH_IENS_RESPNOTOK_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_IENS

Definition at line 804 of file efm32gg11b_eth.h.

#define _ETH_IENS_RESPNOTOK_MASK   0x800UL

Bit mask for ETH_RESPNOTOK

Definition at line 803 of file efm32gg11b_eth.h.

#define _ETH_IENS_RESPNOTOK_SHIFT   11

Shift value for ETH_RESPNOTOK

Definition at line 802 of file efm32gg11b_eth.h.

#define _ETH_IENS_RTRYLMTORLATECOL_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_IENS

Definition at line 784 of file efm32gg11b_eth.h.

#define _ETH_IENS_RTRYLMTORLATECOL_MASK   0x20UL

Bit mask for ETH_RTRYLMTORLATECOL

Definition at line 783 of file efm32gg11b_eth.h.

#define _ETH_IENS_RTRYLMTORLATECOL_SHIFT   5

Shift value for ETH_RTRYLMTORLATECOL

Definition at line 782 of file efm32gg11b_eth.h.

#define _ETH_IENS_RXCMPLT_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_IENS

Definition at line 764 of file efm32gg11b_eth.h.

#define _ETH_IENS_RXCMPLT_MASK   0x2UL

Bit mask for ETH_RXCMPLT

Definition at line 763 of file efm32gg11b_eth.h.

#define _ETH_IENS_RXCMPLT_SHIFT   1

Shift value for ETH_RXCMPLT

Definition at line 762 of file efm32gg11b_eth.h.

#define _ETH_IENS_RXLPIINDC_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_IENS

Definition at line 869 of file efm32gg11b_eth.h.

#define _ETH_IENS_RXLPIINDC_MASK   0x8000000UL

Bit mask for ETH_RXLPIINDC

Definition at line 868 of file efm32gg11b_eth.h.

#define _ETH_IENS_RXLPIINDC_SHIFT   27

Shift value for ETH_RXLPIINDC

Definition at line 867 of file efm32gg11b_eth.h.

#define _ETH_IENS_RXOVERRUN_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_IENS

Definition at line 799 of file efm32gg11b_eth.h.

#define _ETH_IENS_RXOVERRUN_MASK   0x400UL

Bit mask for ETH_RXOVERRUN

Definition at line 798 of file efm32gg11b_eth.h.

#define _ETH_IENS_RXOVERRUN_SHIFT   10

Shift value for ETH_RXOVERRUN

Definition at line 797 of file efm32gg11b_eth.h.

#define _ETH_IENS_RXUSEDBITREAD_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_IENS

Definition at line 769 of file efm32gg11b_eth.h.

#define _ETH_IENS_RXUSEDBITREAD_MASK   0x4UL

Bit mask for ETH_RXUSEDBITREAD

Definition at line 768 of file efm32gg11b_eth.h.

#define _ETH_IENS_RXUSEDBITREAD_SHIFT   2

Shift value for ETH_RXUSEDBITREAD

Definition at line 767 of file efm32gg11b_eth.h.

#define _ETH_IENS_TSUSECREGINCR_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_IENS

Definition at line 864 of file efm32gg11b_eth.h.

#define _ETH_IENS_TSUSECREGINCR_MASK   0x4000000UL

Bit mask for ETH_TSUSECREGINCR

Definition at line 863 of file efm32gg11b_eth.h.

#define _ETH_IENS_TSUSECREGINCR_SHIFT   26

Shift value for ETH_TSUSECREGINCR

Definition at line 862 of file efm32gg11b_eth.h.

#define _ETH_IENS_TSUTIMERCOMP_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_IENS

Definition at line 879 of file efm32gg11b_eth.h.

#define _ETH_IENS_TSUTIMERCOMP_MASK   0x20000000UL

Bit mask for ETH_TSUTIMERCOMP

Definition at line 878 of file efm32gg11b_eth.h.

#define _ETH_IENS_TSUTIMERCOMP_SHIFT   29

Shift value for ETH_TSUTIMERCOMP

Definition at line 877 of file efm32gg11b_eth.h.

#define _ETH_IENS_TXCMPLT_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_IENS

Definition at line 794 of file efm32gg11b_eth.h.

#define _ETH_IENS_TXCMPLT_MASK   0x80UL

Bit mask for ETH_TXCMPLT

Definition at line 793 of file efm32gg11b_eth.h.

#define _ETH_IENS_TXCMPLT_SHIFT   7

Shift value for ETH_TXCMPLT

Definition at line 792 of file efm32gg11b_eth.h.

#define _ETH_IENS_TXUNDERRUN_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_IENS

Definition at line 779 of file efm32gg11b_eth.h.

#define _ETH_IENS_TXUNDERRUN_MASK   0x10UL

Bit mask for ETH_TXUNDERRUN

Definition at line 778 of file efm32gg11b_eth.h.

#define _ETH_IENS_TXUNDERRUN_SHIFT   4

Shift value for ETH_TXUNDERRUN

Definition at line 777 of file efm32gg11b_eth.h.

#define _ETH_IENS_TXUSEDBITREAD_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_IENS

Definition at line 774 of file efm32gg11b_eth.h.

#define _ETH_IENS_TXUSEDBITREAD_MASK   0x8UL

Bit mask for ETH_TXUSEDBITREAD

Definition at line 773 of file efm32gg11b_eth.h.

#define _ETH_IENS_TXUSEDBITREAD_SHIFT   3

Shift value for ETH_TXUSEDBITREAD

Definition at line 772 of file efm32gg11b_eth.h.

#define _ETH_IENS_WOLEVNTRX_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_IENS

Definition at line 874 of file efm32gg11b_eth.h.

#define _ETH_IENS_WOLEVNTRX_MASK   0x10000000UL

Bit mask for ETH_WOLEVNTRX

Definition at line 873 of file efm32gg11b_eth.h.

#define _ETH_IENS_WOLEVNTRX_SHIFT   28

Shift value for ETH_WOLEVNTRX

Definition at line 872 of file efm32gg11b_eth.h.

#define _ETH_IFCR_AMBAERR_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_IFCR

Definition at line 660 of file efm32gg11b_eth.h.

#define _ETH_IFCR_AMBAERR_MASK   0x40UL

Bit mask for ETH_AMBAERR

Definition at line 659 of file efm32gg11b_eth.h.

#define _ETH_IFCR_AMBAERR_SHIFT   6

Shift value for ETH_AMBAERR

Definition at line 658 of file efm32gg11b_eth.h.

#define _ETH_IFCR_MASK   0x3FFC7CFFUL

Mask for ETH_IFCR

Definition at line 626 of file efm32gg11b_eth.h.

#define _ETH_IFCR_MNGMNTDONE_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_IFCR

Definition at line 630 of file efm32gg11b_eth.h.

#define _ETH_IFCR_MNGMNTDONE_MASK   0x1UL

Bit mask for ETH_MNGMNTDONE

Definition at line 629 of file efm32gg11b_eth.h.

#define _ETH_IFCR_MNGMNTDONE_SHIFT   0

Shift value for ETH_MNGMNTDONE

Definition at line 628 of file efm32gg11b_eth.h.

#define _ETH_IFCR_NONZEROPFRMQUANT_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_IFCR

Definition at line 680 of file efm32gg11b_eth.h.

#define _ETH_IFCR_NONZEROPFRMQUANT_MASK   0x1000UL

Bit mask for ETH_NONZEROPFRMQUANT

Definition at line 679 of file efm32gg11b_eth.h.

#define _ETH_IFCR_NONZEROPFRMQUANT_SHIFT   12

Shift value for ETH_NONZEROPFRMQUANT

Definition at line 678 of file efm32gg11b_eth.h.

#define _ETH_IFCR_PAUSETIMEZERO_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_IFCR

Definition at line 685 of file efm32gg11b_eth.h.

#define _ETH_IFCR_PAUSETIMEZERO_MASK   0x2000UL

Bit mask for ETH_PAUSETIMEZERO

Definition at line 684 of file efm32gg11b_eth.h.

#define _ETH_IFCR_PAUSETIMEZERO_SHIFT   13

Shift value for ETH_PAUSETIMEZERO

Definition at line 683 of file efm32gg11b_eth.h.

#define _ETH_IFCR_PFRMTX_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_IFCR

Definition at line 690 of file efm32gg11b_eth.h.

#define _ETH_IFCR_PFRMTX_MASK   0x4000UL

Bit mask for ETH_PFRMTX

Definition at line 689 of file efm32gg11b_eth.h.

#define _ETH_IFCR_PFRMTX_SHIFT   14

Shift value for ETH_PFRMTX

Definition at line 688 of file efm32gg11b_eth.h.

#define _ETH_IFCR_PTPDLYREQFRMRX_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_IFCR

Definition at line 695 of file efm32gg11b_eth.h.

#define _ETH_IFCR_PTPDLYREQFRMRX_MASK   0x40000UL

Bit mask for ETH_PTPDLYREQFRMRX

Definition at line 694 of file efm32gg11b_eth.h.

#define _ETH_IFCR_PTPDLYREQFRMRX_SHIFT   18

Shift value for ETH_PTPDLYREQFRMRX

Definition at line 693 of file efm32gg11b_eth.h.

#define _ETH_IFCR_PTPDLYREQFRMTX_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_IFCR

Definition at line 705 of file efm32gg11b_eth.h.

#define _ETH_IFCR_PTPDLYREQFRMTX_MASK   0x100000UL

Bit mask for ETH_PTPDLYREQFRMTX

Definition at line 704 of file efm32gg11b_eth.h.

#define _ETH_IFCR_PTPDLYREQFRMTX_SHIFT   20

Shift value for ETH_PTPDLYREQFRMTX

Definition at line 703 of file efm32gg11b_eth.h.

#define _ETH_IFCR_PTPPDLYREQFRMRX_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_IFCR

Definition at line 715 of file efm32gg11b_eth.h.

#define _ETH_IFCR_PTPPDLYREQFRMRX_MASK   0x400000UL

Bit mask for ETH_PTPPDLYREQFRMRX

Definition at line 714 of file efm32gg11b_eth.h.

#define _ETH_IFCR_PTPPDLYREQFRMRX_SHIFT   22

Shift value for ETH_PTPPDLYREQFRMRX

Definition at line 713 of file efm32gg11b_eth.h.

#define _ETH_IFCR_PTPPDLYREQFRMTX_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_IFCR

Definition at line 725 of file efm32gg11b_eth.h.

#define _ETH_IFCR_PTPPDLYREQFRMTX_MASK   0x1000000UL

Bit mask for ETH_PTPPDLYREQFRMTX

Definition at line 724 of file efm32gg11b_eth.h.

#define _ETH_IFCR_PTPPDLYREQFRMTX_SHIFT   24

Shift value for ETH_PTPPDLYREQFRMTX

Definition at line 723 of file efm32gg11b_eth.h.

#define _ETH_IFCR_PTPPDLYRESPFRMRX_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_IFCR

Definition at line 720 of file efm32gg11b_eth.h.

#define _ETH_IFCR_PTPPDLYRESPFRMRX_MASK   0x800000UL

Bit mask for ETH_PTPPDLYRESPFRMRX

Definition at line 719 of file efm32gg11b_eth.h.

#define _ETH_IFCR_PTPPDLYRESPFRMRX_SHIFT   23

Shift value for ETH_PTPPDLYRESPFRMRX

Definition at line 718 of file efm32gg11b_eth.h.

#define _ETH_IFCR_PTPPDLYRESPFRMTX_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_IFCR

Definition at line 730 of file efm32gg11b_eth.h.

#define _ETH_IFCR_PTPPDLYRESPFRMTX_MASK   0x2000000UL

Bit mask for ETH_PTPPDLYRESPFRMTX

Definition at line 729 of file efm32gg11b_eth.h.

#define _ETH_IFCR_PTPPDLYRESPFRMTX_SHIFT   25

Shift value for ETH_PTPPDLYRESPFRMTX

Definition at line 728 of file efm32gg11b_eth.h.

#define _ETH_IFCR_PTPSYNCFRMRX_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_IFCR

Definition at line 700 of file efm32gg11b_eth.h.

#define _ETH_IFCR_PTPSYNCFRMRX_MASK   0x80000UL

Bit mask for ETH_PTPSYNCFRMRX

Definition at line 699 of file efm32gg11b_eth.h.

#define _ETH_IFCR_PTPSYNCFRMRX_SHIFT   19

Shift value for ETH_PTPSYNCFRMRX

Definition at line 698 of file efm32gg11b_eth.h.

#define _ETH_IFCR_PTPSYNCFRMTX_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_IFCR

Definition at line 710 of file efm32gg11b_eth.h.

#define _ETH_IFCR_PTPSYNCFRMTX_MASK   0x200000UL

Bit mask for ETH_PTPSYNCFRMTX

Definition at line 709 of file efm32gg11b_eth.h.

#define _ETH_IFCR_PTPSYNCFRMTX_SHIFT   21

Shift value for ETH_PTPSYNCFRMTX

Definition at line 708 of file efm32gg11b_eth.h.

#define _ETH_IFCR_RESETVALUE   0x00000000UL

Default value for ETH_IFCR

Definition at line 625 of file efm32gg11b_eth.h.

#define _ETH_IFCR_RESPNOTOK_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_IFCR

Definition at line 675 of file efm32gg11b_eth.h.

#define _ETH_IFCR_RESPNOTOK_MASK   0x800UL

Bit mask for ETH_RESPNOTOK

Definition at line 674 of file efm32gg11b_eth.h.

#define _ETH_IFCR_RESPNOTOK_SHIFT   11

Shift value for ETH_RESPNOTOK

Definition at line 673 of file efm32gg11b_eth.h.

#define _ETH_IFCR_RTRYLMTORLATECOL_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_IFCR

Definition at line 655 of file efm32gg11b_eth.h.

#define _ETH_IFCR_RTRYLMTORLATECOL_MASK   0x20UL

Bit mask for ETH_RTRYLMTORLATECOL

Definition at line 654 of file efm32gg11b_eth.h.

#define _ETH_IFCR_RTRYLMTORLATECOL_SHIFT   5

Shift value for ETH_RTRYLMTORLATECOL

Definition at line 653 of file efm32gg11b_eth.h.

#define _ETH_IFCR_RXCMPLT_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_IFCR

Definition at line 635 of file efm32gg11b_eth.h.

#define _ETH_IFCR_RXCMPLT_MASK   0x2UL

Bit mask for ETH_RXCMPLT

Definition at line 634 of file efm32gg11b_eth.h.

#define _ETH_IFCR_RXCMPLT_SHIFT   1

Shift value for ETH_RXCMPLT

Definition at line 633 of file efm32gg11b_eth.h.

#define _ETH_IFCR_RXLPIINDC_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_IFCR

Definition at line 740 of file efm32gg11b_eth.h.

#define _ETH_IFCR_RXLPIINDC_MASK   0x8000000UL

Bit mask for ETH_RXLPIINDC

Definition at line 739 of file efm32gg11b_eth.h.

#define _ETH_IFCR_RXLPIINDC_SHIFT   27

Shift value for ETH_RXLPIINDC

Definition at line 738 of file efm32gg11b_eth.h.

#define _ETH_IFCR_RXOVERRUN_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_IFCR

Definition at line 670 of file efm32gg11b_eth.h.

#define _ETH_IFCR_RXOVERRUN_MASK   0x400UL

Bit mask for ETH_RXOVERRUN

Definition at line 669 of file efm32gg11b_eth.h.

#define _ETH_IFCR_RXOVERRUN_SHIFT   10

Shift value for ETH_RXOVERRUN

Definition at line 668 of file efm32gg11b_eth.h.

#define _ETH_IFCR_RXUSEDBITREAD_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_IFCR

Definition at line 640 of file efm32gg11b_eth.h.

#define _ETH_IFCR_RXUSEDBITREAD_MASK   0x4UL

Bit mask for ETH_RXUSEDBITREAD

Definition at line 639 of file efm32gg11b_eth.h.

#define _ETH_IFCR_RXUSEDBITREAD_SHIFT   2

Shift value for ETH_RXUSEDBITREAD

Definition at line 638 of file efm32gg11b_eth.h.

#define _ETH_IFCR_TSUSECREGINCR_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_IFCR

Definition at line 735 of file efm32gg11b_eth.h.

#define _ETH_IFCR_TSUSECREGINCR_MASK   0x4000000UL

Bit mask for ETH_TSUSECREGINCR

Definition at line 734 of file efm32gg11b_eth.h.

#define _ETH_IFCR_TSUSECREGINCR_SHIFT   26

Shift value for ETH_TSUSECREGINCR

Definition at line 733 of file efm32gg11b_eth.h.

#define _ETH_IFCR_TSUTIMERCOMP_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_IFCR

Definition at line 750 of file efm32gg11b_eth.h.

#define _ETH_IFCR_TSUTIMERCOMP_MASK   0x20000000UL

Bit mask for ETH_TSUTIMERCOMP

Definition at line 749 of file efm32gg11b_eth.h.

#define _ETH_IFCR_TSUTIMERCOMP_SHIFT   29

Shift value for ETH_TSUTIMERCOMP

Definition at line 748 of file efm32gg11b_eth.h.

#define _ETH_IFCR_TXCMPLT_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_IFCR

Definition at line 665 of file efm32gg11b_eth.h.

#define _ETH_IFCR_TXCMPLT_MASK   0x80UL

Bit mask for ETH_TXCMPLT

Definition at line 664 of file efm32gg11b_eth.h.

#define _ETH_IFCR_TXCMPLT_SHIFT   7

Shift value for ETH_TXCMPLT

Definition at line 663 of file efm32gg11b_eth.h.

#define _ETH_IFCR_TXUNDERRUN_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_IFCR

Definition at line 650 of file efm32gg11b_eth.h.

#define _ETH_IFCR_TXUNDERRUN_MASK   0x10UL

Bit mask for ETH_TXUNDERRUN

Definition at line 649 of file efm32gg11b_eth.h.

#define _ETH_IFCR_TXUNDERRUN_SHIFT   4

Shift value for ETH_TXUNDERRUN

Definition at line 648 of file efm32gg11b_eth.h.

#define _ETH_IFCR_TXUSEDBITREAD_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_IFCR

Definition at line 645 of file efm32gg11b_eth.h.

#define _ETH_IFCR_TXUSEDBITREAD_MASK   0x8UL

Bit mask for ETH_TXUSEDBITREAD

Definition at line 644 of file efm32gg11b_eth.h.

#define _ETH_IFCR_TXUSEDBITREAD_SHIFT   3

Shift value for ETH_TXUSEDBITREAD

Definition at line 643 of file efm32gg11b_eth.h.

#define _ETH_IFCR_WOLEVNTRX_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_IFCR

Definition at line 745 of file efm32gg11b_eth.h.

#define _ETH_IFCR_WOLEVNTRX_MASK   0x10000000UL

Bit mask for ETH_WOLEVNTRX

Definition at line 744 of file efm32gg11b_eth.h.

#define _ETH_IFCR_WOLEVNTRX_SHIFT   28

Shift value for ETH_WOLEVNTRX

Definition at line 743 of file efm32gg11b_eth.h.

#define _ETH_IMOD_MASK   0x00FF00FFUL

Mask for ETH_IMOD

Definition at line 1235 of file efm32gg11b_eth.h.

#define _ETH_IMOD_RESETVALUE   0x00000000UL

Default value for ETH_IMOD

Definition at line 1234 of file efm32gg11b_eth.h.

#define _ETH_IMOD_RXINTMOD_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_IMOD

Definition at line 1238 of file efm32gg11b_eth.h.

#define _ETH_IMOD_RXINTMOD_MASK   0xFFUL

Bit mask for ETH_RXINTMOD

Definition at line 1237 of file efm32gg11b_eth.h.

#define _ETH_IMOD_RXINTMOD_SHIFT   0

Shift value for ETH_RXINTMOD

Definition at line 1236 of file efm32gg11b_eth.h.

#define _ETH_IMOD_TXINTMOD_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_IMOD

Definition at line 1242 of file efm32gg11b_eth.h.

#define _ETH_IMOD_TXINTMOD_MASK   0xFF0000UL

Bit mask for ETH_TXINTMOD

Definition at line 1241 of file efm32gg11b_eth.h.

#define _ETH_IMOD_TXINTMOD_SHIFT   16

Shift value for ETH_TXINTMOD

Definition at line 1240 of file efm32gg11b_eth.h.

#define _ETH_JUMBOMAXLEN_JUMBOMAXLEN_DEFAULT   0x00002800UL

Mode DEFAULT for ETH_JUMBOMAXLEN

Definition at line 1230 of file efm32gg11b_eth.h.

#define _ETH_JUMBOMAXLEN_JUMBOMAXLEN_MASK   0x3FFFUL

Bit mask for ETH_JUMBOMAXLEN

Definition at line 1229 of file efm32gg11b_eth.h.

#define _ETH_JUMBOMAXLEN_JUMBOMAXLEN_SHIFT   0

Shift value for ETH_JUMBOMAXLEN

Definition at line 1228 of file efm32gg11b_eth.h.

#define _ETH_JUMBOMAXLEN_MASK   0x00003FFFUL

Mask for ETH_JUMBOMAXLEN

Definition at line 1227 of file efm32gg11b_eth.h.

#define _ETH_JUMBOMAXLEN_RESETVALUE   0x00002800UL

Default value for ETH_JUMBOMAXLEN

Definition at line 1226 of file efm32gg11b_eth.h.

#define _ETH_LATECOLS_COUNT_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_LATECOLS

Definition at line 1723 of file efm32gg11b_eth.h.

#define _ETH_LATECOLS_COUNT_MASK   0x3FFUL

Bit mask for ETH_COUNT

Definition at line 1722 of file efm32gg11b_eth.h.

#define _ETH_LATECOLS_COUNT_SHIFT   0

Shift value for ETH_COUNT

Definition at line 1721 of file efm32gg11b_eth.h.

#define _ETH_LATECOLS_MASK   0x000003FFUL

Mask for ETH_LATECOLS

Definition at line 1720 of file efm32gg11b_eth.h.

#define _ETH_LATECOLS_RESETVALUE   0x00000000UL

Default value for ETH_LATECOLS

Definition at line 1719 of file efm32gg11b_eth.h.

#define _ETH_MASKADD1BOTTOM_ADDRMASK_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_MASKADD1BOTTOM

Definition at line 1499 of file efm32gg11b_eth.h.

#define _ETH_MASKADD1BOTTOM_ADDRMASK_MASK   0xFFFFFFFFUL

Bit mask for ETH_ADDRMASK

Definition at line 1498 of file efm32gg11b_eth.h.

#define _ETH_MASKADD1BOTTOM_ADDRMASK_SHIFT   0

Shift value for ETH_ADDRMASK

Definition at line 1497 of file efm32gg11b_eth.h.

#define _ETH_MASKADD1BOTTOM_MASK   0xFFFFFFFFUL

Mask for ETH_MASKADD1BOTTOM

Definition at line 1496 of file efm32gg11b_eth.h.

#define _ETH_MASKADD1BOTTOM_RESETVALUE   0x00000000UL

Default value for ETH_MASKADD1BOTTOM

Definition at line 1495 of file efm32gg11b_eth.h.

#define _ETH_MASKADD1TOP_ADDRMASK_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_MASKADD1TOP

Definition at line 1507 of file efm32gg11b_eth.h.

#define _ETH_MASKADD1TOP_ADDRMASK_MASK   0xFFFFUL

Bit mask for ETH_ADDRMASK

Definition at line 1506 of file efm32gg11b_eth.h.

#define _ETH_MASKADD1TOP_ADDRMASK_SHIFT   0

Shift value for ETH_ADDRMASK

Definition at line 1505 of file efm32gg11b_eth.h.

#define _ETH_MASKADD1TOP_MASK   0x0000FFFFUL

Mask for ETH_MASKADD1TOP

Definition at line 1504 of file efm32gg11b_eth.h.

#define _ETH_MASKADD1TOP_RESETVALUE   0x00000000UL

Default value for ETH_MASKADD1TOP

Definition at line 1503 of file efm32gg11b_eth.h.

#define _ETH_MULTICASTRXED_COUNT_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_MULTICASTRXED

Definition at line 1779 of file efm32gg11b_eth.h.

#define _ETH_MULTICASTRXED_COUNT_MASK   0xFFFFFFFFUL

Bit mask for ETH_COUNT

Definition at line 1778 of file efm32gg11b_eth.h.

#define _ETH_MULTICASTRXED_COUNT_SHIFT   0

Shift value for ETH_COUNT

Definition at line 1777 of file efm32gg11b_eth.h.

#define _ETH_MULTICASTRXED_MASK   0xFFFFFFFFUL

Mask for ETH_MULTICASTRXED

Definition at line 1776 of file efm32gg11b_eth.h.

#define _ETH_MULTICASTRXED_RESETVALUE   0x00000000UL

Default value for ETH_MULTICASTRXED

Definition at line 1775 of file efm32gg11b_eth.h.

#define _ETH_MULTICASTTXED_COUNT_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_MULTICASTTXED

Definition at line 1619 of file efm32gg11b_eth.h.

#define _ETH_MULTICASTTXED_COUNT_MASK   0xFFFFFFFFUL

Bit mask for ETH_COUNT

Definition at line 1618 of file efm32gg11b_eth.h.

#define _ETH_MULTICASTTXED_COUNT_SHIFT   0

Shift value for ETH_COUNT

Definition at line 1617 of file efm32gg11b_eth.h.

#define _ETH_MULTICASTTXED_MASK   0xFFFFFFFFUL

Mask for ETH_MULTICASTTXED

Definition at line 1616 of file efm32gg11b_eth.h.

#define _ETH_MULTICASTTXED_RESETVALUE   0x00000000UL

Default value for ETH_MULTICASTTXED

Definition at line 1615 of file efm32gg11b_eth.h.

#define _ETH_MULTICOLS_COUNT_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_MULTICOLS

Definition at line 1707 of file efm32gg11b_eth.h.

#define _ETH_MULTICOLS_COUNT_MASK   0x3FFFFUL

Bit mask for ETH_COUNT

Definition at line 1706 of file efm32gg11b_eth.h.

#define _ETH_MULTICOLS_COUNT_SHIFT   0

Shift value for ETH_COUNT

Definition at line 1705 of file efm32gg11b_eth.h.

#define _ETH_MULTICOLS_MASK   0x0003FFFFUL

Mask for ETH_MULTICOLS

Definition at line 1704 of file efm32gg11b_eth.h.

#define _ETH_MULTICOLS_RESETVALUE   0x00000000UL

Default value for ETH_MULTICOLS

Definition at line 1703 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCFG_COPYALLFRAMES_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_NETWORKCFG

Definition at line 336 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCFG_COPYALLFRAMES_MASK   0x10UL

Bit mask for ETH_COPYALLFRAMES

Definition at line 335 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCFG_COPYALLFRAMES_SHIFT   4

Shift value for ETH_COPYALLFRAMES

Definition at line 334 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCFG_DISCOPYOFPFRAMES_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_NETWORKCFG

Definition at line 405 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCFG_DISCOPYOFPFRAMES_MASK   0x800000UL

Bit mask for ETH_DISCOPYOFPFRAMES

Definition at line 404 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCFG_DISCOPYOFPFRAMES_SHIFT   23

Shift value for ETH_DISCOPYOFPFRAMES

Definition at line 403 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCFG_DISCRDNONVLANFRAMES_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_NETWORKCFG

Definition at line 326 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCFG_DISCRDNONVLANFRAMES_MASK   0x4UL

Bit mask for ETH_DISCRDNONVLANFRAMES

Definition at line 325 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCFG_DISCRDNONVLANFRAMES_SHIFT   2

Shift value for ETH_DISCRDNONVLANFRAMES

Definition at line 324 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCFG_ENHALFDUPLEXRX_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_NETWORKCFG

Definition at line 415 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCFG_ENHALFDUPLEXRX_MASK   0x2000000UL

Bit mask for ETH_ENHALFDUPLEXRX

Definition at line 414 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCFG_ENHALFDUPLEXRX_SHIFT   25

Shift value for ETH_ENHALFDUPLEXRX

Definition at line 413 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCFG_FCSREMOVE_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_NETWORKCFG

Definition at line 380 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCFG_FCSREMOVE_MASK   0x20000UL

Bit mask for ETH_FCSREMOVE

Definition at line 379 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCFG_FCSREMOVE_SHIFT   17

Shift value for ETH_FCSREMOVE

Definition at line 378 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCFG_FULLDUPLEX_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_NETWORKCFG

Definition at line 321 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCFG_FULLDUPLEX_MASK   0x2UL

Bit mask for ETH_FULLDUPLEX

Definition at line 320 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCFG_FULLDUPLEX_SHIFT   1

Shift value for ETH_FULLDUPLEX

Definition at line 319 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCFG_IGNOREIPGRXER_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_NETWORKCFG

Definition at line 435 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCFG_IGNOREIPGRXER_MASK   0x40000000UL

Bit mask for ETH_IGNOREIPGRXER

Definition at line 434 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCFG_IGNOREIPGRXER_SHIFT   30

Shift value for ETH_IGNOREIPGRXER

Definition at line 433 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCFG_IGNORERXFCS_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_NETWORKCFG

Definition at line 420 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCFG_IGNORERXFCS_MASK   0x4000000UL

Bit mask for ETH_IGNORERXFCS

Definition at line 419 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCFG_IGNORERXFCS_SHIFT   26

Shift value for ETH_IGNORERXFCS

Definition at line 418 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCFG_IPGSTRTCHEN_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_NETWORKCFG

Definition at line 425 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCFG_IPGSTRTCHEN_MASK   0x10000000UL

Bit mask for ETH_IPGSTRTCHEN

Definition at line 424 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCFG_IPGSTRTCHEN_SHIFT   28

Shift value for ETH_IPGSTRTCHEN

Definition at line 423 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCFG_JUMBOFRAMES_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_NETWORKCFG

Definition at line 331 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCFG_JUMBOFRAMES_MASK   0x8UL

Bit mask for ETH_JUMBOFRAMES

Definition at line 330 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCFG_JUMBOFRAMES_SHIFT   3

Shift value for ETH_JUMBOFRAMES

Definition at line 329 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCFG_LENFIELDERRFRMDISCRD_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_NETWORKCFG

Definition at line 375 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCFG_LENFIELDERRFRMDISCRD_MASK   0x10000UL

Bit mask for ETH_LENFIELDERRFRMDISCRD

Definition at line 374 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCFG_LENFIELDERRFRMDISCRD_SHIFT   16

Shift value for ETH_LENFIELDERRFRMDISCRD

Definition at line 373 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCFG_MASK   0x779FF1FFUL

Mask for ETH_NETWORKCFG

Definition at line 312 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCFG_MDCCLKDIV_DEFAULT   0x00000002UL

Mode DEFAULT for ETH_NETWORKCFG

Definition at line 386 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCFG_MDCCLKDIV_DIVBY128   0x00000006UL

Mode DIVBY128 for ETH_NETWORKCFG

Definition at line 391 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCFG_MDCCLKDIV_DIVBY16   0x00000001UL

Mode DIVBY16 for ETH_NETWORKCFG

Definition at line 385 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCFG_MDCCLKDIV_DIVBY224   0x00000007UL

Mode DIVBY224 for ETH_NETWORKCFG

Definition at line 392 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCFG_MDCCLKDIV_DIVBY32   0x00000002UL

Mode DIVBY32 for ETH_NETWORKCFG

Definition at line 387 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCFG_MDCCLKDIV_DIVBY48   0x00000003UL

Mode DIVBY48 for ETH_NETWORKCFG

Definition at line 388 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCFG_MDCCLKDIV_DIVBY64   0x00000004UL

Mode DIVBY64 for ETH_NETWORKCFG

Definition at line 389 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCFG_MDCCLKDIV_DIVBY8   0x00000000UL

Mode DIVBY8 for ETH_NETWORKCFG

Definition at line 384 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCFG_MDCCLKDIV_DIVBY96   0x00000005UL

Mode DIVBY96 for ETH_NETWORKCFG

Definition at line 390 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCFG_MDCCLKDIV_MASK   0x1C0000UL

Bit mask for ETH_MDCCLKDIV

Definition at line 383 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCFG_MDCCLKDIV_SHIFT   18

Shift value for ETH_MDCCLKDIV

Definition at line 382 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCFG_MULTICASTHASHEN_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_NETWORKCFG

Definition at line 346 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCFG_MULTICASTHASHEN_MASK   0x40UL

Bit mask for ETH_MULTICASTHASHEN

Definition at line 345 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCFG_MULTICASTHASHEN_SHIFT   6

Shift value for ETH_MULTICASTHASHEN

Definition at line 344 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCFG_NOBROADCAST_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_NETWORKCFG

Definition at line 341 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCFG_NOBROADCAST_MASK   0x20UL

Bit mask for ETH_NOBROADCAST

Definition at line 340 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCFG_NOBROADCAST_SHIFT   5

Shift value for ETH_NOBROADCAST

Definition at line 339 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCFG_NSPCHANGE_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_NETWORKCFG

Definition at line 430 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCFG_NSPCHANGE_MASK   0x20000000UL

Bit mask for ETH_NSPCHANGE

Definition at line 429 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCFG_NSPCHANGE_SHIFT   29

Shift value for ETH_NSPCHANGE

Definition at line 428 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCFG_PAUSEEN_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_NETWORKCFG

Definition at line 366 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCFG_PAUSEEN_MASK   0x2000UL

Bit mask for ETH_PAUSEEN

Definition at line 365 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCFG_PAUSEEN_SHIFT   13

Shift value for ETH_PAUSEEN

Definition at line 364 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCFG_RESETVALUE   0x00080000UL

Default value for ETH_NETWORKCFG

Definition at line 311 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCFG_RETRYTEST_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_NETWORKCFG

Definition at line 361 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCFG_RETRYTEST_MASK   0x1000UL

Bit mask for ETH_RETRYTEST

Definition at line 360 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCFG_RETRYTEST_SHIFT   12

Shift value for ETH_RETRYTEST

Definition at line 359 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCFG_RX1536BYTEFRAMES_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_NETWORKCFG

Definition at line 356 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCFG_RX1536BYTEFRAMES_MASK   0x100UL

Bit mask for ETH_RX1536BYTEFRAMES

Definition at line 355 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCFG_RX1536BYTEFRAMES_SHIFT   8

Shift value for ETH_RX1536BYTEFRAMES

Definition at line 354 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCFG_RXBUFFOFFSET_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_NETWORKCFG

Definition at line 370 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCFG_RXBUFFOFFSET_MASK   0xC000UL

Bit mask for ETH_RXBUFFOFFSET

Definition at line 369 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCFG_RXBUFFOFFSET_SHIFT   14

Shift value for ETH_RXBUFFOFFSET

Definition at line 368 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCFG_RXCHKSUMOFFLOADEN_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_NETWORKCFG

Definition at line 410 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCFG_RXCHKSUMOFFLOADEN_MASK   0x1000000UL

Bit mask for ETH_RXCHKSUMOFFLOADEN

Definition at line 409 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCFG_RXCHKSUMOFFLOADEN_SHIFT   24

Shift value for ETH_RXCHKSUMOFFLOADEN

Definition at line 408 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCFG_SPEED_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_NETWORKCFG

Definition at line 316 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCFG_SPEED_MASK   0x1UL

Bit mask for ETH_SPEED

Definition at line 315 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCFG_SPEED_SHIFT   0

Shift value for ETH_SPEED

Definition at line 314 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCFG_UNICASTHASHEN_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_NETWORKCFG

Definition at line 351 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCFG_UNICASTHASHEN_MASK   0x80UL

Bit mask for ETH_UNICASTHASHEN

Definition at line 350 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCFG_UNICASTHASHEN_SHIFT   7

Shift value for ETH_UNICASTHASHEN

Definition at line 349 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCTRL_BACKPRESSURE_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_NETWORKCTRL

Definition at line 242 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCTRL_BACKPRESSURE_MASK   0x100UL

Bit mask for ETH_BACKPRESSURE

Definition at line 241 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCTRL_BACKPRESSURE_SHIFT   8

Shift value for ETH_BACKPRESSURE

Definition at line 240 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCTRL_CLRALLSTATSREGS_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_NETWORKCTRL

Definition at line 227 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCTRL_CLRALLSTATSREGS_MASK   0x20UL

Bit mask for ETH_CLRALLSTATSREGS

Definition at line 226 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCTRL_CLRALLSTATSREGS_SHIFT   5

Shift value for ETH_CLRALLSTATSREGS

Definition at line 225 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCTRL_ENBRX_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_NETWORKCTRL

Definition at line 212 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCTRL_ENBRX_MASK   0x4UL

Bit mask for ETH_ENBRX

Definition at line 211 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCTRL_ENBRX_SHIFT   2

Shift value for ETH_ENBRX

Definition at line 210 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCTRL_ENBTX_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_NETWORKCTRL

Definition at line 217 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCTRL_ENBTX_MASK   0x8UL

Bit mask for ETH_ENBTX

Definition at line 216 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCTRL_ENBTX_SHIFT   3

Shift value for ETH_ENBTX

Definition at line 215 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCTRL_FLUSHRXPKT_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_NETWORKCTRL

Definition at line 282 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCTRL_FLUSHRXPKT_MASK   0x40000UL

Bit mask for ETH_FLUSHRXPKT

Definition at line 281 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCTRL_FLUSHRXPKT_SHIFT   18

Shift value for ETH_FLUSHRXPKT

Definition at line 280 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCTRL_INCALLSTATSREGS_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_NETWORKCTRL

Definition at line 232 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCTRL_INCALLSTATSREGS_MASK   0x40UL

Bit mask for ETH_INCALLSTATSREGS

Definition at line 231 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCTRL_INCALLSTATSREGS_SHIFT   6

Shift value for ETH_INCALLSTATSREGS

Definition at line 230 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCTRL_LOOPBACKLOCAL_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_NETWORKCTRL

Definition at line 207 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCTRL_LOOPBACKLOCAL_MASK   0x2UL

Bit mask for ETH_LOOPBACKLOCAL

Definition at line 206 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCTRL_LOOPBACKLOCAL_SHIFT   1

Shift value for ETH_LOOPBACKLOCAL

Definition at line 205 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCTRL_MANPORTEN_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_NETWORKCTRL

Definition at line 222 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCTRL_MANPORTEN_MASK   0x10UL

Bit mask for ETH_MANPORTEN

Definition at line 221 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCTRL_MANPORTEN_SHIFT   4

Shift value for ETH_MANPORTEN

Definition at line 220 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCTRL_MASK   0x035F9FFEUL

Mask for ETH_NETWORKCTRL

Definition at line 203 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCTRL_ONESTEPSYNCMODE_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_NETWORKCTRL

Definition at line 302 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCTRL_ONESTEPSYNCMODE_MASK   0x1000000UL

Bit mask for ETH_ONESTEPSYNCMODE

Definition at line 301 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCTRL_ONESTEPSYNCMODE_SHIFT   24

Shift value for ETH_ONESTEPSYNCMODE

Definition at line 300 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCTRL_PFCCTRL_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_NETWORKCTRL

Definition at line 307 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCTRL_PFCCTRL_MASK   0x2000000UL

Bit mask for ETH_PFCCTRL

Definition at line 306 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCTRL_PFCCTRL_SHIFT   25

Shift value for ETH_PFCCTRL

Definition at line 305 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCTRL_PFCENB_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_NETWORKCTRL

Definition at line 272 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCTRL_PFCENB_MASK   0x10000UL

Bit mask for ETH_PFCENB

Definition at line 271 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCTRL_PFCENB_SHIFT   16

Shift value for ETH_PFCENB

Definition at line 270 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCTRL_PTPUNICASTEN_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_NETWORKCTRL

Definition at line 292 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCTRL_PTPUNICASTEN_MASK   0x100000UL

Bit mask for ETH_PTPUNICASTEN

Definition at line 291 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCTRL_PTPUNICASTEN_SHIFT   20

Shift value for ETH_PTPUNICASTEN

Definition at line 290 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCTRL_RESETVALUE   0x00000000UL

Default value for ETH_NETWORKCTRL

Definition at line 202 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCTRL_STATSWREN_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_NETWORKCTRL

Definition at line 237 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCTRL_STATSWREN_MASK   0x80UL

Bit mask for ETH_STATSWREN

Definition at line 236 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCTRL_STATSWREN_SHIFT   7

Shift value for ETH_STATSWREN

Definition at line 235 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCTRL_STORERXTS_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_NETWORKCTRL

Definition at line 267 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCTRL_STORERXTS_MASK   0x8000UL

Bit mask for ETH_STORERXTS

Definition at line 266 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCTRL_STORERXTS_SHIFT   15

Shift value for ETH_STORERXTS

Definition at line 265 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCTRL_STOREUDPOFFSET_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_NETWORKCTRL

Definition at line 297 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCTRL_STOREUDPOFFSET_MASK   0x400000UL

Bit mask for ETH_STOREUDPOFFSET

Definition at line 296 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCTRL_STOREUDPOFFSET_SHIFT   22

Shift value for ETH_STOREUDPOFFSET

Definition at line 295 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCTRL_TXHALT_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_NETWORKCTRL

Definition at line 252 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCTRL_TXHALT_MASK   0x400UL

Bit mask for ETH_TXHALT

Definition at line 251 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCTRL_TXHALT_SHIFT   10

Shift value for ETH_TXHALT

Definition at line 250 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCTRL_TXLPIEN_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_NETWORKCTRL

Definition at line 287 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCTRL_TXLPIEN_MASK   0x80000UL

Bit mask for ETH_TXLPIEN

Definition at line 286 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCTRL_TXLPIEN_SHIFT   19

Shift value for ETH_TXLPIEN

Definition at line 285 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCTRL_TXPFCPRIORPFRM_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_NETWORKCTRL

Definition at line 277 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCTRL_TXPFCPRIORPFRM_MASK   0x20000UL

Bit mask for ETH_TXPFCPRIORPFRM

Definition at line 276 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCTRL_TXPFCPRIORPFRM_SHIFT   17

Shift value for ETH_TXPFCPRIORPFRM

Definition at line 275 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCTRL_TXPFRMREQ_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_NETWORKCTRL

Definition at line 257 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCTRL_TXPFRMREQ_MASK   0x800UL

Bit mask for ETH_TXPFRMREQ

Definition at line 256 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCTRL_TXPFRMREQ_SHIFT   11

Shift value for ETH_TXPFRMREQ

Definition at line 255 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCTRL_TXPFRMZERO_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_NETWORKCTRL

Definition at line 262 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCTRL_TXPFRMZERO_MASK   0x1000UL

Bit mask for ETH_TXPFRMZERO

Definition at line 261 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCTRL_TXPFRMZERO_SHIFT   12

Shift value for ETH_TXPFRMZERO

Definition at line 260 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCTRL_TXSTRT_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_NETWORKCTRL

Definition at line 247 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCTRL_TXSTRT_MASK   0x200UL

Bit mask for ETH_TXSTRT

Definition at line 246 of file efm32gg11b_eth.h.

#define _ETH_NETWORKCTRL_TXSTRT_SHIFT   9

Shift value for ETH_TXSTRT

Definition at line 245 of file efm32gg11b_eth.h.

#define _ETH_NETWORKSTATUS_LPIINDICATE_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_NETWORKSTATUS

Definition at line 459 of file efm32gg11b_eth.h.

#define _ETH_NETWORKSTATUS_LPIINDICATE_MASK   0x80UL

Bit mask for ETH_LPIINDICATE

Definition at line 458 of file efm32gg11b_eth.h.

#define _ETH_NETWORKSTATUS_LPIINDICATE_SHIFT   7

Shift value for ETH_LPIINDICATE

Definition at line 457 of file efm32gg11b_eth.h.

#define _ETH_NETWORKSTATUS_MANDONE_DEFAULT   0x00000001UL

Mode DEFAULT for ETH_NETWORKSTATUS

Definition at line 449 of file efm32gg11b_eth.h.

#define _ETH_NETWORKSTATUS_MANDONE_MASK   0x4UL

Bit mask for ETH_MANDONE

Definition at line 448 of file efm32gg11b_eth.h.

#define _ETH_NETWORKSTATUS_MANDONE_SHIFT   2

Shift value for ETH_MANDONE

Definition at line 447 of file efm32gg11b_eth.h.

#define _ETH_NETWORKSTATUS_MASK   0x000000C6UL

Mask for ETH_NETWORKSTATUS

Definition at line 440 of file efm32gg11b_eth.h.

#define _ETH_NETWORKSTATUS_MDIOIN_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_NETWORKSTATUS

Definition at line 444 of file efm32gg11b_eth.h.

#define _ETH_NETWORKSTATUS_MDIOIN_MASK   0x2UL

Bit mask for ETH_MDIOIN

Definition at line 443 of file efm32gg11b_eth.h.

#define _ETH_NETWORKSTATUS_MDIOIN_SHIFT   1

Shift value for ETH_MDIOIN

Definition at line 442 of file efm32gg11b_eth.h.

#define _ETH_NETWORKSTATUS_PFCNEGOTIATE_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_NETWORKSTATUS

Definition at line 454 of file efm32gg11b_eth.h.

#define _ETH_NETWORKSTATUS_PFCNEGOTIATE_MASK   0x40UL

Bit mask for ETH_PFCNEGOTIATE

Definition at line 453 of file efm32gg11b_eth.h.

#define _ETH_NETWORKSTATUS_PFCNEGOTIATE_SHIFT   6

Shift value for ETH_PFCNEGOTIATE

Definition at line 452 of file efm32gg11b_eth.h.

#define _ETH_NETWORKSTATUS_RESETVALUE   0x00000004UL

Default value for ETH_NETWORKSTATUS

Definition at line 439 of file efm32gg11b_eth.h.

#define _ETH_OCTETSRXEDBOTTOM_COUNT_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_OCTETSRXEDBOTTOM

Definition at line 1747 of file efm32gg11b_eth.h.

#define _ETH_OCTETSRXEDBOTTOM_COUNT_MASK   0xFFFFFFFFUL

Bit mask for ETH_COUNT

Definition at line 1746 of file efm32gg11b_eth.h.

#define _ETH_OCTETSRXEDBOTTOM_COUNT_SHIFT   0

Shift value for ETH_COUNT

Definition at line 1745 of file efm32gg11b_eth.h.

#define _ETH_OCTETSRXEDBOTTOM_MASK   0xFFFFFFFFUL

Mask for ETH_OCTETSRXEDBOTTOM

Definition at line 1744 of file efm32gg11b_eth.h.

#define _ETH_OCTETSRXEDBOTTOM_RESETVALUE   0x00000000UL

Default value for ETH_OCTETSRXEDBOTTOM

Definition at line 1743 of file efm32gg11b_eth.h.

#define _ETH_OCTETSRXEDTOP_COUNT_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_OCTETSRXEDTOP

Definition at line 1755 of file efm32gg11b_eth.h.

#define _ETH_OCTETSRXEDTOP_COUNT_MASK   0xFFFFUL

Bit mask for ETH_COUNT

Definition at line 1754 of file efm32gg11b_eth.h.

#define _ETH_OCTETSRXEDTOP_COUNT_SHIFT   0

Shift value for ETH_COUNT

Definition at line 1753 of file efm32gg11b_eth.h.

#define _ETH_OCTETSRXEDTOP_MASK   0x0000FFFFUL

Mask for ETH_OCTETSRXEDTOP

Definition at line 1752 of file efm32gg11b_eth.h.

#define _ETH_OCTETSRXEDTOP_RESETVALUE   0x00000000UL

Default value for ETH_OCTETSRXEDTOP

Definition at line 1751 of file efm32gg11b_eth.h.

#define _ETH_OCTETSTXEDBOTTOM_COUNT_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_OCTETSTXEDBOTTOM

Definition at line 1587 of file efm32gg11b_eth.h.

#define _ETH_OCTETSTXEDBOTTOM_COUNT_MASK   0xFFFFFFFFUL

Bit mask for ETH_COUNT

Definition at line 1586 of file efm32gg11b_eth.h.

#define _ETH_OCTETSTXEDBOTTOM_COUNT_SHIFT   0

Shift value for ETH_COUNT

Definition at line 1585 of file efm32gg11b_eth.h.

#define _ETH_OCTETSTXEDBOTTOM_MASK   0xFFFFFFFFUL

Mask for ETH_OCTETSTXEDBOTTOM

Definition at line 1584 of file efm32gg11b_eth.h.

#define _ETH_OCTETSTXEDBOTTOM_RESETVALUE   0x00000000UL

Default value for ETH_OCTETSTXEDBOTTOM

Definition at line 1583 of file efm32gg11b_eth.h.

#define _ETH_OCTETSTXEDTOP_COUNT_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_OCTETSTXEDTOP

Definition at line 1595 of file efm32gg11b_eth.h.

#define _ETH_OCTETSTXEDTOP_COUNT_MASK   0xFFFFUL

Bit mask for ETH_COUNT

Definition at line 1594 of file efm32gg11b_eth.h.

#define _ETH_OCTETSTXEDTOP_COUNT_SHIFT   0

Shift value for ETH_COUNT

Definition at line 1593 of file efm32gg11b_eth.h.

#define _ETH_OCTETSTXEDTOP_MASK   0x0000FFFFUL

Mask for ETH_OCTETSTXEDTOP

Definition at line 1592 of file efm32gg11b_eth.h.

#define _ETH_OCTETSTXEDTOP_RESETVALUE   0x00000000UL

Default value for ETH_OCTETSTXEDTOP

Definition at line 1591 of file efm32gg11b_eth.h.

#define _ETH_PBUFRXCUTTHRU_DMARXCUTTHRU_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_PBUFRXCUTTHRU

Definition at line 1222 of file efm32gg11b_eth.h.

#define _ETH_PBUFRXCUTTHRU_DMARXCUTTHRU_MASK   0x80000000UL

Bit mask for ETH_DMARXCUTTHRU

Definition at line 1221 of file efm32gg11b_eth.h.

#define _ETH_PBUFRXCUTTHRU_DMARXCUTTHRU_SHIFT   31

Shift value for ETH_DMARXCUTTHRU

Definition at line 1220 of file efm32gg11b_eth.h.

#define _ETH_PBUFRXCUTTHRU_DMARXCUTTHRUTHR_DEFAULT   0x000003FFUL

Mode DEFAULT for ETH_PBUFRXCUTTHRU

Definition at line 1217 of file efm32gg11b_eth.h.

#define _ETH_PBUFRXCUTTHRU_DMARXCUTTHRUTHR_MASK   0x3FFUL

Bit mask for ETH_DMARXCUTTHRUTHR

Definition at line 1216 of file efm32gg11b_eth.h.

#define _ETH_PBUFRXCUTTHRU_DMARXCUTTHRUTHR_SHIFT   0

Shift value for ETH_DMARXCUTTHRUTHR

Definition at line 1215 of file efm32gg11b_eth.h.

#define _ETH_PBUFRXCUTTHRU_MASK   0x800003FFUL

Mask for ETH_PBUFRXCUTTHRU

Definition at line 1214 of file efm32gg11b_eth.h.

#define _ETH_PBUFRXCUTTHRU_RESETVALUE   0x000003FFUL

Default value for ETH_PBUFRXCUTTHRU

Definition at line 1213 of file efm32gg11b_eth.h.

#define _ETH_PBUFTXCUTTHRU_DMATXCUTTHRU_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_PBUFTXCUTTHRU

Definition at line 1209 of file efm32gg11b_eth.h.

#define _ETH_PBUFTXCUTTHRU_DMATXCUTTHRU_MASK   0x80000000UL

Bit mask for ETH_DMATXCUTTHRU

Definition at line 1208 of file efm32gg11b_eth.h.

#define _ETH_PBUFTXCUTTHRU_DMATXCUTTHRU_SHIFT   31

Shift value for ETH_DMATXCUTTHRU

Definition at line 1207 of file efm32gg11b_eth.h.

#define _ETH_PBUFTXCUTTHRU_DMATXCUTTHRUTHR_DEFAULT   0x000003FFUL

Mode DEFAULT for ETH_PBUFTXCUTTHRU

Definition at line 1204 of file efm32gg11b_eth.h.

#define _ETH_PBUFTXCUTTHRU_DMATXCUTTHRUTHR_MASK   0x3FFUL

Bit mask for ETH_DMATXCUTTHRUTHR

Definition at line 1203 of file efm32gg11b_eth.h.

#define _ETH_PBUFTXCUTTHRU_DMATXCUTTHRUTHR_SHIFT   0

Shift value for ETH_DMATXCUTTHRUTHR

Definition at line 1202 of file efm32gg11b_eth.h.

#define _ETH_PBUFTXCUTTHRU_MASK   0x800003FFUL

Mask for ETH_PBUFTXCUTTHRU

Definition at line 1201 of file efm32gg11b_eth.h.

#define _ETH_PBUFTXCUTTHRU_RESETVALUE   0x000003FFUL

Default value for ETH_PBUFTXCUTTHRU

Definition at line 1200 of file efm32gg11b_eth.h.

#define _ETH_PFRAMESRXED_COUNT_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_PFRAMESRXED

Definition at line 1787 of file efm32gg11b_eth.h.

#define _ETH_PFRAMESRXED_COUNT_MASK   0xFFFFUL

Bit mask for ETH_COUNT

Definition at line 1786 of file efm32gg11b_eth.h.

#define _ETH_PFRAMESRXED_COUNT_SHIFT   0

Shift value for ETH_COUNT

Definition at line 1785 of file efm32gg11b_eth.h.

#define _ETH_PFRAMESRXED_MASK   0x0000FFFFUL

Mask for ETH_PFRAMESRXED

Definition at line 1784 of file efm32gg11b_eth.h.

#define _ETH_PFRAMESRXED_RESETVALUE   0x00000000UL

Default value for ETH_PFRAMESRXED

Definition at line 1783 of file efm32gg11b_eth.h.

#define _ETH_PFRAMESTXED_COUNT_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_PFRAMESTXED

Definition at line 1627 of file efm32gg11b_eth.h.

#define _ETH_PFRAMESTXED_COUNT_MASK   0xFFFFUL

Bit mask for ETH_COUNT

Definition at line 1626 of file efm32gg11b_eth.h.

#define _ETH_PFRAMESTXED_COUNT_SHIFT   0

Shift value for ETH_COUNT

Definition at line 1625 of file efm32gg11b_eth.h.

#define _ETH_PFRAMESTXED_MASK   0x0000FFFFUL

Mask for ETH_PFRAMESTXED

Definition at line 1624 of file efm32gg11b_eth.h.

#define _ETH_PFRAMESTXED_RESETVALUE   0x00000000UL

Default value for ETH_PFRAMESTXED

Definition at line 1623 of file efm32gg11b_eth.h.

#define _ETH_PHYMNGMNT_MASK   0xFFFFFFFFUL

Mask for ETH_PHYMNGMNT

Definition at line 1147 of file efm32gg11b_eth.h.

#define _ETH_PHYMNGMNT_OPERATION_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_PHYMNGMNT

Definition at line 1166 of file efm32gg11b_eth.h.

#define _ETH_PHYMNGMNT_OPERATION_MASK   0x30000000UL

Bit mask for ETH_OPERATION

Definition at line 1165 of file efm32gg11b_eth.h.

#define _ETH_PHYMNGMNT_OPERATION_SHIFT   28

Shift value for ETH_OPERATION

Definition at line 1164 of file efm32gg11b_eth.h.

#define _ETH_PHYMNGMNT_PHYADDR_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_PHYMNGMNT

Definition at line 1162 of file efm32gg11b_eth.h.

#define _ETH_PHYMNGMNT_PHYADDR_MASK   0xF800000UL

Bit mask for ETH_PHYADDR

Definition at line 1161 of file efm32gg11b_eth.h.

#define _ETH_PHYMNGMNT_PHYADDR_SHIFT   23

Shift value for ETH_PHYADDR

Definition at line 1160 of file efm32gg11b_eth.h.

#define _ETH_PHYMNGMNT_PHYRWDATA_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_PHYMNGMNT

Definition at line 1150 of file efm32gg11b_eth.h.

#define _ETH_PHYMNGMNT_PHYRWDATA_MASK   0xFFFFUL

Bit mask for ETH_PHYRWDATA

Definition at line 1149 of file efm32gg11b_eth.h.

#define _ETH_PHYMNGMNT_PHYRWDATA_SHIFT   0

Shift value for ETH_PHYRWDATA

Definition at line 1148 of file efm32gg11b_eth.h.

#define _ETH_PHYMNGMNT_REGADDR_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_PHYMNGMNT

Definition at line 1158 of file efm32gg11b_eth.h.

#define _ETH_PHYMNGMNT_REGADDR_MASK   0x7C0000UL

Bit mask for ETH_REGADDR

Definition at line 1157 of file efm32gg11b_eth.h.

#define _ETH_PHYMNGMNT_REGADDR_SHIFT   18

Shift value for ETH_REGADDR

Definition at line 1156 of file efm32gg11b_eth.h.

#define _ETH_PHYMNGMNT_RESETVALUE   0x00000000UL

Default value for ETH_PHYMNGMNT

Definition at line 1146 of file efm32gg11b_eth.h.

#define _ETH_PHYMNGMNT_WRITE0_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_PHYMNGMNT

Definition at line 1176 of file efm32gg11b_eth.h.

#define _ETH_PHYMNGMNT_WRITE0_MASK   0x80000000UL

Bit mask for ETH_WRITE0

Definition at line 1175 of file efm32gg11b_eth.h.

#define _ETH_PHYMNGMNT_WRITE0_SHIFT   31

Shift value for ETH_WRITE0

Definition at line 1174 of file efm32gg11b_eth.h.

#define _ETH_PHYMNGMNT_WRITE10_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_PHYMNGMNT

Definition at line 1154 of file efm32gg11b_eth.h.

#define _ETH_PHYMNGMNT_WRITE10_MASK   0x30000UL

Bit mask for ETH_WRITE10

Definition at line 1153 of file efm32gg11b_eth.h.

#define _ETH_PHYMNGMNT_WRITE10_SHIFT   16

Shift value for ETH_WRITE10

Definition at line 1152 of file efm32gg11b_eth.h.

#define _ETH_PHYMNGMNT_WRITE1_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_PHYMNGMNT

Definition at line 1171 of file efm32gg11b_eth.h.

#define _ETH_PHYMNGMNT_WRITE1_MASK   0x40000000UL

Bit mask for ETH_WRITE1

Definition at line 1170 of file efm32gg11b_eth.h.

#define _ETH_PHYMNGMNT_WRITE1_SHIFT   30

Shift value for ETH_WRITE1

Definition at line 1169 of file efm32gg11b_eth.h.

#define _ETH_ROUTELOC0_MASK   0x03030301UL

Mask for ETH_ROUTELOC0

Definition at line 2223 of file efm32gg11b_eth.h.

#define _ETH_ROUTELOC0_MIICOLLOC_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_ROUTELOC0

Definition at line 2255 of file efm32gg11b_eth.h.

#define _ETH_ROUTELOC0_MIICOLLOC_LOC0   0x00000000UL

Mode LOC0 for ETH_ROUTELOC0

Definition at line 2254 of file efm32gg11b_eth.h.

#define _ETH_ROUTELOC0_MIICOLLOC_LOC1   0x00000001UL

Mode LOC1 for ETH_ROUTELOC0

Definition at line 2256 of file efm32gg11b_eth.h.

#define _ETH_ROUTELOC0_MIICOLLOC_LOC2   0x00000002UL

Mode LOC2 for ETH_ROUTELOC0

Definition at line 2257 of file efm32gg11b_eth.h.

#define _ETH_ROUTELOC0_MIICOLLOC_MASK   0x3000000UL

Bit mask for ETH_MIICOLLOC

Definition at line 2253 of file efm32gg11b_eth.h.

#define _ETH_ROUTELOC0_MIICOLLOC_SHIFT   24

Shift value for ETH_MIICOLLOC

Definition at line 2252 of file efm32gg11b_eth.h.

#define _ETH_ROUTELOC0_MIICRSLOC_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_ROUTELOC0

Definition at line 2245 of file efm32gg11b_eth.h.

#define _ETH_ROUTELOC0_MIICRSLOC_LOC0   0x00000000UL

Mode LOC0 for ETH_ROUTELOC0

Definition at line 2244 of file efm32gg11b_eth.h.

#define _ETH_ROUTELOC0_MIICRSLOC_LOC1   0x00000001UL

Mode LOC1 for ETH_ROUTELOC0

Definition at line 2246 of file efm32gg11b_eth.h.

#define _ETH_ROUTELOC0_MIICRSLOC_LOC2   0x00000002UL

Mode LOC2 for ETH_ROUTELOC0

Definition at line 2247 of file efm32gg11b_eth.h.

#define _ETH_ROUTELOC0_MIICRSLOC_MASK   0x30000UL

Bit mask for ETH_MIICRSLOC

Definition at line 2243 of file efm32gg11b_eth.h.

#define _ETH_ROUTELOC0_MIICRSLOC_SHIFT   16

Shift value for ETH_MIICRSLOC

Definition at line 2242 of file efm32gg11b_eth.h.

#define _ETH_ROUTELOC0_MIIRXLOC_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_ROUTELOC0

Definition at line 2235 of file efm32gg11b_eth.h.

#define _ETH_ROUTELOC0_MIIRXLOC_LOC0   0x00000000UL

Mode LOC0 for ETH_ROUTELOC0

Definition at line 2234 of file efm32gg11b_eth.h.

#define _ETH_ROUTELOC0_MIIRXLOC_LOC1   0x00000001UL

Mode LOC1 for ETH_ROUTELOC0

Definition at line 2236 of file efm32gg11b_eth.h.

#define _ETH_ROUTELOC0_MIIRXLOC_LOC2   0x00000002UL

Mode LOC2 for ETH_ROUTELOC0

Definition at line 2237 of file efm32gg11b_eth.h.

#define _ETH_ROUTELOC0_MIIRXLOC_MASK   0x300UL

Bit mask for ETH_MIIRXLOC

Definition at line 2233 of file efm32gg11b_eth.h.

#define _ETH_ROUTELOC0_MIIRXLOC_SHIFT   8

Shift value for ETH_MIIRXLOC

Definition at line 2232 of file efm32gg11b_eth.h.

#define _ETH_ROUTELOC0_MIITXLOC_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_ROUTELOC0

Definition at line 2227 of file efm32gg11b_eth.h.

#define _ETH_ROUTELOC0_MIITXLOC_LOC0   0x00000000UL

Mode LOC0 for ETH_ROUTELOC0

Definition at line 2226 of file efm32gg11b_eth.h.

#define _ETH_ROUTELOC0_MIITXLOC_LOC1   0x00000001UL

Mode LOC1 for ETH_ROUTELOC0

Definition at line 2228 of file efm32gg11b_eth.h.

#define _ETH_ROUTELOC0_MIITXLOC_MASK   0x1UL

Bit mask for ETH_MIITXLOC

Definition at line 2225 of file efm32gg11b_eth.h.

#define _ETH_ROUTELOC0_MIITXLOC_SHIFT   0

Shift value for ETH_MIITXLOC

Definition at line 2224 of file efm32gg11b_eth.h.

#define _ETH_ROUTELOC0_RESETVALUE   0x00000000UL

Default value for ETH_ROUTELOC0

Definition at line 2222 of file efm32gg11b_eth.h.

#define _ETH_ROUTELOC1_MASK   0x01030303UL

Mask for ETH_ROUTELOC1

Definition at line 2265 of file efm32gg11b_eth.h.

#define _ETH_ROUTELOC1_MDIOLOC_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_ROUTELOC1

Definition at line 2293 of file efm32gg11b_eth.h.

#define _ETH_ROUTELOC1_MDIOLOC_LOC0   0x00000000UL

Mode LOC0 for ETH_ROUTELOC1

Definition at line 2292 of file efm32gg11b_eth.h.

#define _ETH_ROUTELOC1_MDIOLOC_LOC1   0x00000001UL

Mode LOC1 for ETH_ROUTELOC1

Definition at line 2294 of file efm32gg11b_eth.h.

#define _ETH_ROUTELOC1_MDIOLOC_LOC2   0x00000002UL

Mode LOC2 for ETH_ROUTELOC1

Definition at line 2295 of file efm32gg11b_eth.h.

#define _ETH_ROUTELOC1_MDIOLOC_LOC3   0x00000003UL

Mode LOC3 for ETH_ROUTELOC1

Definition at line 2296 of file efm32gg11b_eth.h.

#define _ETH_ROUTELOC1_MDIOLOC_MASK   0x30000UL

Bit mask for ETH_MDIOLOC

Definition at line 2291 of file efm32gg11b_eth.h.

#define _ETH_ROUTELOC1_MDIOLOC_SHIFT   16

Shift value for ETH_MDIOLOC

Definition at line 2290 of file efm32gg11b_eth.h.

#define _ETH_ROUTELOC1_RESETVALUE   0x00000000UL

Default value for ETH_ROUTELOC1

Definition at line 2264 of file efm32gg11b_eth.h.

#define _ETH_ROUTELOC1_RMIILOC_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_ROUTELOC1

Definition at line 2305 of file efm32gg11b_eth.h.

#define _ETH_ROUTELOC1_RMIILOC_LOC0   0x00000000UL

Mode LOC0 for ETH_ROUTELOC1

Definition at line 2304 of file efm32gg11b_eth.h.

#define _ETH_ROUTELOC1_RMIILOC_LOC1   0x00000001UL

Mode LOC1 for ETH_ROUTELOC1

Definition at line 2306 of file efm32gg11b_eth.h.

#define _ETH_ROUTELOC1_RMIILOC_MASK   0x1000000UL

Bit mask for ETH_RMIILOC

Definition at line 2303 of file efm32gg11b_eth.h.

#define _ETH_ROUTELOC1_RMIILOC_SHIFT   24

Shift value for ETH_RMIILOC

Definition at line 2302 of file efm32gg11b_eth.h.

#define _ETH_ROUTELOC1_TSUEXTCLKLOC_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_ROUTELOC1

Definition at line 2269 of file efm32gg11b_eth.h.

#define _ETH_ROUTELOC1_TSUEXTCLKLOC_LOC0   0x00000000UL

Mode LOC0 for ETH_ROUTELOC1

Definition at line 2268 of file efm32gg11b_eth.h.

#define _ETH_ROUTELOC1_TSUEXTCLKLOC_LOC1   0x00000001UL

Mode LOC1 for ETH_ROUTELOC1

Definition at line 2270 of file efm32gg11b_eth.h.

#define _ETH_ROUTELOC1_TSUEXTCLKLOC_LOC2   0x00000002UL

Mode LOC2 for ETH_ROUTELOC1

Definition at line 2271 of file efm32gg11b_eth.h.

#define _ETH_ROUTELOC1_TSUEXTCLKLOC_LOC3   0x00000003UL

Mode LOC3 for ETH_ROUTELOC1

Definition at line 2272 of file efm32gg11b_eth.h.

#define _ETH_ROUTELOC1_TSUEXTCLKLOC_MASK   0x3UL

Bit mask for ETH_TSUEXTCLKLOC

Definition at line 2267 of file efm32gg11b_eth.h.

#define _ETH_ROUTELOC1_TSUEXTCLKLOC_SHIFT   0

Shift value for ETH_TSUEXTCLKLOC

Definition at line 2266 of file efm32gg11b_eth.h.

#define _ETH_ROUTELOC1_TSUTMRTOGLOC_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_ROUTELOC1

Definition at line 2281 of file efm32gg11b_eth.h.

#define _ETH_ROUTELOC1_TSUTMRTOGLOC_LOC0   0x00000000UL

Mode LOC0 for ETH_ROUTELOC1

Definition at line 2280 of file efm32gg11b_eth.h.

#define _ETH_ROUTELOC1_TSUTMRTOGLOC_LOC1   0x00000001UL

Mode LOC1 for ETH_ROUTELOC1

Definition at line 2282 of file efm32gg11b_eth.h.

#define _ETH_ROUTELOC1_TSUTMRTOGLOC_LOC2   0x00000002UL

Mode LOC2 for ETH_ROUTELOC1

Definition at line 2283 of file efm32gg11b_eth.h.

#define _ETH_ROUTELOC1_TSUTMRTOGLOC_LOC3   0x00000003UL

Mode LOC3 for ETH_ROUTELOC1

Definition at line 2284 of file efm32gg11b_eth.h.

#define _ETH_ROUTELOC1_TSUTMRTOGLOC_MASK   0x300UL

Bit mask for ETH_TSUTMRTOGLOC

Definition at line 2279 of file efm32gg11b_eth.h.

#define _ETH_ROUTELOC1_TSUTMRTOGLOC_SHIFT   8

Shift value for ETH_TSUTMRTOGLOC

Definition at line 2278 of file efm32gg11b_eth.h.

#define _ETH_ROUTEPEN_MASK   0x0000003FUL

Mask for ETH_ROUTEPEN

Definition at line 2165 of file efm32gg11b_eth.h.

#define _ETH_ROUTEPEN_MDIOPEN_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_ROUTEPEN

Definition at line 2169 of file efm32gg11b_eth.h.

#define _ETH_ROUTEPEN_MDIOPEN_DISABLE   0x00000000UL

Mode DISABLE for ETH_ROUTEPEN

Definition at line 2170 of file efm32gg11b_eth.h.

#define _ETH_ROUTEPEN_MDIOPEN_ENABLE   0x00000001UL

Mode ENABLE for ETH_ROUTEPEN

Definition at line 2171 of file efm32gg11b_eth.h.

#define _ETH_ROUTEPEN_MDIOPEN_MASK   0x1UL

Bit mask for ETH_MDIOPEN

Definition at line 2168 of file efm32gg11b_eth.h.

#define _ETH_ROUTEPEN_MDIOPEN_SHIFT   0

Shift value for ETH_MDIOPEN

Definition at line 2167 of file efm32gg11b_eth.h.

#define _ETH_ROUTEPEN_MIIPEN_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_ROUTEPEN

Definition at line 2196 of file efm32gg11b_eth.h.

#define _ETH_ROUTEPEN_MIIPEN_DISABLE   0x00000000UL

Mode DISABLE for ETH_ROUTEPEN

Definition at line 2197 of file efm32gg11b_eth.h.

#define _ETH_ROUTEPEN_MIIPEN_ENABLE   0x00000001UL

Mode ENABLE for ETH_ROUTEPEN

Definition at line 2198 of file efm32gg11b_eth.h.

#define _ETH_ROUTEPEN_MIIPEN_MASK   0x8UL

Bit mask for ETH_MIIPEN

Definition at line 2195 of file efm32gg11b_eth.h.

#define _ETH_ROUTEPEN_MIIPEN_SHIFT   3

Shift value for ETH_MIIPEN

Definition at line 2194 of file efm32gg11b_eth.h.

#define _ETH_ROUTEPEN_MIIRXERPEN_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_ROUTEPEN

Definition at line 2187 of file efm32gg11b_eth.h.

#define _ETH_ROUTEPEN_MIIRXERPEN_DISABLE   0x00000000UL

Mode DISABLE for ETH_ROUTEPEN

Definition at line 2188 of file efm32gg11b_eth.h.

#define _ETH_ROUTEPEN_MIIRXERPEN_ENABLE   0x00000001UL

Mode ENABLE for ETH_ROUTEPEN

Definition at line 2189 of file efm32gg11b_eth.h.

#define _ETH_ROUTEPEN_MIIRXERPEN_MASK   0x4UL

Bit mask for ETH_MIIRXERPEN

Definition at line 2186 of file efm32gg11b_eth.h.

#define _ETH_ROUTEPEN_MIIRXERPEN_SHIFT   2

Shift value for ETH_MIIRXERPEN

Definition at line 2185 of file efm32gg11b_eth.h.

#define _ETH_ROUTEPEN_MIITXERPEN_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_ROUTEPEN

Definition at line 2178 of file efm32gg11b_eth.h.

#define _ETH_ROUTEPEN_MIITXERPEN_DISABLE   0x00000000UL

Mode DISABLE for ETH_ROUTEPEN

Definition at line 2179 of file efm32gg11b_eth.h.

#define _ETH_ROUTEPEN_MIITXERPEN_ENABLE   0x00000001UL

Mode ENABLE for ETH_ROUTEPEN

Definition at line 2180 of file efm32gg11b_eth.h.

#define _ETH_ROUTEPEN_MIITXERPEN_MASK   0x2UL

Bit mask for ETH_MIITXERPEN

Definition at line 2177 of file efm32gg11b_eth.h.

#define _ETH_ROUTEPEN_MIITXERPEN_SHIFT   1

Shift value for ETH_MIITXERPEN

Definition at line 2176 of file efm32gg11b_eth.h.

#define _ETH_ROUTEPEN_RESETVALUE   0x00000000UL

Default value for ETH_ROUTEPEN

Definition at line 2164 of file efm32gg11b_eth.h.

#define _ETH_ROUTEPEN_RMIIPEN_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_ROUTEPEN

Definition at line 2205 of file efm32gg11b_eth.h.

#define _ETH_ROUTEPEN_RMIIPEN_DISABLE   0x00000000UL

Mode DISABLE for ETH_ROUTEPEN

Definition at line 2206 of file efm32gg11b_eth.h.

#define _ETH_ROUTEPEN_RMIIPEN_ENABLE   0x00000001UL

Mode ENABLE for ETH_ROUTEPEN

Definition at line 2207 of file efm32gg11b_eth.h.

#define _ETH_ROUTEPEN_RMIIPEN_MASK   0x10UL

Bit mask for ETH_RMIIPEN

Definition at line 2204 of file efm32gg11b_eth.h.

#define _ETH_ROUTEPEN_RMIIPEN_SHIFT   4

Shift value for ETH_RMIIPEN

Definition at line 2203 of file efm32gg11b_eth.h.

#define _ETH_ROUTEPEN_TSUTMRTOGPEN_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_ROUTEPEN

Definition at line 2214 of file efm32gg11b_eth.h.

#define _ETH_ROUTEPEN_TSUTMRTOGPEN_DISABLE   0x00000000UL

Mode DISABLE for ETH_ROUTEPEN

Definition at line 2215 of file efm32gg11b_eth.h.

#define _ETH_ROUTEPEN_TSUTMRTOGPEN_ENABLE   0x00000001UL

Mode ENABLE for ETH_ROUTEPEN

Definition at line 2216 of file efm32gg11b_eth.h.

#define _ETH_ROUTEPEN_TSUTMRTOGPEN_MASK   0x20UL

Bit mask for ETH_TSUTMRTOGPEN

Definition at line 2213 of file efm32gg11b_eth.h.

#define _ETH_ROUTEPEN_TSUTMRTOGPEN_SHIFT   5

Shift value for ETH_TSUTMRTOGPEN

Definition at line 2212 of file efm32gg11b_eth.h.

#define _ETH_RXBDCTRL_MASK   0x00000030UL

Mask for ETH_RXBDCTRL

Definition at line 2157 of file efm32gg11b_eth.h.

#define _ETH_RXBDCTRL_RESETVALUE   0x00000000UL

Default value for ETH_RXBDCTRL

Definition at line 2156 of file efm32gg11b_eth.h.

#define _ETH_RXBDCTRL_RXBDTSMODE_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_RXBDCTRL

Definition at line 2160 of file efm32gg11b_eth.h.

#define _ETH_RXBDCTRL_RXBDTSMODE_MASK   0x30UL

Bit mask for ETH_RXBDTSMODE

Definition at line 2159 of file efm32gg11b_eth.h.

#define _ETH_RXBDCTRL_RXBDTSMODE_SHIFT   4

Shift value for ETH_RXBDTSMODE

Definition at line 2158 of file efm32gg11b_eth.h.

#define _ETH_RXIPCKERRS_COUNT_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_RXIPCKERRS

Definition at line 1923 of file efm32gg11b_eth.h.

#define _ETH_RXIPCKERRS_COUNT_MASK   0xFFUL

Bit mask for ETH_COUNT

Definition at line 1922 of file efm32gg11b_eth.h.

#define _ETH_RXIPCKERRS_COUNT_SHIFT   0

Shift value for ETH_COUNT

Definition at line 1921 of file efm32gg11b_eth.h.

#define _ETH_RXIPCKERRS_MASK   0x000000FFUL

Mask for ETH_RXIPCKERRS

Definition at line 1920 of file efm32gg11b_eth.h.

#define _ETH_RXIPCKERRS_RESETVALUE   0x00000000UL

Default value for ETH_RXIPCKERRS

Definition at line 1919 of file efm32gg11b_eth.h.

#define _ETH_RXJABBERS_COUNT_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_RXJABBERS

Definition at line 1867 of file efm32gg11b_eth.h.

#define _ETH_RXJABBERS_COUNT_MASK   0x3FFUL

Bit mask for ETH_COUNT

Definition at line 1866 of file efm32gg11b_eth.h.

#define _ETH_RXJABBERS_COUNT_SHIFT   0

Shift value for ETH_COUNT

Definition at line 1865 of file efm32gg11b_eth.h.

#define _ETH_RXJABBERS_MASK   0x000003FFUL

Mask for ETH_RXJABBERS

Definition at line 1864 of file efm32gg11b_eth.h.

#define _ETH_RXJABBERS_RESETVALUE   0x00000000UL

Default value for ETH_RXJABBERS

Definition at line 1863 of file efm32gg11b_eth.h.

#define _ETH_RXLENERRS_COUNT_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_RXLENERRS

Definition at line 1883 of file efm32gg11b_eth.h.

#define _ETH_RXLENERRS_COUNT_MASK   0x3FFUL

Bit mask for ETH_COUNT

Definition at line 1882 of file efm32gg11b_eth.h.

#define _ETH_RXLENERRS_COUNT_SHIFT   0

Shift value for ETH_COUNT

Definition at line 1881 of file efm32gg11b_eth.h.

#define _ETH_RXLENERRS_MASK   0x000003FFUL

Mask for ETH_RXLENERRS

Definition at line 1880 of file efm32gg11b_eth.h.

#define _ETH_RXLENERRS_RESETVALUE   0x00000000UL

Default value for ETH_RXLENERRS

Definition at line 1879 of file efm32gg11b_eth.h.

#define _ETH_RXLPI_COUNT_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_RXLPI

Definition at line 2120 of file efm32gg11b_eth.h.

#define _ETH_RXLPI_COUNT_MASK   0xFFFFUL

Bit mask for ETH_COUNT

Definition at line 2119 of file efm32gg11b_eth.h.

#define _ETH_RXLPI_COUNT_SHIFT   0

Shift value for ETH_COUNT

Definition at line 2118 of file efm32gg11b_eth.h.

#define _ETH_RXLPI_MASK   0x0000FFFFUL

Mask for ETH_RXLPI

Definition at line 2117 of file efm32gg11b_eth.h.

#define _ETH_RXLPI_RESETVALUE   0x00000000UL

Default value for ETH_RXLPI

Definition at line 2116 of file efm32gg11b_eth.h.

#define _ETH_RXLPITIME_LPITIME_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_RXLPITIME

Definition at line 2128 of file efm32gg11b_eth.h.

#define _ETH_RXLPITIME_LPITIME_MASK   0xFFFFFFUL

Bit mask for ETH_LPITIME

Definition at line 2127 of file efm32gg11b_eth.h.

#define _ETH_RXLPITIME_LPITIME_SHIFT   0

Shift value for ETH_LPITIME

Definition at line 2126 of file efm32gg11b_eth.h.

#define _ETH_RXLPITIME_MASK   0x00FFFFFFUL

Mask for ETH_RXLPITIME

Definition at line 2125 of file efm32gg11b_eth.h.

#define _ETH_RXLPITIME_RESETVALUE   0x00000000UL

Default value for ETH_RXLPITIME

Definition at line 2124 of file efm32gg11b_eth.h.

#define _ETH_RXOVERRUNS_COUNT_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_RXOVERRUNS

Definition at line 1915 of file efm32gg11b_eth.h.

#define _ETH_RXOVERRUNS_COUNT_MASK   0x3FFUL

Bit mask for ETH_COUNT

Definition at line 1914 of file efm32gg11b_eth.h.

#define _ETH_RXOVERRUNS_COUNT_SHIFT   0

Shift value for ETH_COUNT

Definition at line 1913 of file efm32gg11b_eth.h.

#define _ETH_RXOVERRUNS_MASK   0x000003FFUL

Mask for ETH_RXOVERRUNS

Definition at line 1912 of file efm32gg11b_eth.h.

#define _ETH_RXOVERRUNS_RESETVALUE   0x00000000UL

Default value for ETH_RXOVERRUNS

Definition at line 1911 of file efm32gg11b_eth.h.

#define _ETH_RXPAUSEQUANT_MASK   0x0000FFFFUL

Mask for ETH_RXPAUSEQUANT

Definition at line 1181 of file efm32gg11b_eth.h.

#define _ETH_RXPAUSEQUANT_QUANT_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_RXPAUSEQUANT

Definition at line 1184 of file efm32gg11b_eth.h.

#define _ETH_RXPAUSEQUANT_QUANT_MASK   0xFFFFUL

Bit mask for ETH_QUANT

Definition at line 1183 of file efm32gg11b_eth.h.

#define _ETH_RXPAUSEQUANT_QUANT_SHIFT   0

Shift value for ETH_QUANT

Definition at line 1182 of file efm32gg11b_eth.h.

#define _ETH_RXPAUSEQUANT_RESETVALUE   0x00000000UL

Default value for ETH_RXPAUSEQUANT

Definition at line 1180 of file efm32gg11b_eth.h.

#define _ETH_RXPTPUNICAST_ADDR_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_RXPTPUNICAST

Definition at line 1515 of file efm32gg11b_eth.h.

#define _ETH_RXPTPUNICAST_ADDR_MASK   0xFFFFFFFFUL

Bit mask for ETH_ADDR

Definition at line 1514 of file efm32gg11b_eth.h.

#define _ETH_RXPTPUNICAST_ADDR_SHIFT   0

Shift value for ETH_ADDR

Definition at line 1513 of file efm32gg11b_eth.h.

#define _ETH_RXPTPUNICAST_MASK   0xFFFFFFFFUL

Mask for ETH_RXPTPUNICAST

Definition at line 1512 of file efm32gg11b_eth.h.

#define _ETH_RXPTPUNICAST_RESETVALUE   0x00000000UL

Default value for ETH_RXPTPUNICAST

Definition at line 1511 of file efm32gg11b_eth.h.

#define _ETH_RXQPTR_DMARXQPTR_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_RXQPTR

Definition at line 589 of file efm32gg11b_eth.h.

#define _ETH_RXQPTR_DMARXQPTR_MASK   0xFFFFFFFCUL

Bit mask for ETH_DMARXQPTR

Definition at line 588 of file efm32gg11b_eth.h.

#define _ETH_RXQPTR_DMARXQPTR_SHIFT   2

Shift value for ETH_DMARXQPTR

Definition at line 587 of file efm32gg11b_eth.h.

#define _ETH_RXQPTR_MASK   0xFFFFFFFCUL

Mask for ETH_RXQPTR

Definition at line 586 of file efm32gg11b_eth.h.

#define _ETH_RXQPTR_RESETVALUE   0x00000000UL

Default value for ETH_RXQPTR

Definition at line 585 of file efm32gg11b_eth.h.

#define _ETH_RXRESOURCEERRS_COUNT_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_RXRESOURCEERRS

Definition at line 1907 of file efm32gg11b_eth.h.

#define _ETH_RXRESOURCEERRS_COUNT_MASK   0x3FFFFUL

Bit mask for ETH_COUNT

Definition at line 1906 of file efm32gg11b_eth.h.

#define _ETH_RXRESOURCEERRS_COUNT_SHIFT   0

Shift value for ETH_COUNT

Definition at line 1905 of file efm32gg11b_eth.h.

#define _ETH_RXRESOURCEERRS_MASK   0x0003FFFFUL

Mask for ETH_RXRESOURCEERRS

Definition at line 1904 of file efm32gg11b_eth.h.

#define _ETH_RXRESOURCEERRS_RESETVALUE   0x00000000UL

Default value for ETH_RXRESOURCEERRS

Definition at line 1903 of file efm32gg11b_eth.h.

#define _ETH_RXSTATUS_BUFFNOTAVAIL_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_RXSTATUS

Definition at line 606 of file efm32gg11b_eth.h.

#define _ETH_RXSTATUS_BUFFNOTAVAIL_MASK   0x1UL

Bit mask for ETH_BUFFNOTAVAIL

Definition at line 605 of file efm32gg11b_eth.h.

#define _ETH_RXSTATUS_BUFFNOTAVAIL_SHIFT   0

Shift value for ETH_BUFFNOTAVAIL

Definition at line 604 of file efm32gg11b_eth.h.

#define _ETH_RXSTATUS_FRMRX_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_RXSTATUS

Definition at line 611 of file efm32gg11b_eth.h.

#define _ETH_RXSTATUS_FRMRX_MASK   0x2UL

Bit mask for ETH_FRMRX

Definition at line 610 of file efm32gg11b_eth.h.

#define _ETH_RXSTATUS_FRMRX_SHIFT   1

Shift value for ETH_FRMRX

Definition at line 609 of file efm32gg11b_eth.h.

#define _ETH_RXSTATUS_MASK   0x0000000FUL

Mask for ETH_RXSTATUS

Definition at line 602 of file efm32gg11b_eth.h.

#define _ETH_RXSTATUS_RESETVALUE   0x00000000UL

Default value for ETH_RXSTATUS

Definition at line 601 of file efm32gg11b_eth.h.

#define _ETH_RXSTATUS_RESPNOTOK_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_RXSTATUS

Definition at line 621 of file efm32gg11b_eth.h.

#define _ETH_RXSTATUS_RESPNOTOK_MASK   0x8UL

Bit mask for ETH_RESPNOTOK

Definition at line 620 of file efm32gg11b_eth.h.

#define _ETH_RXSTATUS_RESPNOTOK_SHIFT   3

Shift value for ETH_RESPNOTOK

Definition at line 619 of file efm32gg11b_eth.h.

#define _ETH_RXSTATUS_RXOVERRUN_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_RXSTATUS

Definition at line 616 of file efm32gg11b_eth.h.

#define _ETH_RXSTATUS_RXOVERRUN_MASK   0x4UL

Bit mask for ETH_RXOVERRUN

Definition at line 615 of file efm32gg11b_eth.h.

#define _ETH_RXSTATUS_RXOVERRUN_SHIFT   2

Shift value for ETH_RXOVERRUN

Definition at line 614 of file efm32gg11b_eth.h.

#define _ETH_RXSYMBOLERRS_COUNT_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_RXSYMBOLERRS

Definition at line 1891 of file efm32gg11b_eth.h.

#define _ETH_RXSYMBOLERRS_COUNT_MASK   0x3FFUL

Bit mask for ETH_COUNT

Definition at line 1890 of file efm32gg11b_eth.h.

#define _ETH_RXSYMBOLERRS_COUNT_SHIFT   0

Shift value for ETH_COUNT

Definition at line 1889 of file efm32gg11b_eth.h.

#define _ETH_RXSYMBOLERRS_MASK   0x000003FFUL

Mask for ETH_RXSYMBOLERRS

Definition at line 1888 of file efm32gg11b_eth.h.

#define _ETH_RXSYMBOLERRS_RESETVALUE   0x00000000UL

Default value for ETH_RXSYMBOLERRS

Definition at line 1887 of file efm32gg11b_eth.h.

#define _ETH_RXTCPCKERRS_COUNT_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_RXTCPCKERRS

Definition at line 1931 of file efm32gg11b_eth.h.

#define _ETH_RXTCPCKERRS_COUNT_MASK   0xFFUL

Bit mask for ETH_COUNT

Definition at line 1930 of file efm32gg11b_eth.h.

#define _ETH_RXTCPCKERRS_COUNT_SHIFT   0

Shift value for ETH_COUNT

Definition at line 1929 of file efm32gg11b_eth.h.

#define _ETH_RXTCPCKERRS_MASK   0x000000FFUL

Mask for ETH_RXTCPCKERRS

Definition at line 1928 of file efm32gg11b_eth.h.

#define _ETH_RXTCPCKERRS_RESETVALUE   0x00000000UL

Default value for ETH_RXTCPCKERRS

Definition at line 1927 of file efm32gg11b_eth.h.

#define _ETH_RXUDPCKERRS_COUNT_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_RXUDPCKERRS

Definition at line 1939 of file efm32gg11b_eth.h.

#define _ETH_RXUDPCKERRS_COUNT_MASK   0xFFUL

Bit mask for ETH_COUNT

Definition at line 1938 of file efm32gg11b_eth.h.

#define _ETH_RXUDPCKERRS_COUNT_SHIFT   0

Shift value for ETH_COUNT

Definition at line 1937 of file efm32gg11b_eth.h.

#define _ETH_RXUDPCKERRS_MASK   0x000000FFUL

Mask for ETH_RXUDPCKERRS

Definition at line 1936 of file efm32gg11b_eth.h.

#define _ETH_RXUDPCKERRS_RESETVALUE   0x00000000UL

Default value for ETH_RXUDPCKERRS

Definition at line 1935 of file efm32gg11b_eth.h.

#define _ETH_SINGLECOLS_COUNT_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_SINGLECOLS

Definition at line 1699 of file efm32gg11b_eth.h.

#define _ETH_SINGLECOLS_COUNT_MASK   0x3FFFFUL

Bit mask for ETH_COUNT

Definition at line 1698 of file efm32gg11b_eth.h.

#define _ETH_SINGLECOLS_COUNT_SHIFT   0

Shift value for ETH_COUNT

Definition at line 1697 of file efm32gg11b_eth.h.

#define _ETH_SINGLECOLS_MASK   0x0003FFFFUL

Mask for ETH_SINGLECOLS

Definition at line 1696 of file efm32gg11b_eth.h.

#define _ETH_SINGLECOLS_RESETVALUE   0x00000000UL

Default value for ETH_SINGLECOLS

Definition at line 1695 of file efm32gg11b_eth.h.

#define _ETH_SPECADDR1BOTTOM_ADDR_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_SPECADDR1BOTTOM

Definition at line 1274 of file efm32gg11b_eth.h.

#define _ETH_SPECADDR1BOTTOM_ADDR_MASK   0xFFFFFFFFUL

Bit mask for ETH_ADDR

Definition at line 1273 of file efm32gg11b_eth.h.

#define _ETH_SPECADDR1BOTTOM_ADDR_SHIFT   0

Shift value for ETH_ADDR

Definition at line 1272 of file efm32gg11b_eth.h.

#define _ETH_SPECADDR1BOTTOM_MASK   0xFFFFFFFFUL

Mask for ETH_SPECADDR1BOTTOM

Definition at line 1271 of file efm32gg11b_eth.h.

#define _ETH_SPECADDR1BOTTOM_RESETVALUE   0x00000000UL

Default value for ETH_SPECADDR1BOTTOM

Definition at line 1270 of file efm32gg11b_eth.h.

#define _ETH_SPECADDR1TOP_ADDR_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_SPECADDR1TOP

Definition at line 1282 of file efm32gg11b_eth.h.

#define _ETH_SPECADDR1TOP_ADDR_MASK   0xFFFFUL

Bit mask for ETH_ADDR

Definition at line 1281 of file efm32gg11b_eth.h.

#define _ETH_SPECADDR1TOP_ADDR_SHIFT   0

Shift value for ETH_ADDR

Definition at line 1280 of file efm32gg11b_eth.h.

#define _ETH_SPECADDR1TOP_FILTERTYPE_DA   0x00000000UL

Mode DA for ETH_SPECADDR1TOP

Definition at line 1288 of file efm32gg11b_eth.h.

#define _ETH_SPECADDR1TOP_FILTERTYPE_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_SPECADDR1TOP

Definition at line 1287 of file efm32gg11b_eth.h.

#define _ETH_SPECADDR1TOP_FILTERTYPE_MASK   0x10000UL

Bit mask for ETH_FILTERTYPE

Definition at line 1286 of file efm32gg11b_eth.h.

#define _ETH_SPECADDR1TOP_FILTERTYPE_SA   0x00000001UL

Mode SA for ETH_SPECADDR1TOP

Definition at line 1289 of file efm32gg11b_eth.h.

#define _ETH_SPECADDR1TOP_FILTERTYPE_SHIFT   16

Shift value for ETH_FILTERTYPE

Definition at line 1285 of file efm32gg11b_eth.h.

#define _ETH_SPECADDR1TOP_MASK   0x0001FFFFUL

Mask for ETH_SPECADDR1TOP

Definition at line 1279 of file efm32gg11b_eth.h.

#define _ETH_SPECADDR1TOP_RESETVALUE   0x00000000UL

Default value for ETH_SPECADDR1TOP

Definition at line 1278 of file efm32gg11b_eth.h.

#define _ETH_SPECADDR2BOTTOM_ADDR_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_SPECADDR2BOTTOM

Definition at line 1299 of file efm32gg11b_eth.h.

#define _ETH_SPECADDR2BOTTOM_ADDR_MASK   0xFFFFFFFFUL

Bit mask for ETH_ADDR

Definition at line 1298 of file efm32gg11b_eth.h.

#define _ETH_SPECADDR2BOTTOM_ADDR_SHIFT   0

Shift value for ETH_ADDR

Definition at line 1297 of file efm32gg11b_eth.h.

#define _ETH_SPECADDR2BOTTOM_MASK   0xFFFFFFFFUL

Mask for ETH_SPECADDR2BOTTOM

Definition at line 1296 of file efm32gg11b_eth.h.

#define _ETH_SPECADDR2BOTTOM_RESETVALUE   0x00000000UL

Default value for ETH_SPECADDR2BOTTOM

Definition at line 1295 of file efm32gg11b_eth.h.

#define _ETH_SPECADDR2TOP_ADDR_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_SPECADDR2TOP

Definition at line 1307 of file efm32gg11b_eth.h.

#define _ETH_SPECADDR2TOP_ADDR_MASK   0xFFFFUL

Bit mask for ETH_ADDR

Definition at line 1306 of file efm32gg11b_eth.h.

#define _ETH_SPECADDR2TOP_ADDR_SHIFT   0

Shift value for ETH_ADDR

Definition at line 1305 of file efm32gg11b_eth.h.

#define _ETH_SPECADDR2TOP_FILTERBYTEMASK_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_SPECADDR2TOP

Definition at line 1320 of file efm32gg11b_eth.h.

#define _ETH_SPECADDR2TOP_FILTERBYTEMASK_MASK   0x3F000000UL

Bit mask for ETH_FILTERBYTEMASK

Definition at line 1319 of file efm32gg11b_eth.h.

#define _ETH_SPECADDR2TOP_FILTERBYTEMASK_SHIFT   24

Shift value for ETH_FILTERBYTEMASK

Definition at line 1318 of file efm32gg11b_eth.h.

#define _ETH_SPECADDR2TOP_FILTERTYPE_DA   0x00000000UL

Mode DA for ETH_SPECADDR2TOP

Definition at line 1313 of file efm32gg11b_eth.h.

#define _ETH_SPECADDR2TOP_FILTERTYPE_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_SPECADDR2TOP

Definition at line 1312 of file efm32gg11b_eth.h.

#define _ETH_SPECADDR2TOP_FILTERTYPE_MASK   0x10000UL

Bit mask for ETH_FILTERTYPE

Definition at line 1311 of file efm32gg11b_eth.h.

#define _ETH_SPECADDR2TOP_FILTERTYPE_SA   0x00000001UL

Mode SA for ETH_SPECADDR2TOP

Definition at line 1314 of file efm32gg11b_eth.h.

#define _ETH_SPECADDR2TOP_FILTERTYPE_SHIFT   16

Shift value for ETH_FILTERTYPE

Definition at line 1310 of file efm32gg11b_eth.h.

#define _ETH_SPECADDR2TOP_MASK   0x3F01FFFFUL

Mask for ETH_SPECADDR2TOP

Definition at line 1304 of file efm32gg11b_eth.h.

#define _ETH_SPECADDR2TOP_RESETVALUE   0x00000000UL

Default value for ETH_SPECADDR2TOP

Definition at line 1303 of file efm32gg11b_eth.h.

#define _ETH_SPECADDR3BOTTOM_ADDR_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_SPECADDR3BOTTOM

Definition at line 1328 of file efm32gg11b_eth.h.

#define _ETH_SPECADDR3BOTTOM_ADDR_MASK   0xFFFFFFFFUL

Bit mask for ETH_ADDR

Definition at line 1327 of file efm32gg11b_eth.h.

#define _ETH_SPECADDR3BOTTOM_ADDR_SHIFT   0

Shift value for ETH_ADDR

Definition at line 1326 of file efm32gg11b_eth.h.

#define _ETH_SPECADDR3BOTTOM_MASK   0xFFFFFFFFUL

Mask for ETH_SPECADDR3BOTTOM

Definition at line 1325 of file efm32gg11b_eth.h.

#define _ETH_SPECADDR3BOTTOM_RESETVALUE   0x00000000UL

Default value for ETH_SPECADDR3BOTTOM

Definition at line 1324 of file efm32gg11b_eth.h.

#define _ETH_SPECADDR3TOP_ADDR_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_SPECADDR3TOP

Definition at line 1336 of file efm32gg11b_eth.h.

#define _ETH_SPECADDR3TOP_ADDR_MASK   0xFFFFUL

Bit mask for ETH_ADDR

Definition at line 1335 of file efm32gg11b_eth.h.

#define _ETH_SPECADDR3TOP_ADDR_SHIFT   0

Shift value for ETH_ADDR

Definition at line 1334 of file efm32gg11b_eth.h.

#define _ETH_SPECADDR3TOP_FILTERBYTEMASK_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_SPECADDR3TOP

Definition at line 1349 of file efm32gg11b_eth.h.

#define _ETH_SPECADDR3TOP_FILTERBYTEMASK_MASK   0x3F000000UL

Bit mask for ETH_FILTERBYTEMASK

Definition at line 1348 of file efm32gg11b_eth.h.

#define _ETH_SPECADDR3TOP_FILTERBYTEMASK_SHIFT   24

Shift value for ETH_FILTERBYTEMASK

Definition at line 1347 of file efm32gg11b_eth.h.

#define _ETH_SPECADDR3TOP_FILTERTYPE_DA   0x00000000UL

Mode DA for ETH_SPECADDR3TOP

Definition at line 1342 of file efm32gg11b_eth.h.

#define _ETH_SPECADDR3TOP_FILTERTYPE_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_SPECADDR3TOP

Definition at line 1341 of file efm32gg11b_eth.h.

#define _ETH_SPECADDR3TOP_FILTERTYPE_MASK   0x10000UL

Bit mask for ETH_FILTERTYPE

Definition at line 1340 of file efm32gg11b_eth.h.

#define _ETH_SPECADDR3TOP_FILTERTYPE_SA   0x00000001UL

Mode SA for ETH_SPECADDR3TOP

Definition at line 1343 of file efm32gg11b_eth.h.

#define _ETH_SPECADDR3TOP_FILTERTYPE_SHIFT   16

Shift value for ETH_FILTERTYPE

Definition at line 1339 of file efm32gg11b_eth.h.

#define _ETH_SPECADDR3TOP_MASK   0x3F01FFFFUL

Mask for ETH_SPECADDR3TOP

Definition at line 1333 of file efm32gg11b_eth.h.

#define _ETH_SPECADDR3TOP_RESETVALUE   0x00000000UL

Default value for ETH_SPECADDR3TOP

Definition at line 1332 of file efm32gg11b_eth.h.

#define _ETH_SPECADDR4BOTTOM_ADDR_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_SPECADDR4BOTTOM

Definition at line 1357 of file efm32gg11b_eth.h.

#define _ETH_SPECADDR4BOTTOM_ADDR_MASK   0xFFFFFFFFUL

Bit mask for ETH_ADDR

Definition at line 1356 of file efm32gg11b_eth.h.

#define _ETH_SPECADDR4BOTTOM_ADDR_SHIFT   0

Shift value for ETH_ADDR

Definition at line 1355 of file efm32gg11b_eth.h.

#define _ETH_SPECADDR4BOTTOM_MASK   0xFFFFFFFFUL

Mask for ETH_SPECADDR4BOTTOM

Definition at line 1354 of file efm32gg11b_eth.h.

#define _ETH_SPECADDR4BOTTOM_RESETVALUE   0x00000000UL

Default value for ETH_SPECADDR4BOTTOM

Definition at line 1353 of file efm32gg11b_eth.h.

#define _ETH_SPECADDR4TOP_ADDR_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_SPECADDR4TOP

Definition at line 1365 of file efm32gg11b_eth.h.

#define _ETH_SPECADDR4TOP_ADDR_MASK   0xFFFFUL

Bit mask for ETH_ADDR

Definition at line 1364 of file efm32gg11b_eth.h.

#define _ETH_SPECADDR4TOP_ADDR_SHIFT   0

Shift value for ETH_ADDR

Definition at line 1363 of file efm32gg11b_eth.h.

#define _ETH_SPECADDR4TOP_FILTERBYTEMASK_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_SPECADDR4TOP

Definition at line 1378 of file efm32gg11b_eth.h.

#define _ETH_SPECADDR4TOP_FILTERBYTEMASK_MASK   0x3F000000UL

Bit mask for ETH_FILTERBYTEMASK

Definition at line 1377 of file efm32gg11b_eth.h.

#define _ETH_SPECADDR4TOP_FILTERBYTEMASK_SHIFT   24

Shift value for ETH_FILTERBYTEMASK

Definition at line 1376 of file efm32gg11b_eth.h.

#define _ETH_SPECADDR4TOP_FILTERTYPE_DA   0x00000000UL

Mode DA for ETH_SPECADDR4TOP

Definition at line 1371 of file efm32gg11b_eth.h.

#define _ETH_SPECADDR4TOP_FILTERTYPE_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_SPECADDR4TOP

Definition at line 1370 of file efm32gg11b_eth.h.

#define _ETH_SPECADDR4TOP_FILTERTYPE_MASK   0x10000UL

Bit mask for ETH_FILTERTYPE

Definition at line 1369 of file efm32gg11b_eth.h.

#define _ETH_SPECADDR4TOP_FILTERTYPE_SA   0x00000001UL

Mode SA for ETH_SPECADDR4TOP

Definition at line 1372 of file efm32gg11b_eth.h.

#define _ETH_SPECADDR4TOP_FILTERTYPE_SHIFT   16

Shift value for ETH_FILTERTYPE

Definition at line 1368 of file efm32gg11b_eth.h.

#define _ETH_SPECADDR4TOP_MASK   0x3F01FFFFUL

Mask for ETH_SPECADDR4TOP

Definition at line 1362 of file efm32gg11b_eth.h.

#define _ETH_SPECADDR4TOP_RESETVALUE   0x00000000UL

Default value for ETH_SPECADDR4TOP

Definition at line 1361 of file efm32gg11b_eth.h.

#define _ETH_SPECTYPE1_ENBCOPY_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_SPECTYPE1

Definition at line 1391 of file efm32gg11b_eth.h.

#define _ETH_SPECTYPE1_ENBCOPY_MASK   0x80000000UL

Bit mask for ETH_ENBCOPY

Definition at line 1390 of file efm32gg11b_eth.h.

#define _ETH_SPECTYPE1_ENBCOPY_SHIFT   31

Shift value for ETH_ENBCOPY

Definition at line 1389 of file efm32gg11b_eth.h.

#define _ETH_SPECTYPE1_MASK   0x8000FFFFUL

Mask for ETH_SPECTYPE1

Definition at line 1383 of file efm32gg11b_eth.h.

#define _ETH_SPECTYPE1_MATCH_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_SPECTYPE1

Definition at line 1386 of file efm32gg11b_eth.h.

#define _ETH_SPECTYPE1_MATCH_MASK   0xFFFFUL

Bit mask for ETH_MATCH

Definition at line 1385 of file efm32gg11b_eth.h.

#define _ETH_SPECTYPE1_MATCH_SHIFT   0

Shift value for ETH_MATCH

Definition at line 1384 of file efm32gg11b_eth.h.

#define _ETH_SPECTYPE1_RESETVALUE   0x00000000UL

Default value for ETH_SPECTYPE1

Definition at line 1382 of file efm32gg11b_eth.h.

#define _ETH_SPECTYPE2_ENBCOPY_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_SPECTYPE2

Definition at line 1404 of file efm32gg11b_eth.h.

#define _ETH_SPECTYPE2_ENBCOPY_MASK   0x80000000UL

Bit mask for ETH_ENBCOPY

Definition at line 1403 of file efm32gg11b_eth.h.

#define _ETH_SPECTYPE2_ENBCOPY_SHIFT   31

Shift value for ETH_ENBCOPY

Definition at line 1402 of file efm32gg11b_eth.h.

#define _ETH_SPECTYPE2_MASK   0x8000FFFFUL

Mask for ETH_SPECTYPE2

Definition at line 1396 of file efm32gg11b_eth.h.

#define _ETH_SPECTYPE2_MATCH_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_SPECTYPE2

Definition at line 1399 of file efm32gg11b_eth.h.

#define _ETH_SPECTYPE2_MATCH_MASK   0xFFFFUL

Bit mask for ETH_MATCH

Definition at line 1398 of file efm32gg11b_eth.h.

#define _ETH_SPECTYPE2_MATCH_SHIFT   0

Shift value for ETH_MATCH

Definition at line 1397 of file efm32gg11b_eth.h.

#define _ETH_SPECTYPE2_RESETVALUE   0x00000000UL

Default value for ETH_SPECTYPE2

Definition at line 1395 of file efm32gg11b_eth.h.

#define _ETH_SPECTYPE3_ENBCOPY_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_SPECTYPE3

Definition at line 1417 of file efm32gg11b_eth.h.

#define _ETH_SPECTYPE3_ENBCOPY_MASK   0x80000000UL

Bit mask for ETH_ENBCOPY

Definition at line 1416 of file efm32gg11b_eth.h.

#define _ETH_SPECTYPE3_ENBCOPY_SHIFT   31

Shift value for ETH_ENBCOPY

Definition at line 1415 of file efm32gg11b_eth.h.

#define _ETH_SPECTYPE3_MASK   0x8000FFFFUL

Mask for ETH_SPECTYPE3

Definition at line 1409 of file efm32gg11b_eth.h.

#define _ETH_SPECTYPE3_MATCH_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_SPECTYPE3

Definition at line 1412 of file efm32gg11b_eth.h.

#define _ETH_SPECTYPE3_MATCH_MASK   0xFFFFUL

Bit mask for ETH_MATCH

Definition at line 1411 of file efm32gg11b_eth.h.

#define _ETH_SPECTYPE3_MATCH_SHIFT   0

Shift value for ETH_MATCH

Definition at line 1410 of file efm32gg11b_eth.h.

#define _ETH_SPECTYPE3_RESETVALUE   0x00000000UL

Default value for ETH_SPECTYPE3

Definition at line 1408 of file efm32gg11b_eth.h.

#define _ETH_SPECTYPE4_ENBCOPY_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_SPECTYPE4

Definition at line 1430 of file efm32gg11b_eth.h.

#define _ETH_SPECTYPE4_ENBCOPY_MASK   0x80000000UL

Bit mask for ETH_ENBCOPY

Definition at line 1429 of file efm32gg11b_eth.h.

#define _ETH_SPECTYPE4_ENBCOPY_SHIFT   31

Shift value for ETH_ENBCOPY

Definition at line 1428 of file efm32gg11b_eth.h.

#define _ETH_SPECTYPE4_MASK   0x8000FFFFUL

Mask for ETH_SPECTYPE4

Definition at line 1422 of file efm32gg11b_eth.h.

#define _ETH_SPECTYPE4_MATCH_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_SPECTYPE4

Definition at line 1425 of file efm32gg11b_eth.h.

#define _ETH_SPECTYPE4_MATCH_MASK   0xFFFFUL

Bit mask for ETH_MATCH

Definition at line 1424 of file efm32gg11b_eth.h.

#define _ETH_SPECTYPE4_MATCH_SHIFT   0

Shift value for ETH_MATCH

Definition at line 1423 of file efm32gg11b_eth.h.

#define _ETH_SPECTYPE4_RESETVALUE   0x00000000UL

Default value for ETH_SPECTYPE4

Definition at line 1421 of file efm32gg11b_eth.h.

#define _ETH_STACKEDVLAN_ENBPROCESSING_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_STACKEDVLAN

Definition at line 1479 of file efm32gg11b_eth.h.

#define _ETH_STACKEDVLAN_ENBPROCESSING_MASK   0x80000000UL

Bit mask for ETH_ENBPROCESSING

Definition at line 1478 of file efm32gg11b_eth.h.

#define _ETH_STACKEDVLAN_ENBPROCESSING_SHIFT   31

Shift value for ETH_ENBPROCESSING

Definition at line 1477 of file efm32gg11b_eth.h.

#define _ETH_STACKEDVLAN_MASK   0x8000FFFFUL

Mask for ETH_STACKEDVLAN

Definition at line 1471 of file efm32gg11b_eth.h.

#define _ETH_STACKEDVLAN_MATCH_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_STACKEDVLAN

Definition at line 1474 of file efm32gg11b_eth.h.

#define _ETH_STACKEDVLAN_MATCH_MASK   0xFFFFUL

Bit mask for ETH_MATCH

Definition at line 1473 of file efm32gg11b_eth.h.

#define _ETH_STACKEDVLAN_MATCH_SHIFT   0

Shift value for ETH_MATCH

Definition at line 1472 of file efm32gg11b_eth.h.

#define _ETH_STACKEDVLAN_RESETVALUE   0x00000000UL

Default value for ETH_STACKEDVLAN

Definition at line 1470 of file efm32gg11b_eth.h.

#define _ETH_STRETCHRATIO_IPGSTRETCH_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_STRETCHRATIO

Definition at line 1466 of file efm32gg11b_eth.h.

#define _ETH_STRETCHRATIO_IPGSTRETCH_MASK   0xFFFFUL

Bit mask for ETH_IPGSTRETCH

Definition at line 1465 of file efm32gg11b_eth.h.

#define _ETH_STRETCHRATIO_IPGSTRETCH_SHIFT   0

Shift value for ETH_IPGSTRETCH

Definition at line 1464 of file efm32gg11b_eth.h.

#define _ETH_STRETCHRATIO_MASK   0x0000FFFFUL

Mask for ETH_STRETCHRATIO

Definition at line 1463 of file efm32gg11b_eth.h.

#define _ETH_STRETCHRATIO_RESETVALUE   0x00000000UL

Default value for ETH_STRETCHRATIO

Definition at line 1462 of file efm32gg11b_eth.h.

#define _ETH_SYSWAKETIME_MASK   0x0000FFFFUL

Mask for ETH_SYSWAKETIME

Definition at line 1247 of file efm32gg11b_eth.h.

#define _ETH_SYSWAKETIME_RESETVALUE   0x00000000UL

Default value for ETH_SYSWAKETIME

Definition at line 1246 of file efm32gg11b_eth.h.

#define _ETH_SYSWAKETIME_SYSWAKETIME_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_SYSWAKETIME

Definition at line 1250 of file efm32gg11b_eth.h.

#define _ETH_SYSWAKETIME_SYSWAKETIME_MASK   0xFFFFUL

Bit mask for ETH_SYSWAKETIME

Definition at line 1249 of file efm32gg11b_eth.h.

#define _ETH_SYSWAKETIME_SYSWAKETIME_SHIFT   0

Shift value for ETH_SYSWAKETIME

Definition at line 1248 of file efm32gg11b_eth.h.

#define _ETH_TSUMSBSECCMP_COMPVAL_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_TSUMSBSECCMP

Definition at line 1547 of file efm32gg11b_eth.h.

#define _ETH_TSUMSBSECCMP_COMPVAL_MASK   0xFFFFUL

Bit mask for ETH_COMPVAL

Definition at line 1546 of file efm32gg11b_eth.h.

#define _ETH_TSUMSBSECCMP_COMPVAL_SHIFT   0

Shift value for ETH_COMPVAL

Definition at line 1545 of file efm32gg11b_eth.h.

#define _ETH_TSUMSBSECCMP_MASK   0x0000FFFFUL

Mask for ETH_TSUMSBSECCMP

Definition at line 1544 of file efm32gg11b_eth.h.

#define _ETH_TSUMSBSECCMP_RESETVALUE   0x00000000UL

Default value for ETH_TSUMSBSECCMP

Definition at line 1543 of file efm32gg11b_eth.h.

#define _ETH_TSUNSECCMP_COMPVAL_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_TSUNSECCMP

Definition at line 1531 of file efm32gg11b_eth.h.

#define _ETH_TSUNSECCMP_COMPVAL_MASK   0x3FFFFFUL

Bit mask for ETH_COMPVAL

Definition at line 1530 of file efm32gg11b_eth.h.

#define _ETH_TSUNSECCMP_COMPVAL_SHIFT   0

Shift value for ETH_COMPVAL

Definition at line 1529 of file efm32gg11b_eth.h.

#define _ETH_TSUNSECCMP_MASK   0x003FFFFFUL

Mask for ETH_TSUNSECCMP

Definition at line 1528 of file efm32gg11b_eth.h.

#define _ETH_TSUNSECCMP_RESETVALUE   0x00000000UL

Default value for ETH_TSUNSECCMP

Definition at line 1527 of file efm32gg11b_eth.h.

#define _ETH_TSUPEERRXMSBSEC_MASK   0x0000FFFFUL

Mask for ETH_TSUPEERRXMSBSEC

Definition at line 1576 of file efm32gg11b_eth.h.

#define _ETH_TSUPEERRXMSBSEC_RESETVALUE   0x00000000UL

Default value for ETH_TSUPEERRXMSBSEC

Definition at line 1575 of file efm32gg11b_eth.h.

#define _ETH_TSUPEERRXMSBSEC_TIMERSEC_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_TSUPEERRXMSBSEC

Definition at line 1579 of file efm32gg11b_eth.h.

#define _ETH_TSUPEERRXMSBSEC_TIMERSEC_MASK   0xFFFFUL

Bit mask for ETH_TIMERSEC

Definition at line 1578 of file efm32gg11b_eth.h.

#define _ETH_TSUPEERRXMSBSEC_TIMERSEC_SHIFT   0

Shift value for ETH_TIMERSEC

Definition at line 1577 of file efm32gg11b_eth.h.

#define _ETH_TSUPEERRXNSEC_MASK   0x3FFFFFFFUL

Mask for ETH_TSUPEERRXNSEC

Definition at line 2073 of file efm32gg11b_eth.h.

#define _ETH_TSUPEERRXNSEC_RESETVALUE   0x00000000UL

Default value for ETH_TSUPEERRXNSEC

Definition at line 2072 of file efm32gg11b_eth.h.

#define _ETH_TSUPEERRXNSEC_TIMER_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_TSUPEERRXNSEC

Definition at line 2076 of file efm32gg11b_eth.h.

#define _ETH_TSUPEERRXNSEC_TIMER_MASK   0x3FFFFFFFUL

Bit mask for ETH_TIMER

Definition at line 2075 of file efm32gg11b_eth.h.

#define _ETH_TSUPEERRXNSEC_TIMER_SHIFT   0

Shift value for ETH_TIMER

Definition at line 2074 of file efm32gg11b_eth.h.

#define _ETH_TSUPEERRXSEC_MASK   0xFFFFFFFFUL

Mask for ETH_TSUPEERRXSEC

Definition at line 2065 of file efm32gg11b_eth.h.

#define _ETH_TSUPEERRXSEC_RESETVALUE   0x00000000UL

Default value for ETH_TSUPEERRXSEC

Definition at line 2064 of file efm32gg11b_eth.h.

#define _ETH_TSUPEERRXSEC_TIMER_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_TSUPEERRXSEC

Definition at line 2068 of file efm32gg11b_eth.h.

#define _ETH_TSUPEERRXSEC_TIMER_MASK   0xFFFFFFFFUL

Bit mask for ETH_TIMER

Definition at line 2067 of file efm32gg11b_eth.h.

#define _ETH_TSUPEERRXSEC_TIMER_SHIFT   0

Shift value for ETH_TIMER

Definition at line 2066 of file efm32gg11b_eth.h.

#define _ETH_TSUPEERTXMSBSEC_MASK   0x0000FFFFUL

Mask for ETH_TSUPEERTXMSBSEC

Definition at line 1568 of file efm32gg11b_eth.h.

#define _ETH_TSUPEERTXMSBSEC_RESETVALUE   0x00000000UL

Default value for ETH_TSUPEERTXMSBSEC

Definition at line 1567 of file efm32gg11b_eth.h.

#define _ETH_TSUPEERTXMSBSEC_TIMERSEC_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_TSUPEERTXMSBSEC

Definition at line 1571 of file efm32gg11b_eth.h.

#define _ETH_TSUPEERTXMSBSEC_TIMERSEC_MASK   0xFFFFUL

Bit mask for ETH_TIMERSEC

Definition at line 1570 of file efm32gg11b_eth.h.

#define _ETH_TSUPEERTXMSBSEC_TIMERSEC_SHIFT   0

Shift value for ETH_TIMERSEC

Definition at line 1569 of file efm32gg11b_eth.h.

#define _ETH_TSUPEERTXNSEC_MASK   0x3FFFFFFFUL

Mask for ETH_TSUPEERTXNSEC

Definition at line 2057 of file efm32gg11b_eth.h.

#define _ETH_TSUPEERTXNSEC_RESETVALUE   0x00000000UL

Default value for ETH_TSUPEERTXNSEC

Definition at line 2056 of file efm32gg11b_eth.h.

#define _ETH_TSUPEERTXNSEC_TIMER_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_TSUPEERTXNSEC

Definition at line 2060 of file efm32gg11b_eth.h.

#define _ETH_TSUPEERTXNSEC_TIMER_MASK   0x3FFFFFFFUL

Bit mask for ETH_TIMER

Definition at line 2059 of file efm32gg11b_eth.h.

#define _ETH_TSUPEERTXNSEC_TIMER_SHIFT   0

Shift value for ETH_TIMER

Definition at line 2058 of file efm32gg11b_eth.h.

#define _ETH_TSUPEERTXSEC_MASK   0xFFFFFFFFUL

Mask for ETH_TSUPEERTXSEC

Definition at line 2049 of file efm32gg11b_eth.h.

#define _ETH_TSUPEERTXSEC_RESETVALUE   0x00000000UL

Default value for ETH_TSUPEERTXSEC

Definition at line 2048 of file efm32gg11b_eth.h.

#define _ETH_TSUPEERTXSEC_TIMER_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_TSUPEERTXSEC

Definition at line 2052 of file efm32gg11b_eth.h.

#define _ETH_TSUPEERTXSEC_TIMER_MASK   0xFFFFFFFFUL

Bit mask for ETH_TIMER

Definition at line 2051 of file efm32gg11b_eth.h.

#define _ETH_TSUPEERTXSEC_TIMER_SHIFT   0

Shift value for ETH_TIMER

Definition at line 2050 of file efm32gg11b_eth.h.

#define _ETH_TSUPTPRXMSBSEC_MASK   0x0000FFFFUL

Mask for ETH_TSUPTPRXMSBSEC

Definition at line 1560 of file efm32gg11b_eth.h.

#define _ETH_TSUPTPRXMSBSEC_RESETVALUE   0x00000000UL

Default value for ETH_TSUPTPRXMSBSEC

Definition at line 1559 of file efm32gg11b_eth.h.

#define _ETH_TSUPTPRXMSBSEC_TIMERSEC_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_TSUPTPRXMSBSEC

Definition at line 1563 of file efm32gg11b_eth.h.

#define _ETH_TSUPTPRXMSBSEC_TIMERSEC_MASK   0xFFFFUL

Bit mask for ETH_TIMERSEC

Definition at line 1562 of file efm32gg11b_eth.h.

#define _ETH_TSUPTPRXMSBSEC_TIMERSEC_SHIFT   0

Shift value for ETH_TIMERSEC

Definition at line 1561 of file efm32gg11b_eth.h.

#define _ETH_TSUPTPRXNSEC_MASK   0x3FFFFFFFUL

Mask for ETH_TSUPTPRXNSEC

Definition at line 2041 of file efm32gg11b_eth.h.

#define _ETH_TSUPTPRXNSEC_RESETVALUE   0x00000000UL

Default value for ETH_TSUPTPRXNSEC

Definition at line 2040 of file efm32gg11b_eth.h.

#define _ETH_TSUPTPRXNSEC_TIMER_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_TSUPTPRXNSEC

Definition at line 2044 of file efm32gg11b_eth.h.

#define _ETH_TSUPTPRXNSEC_TIMER_MASK   0x3FFFFFFFUL

Bit mask for ETH_TIMER

Definition at line 2043 of file efm32gg11b_eth.h.

#define _ETH_TSUPTPRXNSEC_TIMER_SHIFT   0

Shift value for ETH_TIMER

Definition at line 2042 of file efm32gg11b_eth.h.

#define _ETH_TSUPTPRXSEC_MASK   0xFFFFFFFFUL

Mask for ETH_TSUPTPRXSEC

Definition at line 2033 of file efm32gg11b_eth.h.

#define _ETH_TSUPTPRXSEC_RESETVALUE   0x00000000UL

Default value for ETH_TSUPTPRXSEC

Definition at line 2032 of file efm32gg11b_eth.h.

#define _ETH_TSUPTPRXSEC_TIMER_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_TSUPTPRXSEC

Definition at line 2036 of file efm32gg11b_eth.h.

#define _ETH_TSUPTPRXSEC_TIMER_MASK   0xFFFFFFFFUL

Bit mask for ETH_TIMER

Definition at line 2035 of file efm32gg11b_eth.h.

#define _ETH_TSUPTPRXSEC_TIMER_SHIFT   0

Shift value for ETH_TIMER

Definition at line 2034 of file efm32gg11b_eth.h.

#define _ETH_TSUPTPTXMSBSEC_MASK   0x0000FFFFUL

Mask for ETH_TSUPTPTXMSBSEC

Definition at line 1552 of file efm32gg11b_eth.h.

#define _ETH_TSUPTPTXMSBSEC_RESETVALUE   0x00000000UL

Default value for ETH_TSUPTPTXMSBSEC

Definition at line 1551 of file efm32gg11b_eth.h.

#define _ETH_TSUPTPTXMSBSEC_TIMERSEC_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_TSUPTPTXMSBSEC

Definition at line 1555 of file efm32gg11b_eth.h.

#define _ETH_TSUPTPTXMSBSEC_TIMERSEC_MASK   0xFFFFUL

Bit mask for ETH_TIMERSEC

Definition at line 1554 of file efm32gg11b_eth.h.

#define _ETH_TSUPTPTXMSBSEC_TIMERSEC_SHIFT   0

Shift value for ETH_TIMERSEC

Definition at line 1553 of file efm32gg11b_eth.h.

#define _ETH_TSUPTPTXNSEC_MASK   0x3FFFFFFFUL

Mask for ETH_TSUPTPTXNSEC

Definition at line 2025 of file efm32gg11b_eth.h.

#define _ETH_TSUPTPTXNSEC_RESETVALUE   0x00000000UL

Default value for ETH_TSUPTPTXNSEC

Definition at line 2024 of file efm32gg11b_eth.h.

#define _ETH_TSUPTPTXNSEC_TIMER_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_TSUPTPTXNSEC

Definition at line 2028 of file efm32gg11b_eth.h.

#define _ETH_TSUPTPTXNSEC_TIMER_MASK   0x3FFFFFFFUL

Bit mask for ETH_TIMER

Definition at line 2027 of file efm32gg11b_eth.h.

#define _ETH_TSUPTPTXNSEC_TIMER_SHIFT   0

Shift value for ETH_TIMER

Definition at line 2026 of file efm32gg11b_eth.h.

#define _ETH_TSUPTPTXSEC_MASK   0xFFFFFFFFUL

Mask for ETH_TSUPTPTXSEC

Definition at line 2017 of file efm32gg11b_eth.h.

#define _ETH_TSUPTPTXSEC_RESETVALUE   0x00000000UL

Default value for ETH_TSUPTPTXSEC

Definition at line 2016 of file efm32gg11b_eth.h.

#define _ETH_TSUPTPTXSEC_TIMER_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_TSUPTPTXSEC

Definition at line 2020 of file efm32gg11b_eth.h.

#define _ETH_TSUPTPTXSEC_TIMER_MASK   0xFFFFFFFFUL

Bit mask for ETH_TIMER

Definition at line 2019 of file efm32gg11b_eth.h.

#define _ETH_TSUPTPTXSEC_TIMER_SHIFT   0

Shift value for ETH_TIMER

Definition at line 2018 of file efm32gg11b_eth.h.

#define _ETH_TSUSECCMP_COMPVAL_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_TSUSECCMP

Definition at line 1539 of file efm32gg11b_eth.h.

#define _ETH_TSUSECCMP_COMPVAL_MASK   0xFFFFFFFFUL

Bit mask for ETH_COMPVAL

Definition at line 1538 of file efm32gg11b_eth.h.

#define _ETH_TSUSECCMP_COMPVAL_SHIFT   0

Shift value for ETH_COMPVAL

Definition at line 1537 of file efm32gg11b_eth.h.

#define _ETH_TSUSECCMP_MASK   0xFFFFFFFFUL

Mask for ETH_TSUSECCMP

Definition at line 1536 of file efm32gg11b_eth.h.

#define _ETH_TSUSECCMP_RESETVALUE   0x00000000UL

Default value for ETH_TSUSECCMP

Definition at line 1535 of file efm32gg11b_eth.h.

#define _ETH_TSUTIMERADJUST_ADDSUBTRACT_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_TSUTIMERADJUST

Definition at line 1996 of file efm32gg11b_eth.h.

#define _ETH_TSUTIMERADJUST_ADDSUBTRACT_MASK   0x80000000UL

Bit mask for ETH_ADDSUBTRACT

Definition at line 1995 of file efm32gg11b_eth.h.

#define _ETH_TSUTIMERADJUST_ADDSUBTRACT_SHIFT   31

Shift value for ETH_ADDSUBTRACT

Definition at line 1994 of file efm32gg11b_eth.h.

#define _ETH_TSUTIMERADJUST_INCREMENTVAL_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_TSUTIMERADJUST

Definition at line 1991 of file efm32gg11b_eth.h.

#define _ETH_TSUTIMERADJUST_INCREMENTVAL_MASK   0x3FFFFFFFUL

Bit mask for ETH_INCREMENTVAL

Definition at line 1990 of file efm32gg11b_eth.h.

#define _ETH_TSUTIMERADJUST_INCREMENTVAL_SHIFT   0

Shift value for ETH_INCREMENTVAL

Definition at line 1989 of file efm32gg11b_eth.h.

#define _ETH_TSUTIMERADJUST_MASK   0xBFFFFFFFUL

Mask for ETH_TSUTIMERADJUST

Definition at line 1988 of file efm32gg11b_eth.h.

#define _ETH_TSUTIMERADJUST_RESETVALUE   0x00000000UL

Default value for ETH_TSUTIMERADJUST

Definition at line 1987 of file efm32gg11b_eth.h.

#define _ETH_TSUTIMERINCR_ALTNSINCR_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_TSUTIMERINCR

Definition at line 2008 of file efm32gg11b_eth.h.

#define _ETH_TSUTIMERINCR_ALTNSINCR_MASK   0xFF00UL

Bit mask for ETH_ALTNSINCR

Definition at line 2007 of file efm32gg11b_eth.h.

#define _ETH_TSUTIMERINCR_ALTNSINCR_SHIFT   8

Shift value for ETH_ALTNSINCR

Definition at line 2006 of file efm32gg11b_eth.h.

#define _ETH_TSUTIMERINCR_MASK   0x00FFFFFFUL

Mask for ETH_TSUTIMERINCR

Definition at line 2001 of file efm32gg11b_eth.h.

#define _ETH_TSUTIMERINCR_NSINCREMENT_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_TSUTIMERINCR

Definition at line 2004 of file efm32gg11b_eth.h.

#define _ETH_TSUTIMERINCR_NSINCREMENT_MASK   0xFFUL

Bit mask for ETH_NSINCREMENT

Definition at line 2003 of file efm32gg11b_eth.h.

#define _ETH_TSUTIMERINCR_NSINCREMENT_SHIFT   0

Shift value for ETH_NSINCREMENT

Definition at line 2002 of file efm32gg11b_eth.h.

#define _ETH_TSUTIMERINCR_NUMINCS_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_TSUTIMERINCR

Definition at line 2012 of file efm32gg11b_eth.h.

#define _ETH_TSUTIMERINCR_NUMINCS_MASK   0xFF0000UL

Bit mask for ETH_NUMINCS

Definition at line 2011 of file efm32gg11b_eth.h.

#define _ETH_TSUTIMERINCR_NUMINCS_SHIFT   16

Shift value for ETH_NUMINCS

Definition at line 2010 of file efm32gg11b_eth.h.

#define _ETH_TSUTIMERINCR_RESETVALUE   0x00000000UL

Default value for ETH_TSUTIMERINCR

Definition at line 2000 of file efm32gg11b_eth.h.

#define _ETH_TSUTIMERINCRSUBNSEC_MASK   0xFF00FFFFUL

Mask for ETH_TSUTIMERINCRSUBNSEC

Definition at line 1952 of file efm32gg11b_eth.h.

#define _ETH_TSUTIMERINCRSUBNSEC_RESETVALUE   0x00000000UL

Default value for ETH_TSUTIMERINCRSUBNSEC

Definition at line 1951 of file efm32gg11b_eth.h.

#define _ETH_TSUTIMERINCRSUBNSEC_SUBNSINCR_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_TSUTIMERINCRSUBNSEC

Definition at line 1955 of file efm32gg11b_eth.h.

#define _ETH_TSUTIMERINCRSUBNSEC_SUBNSINCR_MASK   0xFFFFUL

Bit mask for ETH_SUBNSINCR

Definition at line 1954 of file efm32gg11b_eth.h.

#define _ETH_TSUTIMERINCRSUBNSEC_SUBNSINCR_SHIFT   0

Shift value for ETH_SUBNSINCR

Definition at line 1953 of file efm32gg11b_eth.h.

#define _ETH_TSUTIMERINCRSUBNSEC_SUBNSINCRLSB_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_TSUTIMERINCRSUBNSEC

Definition at line 1959 of file efm32gg11b_eth.h.

#define _ETH_TSUTIMERINCRSUBNSEC_SUBNSINCRLSB_MASK   0xFF000000UL

Bit mask for ETH_SUBNSINCRLSB

Definition at line 1958 of file efm32gg11b_eth.h.

#define _ETH_TSUTIMERINCRSUBNSEC_SUBNSINCRLSB_SHIFT   24

Shift value for ETH_SUBNSINCRLSB

Definition at line 1957 of file efm32gg11b_eth.h.

#define _ETH_TSUTIMERMSBSEC_MASK   0x0000FFFFUL

Mask for ETH_TSUTIMERMSBSEC

Definition at line 1964 of file efm32gg11b_eth.h.

#define _ETH_TSUTIMERMSBSEC_RESETVALUE   0x00000000UL

Default value for ETH_TSUTIMERMSBSEC

Definition at line 1963 of file efm32gg11b_eth.h.

#define _ETH_TSUTIMERMSBSEC_TIMER_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_TSUTIMERMSBSEC

Definition at line 1967 of file efm32gg11b_eth.h.

#define _ETH_TSUTIMERMSBSEC_TIMER_MASK   0xFFFFUL

Bit mask for ETH_TIMER

Definition at line 1966 of file efm32gg11b_eth.h.

#define _ETH_TSUTIMERMSBSEC_TIMER_SHIFT   0

Shift value for ETH_TIMER

Definition at line 1965 of file efm32gg11b_eth.h.

#define _ETH_TSUTIMERNSEC_MASK   0x3FFFFFFFUL

Mask for ETH_TSUTIMERNSEC

Definition at line 1980 of file efm32gg11b_eth.h.

#define _ETH_TSUTIMERNSEC_RESETVALUE   0x00000000UL

Default value for ETH_TSUTIMERNSEC

Definition at line 1979 of file efm32gg11b_eth.h.

#define _ETH_TSUTIMERNSEC_TIMER_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_TSUTIMERNSEC

Definition at line 1983 of file efm32gg11b_eth.h.

#define _ETH_TSUTIMERNSEC_TIMER_MASK   0x3FFFFFFFUL

Bit mask for ETH_TIMER

Definition at line 1982 of file efm32gg11b_eth.h.

#define _ETH_TSUTIMERNSEC_TIMER_SHIFT   0

Shift value for ETH_TIMER

Definition at line 1981 of file efm32gg11b_eth.h.

#define _ETH_TSUTIMERSEC_MASK   0xFFFFFFFFUL

Mask for ETH_TSUTIMERSEC

Definition at line 1972 of file efm32gg11b_eth.h.

#define _ETH_TSUTIMERSEC_RESETVALUE   0x00000000UL

Default value for ETH_TSUTIMERSEC

Definition at line 1971 of file efm32gg11b_eth.h.

#define _ETH_TSUTIMERSEC_TIMER_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_TSUTIMERSEC

Definition at line 1975 of file efm32gg11b_eth.h.

#define _ETH_TSUTIMERSEC_TIMER_MASK   0xFFFFFFFFUL

Bit mask for ETH_TIMER

Definition at line 1974 of file efm32gg11b_eth.h.

#define _ETH_TSUTIMERSEC_TIMER_SHIFT   0

Shift value for ETH_TIMER

Definition at line 1973 of file efm32gg11b_eth.h.

#define _ETH_TXBDCTRL_MASK   0x00000030UL

Mask for ETH_TXBDCTRL

Definition at line 2149 of file efm32gg11b_eth.h.

#define _ETH_TXBDCTRL_RESETVALUE   0x00000000UL

Default value for ETH_TXBDCTRL

Definition at line 2148 of file efm32gg11b_eth.h.

#define _ETH_TXBDCTRL_TXBDTSMODE_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_TXBDCTRL

Definition at line 2152 of file efm32gg11b_eth.h.

#define _ETH_TXBDCTRL_TXBDTSMODE_MASK   0x30UL

Bit mask for ETH_TXBDTSMODE

Definition at line 2151 of file efm32gg11b_eth.h.

#define _ETH_TXBDCTRL_TXBDTSMODE_SHIFT   4

Shift value for ETH_TXBDTSMODE

Definition at line 2150 of file efm32gg11b_eth.h.

#define _ETH_TXLPI_COUNT_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_TXLPI

Definition at line 2136 of file efm32gg11b_eth.h.

#define _ETH_TXLPI_COUNT_MASK   0xFFFFUL

Bit mask for ETH_COUNT

Definition at line 2135 of file efm32gg11b_eth.h.

#define _ETH_TXLPI_COUNT_SHIFT   0

Shift value for ETH_COUNT

Definition at line 2134 of file efm32gg11b_eth.h.

#define _ETH_TXLPI_MASK   0x0000FFFFUL

Mask for ETH_TXLPI

Definition at line 2133 of file efm32gg11b_eth.h.

#define _ETH_TXLPI_RESETVALUE   0x00000000UL

Default value for ETH_TXLPI

Definition at line 2132 of file efm32gg11b_eth.h.

#define _ETH_TXLPITIME_LPITIME_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_TXLPITIME

Definition at line 2144 of file efm32gg11b_eth.h.

#define _ETH_TXLPITIME_LPITIME_MASK   0xFFFFFFUL

Bit mask for ETH_LPITIME

Definition at line 2143 of file efm32gg11b_eth.h.

#define _ETH_TXLPITIME_LPITIME_SHIFT   0

Shift value for ETH_LPITIME

Definition at line 2142 of file efm32gg11b_eth.h.

#define _ETH_TXLPITIME_MASK   0x00FFFFFFUL

Mask for ETH_TXLPITIME

Definition at line 2141 of file efm32gg11b_eth.h.

#define _ETH_TXLPITIME_RESETVALUE   0x00000000UL

Default value for ETH_TXLPITIME

Definition at line 2140 of file efm32gg11b_eth.h.

#define _ETH_TXPAUSEQUANT1_MASK   0xFFFFFFFFUL

Mask for ETH_TXPAUSEQUANT1

Definition at line 2081 of file efm32gg11b_eth.h.

#define _ETH_TXPAUSEQUANT1_QUANTP2_DEFAULT   0x0000FFFFUL

Mode DEFAULT for ETH_TXPAUSEQUANT1

Definition at line 2084 of file efm32gg11b_eth.h.

#define _ETH_TXPAUSEQUANT1_QUANTP2_MASK   0xFFFFUL

Bit mask for ETH_QUANTP2

Definition at line 2083 of file efm32gg11b_eth.h.

#define _ETH_TXPAUSEQUANT1_QUANTP2_SHIFT   0

Shift value for ETH_QUANTP2

Definition at line 2082 of file efm32gg11b_eth.h.

#define _ETH_TXPAUSEQUANT1_QUANTP3_DEFAULT   0x0000FFFFUL

Mode DEFAULT for ETH_TXPAUSEQUANT1

Definition at line 2088 of file efm32gg11b_eth.h.

#define _ETH_TXPAUSEQUANT1_QUANTP3_MASK   0xFFFF0000UL

Bit mask for ETH_QUANTP3

Definition at line 2087 of file efm32gg11b_eth.h.

#define _ETH_TXPAUSEQUANT1_QUANTP3_SHIFT   16

Shift value for ETH_QUANTP3

Definition at line 2086 of file efm32gg11b_eth.h.

#define _ETH_TXPAUSEQUANT1_RESETVALUE   0xFFFFFFFFUL

Default value for ETH_TXPAUSEQUANT1

Definition at line 2080 of file efm32gg11b_eth.h.

#define _ETH_TXPAUSEQUANT2_MASK   0xFFFFFFFFUL

Mask for ETH_TXPAUSEQUANT2

Definition at line 2093 of file efm32gg11b_eth.h.

#define _ETH_TXPAUSEQUANT2_QUANTP4_DEFAULT   0x0000FFFFUL

Mode DEFAULT for ETH_TXPAUSEQUANT2

Definition at line 2096 of file efm32gg11b_eth.h.

#define _ETH_TXPAUSEQUANT2_QUANTP4_MASK   0xFFFFUL

Bit mask for ETH_QUANTP4

Definition at line 2095 of file efm32gg11b_eth.h.

#define _ETH_TXPAUSEQUANT2_QUANTP4_SHIFT   0

Shift value for ETH_QUANTP4

Definition at line 2094 of file efm32gg11b_eth.h.

#define _ETH_TXPAUSEQUANT2_QUANTP5_DEFAULT   0x0000FFFFUL

Mode DEFAULT for ETH_TXPAUSEQUANT2

Definition at line 2100 of file efm32gg11b_eth.h.

#define _ETH_TXPAUSEQUANT2_QUANTP5_MASK   0xFFFF0000UL

Bit mask for ETH_QUANTP5

Definition at line 2099 of file efm32gg11b_eth.h.

#define _ETH_TXPAUSEQUANT2_QUANTP5_SHIFT   16

Shift value for ETH_QUANTP5

Definition at line 2098 of file efm32gg11b_eth.h.

#define _ETH_TXPAUSEQUANT2_RESETVALUE   0xFFFFFFFFUL

Default value for ETH_TXPAUSEQUANT2

Definition at line 2092 of file efm32gg11b_eth.h.

#define _ETH_TXPAUSEQUANT3_MASK   0xFFFFFFFFUL

Mask for ETH_TXPAUSEQUANT3

Definition at line 2105 of file efm32gg11b_eth.h.

#define _ETH_TXPAUSEQUANT3_QUANTP6_DEFAULT   0x0000FFFFUL

Mode DEFAULT for ETH_TXPAUSEQUANT3

Definition at line 2108 of file efm32gg11b_eth.h.

#define _ETH_TXPAUSEQUANT3_QUANTP6_MASK   0xFFFFUL

Bit mask for ETH_QUANTP6

Definition at line 2107 of file efm32gg11b_eth.h.

#define _ETH_TXPAUSEQUANT3_QUANTP6_SHIFT   0

Shift value for ETH_QUANTP6

Definition at line 2106 of file efm32gg11b_eth.h.

#define _ETH_TXPAUSEQUANT3_QUANTP7_DEFAULT   0x0000FFFFUL

Mode DEFAULT for ETH_TXPAUSEQUANT3

Definition at line 2112 of file efm32gg11b_eth.h.

#define _ETH_TXPAUSEQUANT3_QUANTP7_MASK   0xFFFF0000UL

Bit mask for ETH_QUANTP7

Definition at line 2111 of file efm32gg11b_eth.h.

#define _ETH_TXPAUSEQUANT3_QUANTP7_SHIFT   16

Shift value for ETH_QUANTP7

Definition at line 2110 of file efm32gg11b_eth.h.

#define _ETH_TXPAUSEQUANT3_RESETVALUE   0xFFFFFFFFUL

Default value for ETH_TXPAUSEQUANT3

Definition at line 2104 of file efm32gg11b_eth.h.

#define _ETH_TXPAUSEQUANT_MASK   0xFFFFFFFFUL

Mask for ETH_TXPAUSEQUANT

Definition at line 1189 of file efm32gg11b_eth.h.

#define _ETH_TXPAUSEQUANT_QUANT_DEFAULT   0x0000FFFFUL

Mode DEFAULT for ETH_TXPAUSEQUANT

Definition at line 1192 of file efm32gg11b_eth.h.

#define _ETH_TXPAUSEQUANT_QUANT_MASK   0xFFFFUL

Bit mask for ETH_QUANT

Definition at line 1191 of file efm32gg11b_eth.h.

#define _ETH_TXPAUSEQUANT_QUANT_SHIFT   0

Shift value for ETH_QUANT

Definition at line 1190 of file efm32gg11b_eth.h.

#define _ETH_TXPAUSEQUANT_QUANTP1_DEFAULT   0x0000FFFFUL

Mode DEFAULT for ETH_TXPAUSEQUANT

Definition at line 1196 of file efm32gg11b_eth.h.

#define _ETH_TXPAUSEQUANT_QUANTP1_MASK   0xFFFF0000UL

Bit mask for ETH_QUANTP1

Definition at line 1195 of file efm32gg11b_eth.h.

#define _ETH_TXPAUSEQUANT_QUANTP1_SHIFT   16

Shift value for ETH_QUANTP1

Definition at line 1194 of file efm32gg11b_eth.h.

#define _ETH_TXPAUSEQUANT_RESETVALUE   0xFFFFFFFFUL

Default value for ETH_TXPAUSEQUANT

Definition at line 1188 of file efm32gg11b_eth.h.

#define _ETH_TXPFCPAUSE_MASK   0x0000FFFFUL

Mask for ETH_TXPFCPAUSE

Definition at line 1484 of file efm32gg11b_eth.h.

#define _ETH_TXPFCPAUSE_RESETVALUE   0x00000000UL

Default value for ETH_TXPFCPAUSE

Definition at line 1483 of file efm32gg11b_eth.h.

#define _ETH_TXPFCPAUSE_VECTOR_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_TXPFCPAUSE

Definition at line 1491 of file efm32gg11b_eth.h.

#define _ETH_TXPFCPAUSE_VECTOR_MASK   0xFF00UL

Bit mask for ETH_VECTOR

Definition at line 1490 of file efm32gg11b_eth.h.

#define _ETH_TXPFCPAUSE_VECTOR_SHIFT   8

Shift value for ETH_VECTOR

Definition at line 1489 of file efm32gg11b_eth.h.

#define _ETH_TXPFCPAUSE_VECTORENB_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_TXPFCPAUSE

Definition at line 1487 of file efm32gg11b_eth.h.

#define _ETH_TXPFCPAUSE_VECTORENB_MASK   0xFFUL

Bit mask for ETH_VECTORENB

Definition at line 1486 of file efm32gg11b_eth.h.

#define _ETH_TXPFCPAUSE_VECTORENB_SHIFT   0

Shift value for ETH_VECTORENB

Definition at line 1485 of file efm32gg11b_eth.h.

#define _ETH_TXPTPUNICAST_ADDR_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_TXPTPUNICAST

Definition at line 1523 of file efm32gg11b_eth.h.

#define _ETH_TXPTPUNICAST_ADDR_MASK   0xFFFFFFFFUL

Bit mask for ETH_ADDR

Definition at line 1522 of file efm32gg11b_eth.h.

#define _ETH_TXPTPUNICAST_ADDR_SHIFT   0

Shift value for ETH_ADDR

Definition at line 1521 of file efm32gg11b_eth.h.

#define _ETH_TXPTPUNICAST_MASK   0xFFFFFFFFUL

Mask for ETH_TXPTPUNICAST

Definition at line 1520 of file efm32gg11b_eth.h.

#define _ETH_TXPTPUNICAST_RESETVALUE   0x00000000UL

Default value for ETH_TXPTPUNICAST

Definition at line 1519 of file efm32gg11b_eth.h.

#define _ETH_TXQPTR_DMATXQPTR_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_TXQPTR

Definition at line 597 of file efm32gg11b_eth.h.

#define _ETH_TXQPTR_DMATXQPTR_MASK   0xFFFFFFFCUL

Bit mask for ETH_DMATXQPTR

Definition at line 596 of file efm32gg11b_eth.h.

#define _ETH_TXQPTR_DMATXQPTR_SHIFT   2

Shift value for ETH_DMATXQPTR

Definition at line 595 of file efm32gg11b_eth.h.

#define _ETH_TXQPTR_MASK   0xFFFFFFFCUL

Mask for ETH_TXQPTR

Definition at line 594 of file efm32gg11b_eth.h.

#define _ETH_TXQPTR_RESETVALUE   0x00000000UL

Default value for ETH_TXQPTR

Definition at line 593 of file efm32gg11b_eth.h.

#define _ETH_TXSTATUS_AMBAERR_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_TXSTATUS

Definition at line 561 of file efm32gg11b_eth.h.

#define _ETH_TXSTATUS_AMBAERR_MASK   0x10UL

Bit mask for ETH_AMBAERR

Definition at line 560 of file efm32gg11b_eth.h.

#define _ETH_TXSTATUS_AMBAERR_SHIFT   4

Shift value for ETH_AMBAERR

Definition at line 559 of file efm32gg11b_eth.h.

#define _ETH_TXSTATUS_COLOCCRD_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_TXSTATUS

Definition at line 546 of file efm32gg11b_eth.h.

#define _ETH_TXSTATUS_COLOCCRD_MASK   0x2UL

Bit mask for ETH_COLOCCRD

Definition at line 545 of file efm32gg11b_eth.h.

#define _ETH_TXSTATUS_COLOCCRD_SHIFT   1

Shift value for ETH_COLOCCRD

Definition at line 544 of file efm32gg11b_eth.h.

#define _ETH_TXSTATUS_LATECOLOCCRD_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_TXSTATUS

Definition at line 576 of file efm32gg11b_eth.h.

#define _ETH_TXSTATUS_LATECOLOCCRD_MASK   0x80UL

Bit mask for ETH_LATECOLOCCRD

Definition at line 575 of file efm32gg11b_eth.h.

#define _ETH_TXSTATUS_LATECOLOCCRD_SHIFT   7

Shift value for ETH_LATECOLOCCRD

Definition at line 574 of file efm32gg11b_eth.h.

#define _ETH_TXSTATUS_MASK   0x000001FFUL

Mask for ETH_TXSTATUS

Definition at line 537 of file efm32gg11b_eth.h.

#define _ETH_TXSTATUS_RESETVALUE   0x00000000UL

Default value for ETH_TXSTATUS

Definition at line 536 of file efm32gg11b_eth.h.

#define _ETH_TXSTATUS_RESPNOTOK_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_TXSTATUS

Definition at line 581 of file efm32gg11b_eth.h.

#define _ETH_TXSTATUS_RESPNOTOK_MASK   0x100UL

Bit mask for ETH_RESPNOTOK

Definition at line 580 of file efm32gg11b_eth.h.

#define _ETH_TXSTATUS_RESPNOTOK_SHIFT   8

Shift value for ETH_RESPNOTOK

Definition at line 579 of file efm32gg11b_eth.h.

#define _ETH_TXSTATUS_RETRYLMTEXCD_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_TXSTATUS

Definition at line 551 of file efm32gg11b_eth.h.

#define _ETH_TXSTATUS_RETRYLMTEXCD_MASK   0x4UL

Bit mask for ETH_RETRYLMTEXCD

Definition at line 550 of file efm32gg11b_eth.h.

#define _ETH_TXSTATUS_RETRYLMTEXCD_SHIFT   2

Shift value for ETH_RETRYLMTEXCD

Definition at line 549 of file efm32gg11b_eth.h.

#define _ETH_TXSTATUS_TXCMPLT_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_TXSTATUS

Definition at line 566 of file efm32gg11b_eth.h.

#define _ETH_TXSTATUS_TXCMPLT_MASK   0x20UL

Bit mask for ETH_TXCMPLT

Definition at line 565 of file efm32gg11b_eth.h.

#define _ETH_TXSTATUS_TXCMPLT_SHIFT   5

Shift value for ETH_TXCMPLT

Definition at line 564 of file efm32gg11b_eth.h.

#define _ETH_TXSTATUS_TXGO_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_TXSTATUS

Definition at line 556 of file efm32gg11b_eth.h.

#define _ETH_TXSTATUS_TXGO_MASK   0x8UL

Bit mask for ETH_TXGO

Definition at line 555 of file efm32gg11b_eth.h.

#define _ETH_TXSTATUS_TXGO_SHIFT   3

Shift value for ETH_TXGO

Definition at line 554 of file efm32gg11b_eth.h.

#define _ETH_TXSTATUS_TXUNDERRUN_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_TXSTATUS

Definition at line 571 of file efm32gg11b_eth.h.

#define _ETH_TXSTATUS_TXUNDERRUN_MASK   0x40UL

Bit mask for ETH_TXUNDERRUN

Definition at line 570 of file efm32gg11b_eth.h.

#define _ETH_TXSTATUS_TXUNDERRUN_SHIFT   6

Shift value for ETH_TXUNDERRUN

Definition at line 569 of file efm32gg11b_eth.h.

#define _ETH_TXSTATUS_USEDBITREAD_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_TXSTATUS

Definition at line 541 of file efm32gg11b_eth.h.

#define _ETH_TXSTATUS_USEDBITREAD_MASK   0x1UL

Bit mask for ETH_USEDBITREAD

Definition at line 540 of file efm32gg11b_eth.h.

#define _ETH_TXSTATUS_USEDBITREAD_SHIFT   0

Shift value for ETH_USEDBITREAD

Definition at line 539 of file efm32gg11b_eth.h.

#define _ETH_TXUNDERRUNS_COUNT_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_TXUNDERRUNS

Definition at line 1691 of file efm32gg11b_eth.h.

#define _ETH_TXUNDERRUNS_COUNT_MASK   0x3FFUL

Bit mask for ETH_COUNT

Definition at line 1690 of file efm32gg11b_eth.h.

#define _ETH_TXUNDERRUNS_COUNT_SHIFT   0

Shift value for ETH_COUNT

Definition at line 1689 of file efm32gg11b_eth.h.

#define _ETH_TXUNDERRUNS_MASK   0x000003FFUL

Mask for ETH_TXUNDERRUNS

Definition at line 1688 of file efm32gg11b_eth.h.

#define _ETH_TXUNDERRUNS_RESETVALUE   0x00000000UL

Default value for ETH_TXUNDERRUNS

Definition at line 1687 of file efm32gg11b_eth.h.

#define _ETH_UNDERSIZEFRAMES_COUNT_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_UNDERSIZEFRAMES

Definition at line 1851 of file efm32gg11b_eth.h.

#define _ETH_UNDERSIZEFRAMES_COUNT_MASK   0x3FFUL

Bit mask for ETH_COUNT

Definition at line 1850 of file efm32gg11b_eth.h.

#define _ETH_UNDERSIZEFRAMES_COUNT_SHIFT   0

Shift value for ETH_COUNT

Definition at line 1849 of file efm32gg11b_eth.h.

#define _ETH_UNDERSIZEFRAMES_MASK   0x000003FFUL

Mask for ETH_UNDERSIZEFRAMES

Definition at line 1848 of file efm32gg11b_eth.h.

#define _ETH_UNDERSIZEFRAMES_RESETVALUE   0x00000000UL

Default value for ETH_UNDERSIZEFRAMES

Definition at line 1847 of file efm32gg11b_eth.h.

#define _ETH_WOLREG_ADDR_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_WOLREG

Definition at line 1438 of file efm32gg11b_eth.h.

#define _ETH_WOLREG_ADDR_MASK   0xFFFFUL

Bit mask for ETH_ADDR

Definition at line 1437 of file efm32gg11b_eth.h.

#define _ETH_WOLREG_ADDR_SHIFT   0

Shift value for ETH_ADDR

Definition at line 1436 of file efm32gg11b_eth.h.

#define _ETH_WOLREG_MASK   0x000FFFFFUL

Mask for ETH_WOLREG

Definition at line 1435 of file efm32gg11b_eth.h.

#define _ETH_WOLREG_RESETVALUE   0x00000000UL

Default value for ETH_WOLREG

Definition at line 1434 of file efm32gg11b_eth.h.

#define _ETH_WOLREG_WOLMASK0_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_WOLREG

Definition at line 1443 of file efm32gg11b_eth.h.

#define _ETH_WOLREG_WOLMASK0_MASK   0x10000UL

Bit mask for ETH_WOLMASK0

Definition at line 1442 of file efm32gg11b_eth.h.

#define _ETH_WOLREG_WOLMASK0_SHIFT   16

Shift value for ETH_WOLMASK0

Definition at line 1441 of file efm32gg11b_eth.h.

#define _ETH_WOLREG_WOLMASK1_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_WOLREG

Definition at line 1448 of file efm32gg11b_eth.h.

#define _ETH_WOLREG_WOLMASK1_MASK   0x20000UL

Bit mask for ETH_WOLMASK1

Definition at line 1447 of file efm32gg11b_eth.h.

#define _ETH_WOLREG_WOLMASK1_SHIFT   17

Shift value for ETH_WOLMASK1

Definition at line 1446 of file efm32gg11b_eth.h.

#define _ETH_WOLREG_WOLMASK2_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_WOLREG

Definition at line 1453 of file efm32gg11b_eth.h.

#define _ETH_WOLREG_WOLMASK2_MASK   0x40000UL

Bit mask for ETH_WOLMASK2

Definition at line 1452 of file efm32gg11b_eth.h.

#define _ETH_WOLREG_WOLMASK2_SHIFT   18

Shift value for ETH_WOLMASK2

Definition at line 1451 of file efm32gg11b_eth.h.

#define _ETH_WOLREG_WOLMASK3_DEFAULT   0x00000000UL

Mode DEFAULT for ETH_WOLREG

Definition at line 1458 of file efm32gg11b_eth.h.

#define _ETH_WOLREG_WOLMASK3_MASK   0x80000UL

Bit mask for ETH_WOLMASK3

Definition at line 1457 of file efm32gg11b_eth.h.

#define _ETH_WOLREG_WOLMASK3_SHIFT   19

Shift value for ETH_WOLMASK3

Definition at line 1456 of file efm32gg11b_eth.h.

#define ETH_ALIGNERRS_COUNT_DEFAULT   (_ETH_ALIGNERRS_COUNT_DEFAULT << 0)

Shifted mode DEFAULT for ETH_ALIGNERRS

Definition at line 1900 of file efm32gg11b_eth.h.

#define ETH_AUTOFLUSHEDPKTS_COUNT_DEFAULT   (_ETH_AUTOFLUSHEDPKTS_COUNT_DEFAULT << 0)

Shifted mode DEFAULT for ETH_AUTOFLUSHEDPKTS

Definition at line 1948 of file efm32gg11b_eth.h.

#define ETH_BROADCASTRXED_COUNT_DEFAULT   (_ETH_BROADCASTRXED_COUNT_DEFAULT << 0)

Shifted mode DEFAULT for ETH_BROADCASTRXED

Definition at line 1772 of file efm32gg11b_eth.h.

#define ETH_BROADCASTTXED_COUNT_DEFAULT   (_ETH_BROADCASTTXED_COUNT_DEFAULT << 0)

Shifted mode DEFAULT for ETH_BROADCASTTXED

Definition at line 1612 of file efm32gg11b_eth.h.

#define ETH_CRSERRS_COUNT_DEFAULT   (_ETH_CRSERRS_COUNT_DEFAULT << 0)

Shifted mode DEFAULT for ETH_CRSERRS

Definition at line 1740 of file efm32gg11b_eth.h.

#define ETH_CTRL_GBLCLKEN   (0x1UL << 9)

Global Clock Enable signal for Ethernet clocks tsu_clk, tx_clk, rx_clk and ref_clk

Definition at line 2341 of file efm32gg11b_eth.h.

#define ETH_CTRL_GBLCLKEN_DEFAULT   (_ETH_CTRL_GBLCLKEN_DEFAULT << 9)

Shifted mode DEFAULT for ETH_CTRL

Definition at line 2345 of file efm32gg11b_eth.h.

#define ETH_CTRL_MIISEL   (0x1UL << 8)

MII select signal

Definition at line 2332 of file efm32gg11b_eth.h.

#define ETH_CTRL_MIISEL_DEFAULT   (_ETH_CTRL_MIISEL_DEFAULT << 8)

Shifted mode DEFAULT for ETH_CTRL

Definition at line 2338 of file efm32gg11b_eth.h.

#define ETH_CTRL_MIISEL_MII   (_ETH_CTRL_MIISEL_MII << 8)

Shifted mode MII for ETH_CTRL

Definition at line 2340 of file efm32gg11b_eth.h.

#define ETH_CTRL_MIISEL_RMII   (_ETH_CTRL_MIISEL_RMII << 8)

Shifted mode RMII for ETH_CTRL

Definition at line 2339 of file efm32gg11b_eth.h.

#define ETH_CTRL_TSUCLKSEL_DEFAULT   (_ETH_CTRL_TSUCLKSEL_DEFAULT << 0)

Shifted mode DEFAULT for ETH_CTRL

Definition at line 2322 of file efm32gg11b_eth.h.

#define ETH_CTRL_TSUCLKSEL_NOCLOCK   (_ETH_CTRL_TSUCLKSEL_NOCLOCK << 0)

Shifted mode NOCLOCK for ETH_CTRL

Definition at line 2323 of file efm32gg11b_eth.h.

#define ETH_CTRL_TSUCLKSEL_PLL   (_ETH_CTRL_TSUCLKSEL_PLL << 0)

Shifted mode PLL for ETH_CTRL

Definition at line 2324 of file efm32gg11b_eth.h.

#define ETH_CTRL_TSUCLKSEL_REFCLK   (_ETH_CTRL_TSUCLKSEL_REFCLK << 0)

Shifted mode REFCLK for ETH_CTRL

Definition at line 2326 of file efm32gg11b_eth.h.

#define ETH_CTRL_TSUCLKSEL_RXCLK   (_ETH_CTRL_TSUCLKSEL_RXCLK << 0)

Shifted mode RXCLK for ETH_CTRL

Definition at line 2325 of file efm32gg11b_eth.h.

#define ETH_CTRL_TSUCLKSEL_TSUEXTCLK   (_ETH_CTRL_TSUCLKSEL_TSUEXTCLK << 0)

Shifted mode TSUEXTCLK for ETH_CTRL

Definition at line 2327 of file efm32gg11b_eth.h.

#define ETH_CTRL_TSUPRESC_DEFAULT   (_ETH_CTRL_TSUPRESC_DEFAULT << 4)

Shifted mode DEFAULT for ETH_CTRL

Definition at line 2331 of file efm32gg11b_eth.h.

#define ETH_CTRL_TXREFCLKSEL   (0x1UL << 10)

REFCLK source select for RMII_TXD and RMII_TX_EN

Definition at line 2346 of file efm32gg11b_eth.h.

#define ETH_CTRL_TXREFCLKSEL_DEFAULT   (_ETH_CTRL_TXREFCLKSEL_DEFAULT << 10)

Shifted mode DEFAULT for ETH_CTRL

Definition at line 2352 of file efm32gg11b_eth.h.

#define ETH_CTRL_TXREFCLKSEL_REFCLKINT   (_ETH_CTRL_TXREFCLKSEL_REFCLKINT << 10)

Shifted mode REFCLKINT for ETH_CTRL

Definition at line 2353 of file efm32gg11b_eth.h.

#define ETH_CTRL_TXREFCLKSEL_REFCLKPIN   (_ETH_CTRL_TXREFCLKSEL_REFCLKPIN << 10)

Shifted mode REFCLKPIN for ETH_CTRL

Definition at line 2354 of file efm32gg11b_eth.h.

#define ETH_DEFERREDFRAMES_COUNT_DEFAULT   (_ETH_DEFERREDFRAMES_COUNT_DEFAULT << 0)

Shifted mode DEFAULT for ETH_DEFERREDFRAMES

Definition at line 1732 of file efm32gg11b_eth.h.

#define ETH_DMACFG_AMBABRSTLEN_DEFAULT   (_ETH_DMACFG_AMBABRSTLEN_DEFAULT << 0)

Shifted mode DEFAULT for ETH_DMACFG

Definition at line 468 of file efm32gg11b_eth.h.

#define ETH_DMACFG_FRCDISCARDONERR   (0x1UL << 24)

Auto Discard RX pkts during lack of resource.

Definition at line 509 of file efm32gg11b_eth.h.

#define ETH_DMACFG_FRCDISCARDONERR_DEFAULT   (_ETH_DMACFG_FRCDISCARDONERR_DEFAULT << 24)

Shifted mode DEFAULT for ETH_DMACFG

Definition at line 513 of file efm32gg11b_eth.h.

#define ETH_DMACFG_FRCMAXAMBABRSTRX   (0x1UL << 25)

Force max length bursts on RX.

Definition at line 514 of file efm32gg11b_eth.h.

#define ETH_DMACFG_FRCMAXAMBABRSTRX_DEFAULT   (_ETH_DMACFG_FRCMAXAMBABRSTRX_DEFAULT << 25)

Shifted mode DEFAULT for ETH_DMACFG

Definition at line 518 of file efm32gg11b_eth.h.

#define ETH_DMACFG_FRCMAXAMBABRSTTX   (0x1UL << 26)

Force max length bursts on TX.

Definition at line 519 of file efm32gg11b_eth.h.

#define ETH_DMACFG_FRCMAXAMBABRSTTX_DEFAULT   (_ETH_DMACFG_FRCMAXAMBABRSTTX_DEFAULT << 26)

Shifted mode DEFAULT for ETH_DMACFG

Definition at line 523 of file efm32gg11b_eth.h.

#define ETH_DMACFG_HDRDATASPLITEN   (0x1UL << 5)

Enable header data Splitting.

Definition at line 469 of file efm32gg11b_eth.h.

#define ETH_DMACFG_HDRDATASPLITEN_DEFAULT   (_ETH_DMACFG_HDRDATASPLITEN_DEFAULT << 5)

Shifted mode DEFAULT for ETH_DMACFG

Definition at line 473 of file efm32gg11b_eth.h.

#define ETH_DMACFG_INFLASTDBUFSIZEEN   (0x1UL << 12)

Forces the DMA

Definition at line 500 of file efm32gg11b_eth.h.

#define ETH_DMACFG_INFLASTDBUFSIZEEN_DEFAULT   (_ETH_DMACFG_INFLASTDBUFSIZEEN_DEFAULT << 12)

Shifted mode DEFAULT for ETH_DMACFG

Definition at line 504 of file efm32gg11b_eth.h.

#define ETH_DMACFG_RXBDEXTNDMODEEN   (0x1UL << 28)

Enable RX extended BD mode.

Definition at line 524 of file efm32gg11b_eth.h.

#define ETH_DMACFG_RXBDEXTNDMODEEN_DEFAULT   (_ETH_DMACFG_RXBDEXTNDMODEEN_DEFAULT << 28)

Shifted mode DEFAULT for ETH_DMACFG

Definition at line 528 of file efm32gg11b_eth.h.

#define ETH_DMACFG_RXBUFSIZE_DEFAULT   (_ETH_DMACFG_RXBUFSIZE_DEFAULT << 16)

Shifted mode DEFAULT for ETH_DMACFG

Definition at line 508 of file efm32gg11b_eth.h.

#define ETH_DMACFG_RXPBUFSIZE_DEFAULT   (_ETH_DMACFG_RXPBUFSIZE_DEFAULT << 8)

Shifted mode DEFAULT for ETH_DMACFG

Definition at line 484 of file efm32gg11b_eth.h.

#define ETH_DMACFG_RXPBUFSIZE_SIZE0   (_ETH_DMACFG_RXPBUFSIZE_SIZE0 << 8)

Shifted mode SIZE0 for ETH_DMACFG

Definition at line 481 of file efm32gg11b_eth.h.

#define ETH_DMACFG_RXPBUFSIZE_SIZE1   (_ETH_DMACFG_RXPBUFSIZE_SIZE1 << 8)

Shifted mode SIZE1 for ETH_DMACFG

Definition at line 482 of file efm32gg11b_eth.h.

#define ETH_DMACFG_RXPBUFSIZE_SIZE2   (_ETH_DMACFG_RXPBUFSIZE_SIZE2 << 8)

Shifted mode SIZE2 for ETH_DMACFG

Definition at line 483 of file efm32gg11b_eth.h.

#define ETH_DMACFG_RXPBUFSIZE_SIZE3   (_ETH_DMACFG_RXPBUFSIZE_SIZE3 << 8)

Shifted mode SIZE3 for ETH_DMACFG

Definition at line 485 of file efm32gg11b_eth.h.

#define ETH_DMACFG_TXBDEXTENDMODEEN   (0x1UL << 29)

Enable TX extended BD mode.

Definition at line 529 of file efm32gg11b_eth.h.

#define ETH_DMACFG_TXBDEXTENDMODEEN_DEFAULT   (_ETH_DMACFG_TXBDEXTENDMODEEN_DEFAULT << 29)

Shifted mode DEFAULT for ETH_DMACFG

Definition at line 533 of file efm32gg11b_eth.h.

#define ETH_DMACFG_TXPBUFSIZE   (0x1UL << 10)

Transmitter packet buffer memory size select.

Definition at line 486 of file efm32gg11b_eth.h.

#define ETH_DMACFG_TXPBUFSIZE_DEFAULT   (_ETH_DMACFG_TXPBUFSIZE_DEFAULT << 10)

Shifted mode DEFAULT for ETH_DMACFG

Definition at line 493 of file efm32gg11b_eth.h.

#define ETH_DMACFG_TXPBUFSIZE_SIZE0   (_ETH_DMACFG_TXPBUFSIZE_SIZE0 << 10)

Shifted mode SIZE0 for ETH_DMACFG

Definition at line 492 of file efm32gg11b_eth.h.

#define ETH_DMACFG_TXPBUFSIZE_SIZE1   (_ETH_DMACFG_TXPBUFSIZE_SIZE1 << 10)

Shifted mode SIZE1 for ETH_DMACFG

Definition at line 494 of file efm32gg11b_eth.h.

#define ETH_DMACFG_TXPBUFTCPEN   (0x1UL << 11)

Transmitter IP, TCP and UDP checksum generation offload enable

Definition at line 495 of file efm32gg11b_eth.h.

#define ETH_DMACFG_TXPBUFTCPEN_DEFAULT   (_ETH_DMACFG_TXPBUFTCPEN_DEFAULT << 11)

Shifted mode DEFAULT for ETH_DMACFG

Definition at line 499 of file efm32gg11b_eth.h.

#define ETH_EXCESSCOLS_COUNT_DEFAULT   (_ETH_EXCESSCOLS_COUNT_DEFAULT << 0)

Shifted mode DEFAULT for ETH_EXCESSCOLS

Definition at line 1716 of file efm32gg11b_eth.h.

#define ETH_EXCESSIVERXLEN_COUNT_DEFAULT   (_ETH_EXCESSIVERXLEN_COUNT_DEFAULT << 0)

Shifted mode DEFAULT for ETH_EXCESSIVERXLEN

Definition at line 1860 of file efm32gg11b_eth.h.

#define ETH_FCSERRS_COUNT_DEFAULT   (_ETH_FCSERRS_COUNT_DEFAULT << 0)

Shifted mode DEFAULT for ETH_FCSERRS

Definition at line 1876 of file efm32gg11b_eth.h.

#define ETH_FRAMESRXED1024_COUNT_DEFAULT   (_ETH_FRAMESRXED1024_COUNT_DEFAULT << 0)

Shifted mode DEFAULT for ETH_FRAMESRXED1024

Definition at line 1836 of file efm32gg11b_eth.h.

#define ETH_FRAMESRXED128_COUNT_DEFAULT   (_ETH_FRAMESRXED128_COUNT_DEFAULT << 0)

Shifted mode DEFAULT for ETH_FRAMESRXED128

Definition at line 1812 of file efm32gg11b_eth.h.

#define ETH_FRAMESRXED1519_COUNT_DEFAULT   (_ETH_FRAMESRXED1519_COUNT_DEFAULT << 0)

Shifted mode DEFAULT for ETH_FRAMESRXED1519

Definition at line 1844 of file efm32gg11b_eth.h.

#define ETH_FRAMESRXED256_COUNT_DEFAULT   (_ETH_FRAMESRXED256_COUNT_DEFAULT << 0)

Shifted mode DEFAULT for ETH_FRAMESRXED256

Definition at line 1820 of file efm32gg11b_eth.h.

#define ETH_FRAMESRXED512_COUNT_DEFAULT   (_ETH_FRAMESRXED512_COUNT_DEFAULT << 0)

Shifted mode DEFAULT for ETH_FRAMESRXED512

Definition at line 1828 of file efm32gg11b_eth.h.

#define ETH_FRAMESRXED64_COUNT_DEFAULT   (_ETH_FRAMESRXED64_COUNT_DEFAULT << 0)

Shifted mode DEFAULT for ETH_FRAMESRXED64

Definition at line 1796 of file efm32gg11b_eth.h.

#define ETH_FRAMESRXED65_COUNT_DEFAULT   (_ETH_FRAMESRXED65_COUNT_DEFAULT << 0)

Shifted mode DEFAULT for ETH_FRAMESRXED65

Definition at line 1804 of file efm32gg11b_eth.h.

#define ETH_FRAMESRXEDOK_COUNT_DEFAULT   (_ETH_FRAMESRXEDOK_COUNT_DEFAULT << 0)

Shifted mode DEFAULT for ETH_FRAMESRXEDOK

Definition at line 1764 of file efm32gg11b_eth.h.

#define ETH_FRAMESTXED1024_COUNT_DEFAULT   (_ETH_FRAMESTXED1024_COUNT_DEFAULT << 0)

Shifted mode DEFAULT for ETH_FRAMESTXED1024

Definition at line 1676 of file efm32gg11b_eth.h.

#define ETH_FRAMESTXED128_COUNT_DEFAULT   (_ETH_FRAMESTXED128_COUNT_DEFAULT << 0)

Shifted mode DEFAULT for ETH_FRAMESTXED128

Definition at line 1652 of file efm32gg11b_eth.h.

#define ETH_FRAMESTXED1519_COUNT_DEFAULT   (_ETH_FRAMESTXED1519_COUNT_DEFAULT << 0)

Shifted mode DEFAULT for ETH_FRAMESTXED1519

Definition at line 1684 of file efm32gg11b_eth.h.

#define ETH_FRAMESTXED256_COUNT_DEFAULT   (_ETH_FRAMESTXED256_COUNT_DEFAULT << 0)

Shifted mode DEFAULT for ETH_FRAMESTXED256

Definition at line 1660 of file efm32gg11b_eth.h.

#define ETH_FRAMESTXED512_COUNT_DEFAULT   (_ETH_FRAMESTXED512_COUNT_DEFAULT << 0)

Shifted mode DEFAULT for ETH_FRAMESTXED512

Definition at line 1668 of file efm32gg11b_eth.h.

#define ETH_FRAMESTXED64_COUNT_DEFAULT   (_ETH_FRAMESTXED64_COUNT_DEFAULT << 0)

Shifted mode DEFAULT for ETH_FRAMESTXED64

Definition at line 1636 of file efm32gg11b_eth.h.

#define ETH_FRAMESTXED65_COUNT_DEFAULT   (_ETH_FRAMESTXED65_COUNT_DEFAULT << 0)

Shifted mode DEFAULT for ETH_FRAMESTXED65

Definition at line 1644 of file efm32gg11b_eth.h.

#define ETH_FRAMESTXEDOK_COUNT_DEFAULT   (_ETH_FRAMESTXEDOK_COUNT_DEFAULT << 0)

Shifted mode DEFAULT for ETH_FRAMESTXEDOK

Definition at line 1604 of file efm32gg11b_eth.h.

#define ETH_HASHBOTTOM_ADDR_DEFAULT   (_ETH_HASHBOTTOM_ADDR_DEFAULT << 0)

Shifted mode DEFAULT for ETH_HASHBOTTOM

Definition at line 1259 of file efm32gg11b_eth.h.

#define ETH_HASHTOP_ADDR_DEFAULT   (_ETH_HASHTOP_ADDR_DEFAULT << 0)

Shifted mode DEFAULT for ETH_HASHTOP

Definition at line 1267 of file efm32gg11b_eth.h.

#define ETH_IENC_AMBAERR   (0x1UL << 6)

Disable transmit frame corruption due to AMBA (AHB) error interrupt

Definition at line 915 of file efm32gg11b_eth.h.

#define ETH_IENC_AMBAERR_DEFAULT   (_ETH_IENC_AMBAERR_DEFAULT << 6)

Shifted mode DEFAULT for ETH_IENC

Definition at line 919 of file efm32gg11b_eth.h.

#define ETH_IENC_MNGMNTDONE   (0x1UL << 0)

Disable management done interrupt

Definition at line 885 of file efm32gg11b_eth.h.

#define ETH_IENC_MNGMNTDONE_DEFAULT   (_ETH_IENC_MNGMNTDONE_DEFAULT << 0)

Shifted mode DEFAULT for ETH_IENC

Definition at line 889 of file efm32gg11b_eth.h.

#define ETH_IENC_NONZEROPFRMQUANT   (0x1UL << 12)

Disable pause frame with non-zero pause quantum interrupt

Definition at line 935 of file efm32gg11b_eth.h.

#define ETH_IENC_NONZEROPFRMQUANT_DEFAULT   (_ETH_IENC_NONZEROPFRMQUANT_DEFAULT << 12)

Shifted mode DEFAULT for ETH_IENC

Definition at line 939 of file efm32gg11b_eth.h.

#define ETH_IENC_PAUSETIMEZERO   (0x1UL << 13)

Disable pause time zero interrupt

Definition at line 940 of file efm32gg11b_eth.h.

#define ETH_IENC_PAUSETIMEZERO_DEFAULT   (_ETH_IENC_PAUSETIMEZERO_DEFAULT << 13)

Shifted mode DEFAULT for ETH_IENC

Definition at line 944 of file efm32gg11b_eth.h.

#define ETH_IENC_PFRMTX   (0x1UL << 14)

Disable pause frame transmitted interrupt

Definition at line 945 of file efm32gg11b_eth.h.

#define ETH_IENC_PFRMTX_DEFAULT   (_ETH_IENC_PFRMTX_DEFAULT << 14)

Shifted mode DEFAULT for ETH_IENC

Definition at line 949 of file efm32gg11b_eth.h.

#define ETH_IENC_PTPDLYREQFRMRX   (0x1UL << 18)

Disable PTP delay_req frame received interrupt

Definition at line 950 of file efm32gg11b_eth.h.

#define ETH_IENC_PTPDLYREQFRMRX_DEFAULT   (_ETH_IENC_PTPDLYREQFRMRX_DEFAULT << 18)

Shifted mode DEFAULT for ETH_IENC

Definition at line 954 of file efm32gg11b_eth.h.

#define ETH_IENC_PTPDLYREQFRMTX   (0x1UL << 20)

Disable PTP delay_req frame transmitted interrupt

Definition at line 960 of file efm32gg11b_eth.h.

#define ETH_IENC_PTPDLYREQFRMTX_DEFAULT   (_ETH_IENC_PTPDLYREQFRMTX_DEFAULT << 20)

Shifted mode DEFAULT for ETH_IENC

Definition at line 964 of file efm32gg11b_eth.h.

#define ETH_IENC_PTPPDLYREQFRMRX   (0x1UL << 22)

Disable PTP pdelay_req frame received interrupt

Definition at line 970 of file efm32gg11b_eth.h.

#define ETH_IENC_PTPPDLYREQFRMRX_DEFAULT   (_ETH_IENC_PTPPDLYREQFRMRX_DEFAULT << 22)

Shifted mode DEFAULT for ETH_IENC

Definition at line 974 of file efm32gg11b_eth.h.

#define ETH_IENC_PTPPDLYREQFRMTX   (0x1UL << 24)

Disable PTP pdelay_req frame transmitted interrupt

Definition at line 980 of file efm32gg11b_eth.h.

#define ETH_IENC_PTPPDLYREQFRMTX_DEFAULT   (_ETH_IENC_PTPPDLYREQFRMTX_DEFAULT << 24)

Shifted mode DEFAULT for ETH_IENC

Definition at line 984 of file efm32gg11b_eth.h.

#define ETH_IENC_PTPPDLYRESPFRMRX   (0x1UL << 23)

Disable PTP pdelay_resp frame received interrupt

Definition at line 975 of file efm32gg11b_eth.h.

#define ETH_IENC_PTPPDLYRESPFRMRX_DEFAULT   (_ETH_IENC_PTPPDLYRESPFRMRX_DEFAULT << 23)

Shifted mode DEFAULT for ETH_IENC

Definition at line 979 of file efm32gg11b_eth.h.

#define ETH_IENC_PTPPDLYRESPFRMTX   (0x1UL << 25)

Disable PTP pdelay_resp frame transmitted interrupt

Definition at line 985 of file efm32gg11b_eth.h.

#define ETH_IENC_PTPPDLYRESPFRMTX_DEFAULT   (_ETH_IENC_PTPPDLYRESPFRMTX_DEFAULT << 25)

Shifted mode DEFAULT for ETH_IENC

Definition at line 989 of file efm32gg11b_eth.h.

#define ETH_IENC_PTPSYNCFRMRX   (0x1UL << 19)

Disable PTP sync frame received interrupt

Definition at line 955 of file efm32gg11b_eth.h.

#define ETH_IENC_PTPSYNCFRMRX_DEFAULT   (_ETH_IENC_PTPSYNCFRMRX_DEFAULT << 19)

Shifted mode DEFAULT for ETH_IENC

Definition at line 959 of file efm32gg11b_eth.h.

#define ETH_IENC_PTPSYNCFRMTX   (0x1UL << 21)

Disable PTP sync frame transmitted interrupt

Definition at line 965 of file efm32gg11b_eth.h.

#define ETH_IENC_PTPSYNCFRMTX_DEFAULT   (_ETH_IENC_PTPSYNCFRMTX_DEFAULT << 21)

Shifted mode DEFAULT for ETH_IENC

Definition at line 969 of file efm32gg11b_eth.h.

#define ETH_IENC_RESPNOTOK   (0x1UL << 11)

Disable bresp/hresp not OK interrupt

Definition at line 930 of file efm32gg11b_eth.h.

#define ETH_IENC_RESPNOTOK_DEFAULT   (_ETH_IENC_RESPNOTOK_DEFAULT << 11)

Shifted mode DEFAULT for ETH_IENC

Definition at line 934 of file efm32gg11b_eth.h.

#define ETH_IENC_RTRYLMTORLATECOL   (0x1UL << 5)

Disable retry limit exceeded or late collision interrupt

Definition at line 910 of file efm32gg11b_eth.h.

#define ETH_IENC_RTRYLMTORLATECOL_DEFAULT   (_ETH_IENC_RTRYLMTORLATECOL_DEFAULT << 5)

Shifted mode DEFAULT for ETH_IENC

Definition at line 914 of file efm32gg11b_eth.h.

#define ETH_IENC_RXCMPLT   (0x1UL << 1)

Disable receive complete interrupt

Definition at line 890 of file efm32gg11b_eth.h.

#define ETH_IENC_RXCMPLT_DEFAULT   (_ETH_IENC_RXCMPLT_DEFAULT << 1)

Shifted mode DEFAULT for ETH_IENC

Definition at line 894 of file efm32gg11b_eth.h.

#define ETH_IENC_RXLPIINDC   (0x1UL << 27)

Disable RX LPI indication interrupt

Definition at line 995 of file efm32gg11b_eth.h.

#define ETH_IENC_RXLPIINDC_DEFAULT   (_ETH_IENC_RXLPIINDC_DEFAULT << 27)

Shifted mode DEFAULT for ETH_IENC

Definition at line 999 of file efm32gg11b_eth.h.

#define ETH_IENC_RXOVERRUN   (0x1UL << 10)

Disable receive overrun interrupt

Definition at line 925 of file efm32gg11b_eth.h.

#define ETH_IENC_RXOVERRUN_DEFAULT   (_ETH_IENC_RXOVERRUN_DEFAULT << 10)

Shifted mode DEFAULT for ETH_IENC

Definition at line 929 of file efm32gg11b_eth.h.

#define ETH_IENC_RXUSEDBITREAD   (0x1UL << 2)

Disable receive used bit read interrupt

Definition at line 895 of file efm32gg11b_eth.h.

#define ETH_IENC_RXUSEDBITREAD_DEFAULT   (_ETH_IENC_RXUSEDBITREAD_DEFAULT << 2)

Shifted mode DEFAULT for ETH_IENC

Definition at line 899 of file efm32gg11b_eth.h.

#define ETH_IENC_TSUSECREGINCR   (0x1UL << 26)

Disable TSU seconds register increment interrupt

Definition at line 990 of file efm32gg11b_eth.h.

#define ETH_IENC_TSUSECREGINCR_DEFAULT   (_ETH_IENC_TSUSECREGINCR_DEFAULT << 26)

Shifted mode DEFAULT for ETH_IENC

Definition at line 994 of file efm32gg11b_eth.h.

#define ETH_IENC_TSUTIMERCOMP   (0x1UL << 29)

Disable TSU timer comparison interrupt.

Definition at line 1005 of file efm32gg11b_eth.h.

#define ETH_IENC_TSUTIMERCOMP_DEFAULT   (_ETH_IENC_TSUTIMERCOMP_DEFAULT << 29)

Shifted mode DEFAULT for ETH_IENC

Definition at line 1009 of file efm32gg11b_eth.h.

#define ETH_IENC_TXCMPLT   (0x1UL << 7)

Disable transmit complete interrupt

Definition at line 920 of file efm32gg11b_eth.h.

#define ETH_IENC_TXCMPLT_DEFAULT   (_ETH_IENC_TXCMPLT_DEFAULT << 7)

Shifted mode DEFAULT for ETH_IENC

Definition at line 924 of file efm32gg11b_eth.h.

#define ETH_IENC_TXUNDERRUN   (0x1UL << 4)

Disable transmit buffer under run interrupt

Definition at line 905 of file efm32gg11b_eth.h.

#define ETH_IENC_TXUNDERRUN_DEFAULT   (_ETH_IENC_TXUNDERRUN_DEFAULT << 4)

Shifted mode DEFAULT for ETH_IENC

Definition at line 909 of file efm32gg11b_eth.h.

#define ETH_IENC_TXUSEDBITREAD   (0x1UL << 3)

Disable transmit used bit read interrupt

Definition at line 900 of file efm32gg11b_eth.h.

#define ETH_IENC_TXUSEDBITREAD_DEFAULT   (_ETH_IENC_TXUSEDBITREAD_DEFAULT << 3)

Shifted mode DEFAULT for ETH_IENC

Definition at line 904 of file efm32gg11b_eth.h.

#define ETH_IENC_WOLEVNTRX   (0x1UL << 28)

Disable WOL event received interrupt

Definition at line 1000 of file efm32gg11b_eth.h.

#define ETH_IENC_WOLEVNTRX_DEFAULT   (_ETH_IENC_WOLEVNTRX_DEFAULT << 28)

Shifted mode DEFAULT for ETH_IENC

Definition at line 1004 of file efm32gg11b_eth.h.

#define ETH_IENRO_AMBAERR   (0x1UL << 6)

Transmit frame corruption due to AMBA (AHB) error interrupt mask

Definition at line 1044 of file efm32gg11b_eth.h.

#define ETH_IENRO_AMBAERR_DEFAULT   (_ETH_IENRO_AMBAERR_DEFAULT << 6)

Shifted mode DEFAULT for ETH_IENRO

Definition at line 1048 of file efm32gg11b_eth.h.

#define ETH_IENRO_MNGMNTDONE   (0x1UL << 0)

management done interrupt mask

Definition at line 1014 of file efm32gg11b_eth.h.

#define ETH_IENRO_MNGMNTDONE_DEFAULT   (_ETH_IENRO_MNGMNTDONE_DEFAULT << 0)

Shifted mode DEFAULT for ETH_IENRO

Definition at line 1018 of file efm32gg11b_eth.h.

#define ETH_IENRO_NONZEROPFRMQUANT   (0x1UL << 12)

Pause frame with non-zero pause quantum interrupt mask

Definition at line 1069 of file efm32gg11b_eth.h.

#define ETH_IENRO_NONZEROPFRMQUANT_DEFAULT   (_ETH_IENRO_NONZEROPFRMQUANT_DEFAULT << 12)

Shifted mode DEFAULT for ETH_IENRO

Definition at line 1073 of file efm32gg11b_eth.h.

#define ETH_IENRO_PAUSETIMEZERO   (0x1UL << 13)

pause time zero interrupt mask

Definition at line 1074 of file efm32gg11b_eth.h.

#define ETH_IENRO_PAUSETIMEZERO_DEFAULT   (_ETH_IENRO_PAUSETIMEZERO_DEFAULT << 13)

Shifted mode DEFAULT for ETH_IENRO

Definition at line 1078 of file efm32gg11b_eth.h.

#define ETH_IENRO_PFRMTX   (0x1UL << 14)

pause frame transmitted interrupt mask

Definition at line 1079 of file efm32gg11b_eth.h.

#define ETH_IENRO_PFRMTX_DEFAULT   (_ETH_IENRO_PFRMTX_DEFAULT << 14)

Shifted mode DEFAULT for ETH_IENRO

Definition at line 1083 of file efm32gg11b_eth.h.

#define ETH_IENRO_PTPDLYREQFRMRX   (0x1UL << 18)

PTP delay_req frame received mask

Definition at line 1084 of file efm32gg11b_eth.h.

#define ETH_IENRO_PTPDLYREQFRMRX_DEFAULT   (_ETH_IENRO_PTPDLYREQFRMRX_DEFAULT << 18)

Shifted mode DEFAULT for ETH_IENRO

Definition at line 1088 of file efm32gg11b_eth.h.

#define ETH_IENRO_PTPDLYREQFRMTX   (0x1UL << 20)

PTP delay_req frame transmitted mask

Definition at line 1094 of file efm32gg11b_eth.h.

#define ETH_IENRO_PTPDLYREQFRMTX_DEFAULT   (_ETH_IENRO_PTPDLYREQFRMTX_DEFAULT << 20)

Shifted mode DEFAULT for ETH_IENRO

Definition at line 1098 of file efm32gg11b_eth.h.

#define ETH_IENRO_PTPPDLYREQFRMRX   (0x1UL << 22)

PTP pdelay_req frame received mask

Definition at line 1104 of file efm32gg11b_eth.h.

#define ETH_IENRO_PTPPDLYREQFRMRX_DEFAULT   (_ETH_IENRO_PTPPDLYREQFRMRX_DEFAULT << 22)

Shifted mode DEFAULT for ETH_IENRO

Definition at line 1108 of file efm32gg11b_eth.h.

#define ETH_IENRO_PTPPDLYREQFRMTX   (0x1UL << 24)

PTP pdelay_req frame transmitted mask

Definition at line 1114 of file efm32gg11b_eth.h.

#define ETH_IENRO_PTPPDLYREQFRMTX_DEFAULT   (_ETH_IENRO_PTPPDLYREQFRMTX_DEFAULT << 24)

Shifted mode DEFAULT for ETH_IENRO

Definition at line 1118 of file efm32gg11b_eth.h.

#define ETH_IENRO_PTPPDLYRESPFRMRX   (0x1UL << 23)

PTP pdelay_resp frame received mask

Definition at line 1109 of file efm32gg11b_eth.h.

#define ETH_IENRO_PTPPDLYRESPFRMRX_DEFAULT   (_ETH_IENRO_PTPPDLYRESPFRMRX_DEFAULT << 23)

Shifted mode DEFAULT for ETH_IENRO

Definition at line 1113 of file efm32gg11b_eth.h.

#define ETH_IENRO_PTPPDLYRESPFRMTX   (0x1UL << 25)

PTP pdelay_resp frame transmitted mask

Definition at line 1119 of file efm32gg11b_eth.h.

#define ETH_IENRO_PTPPDLYRESPFRMTX_DEFAULT   (_ETH_IENRO_PTPPDLYRESPFRMTX_DEFAULT << 25)

Shifted mode DEFAULT for ETH_IENRO

Definition at line 1123 of file efm32gg11b_eth.h.

#define ETH_IENRO_PTPSYNCFRMRX   (0x1UL << 19)

PTP sync frame received mask

Definition at line 1089 of file efm32gg11b_eth.h.

#define ETH_IENRO_PTPSYNCFRMRX_DEFAULT   (_ETH_IENRO_PTPSYNCFRMRX_DEFAULT << 19)

Shifted mode DEFAULT for ETH_IENRO

Definition at line 1093 of file efm32gg11b_eth.h.

#define ETH_IENRO_PTPSYNCFRMTX   (0x1UL << 21)

PTP sync frame transmitted mask

Definition at line 1099 of file efm32gg11b_eth.h.

#define ETH_IENRO_PTPSYNCFRMTX_DEFAULT   (_ETH_IENRO_PTPSYNCFRMTX_DEFAULT << 21)

Shifted mode DEFAULT for ETH_IENRO

Definition at line 1103 of file efm32gg11b_eth.h.

#define ETH_IENRO_RESPNOTOK   (0x1UL << 11)

bresp/hresp not OK interrupt mask

Definition at line 1064 of file efm32gg11b_eth.h.

#define ETH_IENRO_RESPNOTOK_DEFAULT   (_ETH_IENRO_RESPNOTOK_DEFAULT << 11)

Shifted mode DEFAULT for ETH_IENRO

Definition at line 1068 of file efm32gg11b_eth.h.

#define ETH_IENRO_RTRYLMTORLATECOL   (0x1UL << 5)

Retry limit exceeded or late collision (gigabit mode only) interrupt mask

Definition at line 1039 of file efm32gg11b_eth.h.

#define ETH_IENRO_RTRYLMTORLATECOL_DEFAULT   (_ETH_IENRO_RTRYLMTORLATECOL_DEFAULT << 5)

Shifted mode DEFAULT for ETH_IENRO

Definition at line 1043 of file efm32gg11b_eth.h.

#define ETH_IENRO_RXCMPLT   (0x1UL << 1)

receive complete interrupt mask

Definition at line 1019 of file efm32gg11b_eth.h.

#define ETH_IENRO_RXCMPLT_DEFAULT   (_ETH_IENRO_RXCMPLT_DEFAULT << 1)

Shifted mode DEFAULT for ETH_IENRO

Definition at line 1023 of file efm32gg11b_eth.h.

#define ETH_IENRO_RXLPIINDC   (0x1UL << 27)

RX LPI indication mask

Definition at line 1129 of file efm32gg11b_eth.h.

#define ETH_IENRO_RXLPIINDC_DEFAULT   (_ETH_IENRO_RXLPIINDC_DEFAULT << 27)

Shifted mode DEFAULT for ETH_IENRO

Definition at line 1133 of file efm32gg11b_eth.h.

#define ETH_IENRO_RXOVERRUN   (0x1UL << 10)

Receive overrun interrupt mask

Definition at line 1059 of file efm32gg11b_eth.h.

#define ETH_IENRO_RXOVERRUN_DEFAULT   (_ETH_IENRO_RXOVERRUN_DEFAULT << 10)

Shifted mode DEFAULT for ETH_IENRO

Definition at line 1063 of file efm32gg11b_eth.h.

#define ETH_IENRO_RXUSEDBITREAD   (0x1UL << 2)

receive used bit read interrupt mask

Definition at line 1024 of file efm32gg11b_eth.h.

#define ETH_IENRO_RXUSEDBITREAD_DEFAULT   (_ETH_IENRO_RXUSEDBITREAD_DEFAULT << 2)

Shifted mode DEFAULT for ETH_IENRO

Definition at line 1028 of file efm32gg11b_eth.h.

#define ETH_IENRO_TSUSECREGINCR   (0x1UL << 26)

TSU seconds register increment mask

Definition at line 1124 of file efm32gg11b_eth.h.

#define ETH_IENRO_TSUSECREGINCR_DEFAULT   (_ETH_IENRO_TSUSECREGINCR_DEFAULT << 26)

Shifted mode DEFAULT for ETH_IENRO

Definition at line 1128 of file efm32gg11b_eth.h.

#define ETH_IENRO_TSUTIMERCOMP   (0x1UL << 29)

TSU timer comparison interrupt mask.

Definition at line 1139 of file efm32gg11b_eth.h.

#define ETH_IENRO_TSUTIMERCOMP_DEFAULT   (_ETH_IENRO_TSUTIMERCOMP_DEFAULT << 29)

Shifted mode DEFAULT for ETH_IENRO

Definition at line 1143 of file efm32gg11b_eth.h.

#define ETH_IENRO_TXCMPLT   (0x1UL << 7)

Transmit complete interrupt mask

Definition at line 1049 of file efm32gg11b_eth.h.

#define ETH_IENRO_TXCMPLT_DEFAULT   (_ETH_IENRO_TXCMPLT_DEFAULT << 7)

Shifted mode DEFAULT for ETH_IENRO

Definition at line 1053 of file efm32gg11b_eth.h.

#define ETH_IENRO_TXUNDERRUN   (0x1UL << 4)

transmit buffer under run interrupt mask

Definition at line 1034 of file efm32gg11b_eth.h.

#define ETH_IENRO_TXUNDERRUN_DEFAULT   (_ETH_IENRO_TXUNDERRUN_DEFAULT << 4)

Shifted mode DEFAULT for ETH_IENRO

Definition at line 1038 of file efm32gg11b_eth.h.

#define ETH_IENRO_TXUSEDBITREAD   (0x1UL << 3)

transmit used bit read interrupt mask

Definition at line 1029 of file efm32gg11b_eth.h.

#define ETH_IENRO_TXUSEDBITREAD_DEFAULT   (_ETH_IENRO_TXUSEDBITREAD_DEFAULT << 3)

Shifted mode DEFAULT for ETH_IENRO

Definition at line 1033 of file efm32gg11b_eth.h.

#define ETH_IENRO_UNUSED   (0x1UL << 8)

Unused

Definition at line 1054 of file efm32gg11b_eth.h.

#define ETH_IENRO_UNUSED_DEFAULT   (_ETH_IENRO_UNUSED_DEFAULT << 8)

Shifted mode DEFAULT for ETH_IENRO

Definition at line 1058 of file efm32gg11b_eth.h.

#define ETH_IENRO_WOLEVNTRX   (0x1UL << 28)

WOL event received mask

Definition at line 1134 of file efm32gg11b_eth.h.

#define ETH_IENRO_WOLEVNTRX_DEFAULT   (_ETH_IENRO_WOLEVNTRX_DEFAULT << 28)

Shifted mode DEFAULT for ETH_IENRO

Definition at line 1138 of file efm32gg11b_eth.h.

#define ETH_IENS_AMBAERR   (0x1UL << 6)

Enable transmit frame corruption due to AMBA (AHB) error interrupt

Definition at line 786 of file efm32gg11b_eth.h.

#define ETH_IENS_AMBAERR_DEFAULT   (_ETH_IENS_AMBAERR_DEFAULT << 6)

Shifted mode DEFAULT for ETH_IENS

Definition at line 790 of file efm32gg11b_eth.h.

#define ETH_IENS_MNGMNTDONE   (0x1UL << 0)

Enable management done interrupt

Definition at line 756 of file efm32gg11b_eth.h.

#define ETH_IENS_MNGMNTDONE_DEFAULT   (_ETH_IENS_MNGMNTDONE_DEFAULT << 0)

Shifted mode DEFAULT for ETH_IENS

Definition at line 760 of file efm32gg11b_eth.h.

#define ETH_IENS_NONZEROPFRMQUANT   (0x1UL << 12)

Enable pause frame with non-zero pause quantum interrupt

Definition at line 806 of file efm32gg11b_eth.h.

#define ETH_IENS_NONZEROPFRMQUANT_DEFAULT   (_ETH_IENS_NONZEROPFRMQUANT_DEFAULT << 12)

Shifted mode DEFAULT for ETH_IENS

Definition at line 810 of file efm32gg11b_eth.h.

#define ETH_IENS_PAUSETIMEZERO   (0x1UL << 13)

Enable pause time zero interrupt

Definition at line 811 of file efm32gg11b_eth.h.

#define ETH_IENS_PAUSETIMEZERO_DEFAULT   (_ETH_IENS_PAUSETIMEZERO_DEFAULT << 13)

Shifted mode DEFAULT for ETH_IENS

Definition at line 815 of file efm32gg11b_eth.h.

#define ETH_IENS_PFRMTX   (0x1UL << 14)

Enable pause frame transmitted interrupt

Definition at line 816 of file efm32gg11b_eth.h.

#define ETH_IENS_PFRMTX_DEFAULT   (_ETH_IENS_PFRMTX_DEFAULT << 14)

Shifted mode DEFAULT for ETH_IENS

Definition at line 820 of file efm32gg11b_eth.h.

#define ETH_IENS_PTPDLYREQFRMRX   (0x1UL << 18)

Enable PTP delay_req frame received interrupt

Definition at line 821 of file efm32gg11b_eth.h.

#define ETH_IENS_PTPDLYREQFRMRX_DEFAULT   (_ETH_IENS_PTPDLYREQFRMRX_DEFAULT << 18)

Shifted mode DEFAULT for ETH_IENS

Definition at line 825 of file efm32gg11b_eth.h.

#define ETH_IENS_PTPDLYREQFRMTX   (0x1UL << 20)

Enable PTP delay_req frame transmitted interrupt

Definition at line 831 of file efm32gg11b_eth.h.

#define ETH_IENS_PTPDLYREQFRMTX_DEFAULT   (_ETH_IENS_PTPDLYREQFRMTX_DEFAULT << 20)

Shifted mode DEFAULT for ETH_IENS

Definition at line 835 of file efm32gg11b_eth.h.

#define ETH_IENS_PTPPDLYREQFRMRX   (0x1UL << 22)

Enable PTP pdelay_req frame received interrupt

Definition at line 841 of file efm32gg11b_eth.h.

#define ETH_IENS_PTPPDLYREQFRMRX_DEFAULT   (_ETH_IENS_PTPPDLYREQFRMRX_DEFAULT << 22)

Shifted mode DEFAULT for ETH_IENS

Definition at line 845 of file efm32gg11b_eth.h.

#define ETH_IENS_PTPPDLYREQFRMTX   (0x1UL << 24)

Enable PTP pdelay_req frame transmitted interrupt

Definition at line 851 of file efm32gg11b_eth.h.

#define ETH_IENS_PTPPDLYREQFRMTX_DEFAULT   (_ETH_IENS_PTPPDLYREQFRMTX_DEFAULT << 24)

Shifted mode DEFAULT for ETH_IENS

Definition at line 855 of file efm32gg11b_eth.h.

#define ETH_IENS_PTPPDLYRESPFRMRX   (0x1UL << 23)

Enable PTP pdelay_resp frame received interrupt

Definition at line 846 of file efm32gg11b_eth.h.

#define ETH_IENS_PTPPDLYRESPFRMRX_DEFAULT   (_ETH_IENS_PTPPDLYRESPFRMRX_DEFAULT << 23)

Shifted mode DEFAULT for ETH_IENS

Definition at line 850 of file efm32gg11b_eth.h.

#define ETH_IENS_PTPPDLYRESPFRMTX   (0x1UL << 25)

Enable PTP pdelay_resp frame transmitted interrupt

Definition at line 856 of file efm32gg11b_eth.h.

#define ETH_IENS_PTPPDLYRESPFRMTX_DEFAULT   (_ETH_IENS_PTPPDLYRESPFRMTX_DEFAULT << 25)

Shifted mode DEFAULT for ETH_IENS

Definition at line 860 of file efm32gg11b_eth.h.

#define ETH_IENS_PTPSYNCFRMRX   (0x1UL << 19)

Enable PTP sync frame received interrupt

Definition at line 826 of file efm32gg11b_eth.h.

#define ETH_IENS_PTPSYNCFRMRX_DEFAULT   (_ETH_IENS_PTPSYNCFRMRX_DEFAULT << 19)

Shifted mode DEFAULT for ETH_IENS

Definition at line 830 of file efm32gg11b_eth.h.

#define ETH_IENS_PTPSYNCFRMTX   (0x1UL << 21)

Enable PTP sync frame transmitted interrupt

Definition at line 836 of file efm32gg11b_eth.h.

#define ETH_IENS_PTPSYNCFRMTX_DEFAULT   (_ETH_IENS_PTPSYNCFRMTX_DEFAULT << 21)

Shifted mode DEFAULT for ETH_IENS

Definition at line 840 of file efm32gg11b_eth.h.

#define ETH_IENS_RESPNOTOK   (0x1UL << 11)

Enable bresp/hresp not OK interrupt

Definition at line 801 of file efm32gg11b_eth.h.

#define ETH_IENS_RESPNOTOK_DEFAULT   (_ETH_IENS_RESPNOTOK_DEFAULT << 11)

Shifted mode DEFAULT for ETH_IENS

Definition at line 805 of file efm32gg11b_eth.h.

#define ETH_IENS_RTRYLMTORLATECOL   (0x1UL << 5)

Enable retry limit exceeded or late collision interrupt

Definition at line 781 of file efm32gg11b_eth.h.

#define ETH_IENS_RTRYLMTORLATECOL_DEFAULT   (_ETH_IENS_RTRYLMTORLATECOL_DEFAULT << 5)

Shifted mode DEFAULT for ETH_IENS

Definition at line 785 of file efm32gg11b_eth.h.

#define ETH_IENS_RXCMPLT   (0x1UL << 1)

Enable receive complete interrupt

Definition at line 761 of file efm32gg11b_eth.h.

#define ETH_IENS_RXCMPLT_DEFAULT   (_ETH_IENS_RXCMPLT_DEFAULT << 1)

Shifted mode DEFAULT for ETH_IENS

Definition at line 765 of file efm32gg11b_eth.h.

#define ETH_IENS_RXLPIINDC   (0x1UL << 27)

Enable RX LPI indication interrupt

Definition at line 866 of file efm32gg11b_eth.h.

#define ETH_IENS_RXLPIINDC_DEFAULT   (_ETH_IENS_RXLPIINDC_DEFAULT << 27)

Shifted mode DEFAULT for ETH_IENS

Definition at line 870 of file efm32gg11b_eth.h.

#define ETH_IENS_RXOVERRUN   (0x1UL << 10)

Enable receive overrun interrupt

Definition at line 796 of file efm32gg11b_eth.h.

#define ETH_IENS_RXOVERRUN_DEFAULT   (_ETH_IENS_RXOVERRUN_DEFAULT << 10)

Shifted mode DEFAULT for ETH_IENS

Definition at line 800 of file efm32gg11b_eth.h.

#define ETH_IENS_RXUSEDBITREAD   (0x1UL << 2)

Enable receive used bit read interrupt

Definition at line 766 of file efm32gg11b_eth.h.

#define ETH_IENS_RXUSEDBITREAD_DEFAULT   (_ETH_IENS_RXUSEDBITREAD_DEFAULT << 2)

Shifted mode DEFAULT for ETH_IENS

Definition at line 770 of file efm32gg11b_eth.h.

#define ETH_IENS_TSUSECREGINCR   (0x1UL << 26)

Enable TSU seconds register increment interrupt

Definition at line 861 of file efm32gg11b_eth.h.

#define ETH_IENS_TSUSECREGINCR_DEFAULT   (_ETH_IENS_TSUSECREGINCR_DEFAULT << 26)

Shifted mode DEFAULT for ETH_IENS

Definition at line 865 of file efm32gg11b_eth.h.

#define ETH_IENS_TSUTIMERCOMP   (0x1UL << 29)

Enable TSU timer comparison interrupt.

Definition at line 876 of file efm32gg11b_eth.h.

#define ETH_IENS_TSUTIMERCOMP_DEFAULT   (_ETH_IENS_TSUTIMERCOMP_DEFAULT << 29)

Shifted mode DEFAULT for ETH_IENS

Definition at line 880 of file efm32gg11b_eth.h.

#define ETH_IENS_TXCMPLT   (0x1UL << 7)

Enable transmit complete interrupt

Definition at line 791 of file efm32gg11b_eth.h.

#define ETH_IENS_TXCMPLT_DEFAULT   (_ETH_IENS_TXCMPLT_DEFAULT << 7)

Shifted mode DEFAULT for ETH_IENS

Definition at line 795 of file efm32gg11b_eth.h.

#define ETH_IENS_TXUNDERRUN   (0x1UL << 4)

Enable transmit buffer under run interrupt

Definition at line 776 of file efm32gg11b_eth.h.

#define ETH_IENS_TXUNDERRUN_DEFAULT   (_ETH_IENS_TXUNDERRUN_DEFAULT << 4)

Shifted mode DEFAULT for ETH_IENS

Definition at line 780 of file efm32gg11b_eth.h.

#define ETH_IENS_TXUSEDBITREAD   (0x1UL << 3)

Enable transmit used bit read interrupt

Definition at line 771 of file efm32gg11b_eth.h.

#define ETH_IENS_TXUSEDBITREAD_DEFAULT   (_ETH_IENS_TXUSEDBITREAD_DEFAULT << 3)

Shifted mode DEFAULT for ETH_IENS

Definition at line 775 of file efm32gg11b_eth.h.

#define ETH_IENS_WOLEVNTRX   (0x1UL << 28)

Enable WOL event received interrupt

Definition at line 871 of file efm32gg11b_eth.h.

#define ETH_IENS_WOLEVNTRX_DEFAULT   (_ETH_IENS_WOLEVNTRX_DEFAULT << 28)

Shifted mode DEFAULT for ETH_IENS

Definition at line 875 of file efm32gg11b_eth.h.

#define ETH_IFCR_AMBAERR   (0x1UL << 6)

Transmit frame corruption due to AMBA (AHB) error.

Definition at line 657 of file efm32gg11b_eth.h.

#define ETH_IFCR_AMBAERR_DEFAULT   (_ETH_IFCR_AMBAERR_DEFAULT << 6)

Shifted mode DEFAULT for ETH_IFCR

Definition at line 661 of file efm32gg11b_eth.h.

#define ETH_IFCR_MNGMNTDONE   (0x1UL << 0)

Management frame sent

Definition at line 627 of file efm32gg11b_eth.h.

#define ETH_IFCR_MNGMNTDONE_DEFAULT   (_ETH_IFCR_MNGMNTDONE_DEFAULT << 0)

Shifted mode DEFAULT for ETH_IFCR

Definition at line 631 of file efm32gg11b_eth.h.

#define ETH_IFCR_NONZEROPFRMQUANT   (0x1UL << 12)

Pause frame with non-zero pause quantum received

Definition at line 677 of file efm32gg11b_eth.h.

#define ETH_IFCR_NONZEROPFRMQUANT_DEFAULT   (_ETH_IFCR_NONZEROPFRMQUANT_DEFAULT << 12)

Shifted mode DEFAULT for ETH_IFCR

Definition at line 681 of file efm32gg11b_eth.h.

#define ETH_IFCR_PAUSETIMEZERO   (0x1UL << 13)

Pause Time zero

Definition at line 682 of file efm32gg11b_eth.h.

#define ETH_IFCR_PAUSETIMEZERO_DEFAULT   (_ETH_IFCR_PAUSETIMEZERO_DEFAULT << 13)

Shifted mode DEFAULT for ETH_IFCR

Definition at line 686 of file efm32gg11b_eth.h.

#define ETH_IFCR_PFRMTX   (0x1UL << 14)

Pause frame transmitted

Definition at line 687 of file efm32gg11b_eth.h.

#define ETH_IFCR_PFRMTX_DEFAULT   (_ETH_IFCR_PFRMTX_DEFAULT << 14)

Shifted mode DEFAULT for ETH_IFCR

Definition at line 691 of file efm32gg11b_eth.h.

#define ETH_IFCR_PTPDLYREQFRMRX   (0x1UL << 18)

PTP delay_req frame received

Definition at line 692 of file efm32gg11b_eth.h.

#define ETH_IFCR_PTPDLYREQFRMRX_DEFAULT   (_ETH_IFCR_PTPDLYREQFRMRX_DEFAULT << 18)

Shifted mode DEFAULT for ETH_IFCR

Definition at line 696 of file efm32gg11b_eth.h.

#define ETH_IFCR_PTPDLYREQFRMTX   (0x1UL << 20)

PTP delay_req frame transmitted

Definition at line 702 of file efm32gg11b_eth.h.

#define ETH_IFCR_PTPDLYREQFRMTX_DEFAULT   (_ETH_IFCR_PTPDLYREQFRMTX_DEFAULT << 20)

Shifted mode DEFAULT for ETH_IFCR

Definition at line 706 of file efm32gg11b_eth.h.

#define ETH_IFCR_PTPPDLYREQFRMRX   (0x1UL << 22)

PTP pdelay_req frame received

Definition at line 712 of file efm32gg11b_eth.h.

#define ETH_IFCR_PTPPDLYREQFRMRX_DEFAULT   (_ETH_IFCR_PTPPDLYREQFRMRX_DEFAULT << 22)

Shifted mode DEFAULT for ETH_IFCR

Definition at line 716 of file efm32gg11b_eth.h.

#define ETH_IFCR_PTPPDLYREQFRMTX   (0x1UL << 24)

PTP pdelay_req frame transmitted

Definition at line 722 of file efm32gg11b_eth.h.

#define ETH_IFCR_PTPPDLYREQFRMTX_DEFAULT   (_ETH_IFCR_PTPPDLYREQFRMTX_DEFAULT << 24)

Shifted mode DEFAULT for ETH_IFCR

Definition at line 726 of file efm32gg11b_eth.h.

#define ETH_IFCR_PTPPDLYRESPFRMRX   (0x1UL << 23)

PTP pdelay_resp frame received

Definition at line 717 of file efm32gg11b_eth.h.

#define ETH_IFCR_PTPPDLYRESPFRMRX_DEFAULT   (_ETH_IFCR_PTPPDLYRESPFRMRX_DEFAULT << 23)

Shifted mode DEFAULT for ETH_IFCR

Definition at line 721 of file efm32gg11b_eth.h.

#define ETH_IFCR_PTPPDLYRESPFRMTX   (0x1UL << 25)

PTP pdelay_resp frame transmitted

Definition at line 727 of file efm32gg11b_eth.h.

#define ETH_IFCR_PTPPDLYRESPFRMTX_DEFAULT   (_ETH_IFCR_PTPPDLYRESPFRMTX_DEFAULT << 25)

Shifted mode DEFAULT for ETH_IFCR

Definition at line 731 of file efm32gg11b_eth.h.

#define ETH_IFCR_PTPSYNCFRMRX   (0x1UL << 19)

PTP sync frame received

Definition at line 697 of file efm32gg11b_eth.h.

#define ETH_IFCR_PTPSYNCFRMRX_DEFAULT   (_ETH_IFCR_PTPSYNCFRMRX_DEFAULT << 19)

Shifted mode DEFAULT for ETH_IFCR

Definition at line 701 of file efm32gg11b_eth.h.

#define ETH_IFCR_PTPSYNCFRMTX   (0x1UL << 21)

PTP sync frame transmitted

Definition at line 707 of file efm32gg11b_eth.h.

#define ETH_IFCR_PTPSYNCFRMTX_DEFAULT   (_ETH_IFCR_PTPSYNCFRMTX_DEFAULT << 21)

Shifted mode DEFAULT for ETH_IFCR

Definition at line 711 of file efm32gg11b_eth.h.

#define ETH_IFCR_RESPNOTOK   (0x1UL << 11)

Hresp not OK

Definition at line 672 of file efm32gg11b_eth.h.

#define ETH_IFCR_RESPNOTOK_DEFAULT   (_ETH_IFCR_RESPNOTOK_DEFAULT << 11)

Shifted mode DEFAULT for ETH_IFCR

Definition at line 676 of file efm32gg11b_eth.h.

#define ETH_IFCR_RTRYLMTORLATECOL   (0x1UL << 5)

Retry limit exceeded or late collision

Definition at line 652 of file efm32gg11b_eth.h.

#define ETH_IFCR_RTRYLMTORLATECOL_DEFAULT   (_ETH_IFCR_RTRYLMTORLATECOL_DEFAULT << 5)

Shifted mode DEFAULT for ETH_IFCR

Definition at line 656 of file efm32gg11b_eth.h.

#define ETH_IFCR_RXCMPLT   (0x1UL << 1)

Receive complete

Definition at line 632 of file efm32gg11b_eth.h.

#define ETH_IFCR_RXCMPLT_DEFAULT   (_ETH_IFCR_RXCMPLT_DEFAULT << 1)

Shifted mode DEFAULT for ETH_IFCR

Definition at line 636 of file efm32gg11b_eth.h.

#define ETH_IFCR_RXLPIINDC   (0x1UL << 27)

Receive LPI indication status bit change

Definition at line 737 of file efm32gg11b_eth.h.

#define ETH_IFCR_RXLPIINDC_DEFAULT   (_ETH_IFCR_RXLPIINDC_DEFAULT << 27)

Shifted mode DEFAULT for ETH_IFCR

Definition at line 741 of file efm32gg11b_eth.h.

#define ETH_IFCR_RXOVERRUN   (0x1UL << 10)

Receive overrun

Definition at line 667 of file efm32gg11b_eth.h.

#define ETH_IFCR_RXOVERRUN_DEFAULT   (_ETH_IFCR_RXOVERRUN_DEFAULT << 10)

Shifted mode DEFAULT for ETH_IFCR

Definition at line 671 of file efm32gg11b_eth.h.

#define ETH_IFCR_RXUSEDBITREAD   (0x1UL << 2)

RX used bit read

Definition at line 637 of file efm32gg11b_eth.h.

#define ETH_IFCR_RXUSEDBITREAD_DEFAULT   (_ETH_IFCR_RXUSEDBITREAD_DEFAULT << 2)

Shifted mode DEFAULT for ETH_IFCR

Definition at line 641 of file efm32gg11b_eth.h.

#define ETH_IFCR_TSUSECREGINCR   (0x1UL << 26)

TSU seconds register increment

Definition at line 732 of file efm32gg11b_eth.h.

#define ETH_IFCR_TSUSECREGINCR_DEFAULT   (_ETH_IFCR_TSUSECREGINCR_DEFAULT << 26)

Shifted mode DEFAULT for ETH_IFCR

Definition at line 736 of file efm32gg11b_eth.h.

#define ETH_IFCR_TSUTIMERCOMP   (0x1UL << 29)

TSU timer comparison interrupt.

Definition at line 747 of file efm32gg11b_eth.h.

#define ETH_IFCR_TSUTIMERCOMP_DEFAULT   (_ETH_IFCR_TSUTIMERCOMP_DEFAULT << 29)

Shifted mode DEFAULT for ETH_IFCR

Definition at line 751 of file efm32gg11b_eth.h.

#define ETH_IFCR_TXCMPLT   (0x1UL << 7)

Transmit complete

Definition at line 662 of file efm32gg11b_eth.h.

#define ETH_IFCR_TXCMPLT_DEFAULT   (_ETH_IFCR_TXCMPLT_DEFAULT << 7)

Shifted mode DEFAULT for ETH_IFCR

Definition at line 666 of file efm32gg11b_eth.h.

#define ETH_IFCR_TXUNDERRUN   (0x1UL << 4)

Transmit under run

Definition at line 647 of file efm32gg11b_eth.h.

#define ETH_IFCR_TXUNDERRUN_DEFAULT   (_ETH_IFCR_TXUNDERRUN_DEFAULT << 4)

Shifted mode DEFAULT for ETH_IFCR

Definition at line 651 of file efm32gg11b_eth.h.

#define ETH_IFCR_TXUSEDBITREAD   (0x1UL << 3)

TX used bit read

Definition at line 642 of file efm32gg11b_eth.h.

#define ETH_IFCR_TXUSEDBITREAD_DEFAULT   (_ETH_IFCR_TXUSEDBITREAD_DEFAULT << 3)

Shifted mode DEFAULT for ETH_IFCR

Definition at line 646 of file efm32gg11b_eth.h.

#define ETH_IFCR_WOLEVNTRX   (0x1UL << 28)

WOL event received interrupt.

Definition at line 742 of file efm32gg11b_eth.h.

#define ETH_IFCR_WOLEVNTRX_DEFAULT   (_ETH_IFCR_WOLEVNTRX_DEFAULT << 28)

Shifted mode DEFAULT for ETH_IFCR

Definition at line 746 of file efm32gg11b_eth.h.

#define ETH_IMOD_RXINTMOD_DEFAULT   (_ETH_IMOD_RXINTMOD_DEFAULT << 0)

Shifted mode DEFAULT for ETH_IMOD

Definition at line 1239 of file efm32gg11b_eth.h.

#define ETH_IMOD_TXINTMOD_DEFAULT   (_ETH_IMOD_TXINTMOD_DEFAULT << 16)

Shifted mode DEFAULT for ETH_IMOD

Definition at line 1243 of file efm32gg11b_eth.h.

#define ETH_JUMBOMAXLEN_JUMBOMAXLEN_DEFAULT   (_ETH_JUMBOMAXLEN_JUMBOMAXLEN_DEFAULT << 0)

Shifted mode DEFAULT for ETH_JUMBOMAXLEN

Definition at line 1231 of file efm32gg11b_eth.h.

#define ETH_LATECOLS_COUNT_DEFAULT   (_ETH_LATECOLS_COUNT_DEFAULT << 0)

Shifted mode DEFAULT for ETH_LATECOLS

Definition at line 1724 of file efm32gg11b_eth.h.

#define ETH_MASKADD1BOTTOM_ADDRMASK_DEFAULT   (_ETH_MASKADD1BOTTOM_ADDRMASK_DEFAULT << 0)

Shifted mode DEFAULT for ETH_MASKADD1BOTTOM

Definition at line 1500 of file efm32gg11b_eth.h.

#define ETH_MASKADD1TOP_ADDRMASK_DEFAULT   (_ETH_MASKADD1TOP_ADDRMASK_DEFAULT << 0)

Shifted mode DEFAULT for ETH_MASKADD1TOP

Definition at line 1508 of file efm32gg11b_eth.h.

#define ETH_MULTICASTRXED_COUNT_DEFAULT   (_ETH_MULTICASTRXED_COUNT_DEFAULT << 0)

Shifted mode DEFAULT for ETH_MULTICASTRXED

Definition at line 1780 of file efm32gg11b_eth.h.

#define ETH_MULTICASTTXED_COUNT_DEFAULT   (_ETH_MULTICASTTXED_COUNT_DEFAULT << 0)

Shifted mode DEFAULT for ETH_MULTICASTTXED

Definition at line 1620 of file efm32gg11b_eth.h.

#define ETH_MULTICOLS_COUNT_DEFAULT   (_ETH_MULTICOLS_COUNT_DEFAULT << 0)

Shifted mode DEFAULT for ETH_MULTICOLS

Definition at line 1708 of file efm32gg11b_eth.h.

#define ETH_NETWORKCFG_COPYALLFRAMES   (0x1UL << 4)

Copy all frames

Definition at line 333 of file efm32gg11b_eth.h.

#define ETH_NETWORKCFG_COPYALLFRAMES_DEFAULT   (_ETH_NETWORKCFG_COPYALLFRAMES_DEFAULT << 4)

Shifted mode DEFAULT for ETH_NETWORKCFG

Definition at line 337 of file efm32gg11b_eth.h.

#define ETH_NETWORKCFG_DISCOPYOFPFRAMES   (0x1UL << 23)

Disable copy of pause frames

Definition at line 402 of file efm32gg11b_eth.h.

#define ETH_NETWORKCFG_DISCOPYOFPFRAMES_DEFAULT   (_ETH_NETWORKCFG_DISCOPYOFPFRAMES_DEFAULT << 23)

Shifted mode DEFAULT for ETH_NETWORKCFG

Definition at line 406 of file efm32gg11b_eth.h.

#define ETH_NETWORKCFG_DISCRDNONVLANFRAMES   (0x1UL << 2)

Discard non-VLAN frames

Definition at line 323 of file efm32gg11b_eth.h.

#define ETH_NETWORKCFG_DISCRDNONVLANFRAMES_DEFAULT   (_ETH_NETWORKCFG_DISCRDNONVLANFRAMES_DEFAULT << 2)

Shifted mode DEFAULT for ETH_NETWORKCFG

Definition at line 327 of file efm32gg11b_eth.h.

#define ETH_NETWORKCFG_ENHALFDUPLEXRX   (0x1UL << 25)

Enable frames to be received in half-duplex mode while transmitting.

Definition at line 412 of file efm32gg11b_eth.h.

#define ETH_NETWORKCFG_ENHALFDUPLEXRX_DEFAULT   (_ETH_NETWORKCFG_ENHALFDUPLEXRX_DEFAULT << 25)

Shifted mode DEFAULT for ETH_NETWORKCFG

Definition at line 416 of file efm32gg11b_eth.h.

#define ETH_NETWORKCFG_FCSREMOVE   (0x1UL << 17)

FCS remove

Definition at line 377 of file efm32gg11b_eth.h.

#define ETH_NETWORKCFG_FCSREMOVE_DEFAULT   (_ETH_NETWORKCFG_FCSREMOVE_DEFAULT << 17)

Shifted mode DEFAULT for ETH_NETWORKCFG

Definition at line 381 of file efm32gg11b_eth.h.

#define ETH_NETWORKCFG_FULLDUPLEX   (0x1UL << 1)

Full duplex

Definition at line 318 of file efm32gg11b_eth.h.

#define ETH_NETWORKCFG_FULLDUPLEX_DEFAULT   (_ETH_NETWORKCFG_FULLDUPLEX_DEFAULT << 1)

Shifted mode DEFAULT for ETH_NETWORKCFG

Definition at line 322 of file efm32gg11b_eth.h.

#define ETH_NETWORKCFG_IGNOREIPGRXER   (0x1UL << 30)

Ignore IPG rx_er.

Definition at line 432 of file efm32gg11b_eth.h.

#define ETH_NETWORKCFG_IGNOREIPGRXER_DEFAULT   (_ETH_NETWORKCFG_IGNOREIPGRXER_DEFAULT << 30)

Shifted mode DEFAULT for ETH_NETWORKCFG

Definition at line 436 of file efm32gg11b_eth.h.

#define ETH_NETWORKCFG_IGNORERXFCS   (0x1UL << 26)

Ignore RX FCS

Definition at line 417 of file efm32gg11b_eth.h.

#define ETH_NETWORKCFG_IGNORERXFCS_DEFAULT   (_ETH_NETWORKCFG_IGNORERXFCS_DEFAULT << 26)

Shifted mode DEFAULT for ETH_NETWORKCFG

Definition at line 421 of file efm32gg11b_eth.h.

#define ETH_NETWORKCFG_IPGSTRTCHEN   (0x1UL << 28)

IPG stretch enable

Definition at line 422 of file efm32gg11b_eth.h.

#define ETH_NETWORKCFG_IPGSTRTCHEN_DEFAULT   (_ETH_NETWORKCFG_IPGSTRTCHEN_DEFAULT << 28)

Shifted mode DEFAULT for ETH_NETWORKCFG

Definition at line 426 of file efm32gg11b_eth.h.

#define ETH_NETWORKCFG_JUMBOFRAMES   (0x1UL << 3)

Jumbo frames enable

Definition at line 328 of file efm32gg11b_eth.h.

#define ETH_NETWORKCFG_JUMBOFRAMES_DEFAULT   (_ETH_NETWORKCFG_JUMBOFRAMES_DEFAULT << 3)

Shifted mode DEFAULT for ETH_NETWORKCFG

Definition at line 332 of file efm32gg11b_eth.h.

#define ETH_NETWORKCFG_LENFIELDERRFRMDISCRD   (0x1UL << 16)

Length field error frame discard

Definition at line 372 of file efm32gg11b_eth.h.

#define ETH_NETWORKCFG_LENFIELDERRFRMDISCRD_DEFAULT   (_ETH_NETWORKCFG_LENFIELDERRFRMDISCRD_DEFAULT << 16)

Shifted mode DEFAULT for ETH_NETWORKCFG

Definition at line 376 of file efm32gg11b_eth.h.

#define ETH_NETWORKCFG_MDCCLKDIV_DEFAULT   (_ETH_NETWORKCFG_MDCCLKDIV_DEFAULT << 18)

Shifted mode DEFAULT for ETH_NETWORKCFG

Definition at line 395 of file efm32gg11b_eth.h.

#define ETH_NETWORKCFG_MDCCLKDIV_DIVBY128   (_ETH_NETWORKCFG_MDCCLKDIV_DIVBY128 << 18)

Shifted mode DIVBY128 for ETH_NETWORKCFG

Definition at line 400 of file efm32gg11b_eth.h.

#define ETH_NETWORKCFG_MDCCLKDIV_DIVBY16   (_ETH_NETWORKCFG_MDCCLKDIV_DIVBY16 << 18)

Shifted mode DIVBY16 for ETH_NETWORKCFG

Definition at line 394 of file efm32gg11b_eth.h.

#define ETH_NETWORKCFG_MDCCLKDIV_DIVBY224   (_ETH_NETWORKCFG_MDCCLKDIV_DIVBY224 << 18)

Shifted mode DIVBY224 for ETH_NETWORKCFG

Definition at line 401 of file efm32gg11b_eth.h.

#define ETH_NETWORKCFG_MDCCLKDIV_DIVBY32   (_ETH_NETWORKCFG_MDCCLKDIV_DIVBY32 << 18)

Shifted mode DIVBY32 for ETH_NETWORKCFG

Definition at line 396 of file efm32gg11b_eth.h.

#define ETH_NETWORKCFG_MDCCLKDIV_DIVBY48   (_ETH_NETWORKCFG_MDCCLKDIV_DIVBY48 << 18)

Shifted mode DIVBY48 for ETH_NETWORKCFG

Definition at line 397 of file efm32gg11b_eth.h.

#define ETH_NETWORKCFG_MDCCLKDIV_DIVBY64   (_ETH_NETWORKCFG_MDCCLKDIV_DIVBY64 << 18)

Shifted mode DIVBY64 for ETH_NETWORKCFG

Definition at line 398 of file efm32gg11b_eth.h.

#define ETH_NETWORKCFG_MDCCLKDIV_DIVBY8   (_ETH_NETWORKCFG_MDCCLKDIV_DIVBY8 << 18)

Shifted mode DIVBY8 for ETH_NETWORKCFG

Definition at line 393 of file efm32gg11b_eth.h.

#define ETH_NETWORKCFG_MDCCLKDIV_DIVBY96   (_ETH_NETWORKCFG_MDCCLKDIV_DIVBY96 << 18)

Shifted mode DIVBY96 for ETH_NETWORKCFG

Definition at line 399 of file efm32gg11b_eth.h.

#define ETH_NETWORKCFG_MULTICASTHASHEN   (0x1UL << 6)

Multicast hash enable

Definition at line 343 of file efm32gg11b_eth.h.

#define ETH_NETWORKCFG_MULTICASTHASHEN_DEFAULT   (_ETH_NETWORKCFG_MULTICASTHASHEN_DEFAULT << 6)

Shifted mode DEFAULT for ETH_NETWORKCFG

Definition at line 347 of file efm32gg11b_eth.h.

#define ETH_NETWORKCFG_NOBROADCAST   (0x1UL << 5)

No broadcast

Definition at line 338 of file efm32gg11b_eth.h.

#define ETH_NETWORKCFG_NOBROADCAST_DEFAULT   (_ETH_NETWORKCFG_NOBROADCAST_DEFAULT << 5)

Shifted mode DEFAULT for ETH_NETWORKCFG

Definition at line 342 of file efm32gg11b_eth.h.

#define ETH_NETWORKCFG_NSPCHANGE   (0x1UL << 29)

Receive bad preamble.

Definition at line 427 of file efm32gg11b_eth.h.

#define ETH_NETWORKCFG_NSPCHANGE_DEFAULT   (_ETH_NETWORKCFG_NSPCHANGE_DEFAULT << 29)

Shifted mode DEFAULT for ETH_NETWORKCFG

Definition at line 431 of file efm32gg11b_eth.h.

#define ETH_NETWORKCFG_PAUSEEN   (0x1UL << 13)

Pause enable

Definition at line 363 of file efm32gg11b_eth.h.

#define ETH_NETWORKCFG_PAUSEEN_DEFAULT   (_ETH_NETWORKCFG_PAUSEEN_DEFAULT << 13)

Shifted mode DEFAULT for ETH_NETWORKCFG

Definition at line 367 of file efm32gg11b_eth.h.

#define ETH_NETWORKCFG_RETRYTEST   (0x1UL << 12)

Retry test

Definition at line 358 of file efm32gg11b_eth.h.

#define ETH_NETWORKCFG_RETRYTEST_DEFAULT   (_ETH_NETWORKCFG_RETRYTEST_DEFAULT << 12)

Shifted mode DEFAULT for ETH_NETWORKCFG

Definition at line 362 of file efm32gg11b_eth.h.

#define ETH_NETWORKCFG_RX1536BYTEFRAMES   (0x1UL << 8)

Receive 1536 byte frames

Definition at line 353 of file efm32gg11b_eth.h.

#define ETH_NETWORKCFG_RX1536BYTEFRAMES_DEFAULT   (_ETH_NETWORKCFG_RX1536BYTEFRAMES_DEFAULT << 8)

Shifted mode DEFAULT for ETH_NETWORKCFG

Definition at line 357 of file efm32gg11b_eth.h.

#define ETH_NETWORKCFG_RXBUFFOFFSET_DEFAULT   (_ETH_NETWORKCFG_RXBUFFOFFSET_DEFAULT << 14)

Shifted mode DEFAULT for ETH_NETWORKCFG

Definition at line 371 of file efm32gg11b_eth.h.

#define ETH_NETWORKCFG_RXCHKSUMOFFLOADEN   (0x1UL << 24)

Receive checksum offload enable

Definition at line 407 of file efm32gg11b_eth.h.

#define ETH_NETWORKCFG_RXCHKSUMOFFLOADEN_DEFAULT   (_ETH_NETWORKCFG_RXCHKSUMOFFLOADEN_DEFAULT << 24)

Shifted mode DEFAULT for ETH_NETWORKCFG

Definition at line 411 of file efm32gg11b_eth.h.

#define ETH_NETWORKCFG_SPEED   (0x1UL << 0)

Speed

Definition at line 313 of file efm32gg11b_eth.h.

#define ETH_NETWORKCFG_SPEED_DEFAULT   (_ETH_NETWORKCFG_SPEED_DEFAULT << 0)

Shifted mode DEFAULT for ETH_NETWORKCFG

Definition at line 317 of file efm32gg11b_eth.h.

#define ETH_NETWORKCFG_UNICASTHASHEN   (0x1UL << 7)

Unicast hash enable

Definition at line 348 of file efm32gg11b_eth.h.

#define ETH_NETWORKCFG_UNICASTHASHEN_DEFAULT   (_ETH_NETWORKCFG_UNICASTHASHEN_DEFAULT << 7)

Shifted mode DEFAULT for ETH_NETWORKCFG

Definition at line 352 of file efm32gg11b_eth.h.

#define ETH_NETWORKCTRL_BACKPRESSURE   (0x1UL << 8)

Back pressure will force collisions on all received frames

Definition at line 239 of file efm32gg11b_eth.h.

#define ETH_NETWORKCTRL_BACKPRESSURE_DEFAULT   (_ETH_NETWORKCTRL_BACKPRESSURE_DEFAULT << 8)

Shifted mode DEFAULT for ETH_NETWORKCTRL

Definition at line 243 of file efm32gg11b_eth.h.

#define ETH_NETWORKCTRL_CLRALLSTATSREGS   (0x1UL << 5)

Clear statistics registers

Definition at line 224 of file efm32gg11b_eth.h.

#define ETH_NETWORKCTRL_CLRALLSTATSREGS_DEFAULT   (_ETH_NETWORKCTRL_CLRALLSTATSREGS_DEFAULT << 5)

Shifted mode DEFAULT for ETH_NETWORKCTRL

Definition at line 228 of file efm32gg11b_eth.h.

#define ETH_NETWORKCTRL_ENBRX   (0x1UL << 2)

Receive enable

Definition at line 209 of file efm32gg11b_eth.h.

#define ETH_NETWORKCTRL_ENBRX_DEFAULT   (_ETH_NETWORKCTRL_ENBRX_DEFAULT << 2)

Shifted mode DEFAULT for ETH_NETWORKCTRL

Definition at line 213 of file efm32gg11b_eth.h.

#define ETH_NETWORKCTRL_ENBTX   (0x1UL << 3)

Transmit enable

Definition at line 214 of file efm32gg11b_eth.h.

#define ETH_NETWORKCTRL_ENBTX_DEFAULT   (_ETH_NETWORKCTRL_ENBTX_DEFAULT << 3)

Shifted mode DEFAULT for ETH_NETWORKCTRL

Definition at line 218 of file efm32gg11b_eth.h.

#define ETH_NETWORKCTRL_FLUSHRXPKT   (0x1UL << 18)

Flush the next packet from the external RX DPRAM.

Definition at line 279 of file efm32gg11b_eth.h.

#define ETH_NETWORKCTRL_FLUSHRXPKT_DEFAULT   (_ETH_NETWORKCTRL_FLUSHRXPKT_DEFAULT << 18)

Shifted mode DEFAULT for ETH_NETWORKCTRL

Definition at line 283 of file efm32gg11b_eth.h.

#define ETH_NETWORKCTRL_INCALLSTATSREGS   (0x1UL << 6)

Incremental statistics registers

Definition at line 229 of file efm32gg11b_eth.h.

#define ETH_NETWORKCTRL_INCALLSTATSREGS_DEFAULT   (_ETH_NETWORKCTRL_INCALLSTATSREGS_DEFAULT << 6)

Shifted mode DEFAULT for ETH_NETWORKCTRL

Definition at line 233 of file efm32gg11b_eth.h.

#define ETH_NETWORKCTRL_LOOPBACKLOCAL   (0x1UL << 1)

Loopback local

Definition at line 204 of file efm32gg11b_eth.h.

#define ETH_NETWORKCTRL_LOOPBACKLOCAL_DEFAULT   (_ETH_NETWORKCTRL_LOOPBACKLOCAL_DEFAULT << 1)

Shifted mode DEFAULT for ETH_NETWORKCTRL

Definition at line 208 of file efm32gg11b_eth.h.

#define ETH_NETWORKCTRL_MANPORTEN   (0x1UL << 4)

Management port enable

Definition at line 219 of file efm32gg11b_eth.h.

#define ETH_NETWORKCTRL_MANPORTEN_DEFAULT   (_ETH_NETWORKCTRL_MANPORTEN_DEFAULT << 4)

Shifted mode DEFAULT for ETH_NETWORKCTRL

Definition at line 223 of file efm32gg11b_eth.h.

#define ETH_NETWORKCTRL_ONESTEPSYNCMODE   (0x1UL << 24)

1588 One Step Sync Mode.

Definition at line 299 of file efm32gg11b_eth.h.

#define ETH_NETWORKCTRL_ONESTEPSYNCMODE_DEFAULT   (_ETH_NETWORKCTRL_ONESTEPSYNCMODE_DEFAULT << 24)

Shifted mode DEFAULT for ETH_NETWORKCTRL

Definition at line 303 of file efm32gg11b_eth.h.

#define ETH_NETWORKCTRL_PFCCTRL   (0x1UL << 25)

Enable multiple PFC pause quantums, one per pause priority

Definition at line 304 of file efm32gg11b_eth.h.

#define ETH_NETWORKCTRL_PFCCTRL_DEFAULT   (_ETH_NETWORKCTRL_PFCCTRL_DEFAULT << 25)

Shifted mode DEFAULT for ETH_NETWORKCTRL

Definition at line 308 of file efm32gg11b_eth.h.

#define ETH_NETWORKCTRL_PFCENB   (0x1UL << 16)

Enable PFC Priority Based Pause Reception capabilities.

Definition at line 269 of file efm32gg11b_eth.h.

#define ETH_NETWORKCTRL_PFCENB_DEFAULT   (_ETH_NETWORKCTRL_PFCENB_DEFAULT << 16)

Shifted mode DEFAULT for ETH_NETWORKCTRL

Definition at line 273 of file efm32gg11b_eth.h.

#define ETH_NETWORKCTRL_PTPUNICASTEN   (0x1UL << 20)

Enable detection of unicast PTP unicast frames.

Definition at line 289 of file efm32gg11b_eth.h.

#define ETH_NETWORKCTRL_PTPUNICASTEN_DEFAULT   (_ETH_NETWORKCTRL_PTPUNICASTEN_DEFAULT << 20)

Shifted mode DEFAULT for ETH_NETWORKCTRL

Definition at line 293 of file efm32gg11b_eth.h.

#define ETH_NETWORKCTRL_STATSWREN   (0x1UL << 7)

Write enable for statistics registers

Definition at line 234 of file efm32gg11b_eth.h.

#define ETH_NETWORKCTRL_STATSWREN_DEFAULT   (_ETH_NETWORKCTRL_STATSWREN_DEFAULT << 7)

Shifted mode DEFAULT for ETH_NETWORKCTRL

Definition at line 238 of file efm32gg11b_eth.h.

#define ETH_NETWORKCTRL_STORERXTS   (0x1UL << 15)

Store receive time stamp to memory.

Definition at line 264 of file efm32gg11b_eth.h.

#define ETH_NETWORKCTRL_STORERXTS_DEFAULT   (_ETH_NETWORKCTRL_STORERXTS_DEFAULT << 15)

Shifted mode DEFAULT for ETH_NETWORKCTRL

Definition at line 268 of file efm32gg11b_eth.h.

#define ETH_NETWORKCTRL_STOREUDPOFFSET   (0x1UL << 22)

Store UDP / TCP offset to memory.

Definition at line 294 of file efm32gg11b_eth.h.

#define ETH_NETWORKCTRL_STOREUDPOFFSET_DEFAULT   (_ETH_NETWORKCTRL_STOREUDPOFFSET_DEFAULT << 22)

Shifted mode DEFAULT for ETH_NETWORKCTRL

Definition at line 298 of file efm32gg11b_eth.h.

#define ETH_NETWORKCTRL_TXHALT   (0x1UL << 10)

Transmit halt

Definition at line 249 of file efm32gg11b_eth.h.

#define ETH_NETWORKCTRL_TXHALT_DEFAULT   (_ETH_NETWORKCTRL_TXHALT_DEFAULT << 10)

Shifted mode DEFAULT for ETH_NETWORKCTRL

Definition at line 253 of file efm32gg11b_eth.h.

#define ETH_NETWORKCTRL_TXLPIEN   (0x1UL << 19)

Enable LPI transmission when set LPI (low power idle) is immediately transmitted.

Definition at line 284 of file efm32gg11b_eth.h.

#define ETH_NETWORKCTRL_TXLPIEN_DEFAULT   (_ETH_NETWORKCTRL_TXLPIEN_DEFAULT << 19)

Shifted mode DEFAULT for ETH_NETWORKCTRL

Definition at line 288 of file efm32gg11b_eth.h.

#define ETH_NETWORKCTRL_TXPFCPRIORPFRM   (0x1UL << 17)

Write a one to transmit PFC priority based pause frame.

Definition at line 274 of file efm32gg11b_eth.h.

#define ETH_NETWORKCTRL_TXPFCPRIORPFRM_DEFAULT   (_ETH_NETWORKCTRL_TXPFCPRIORPFRM_DEFAULT << 17)

Shifted mode DEFAULT for ETH_NETWORKCTRL

Definition at line 278 of file efm32gg11b_eth.h.

#define ETH_NETWORKCTRL_TXPFRMREQ   (0x1UL << 11)

Transmit pause frame

Definition at line 254 of file efm32gg11b_eth.h.

#define ETH_NETWORKCTRL_TXPFRMREQ_DEFAULT   (_ETH_NETWORKCTRL_TXPFRMREQ_DEFAULT << 11)

Shifted mode DEFAULT for ETH_NETWORKCTRL

Definition at line 258 of file efm32gg11b_eth.h.

#define ETH_NETWORKCTRL_TXPFRMZERO   (0x1UL << 12)

Transmit zero quantum pause frame

Definition at line 259 of file efm32gg11b_eth.h.

#define ETH_NETWORKCTRL_TXPFRMZERO_DEFAULT   (_ETH_NETWORKCTRL_TXPFRMZERO_DEFAULT << 12)

Shifted mode DEFAULT for ETH_NETWORKCTRL

Definition at line 263 of file efm32gg11b_eth.h.

#define ETH_NETWORKCTRL_TXSTRT   (0x1UL << 9)

Start transmission

Definition at line 244 of file efm32gg11b_eth.h.

#define ETH_NETWORKCTRL_TXSTRT_DEFAULT   (_ETH_NETWORKCTRL_TXSTRT_DEFAULT << 9)

Shifted mode DEFAULT for ETH_NETWORKCTRL

Definition at line 248 of file efm32gg11b_eth.h.

#define ETH_NETWORKSTATUS_LPIINDICATE   (0x1UL << 7)

LPI Indication

Definition at line 456 of file efm32gg11b_eth.h.

#define ETH_NETWORKSTATUS_LPIINDICATE_DEFAULT   (_ETH_NETWORKSTATUS_LPIINDICATE_DEFAULT << 7)

Shifted mode DEFAULT for ETH_NETWORKSTATUS

Definition at line 460 of file efm32gg11b_eth.h.

#define ETH_NETWORKSTATUS_MANDONE   (0x1UL << 2)

The PHY management logic is idle (i.e. has completed).

Definition at line 446 of file efm32gg11b_eth.h.

#define ETH_NETWORKSTATUS_MANDONE_DEFAULT   (_ETH_NETWORKSTATUS_MANDONE_DEFAULT << 2)

Shifted mode DEFAULT for ETH_NETWORKSTATUS

Definition at line 450 of file efm32gg11b_eth.h.

#define ETH_NETWORKSTATUS_MDIOIN   (0x1UL << 1)

Returns status of the mdio_in pin.

Definition at line 441 of file efm32gg11b_eth.h.

#define ETH_NETWORKSTATUS_MDIOIN_DEFAULT   (_ETH_NETWORKSTATUS_MDIOIN_DEFAULT << 1)

Shifted mode DEFAULT for ETH_NETWORKSTATUS

Definition at line 445 of file efm32gg11b_eth.h.

#define ETH_NETWORKSTATUS_PFCNEGOTIATE   (0x1UL << 6)

Set when PFC Priority Based Pause has been negotiated.

Definition at line 451 of file efm32gg11b_eth.h.

#define ETH_NETWORKSTATUS_PFCNEGOTIATE_DEFAULT   (_ETH_NETWORKSTATUS_PFCNEGOTIATE_DEFAULT << 6)

Shifted mode DEFAULT for ETH_NETWORKSTATUS

Definition at line 455 of file efm32gg11b_eth.h.

#define ETH_OCTETSRXEDBOTTOM_COUNT_DEFAULT   (_ETH_OCTETSRXEDBOTTOM_COUNT_DEFAULT << 0)

Shifted mode DEFAULT for ETH_OCTETSRXEDBOTTOM

Definition at line 1748 of file efm32gg11b_eth.h.

#define ETH_OCTETSRXEDTOP_COUNT_DEFAULT   (_ETH_OCTETSRXEDTOP_COUNT_DEFAULT << 0)

Shifted mode DEFAULT for ETH_OCTETSRXEDTOP

Definition at line 1756 of file efm32gg11b_eth.h.

#define ETH_OCTETSTXEDBOTTOM_COUNT_DEFAULT   (_ETH_OCTETSTXEDBOTTOM_COUNT_DEFAULT << 0)

Shifted mode DEFAULT for ETH_OCTETSTXEDBOTTOM

Definition at line 1588 of file efm32gg11b_eth.h.

#define ETH_OCTETSTXEDTOP_COUNT_DEFAULT   (_ETH_OCTETSTXEDTOP_COUNT_DEFAULT << 0)

Shifted mode DEFAULT for ETH_OCTETSTXEDTOP

Definition at line 1596 of file efm32gg11b_eth.h.

#define ETH_PBUFRXCUTTHRU_DMARXCUTTHRU   (0x1UL << 31)

Enable RX partial store and forward operation

Definition at line 1219 of file efm32gg11b_eth.h.

#define ETH_PBUFRXCUTTHRU_DMARXCUTTHRU_DEFAULT   (_ETH_PBUFRXCUTTHRU_DMARXCUTTHRU_DEFAULT << 31)

Shifted mode DEFAULT for ETH_PBUFRXCUTTHRU

Definition at line 1223 of file efm32gg11b_eth.h.

#define ETH_PBUFRXCUTTHRU_DMARXCUTTHRUTHR_DEFAULT   (_ETH_PBUFRXCUTTHRU_DMARXCUTTHRUTHR_DEFAULT << 0)

Shifted mode DEFAULT for ETH_PBUFRXCUTTHRU

Definition at line 1218 of file efm32gg11b_eth.h.

#define ETH_PBUFTXCUTTHRU_DMATXCUTTHRU   (0x1UL << 31)

Enable TX partial store and forward operation

Definition at line 1206 of file efm32gg11b_eth.h.

#define ETH_PBUFTXCUTTHRU_DMATXCUTTHRU_DEFAULT   (_ETH_PBUFTXCUTTHRU_DMATXCUTTHRU_DEFAULT << 31)

Shifted mode DEFAULT for ETH_PBUFTXCUTTHRU

Definition at line 1210 of file efm32gg11b_eth.h.

#define ETH_PBUFTXCUTTHRU_DMATXCUTTHRUTHR_DEFAULT   (_ETH_PBUFTXCUTTHRU_DMATXCUTTHRUTHR_DEFAULT << 0)

Shifted mode DEFAULT for ETH_PBUFTXCUTTHRU

Definition at line 1205 of file efm32gg11b_eth.h.

#define ETH_PFRAMESRXED_COUNT_DEFAULT   (_ETH_PFRAMESRXED_COUNT_DEFAULT << 0)

Shifted mode DEFAULT for ETH_PFRAMESRXED

Definition at line 1788 of file efm32gg11b_eth.h.

#define ETH_PFRAMESTXED_COUNT_DEFAULT   (_ETH_PFRAMESTXED_COUNT_DEFAULT << 0)

Shifted mode DEFAULT for ETH_PFRAMESTXED

Definition at line 1628 of file efm32gg11b_eth.h.

#define ETH_PHYMNGMNT_OPERATION_DEFAULT   (_ETH_PHYMNGMNT_OPERATION_DEFAULT << 28)

Shifted mode DEFAULT for ETH_PHYMNGMNT

Definition at line 1167 of file efm32gg11b_eth.h.

#define ETH_PHYMNGMNT_PHYADDR_DEFAULT   (_ETH_PHYMNGMNT_PHYADDR_DEFAULT << 23)

Shifted mode DEFAULT for ETH_PHYMNGMNT

Definition at line 1163 of file efm32gg11b_eth.h.

#define ETH_PHYMNGMNT_PHYRWDATA_DEFAULT   (_ETH_PHYMNGMNT_PHYRWDATA_DEFAULT << 0)

Shifted mode DEFAULT for ETH_PHYMNGMNT

Definition at line 1151 of file efm32gg11b_eth.h.

#define ETH_PHYMNGMNT_REGADDR_DEFAULT   (_ETH_PHYMNGMNT_REGADDR_DEFAULT << 18)

Shifted mode DEFAULT for ETH_PHYMNGMNT

Definition at line 1159 of file efm32gg11b_eth.h.

#define ETH_PHYMNGMNT_WRITE0   (0x1UL << 31)

Must be written with 0.

Definition at line 1173 of file efm32gg11b_eth.h.

#define ETH_PHYMNGMNT_WRITE0_DEFAULT   (_ETH_PHYMNGMNT_WRITE0_DEFAULT << 31)

Shifted mode DEFAULT for ETH_PHYMNGMNT

Definition at line 1177 of file efm32gg11b_eth.h.

#define ETH_PHYMNGMNT_WRITE1   (0x1UL << 30)

Must be written to 1 for a valid Clause 22 frame and to 0 for a valid Clause 45 frame.

Definition at line 1168 of file efm32gg11b_eth.h.

#define ETH_PHYMNGMNT_WRITE10_DEFAULT   (_ETH_PHYMNGMNT_WRITE10_DEFAULT << 16)

Shifted mode DEFAULT for ETH_PHYMNGMNT

Definition at line 1155 of file efm32gg11b_eth.h.

#define ETH_PHYMNGMNT_WRITE1_DEFAULT   (_ETH_PHYMNGMNT_WRITE1_DEFAULT << 30)

Shifted mode DEFAULT for ETH_PHYMNGMNT

Definition at line 1172 of file efm32gg11b_eth.h.

#define ETH_ROUTELOC0_MIICOLLOC_DEFAULT   (_ETH_ROUTELOC0_MIICOLLOC_DEFAULT << 24)

Shifted mode DEFAULT for ETH_ROUTELOC0

Definition at line 2259 of file efm32gg11b_eth.h.

#define ETH_ROUTELOC0_MIICOLLOC_LOC0   (_ETH_ROUTELOC0_MIICOLLOC_LOC0 << 24)

Shifted mode LOC0 for ETH_ROUTELOC0

Definition at line 2258 of file efm32gg11b_eth.h.

#define ETH_ROUTELOC0_MIICOLLOC_LOC1   (_ETH_ROUTELOC0_MIICOLLOC_LOC1 << 24)

Shifted mode LOC1 for ETH_ROUTELOC0

Definition at line 2260 of file efm32gg11b_eth.h.

#define ETH_ROUTELOC0_MIICOLLOC_LOC2   (_ETH_ROUTELOC0_MIICOLLOC_LOC2 << 24)

Shifted mode LOC2 for ETH_ROUTELOC0

Definition at line 2261 of file efm32gg11b_eth.h.

#define ETH_ROUTELOC0_MIICRSLOC_DEFAULT   (_ETH_ROUTELOC0_MIICRSLOC_DEFAULT << 16)

Shifted mode DEFAULT for ETH_ROUTELOC0

Definition at line 2249 of file efm32gg11b_eth.h.

#define ETH_ROUTELOC0_MIICRSLOC_LOC0   (_ETH_ROUTELOC0_MIICRSLOC_LOC0 << 16)

Shifted mode LOC0 for ETH_ROUTELOC0

Definition at line 2248 of file efm32gg11b_eth.h.

#define ETH_ROUTELOC0_MIICRSLOC_LOC1   (_ETH_ROUTELOC0_MIICRSLOC_LOC1 << 16)

Shifted mode LOC1 for ETH_ROUTELOC0

Definition at line 2250 of file efm32gg11b_eth.h.

#define ETH_ROUTELOC0_MIICRSLOC_LOC2   (_ETH_ROUTELOC0_MIICRSLOC_LOC2 << 16)

Shifted mode LOC2 for ETH_ROUTELOC0

Definition at line 2251 of file efm32gg11b_eth.h.

#define ETH_ROUTELOC0_MIIRXLOC_DEFAULT   (_ETH_ROUTELOC0_MIIRXLOC_DEFAULT << 8)

Shifted mode DEFAULT for ETH_ROUTELOC0

Definition at line 2239 of file efm32gg11b_eth.h.

#define ETH_ROUTELOC0_MIIRXLOC_LOC0   (_ETH_ROUTELOC0_MIIRXLOC_LOC0 << 8)

Shifted mode LOC0 for ETH_ROUTELOC0

Definition at line 2238 of file efm32gg11b_eth.h.

#define ETH_ROUTELOC0_MIIRXLOC_LOC1   (_ETH_ROUTELOC0_MIIRXLOC_LOC1 << 8)

Shifted mode LOC1 for ETH_ROUTELOC0

Definition at line 2240 of file efm32gg11b_eth.h.

#define ETH_ROUTELOC0_MIIRXLOC_LOC2   (_ETH_ROUTELOC0_MIIRXLOC_LOC2 << 8)

Shifted mode LOC2 for ETH_ROUTELOC0

Definition at line 2241 of file efm32gg11b_eth.h.

#define ETH_ROUTELOC0_MIITXLOC_DEFAULT   (_ETH_ROUTELOC0_MIITXLOC_DEFAULT << 0)

Shifted mode DEFAULT for ETH_ROUTELOC0

Definition at line 2230 of file efm32gg11b_eth.h.

#define ETH_ROUTELOC0_MIITXLOC_LOC0   (_ETH_ROUTELOC0_MIITXLOC_LOC0 << 0)

Shifted mode LOC0 for ETH_ROUTELOC0

Definition at line 2229 of file efm32gg11b_eth.h.

#define ETH_ROUTELOC0_MIITXLOC_LOC1   (_ETH_ROUTELOC0_MIITXLOC_LOC1 << 0)

Shifted mode LOC1 for ETH_ROUTELOC0

Definition at line 2231 of file efm32gg11b_eth.h.

#define ETH_ROUTELOC1_MDIOLOC_DEFAULT   (_ETH_ROUTELOC1_MDIOLOC_DEFAULT << 16)

Shifted mode DEFAULT for ETH_ROUTELOC1

Definition at line 2298 of file efm32gg11b_eth.h.

#define ETH_ROUTELOC1_MDIOLOC_LOC0   (_ETH_ROUTELOC1_MDIOLOC_LOC0 << 16)

Shifted mode LOC0 for ETH_ROUTELOC1

Definition at line 2297 of file efm32gg11b_eth.h.

#define ETH_ROUTELOC1_MDIOLOC_LOC1   (_ETH_ROUTELOC1_MDIOLOC_LOC1 << 16)

Shifted mode LOC1 for ETH_ROUTELOC1

Definition at line 2299 of file efm32gg11b_eth.h.

#define ETH_ROUTELOC1_MDIOLOC_LOC2   (_ETH_ROUTELOC1_MDIOLOC_LOC2 << 16)

Shifted mode LOC2 for ETH_ROUTELOC1

Definition at line 2300 of file efm32gg11b_eth.h.

#define ETH_ROUTELOC1_MDIOLOC_LOC3   (_ETH_ROUTELOC1_MDIOLOC_LOC3 << 16)

Shifted mode LOC3 for ETH_ROUTELOC1

Definition at line 2301 of file efm32gg11b_eth.h.

#define ETH_ROUTELOC1_RMIILOC_DEFAULT   (_ETH_ROUTELOC1_RMIILOC_DEFAULT << 24)

Shifted mode DEFAULT for ETH_ROUTELOC1

Definition at line 2308 of file efm32gg11b_eth.h.

#define ETH_ROUTELOC1_RMIILOC_LOC0   (_ETH_ROUTELOC1_RMIILOC_LOC0 << 24)

Shifted mode LOC0 for ETH_ROUTELOC1

Definition at line 2307 of file efm32gg11b_eth.h.

#define ETH_ROUTELOC1_RMIILOC_LOC1   (_ETH_ROUTELOC1_RMIILOC_LOC1 << 24)

Shifted mode LOC1 for ETH_ROUTELOC1

Definition at line 2309 of file efm32gg11b_eth.h.

#define ETH_ROUTELOC1_TSUEXTCLKLOC_DEFAULT   (_ETH_ROUTELOC1_TSUEXTCLKLOC_DEFAULT << 0)

Shifted mode DEFAULT for ETH_ROUTELOC1

Definition at line 2274 of file efm32gg11b_eth.h.

#define ETH_ROUTELOC1_TSUEXTCLKLOC_LOC0   (_ETH_ROUTELOC1_TSUEXTCLKLOC_LOC0 << 0)

Shifted mode LOC0 for ETH_ROUTELOC1

Definition at line 2273 of file efm32gg11b_eth.h.

#define ETH_ROUTELOC1_TSUEXTCLKLOC_LOC1   (_ETH_ROUTELOC1_TSUEXTCLKLOC_LOC1 << 0)

Shifted mode LOC1 for ETH_ROUTELOC1

Definition at line 2275 of file efm32gg11b_eth.h.

#define ETH_ROUTELOC1_TSUEXTCLKLOC_LOC2   (_ETH_ROUTELOC1_TSUEXTCLKLOC_LOC2 << 0)

Shifted mode LOC2 for ETH_ROUTELOC1

Definition at line 2276 of file efm32gg11b_eth.h.

#define ETH_ROUTELOC1_TSUEXTCLKLOC_LOC3   (_ETH_ROUTELOC1_TSUEXTCLKLOC_LOC3 << 0)

Shifted mode LOC3 for ETH_ROUTELOC1

Definition at line 2277 of file efm32gg11b_eth.h.

#define ETH_ROUTELOC1_TSUTMRTOGLOC_DEFAULT   (_ETH_ROUTELOC1_TSUTMRTOGLOC_DEFAULT << 8)

Shifted mode DEFAULT for ETH_ROUTELOC1

Definition at line 2286 of file efm32gg11b_eth.h.

#define ETH_ROUTELOC1_TSUTMRTOGLOC_LOC0   (_ETH_ROUTELOC1_TSUTMRTOGLOC_LOC0 << 8)

Shifted mode LOC0 for ETH_ROUTELOC1

Definition at line 2285 of file efm32gg11b_eth.h.

#define ETH_ROUTELOC1_TSUTMRTOGLOC_LOC1   (_ETH_ROUTELOC1_TSUTMRTOGLOC_LOC1 << 8)

Shifted mode LOC1 for ETH_ROUTELOC1

Definition at line 2287 of file efm32gg11b_eth.h.

#define ETH_ROUTELOC1_TSUTMRTOGLOC_LOC2   (_ETH_ROUTELOC1_TSUTMRTOGLOC_LOC2 << 8)

Shifted mode LOC2 for ETH_ROUTELOC1

Definition at line 2288 of file efm32gg11b_eth.h.

#define ETH_ROUTELOC1_TSUTMRTOGLOC_LOC3   (_ETH_ROUTELOC1_TSUTMRTOGLOC_LOC3 << 8)

Shifted mode LOC3 for ETH_ROUTELOC1

Definition at line 2289 of file efm32gg11b_eth.h.

#define ETH_ROUTEPEN_MDIOPEN   (0x1UL << 0)

MDIO I/O Enable

Definition at line 2166 of file efm32gg11b_eth.h.

#define ETH_ROUTEPEN_MDIOPEN_DEFAULT   (_ETH_ROUTEPEN_MDIOPEN_DEFAULT << 0)

Shifted mode DEFAULT for ETH_ROUTEPEN

Definition at line 2172 of file efm32gg11b_eth.h.

#define ETH_ROUTEPEN_MDIOPEN_DISABLE   (_ETH_ROUTEPEN_MDIOPEN_DISABLE << 0)

Shifted mode DISABLE for ETH_ROUTEPEN

Definition at line 2173 of file efm32gg11b_eth.h.

#define ETH_ROUTEPEN_MDIOPEN_ENABLE   (_ETH_ROUTEPEN_MDIOPEN_ENABLE << 0)

Shifted mode ENABLE for ETH_ROUTEPEN

Definition at line 2174 of file efm32gg11b_eth.h.

#define ETH_ROUTEPEN_MIIPEN   (0x1UL << 3)

MII I/O Enable

Definition at line 2193 of file efm32gg11b_eth.h.

#define ETH_ROUTEPEN_MIIPEN_DEFAULT   (_ETH_ROUTEPEN_MIIPEN_DEFAULT << 3)

Shifted mode DEFAULT for ETH_ROUTEPEN

Definition at line 2199 of file efm32gg11b_eth.h.

#define ETH_ROUTEPEN_MIIPEN_DISABLE   (_ETH_ROUTEPEN_MIIPEN_DISABLE << 3)

Shifted mode DISABLE for ETH_ROUTEPEN

Definition at line 2200 of file efm32gg11b_eth.h.

#define ETH_ROUTEPEN_MIIPEN_ENABLE   (_ETH_ROUTEPEN_MIIPEN_ENABLE << 3)

Shifted mode ENABLE for ETH_ROUTEPEN

Definition at line 2201 of file efm32gg11b_eth.h.

#define ETH_ROUTEPEN_MIIRXERPEN   (0x1UL << 2)

MII TX ER I/O Enable

Definition at line 2184 of file efm32gg11b_eth.h.

#define ETH_ROUTEPEN_MIIRXERPEN_DEFAULT   (_ETH_ROUTEPEN_MIIRXERPEN_DEFAULT << 2)

Shifted mode DEFAULT for ETH_ROUTEPEN

Definition at line 2190 of file efm32gg11b_eth.h.

#define ETH_ROUTEPEN_MIIRXERPEN_DISABLE   (_ETH_ROUTEPEN_MIIRXERPEN_DISABLE << 2)

Shifted mode DISABLE for ETH_ROUTEPEN

Definition at line 2191 of file efm32gg11b_eth.h.

#define ETH_ROUTEPEN_MIIRXERPEN_ENABLE   (_ETH_ROUTEPEN_MIIRXERPEN_ENABLE << 2)

Shifted mode ENABLE for ETH_ROUTEPEN

Definition at line 2192 of file efm32gg11b_eth.h.

#define ETH_ROUTEPEN_MIITXERPEN   (0x1UL << 1)

MII TX ER I/O Enable

Definition at line 2175 of file efm32gg11b_eth.h.

#define ETH_ROUTEPEN_MIITXERPEN_DEFAULT   (_ETH_ROUTEPEN_MIITXERPEN_DEFAULT << 1)

Shifted mode DEFAULT for ETH_ROUTEPEN

Definition at line 2181 of file efm32gg11b_eth.h.

#define ETH_ROUTEPEN_MIITXERPEN_DISABLE   (_ETH_ROUTEPEN_MIITXERPEN_DISABLE << 1)

Shifted mode DISABLE for ETH_ROUTEPEN

Definition at line 2182 of file efm32gg11b_eth.h.

#define ETH_ROUTEPEN_MIITXERPEN_ENABLE   (_ETH_ROUTEPEN_MIITXERPEN_ENABLE << 1)

Shifted mode ENABLE for ETH_ROUTEPEN

Definition at line 2183 of file efm32gg11b_eth.h.

#define ETH_ROUTEPEN_RMIIPEN   (0x1UL << 4)

RMII I/O Enable

Definition at line 2202 of file efm32gg11b_eth.h.

#define ETH_ROUTEPEN_RMIIPEN_DEFAULT   (_ETH_ROUTEPEN_RMIIPEN_DEFAULT << 4)

Shifted mode DEFAULT for ETH_ROUTEPEN

Definition at line 2208 of file efm32gg11b_eth.h.

#define ETH_ROUTEPEN_RMIIPEN_DISABLE   (_ETH_ROUTEPEN_RMIIPEN_DISABLE << 4)

Shifted mode DISABLE for ETH_ROUTEPEN

Definition at line 2209 of file efm32gg11b_eth.h.

#define ETH_ROUTEPEN_RMIIPEN_ENABLE   (_ETH_ROUTEPEN_RMIIPEN_ENABLE << 4)

Shifted mode ENABLE for ETH_ROUTEPEN

Definition at line 2210 of file efm32gg11b_eth.h.

#define ETH_ROUTEPEN_TSUTMRTOGPEN   (0x1UL << 5)

TSU_TMR_CNT_SEC Output Enable

Definition at line 2211 of file efm32gg11b_eth.h.

#define ETH_ROUTEPEN_TSUTMRTOGPEN_DEFAULT   (_ETH_ROUTEPEN_TSUTMRTOGPEN_DEFAULT << 5)

Shifted mode DEFAULT for ETH_ROUTEPEN

Definition at line 2217 of file efm32gg11b_eth.h.

#define ETH_ROUTEPEN_TSUTMRTOGPEN_DISABLE   (_ETH_ROUTEPEN_TSUTMRTOGPEN_DISABLE << 5)

Shifted mode DISABLE for ETH_ROUTEPEN

Definition at line 2218 of file efm32gg11b_eth.h.

#define ETH_ROUTEPEN_TSUTMRTOGPEN_ENABLE   (_ETH_ROUTEPEN_TSUTMRTOGPEN_ENABLE << 5)

Shifted mode ENABLE for ETH_ROUTEPEN

Definition at line 2219 of file efm32gg11b_eth.h.

#define ETH_RXBDCTRL_RXBDTSMODE_DEFAULT   (_ETH_RXBDCTRL_RXBDTSMODE_DEFAULT << 4)

Shifted mode DEFAULT for ETH_RXBDCTRL

Definition at line 2161 of file efm32gg11b_eth.h.

#define ETH_RXIPCKERRS_COUNT_DEFAULT   (_ETH_RXIPCKERRS_COUNT_DEFAULT << 0)

Shifted mode DEFAULT for ETH_RXIPCKERRS

Definition at line 1924 of file efm32gg11b_eth.h.

#define ETH_RXJABBERS_COUNT_DEFAULT   (_ETH_RXJABBERS_COUNT_DEFAULT << 0)

Shifted mode DEFAULT for ETH_RXJABBERS

Definition at line 1868 of file efm32gg11b_eth.h.

#define ETH_RXLENERRS_COUNT_DEFAULT   (_ETH_RXLENERRS_COUNT_DEFAULT << 0)

Shifted mode DEFAULT for ETH_RXLENERRS

Definition at line 1884 of file efm32gg11b_eth.h.

#define ETH_RXLPI_COUNT_DEFAULT   (_ETH_RXLPI_COUNT_DEFAULT << 0)

Shifted mode DEFAULT for ETH_RXLPI

Definition at line 2121 of file efm32gg11b_eth.h.

#define ETH_RXLPITIME_LPITIME_DEFAULT   (_ETH_RXLPITIME_LPITIME_DEFAULT << 0)

Shifted mode DEFAULT for ETH_RXLPITIME

Definition at line 2129 of file efm32gg11b_eth.h.

#define ETH_RXOVERRUNS_COUNT_DEFAULT   (_ETH_RXOVERRUNS_COUNT_DEFAULT << 0)

Shifted mode DEFAULT for ETH_RXOVERRUNS

Definition at line 1916 of file efm32gg11b_eth.h.

#define ETH_RXPAUSEQUANT_QUANT_DEFAULT   (_ETH_RXPAUSEQUANT_QUANT_DEFAULT << 0)

Shifted mode DEFAULT for ETH_RXPAUSEQUANT

Definition at line 1185 of file efm32gg11b_eth.h.

#define ETH_RXPTPUNICAST_ADDR_DEFAULT   (_ETH_RXPTPUNICAST_ADDR_DEFAULT << 0)

Shifted mode DEFAULT for ETH_RXPTPUNICAST

Definition at line 1516 of file efm32gg11b_eth.h.

#define ETH_RXQPTR_DMARXQPTR_DEFAULT   (_ETH_RXQPTR_DMARXQPTR_DEFAULT << 2)

Shifted mode DEFAULT for ETH_RXQPTR

Definition at line 590 of file efm32gg11b_eth.h.

#define ETH_RXRESOURCEERRS_COUNT_DEFAULT   (_ETH_RXRESOURCEERRS_COUNT_DEFAULT << 0)

Shifted mode DEFAULT for ETH_RXRESOURCEERRS

Definition at line 1908 of file efm32gg11b_eth.h.

#define ETH_RXSTATUS_BUFFNOTAVAIL   (0x1UL << 0)

Buffer not available

Definition at line 603 of file efm32gg11b_eth.h.

#define ETH_RXSTATUS_BUFFNOTAVAIL_DEFAULT   (_ETH_RXSTATUS_BUFFNOTAVAIL_DEFAULT << 0)

Shifted mode DEFAULT for ETH_RXSTATUS

Definition at line 607 of file efm32gg11b_eth.h.

#define ETH_RXSTATUS_FRMRX   (0x1UL << 1)

Frame received

Definition at line 608 of file efm32gg11b_eth.h.

#define ETH_RXSTATUS_FRMRX_DEFAULT   (_ETH_RXSTATUS_FRMRX_DEFAULT << 1)

Shifted mode DEFAULT for ETH_RXSTATUS

Definition at line 612 of file efm32gg11b_eth.h.

#define ETH_RXSTATUS_RESPNOTOK   (0x1UL << 3)

bresp/hresp not OK

Definition at line 618 of file efm32gg11b_eth.h.

#define ETH_RXSTATUS_RESPNOTOK_DEFAULT   (_ETH_RXSTATUS_RESPNOTOK_DEFAULT << 3)

Shifted mode DEFAULT for ETH_RXSTATUS

Definition at line 622 of file efm32gg11b_eth.h.

#define ETH_RXSTATUS_RXOVERRUN   (0x1UL << 2)

Receive overrun

Definition at line 613 of file efm32gg11b_eth.h.

#define ETH_RXSTATUS_RXOVERRUN_DEFAULT   (_ETH_RXSTATUS_RXOVERRUN_DEFAULT << 2)

Shifted mode DEFAULT for ETH_RXSTATUS

Definition at line 617 of file efm32gg11b_eth.h.

#define ETH_RXSYMBOLERRS_COUNT_DEFAULT   (_ETH_RXSYMBOLERRS_COUNT_DEFAULT << 0)

Shifted mode DEFAULT for ETH_RXSYMBOLERRS

Definition at line 1892 of file efm32gg11b_eth.h.

#define ETH_RXTCPCKERRS_COUNT_DEFAULT   (_ETH_RXTCPCKERRS_COUNT_DEFAULT << 0)

Shifted mode DEFAULT for ETH_RXTCPCKERRS

Definition at line 1932 of file efm32gg11b_eth.h.

#define ETH_RXUDPCKERRS_COUNT_DEFAULT   (_ETH_RXUDPCKERRS_COUNT_DEFAULT << 0)

Shifted mode DEFAULT for ETH_RXUDPCKERRS

Definition at line 1940 of file efm32gg11b_eth.h.

#define ETH_SINGLECOLS_COUNT_DEFAULT   (_ETH_SINGLECOLS_COUNT_DEFAULT << 0)

Shifted mode DEFAULT for ETH_SINGLECOLS

Definition at line 1700 of file efm32gg11b_eth.h.

#define ETH_SPECADDR1BOTTOM_ADDR_DEFAULT   (_ETH_SPECADDR1BOTTOM_ADDR_DEFAULT << 0)

Shifted mode DEFAULT for ETH_SPECADDR1BOTTOM

Definition at line 1275 of file efm32gg11b_eth.h.

#define ETH_SPECADDR1TOP_ADDR_DEFAULT   (_ETH_SPECADDR1TOP_ADDR_DEFAULT << 0)

Shifted mode DEFAULT for ETH_SPECADDR1TOP

Definition at line 1283 of file efm32gg11b_eth.h.

#define ETH_SPECADDR1TOP_FILTERTYPE   (0x1UL << 16)

MAC SA or DA selection

Definition at line 1284 of file efm32gg11b_eth.h.

#define ETH_SPECADDR1TOP_FILTERTYPE_DA   (_ETH_SPECADDR1TOP_FILTERTYPE_DA << 16)

Shifted mode DA for ETH_SPECADDR1TOP

Definition at line 1291 of file efm32gg11b_eth.h.

#define ETH_SPECADDR1TOP_FILTERTYPE_DEFAULT   (_ETH_SPECADDR1TOP_FILTERTYPE_DEFAULT << 16)

Shifted mode DEFAULT for ETH_SPECADDR1TOP

Definition at line 1290 of file efm32gg11b_eth.h.

#define ETH_SPECADDR1TOP_FILTERTYPE_SA   (_ETH_SPECADDR1TOP_FILTERTYPE_SA << 16)

Shifted mode SA for ETH_SPECADDR1TOP

Definition at line 1292 of file efm32gg11b_eth.h.

#define ETH_SPECADDR2BOTTOM_ADDR_DEFAULT   (_ETH_SPECADDR2BOTTOM_ADDR_DEFAULT << 0)

Shifted mode DEFAULT for ETH_SPECADDR2BOTTOM

Definition at line 1300 of file efm32gg11b_eth.h.

#define ETH_SPECADDR2TOP_ADDR_DEFAULT   (_ETH_SPECADDR2TOP_ADDR_DEFAULT << 0)

Shifted mode DEFAULT for ETH_SPECADDR2TOP

Definition at line 1308 of file efm32gg11b_eth.h.

#define ETH_SPECADDR2TOP_FILTERBYTEMASK_DEFAULT   (_ETH_SPECADDR2TOP_FILTERBYTEMASK_DEFAULT << 24)

Shifted mode DEFAULT for ETH_SPECADDR2TOP

Definition at line 1321 of file efm32gg11b_eth.h.

#define ETH_SPECADDR2TOP_FILTERTYPE   (0x1UL << 16)

MAC SA or DA selection

Definition at line 1309 of file efm32gg11b_eth.h.

#define ETH_SPECADDR2TOP_FILTERTYPE_DA   (_ETH_SPECADDR2TOP_FILTERTYPE_DA << 16)

Shifted mode DA for ETH_SPECADDR2TOP

Definition at line 1316 of file efm32gg11b_eth.h.

#define ETH_SPECADDR2TOP_FILTERTYPE_DEFAULT   (_ETH_SPECADDR2TOP_FILTERTYPE_DEFAULT << 16)

Shifted mode DEFAULT for ETH_SPECADDR2TOP

Definition at line 1315 of file efm32gg11b_eth.h.

#define ETH_SPECADDR2TOP_FILTERTYPE_SA   (_ETH_SPECADDR2TOP_FILTERTYPE_SA << 16)

Shifted mode SA for ETH_SPECADDR2TOP

Definition at line 1317 of file efm32gg11b_eth.h.

#define ETH_SPECADDR3BOTTOM_ADDR_DEFAULT   (_ETH_SPECADDR3BOTTOM_ADDR_DEFAULT << 0)

Shifted mode DEFAULT for ETH_SPECADDR3BOTTOM

Definition at line 1329 of file efm32gg11b_eth.h.

#define ETH_SPECADDR3TOP_ADDR_DEFAULT   (_ETH_SPECADDR3TOP_ADDR_DEFAULT << 0)

Shifted mode DEFAULT for ETH_SPECADDR3TOP

Definition at line 1337 of file efm32gg11b_eth.h.

#define ETH_SPECADDR3TOP_FILTERBYTEMASK_DEFAULT   (_ETH_SPECADDR3TOP_FILTERBYTEMASK_DEFAULT << 24)

Shifted mode DEFAULT for ETH_SPECADDR3TOP

Definition at line 1350 of file efm32gg11b_eth.h.

#define ETH_SPECADDR3TOP_FILTERTYPE   (0x1UL << 16)

MAC SA or DA selection

Definition at line 1338 of file efm32gg11b_eth.h.

#define ETH_SPECADDR3TOP_FILTERTYPE_DA   (_ETH_SPECADDR3TOP_FILTERTYPE_DA << 16)

Shifted mode DA for ETH_SPECADDR3TOP

Definition at line 1345 of file efm32gg11b_eth.h.

#define ETH_SPECADDR3TOP_FILTERTYPE_DEFAULT   (_ETH_SPECADDR3TOP_FILTERTYPE_DEFAULT << 16)

Shifted mode DEFAULT for ETH_SPECADDR3TOP

Definition at line 1344 of file efm32gg11b_eth.h.

#define ETH_SPECADDR3TOP_FILTERTYPE_SA   (_ETH_SPECADDR3TOP_FILTERTYPE_SA << 16)

Shifted mode SA for ETH_SPECADDR3TOP

Definition at line 1346 of file efm32gg11b_eth.h.

#define ETH_SPECADDR4BOTTOM_ADDR_DEFAULT   (_ETH_SPECADDR4BOTTOM_ADDR_DEFAULT << 0)

Shifted mode DEFAULT for ETH_SPECADDR4BOTTOM

Definition at line 1358 of file efm32gg11b_eth.h.

#define ETH_SPECADDR4TOP_ADDR_DEFAULT   (_ETH_SPECADDR4TOP_ADDR_DEFAULT << 0)

Shifted mode DEFAULT for ETH_SPECADDR4TOP

Definition at line 1366 of file efm32gg11b_eth.h.

#define ETH_SPECADDR4TOP_FILTERBYTEMASK_DEFAULT   (_ETH_SPECADDR4TOP_FILTERBYTEMASK_DEFAULT << 24)

Shifted mode DEFAULT for ETH_SPECADDR4TOP

Definition at line 1379 of file efm32gg11b_eth.h.

#define ETH_SPECADDR4TOP_FILTERTYPE   (0x1UL << 16)

MAC SA or DA selection

Definition at line 1367 of file efm32gg11b_eth.h.

#define ETH_SPECADDR4TOP_FILTERTYPE_DA   (_ETH_SPECADDR4TOP_FILTERTYPE_DA << 16)

Shifted mode DA for ETH_SPECADDR4TOP

Definition at line 1374 of file efm32gg11b_eth.h.

#define ETH_SPECADDR4TOP_FILTERTYPE_DEFAULT   (_ETH_SPECADDR4TOP_FILTERTYPE_DEFAULT << 16)

Shifted mode DEFAULT for ETH_SPECADDR4TOP

Definition at line 1373 of file efm32gg11b_eth.h.

#define ETH_SPECADDR4TOP_FILTERTYPE_SA   (_ETH_SPECADDR4TOP_FILTERTYPE_SA << 16)

Shifted mode SA for ETH_SPECADDR4TOP

Definition at line 1375 of file efm32gg11b_eth.h.

#define ETH_SPECTYPE1_ENBCOPY   (0x1UL << 31)

Enable copying of type ID match 1 matched frames.

Definition at line 1388 of file efm32gg11b_eth.h.

#define ETH_SPECTYPE1_ENBCOPY_DEFAULT   (_ETH_SPECTYPE1_ENBCOPY_DEFAULT << 31)

Shifted mode DEFAULT for ETH_SPECTYPE1

Definition at line 1392 of file efm32gg11b_eth.h.

#define ETH_SPECTYPE1_MATCH_DEFAULT   (_ETH_SPECTYPE1_MATCH_DEFAULT << 0)

Shifted mode DEFAULT for ETH_SPECTYPE1

Definition at line 1387 of file efm32gg11b_eth.h.

#define ETH_SPECTYPE2_ENBCOPY   (0x1UL << 31)

Enable copying of type ID match 2 matched frames.

Definition at line 1401 of file efm32gg11b_eth.h.

#define ETH_SPECTYPE2_ENBCOPY_DEFAULT   (_ETH_SPECTYPE2_ENBCOPY_DEFAULT << 31)

Shifted mode DEFAULT for ETH_SPECTYPE2

Definition at line 1405 of file efm32gg11b_eth.h.

#define ETH_SPECTYPE2_MATCH_DEFAULT   (_ETH_SPECTYPE2_MATCH_DEFAULT << 0)

Shifted mode DEFAULT for ETH_SPECTYPE2

Definition at line 1400 of file efm32gg11b_eth.h.

#define ETH_SPECTYPE3_ENBCOPY   (0x1UL << 31)

Enable copying of type ID match 3 matched frames.

Definition at line 1414 of file efm32gg11b_eth.h.

#define ETH_SPECTYPE3_ENBCOPY_DEFAULT   (_ETH_SPECTYPE3_ENBCOPY_DEFAULT << 31)

Shifted mode DEFAULT for ETH_SPECTYPE3

Definition at line 1418 of file efm32gg11b_eth.h.

#define ETH_SPECTYPE3_MATCH_DEFAULT   (_ETH_SPECTYPE3_MATCH_DEFAULT << 0)

Shifted mode DEFAULT for ETH_SPECTYPE3

Definition at line 1413 of file efm32gg11b_eth.h.

#define ETH_SPECTYPE4_ENBCOPY   (0x1UL << 31)

Enable copying of type ID match 4 matched frames.

Definition at line 1427 of file efm32gg11b_eth.h.

#define ETH_SPECTYPE4_ENBCOPY_DEFAULT   (_ETH_SPECTYPE4_ENBCOPY_DEFAULT << 31)

Shifted mode DEFAULT for ETH_SPECTYPE4

Definition at line 1431 of file efm32gg11b_eth.h.

#define ETH_SPECTYPE4_MATCH_DEFAULT   (_ETH_SPECTYPE4_MATCH_DEFAULT << 0)

Shifted mode DEFAULT for ETH_SPECTYPE4

Definition at line 1426 of file efm32gg11b_eth.h.

#define ETH_STACKEDVLAN_ENBPROCESSING   (0x1UL << 31)

Enable stacked VLAN processing mode

Definition at line 1476 of file efm32gg11b_eth.h.

#define ETH_STACKEDVLAN_ENBPROCESSING_DEFAULT   (_ETH_STACKEDVLAN_ENBPROCESSING_DEFAULT << 31)

Shifted mode DEFAULT for ETH_STACKEDVLAN

Definition at line 1480 of file efm32gg11b_eth.h.

#define ETH_STACKEDVLAN_MATCH_DEFAULT   (_ETH_STACKEDVLAN_MATCH_DEFAULT << 0)

Shifted mode DEFAULT for ETH_STACKEDVLAN

Definition at line 1475 of file efm32gg11b_eth.h.

#define ETH_STRETCHRATIO_IPGSTRETCH_DEFAULT   (_ETH_STRETCHRATIO_IPGSTRETCH_DEFAULT << 0)

Shifted mode DEFAULT for ETH_STRETCHRATIO

Definition at line 1467 of file efm32gg11b_eth.h.

#define ETH_SYSWAKETIME_SYSWAKETIME_DEFAULT   (_ETH_SYSWAKETIME_SYSWAKETIME_DEFAULT << 0)

Shifted mode DEFAULT for ETH_SYSWAKETIME

Definition at line 1251 of file efm32gg11b_eth.h.

#define ETH_TSUMSBSECCMP_COMPVAL_DEFAULT   (_ETH_TSUMSBSECCMP_COMPVAL_DEFAULT << 0)

Shifted mode DEFAULT for ETH_TSUMSBSECCMP

Definition at line 1548 of file efm32gg11b_eth.h.

#define ETH_TSUNSECCMP_COMPVAL_DEFAULT   (_ETH_TSUNSECCMP_COMPVAL_DEFAULT << 0)

Shifted mode DEFAULT for ETH_TSUNSECCMP

Definition at line 1532 of file efm32gg11b_eth.h.

#define ETH_TSUPEERRXMSBSEC_TIMERSEC_DEFAULT   (_ETH_TSUPEERRXMSBSEC_TIMERSEC_DEFAULT << 0)

Shifted mode DEFAULT for ETH_TSUPEERRXMSBSEC

Definition at line 1580 of file efm32gg11b_eth.h.

#define ETH_TSUPEERRXNSEC_TIMER_DEFAULT   (_ETH_TSUPEERRXNSEC_TIMER_DEFAULT << 0)

Shifted mode DEFAULT for ETH_TSUPEERRXNSEC

Definition at line 2077 of file efm32gg11b_eth.h.

#define ETH_TSUPEERRXSEC_TIMER_DEFAULT   (_ETH_TSUPEERRXSEC_TIMER_DEFAULT << 0)

Shifted mode DEFAULT for ETH_TSUPEERRXSEC

Definition at line 2069 of file efm32gg11b_eth.h.

#define ETH_TSUPEERTXMSBSEC_TIMERSEC_DEFAULT   (_ETH_TSUPEERTXMSBSEC_TIMERSEC_DEFAULT << 0)

Shifted mode DEFAULT for ETH_TSUPEERTXMSBSEC

Definition at line 1572 of file efm32gg11b_eth.h.

#define ETH_TSUPEERTXNSEC_TIMER_DEFAULT   (_ETH_TSUPEERTXNSEC_TIMER_DEFAULT << 0)

Shifted mode DEFAULT for ETH_TSUPEERTXNSEC

Definition at line 2061 of file efm32gg11b_eth.h.

#define ETH_TSUPEERTXSEC_TIMER_DEFAULT   (_ETH_TSUPEERTXSEC_TIMER_DEFAULT << 0)

Shifted mode DEFAULT for ETH_TSUPEERTXSEC

Definition at line 2053 of file efm32gg11b_eth.h.

#define ETH_TSUPTPRXMSBSEC_TIMERSEC_DEFAULT   (_ETH_TSUPTPRXMSBSEC_TIMERSEC_DEFAULT << 0)

Shifted mode DEFAULT for ETH_TSUPTPRXMSBSEC

Definition at line 1564 of file efm32gg11b_eth.h.

#define ETH_TSUPTPRXNSEC_TIMER_DEFAULT   (_ETH_TSUPTPRXNSEC_TIMER_DEFAULT << 0)

Shifted mode DEFAULT for ETH_TSUPTPRXNSEC

Definition at line 2045 of file efm32gg11b_eth.h.

#define ETH_TSUPTPRXSEC_TIMER_DEFAULT   (_ETH_TSUPTPRXSEC_TIMER_DEFAULT << 0)

Shifted mode DEFAULT for ETH_TSUPTPRXSEC

Definition at line 2037 of file efm32gg11b_eth.h.

#define ETH_TSUPTPTXMSBSEC_TIMERSEC_DEFAULT   (_ETH_TSUPTPTXMSBSEC_TIMERSEC_DEFAULT << 0)

Shifted mode DEFAULT for ETH_TSUPTPTXMSBSEC

Definition at line 1556 of file efm32gg11b_eth.h.

#define ETH_TSUPTPTXNSEC_TIMER_DEFAULT   (_ETH_TSUPTPTXNSEC_TIMER_DEFAULT << 0)

Shifted mode DEFAULT for ETH_TSUPTPTXNSEC

Definition at line 2029 of file efm32gg11b_eth.h.

#define ETH_TSUPTPTXSEC_TIMER_DEFAULT   (_ETH_TSUPTPTXSEC_TIMER_DEFAULT << 0)

Shifted mode DEFAULT for ETH_TSUPTPTXSEC

Definition at line 2021 of file efm32gg11b_eth.h.

#define ETH_TSUSECCMP_COMPVAL_DEFAULT   (_ETH_TSUSECCMP_COMPVAL_DEFAULT << 0)

Shifted mode DEFAULT for ETH_TSUSECCMP

Definition at line 1540 of file efm32gg11b_eth.h.

#define ETH_TSUTIMERADJUST_ADDSUBTRACT   (0x1UL << 31)

Write as one to subtract from the 1588 timer

Definition at line 1993 of file efm32gg11b_eth.h.

#define ETH_TSUTIMERADJUST_ADDSUBTRACT_DEFAULT   (_ETH_TSUTIMERADJUST_ADDSUBTRACT_DEFAULT << 31)

Shifted mode DEFAULT for ETH_TSUTIMERADJUST

Definition at line 1997 of file efm32gg11b_eth.h.

#define ETH_TSUTIMERADJUST_INCREMENTVAL_DEFAULT   (_ETH_TSUTIMERADJUST_INCREMENTVAL_DEFAULT << 0)

Shifted mode DEFAULT for ETH_TSUTIMERADJUST

Definition at line 1992 of file efm32gg11b_eth.h.

#define ETH_TSUTIMERINCR_ALTNSINCR_DEFAULT   (_ETH_TSUTIMERINCR_ALTNSINCR_DEFAULT << 8)

Shifted mode DEFAULT for ETH_TSUTIMERINCR

Definition at line 2009 of file efm32gg11b_eth.h.

#define ETH_TSUTIMERINCR_NSINCREMENT_DEFAULT   (_ETH_TSUTIMERINCR_NSINCREMENT_DEFAULT << 0)

Shifted mode DEFAULT for ETH_TSUTIMERINCR

Definition at line 2005 of file efm32gg11b_eth.h.

#define ETH_TSUTIMERINCR_NUMINCS_DEFAULT   (_ETH_TSUTIMERINCR_NUMINCS_DEFAULT << 16)

Shifted mode DEFAULT for ETH_TSUTIMERINCR

Definition at line 2013 of file efm32gg11b_eth.h.

#define ETH_TSUTIMERINCRSUBNSEC_SUBNSINCR_DEFAULT   (_ETH_TSUTIMERINCRSUBNSEC_SUBNSINCR_DEFAULT << 0)

Shifted mode DEFAULT for ETH_TSUTIMERINCRSUBNSEC

Definition at line 1956 of file efm32gg11b_eth.h.

#define ETH_TSUTIMERINCRSUBNSEC_SUBNSINCRLSB_DEFAULT   (_ETH_TSUTIMERINCRSUBNSEC_SUBNSINCRLSB_DEFAULT << 24)

Shifted mode DEFAULT for ETH_TSUTIMERINCRSUBNSEC

Definition at line 1960 of file efm32gg11b_eth.h.

#define ETH_TSUTIMERMSBSEC_TIMER_DEFAULT   (_ETH_TSUTIMERMSBSEC_TIMER_DEFAULT << 0)

Shifted mode DEFAULT for ETH_TSUTIMERMSBSEC

Definition at line 1968 of file efm32gg11b_eth.h.

#define ETH_TSUTIMERNSEC_TIMER_DEFAULT   (_ETH_TSUTIMERNSEC_TIMER_DEFAULT << 0)

Shifted mode DEFAULT for ETH_TSUTIMERNSEC

Definition at line 1984 of file efm32gg11b_eth.h.

#define ETH_TSUTIMERSEC_TIMER_DEFAULT   (_ETH_TSUTIMERSEC_TIMER_DEFAULT << 0)

Shifted mode DEFAULT for ETH_TSUTIMERSEC

Definition at line 1976 of file efm32gg11b_eth.h.

#define ETH_TXBDCTRL_TXBDTSMODE_DEFAULT   (_ETH_TXBDCTRL_TXBDTSMODE_DEFAULT << 4)

Shifted mode DEFAULT for ETH_TXBDCTRL

Definition at line 2153 of file efm32gg11b_eth.h.

#define ETH_TXLPI_COUNT_DEFAULT   (_ETH_TXLPI_COUNT_DEFAULT << 0)

Shifted mode DEFAULT for ETH_TXLPI

Definition at line 2137 of file efm32gg11b_eth.h.

#define ETH_TXLPITIME_LPITIME_DEFAULT   (_ETH_TXLPITIME_LPITIME_DEFAULT << 0)

Shifted mode DEFAULT for ETH_TXLPITIME

Definition at line 2145 of file efm32gg11b_eth.h.

#define ETH_TXPAUSEQUANT1_QUANTP2_DEFAULT   (_ETH_TXPAUSEQUANT1_QUANTP2_DEFAULT << 0)

Shifted mode DEFAULT for ETH_TXPAUSEQUANT1

Definition at line 2085 of file efm32gg11b_eth.h.

#define ETH_TXPAUSEQUANT1_QUANTP3_DEFAULT   (_ETH_TXPAUSEQUANT1_QUANTP3_DEFAULT << 16)

Shifted mode DEFAULT for ETH_TXPAUSEQUANT1

Definition at line 2089 of file efm32gg11b_eth.h.

#define ETH_TXPAUSEQUANT2_QUANTP4_DEFAULT   (_ETH_TXPAUSEQUANT2_QUANTP4_DEFAULT << 0)

Shifted mode DEFAULT for ETH_TXPAUSEQUANT2

Definition at line 2097 of file efm32gg11b_eth.h.

#define ETH_TXPAUSEQUANT2_QUANTP5_DEFAULT   (_ETH_TXPAUSEQUANT2_QUANTP5_DEFAULT << 16)

Shifted mode DEFAULT for ETH_TXPAUSEQUANT2

Definition at line 2101 of file efm32gg11b_eth.h.

#define ETH_TXPAUSEQUANT3_QUANTP6_DEFAULT   (_ETH_TXPAUSEQUANT3_QUANTP6_DEFAULT << 0)

Shifted mode DEFAULT for ETH_TXPAUSEQUANT3

Definition at line 2109 of file efm32gg11b_eth.h.

#define ETH_TXPAUSEQUANT3_QUANTP7_DEFAULT   (_ETH_TXPAUSEQUANT3_QUANTP7_DEFAULT << 16)

Shifted mode DEFAULT for ETH_TXPAUSEQUANT3

Definition at line 2113 of file efm32gg11b_eth.h.

#define ETH_TXPAUSEQUANT_QUANT_DEFAULT   (_ETH_TXPAUSEQUANT_QUANT_DEFAULT << 0)

Shifted mode DEFAULT for ETH_TXPAUSEQUANT

Definition at line 1193 of file efm32gg11b_eth.h.

#define ETH_TXPAUSEQUANT_QUANTP1_DEFAULT   (_ETH_TXPAUSEQUANT_QUANTP1_DEFAULT << 16)

Shifted mode DEFAULT for ETH_TXPAUSEQUANT

Definition at line 1197 of file efm32gg11b_eth.h.

#define ETH_TXPFCPAUSE_VECTOR_DEFAULT   (_ETH_TXPFCPAUSE_VECTOR_DEFAULT << 8)

Shifted mode DEFAULT for ETH_TXPFCPAUSE

Definition at line 1492 of file efm32gg11b_eth.h.

#define ETH_TXPFCPAUSE_VECTORENB_DEFAULT   (_ETH_TXPFCPAUSE_VECTORENB_DEFAULT << 0)

Shifted mode DEFAULT for ETH_TXPFCPAUSE

Definition at line 1488 of file efm32gg11b_eth.h.

#define ETH_TXPTPUNICAST_ADDR_DEFAULT   (_ETH_TXPTPUNICAST_ADDR_DEFAULT << 0)

Shifted mode DEFAULT for ETH_TXPTPUNICAST

Definition at line 1524 of file efm32gg11b_eth.h.

#define ETH_TXQPTR_DMATXQPTR_DEFAULT   (_ETH_TXQPTR_DMATXQPTR_DEFAULT << 2)

Shifted mode DEFAULT for ETH_TXQPTR

Definition at line 598 of file efm32gg11b_eth.h.

#define ETH_TXSTATUS_AMBAERR   (0x1UL << 4)

Transmit frame corruption due to AMBA (AHB) errors.

Definition at line 558 of file efm32gg11b_eth.h.

#define ETH_TXSTATUS_AMBAERR_DEFAULT   (_ETH_TXSTATUS_AMBAERR_DEFAULT << 4)

Shifted mode DEFAULT for ETH_TXSTATUS

Definition at line 562 of file efm32gg11b_eth.h.

#define ETH_TXSTATUS_COLOCCRD   (0x1UL << 1)

Collision occurred

Definition at line 543 of file efm32gg11b_eth.h.

#define ETH_TXSTATUS_COLOCCRD_DEFAULT   (_ETH_TXSTATUS_COLOCCRD_DEFAULT << 1)

Shifted mode DEFAULT for ETH_TXSTATUS

Definition at line 547 of file efm32gg11b_eth.h.

#define ETH_TXSTATUS_LATECOLOCCRD   (0x1UL << 7)

Late collision occurred

Definition at line 573 of file efm32gg11b_eth.h.

#define ETH_TXSTATUS_LATECOLOCCRD_DEFAULT   (_ETH_TXSTATUS_LATECOLOCCRD_DEFAULT << 7)

Shifted mode DEFAULT for ETH_TXSTATUS

Definition at line 577 of file efm32gg11b_eth.h.

#define ETH_TXSTATUS_RESPNOTOK   (0x1UL << 8)

bresp/hresp not OK

Definition at line 578 of file efm32gg11b_eth.h.

#define ETH_TXSTATUS_RESPNOTOK_DEFAULT   (_ETH_TXSTATUS_RESPNOTOK_DEFAULT << 8)

Shifted mode DEFAULT for ETH_TXSTATUS

Definition at line 582 of file efm32gg11b_eth.h.

#define ETH_TXSTATUS_RETRYLMTEXCD   (0x1UL << 2)

Retry limit exceeded

Definition at line 548 of file efm32gg11b_eth.h.

#define ETH_TXSTATUS_RETRYLMTEXCD_DEFAULT   (_ETH_TXSTATUS_RETRYLMTEXCD_DEFAULT << 2)

Shifted mode DEFAULT for ETH_TXSTATUS

Definition at line 552 of file efm32gg11b_eth.h.

#define ETH_TXSTATUS_TXCMPLT   (0x1UL << 5)

Transmit complete

Definition at line 563 of file efm32gg11b_eth.h.

#define ETH_TXSTATUS_TXCMPLT_DEFAULT   (_ETH_TXSTATUS_TXCMPLT_DEFAULT << 5)

Shifted mode DEFAULT for ETH_TXSTATUS

Definition at line 567 of file efm32gg11b_eth.h.

#define ETH_TXSTATUS_TXGO   (0x1UL << 3)

Transmit go

Definition at line 553 of file efm32gg11b_eth.h.

#define ETH_TXSTATUS_TXGO_DEFAULT   (_ETH_TXSTATUS_TXGO_DEFAULT << 3)

Shifted mode DEFAULT for ETH_TXSTATUS

Definition at line 557 of file efm32gg11b_eth.h.

#define ETH_TXSTATUS_TXUNDERRUN   (0x1UL << 6)

Transmit under run

Definition at line 568 of file efm32gg11b_eth.h.

#define ETH_TXSTATUS_TXUNDERRUN_DEFAULT   (_ETH_TXSTATUS_TXUNDERRUN_DEFAULT << 6)

Shifted mode DEFAULT for ETH_TXSTATUS

Definition at line 572 of file efm32gg11b_eth.h.

#define ETH_TXSTATUS_USEDBITREAD   (0x1UL << 0)

Used bit read

Definition at line 538 of file efm32gg11b_eth.h.

#define ETH_TXSTATUS_USEDBITREAD_DEFAULT   (_ETH_TXSTATUS_USEDBITREAD_DEFAULT << 0)

Shifted mode DEFAULT for ETH_TXSTATUS

Definition at line 542 of file efm32gg11b_eth.h.

#define ETH_TXUNDERRUNS_COUNT_DEFAULT   (_ETH_TXUNDERRUNS_COUNT_DEFAULT << 0)

Shifted mode DEFAULT for ETH_TXUNDERRUNS

Definition at line 1692 of file efm32gg11b_eth.h.

#define ETH_UNDERSIZEFRAMES_COUNT_DEFAULT   (_ETH_UNDERSIZEFRAMES_COUNT_DEFAULT << 0)

Shifted mode DEFAULT for ETH_UNDERSIZEFRAMES

Definition at line 1852 of file efm32gg11b_eth.h.

#define ETH_WOLREG_ADDR_DEFAULT   (_ETH_WOLREG_ADDR_DEFAULT << 0)

Shifted mode DEFAULT for ETH_WOLREG

Definition at line 1439 of file efm32gg11b_eth.h.

#define ETH_WOLREG_WOLMASK0   (0x1UL << 16)

Wake on LAN magic packet event enable

Definition at line 1440 of file efm32gg11b_eth.h.

#define ETH_WOLREG_WOLMASK0_DEFAULT   (_ETH_WOLREG_WOLMASK0_DEFAULT << 16)

Shifted mode DEFAULT for ETH_WOLREG

Definition at line 1444 of file efm32gg11b_eth.h.

#define ETH_WOLREG_WOLMASK1   (0x1UL << 17)

Wake on LAN ARP request event enable

Definition at line 1445 of file efm32gg11b_eth.h.

#define ETH_WOLREG_WOLMASK1_DEFAULT   (_ETH_WOLREG_WOLMASK1_DEFAULT << 17)

Shifted mode DEFAULT for ETH_WOLREG

Definition at line 1449 of file efm32gg11b_eth.h.

#define ETH_WOLREG_WOLMASK2   (0x1UL << 18)

Wake on LAN specific address register 1 event enable

Definition at line 1450 of file efm32gg11b_eth.h.

#define ETH_WOLREG_WOLMASK2_DEFAULT   (_ETH_WOLREG_WOLMASK2_DEFAULT << 18)

Shifted mode DEFAULT for ETH_WOLREG

Definition at line 1454 of file efm32gg11b_eth.h.

#define ETH_WOLREG_WOLMASK3   (0x1UL << 19)

Wake on LAN multicast hash event enable

Definition at line 1455 of file efm32gg11b_eth.h.

#define ETH_WOLREG_WOLMASK3_DEFAULT   (_ETH_WOLREG_WOLMASK3_DEFAULT << 19)

Shifted mode DEFAULT for ETH_WOLREG

Definition at line 1459 of file efm32gg11b_eth.h.