CoreDevices > EFM32GG11B820F2048GL192

Detailed Description

Processor and Core Peripheral Section.

Macros

#define __FPU_PRESENT   1
 
#define __MPU_PRESENT   1
 
#define __NVIC_PRIO_BITS   3
 
#define __Vendor_SysTickConfig   0
 
#define __VTOR_PRESENT   1
 

Macro Definition Documentation

#define __FPU_PRESENT   1

Presence of FPU

Definition at line 148 of file efm32gg11b820f2048gl192.h.

#define __MPU_PRESENT   1

Presence of MPU

Definition at line 147 of file efm32gg11b820f2048gl192.h.

#define __NVIC_PRIO_BITS   3

NVIC interrupt priority bits

Definition at line 150 of file efm32gg11b820f2048gl192.h.

Referenced by CORE_AtomicDisableIrq(), CORE_EnterAtomic(), CORE_IrqIsBlocked(), CORE_IrqIsDisabled(), CORE_YieldAtomic(), and LDMA_Init().

#define __Vendor_SysTickConfig   0

Is 1 if different SysTick counter is used

Definition at line 151 of file efm32gg11b820f2048gl192.h.

#define __VTOR_PRESENT   1

Presence of VTOR register in SCB

Definition at line 149 of file efm32gg11b820f2048gl192.h.