Macros
#define	_CMU_ADCCTRL_ADC0CLKDIV_DEFAULT 0x00000000UL

#define	_CMU_ADCCTRL_ADC0CLKDIV_MASK 0x3UL

#define	_CMU_ADCCTRL_ADC0CLKDIV_NODIVISION 0x00000000UL

#define	_CMU_ADCCTRL_ADC0CLKDIV_SHIFT 0

#define	_CMU_ADCCTRL_ADC0CLKINV_DEFAULT 0x00000000UL

#define	_CMU_ADCCTRL_ADC0CLKINV_MASK 0x100UL

#define	_CMU_ADCCTRL_ADC0CLKINV_SHIFT 8

#define	_CMU_ADCCTRL_ADC0CLKSEL_AUXHFRCO 0x00000001UL

#define	_CMU_ADCCTRL_ADC0CLKSEL_DEFAULT 0x00000000UL

#define	_CMU_ADCCTRL_ADC0CLKSEL_DISABLED 0x00000000UL

#define	_CMU_ADCCTRL_ADC0CLKSEL_HFSRCCLK 0x00000003UL

#define	_CMU_ADCCTRL_ADC0CLKSEL_HFXO 0x00000002UL

#define	_CMU_ADCCTRL_ADC0CLKSEL_MASK 0x30UL

#define	_CMU_ADCCTRL_ADC0CLKSEL_SHIFT 4

#define	_CMU_ADCCTRL_ADC1CLKDIV_DEFAULT 0x00000000UL

#define	_CMU_ADCCTRL_ADC1CLKDIV_MASK 0x30000UL

#define	_CMU_ADCCTRL_ADC1CLKDIV_NODIVISION 0x00000000UL

#define	_CMU_ADCCTRL_ADC1CLKDIV_SHIFT 16

#define	_CMU_ADCCTRL_ADC1CLKINV_DEFAULT 0x00000000UL

#define	_CMU_ADCCTRL_ADC1CLKINV_MASK 0x1000000UL

#define	_CMU_ADCCTRL_ADC1CLKINV_SHIFT 24

#define	_CMU_ADCCTRL_ADC1CLKSEL_AUXHFRCO 0x00000001UL

#define	_CMU_ADCCTRL_ADC1CLKSEL_DEFAULT 0x00000000UL

#define	_CMU_ADCCTRL_ADC1CLKSEL_DISABLED 0x00000000UL

#define	_CMU_ADCCTRL_ADC1CLKSEL_HFSRCCLK 0x00000003UL

#define	_CMU_ADCCTRL_ADC1CLKSEL_HFXO 0x00000002UL

#define	_CMU_ADCCTRL_ADC1CLKSEL_MASK 0x300000UL

#define	_CMU_ADCCTRL_ADC1CLKSEL_SHIFT 20

#define	_CMU_ADCCTRL_MASK 0x01330133UL

#define	_CMU_ADCCTRL_RESETVALUE 0x00000000UL

#define	_CMU_AUXHFRCOCTRL_CLKDIV_DEFAULT 0x00000000UL

#define	_CMU_AUXHFRCOCTRL_CLKDIV_DIV1 0x00000000UL

#define	_CMU_AUXHFRCOCTRL_CLKDIV_DIV2 0x00000001UL

#define	_CMU_AUXHFRCOCTRL_CLKDIV_DIV4 0x00000002UL

#define	_CMU_AUXHFRCOCTRL_CLKDIV_MASK 0x6000000UL

#define	_CMU_AUXHFRCOCTRL_CLKDIV_SHIFT 25

#define	_CMU_AUXHFRCOCTRL_CMPBIAS_DEFAULT 0x00000002UL

#define	_CMU_AUXHFRCOCTRL_CMPBIAS_MASK 0xE00000UL

#define	_CMU_AUXHFRCOCTRL_CMPBIAS_SHIFT 21

#define	_CMU_AUXHFRCOCTRL_FINETUNING_DEFAULT 0x0000001FUL

#define	_CMU_AUXHFRCOCTRL_FINETUNING_MASK 0x3F00UL

#define	_CMU_AUXHFRCOCTRL_FINETUNING_SHIFT 8

#define	_CMU_AUXHFRCOCTRL_FINETUNINGEN_DEFAULT 0x00000000UL

#define	_CMU_AUXHFRCOCTRL_FINETUNINGEN_MASK 0x8000000UL

#define	_CMU_AUXHFRCOCTRL_FINETUNINGEN_SHIFT 27

#define	_CMU_AUXHFRCOCTRL_FREQRANGE_DEFAULT 0x00000008UL

#define	_CMU_AUXHFRCOCTRL_FREQRANGE_MASK 0x1F0000UL

#define	_CMU_AUXHFRCOCTRL_FREQRANGE_SHIFT 16

#define	_CMU_AUXHFRCOCTRL_LDOHP_DEFAULT 0x00000001UL

#define	_CMU_AUXHFRCOCTRL_LDOHP_MASK 0x1000000UL

#define	_CMU_AUXHFRCOCTRL_LDOHP_SHIFT 24

#define	_CMU_AUXHFRCOCTRL_MASK 0xFFFF3F7FUL

#define	_CMU_AUXHFRCOCTRL_RESETVALUE 0xB1481F7FUL

#define	_CMU_AUXHFRCOCTRL_TUNING_DEFAULT 0x0000007FUL

#define	_CMU_AUXHFRCOCTRL_TUNING_MASK 0x7FUL

#define	_CMU_AUXHFRCOCTRL_TUNING_SHIFT 0

#define	_CMU_AUXHFRCOCTRL_VREFTC_DEFAULT 0x0000000BUL

#define	_CMU_AUXHFRCOCTRL_VREFTC_MASK 0xF0000000UL

#define	_CMU_AUXHFRCOCTRL_VREFTC_SHIFT 28

#define	_CMU_CALCNT_CALCNT_DEFAULT 0x00000000UL

#define	_CMU_CALCNT_CALCNT_MASK 0xFFFFFUL

#define	_CMU_CALCNT_CALCNT_SHIFT 0

#define	_CMU_CALCNT_MASK 0x000FFFFFUL

#define	_CMU_CALCNT_RESETVALUE 0x00000000UL

#define	_CMU_CALCTRL_CONT_DEFAULT 0x00000000UL

#define	_CMU_CALCTRL_CONT_MASK 0x100UL

#define	_CMU_CALCTRL_CONT_SHIFT 8

#define	_CMU_CALCTRL_DOWNSEL_AUXHFRCO 0x00000005UL

#define	_CMU_CALCTRL_DOWNSEL_DEFAULT 0x00000000UL

#define	_CMU_CALCTRL_DOWNSEL_HFCLK 0x00000000UL

#define	_CMU_CALCTRL_DOWNSEL_HFRCO 0x00000003UL

#define	_CMU_CALCTRL_DOWNSEL_HFXO 0x00000001UL

#define	_CMU_CALCTRL_DOWNSEL_LFRCO 0x00000004UL

#define	_CMU_CALCTRL_DOWNSEL_LFXO 0x00000002UL

#define	_CMU_CALCTRL_DOWNSEL_MASK 0xF0UL

#define	_CMU_CALCTRL_DOWNSEL_PRS 0x00000006UL

#define	_CMU_CALCTRL_DOWNSEL_SHIFT 4

#define	_CMU_CALCTRL_DOWNSEL_USHFRCO 0x00000008UL

#define	_CMU_CALCTRL_MASK 0x0F0F01F7UL

#define	_CMU_CALCTRL_PRSDOWNSEL_DEFAULT 0x00000000UL

#define	_CMU_CALCTRL_PRSDOWNSEL_MASK 0xF000000UL

#define	_CMU_CALCTRL_PRSDOWNSEL_PRSCH0 0x00000000UL

#define	_CMU_CALCTRL_PRSDOWNSEL_PRSCH1 0x00000001UL

#define	_CMU_CALCTRL_PRSDOWNSEL_PRSCH10 0x0000000AUL

#define	_CMU_CALCTRL_PRSDOWNSEL_PRSCH11 0x0000000BUL

#define	_CMU_CALCTRL_PRSDOWNSEL_PRSCH12 0x0000000CUL

#define	_CMU_CALCTRL_PRSDOWNSEL_PRSCH13 0x0000000DUL

#define	_CMU_CALCTRL_PRSDOWNSEL_PRSCH14 0x0000000EUL

#define	_CMU_CALCTRL_PRSDOWNSEL_PRSCH15 0x0000000FUL

#define	_CMU_CALCTRL_PRSDOWNSEL_PRSCH2 0x00000002UL

#define	_CMU_CALCTRL_PRSDOWNSEL_PRSCH3 0x00000003UL

#define	_CMU_CALCTRL_PRSDOWNSEL_PRSCH4 0x00000004UL

#define	_CMU_CALCTRL_PRSDOWNSEL_PRSCH5 0x00000005UL

#define	_CMU_CALCTRL_PRSDOWNSEL_PRSCH6 0x00000006UL

#define	_CMU_CALCTRL_PRSDOWNSEL_PRSCH7 0x00000007UL

#define	_CMU_CALCTRL_PRSDOWNSEL_PRSCH8 0x00000008UL

#define	_CMU_CALCTRL_PRSDOWNSEL_PRSCH9 0x00000009UL

#define	_CMU_CALCTRL_PRSDOWNSEL_SHIFT 24

#define	_CMU_CALCTRL_PRSUPSEL_DEFAULT 0x00000000UL

#define	_CMU_CALCTRL_PRSUPSEL_MASK 0xF0000UL

#define	_CMU_CALCTRL_PRSUPSEL_PRSCH0 0x00000000UL

#define	_CMU_CALCTRL_PRSUPSEL_PRSCH1 0x00000001UL

#define	_CMU_CALCTRL_PRSUPSEL_PRSCH10 0x0000000AUL

#define	_CMU_CALCTRL_PRSUPSEL_PRSCH11 0x0000000BUL

#define	_CMU_CALCTRL_PRSUPSEL_PRSCH12 0x0000000CUL

#define	_CMU_CALCTRL_PRSUPSEL_PRSCH13 0x0000000DUL

#define	_CMU_CALCTRL_PRSUPSEL_PRSCH14 0x0000000EUL

#define	_CMU_CALCTRL_PRSUPSEL_PRSCH15 0x0000000FUL

#define	_CMU_CALCTRL_PRSUPSEL_PRSCH2 0x00000002UL

#define	_CMU_CALCTRL_PRSUPSEL_PRSCH3 0x00000003UL

#define	_CMU_CALCTRL_PRSUPSEL_PRSCH4 0x00000004UL

#define	_CMU_CALCTRL_PRSUPSEL_PRSCH5 0x00000005UL

#define	_CMU_CALCTRL_PRSUPSEL_PRSCH6 0x00000006UL

#define	_CMU_CALCTRL_PRSUPSEL_PRSCH7 0x00000007UL

#define	_CMU_CALCTRL_PRSUPSEL_PRSCH8 0x00000008UL

#define	_CMU_CALCTRL_PRSUPSEL_PRSCH9 0x00000009UL

#define	_CMU_CALCTRL_PRSUPSEL_SHIFT 16

#define	_CMU_CALCTRL_RESETVALUE 0x00000000UL

#define	_CMU_CALCTRL_UPSEL_AUXHFRCO 0x00000004UL

#define	_CMU_CALCTRL_UPSEL_DEFAULT 0x00000000UL

#define	_CMU_CALCTRL_UPSEL_HFRCO 0x00000002UL

#define	_CMU_CALCTRL_UPSEL_HFXO 0x00000000UL

#define	_CMU_CALCTRL_UPSEL_LFRCO 0x00000003UL

#define	_CMU_CALCTRL_UPSEL_LFXO 0x00000001UL

#define	_CMU_CALCTRL_UPSEL_MASK 0x7UL

#define	_CMU_CALCTRL_UPSEL_PRS 0x00000005UL

#define	_CMU_CALCTRL_UPSEL_SHIFT 0

#define	_CMU_CALCTRL_UPSEL_USHFRCO 0x00000007UL

#define	_CMU_CMD_CALSTART_DEFAULT 0x00000000UL

#define	_CMU_CMD_CALSTART_MASK 0x1UL

#define	_CMU_CMD_CALSTART_SHIFT 0

#define	_CMU_CMD_CALSTOP_DEFAULT 0x00000000UL

#define	_CMU_CMD_CALSTOP_MASK 0x2UL

#define	_CMU_CMD_CALSTOP_SHIFT 1

#define	_CMU_CMD_HFXOPEAKDETSTART_DEFAULT 0x00000000UL

#define	_CMU_CMD_HFXOPEAKDETSTART_MASK 0x10UL

#define	_CMU_CMD_HFXOPEAKDETSTART_SHIFT 4

#define	_CMU_CMD_MASK 0x00000013UL

#define	_CMU_CMD_RESETVALUE 0x00000000UL

#define	_CMU_CTRL_CLKOUTSEL0_AUXHFRCOQ 0x0000000DUL

#define	_CMU_CTRL_CLKOUTSEL0_DEFAULT 0x00000000UL

#define	_CMU_CTRL_CLKOUTSEL0_DISABLED 0x00000000UL

#define	_CMU_CTRL_CLKOUTSEL0_HFEXPCLK 0x00000007UL

#define	_CMU_CTRL_CLKOUTSEL0_HFRCOQ 0x0000000CUL

#define	_CMU_CTRL_CLKOUTSEL0_HFSRCCLK 0x0000000FUL

#define	_CMU_CTRL_CLKOUTSEL0_HFXO 0x00000006UL

#define	_CMU_CTRL_CLKOUTSEL0_HFXOQ 0x0000000EUL

#define	_CMU_CTRL_CLKOUTSEL0_LFRCO 0x00000002UL

#define	_CMU_CTRL_CLKOUTSEL0_LFRCOQ 0x0000000AUL

#define	_CMU_CTRL_CLKOUTSEL0_LFXO 0x00000003UL

#define	_CMU_CTRL_CLKOUTSEL0_LFXOQ 0x0000000BUL

#define	_CMU_CTRL_CLKOUTSEL0_MASK 0x1FUL

#define	_CMU_CTRL_CLKOUTSEL0_SHIFT 0

#define	_CMU_CTRL_CLKOUTSEL0_ULFRCO 0x00000001UL

#define	_CMU_CTRL_CLKOUTSEL0_ULFRCOQ 0x00000009UL

#define	_CMU_CTRL_CLKOUTSEL0_USHFRCOQ 0x00000012UL

#define	_CMU_CTRL_CLKOUTSEL1_AUXHFRCOQ 0x0000000DUL

#define	_CMU_CTRL_CLKOUTSEL1_DEFAULT 0x00000000UL

#define	_CMU_CTRL_CLKOUTSEL1_DISABLED 0x00000000UL

#define	_CMU_CTRL_CLKOUTSEL1_HFEXPCLK 0x00000007UL

#define	_CMU_CTRL_CLKOUTSEL1_HFRCOQ 0x0000000CUL

#define	_CMU_CTRL_CLKOUTSEL1_HFSRCCLK 0x0000000FUL

#define	_CMU_CTRL_CLKOUTSEL1_HFXO 0x00000006UL

#define	_CMU_CTRL_CLKOUTSEL1_HFXOQ 0x0000000EUL

#define	_CMU_CTRL_CLKOUTSEL1_LFRCO 0x00000002UL

#define	_CMU_CTRL_CLKOUTSEL1_LFRCOQ 0x0000000AUL

#define	_CMU_CTRL_CLKOUTSEL1_LFXO 0x00000003UL

#define	_CMU_CTRL_CLKOUTSEL1_LFXOQ 0x0000000BUL

#define	_CMU_CTRL_CLKOUTSEL1_MASK 0x3E0UL

#define	_CMU_CTRL_CLKOUTSEL1_SHIFT 5

#define	_CMU_CTRL_CLKOUTSEL1_ULFRCO 0x00000001UL

#define	_CMU_CTRL_CLKOUTSEL1_ULFRCOQ 0x00000009UL

#define	_CMU_CTRL_CLKOUTSEL1_USHFRCOQ 0x00000012UL

#define	_CMU_CTRL_CLKOUTSEL2_AUXHFRCOQ 0x0000000DUL

#define	_CMU_CTRL_CLKOUTSEL2_DEFAULT 0x00000000UL

#define	_CMU_CTRL_CLKOUTSEL2_DISABLED 0x00000000UL

#define	_CMU_CTRL_CLKOUTSEL2_HFEXPCLK 0x00000007UL

#define	_CMU_CTRL_CLKOUTSEL2_HFRCOQ 0x0000000CUL

#define	_CMU_CTRL_CLKOUTSEL2_HFSRCCLK 0x0000000FUL

#define	_CMU_CTRL_CLKOUTSEL2_HFXO 0x00000006UL

#define	_CMU_CTRL_CLKOUTSEL2_HFXODIV2Q 0x00000005UL

#define	_CMU_CTRL_CLKOUTSEL2_HFXOQ 0x0000000EUL

#define	_CMU_CTRL_CLKOUTSEL2_HFXOX2Q 0x00000008UL

#define	_CMU_CTRL_CLKOUTSEL2_LFRCO 0x00000002UL

#define	_CMU_CTRL_CLKOUTSEL2_LFRCOQ 0x0000000AUL

#define	_CMU_CTRL_CLKOUTSEL2_LFXO 0x00000003UL

#define	_CMU_CTRL_CLKOUTSEL2_LFXOQ 0x0000000BUL

#define	_CMU_CTRL_CLKOUTSEL2_MASK 0x7C00UL

#define	_CMU_CTRL_CLKOUTSEL2_SHIFT 10

#define	_CMU_CTRL_CLKOUTSEL2_ULFRCO 0x00000001UL

#define	_CMU_CTRL_CLKOUTSEL2_ULFRCOQ 0x00000009UL

#define	_CMU_CTRL_CLKOUTSEL2_USHFRCOQ 0x00000012UL

#define	_CMU_CTRL_HFPERCLKEN_DEFAULT 0x00000001UL

#define	_CMU_CTRL_HFPERCLKEN_MASK 0x100000UL

#define	_CMU_CTRL_HFPERCLKEN_SHIFT 20

#define	_CMU_CTRL_MASK 0x00117FFFUL

#define	_CMU_CTRL_RESETVALUE 0x00100000UL

#define	_CMU_CTRL_WSHFLE_DEFAULT 0x00000000UL

#define	_CMU_CTRL_WSHFLE_MASK 0x10000UL

#define	_CMU_CTRL_WSHFLE_SHIFT 16

#define	_CMU_DBGCLKSEL_DBG_AUXHFRCO 0x00000000UL

#define	_CMU_DBGCLKSEL_DBG_DEFAULT 0x00000000UL

#define	_CMU_DBGCLKSEL_DBG_HFCLK 0x00000001UL

#define	_CMU_DBGCLKSEL_DBG_HFRCODIV2 0x00000002UL

#define	_CMU_DBGCLKSEL_DBG_MASK 0x3UL

#define	_CMU_DBGCLKSEL_DBG_SHIFT 0

#define	_CMU_DBGCLKSEL_MASK 0x00000003UL

#define	_CMU_DBGCLKSEL_RESETVALUE 0x00000000UL

#define	_CMU_DPLLCTRL1_M_DEFAULT 0x00000000UL

#define	_CMU_DPLLCTRL1_M_MASK 0xFFFUL

#define	_CMU_DPLLCTRL1_M_SHIFT 0

#define	_CMU_DPLLCTRL1_MASK 0x0FFF0FFFUL

#define	_CMU_DPLLCTRL1_N_DEFAULT 0x00000000UL

#define	_CMU_DPLLCTRL1_N_MASK 0xFFF0000UL

#define	_CMU_DPLLCTRL1_N_SHIFT 16

#define	_CMU_DPLLCTRL1_RESETVALUE 0x00000000UL

#define	_CMU_DPLLCTRL_AUTORECOVER_DEFAULT 0x00000000UL

#define	_CMU_DPLLCTRL_AUTORECOVER_MASK 0x4UL

#define	_CMU_DPLLCTRL_AUTORECOVER_SHIFT 2

#define	_CMU_DPLLCTRL_DITHEN_DEFAULT 0x00000000UL

#define	_CMU_DPLLCTRL_DITHEN_MASK 0x40UL

#define	_CMU_DPLLCTRL_DITHEN_SHIFT 6

#define	_CMU_DPLLCTRL_EDGESEL_DEFAULT 0x00000000UL

#define	_CMU_DPLLCTRL_EDGESEL_FALL 0x00000000UL

#define	_CMU_DPLLCTRL_EDGESEL_MASK 0x2UL

#define	_CMU_DPLLCTRL_EDGESEL_RISE 0x00000001UL

#define	_CMU_DPLLCTRL_EDGESEL_SHIFT 1

#define	_CMU_DPLLCTRL_MASK 0x0000005FUL

#define	_CMU_DPLLCTRL_MODE_DEFAULT 0x00000000UL

#define	_CMU_DPLLCTRL_MODE_FREQLL 0x00000000UL

#define	_CMU_DPLLCTRL_MODE_MASK 0x1UL

#define	_CMU_DPLLCTRL_MODE_PHASELL 0x00000001UL

#define	_CMU_DPLLCTRL_MODE_SHIFT 0

#define	_CMU_DPLLCTRL_REFSEL_CLKIN0 0x00000003UL

#define	_CMU_DPLLCTRL_REFSEL_DEFAULT 0x00000000UL

#define	_CMU_DPLLCTRL_REFSEL_HFXO 0x00000000UL

#define	_CMU_DPLLCTRL_REFSEL_LFXO 0x00000001UL

#define	_CMU_DPLLCTRL_REFSEL_MASK 0x18UL

#define	_CMU_DPLLCTRL_REFSEL_SHIFT 3

#define	_CMU_DPLLCTRL_REFSEL_USHFRCO 0x00000002UL

#define	_CMU_DPLLCTRL_RESETVALUE 0x00000000UL

#define	_CMU_FREEZE_MASK 0x00000001UL

#define	_CMU_FREEZE_REGFREEZE_DEFAULT 0x00000000UL

#define	_CMU_FREEZE_REGFREEZE_FREEZE 0x00000001UL

#define	_CMU_FREEZE_REGFREEZE_MASK 0x1UL

#define	_CMU_FREEZE_REGFREEZE_SHIFT 0

#define	_CMU_FREEZE_REGFREEZE_UPDATE 0x00000000UL

#define	_CMU_FREEZE_RESETVALUE 0x00000000UL

#define	_CMU_HFBUSCLKEN0_CRYPTO0_DEFAULT 0x00000000UL

#define	_CMU_HFBUSCLKEN0_CRYPTO0_MASK 0x2UL

#define	_CMU_HFBUSCLKEN0_CRYPTO0_SHIFT 1

#define	_CMU_HFBUSCLKEN0_EBI_DEFAULT 0x00000000UL

#define	_CMU_HFBUSCLKEN0_EBI_MASK 0x4UL

#define	_CMU_HFBUSCLKEN0_EBI_SHIFT 2

#define	_CMU_HFBUSCLKEN0_GPCRC_DEFAULT 0x00000000UL

#define	_CMU_HFBUSCLKEN0_GPCRC_MASK 0x80UL

#define	_CMU_HFBUSCLKEN0_GPCRC_SHIFT 7

#define	_CMU_HFBUSCLKEN0_GPIO_DEFAULT 0x00000000UL

#define	_CMU_HFBUSCLKEN0_GPIO_MASK 0x10UL

#define	_CMU_HFBUSCLKEN0_GPIO_SHIFT 4

#define	_CMU_HFBUSCLKEN0_LDMA_DEFAULT 0x00000000UL

#define	_CMU_HFBUSCLKEN0_LDMA_MASK 0x40UL

#define	_CMU_HFBUSCLKEN0_LDMA_SHIFT 6

#define	_CMU_HFBUSCLKEN0_LE_DEFAULT 0x00000000UL

#define	_CMU_HFBUSCLKEN0_LE_MASK 0x1UL

#define	_CMU_HFBUSCLKEN0_LE_SHIFT 0

#define	_CMU_HFBUSCLKEN0_MASK 0x000003FFUL

#define	_CMU_HFBUSCLKEN0_PRS_DEFAULT 0x00000000UL

#define	_CMU_HFBUSCLKEN0_PRS_MASK 0x20UL

#define	_CMU_HFBUSCLKEN0_PRS_SHIFT 5

#define	_CMU_HFBUSCLKEN0_QSPI0_DEFAULT 0x00000000UL

#define	_CMU_HFBUSCLKEN0_QSPI0_MASK 0x100UL

#define	_CMU_HFBUSCLKEN0_QSPI0_SHIFT 8

#define	_CMU_HFBUSCLKEN0_RESETVALUE 0x00000000UL

#define	_CMU_HFBUSCLKEN0_SDIO_DEFAULT 0x00000000UL

#define	_CMU_HFBUSCLKEN0_SDIO_MASK 0x8UL

#define	_CMU_HFBUSCLKEN0_SDIO_SHIFT 3

#define	_CMU_HFBUSCLKEN0_USB_DEFAULT 0x00000000UL

#define	_CMU_HFBUSCLKEN0_USB_MASK 0x200UL

#define	_CMU_HFBUSCLKEN0_USB_SHIFT 9

#define	_CMU_HFBUSPRESC_MASK 0x0001FF00UL

#define	_CMU_HFBUSPRESC_PRESC_DEFAULT 0x00000000UL

#define	_CMU_HFBUSPRESC_PRESC_MASK 0x1FF00UL

#define	_CMU_HFBUSPRESC_PRESC_NODIVISION 0x00000000UL

#define	_CMU_HFBUSPRESC_PRESC_SHIFT 8

#define	_CMU_HFBUSPRESC_RESETVALUE 0x00000000UL

#define	_CMU_HFCLKSEL_HF_CLKIN0 0x00000007UL

#define	_CMU_HFCLKSEL_HF_DEFAULT 0x00000000UL

#define	_CMU_HFCLKSEL_HF_HFRCO 0x00000001UL

#define	_CMU_HFCLKSEL_HF_HFRCODIV2 0x00000005UL

#define	_CMU_HFCLKSEL_HF_HFXO 0x00000002UL

#define	_CMU_HFCLKSEL_HF_LFRCO 0x00000003UL

#define	_CMU_HFCLKSEL_HF_LFXO 0x00000004UL

#define	_CMU_HFCLKSEL_HF_MASK 0x7UL

#define	_CMU_HFCLKSEL_HF_SHIFT 0

#define	_CMU_HFCLKSEL_HF_USHFRCO 0x00000006UL

#define	_CMU_HFCLKSEL_MASK 0x00000007UL

#define	_CMU_HFCLKSEL_RESETVALUE 0x00000000UL

#define	_CMU_HFCLKSTATUS_MASK 0x00000007UL

#define	_CMU_HFCLKSTATUS_RESETVALUE 0x00000001UL

#define	_CMU_HFCLKSTATUS_SELECTED_CLKIN0 0x00000007UL

#define	_CMU_HFCLKSTATUS_SELECTED_DEFAULT 0x00000001UL

#define	_CMU_HFCLKSTATUS_SELECTED_HFRCO 0x00000001UL

#define	_CMU_HFCLKSTATUS_SELECTED_HFRCODIV2 0x00000005UL

#define	_CMU_HFCLKSTATUS_SELECTED_HFXO 0x00000002UL

#define	_CMU_HFCLKSTATUS_SELECTED_LFRCO 0x00000003UL

#define	_CMU_HFCLKSTATUS_SELECTED_LFXO 0x00000004UL

#define	_CMU_HFCLKSTATUS_SELECTED_MASK 0x7UL

#define	_CMU_HFCLKSTATUS_SELECTED_SHIFT 0

#define	_CMU_HFCLKSTATUS_SELECTED_USHFRCO 0x00000006UL

#define	_CMU_HFCOREPRESC_MASK 0x0001FF00UL

#define	_CMU_HFCOREPRESC_PRESC_DEFAULT 0x00000000UL

#define	_CMU_HFCOREPRESC_PRESC_MASK 0x1FF00UL

#define	_CMU_HFCOREPRESC_PRESC_NODIVISION 0x00000000UL

#define	_CMU_HFCOREPRESC_PRESC_SHIFT 8

#define	_CMU_HFCOREPRESC_RESETVALUE 0x00000000UL

#define	_CMU_HFEXPPRESC_MASK 0x00001F00UL

#define	_CMU_HFEXPPRESC_PRESC_DEFAULT 0x00000000UL

#define	_CMU_HFEXPPRESC_PRESC_MASK 0x1F00UL

#define	_CMU_HFEXPPRESC_PRESC_NODIVISION 0x00000000UL

#define	_CMU_HFEXPPRESC_PRESC_SHIFT 8

#define	_CMU_HFEXPPRESC_RESETVALUE 0x00000000UL

#define	_CMU_HFPERCLKEN0_ACMP0_DEFAULT 0x00000000UL

#define	_CMU_HFPERCLKEN0_ACMP0_MASK 0x200UL

#define	_CMU_HFPERCLKEN0_ACMP0_SHIFT 9

#define	_CMU_HFPERCLKEN0_ACMP1_DEFAULT 0x00000000UL

#define	_CMU_HFPERCLKEN0_ACMP1_MASK 0x400UL

#define	_CMU_HFPERCLKEN0_ACMP1_SHIFT 10

#define	_CMU_HFPERCLKEN0_ACMP2_DEFAULT 0x00000000UL

#define	_CMU_HFPERCLKEN0_ACMP2_MASK 0x800UL

#define	_CMU_HFPERCLKEN0_ACMP2_SHIFT 11

#define	_CMU_HFPERCLKEN0_ADC0_DEFAULT 0x00000000UL

#define	_CMU_HFPERCLKEN0_ADC0_MASK 0x4000UL

#define	_CMU_HFPERCLKEN0_ADC0_SHIFT 14

#define	_CMU_HFPERCLKEN0_ADC1_DEFAULT 0x00000000UL

#define	_CMU_HFPERCLKEN0_ADC1_MASK 0x8000UL

#define	_CMU_HFPERCLKEN0_ADC1_SHIFT 15

#define	_CMU_HFPERCLKEN0_CRYOTIMER_DEFAULT 0x00000000UL

#define	_CMU_HFPERCLKEN0_CRYOTIMER_MASK 0x20000UL

#define	_CMU_HFPERCLKEN0_CRYOTIMER_SHIFT 17

#define	_CMU_HFPERCLKEN0_I2C0_DEFAULT 0x00000000UL

#define	_CMU_HFPERCLKEN0_I2C0_MASK 0x1000UL

#define	_CMU_HFPERCLKEN0_I2C0_SHIFT 12

#define	_CMU_HFPERCLKEN0_I2C1_DEFAULT 0x00000000UL

#define	_CMU_HFPERCLKEN0_I2C1_MASK 0x2000UL

#define	_CMU_HFPERCLKEN0_I2C1_SHIFT 13

#define	_CMU_HFPERCLKEN0_IDAC0_DEFAULT 0x00000000UL

#define	_CMU_HFPERCLKEN0_IDAC0_MASK 0x40000UL

#define	_CMU_HFPERCLKEN0_IDAC0_SHIFT 18

#define	_CMU_HFPERCLKEN0_MASK 0x000FFFFFUL

#define	_CMU_HFPERCLKEN0_PDM_DEFAULT 0x00000000UL

#define	_CMU_HFPERCLKEN0_PDM_MASK 0x10000UL

#define	_CMU_HFPERCLKEN0_PDM_SHIFT 16

#define	_CMU_HFPERCLKEN0_RESETVALUE 0x00000000UL

#define	_CMU_HFPERCLKEN0_TIMER0_DEFAULT 0x00000000UL

#define	_CMU_HFPERCLKEN0_TIMER0_MASK 0x20UL

#define	_CMU_HFPERCLKEN0_TIMER0_SHIFT 5

#define	_CMU_HFPERCLKEN0_TIMER1_DEFAULT 0x00000000UL

#define	_CMU_HFPERCLKEN0_TIMER1_MASK 0x40UL

#define	_CMU_HFPERCLKEN0_TIMER1_SHIFT 6

#define	_CMU_HFPERCLKEN0_TIMER2_DEFAULT 0x00000000UL

#define	_CMU_HFPERCLKEN0_TIMER2_MASK 0x80UL

#define	_CMU_HFPERCLKEN0_TIMER2_SHIFT 7

#define	_CMU_HFPERCLKEN0_TIMER3_DEFAULT 0x00000000UL

#define	_CMU_HFPERCLKEN0_TIMER3_MASK 0x100UL

#define	_CMU_HFPERCLKEN0_TIMER3_SHIFT 8

#define	_CMU_HFPERCLKEN0_TRNG0_DEFAULT 0x00000000UL

#define	_CMU_HFPERCLKEN0_TRNG0_MASK 0x80000UL

#define	_CMU_HFPERCLKEN0_TRNG0_SHIFT 19

#define	_CMU_HFPERCLKEN0_USART0_DEFAULT 0x00000000UL

#define	_CMU_HFPERCLKEN0_USART0_MASK 0x1UL

#define	_CMU_HFPERCLKEN0_USART0_SHIFT 0

#define	_CMU_HFPERCLKEN0_USART1_DEFAULT 0x00000000UL

#define	_CMU_HFPERCLKEN0_USART1_MASK 0x2UL

#define	_CMU_HFPERCLKEN0_USART1_SHIFT 1

#define	_CMU_HFPERCLKEN0_USART2_DEFAULT 0x00000000UL

#define	_CMU_HFPERCLKEN0_USART2_MASK 0x4UL

#define	_CMU_HFPERCLKEN0_USART2_SHIFT 2

#define	_CMU_HFPERCLKEN0_USART3_DEFAULT 0x00000000UL

#define	_CMU_HFPERCLKEN0_USART3_MASK 0x8UL

#define	_CMU_HFPERCLKEN0_USART3_SHIFT 3

#define	_CMU_HFPERCLKEN0_USART4_DEFAULT 0x00000000UL

#define	_CMU_HFPERCLKEN0_USART4_MASK 0x10UL

#define	_CMU_HFPERCLKEN0_USART4_SHIFT 4

#define	_CMU_HFPERCLKEN1_CAN0_DEFAULT 0x00000000UL

#define	_CMU_HFPERCLKEN1_CAN0_MASK 0x10UL

#define	_CMU_HFPERCLKEN1_CAN0_SHIFT 4

#define	_CMU_HFPERCLKEN1_CAN1_DEFAULT 0x00000000UL

#define	_CMU_HFPERCLKEN1_CAN1_MASK 0x20UL

#define	_CMU_HFPERCLKEN1_CAN1_SHIFT 5

#define	_CMU_HFPERCLKEN1_CSEN_DEFAULT 0x00000000UL

#define	_CMU_HFPERCLKEN1_CSEN_MASK 0x80UL

#define	_CMU_HFPERCLKEN1_CSEN_SHIFT 7

#define	_CMU_HFPERCLKEN1_MASK 0x000000FFUL

#define	_CMU_HFPERCLKEN1_RESETVALUE 0x00000000UL

#define	_CMU_HFPERCLKEN1_UART0_DEFAULT 0x00000000UL

#define	_CMU_HFPERCLKEN1_UART0_MASK 0x1UL

#define	_CMU_HFPERCLKEN1_UART0_SHIFT 0

#define	_CMU_HFPERCLKEN1_UART1_DEFAULT 0x00000000UL

#define	_CMU_HFPERCLKEN1_UART1_MASK 0x2UL

#define	_CMU_HFPERCLKEN1_UART1_SHIFT 1

#define	_CMU_HFPERCLKEN1_VDAC0_DEFAULT 0x00000000UL

#define	_CMU_HFPERCLKEN1_VDAC0_MASK 0x40UL

#define	_CMU_HFPERCLKEN1_VDAC0_SHIFT 6

#define	_CMU_HFPERCLKEN1_WTIMER0_DEFAULT 0x00000000UL

#define	_CMU_HFPERCLKEN1_WTIMER0_MASK 0x4UL

#define	_CMU_HFPERCLKEN1_WTIMER0_SHIFT 2

#define	_CMU_HFPERCLKEN1_WTIMER1_DEFAULT 0x00000000UL

#define	_CMU_HFPERCLKEN1_WTIMER1_MASK 0x8UL

#define	_CMU_HFPERCLKEN1_WTIMER1_SHIFT 3

#define	_CMU_HFPERPRESC_MASK 0x0001FF00UL

#define	_CMU_HFPERPRESC_PRESC_DEFAULT 0x00000000UL

#define	_CMU_HFPERPRESC_PRESC_MASK 0x1FF00UL

#define	_CMU_HFPERPRESC_PRESC_NODIVISION 0x00000000UL

#define	_CMU_HFPERPRESC_PRESC_SHIFT 8

#define	_CMU_HFPERPRESC_RESETVALUE 0x00000000UL

#define	_CMU_HFPERPRESCB_MASK 0x0001FF00UL

#define	_CMU_HFPERPRESCB_PRESC_DEFAULT 0x00000000UL

#define	_CMU_HFPERPRESCB_PRESC_MASK 0x1FF00UL

#define	_CMU_HFPERPRESCB_PRESC_NODIVISION 0x00000000UL

#define	_CMU_HFPERPRESCB_PRESC_SHIFT 8

#define	_CMU_HFPERPRESCB_RESETVALUE 0x00000000UL

#define	_CMU_HFPERPRESCC_MASK 0x0001FF00UL

#define	_CMU_HFPERPRESCC_PRESC_DEFAULT 0x00000000UL

#define	_CMU_HFPERPRESCC_PRESC_MASK 0x1FF00UL

#define	_CMU_HFPERPRESCC_PRESC_NODIVISION 0x00000000UL

#define	_CMU_HFPERPRESCC_PRESC_SHIFT 8

#define	_CMU_HFPERPRESCC_RESETVALUE 0x00000000UL

#define	_CMU_HFPRESC_HFCLKLEPRESC_DEFAULT 0x00000000UL

#define	_CMU_HFPRESC_HFCLKLEPRESC_DIV2 0x00000000UL

#define	_CMU_HFPRESC_HFCLKLEPRESC_DIV4 0x00000001UL

#define	_CMU_HFPRESC_HFCLKLEPRESC_DIV8 0x00000002UL

#define	_CMU_HFPRESC_HFCLKLEPRESC_MASK 0x3000000UL

#define	_CMU_HFPRESC_HFCLKLEPRESC_SHIFT 24

#define	_CMU_HFPRESC_MASK 0x03001F00UL

#define	_CMU_HFPRESC_PRESC_DEFAULT 0x00000000UL

#define	_CMU_HFPRESC_PRESC_MASK 0x1F00UL

#define	_CMU_HFPRESC_PRESC_NODIVISION 0x00000000UL

#define	_CMU_HFPRESC_PRESC_SHIFT 8

#define	_CMU_HFPRESC_RESETVALUE 0x00000000UL

#define	_CMU_HFRCOCTRL_CLKDIV_DEFAULT 0x00000000UL

#define	_CMU_HFRCOCTRL_CLKDIV_DIV1 0x00000000UL

#define	_CMU_HFRCOCTRL_CLKDIV_DIV2 0x00000001UL

#define	_CMU_HFRCOCTRL_CLKDIV_DIV4 0x00000002UL

#define	_CMU_HFRCOCTRL_CLKDIV_MASK 0x6000000UL

#define	_CMU_HFRCOCTRL_CLKDIV_SHIFT 25

#define	_CMU_HFRCOCTRL_CMPBIAS_DEFAULT 0x00000002UL

#define	_CMU_HFRCOCTRL_CMPBIAS_MASK 0xE00000UL

#define	_CMU_HFRCOCTRL_CMPBIAS_SHIFT 21

#define	_CMU_HFRCOCTRL_FINETUNING_DEFAULT 0x0000001FUL

#define	_CMU_HFRCOCTRL_FINETUNING_MASK 0x3F00UL

#define	_CMU_HFRCOCTRL_FINETUNING_SHIFT 8

#define	_CMU_HFRCOCTRL_FINETUNINGEN_DEFAULT 0x00000000UL

#define	_CMU_HFRCOCTRL_FINETUNINGEN_MASK 0x8000000UL

#define	_CMU_HFRCOCTRL_FINETUNINGEN_SHIFT 27

#define	_CMU_HFRCOCTRL_FREQRANGE_DEFAULT 0x00000008UL

#define	_CMU_HFRCOCTRL_FREQRANGE_MASK 0x1F0000UL

#define	_CMU_HFRCOCTRL_FREQRANGE_SHIFT 16

#define	_CMU_HFRCOCTRL_LDOHP_DEFAULT 0x00000001UL

#define	_CMU_HFRCOCTRL_LDOHP_MASK 0x1000000UL

#define	_CMU_HFRCOCTRL_LDOHP_SHIFT 24

#define	_CMU_HFRCOCTRL_MASK 0xFFFF3F7FUL

#define	_CMU_HFRCOCTRL_RESETVALUE 0xB1481F7FUL

#define	_CMU_HFRCOCTRL_TUNING_DEFAULT 0x0000007FUL

#define	_CMU_HFRCOCTRL_TUNING_MASK 0x7FUL

#define	_CMU_HFRCOCTRL_TUNING_SHIFT 0

#define	_CMU_HFRCOCTRL_VREFTC_DEFAULT 0x0000000BUL

#define	_CMU_HFRCOCTRL_VREFTC_MASK 0xF0000000UL

#define	_CMU_HFRCOCTRL_VREFTC_SHIFT 28

#define	_CMU_HFRCOSS_MASK 0x00001F07UL

#define	_CMU_HFRCOSS_RESETVALUE 0x00000000UL

#define	_CMU_HFRCOSS_SSAMP_DEFAULT 0x00000000UL

#define	_CMU_HFRCOSS_SSAMP_MASK 0x7UL

#define	_CMU_HFRCOSS_SSAMP_SHIFT 0

#define	_CMU_HFRCOSS_SSINV_DEFAULT 0x00000000UL

#define	_CMU_HFRCOSS_SSINV_MASK 0x1F00UL

#define	_CMU_HFRCOSS_SSINV_SHIFT 8

#define	_CMU_HFXOCTRL1_MASK 0x00007000UL

#define	_CMU_HFXOCTRL1_PEAKDETTHR_DEFAULT 0x00000002UL

#define	_CMU_HFXOCTRL1_PEAKDETTHR_MASK 0x7000UL

#define	_CMU_HFXOCTRL1_PEAKDETTHR_SHIFT 12

#define	_CMU_HFXOCTRL1_PEAKDETTHR_THR0 0x00000000UL

#define	_CMU_HFXOCTRL1_PEAKDETTHR_THR1 0x00000001UL

#define	_CMU_HFXOCTRL1_PEAKDETTHR_THR2 0x00000002UL

#define	_CMU_HFXOCTRL1_PEAKDETTHR_THR3 0x00000003UL

#define	_CMU_HFXOCTRL1_PEAKDETTHR_THR4 0x00000004UL

#define	_CMU_HFXOCTRL1_PEAKDETTHR_THR5 0x00000005UL

#define	_CMU_HFXOCTRL1_PEAKDETTHR_THR6 0x00000006UL

#define	_CMU_HFXOCTRL1_PEAKDETTHR_THR7 0x00000007UL

#define	_CMU_HFXOCTRL1_RESETVALUE 0x00002000UL

#define	_CMU_HFXOCTRL_AUTOSTARTEM0EM1_DEFAULT 0x00000000UL

#define	_CMU_HFXOCTRL_AUTOSTARTEM0EM1_MASK 0x10000000UL

#define	_CMU_HFXOCTRL_AUTOSTARTEM0EM1_SHIFT 28

#define	_CMU_HFXOCTRL_AUTOSTARTSELEM0EM1_DEFAULT 0x00000000UL

#define	_CMU_HFXOCTRL_AUTOSTARTSELEM0EM1_MASK 0x20000000UL

#define	_CMU_HFXOCTRL_AUTOSTARTSELEM0EM1_SHIFT 29

#define	_CMU_HFXOCTRL_HFXOX2EN_DEFAULT 0x00000001UL

#define	_CMU_HFXOCTRL_HFXOX2EN_MASK 0x8UL

#define	_CMU_HFXOCTRL_HFXOX2EN_SHIFT 3

#define	_CMU_HFXOCTRL_LFTIMEOUT_0CYCLES 0x00000000UL

#define	_CMU_HFXOCTRL_LFTIMEOUT_16CYCLES 0x00000003UL

#define	_CMU_HFXOCTRL_LFTIMEOUT_1KCYCLES 0x00000006UL

#define	_CMU_HFXOCTRL_LFTIMEOUT_2CYCLES 0x00000001UL

#define	_CMU_HFXOCTRL_LFTIMEOUT_32CYCLES 0x00000004UL

#define	_CMU_HFXOCTRL_LFTIMEOUT_4CYCLES 0x00000002UL

#define	_CMU_HFXOCTRL_LFTIMEOUT_4KCYCLES 0x00000007UL

#define	_CMU_HFXOCTRL_LFTIMEOUT_64CYCLES 0x00000005UL

#define	_CMU_HFXOCTRL_LFTIMEOUT_DEFAULT 0x00000000UL

#define	_CMU_HFXOCTRL_LFTIMEOUT_MASK 0x7000000UL

#define	_CMU_HFXOCTRL_LFTIMEOUT_SHIFT 24

#define	_CMU_HFXOCTRL_MASK 0x3700003BUL

#define	_CMU_HFXOCTRL_MODE_ACBUFEXTCLK 0x00000001UL

#define	_CMU_HFXOCTRL_MODE_DCBUFEXTCLK 0x00000002UL

#define	_CMU_HFXOCTRL_MODE_DEFAULT 0x00000000UL

#define	_CMU_HFXOCTRL_MODE_DIGEXTCLK 0x00000003UL

#define	_CMU_HFXOCTRL_MODE_MASK 0x3UL

#define	_CMU_HFXOCTRL_MODE_SHIFT 0

#define	_CMU_HFXOCTRL_MODE_XTAL 0x00000000UL

#define	_CMU_HFXOCTRL_PEAKDETMODE_AUTOCMD 0x00000001UL

#define	_CMU_HFXOCTRL_PEAKDETMODE_CMD 0x00000002UL

#define	_CMU_HFXOCTRL_PEAKDETMODE_DEFAULT 0x00000000UL

#define	_CMU_HFXOCTRL_PEAKDETMODE_MANUAL 0x00000003UL

#define	_CMU_HFXOCTRL_PEAKDETMODE_MASK 0x30UL

#define	_CMU_HFXOCTRL_PEAKDETMODE_ONCECMD 0x00000000UL

#define	_CMU_HFXOCTRL_PEAKDETMODE_SHIFT 4

#define	_CMU_HFXOCTRL_RESETVALUE 0x00000008UL

#define	_CMU_HFXOSTARTUPCTRL_CTUNE_DEFAULT 0x00000000UL

#define	_CMU_HFXOSTARTUPCTRL_CTUNE_MASK 0xFF800UL

#define	_CMU_HFXOSTARTUPCTRL_CTUNE_SHIFT 11

#define	_CMU_HFXOSTARTUPCTRL_IBTRIMXOCORE_DEFAULT 0x00000600UL

#define	_CMU_HFXOSTARTUPCTRL_IBTRIMXOCORE_MASK 0x7FFUL

#define	_CMU_HFXOSTARTUPCTRL_IBTRIMXOCORE_SHIFT 0

#define	_CMU_HFXOSTARTUPCTRL_MASK 0x000FFFFFUL

#define	_CMU_HFXOSTARTUPCTRL_RESETVALUE 0x00000600UL

#define	_CMU_HFXOSTEADYSTATECTRL_CTUNE_DEFAULT 0x00000000UL

#define	_CMU_HFXOSTEADYSTATECTRL_CTUNE_MASK 0xFF800UL

#define	_CMU_HFXOSTEADYSTATECTRL_CTUNE_SHIFT 11

#define	_CMU_HFXOSTEADYSTATECTRL_IBTRIMXOCORE_DEFAULT 0x00000100UL

#define	_CMU_HFXOSTEADYSTATECTRL_IBTRIMXOCORE_MASK 0x7FFUL

#define	_CMU_HFXOSTEADYSTATECTRL_IBTRIMXOCORE_SHIFT 0

#define	_CMU_HFXOSTEADYSTATECTRL_MASK 0x0C0FFFFFUL

#define	_CMU_HFXOSTEADYSTATECTRL_PEAKDETEN_DEFAULT 0x00000000UL

#define	_CMU_HFXOSTEADYSTATECTRL_PEAKDETEN_MASK 0x4000000UL

#define	_CMU_HFXOSTEADYSTATECTRL_PEAKDETEN_SHIFT 26

#define	_CMU_HFXOSTEADYSTATECTRL_PEAKMONEN_DEFAULT 0x00000001UL

#define	_CMU_HFXOSTEADYSTATECTRL_PEAKMONEN_MASK 0x8000000UL

#define	_CMU_HFXOSTEADYSTATECTRL_PEAKMONEN_SHIFT 27

#define	_CMU_HFXOSTEADYSTATECTRL_RESETVALUE 0x08000100UL

#define	_CMU_HFXOTIMEOUTCTRL_MASK 0x0000F0FFUL

#define	_CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_128CYCLES 0x00000005UL

#define	_CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_128KCYCLES 0x0000000EUL

#define	_CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_16CYCLES 0x00000002UL

#define	_CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_16KCYCLES 0x0000000BUL

#define	_CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_1KCYCLES 0x00000007UL

#define	_CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_256CYCLES 0x00000006UL

#define	_CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_2CYCLES 0x00000000UL

#define	_CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_2KCYCLES 0x00000008UL

#define	_CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_32CYCLES 0x00000003UL

#define	_CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_32KCYCLES 0x0000000CUL

#define	_CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_4CYCLES 0x00000001UL

#define	_CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_4KCYCLES 0x00000009UL

#define	_CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_64CYCLES 0x00000004UL

#define	_CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_64KCYCLES 0x0000000DUL

#define	_CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_8KCYCLES 0x0000000AUL

#define	_CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_DEFAULT 0x0000000DUL

#define	_CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_MASK 0xF000UL

#define	_CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_SHIFT 12

#define	_CMU_HFXOTIMEOUTCTRL_RESETVALUE 0x0000D08EUL

#define	_CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_128CYCLES 0x00000005UL

#define	_CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_128KCYCLES 0x0000000EUL

#define	_CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_16CYCLES 0x00000002UL

#define	_CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_16KCYCLES 0x0000000BUL

#define	_CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_1KCYCLES 0x00000007UL

#define	_CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_256CYCLES 0x00000006UL

#define	_CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_2CYCLES 0x00000000UL

#define	_CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_2KCYCLES 0x00000008UL

#define	_CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_32CYCLES 0x00000003UL

#define	_CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_32KCYCLES 0x0000000CUL

#define	_CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_4CYCLES 0x00000001UL

#define	_CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_4KCYCLES 0x00000009UL

#define	_CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_64CYCLES 0x00000004UL

#define	_CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_64KCYCLES 0x0000000DUL

#define	_CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_8KCYCLES 0x0000000AUL

#define	_CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_DEFAULT 0x0000000EUL

#define	_CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_MASK 0xFUL

#define	_CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_SHIFT 0

#define	_CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_128CYCLES 0x00000005UL

#define	_CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_128KCYCLES 0x0000000EUL

#define	_CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_16CYCLES 0x00000002UL

#define	_CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_16KCYCLES 0x0000000BUL

#define	_CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_1KCYCLES 0x00000007UL

#define	_CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_256CYCLES 0x00000006UL

#define	_CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_2CYCLES 0x00000000UL

#define	_CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_2KCYCLES 0x00000008UL

#define	_CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_32CYCLES 0x00000003UL

#define	_CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_32KCYCLES 0x0000000CUL

#define	_CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_4CYCLES 0x00000001UL

#define	_CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_4KCYCLES 0x00000009UL

#define	_CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_64CYCLES 0x00000004UL

#define	_CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_64KCYCLES 0x0000000DUL

#define	_CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_8KCYCLES 0x0000000AUL

#define	_CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_DEFAULT 0x00000008UL

#define	_CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_MASK 0xF0UL

#define	_CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_SHIFT 4

#define	_CMU_HFXOTRIMSTATUS_IBTRIMXOCORE_DEFAULT 0x00000000UL

#define	_CMU_HFXOTRIMSTATUS_IBTRIMXOCORE_MASK 0x7FFUL

#define	_CMU_HFXOTRIMSTATUS_IBTRIMXOCORE_SHIFT 0

#define	_CMU_HFXOTRIMSTATUS_IBTRIMXOCOREMON_DEFAULT 0x00000000UL

#define	_CMU_HFXOTRIMSTATUS_IBTRIMXOCOREMON_MASK 0x7FF0000UL

#define	_CMU_HFXOTRIMSTATUS_IBTRIMXOCOREMON_SHIFT 16

#define	_CMU_HFXOTRIMSTATUS_MASK 0xC7FF07FFUL

#define	_CMU_HFXOTRIMSTATUS_MONVALID_DEFAULT 0x00000000UL

#define	_CMU_HFXOTRIMSTATUS_MONVALID_MASK 0x80000000UL

#define	_CMU_HFXOTRIMSTATUS_MONVALID_SHIFT 31

#define	_CMU_HFXOTRIMSTATUS_RESETVALUE 0x00000000UL

#define	_CMU_HFXOTRIMSTATUS_VALID_DEFAULT 0x00000000UL

#define	_CMU_HFXOTRIMSTATUS_VALID_MASK 0x40000000UL

#define	_CMU_HFXOTRIMSTATUS_VALID_SHIFT 30

#define	_CMU_IEN_AUXHFRCORDY_DEFAULT 0x00000000UL

#define	_CMU_IEN_AUXHFRCORDY_MASK 0x10UL

#define	_CMU_IEN_AUXHFRCORDY_SHIFT 4

#define	_CMU_IEN_CALOF_DEFAULT 0x00000000UL

#define	_CMU_IEN_CALOF_MASK 0x40UL

#define	_CMU_IEN_CALOF_SHIFT 6

#define	_CMU_IEN_CALRDY_DEFAULT 0x00000000UL

#define	_CMU_IEN_CALRDY_MASK 0x20UL

#define	_CMU_IEN_CALRDY_SHIFT 5

#define	_CMU_IEN_CMUERR_DEFAULT 0x00000000UL

#define	_CMU_IEN_CMUERR_MASK 0x80000000UL

#define	_CMU_IEN_CMUERR_SHIFT 31

#define	_CMU_IEN_DPLLLOCKFAILHIGH_DEFAULT 0x00000000UL

#define	_CMU_IEN_DPLLLOCKFAILHIGH_MASK 0x20000UL

#define	_CMU_IEN_DPLLLOCKFAILHIGH_SHIFT 17

#define	_CMU_IEN_DPLLLOCKFAILLOW_DEFAULT 0x00000000UL

#define	_CMU_IEN_DPLLLOCKFAILLOW_MASK 0x10000UL

#define	_CMU_IEN_DPLLLOCKFAILLOW_SHIFT 16

#define	_CMU_IEN_DPLLRDY_DEFAULT 0x00000000UL

#define	_CMU_IEN_DPLLRDY_MASK 0x8000UL

#define	_CMU_IEN_DPLLRDY_SHIFT 15

#define	_CMU_IEN_HFRCODIS_DEFAULT 0x00000000UL

#define	_CMU_IEN_HFRCODIS_MASK 0x2000UL

#define	_CMU_IEN_HFRCODIS_SHIFT 13

#define	_CMU_IEN_HFRCORDY_DEFAULT 0x00000000UL

#define	_CMU_IEN_HFRCORDY_MASK 0x1UL

#define	_CMU_IEN_HFRCORDY_SHIFT 0

#define	_CMU_IEN_HFXOAUTOSW_DEFAULT 0x00000000UL

#define	_CMU_IEN_HFXOAUTOSW_MASK 0x200UL

#define	_CMU_IEN_HFXOAUTOSW_SHIFT 9

#define	_CMU_IEN_HFXODISERR_DEFAULT 0x00000000UL

#define	_CMU_IEN_HFXODISERR_MASK 0x100UL

#define	_CMU_IEN_HFXODISERR_SHIFT 8

#define	_CMU_IEN_HFXOPEAKDETRDY_DEFAULT 0x00000000UL

#define	_CMU_IEN_HFXOPEAKDETRDY_MASK 0x800UL

#define	_CMU_IEN_HFXOPEAKDETRDY_SHIFT 11

#define	_CMU_IEN_HFXORDY_DEFAULT 0x00000000UL

#define	_CMU_IEN_HFXORDY_MASK 0x2UL

#define	_CMU_IEN_HFXORDY_SHIFT 1

#define	_CMU_IEN_LFRCOEDGE_DEFAULT 0x00000000UL

#define	_CMU_IEN_LFRCOEDGE_MASK 0x10000000UL

#define	_CMU_IEN_LFRCOEDGE_SHIFT 28

#define	_CMU_IEN_LFRCORDY_DEFAULT 0x00000000UL

#define	_CMU_IEN_LFRCORDY_MASK 0x4UL

#define	_CMU_IEN_LFRCORDY_SHIFT 2

#define	_CMU_IEN_LFTIMEOUTERR_DEFAULT 0x00000000UL

#define	_CMU_IEN_LFTIMEOUTERR_MASK 0x4000UL

#define	_CMU_IEN_LFTIMEOUTERR_SHIFT 14

#define	_CMU_IEN_LFXOEDGE_DEFAULT 0x00000000UL

#define	_CMU_IEN_LFXOEDGE_MASK 0x8000000UL

#define	_CMU_IEN_LFXOEDGE_SHIFT 27

#define	_CMU_IEN_LFXORDY_DEFAULT 0x00000000UL

#define	_CMU_IEN_LFXORDY_MASK 0x8UL

#define	_CMU_IEN_LFXORDY_SHIFT 3

#define	_CMU_IEN_MASK 0xB803EBFFUL

#define	_CMU_IEN_RESETVALUE 0x00000000UL

#define	_CMU_IEN_ULFRCOEDGE_DEFAULT 0x00000000UL

#define	_CMU_IEN_ULFRCOEDGE_MASK 0x20000000UL

#define	_CMU_IEN_ULFRCOEDGE_SHIFT 29

#define	_CMU_IEN_USHFRCORDY_DEFAULT 0x00000000UL

#define	_CMU_IEN_USHFRCORDY_MASK 0x80UL

#define	_CMU_IEN_USHFRCORDY_SHIFT 7

#define	_CMU_IF_AUXHFRCORDY_DEFAULT 0x00000000UL

#define	_CMU_IF_AUXHFRCORDY_MASK 0x10UL

#define	_CMU_IF_AUXHFRCORDY_SHIFT 4

#define	_CMU_IF_CALOF_DEFAULT 0x00000000UL

#define	_CMU_IF_CALOF_MASK 0x40UL

#define	_CMU_IF_CALOF_SHIFT 6

#define	_CMU_IF_CALRDY_DEFAULT 0x00000000UL

#define	_CMU_IF_CALRDY_MASK 0x20UL

#define	_CMU_IF_CALRDY_SHIFT 5

#define	_CMU_IF_CMUERR_DEFAULT 0x00000000UL

#define	_CMU_IF_CMUERR_MASK 0x80000000UL

#define	_CMU_IF_CMUERR_SHIFT 31

#define	_CMU_IF_DPLLLOCKFAILHIGH_DEFAULT 0x00000000UL

#define	_CMU_IF_DPLLLOCKFAILHIGH_MASK 0x20000UL

#define	_CMU_IF_DPLLLOCKFAILHIGH_SHIFT 17

#define	_CMU_IF_DPLLLOCKFAILLOW_DEFAULT 0x00000000UL

#define	_CMU_IF_DPLLLOCKFAILLOW_MASK 0x10000UL

#define	_CMU_IF_DPLLLOCKFAILLOW_SHIFT 16

#define	_CMU_IF_DPLLRDY_DEFAULT 0x00000000UL

#define	_CMU_IF_DPLLRDY_MASK 0x8000UL

#define	_CMU_IF_DPLLRDY_SHIFT 15

#define	_CMU_IF_HFRCODIS_DEFAULT 0x00000000UL

#define	_CMU_IF_HFRCODIS_MASK 0x2000UL

#define	_CMU_IF_HFRCODIS_SHIFT 13

#define	_CMU_IF_HFRCORDY_DEFAULT 0x00000001UL

#define	_CMU_IF_HFRCORDY_MASK 0x1UL

#define	_CMU_IF_HFRCORDY_SHIFT 0

#define	_CMU_IF_HFXOAUTOSW_DEFAULT 0x00000000UL

#define	_CMU_IF_HFXOAUTOSW_MASK 0x200UL

#define	_CMU_IF_HFXOAUTOSW_SHIFT 9

#define	_CMU_IF_HFXODISERR_DEFAULT 0x00000000UL

#define	_CMU_IF_HFXODISERR_MASK 0x100UL

#define	_CMU_IF_HFXODISERR_SHIFT 8

#define	_CMU_IF_HFXOPEAKDETRDY_DEFAULT 0x00000000UL

#define	_CMU_IF_HFXOPEAKDETRDY_MASK 0x800UL

#define	_CMU_IF_HFXOPEAKDETRDY_SHIFT 11

#define	_CMU_IF_HFXORDY_DEFAULT 0x00000000UL

#define	_CMU_IF_HFXORDY_MASK 0x2UL

#define	_CMU_IF_HFXORDY_SHIFT 1

#define	_CMU_IF_LFRCOEDGE_DEFAULT 0x00000000UL

#define	_CMU_IF_LFRCOEDGE_MASK 0x10000000UL

#define	_CMU_IF_LFRCOEDGE_SHIFT 28

#define	_CMU_IF_LFRCORDY_DEFAULT 0x00000000UL

#define	_CMU_IF_LFRCORDY_MASK 0x4UL

#define	_CMU_IF_LFRCORDY_SHIFT 2

#define	_CMU_IF_LFTIMEOUTERR_DEFAULT 0x00000000UL

#define	_CMU_IF_LFTIMEOUTERR_MASK 0x4000UL

#define	_CMU_IF_LFTIMEOUTERR_SHIFT 14

#define	_CMU_IF_LFXOEDGE_DEFAULT 0x00000000UL

#define	_CMU_IF_LFXOEDGE_MASK 0x8000000UL

#define	_CMU_IF_LFXOEDGE_SHIFT 27

#define	_CMU_IF_LFXORDY_DEFAULT 0x00000000UL

#define	_CMU_IF_LFXORDY_MASK 0x8UL

#define	_CMU_IF_LFXORDY_SHIFT 3

#define	_CMU_IF_MASK 0xB803EBFFUL

#define	_CMU_IF_RESETVALUE 0x00000001UL

#define	_CMU_IF_ULFRCOEDGE_DEFAULT 0x00000000UL

#define	_CMU_IF_ULFRCOEDGE_MASK 0x20000000UL

#define	_CMU_IF_ULFRCOEDGE_SHIFT 29

#define	_CMU_IF_USHFRCORDY_DEFAULT 0x00000000UL

#define	_CMU_IF_USHFRCORDY_MASK 0x80UL

#define	_CMU_IF_USHFRCORDY_SHIFT 7

#define	_CMU_IFC_AUXHFRCORDY_DEFAULT 0x00000000UL

#define	_CMU_IFC_AUXHFRCORDY_MASK 0x10UL

#define	_CMU_IFC_AUXHFRCORDY_SHIFT 4

#define	_CMU_IFC_CALOF_DEFAULT 0x00000000UL

#define	_CMU_IFC_CALOF_MASK 0x40UL

#define	_CMU_IFC_CALOF_SHIFT 6

#define	_CMU_IFC_CALRDY_DEFAULT 0x00000000UL

#define	_CMU_IFC_CALRDY_MASK 0x20UL

#define	_CMU_IFC_CALRDY_SHIFT 5

#define	_CMU_IFC_CMUERR_DEFAULT 0x00000000UL

#define	_CMU_IFC_CMUERR_MASK 0x80000000UL

#define	_CMU_IFC_CMUERR_SHIFT 31

#define	_CMU_IFC_DPLLLOCKFAILHIGH_DEFAULT 0x00000000UL

#define	_CMU_IFC_DPLLLOCKFAILHIGH_MASK 0x20000UL

#define	_CMU_IFC_DPLLLOCKFAILHIGH_SHIFT 17

#define	_CMU_IFC_DPLLLOCKFAILLOW_DEFAULT 0x00000000UL

#define	_CMU_IFC_DPLLLOCKFAILLOW_MASK 0x10000UL

#define	_CMU_IFC_DPLLLOCKFAILLOW_SHIFT 16

#define	_CMU_IFC_DPLLRDY_DEFAULT 0x00000000UL

#define	_CMU_IFC_DPLLRDY_MASK 0x8000UL

#define	_CMU_IFC_DPLLRDY_SHIFT 15

#define	_CMU_IFC_HFRCODIS_DEFAULT 0x00000000UL

#define	_CMU_IFC_HFRCODIS_MASK 0x2000UL

#define	_CMU_IFC_HFRCODIS_SHIFT 13

#define	_CMU_IFC_HFRCORDY_DEFAULT 0x00000000UL

#define	_CMU_IFC_HFRCORDY_MASK 0x1UL

#define	_CMU_IFC_HFRCORDY_SHIFT 0

#define	_CMU_IFC_HFXOAUTOSW_DEFAULT 0x00000000UL

#define	_CMU_IFC_HFXOAUTOSW_MASK 0x200UL

#define	_CMU_IFC_HFXOAUTOSW_SHIFT 9

#define	_CMU_IFC_HFXODISERR_DEFAULT 0x00000000UL

#define	_CMU_IFC_HFXODISERR_MASK 0x100UL

#define	_CMU_IFC_HFXODISERR_SHIFT 8

#define	_CMU_IFC_HFXOPEAKDETRDY_DEFAULT 0x00000000UL

#define	_CMU_IFC_HFXOPEAKDETRDY_MASK 0x800UL

#define	_CMU_IFC_HFXOPEAKDETRDY_SHIFT 11

#define	_CMU_IFC_HFXORDY_DEFAULT 0x00000000UL

#define	_CMU_IFC_HFXORDY_MASK 0x2UL

#define	_CMU_IFC_HFXORDY_SHIFT 1

#define	_CMU_IFC_LFRCOEDGE_DEFAULT 0x00000000UL

#define	_CMU_IFC_LFRCOEDGE_MASK 0x10000000UL

#define	_CMU_IFC_LFRCOEDGE_SHIFT 28

#define	_CMU_IFC_LFRCORDY_DEFAULT 0x00000000UL

#define	_CMU_IFC_LFRCORDY_MASK 0x4UL

#define	_CMU_IFC_LFRCORDY_SHIFT 2

#define	_CMU_IFC_LFTIMEOUTERR_DEFAULT 0x00000000UL

#define	_CMU_IFC_LFTIMEOUTERR_MASK 0x4000UL

#define	_CMU_IFC_LFTIMEOUTERR_SHIFT 14

#define	_CMU_IFC_LFXOEDGE_DEFAULT 0x00000000UL

#define	_CMU_IFC_LFXOEDGE_MASK 0x8000000UL

#define	_CMU_IFC_LFXOEDGE_SHIFT 27

#define	_CMU_IFC_LFXORDY_DEFAULT 0x00000000UL

#define	_CMU_IFC_LFXORDY_MASK 0x8UL

#define	_CMU_IFC_LFXORDY_SHIFT 3

#define	_CMU_IFC_MASK 0xB803EBFFUL

#define	_CMU_IFC_RESETVALUE 0x00000000UL

#define	_CMU_IFC_ULFRCOEDGE_DEFAULT 0x00000000UL

#define	_CMU_IFC_ULFRCOEDGE_MASK 0x20000000UL

#define	_CMU_IFC_ULFRCOEDGE_SHIFT 29

#define	_CMU_IFC_USHFRCORDY_DEFAULT 0x00000000UL

#define	_CMU_IFC_USHFRCORDY_MASK 0x80UL

#define	_CMU_IFC_USHFRCORDY_SHIFT 7

#define	_CMU_IFS_AUXHFRCORDY_DEFAULT 0x00000000UL

#define	_CMU_IFS_AUXHFRCORDY_MASK 0x10UL

#define	_CMU_IFS_AUXHFRCORDY_SHIFT 4

#define	_CMU_IFS_CALOF_DEFAULT 0x00000000UL

#define	_CMU_IFS_CALOF_MASK 0x40UL

#define	_CMU_IFS_CALOF_SHIFT 6

#define	_CMU_IFS_CALRDY_DEFAULT 0x00000000UL

#define	_CMU_IFS_CALRDY_MASK 0x20UL

#define	_CMU_IFS_CALRDY_SHIFT 5

#define	_CMU_IFS_CMUERR_DEFAULT 0x00000000UL

#define	_CMU_IFS_CMUERR_MASK 0x80000000UL

#define	_CMU_IFS_CMUERR_SHIFT 31

#define	_CMU_IFS_DPLLLOCKFAILHIGH_DEFAULT 0x00000000UL

#define	_CMU_IFS_DPLLLOCKFAILHIGH_MASK 0x20000UL

#define	_CMU_IFS_DPLLLOCKFAILHIGH_SHIFT 17

#define	_CMU_IFS_DPLLLOCKFAILLOW_DEFAULT 0x00000000UL

#define	_CMU_IFS_DPLLLOCKFAILLOW_MASK 0x10000UL

#define	_CMU_IFS_DPLLLOCKFAILLOW_SHIFT 16

#define	_CMU_IFS_DPLLRDY_DEFAULT 0x00000000UL

#define	_CMU_IFS_DPLLRDY_MASK 0x8000UL

#define	_CMU_IFS_DPLLRDY_SHIFT 15

#define	_CMU_IFS_HFRCODIS_DEFAULT 0x00000000UL

#define	_CMU_IFS_HFRCODIS_MASK 0x2000UL

#define	_CMU_IFS_HFRCODIS_SHIFT 13

#define	_CMU_IFS_HFRCORDY_DEFAULT 0x00000000UL

#define	_CMU_IFS_HFRCORDY_MASK 0x1UL

#define	_CMU_IFS_HFRCORDY_SHIFT 0

#define	_CMU_IFS_HFXOAUTOSW_DEFAULT 0x00000000UL

#define	_CMU_IFS_HFXOAUTOSW_MASK 0x200UL

#define	_CMU_IFS_HFXOAUTOSW_SHIFT 9

#define	_CMU_IFS_HFXODISERR_DEFAULT 0x00000000UL

#define	_CMU_IFS_HFXODISERR_MASK 0x100UL

#define	_CMU_IFS_HFXODISERR_SHIFT 8

#define	_CMU_IFS_HFXOPEAKDETRDY_DEFAULT 0x00000000UL

#define	_CMU_IFS_HFXOPEAKDETRDY_MASK 0x800UL

#define	_CMU_IFS_HFXOPEAKDETRDY_SHIFT 11

#define	_CMU_IFS_HFXORDY_DEFAULT 0x00000000UL

#define	_CMU_IFS_HFXORDY_MASK 0x2UL

#define	_CMU_IFS_HFXORDY_SHIFT 1

#define	_CMU_IFS_LFRCOEDGE_DEFAULT 0x00000000UL

#define	_CMU_IFS_LFRCOEDGE_MASK 0x10000000UL

#define	_CMU_IFS_LFRCOEDGE_SHIFT 28

#define	_CMU_IFS_LFRCORDY_DEFAULT 0x00000000UL

#define	_CMU_IFS_LFRCORDY_MASK 0x4UL

#define	_CMU_IFS_LFRCORDY_SHIFT 2

#define	_CMU_IFS_LFTIMEOUTERR_DEFAULT 0x00000000UL

#define	_CMU_IFS_LFTIMEOUTERR_MASK 0x4000UL

#define	_CMU_IFS_LFTIMEOUTERR_SHIFT 14

#define	_CMU_IFS_LFXOEDGE_DEFAULT 0x00000000UL

#define	_CMU_IFS_LFXOEDGE_MASK 0x8000000UL

#define	_CMU_IFS_LFXOEDGE_SHIFT 27

#define	_CMU_IFS_LFXORDY_DEFAULT 0x00000000UL

#define	_CMU_IFS_LFXORDY_MASK 0x8UL

#define	_CMU_IFS_LFXORDY_SHIFT 3

#define	_CMU_IFS_MASK 0xB803EBFFUL

#define	_CMU_IFS_RESETVALUE 0x00000000UL

#define	_CMU_IFS_ULFRCOEDGE_DEFAULT 0x00000000UL

#define	_CMU_IFS_ULFRCOEDGE_MASK 0x20000000UL

#define	_CMU_IFS_ULFRCOEDGE_SHIFT 29

#define	_CMU_IFS_USHFRCORDY_DEFAULT 0x00000000UL

#define	_CMU_IFS_USHFRCORDY_MASK 0x80UL

#define	_CMU_IFS_USHFRCORDY_SHIFT 7

#define	_CMU_LFACLKEN0_LCD_DEFAULT 0x00000000UL

#define	_CMU_LFACLKEN0_LCD_MASK 0x8UL

#define	_CMU_LFACLKEN0_LCD_SHIFT 3

#define	_CMU_LFACLKEN0_LESENSE_DEFAULT 0x00000000UL

#define	_CMU_LFACLKEN0_LESENSE_MASK 0x4UL

#define	_CMU_LFACLKEN0_LESENSE_SHIFT 2

#define	_CMU_LFACLKEN0_LETIMER0_DEFAULT 0x00000000UL

#define	_CMU_LFACLKEN0_LETIMER0_MASK 0x1UL

#define	_CMU_LFACLKEN0_LETIMER0_SHIFT 0

#define	_CMU_LFACLKEN0_LETIMER1_DEFAULT 0x00000000UL

#define	_CMU_LFACLKEN0_LETIMER1_MASK 0x2UL

#define	_CMU_LFACLKEN0_LETIMER1_SHIFT 1

#define	_CMU_LFACLKEN0_MASK 0x0000001FUL

#define	_CMU_LFACLKEN0_RESETVALUE 0x00000000UL

#define	_CMU_LFACLKEN0_RTC_DEFAULT 0x00000000UL

#define	_CMU_LFACLKEN0_RTC_MASK 0x10UL

#define	_CMU_LFACLKEN0_RTC_SHIFT 4

#define	_CMU_LFACLKSEL_LFA_DEFAULT 0x00000000UL

#define	_CMU_LFACLKSEL_LFA_DISABLED 0x00000000UL

#define	_CMU_LFACLKSEL_LFA_LFRCO 0x00000001UL

#define	_CMU_LFACLKSEL_LFA_LFXO 0x00000002UL

#define	_CMU_LFACLKSEL_LFA_MASK 0x7UL

#define	_CMU_LFACLKSEL_LFA_SHIFT 0

#define	_CMU_LFACLKSEL_LFA_ULFRCO 0x00000004UL

#define	_CMU_LFACLKSEL_MASK 0x00000007UL

#define	_CMU_LFACLKSEL_RESETVALUE 0x00000000UL

#define	_CMU_LFAPRESC0_LCD_DIV1 0x00000000UL

#define	_CMU_LFAPRESC0_LCD_DIV128 0x00000007UL

#define	_CMU_LFAPRESC0_LCD_DIV16 0x00000004UL

#define	_CMU_LFAPRESC0_LCD_DIV2 0x00000001UL

#define	_CMU_LFAPRESC0_LCD_DIV32 0x00000005UL

#define	_CMU_LFAPRESC0_LCD_DIV4 0x00000002UL

#define	_CMU_LFAPRESC0_LCD_DIV64 0x00000006UL

#define	_CMU_LFAPRESC0_LCD_DIV8 0x00000003UL

#define	_CMU_LFAPRESC0_LCD_MASK 0x7000UL

#define	_CMU_LFAPRESC0_LCD_SHIFT 12

#define	_CMU_LFAPRESC0_LESENSE_DIV1 0x00000000UL

#define	_CMU_LFAPRESC0_LESENSE_DIV2 0x00000001UL

#define	_CMU_LFAPRESC0_LESENSE_DIV4 0x00000002UL

#define	_CMU_LFAPRESC0_LESENSE_DIV8 0x00000003UL

#define	_CMU_LFAPRESC0_LESENSE_MASK 0x300UL

#define	_CMU_LFAPRESC0_LESENSE_SHIFT 8

#define	_CMU_LFAPRESC0_LETIMER0_DIV1 0x00000000UL

#define	_CMU_LFAPRESC0_LETIMER0_DIV1024 0x0000000AUL

#define	_CMU_LFAPRESC0_LETIMER0_DIV128 0x00000007UL

#define	_CMU_LFAPRESC0_LETIMER0_DIV16 0x00000004UL

#define	_CMU_LFAPRESC0_LETIMER0_DIV16384 0x0000000EUL

#define	_CMU_LFAPRESC0_LETIMER0_DIV2 0x00000001UL

#define	_CMU_LFAPRESC0_LETIMER0_DIV2048 0x0000000BUL

#define	_CMU_LFAPRESC0_LETIMER0_DIV256 0x00000008UL

#define	_CMU_LFAPRESC0_LETIMER0_DIV32 0x00000005UL

#define	_CMU_LFAPRESC0_LETIMER0_DIV32768 0x0000000FUL

#define	_CMU_LFAPRESC0_LETIMER0_DIV4 0x00000002UL

#define	_CMU_LFAPRESC0_LETIMER0_DIV4096 0x0000000CUL

#define	_CMU_LFAPRESC0_LETIMER0_DIV512 0x00000009UL

#define	_CMU_LFAPRESC0_LETIMER0_DIV64 0x00000006UL

#define	_CMU_LFAPRESC0_LETIMER0_DIV8 0x00000003UL

#define	_CMU_LFAPRESC0_LETIMER0_DIV8192 0x0000000DUL

#define	_CMU_LFAPRESC0_LETIMER0_MASK 0xFUL

#define	_CMU_LFAPRESC0_LETIMER0_SHIFT 0

#define	_CMU_LFAPRESC0_LETIMER1_DIV1 0x00000000UL

#define	_CMU_LFAPRESC0_LETIMER1_DIV1024 0x0000000AUL

#define	_CMU_LFAPRESC0_LETIMER1_DIV128 0x00000007UL

#define	_CMU_LFAPRESC0_LETIMER1_DIV16 0x00000004UL

#define	_CMU_LFAPRESC0_LETIMER1_DIV16384 0x0000000EUL

#define	_CMU_LFAPRESC0_LETIMER1_DIV2 0x00000001UL

#define	_CMU_LFAPRESC0_LETIMER1_DIV2048 0x0000000BUL

#define	_CMU_LFAPRESC0_LETIMER1_DIV256 0x00000008UL

#define	_CMU_LFAPRESC0_LETIMER1_DIV32 0x00000005UL

#define	_CMU_LFAPRESC0_LETIMER1_DIV32768 0x0000000FUL

#define	_CMU_LFAPRESC0_LETIMER1_DIV4 0x00000002UL

#define	_CMU_LFAPRESC0_LETIMER1_DIV4096 0x0000000CUL

#define	_CMU_LFAPRESC0_LETIMER1_DIV512 0x00000009UL

#define	_CMU_LFAPRESC0_LETIMER1_DIV64 0x00000006UL

#define	_CMU_LFAPRESC0_LETIMER1_DIV8 0x00000003UL

#define	_CMU_LFAPRESC0_LETIMER1_DIV8192 0x0000000DUL

#define	_CMU_LFAPRESC0_LETIMER1_MASK 0xF0UL

#define	_CMU_LFAPRESC0_LETIMER1_SHIFT 4

#define	_CMU_LFAPRESC0_MASK 0x000F73FFUL

#define	_CMU_LFAPRESC0_RESETVALUE 0x00000000UL

#define	_CMU_LFAPRESC0_RTC_DIV1 0x00000000UL

#define	_CMU_LFAPRESC0_RTC_DIV1024 0x0000000AUL

#define	_CMU_LFAPRESC0_RTC_DIV128 0x00000007UL

#define	_CMU_LFAPRESC0_RTC_DIV16 0x00000004UL

#define	_CMU_LFAPRESC0_RTC_DIV16384 0x0000000EUL

#define	_CMU_LFAPRESC0_RTC_DIV2 0x00000001UL

#define	_CMU_LFAPRESC0_RTC_DIV2048 0x0000000BUL

#define	_CMU_LFAPRESC0_RTC_DIV256 0x00000008UL

#define	_CMU_LFAPRESC0_RTC_DIV32 0x00000005UL

#define	_CMU_LFAPRESC0_RTC_DIV32768 0x0000000FUL

#define	_CMU_LFAPRESC0_RTC_DIV4 0x00000002UL

#define	_CMU_LFAPRESC0_RTC_DIV4096 0x0000000CUL

#define	_CMU_LFAPRESC0_RTC_DIV512 0x00000009UL

#define	_CMU_LFAPRESC0_RTC_DIV64 0x00000006UL

#define	_CMU_LFAPRESC0_RTC_DIV8 0x00000003UL

#define	_CMU_LFAPRESC0_RTC_DIV8192 0x0000000DUL

#define	_CMU_LFAPRESC0_RTC_MASK 0xF0000UL

#define	_CMU_LFAPRESC0_RTC_SHIFT 16

#define	_CMU_LFBCLKEN0_CSEN_DEFAULT 0x00000000UL

#define	_CMU_LFBCLKEN0_CSEN_MASK 0x8UL

#define	_CMU_LFBCLKEN0_CSEN_SHIFT 3

#define	_CMU_LFBCLKEN0_LEUART0_DEFAULT 0x00000000UL

#define	_CMU_LFBCLKEN0_LEUART0_MASK 0x1UL

#define	_CMU_LFBCLKEN0_LEUART0_SHIFT 0

#define	_CMU_LFBCLKEN0_LEUART1_DEFAULT 0x00000000UL

#define	_CMU_LFBCLKEN0_LEUART1_MASK 0x2UL

#define	_CMU_LFBCLKEN0_LEUART1_SHIFT 1

#define	_CMU_LFBCLKEN0_MASK 0x0000000FUL

#define	_CMU_LFBCLKEN0_RESETVALUE 0x00000000UL

#define	_CMU_LFBCLKEN0_SYSTICK_DEFAULT 0x00000000UL

#define	_CMU_LFBCLKEN0_SYSTICK_MASK 0x4UL

#define	_CMU_LFBCLKEN0_SYSTICK_SHIFT 2

#define	_CMU_LFBCLKSEL_LFB_DEFAULT 0x00000000UL

#define	_CMU_LFBCLKSEL_LFB_DISABLED 0x00000000UL

#define	_CMU_LFBCLKSEL_LFB_HFCLKLE 0x00000003UL

#define	_CMU_LFBCLKSEL_LFB_LFRCO 0x00000001UL

#define	_CMU_LFBCLKSEL_LFB_LFXO 0x00000002UL

#define	_CMU_LFBCLKSEL_LFB_MASK 0x7UL

#define	_CMU_LFBCLKSEL_LFB_SHIFT 0

#define	_CMU_LFBCLKSEL_LFB_ULFRCO 0x00000004UL

#define	_CMU_LFBCLKSEL_MASK 0x00000007UL

#define	_CMU_LFBCLKSEL_RESETVALUE 0x00000000UL

#define	_CMU_LFBPRESC0_CSEN_DIV128 0x00000003UL

#define	_CMU_LFBPRESC0_CSEN_DIV16 0x00000000UL

#define	_CMU_LFBPRESC0_CSEN_DIV32 0x00000001UL

#define	_CMU_LFBPRESC0_CSEN_DIV64 0x00000002UL

#define	_CMU_LFBPRESC0_CSEN_MASK 0x3000UL

#define	_CMU_LFBPRESC0_CSEN_SHIFT 12

#define	_CMU_LFBPRESC0_LEUART0_DIV1 0x00000000UL

#define	_CMU_LFBPRESC0_LEUART0_DIV2 0x00000001UL

#define	_CMU_LFBPRESC0_LEUART0_DIV4 0x00000002UL

#define	_CMU_LFBPRESC0_LEUART0_DIV8 0x00000003UL

#define	_CMU_LFBPRESC0_LEUART0_MASK 0x3UL

#define	_CMU_LFBPRESC0_LEUART0_SHIFT 0

#define	_CMU_LFBPRESC0_LEUART1_DIV1 0x00000000UL

#define	_CMU_LFBPRESC0_LEUART1_DIV2 0x00000001UL

#define	_CMU_LFBPRESC0_LEUART1_DIV4 0x00000002UL

#define	_CMU_LFBPRESC0_LEUART1_DIV8 0x00000003UL

#define	_CMU_LFBPRESC0_LEUART1_MASK 0x30UL

#define	_CMU_LFBPRESC0_LEUART1_SHIFT 4

#define	_CMU_LFBPRESC0_MASK 0x00003F33UL

#define	_CMU_LFBPRESC0_RESETVALUE 0x00000000UL

#define	_CMU_LFBPRESC0_SYSTICK_DIV1 0x00000000UL

#define	_CMU_LFBPRESC0_SYSTICK_MASK 0xF00UL

#define	_CMU_LFBPRESC0_SYSTICK_SHIFT 8

#define	_CMU_LFCCLKEN0_MASK 0x00000001UL

#define	_CMU_LFCCLKEN0_RESETVALUE 0x00000000UL

#define	_CMU_LFCCLKEN0_USB_DEFAULT 0x00000000UL

#define	_CMU_LFCCLKEN0_USB_MASK 0x1UL

#define	_CMU_LFCCLKEN0_USB_SHIFT 0

#define	_CMU_LFCCLKSEL_LFC_DEFAULT 0x00000000UL

#define	_CMU_LFCCLKSEL_LFC_DISABLED 0x00000000UL

#define	_CMU_LFCCLKSEL_LFC_LFRCO 0x00000001UL

#define	_CMU_LFCCLKSEL_LFC_LFXO 0x00000002UL

#define	_CMU_LFCCLKSEL_LFC_MASK 0x7UL

#define	_CMU_LFCCLKSEL_LFC_SHIFT 0

#define	_CMU_LFCCLKSEL_LFC_ULFRCO 0x00000004UL

#define	_CMU_LFCCLKSEL_MASK 0x00000007UL

#define	_CMU_LFCCLKSEL_RESETVALUE 0x00000000UL

#define	_CMU_LFECLKEN0_MASK 0x00000001UL

#define	_CMU_LFECLKEN0_RESETVALUE 0x00000000UL

#define	_CMU_LFECLKEN0_RTCC_DEFAULT 0x00000000UL

#define	_CMU_LFECLKEN0_RTCC_MASK 0x1UL

#define	_CMU_LFECLKEN0_RTCC_SHIFT 0

#define	_CMU_LFECLKSEL_LFE_DEFAULT 0x00000000UL

#define	_CMU_LFECLKSEL_LFE_DISABLED 0x00000000UL

#define	_CMU_LFECLKSEL_LFE_LFRCO 0x00000001UL

#define	_CMU_LFECLKSEL_LFE_LFXO 0x00000002UL

#define	_CMU_LFECLKSEL_LFE_MASK 0x7UL

#define	_CMU_LFECLKSEL_LFE_SHIFT 0

#define	_CMU_LFECLKSEL_LFE_ULFRCO 0x00000004UL

#define	_CMU_LFECLKSEL_MASK 0x00000007UL

#define	_CMU_LFECLKSEL_RESETVALUE 0x00000000UL

#define	_CMU_LFEPRESC0_MASK 0x00000003UL

#define	_CMU_LFEPRESC0_RESETVALUE 0x00000000UL

#define	_CMU_LFEPRESC0_RTCC_DIV1 0x00000000UL

#define	_CMU_LFEPRESC0_RTCC_DIV2 0x00000001UL

#define	_CMU_LFEPRESC0_RTCC_DIV4 0x00000002UL

#define	_CMU_LFEPRESC0_RTCC_MASK 0x3UL

#define	_CMU_LFEPRESC0_RTCC_SHIFT 0

#define	_CMU_LFRCOCTRL_ENCHOP_DEFAULT 0x00000001UL

#define	_CMU_LFRCOCTRL_ENCHOP_MASK 0x20000UL

#define	_CMU_LFRCOCTRL_ENCHOP_SHIFT 17

#define	_CMU_LFRCOCTRL_ENDEM_DEFAULT 0x00000001UL

#define	_CMU_LFRCOCTRL_ENDEM_MASK 0x40000UL

#define	_CMU_LFRCOCTRL_ENDEM_SHIFT 18

#define	_CMU_LFRCOCTRL_ENVREF_DEFAULT 0x00000000UL

#define	_CMU_LFRCOCTRL_ENVREF_MASK 0x10000UL

#define	_CMU_LFRCOCTRL_ENVREF_SHIFT 16

#define	_CMU_LFRCOCTRL_GMCCURTUNE_DEFAULT 0x00000008UL

#define	_CMU_LFRCOCTRL_GMCCURTUNE_MASK 0xF0000000UL

#define	_CMU_LFRCOCTRL_GMCCURTUNE_SHIFT 28

#define	_CMU_LFRCOCTRL_MASK 0xF33701FFUL

#define	_CMU_LFRCOCTRL_RESETVALUE 0x81160100UL

#define	_CMU_LFRCOCTRL_TIMEOUT_16CYCLES 0x00000001UL

#define	_CMU_LFRCOCTRL_TIMEOUT_2CYCLES 0x00000000UL

#define	_CMU_LFRCOCTRL_TIMEOUT_32CYCLES 0x00000002UL

#define	_CMU_LFRCOCTRL_TIMEOUT_DEFAULT 0x00000001UL

#define	_CMU_LFRCOCTRL_TIMEOUT_MASK 0x3000000UL

#define	_CMU_LFRCOCTRL_TIMEOUT_SHIFT 24

#define	_CMU_LFRCOCTRL_TUNING_DEFAULT 0x00000100UL

#define	_CMU_LFRCOCTRL_TUNING_MASK 0x1FFUL

#define	_CMU_LFRCOCTRL_TUNING_SHIFT 0

#define	_CMU_LFRCOCTRL_VREFUPDATE_128CYCLES 0x00000002UL

#define	_CMU_LFRCOCTRL_VREFUPDATE_256CYCLES 0x00000003UL

#define	_CMU_LFRCOCTRL_VREFUPDATE_32CYCLES 0x00000000UL

#define	_CMU_LFRCOCTRL_VREFUPDATE_64CYCLES 0x00000001UL

#define	_CMU_LFRCOCTRL_VREFUPDATE_DEFAULT 0x00000001UL

#define	_CMU_LFRCOCTRL_VREFUPDATE_MASK 0x300000UL

#define	_CMU_LFRCOCTRL_VREFUPDATE_SHIFT 20

#define	_CMU_LFXOCTRL_AGC_DEFAULT 0x00000001UL

#define	_CMU_LFXOCTRL_AGC_MASK 0x8000UL

#define	_CMU_LFXOCTRL_AGC_SHIFT 15

#define	_CMU_LFXOCTRL_BUFCUR_DEFAULT 0x00000000UL

#define	_CMU_LFXOCTRL_BUFCUR_MASK 0x100000UL

#define	_CMU_LFXOCTRL_BUFCUR_SHIFT 20

#define	_CMU_LFXOCTRL_CUR_DEFAULT 0x00000000UL

#define	_CMU_LFXOCTRL_CUR_MASK 0x30000UL

#define	_CMU_LFXOCTRL_CUR_SHIFT 16

#define	_CMU_LFXOCTRL_GAIN_DEFAULT 0x00000002UL

#define	_CMU_LFXOCTRL_GAIN_MASK 0x1800UL

#define	_CMU_LFXOCTRL_GAIN_SHIFT 11

#define	_CMU_LFXOCTRL_HIGHAMPL_DEFAULT 0x00000000UL

#define	_CMU_LFXOCTRL_HIGHAMPL_MASK 0x4000UL

#define	_CMU_LFXOCTRL_HIGHAMPL_SHIFT 14

#define	_CMU_LFXOCTRL_MASK 0x0713DB7FUL

#define	_CMU_LFXOCTRL_MODE_BUFEXTCLK 0x00000001UL

#define	_CMU_LFXOCTRL_MODE_DEFAULT 0x00000000UL

#define	_CMU_LFXOCTRL_MODE_DIGEXTCLK 0x00000002UL

#define	_CMU_LFXOCTRL_MODE_MASK 0x300UL

#define	_CMU_LFXOCTRL_MODE_SHIFT 8

#define	_CMU_LFXOCTRL_MODE_XTAL 0x00000000UL

#define	_CMU_LFXOCTRL_RESETVALUE 0x07009000UL

#define	_CMU_LFXOCTRL_TIMEOUT_16KCYCLES 0x00000006UL

#define	_CMU_LFXOCTRL_TIMEOUT_1KCYCLES 0x00000002UL

#define	_CMU_LFXOCTRL_TIMEOUT_256CYCLES 0x00000001UL

#define	_CMU_LFXOCTRL_TIMEOUT_2CYCLES 0x00000000UL

#define	_CMU_LFXOCTRL_TIMEOUT_2KCYCLES 0x00000003UL

#define	_CMU_LFXOCTRL_TIMEOUT_32KCYCLES 0x00000007UL

#define	_CMU_LFXOCTRL_TIMEOUT_4KCYCLES 0x00000004UL

#define	_CMU_LFXOCTRL_TIMEOUT_8KCYCLES 0x00000005UL

#define	_CMU_LFXOCTRL_TIMEOUT_DEFAULT 0x00000007UL

#define	_CMU_LFXOCTRL_TIMEOUT_MASK 0x7000000UL

#define	_CMU_LFXOCTRL_TIMEOUT_SHIFT 24

#define	_CMU_LFXOCTRL_TUNING_DEFAULT 0x00000000UL

#define	_CMU_LFXOCTRL_TUNING_MASK 0x7FUL

#define	_CMU_LFXOCTRL_TUNING_SHIFT 0

#define	_CMU_LOCK_LOCKKEY_DEFAULT 0x00000000UL

#define	_CMU_LOCK_LOCKKEY_LOCK 0x00000000UL

#define	_CMU_LOCK_LOCKKEY_LOCKED 0x00000001UL

#define	_CMU_LOCK_LOCKKEY_MASK 0xFFFFUL

#define	_CMU_LOCK_LOCKKEY_SHIFT 0

#define	_CMU_LOCK_LOCKKEY_UNLOCK 0x0000580EUL

#define	_CMU_LOCK_LOCKKEY_UNLOCKED 0x00000000UL

#define	_CMU_LOCK_MASK 0x0000FFFFUL

#define	_CMU_LOCK_RESETVALUE 0x00000000UL

#define	_CMU_OSCENCMD_AUXHFRCODIS_DEFAULT 0x00000000UL

#define	_CMU_OSCENCMD_AUXHFRCODIS_MASK 0x20UL

#define	_CMU_OSCENCMD_AUXHFRCODIS_SHIFT 5

#define	_CMU_OSCENCMD_AUXHFRCOEN_DEFAULT 0x00000000UL

#define	_CMU_OSCENCMD_AUXHFRCOEN_MASK 0x10UL

#define	_CMU_OSCENCMD_AUXHFRCOEN_SHIFT 4

#define	_CMU_OSCENCMD_DPLLDIS_DEFAULT 0x00000000UL

#define	_CMU_OSCENCMD_DPLLDIS_MASK 0x2000UL

#define	_CMU_OSCENCMD_DPLLDIS_SHIFT 13

#define	_CMU_OSCENCMD_DPLLEN_DEFAULT 0x00000000UL

#define	_CMU_OSCENCMD_DPLLEN_MASK 0x1000UL

#define	_CMU_OSCENCMD_DPLLEN_SHIFT 12

#define	_CMU_OSCENCMD_HFRCODIS_DEFAULT 0x00000000UL

#define	_CMU_OSCENCMD_HFRCODIS_MASK 0x2UL

#define	_CMU_OSCENCMD_HFRCODIS_SHIFT 1

#define	_CMU_OSCENCMD_HFRCOEN_DEFAULT 0x00000000UL

#define	_CMU_OSCENCMD_HFRCOEN_MASK 0x1UL

#define	_CMU_OSCENCMD_HFRCOEN_SHIFT 0

#define	_CMU_OSCENCMD_HFXODIS_DEFAULT 0x00000000UL

#define	_CMU_OSCENCMD_HFXODIS_MASK 0x8UL

#define	_CMU_OSCENCMD_HFXODIS_SHIFT 3

#define	_CMU_OSCENCMD_HFXOEN_DEFAULT 0x00000000UL

#define	_CMU_OSCENCMD_HFXOEN_MASK 0x4UL

#define	_CMU_OSCENCMD_HFXOEN_SHIFT 2

#define	_CMU_OSCENCMD_LFRCODIS_DEFAULT 0x00000000UL

#define	_CMU_OSCENCMD_LFRCODIS_MASK 0x80UL

#define	_CMU_OSCENCMD_LFRCODIS_SHIFT 7

#define	_CMU_OSCENCMD_LFRCOEN_DEFAULT 0x00000000UL

#define	_CMU_OSCENCMD_LFRCOEN_MASK 0x40UL

#define	_CMU_OSCENCMD_LFRCOEN_SHIFT 6

#define	_CMU_OSCENCMD_LFXODIS_DEFAULT 0x00000000UL

#define	_CMU_OSCENCMD_LFXODIS_MASK 0x200UL

#define	_CMU_OSCENCMD_LFXODIS_SHIFT 9

#define	_CMU_OSCENCMD_LFXOEN_DEFAULT 0x00000000UL

#define	_CMU_OSCENCMD_LFXOEN_MASK 0x100UL

#define	_CMU_OSCENCMD_LFXOEN_SHIFT 8

#define	_CMU_OSCENCMD_MASK 0x00003FFFUL

#define	_CMU_OSCENCMD_RESETVALUE 0x00000000UL

#define	_CMU_OSCENCMD_USHFRCODIS_DEFAULT 0x00000000UL

#define	_CMU_OSCENCMD_USHFRCODIS_MASK 0x800UL

#define	_CMU_OSCENCMD_USHFRCODIS_SHIFT 11

#define	_CMU_OSCENCMD_USHFRCOEN_DEFAULT 0x00000000UL

#define	_CMU_OSCENCMD_USHFRCOEN_MASK 0x400UL

#define	_CMU_OSCENCMD_USHFRCOEN_SHIFT 10

#define	_CMU_PCNTCTRL_MASK 0x0000003FUL

#define	_CMU_PCNTCTRL_PCNT0CLKEN_DEFAULT 0x00000000UL

#define	_CMU_PCNTCTRL_PCNT0CLKEN_MASK 0x1UL

#define	_CMU_PCNTCTRL_PCNT0CLKEN_SHIFT 0

#define	_CMU_PCNTCTRL_PCNT0CLKSEL_DEFAULT 0x00000000UL

#define	_CMU_PCNTCTRL_PCNT0CLKSEL_LFACLK 0x00000000UL

#define	_CMU_PCNTCTRL_PCNT0CLKSEL_MASK 0x2UL

#define	_CMU_PCNTCTRL_PCNT0CLKSEL_PCNT0S0 0x00000001UL

#define	_CMU_PCNTCTRL_PCNT0CLKSEL_SHIFT 1

#define	_CMU_PCNTCTRL_PCNT1CLKEN_DEFAULT 0x00000000UL

#define	_CMU_PCNTCTRL_PCNT1CLKEN_MASK 0x4UL

#define	_CMU_PCNTCTRL_PCNT1CLKEN_SHIFT 2

#define	_CMU_PCNTCTRL_PCNT1CLKSEL_DEFAULT 0x00000000UL

#define	_CMU_PCNTCTRL_PCNT1CLKSEL_LFACLK 0x00000000UL

#define	_CMU_PCNTCTRL_PCNT1CLKSEL_MASK 0x8UL

#define	_CMU_PCNTCTRL_PCNT1CLKSEL_PCNT1S0 0x00000001UL

#define	_CMU_PCNTCTRL_PCNT1CLKSEL_SHIFT 3

#define	_CMU_PCNTCTRL_PCNT2CLKEN_DEFAULT 0x00000000UL

#define	_CMU_PCNTCTRL_PCNT2CLKEN_MASK 0x10UL

#define	_CMU_PCNTCTRL_PCNT2CLKEN_SHIFT 4

#define	_CMU_PCNTCTRL_PCNT2CLKSEL_DEFAULT 0x00000000UL

#define	_CMU_PCNTCTRL_PCNT2CLKSEL_LFACLK 0x00000000UL

#define	_CMU_PCNTCTRL_PCNT2CLKSEL_MASK 0x20UL

#define	_CMU_PCNTCTRL_PCNT2CLKSEL_PCNT2S0 0x00000001UL

#define	_CMU_PCNTCTRL_PCNT2CLKSEL_SHIFT 5

#define	_CMU_PCNTCTRL_RESETVALUE 0x00000000UL

#define	_CMU_PDMCTRL_MASK 0x00000083UL

#define	_CMU_PDMCTRL_PDMCLKEN_DEFAULT 0x00000000UL

#define	_CMU_PDMCTRL_PDMCLKEN_MASK 0x80UL

#define	_CMU_PDMCTRL_PDMCLKEN_SHIFT 7

#define	_CMU_PDMCTRL_PDMCLKSEL_CLKIN0 0x00000003UL

#define	_CMU_PDMCTRL_PDMCLKSEL_DEFAULT 0x00000000UL

#define	_CMU_PDMCTRL_PDMCLKSEL_HFRCO 0x00000000UL

#define	_CMU_PDMCTRL_PDMCLKSEL_HFXO 0x00000001UL

#define	_CMU_PDMCTRL_PDMCLKSEL_MASK 0x3UL

#define	_CMU_PDMCTRL_PDMCLKSEL_SHIFT 0

#define	_CMU_PDMCTRL_PDMCLKSEL_USHFRCO 0x00000002UL

#define	_CMU_PDMCTRL_RESETVALUE 0x00000000UL

#define	_CMU_QSPICTRL_MASK 0x00000083UL

#define	_CMU_QSPICTRL_QSPI0CLKDIS_DEFAULT 0x00000000UL

#define	_CMU_QSPICTRL_QSPI0CLKDIS_MASK 0x80UL

#define	_CMU_QSPICTRL_QSPI0CLKDIS_SHIFT 7

#define	_CMU_QSPICTRL_QSPI0CLKSEL_AUXHFRCO 0x00000002UL

#define	_CMU_QSPICTRL_QSPI0CLKSEL_DEFAULT 0x00000000UL

#define	_CMU_QSPICTRL_QSPI0CLKSEL_HFRCO 0x00000000UL

#define	_CMU_QSPICTRL_QSPI0CLKSEL_HFXO 0x00000001UL

#define	_CMU_QSPICTRL_QSPI0CLKSEL_MASK 0x3UL

#define	_CMU_QSPICTRL_QSPI0CLKSEL_SHIFT 0

#define	_CMU_QSPICTRL_QSPI0CLKSEL_USHFRCO 0x00000003UL

#define	_CMU_QSPICTRL_RESETVALUE 0x00000000UL

#define	_CMU_ROUTELOC0_CLKOUT0LOC_DEFAULT 0x00000000UL

#define	_CMU_ROUTELOC0_CLKOUT0LOC_LOC0 0x00000000UL

#define	_CMU_ROUTELOC0_CLKOUT0LOC_LOC1 0x00000001UL

#define	_CMU_ROUTELOC0_CLKOUT0LOC_LOC2 0x00000002UL

#define	_CMU_ROUTELOC0_CLKOUT0LOC_LOC3 0x00000003UL

#define	_CMU_ROUTELOC0_CLKOUT0LOC_LOC4 0x00000004UL

#define	_CMU_ROUTELOC0_CLKOUT0LOC_LOC5 0x00000005UL

#define	_CMU_ROUTELOC0_CLKOUT0LOC_MASK 0x7UL

#define	_CMU_ROUTELOC0_CLKOUT0LOC_SHIFT 0

#define	_CMU_ROUTELOC0_CLKOUT1LOC_DEFAULT 0x00000000UL

#define	_CMU_ROUTELOC0_CLKOUT1LOC_LOC0 0x00000000UL

#define	_CMU_ROUTELOC0_CLKOUT1LOC_LOC1 0x00000001UL

#define	_CMU_ROUTELOC0_CLKOUT1LOC_LOC2 0x00000002UL

#define	_CMU_ROUTELOC0_CLKOUT1LOC_LOC3 0x00000003UL

#define	_CMU_ROUTELOC0_CLKOUT1LOC_LOC4 0x00000004UL

#define	_CMU_ROUTELOC0_CLKOUT1LOC_LOC5 0x00000005UL

#define	_CMU_ROUTELOC0_CLKOUT1LOC_MASK 0x700UL

#define	_CMU_ROUTELOC0_CLKOUT1LOC_SHIFT 8

#define	_CMU_ROUTELOC0_CLKOUT2LOC_DEFAULT 0x00000000UL

#define	_CMU_ROUTELOC0_CLKOUT2LOC_LOC0 0x00000000UL

#define	_CMU_ROUTELOC0_CLKOUT2LOC_LOC1 0x00000001UL

#define	_CMU_ROUTELOC0_CLKOUT2LOC_LOC2 0x00000002UL

#define	_CMU_ROUTELOC0_CLKOUT2LOC_LOC3 0x00000003UL

#define	_CMU_ROUTELOC0_CLKOUT2LOC_LOC4 0x00000004UL

#define	_CMU_ROUTELOC0_CLKOUT2LOC_LOC5 0x00000005UL

#define	_CMU_ROUTELOC0_CLKOUT2LOC_MASK 0x70000UL

#define	_CMU_ROUTELOC0_CLKOUT2LOC_SHIFT 16

#define	_CMU_ROUTELOC0_MASK 0x00070707UL

#define	_CMU_ROUTELOC0_RESETVALUE 0x00000000UL

#define	_CMU_ROUTELOC1_CLKIN0LOC_DEFAULT 0x00000000UL

#define	_CMU_ROUTELOC1_CLKIN0LOC_LOC0 0x00000000UL

#define	_CMU_ROUTELOC1_CLKIN0LOC_LOC1 0x00000001UL

#define	_CMU_ROUTELOC1_CLKIN0LOC_LOC2 0x00000002UL

#define	_CMU_ROUTELOC1_CLKIN0LOC_LOC3 0x00000003UL

#define	_CMU_ROUTELOC1_CLKIN0LOC_LOC4 0x00000004UL

#define	_CMU_ROUTELOC1_CLKIN0LOC_LOC5 0x00000005UL

#define	_CMU_ROUTELOC1_CLKIN0LOC_LOC6 0x00000006UL

#define	_CMU_ROUTELOC1_CLKIN0LOC_LOC7 0x00000007UL

#define	_CMU_ROUTELOC1_CLKIN0LOC_MASK 0x7UL

#define	_CMU_ROUTELOC1_CLKIN0LOC_SHIFT 0

#define	_CMU_ROUTELOC1_MASK 0x00000007UL

#define	_CMU_ROUTELOC1_RESETVALUE 0x00000000UL

#define	_CMU_ROUTEPEN_CLKIN0PEN_DEFAULT 0x00000000UL

#define	_CMU_ROUTEPEN_CLKIN0PEN_MASK 0x10000000UL

#define	_CMU_ROUTEPEN_CLKIN0PEN_SHIFT 28

#define	_CMU_ROUTEPEN_CLKOUT0PEN_DEFAULT 0x00000000UL

#define	_CMU_ROUTEPEN_CLKOUT0PEN_MASK 0x1UL

#define	_CMU_ROUTEPEN_CLKOUT0PEN_SHIFT 0

#define	_CMU_ROUTEPEN_CLKOUT1PEN_DEFAULT 0x00000000UL

#define	_CMU_ROUTEPEN_CLKOUT1PEN_MASK 0x2UL

#define	_CMU_ROUTEPEN_CLKOUT1PEN_SHIFT 1

#define	_CMU_ROUTEPEN_CLKOUT2PEN_DEFAULT 0x00000000UL

#define	_CMU_ROUTEPEN_CLKOUT2PEN_MASK 0x4UL

#define	_CMU_ROUTEPEN_CLKOUT2PEN_SHIFT 2

#define	_CMU_ROUTEPEN_MASK 0x10000007UL

#define	_CMU_ROUTEPEN_RESETVALUE 0x00000000UL

#define	_CMU_SDIOCTRL_MASK 0x00000083UL

#define	_CMU_SDIOCTRL_RESETVALUE 0x00000000UL

#define	_CMU_SDIOCTRL_SDIOCLKDIS_DEFAULT 0x00000000UL

#define	_CMU_SDIOCTRL_SDIOCLKDIS_MASK 0x80UL

#define	_CMU_SDIOCTRL_SDIOCLKDIS_SHIFT 7

#define	_CMU_SDIOCTRL_SDIOCLKSEL_AUXHFRCO 0x00000002UL

#define	_CMU_SDIOCTRL_SDIOCLKSEL_DEFAULT 0x00000000UL

#define	_CMU_SDIOCTRL_SDIOCLKSEL_HFRCO 0x00000000UL

#define	_CMU_SDIOCTRL_SDIOCLKSEL_HFXO 0x00000001UL

#define	_CMU_SDIOCTRL_SDIOCLKSEL_MASK 0x3UL

#define	_CMU_SDIOCTRL_SDIOCLKSEL_SHIFT 0

#define	_CMU_SDIOCTRL_SDIOCLKSEL_USHFRCO 0x00000003UL

#define	_CMU_STATUS_AUXHFRCOENS_DEFAULT 0x00000000UL

#define	_CMU_STATUS_AUXHFRCOENS_MASK 0x10UL

#define	_CMU_STATUS_AUXHFRCOENS_SHIFT 4

#define	_CMU_STATUS_AUXHFRCORDY_DEFAULT 0x00000000UL

#define	_CMU_STATUS_AUXHFRCORDY_MASK 0x20UL

#define	_CMU_STATUS_AUXHFRCORDY_SHIFT 5

#define	_CMU_STATUS_CALRDY_DEFAULT 0x00000001UL

#define	_CMU_STATUS_CALRDY_MASK 0x10000UL

#define	_CMU_STATUS_CALRDY_SHIFT 16

#define	_CMU_STATUS_DPLLENS_DEFAULT 0x00000000UL

#define	_CMU_STATUS_DPLLENS_MASK 0x1000UL

#define	_CMU_STATUS_DPLLENS_SHIFT 12

#define	_CMU_STATUS_DPLLRDY_DEFAULT 0x00000000UL

#define	_CMU_STATUS_DPLLRDY_MASK 0x2000UL

#define	_CMU_STATUS_DPLLRDY_SHIFT 13

#define	_CMU_STATUS_HFRCOENS_DEFAULT 0x00000001UL

#define	_CMU_STATUS_HFRCOENS_MASK 0x1UL

#define	_CMU_STATUS_HFRCOENS_SHIFT 0

#define	_CMU_STATUS_HFRCORDY_DEFAULT 0x00000001UL

#define	_CMU_STATUS_HFRCORDY_MASK 0x2UL

#define	_CMU_STATUS_HFRCORDY_SHIFT 1

#define	_CMU_STATUS_HFXOAMPLOW_DEFAULT 0x00000000UL

#define	_CMU_STATUS_HFXOAMPLOW_MASK 0x2000000UL

#define	_CMU_STATUS_HFXOAMPLOW_SHIFT 25

#define	_CMU_STATUS_HFXOENS_DEFAULT 0x00000000UL

#define	_CMU_STATUS_HFXOENS_MASK 0x4UL

#define	_CMU_STATUS_HFXOENS_SHIFT 2

#define	_CMU_STATUS_HFXOPEAKDETRDY_DEFAULT 0x00000000UL

#define	_CMU_STATUS_HFXOPEAKDETRDY_MASK 0x400000UL

#define	_CMU_STATUS_HFXOPEAKDETRDY_SHIFT 22

#define	_CMU_STATUS_HFXORDY_DEFAULT 0x00000000UL

#define	_CMU_STATUS_HFXORDY_MASK 0x8UL

#define	_CMU_STATUS_HFXORDY_SHIFT 3

#define	_CMU_STATUS_LFRCOENS_DEFAULT 0x00000000UL

#define	_CMU_STATUS_LFRCOENS_MASK 0x40UL

#define	_CMU_STATUS_LFRCOENS_SHIFT 6

#define	_CMU_STATUS_LFRCOPHASE_DEFAULT 0x00000000UL

#define	_CMU_STATUS_LFRCOPHASE_MASK 0x10000000UL

#define	_CMU_STATUS_LFRCOPHASE_SHIFT 28

#define	_CMU_STATUS_LFRCORDY_DEFAULT 0x00000000UL

#define	_CMU_STATUS_LFRCORDY_MASK 0x80UL

#define	_CMU_STATUS_LFRCORDY_SHIFT 7

#define	_CMU_STATUS_LFXOENS_DEFAULT 0x00000000UL

#define	_CMU_STATUS_LFXOENS_MASK 0x100UL

#define	_CMU_STATUS_LFXOENS_SHIFT 8

#define	_CMU_STATUS_LFXOPHASE_DEFAULT 0x00000000UL

#define	_CMU_STATUS_LFXOPHASE_MASK 0x8000000UL

#define	_CMU_STATUS_LFXOPHASE_SHIFT 27

#define	_CMU_STATUS_LFXORDY_DEFAULT 0x00000000UL

#define	_CMU_STATUS_LFXORDY_MASK 0x200UL

#define	_CMU_STATUS_LFXORDY_SHIFT 9

#define	_CMU_STATUS_MASK 0x3A4F3FFFUL

#define	_CMU_STATUS_PDMCLKENS_DEFAULT 0x00000000UL

#define	_CMU_STATUS_PDMCLKENS_MASK 0x80000UL

#define	_CMU_STATUS_PDMCLKENS_SHIFT 19

#define	_CMU_STATUS_QSPI0CLKENS_DEFAULT 0x00000000UL

#define	_CMU_STATUS_QSPI0CLKENS_MASK 0x40000UL

#define	_CMU_STATUS_QSPI0CLKENS_SHIFT 18

#define	_CMU_STATUS_RESETVALUE 0x00010003UL

#define	_CMU_STATUS_SDIOCLKENS_DEFAULT 0x00000000UL

#define	_CMU_STATUS_SDIOCLKENS_MASK 0x20000UL

#define	_CMU_STATUS_SDIOCLKENS_SHIFT 17

#define	_CMU_STATUS_ULFRCOPHASE_DEFAULT 0x00000000UL

#define	_CMU_STATUS_ULFRCOPHASE_MASK 0x20000000UL

#define	_CMU_STATUS_ULFRCOPHASE_SHIFT 29

#define	_CMU_STATUS_USHFRCOENS_DEFAULT 0x00000000UL

#define	_CMU_STATUS_USHFRCOENS_MASK 0x400UL

#define	_CMU_STATUS_USHFRCOENS_SHIFT 10

#define	_CMU_STATUS_USHFRCORDY_DEFAULT 0x00000000UL

#define	_CMU_STATUS_USHFRCORDY_MASK 0x800UL

#define	_CMU_STATUS_USHFRCORDY_SHIFT 11

#define	_CMU_SYNCBUSY_AUXHFRCOBSY_DEFAULT 0x00000000UL

#define	_CMU_SYNCBUSY_AUXHFRCOBSY_MASK 0x2000000UL

#define	_CMU_SYNCBUSY_AUXHFRCOBSY_SHIFT 25

#define	_CMU_SYNCBUSY_HFRCOBSY_DEFAULT 0x00000000UL

#define	_CMU_SYNCBUSY_HFRCOBSY_MASK 0x1000000UL

#define	_CMU_SYNCBUSY_HFRCOBSY_SHIFT 24

#define	_CMU_SYNCBUSY_HFXOBSY_DEFAULT 0x00000000UL

#define	_CMU_SYNCBUSY_HFXOBSY_MASK 0x10000000UL

#define	_CMU_SYNCBUSY_HFXOBSY_SHIFT 28

#define	_CMU_SYNCBUSY_LFACLKEN0_DEFAULT 0x00000000UL

#define	_CMU_SYNCBUSY_LFACLKEN0_MASK 0x1UL

#define	_CMU_SYNCBUSY_LFACLKEN0_SHIFT 0

#define	_CMU_SYNCBUSY_LFAPRESC0_DEFAULT 0x00000000UL

#define	_CMU_SYNCBUSY_LFAPRESC0_MASK 0x4UL

#define	_CMU_SYNCBUSY_LFAPRESC0_SHIFT 2

#define	_CMU_SYNCBUSY_LFBCLKEN0_DEFAULT 0x00000000UL

#define	_CMU_SYNCBUSY_LFBCLKEN0_MASK 0x10UL

#define	_CMU_SYNCBUSY_LFBCLKEN0_SHIFT 4

#define	_CMU_SYNCBUSY_LFBPRESC0_DEFAULT 0x00000000UL

#define	_CMU_SYNCBUSY_LFBPRESC0_MASK 0x40UL

#define	_CMU_SYNCBUSY_LFBPRESC0_SHIFT 6

#define	_CMU_SYNCBUSY_LFCCLKEN0_DEFAULT 0x00000000UL

#define	_CMU_SYNCBUSY_LFCCLKEN0_MASK 0x100UL

#define	_CMU_SYNCBUSY_LFCCLKEN0_SHIFT 8

#define	_CMU_SYNCBUSY_LFECLKEN0_DEFAULT 0x00000000UL

#define	_CMU_SYNCBUSY_LFECLKEN0_MASK 0x10000UL

#define	_CMU_SYNCBUSY_LFECLKEN0_SHIFT 16

#define	_CMU_SYNCBUSY_LFEPRESC0_DEFAULT 0x00000000UL

#define	_CMU_SYNCBUSY_LFEPRESC0_MASK 0x40000UL

#define	_CMU_SYNCBUSY_LFEPRESC0_SHIFT 18

#define	_CMU_SYNCBUSY_LFRCOBSY_DEFAULT 0x00000000UL

#define	_CMU_SYNCBUSY_LFRCOBSY_MASK 0x4000000UL

#define	_CMU_SYNCBUSY_LFRCOBSY_SHIFT 26

#define	_CMU_SYNCBUSY_LFRCOVREFBSY_DEFAULT 0x00000000UL

#define	_CMU_SYNCBUSY_LFRCOVREFBSY_MASK 0x8000000UL

#define	_CMU_SYNCBUSY_LFRCOVREFBSY_SHIFT 27

#define	_CMU_SYNCBUSY_LFXOBSY_DEFAULT 0x00000000UL

#define	_CMU_SYNCBUSY_LFXOBSY_MASK 0x20000000UL

#define	_CMU_SYNCBUSY_LFXOBSY_SHIFT 29

#define	_CMU_SYNCBUSY_MASK 0x7F050155UL

#define	_CMU_SYNCBUSY_RESETVALUE 0x00000000UL

#define	_CMU_SYNCBUSY_USHFRCOBSY_DEFAULT 0x00000000UL

#define	_CMU_SYNCBUSY_USHFRCOBSY_MASK 0x40000000UL

#define	_CMU_SYNCBUSY_USHFRCOBSY_SHIFT 30

#define	_CMU_USBCRCTRL_MASK 0x00000003UL

#define	_CMU_USBCRCTRL_RESETVALUE 0x00000000UL

#define	_CMU_USBCRCTRL_USBCREN_DEFAULT 0x00000000UL

#define	_CMU_USBCRCTRL_USBCREN_MASK 0x1UL

#define	_CMU_USBCRCTRL_USBCREN_SHIFT 0

#define	_CMU_USBCRCTRL_USBLSCRMD_DEFAULT 0x00000000UL

#define	_CMU_USBCRCTRL_USBLSCRMD_MASK 0x2UL

#define	_CMU_USBCRCTRL_USBLSCRMD_SHIFT 1

#define	_CMU_USBCTRL_MASK 0x00000087UL

#define	_CMU_USBCTRL_RESETVALUE 0x00000000UL

#define	_CMU_USBCTRL_USBCLKEN_DEFAULT 0x00000000UL

#define	_CMU_USBCTRL_USBCLKEN_MASK 0x80UL

#define	_CMU_USBCTRL_USBCLKEN_SHIFT 7

#define	_CMU_USBCTRL_USBCLKSEL_DEFAULT 0x00000000UL

#define	_CMU_USBCTRL_USBCLKSEL_HFRCO 0x00000003UL

#define	_CMU_USBCTRL_USBCLKSEL_HFXO 0x00000001UL

#define	_CMU_USBCTRL_USBCLKSEL_HFXOX2 0x00000002UL

#define	_CMU_USBCTRL_USBCLKSEL_LFRCO 0x00000005UL

#define	_CMU_USBCTRL_USBCLKSEL_LFXO 0x00000004UL

#define	_CMU_USBCTRL_USBCLKSEL_MASK 0x7UL

#define	_CMU_USBCTRL_USBCLKSEL_SHIFT 0

#define	_CMU_USBCTRL_USBCLKSEL_USHFRCO 0x00000000UL

#define	_CMU_USHFRCOCTRL_CLKDIV_DEFAULT 0x00000000UL

#define	_CMU_USHFRCOCTRL_CLKDIV_DIV1 0x00000000UL

#define	_CMU_USHFRCOCTRL_CLKDIV_DIV2 0x00000001UL

#define	_CMU_USHFRCOCTRL_CLKDIV_DIV4 0x00000002UL

#define	_CMU_USHFRCOCTRL_CLKDIV_MASK 0x6000000UL

#define	_CMU_USHFRCOCTRL_CLKDIV_SHIFT 25

#define	_CMU_USHFRCOCTRL_CMPBIAS_DEFAULT 0x00000002UL

#define	_CMU_USHFRCOCTRL_CMPBIAS_MASK 0xE00000UL

#define	_CMU_USHFRCOCTRL_CMPBIAS_SHIFT 21

#define	_CMU_USHFRCOCTRL_FINETUNING_DEFAULT 0x0000001FUL

#define	_CMU_USHFRCOCTRL_FINETUNING_MASK 0x3F00UL

#define	_CMU_USHFRCOCTRL_FINETUNING_SHIFT 8

#define	_CMU_USHFRCOCTRL_FINETUNINGEN_DEFAULT 0x00000000UL

#define	_CMU_USHFRCOCTRL_FINETUNINGEN_MASK 0x8000000UL

#define	_CMU_USHFRCOCTRL_FINETUNINGEN_SHIFT 27

#define	_CMU_USHFRCOCTRL_FREQRANGE_DEFAULT 0x00000008UL

#define	_CMU_USHFRCOCTRL_FREQRANGE_MASK 0x1F0000UL

#define	_CMU_USHFRCOCTRL_FREQRANGE_SHIFT 16

#define	_CMU_USHFRCOCTRL_LDOHP_DEFAULT 0x00000001UL

#define	_CMU_USHFRCOCTRL_LDOHP_MASK 0x1000000UL

#define	_CMU_USHFRCOCTRL_LDOHP_SHIFT 24

#define	_CMU_USHFRCOCTRL_MASK 0xFFFF3F7FUL

#define	_CMU_USHFRCOCTRL_RESETVALUE 0xB1481F7FUL

#define	_CMU_USHFRCOCTRL_TUNING_DEFAULT 0x0000007FUL

#define	_CMU_USHFRCOCTRL_TUNING_MASK 0x7FUL

#define	_CMU_USHFRCOCTRL_TUNING_SHIFT 0

#define	_CMU_USHFRCOCTRL_VREFTC_DEFAULT 0x0000000BUL

#define	_CMU_USHFRCOCTRL_VREFTC_MASK 0xF0000000UL

#define	_CMU_USHFRCOCTRL_VREFTC_SHIFT 28

#define	CMU_ADCCTRL_ADC0CLKDIV_DEFAULT ( _CMU_ADCCTRL_ADC0CLKDIV_DEFAULT << 0)

#define	CMU_ADCCTRL_ADC0CLKDIV_NODIVISION ( _CMU_ADCCTRL_ADC0CLKDIV_NODIVISION << 0)

#define	CMU_ADCCTRL_ADC0CLKINV (0x1UL << 8)

#define	CMU_ADCCTRL_ADC0CLKINV_DEFAULT ( _CMU_ADCCTRL_ADC0CLKINV_DEFAULT << 8)

#define	CMU_ADCCTRL_ADC0CLKSEL_AUXHFRCO ( _CMU_ADCCTRL_ADC0CLKSEL_AUXHFRCO << 4)

#define	CMU_ADCCTRL_ADC0CLKSEL_DEFAULT ( _CMU_ADCCTRL_ADC0CLKSEL_DEFAULT << 4)

#define	CMU_ADCCTRL_ADC0CLKSEL_DISABLED ( _CMU_ADCCTRL_ADC0CLKSEL_DISABLED << 4)

#define	CMU_ADCCTRL_ADC0CLKSEL_HFSRCCLK ( _CMU_ADCCTRL_ADC0CLKSEL_HFSRCCLK << 4)

#define	CMU_ADCCTRL_ADC0CLKSEL_HFXO ( _CMU_ADCCTRL_ADC0CLKSEL_HFXO << 4)

#define	CMU_ADCCTRL_ADC1CLKDIV_DEFAULT ( _CMU_ADCCTRL_ADC1CLKDIV_DEFAULT << 16)

#define	CMU_ADCCTRL_ADC1CLKDIV_NODIVISION ( _CMU_ADCCTRL_ADC1CLKDIV_NODIVISION << 16)

#define	CMU_ADCCTRL_ADC1CLKINV (0x1UL << 24)

#define	CMU_ADCCTRL_ADC1CLKINV_DEFAULT ( _CMU_ADCCTRL_ADC1CLKINV_DEFAULT << 24)

#define	CMU_ADCCTRL_ADC1CLKSEL_AUXHFRCO ( _CMU_ADCCTRL_ADC1CLKSEL_AUXHFRCO << 20)

#define	CMU_ADCCTRL_ADC1CLKSEL_DEFAULT ( _CMU_ADCCTRL_ADC1CLKSEL_DEFAULT << 20)

#define	CMU_ADCCTRL_ADC1CLKSEL_DISABLED ( _CMU_ADCCTRL_ADC1CLKSEL_DISABLED << 20)

#define	CMU_ADCCTRL_ADC1CLKSEL_HFSRCCLK ( _CMU_ADCCTRL_ADC1CLKSEL_HFSRCCLK << 20)

#define	CMU_ADCCTRL_ADC1CLKSEL_HFXO ( _CMU_ADCCTRL_ADC1CLKSEL_HFXO << 20)

#define	CMU_AUXHFRCOCTRL_CLKDIV_DEFAULT ( _CMU_AUXHFRCOCTRL_CLKDIV_DEFAULT << 25)

#define	CMU_AUXHFRCOCTRL_CLKDIV_DIV1 ( _CMU_AUXHFRCOCTRL_CLKDIV_DIV1 << 25)

#define	CMU_AUXHFRCOCTRL_CLKDIV_DIV2 ( _CMU_AUXHFRCOCTRL_CLKDIV_DIV2 << 25)

#define	CMU_AUXHFRCOCTRL_CLKDIV_DIV4 ( _CMU_AUXHFRCOCTRL_CLKDIV_DIV4 << 25)

#define	CMU_AUXHFRCOCTRL_CMPBIAS_DEFAULT ( _CMU_AUXHFRCOCTRL_CMPBIAS_DEFAULT << 21)

#define	CMU_AUXHFRCOCTRL_FINETUNING_DEFAULT ( _CMU_AUXHFRCOCTRL_FINETUNING_DEFAULT << 8)

#define	CMU_AUXHFRCOCTRL_FINETUNINGEN (0x1UL << 27)

#define	CMU_AUXHFRCOCTRL_FINETUNINGEN_DEFAULT ( _CMU_AUXHFRCOCTRL_FINETUNINGEN_DEFAULT << 27)

#define	CMU_AUXHFRCOCTRL_FREQRANGE_DEFAULT ( _CMU_AUXHFRCOCTRL_FREQRANGE_DEFAULT << 16)

#define	CMU_AUXHFRCOCTRL_LDOHP (0x1UL << 24)

#define	CMU_AUXHFRCOCTRL_LDOHP_DEFAULT ( _CMU_AUXHFRCOCTRL_LDOHP_DEFAULT << 24)

#define	CMU_AUXHFRCOCTRL_TUNING_DEFAULT ( _CMU_AUXHFRCOCTRL_TUNING_DEFAULT << 0)

#define	CMU_AUXHFRCOCTRL_VREFTC_DEFAULT ( _CMU_AUXHFRCOCTRL_VREFTC_DEFAULT << 28)

#define	CMU_CALCNT_CALCNT_DEFAULT ( _CMU_CALCNT_CALCNT_DEFAULT << 0)

#define	CMU_CALCTRL_CONT (0x1UL << 8)

#define	CMU_CALCTRL_CONT_DEFAULT ( _CMU_CALCTRL_CONT_DEFAULT << 8)

#define	CMU_CALCTRL_DOWNSEL_AUXHFRCO ( _CMU_CALCTRL_DOWNSEL_AUXHFRCO << 4)

#define	CMU_CALCTRL_DOWNSEL_DEFAULT ( _CMU_CALCTRL_DOWNSEL_DEFAULT << 4)

#define	CMU_CALCTRL_DOWNSEL_HFCLK ( _CMU_CALCTRL_DOWNSEL_HFCLK << 4)

#define	CMU_CALCTRL_DOWNSEL_HFRCO ( _CMU_CALCTRL_DOWNSEL_HFRCO << 4)

#define	CMU_CALCTRL_DOWNSEL_HFXO ( _CMU_CALCTRL_DOWNSEL_HFXO << 4)

#define	CMU_CALCTRL_DOWNSEL_LFRCO ( _CMU_CALCTRL_DOWNSEL_LFRCO << 4)

#define	CMU_CALCTRL_DOWNSEL_LFXO ( _CMU_CALCTRL_DOWNSEL_LFXO << 4)

#define	CMU_CALCTRL_DOWNSEL_PRS ( _CMU_CALCTRL_DOWNSEL_PRS << 4)

#define	CMU_CALCTRL_DOWNSEL_USHFRCO ( _CMU_CALCTRL_DOWNSEL_USHFRCO << 4)

#define	CMU_CALCTRL_PRSDOWNSEL_DEFAULT ( _CMU_CALCTRL_PRSDOWNSEL_DEFAULT << 24)

#define	CMU_CALCTRL_PRSDOWNSEL_PRSCH0 ( _CMU_CALCTRL_PRSDOWNSEL_PRSCH0 << 24)

#define	CMU_CALCTRL_PRSDOWNSEL_PRSCH1 ( _CMU_CALCTRL_PRSDOWNSEL_PRSCH1 << 24)

#define	CMU_CALCTRL_PRSDOWNSEL_PRSCH10 ( _CMU_CALCTRL_PRSDOWNSEL_PRSCH10 << 24)

#define	CMU_CALCTRL_PRSDOWNSEL_PRSCH11 ( _CMU_CALCTRL_PRSDOWNSEL_PRSCH11 << 24)

#define	CMU_CALCTRL_PRSDOWNSEL_PRSCH12 ( _CMU_CALCTRL_PRSDOWNSEL_PRSCH12 << 24)

#define	CMU_CALCTRL_PRSDOWNSEL_PRSCH13 ( _CMU_CALCTRL_PRSDOWNSEL_PRSCH13 << 24)

#define	CMU_CALCTRL_PRSDOWNSEL_PRSCH14 ( _CMU_CALCTRL_PRSDOWNSEL_PRSCH14 << 24)

#define	CMU_CALCTRL_PRSDOWNSEL_PRSCH15 ( _CMU_CALCTRL_PRSDOWNSEL_PRSCH15 << 24)

#define	CMU_CALCTRL_PRSDOWNSEL_PRSCH2 ( _CMU_CALCTRL_PRSDOWNSEL_PRSCH2 << 24)

#define	CMU_CALCTRL_PRSDOWNSEL_PRSCH3 ( _CMU_CALCTRL_PRSDOWNSEL_PRSCH3 << 24)

#define	CMU_CALCTRL_PRSDOWNSEL_PRSCH4 ( _CMU_CALCTRL_PRSDOWNSEL_PRSCH4 << 24)

#define	CMU_CALCTRL_PRSDOWNSEL_PRSCH5 ( _CMU_CALCTRL_PRSDOWNSEL_PRSCH5 << 24)

#define	CMU_CALCTRL_PRSDOWNSEL_PRSCH6 ( _CMU_CALCTRL_PRSDOWNSEL_PRSCH6 << 24)

#define	CMU_CALCTRL_PRSDOWNSEL_PRSCH7 ( _CMU_CALCTRL_PRSDOWNSEL_PRSCH7 << 24)

#define	CMU_CALCTRL_PRSDOWNSEL_PRSCH8 ( _CMU_CALCTRL_PRSDOWNSEL_PRSCH8 << 24)

#define	CMU_CALCTRL_PRSDOWNSEL_PRSCH9 ( _CMU_CALCTRL_PRSDOWNSEL_PRSCH9 << 24)

#define	CMU_CALCTRL_PRSUPSEL_DEFAULT ( _CMU_CALCTRL_PRSUPSEL_DEFAULT << 16)

#define	CMU_CALCTRL_PRSUPSEL_PRSCH0 ( _CMU_CALCTRL_PRSUPSEL_PRSCH0 << 16)

#define	CMU_CALCTRL_PRSUPSEL_PRSCH1 ( _CMU_CALCTRL_PRSUPSEL_PRSCH1 << 16)

#define	CMU_CALCTRL_PRSUPSEL_PRSCH10 ( _CMU_CALCTRL_PRSUPSEL_PRSCH10 << 16)

#define	CMU_CALCTRL_PRSUPSEL_PRSCH11 ( _CMU_CALCTRL_PRSUPSEL_PRSCH11 << 16)

#define	CMU_CALCTRL_PRSUPSEL_PRSCH12 ( _CMU_CALCTRL_PRSUPSEL_PRSCH12 << 16)

#define	CMU_CALCTRL_PRSUPSEL_PRSCH13 ( _CMU_CALCTRL_PRSUPSEL_PRSCH13 << 16)

#define	CMU_CALCTRL_PRSUPSEL_PRSCH14 ( _CMU_CALCTRL_PRSUPSEL_PRSCH14 << 16)

#define	CMU_CALCTRL_PRSUPSEL_PRSCH15 ( _CMU_CALCTRL_PRSUPSEL_PRSCH15 << 16)

#define	CMU_CALCTRL_PRSUPSEL_PRSCH2 ( _CMU_CALCTRL_PRSUPSEL_PRSCH2 << 16)

#define	CMU_CALCTRL_PRSUPSEL_PRSCH3 ( _CMU_CALCTRL_PRSUPSEL_PRSCH3 << 16)

#define	CMU_CALCTRL_PRSUPSEL_PRSCH4 ( _CMU_CALCTRL_PRSUPSEL_PRSCH4 << 16)

#define	CMU_CALCTRL_PRSUPSEL_PRSCH5 ( _CMU_CALCTRL_PRSUPSEL_PRSCH5 << 16)

#define	CMU_CALCTRL_PRSUPSEL_PRSCH6 ( _CMU_CALCTRL_PRSUPSEL_PRSCH6 << 16)

#define	CMU_CALCTRL_PRSUPSEL_PRSCH7 ( _CMU_CALCTRL_PRSUPSEL_PRSCH7 << 16)

#define	CMU_CALCTRL_PRSUPSEL_PRSCH8 ( _CMU_CALCTRL_PRSUPSEL_PRSCH8 << 16)

#define	CMU_CALCTRL_PRSUPSEL_PRSCH9 ( _CMU_CALCTRL_PRSUPSEL_PRSCH9 << 16)

#define	CMU_CALCTRL_UPSEL_AUXHFRCO ( _CMU_CALCTRL_UPSEL_AUXHFRCO << 0)

#define	CMU_CALCTRL_UPSEL_DEFAULT ( _CMU_CALCTRL_UPSEL_DEFAULT << 0)

#define	CMU_CALCTRL_UPSEL_HFRCO ( _CMU_CALCTRL_UPSEL_HFRCO << 0)

#define	CMU_CALCTRL_UPSEL_HFXO ( _CMU_CALCTRL_UPSEL_HFXO << 0)

#define	CMU_CALCTRL_UPSEL_LFRCO ( _CMU_CALCTRL_UPSEL_LFRCO << 0)

#define	CMU_CALCTRL_UPSEL_LFXO ( _CMU_CALCTRL_UPSEL_LFXO << 0)

#define	CMU_CALCTRL_UPSEL_PRS ( _CMU_CALCTRL_UPSEL_PRS << 0)

#define	CMU_CALCTRL_UPSEL_USHFRCO ( _CMU_CALCTRL_UPSEL_USHFRCO << 0)

#define	CMU_CMD_CALSTART (0x1UL << 0)

#define	CMU_CMD_CALSTART_DEFAULT ( _CMU_CMD_CALSTART_DEFAULT << 0)

#define	CMU_CMD_CALSTOP (0x1UL << 1)

#define	CMU_CMD_CALSTOP_DEFAULT ( _CMU_CMD_CALSTOP_DEFAULT << 1)

#define	CMU_CMD_HFXOPEAKDETSTART (0x1UL << 4)

#define	CMU_CMD_HFXOPEAKDETSTART_DEFAULT ( _CMU_CMD_HFXOPEAKDETSTART_DEFAULT << 4)

#define	CMU_CTRL_CLKOUTSEL0_AUXHFRCOQ ( _CMU_CTRL_CLKOUTSEL0_AUXHFRCOQ << 0)

#define	CMU_CTRL_CLKOUTSEL0_DEFAULT ( _CMU_CTRL_CLKOUTSEL0_DEFAULT << 0)

#define	CMU_CTRL_CLKOUTSEL0_DISABLED ( _CMU_CTRL_CLKOUTSEL0_DISABLED << 0)

#define	CMU_CTRL_CLKOUTSEL0_HFEXPCLK ( _CMU_CTRL_CLKOUTSEL0_HFEXPCLK << 0)

#define	CMU_CTRL_CLKOUTSEL0_HFRCOQ ( _CMU_CTRL_CLKOUTSEL0_HFRCOQ << 0)

#define	CMU_CTRL_CLKOUTSEL0_HFSRCCLK ( _CMU_CTRL_CLKOUTSEL0_HFSRCCLK << 0)

#define	CMU_CTRL_CLKOUTSEL0_HFXO ( _CMU_CTRL_CLKOUTSEL0_HFXO << 0)

#define	CMU_CTRL_CLKOUTSEL0_HFXOQ ( _CMU_CTRL_CLKOUTSEL0_HFXOQ << 0)

#define	CMU_CTRL_CLKOUTSEL0_LFRCO ( _CMU_CTRL_CLKOUTSEL0_LFRCO << 0)

#define	CMU_CTRL_CLKOUTSEL0_LFRCOQ ( _CMU_CTRL_CLKOUTSEL0_LFRCOQ << 0)

#define	CMU_CTRL_CLKOUTSEL0_LFXO ( _CMU_CTRL_CLKOUTSEL0_LFXO << 0)

#define	CMU_CTRL_CLKOUTSEL0_LFXOQ ( _CMU_CTRL_CLKOUTSEL0_LFXOQ << 0)

#define	CMU_CTRL_CLKOUTSEL0_ULFRCO ( _CMU_CTRL_CLKOUTSEL0_ULFRCO << 0)

#define	CMU_CTRL_CLKOUTSEL0_ULFRCOQ ( _CMU_CTRL_CLKOUTSEL0_ULFRCOQ << 0)

#define	CMU_CTRL_CLKOUTSEL0_USHFRCOQ ( _CMU_CTRL_CLKOUTSEL0_USHFRCOQ << 0)

#define	CMU_CTRL_CLKOUTSEL1_AUXHFRCOQ ( _CMU_CTRL_CLKOUTSEL1_AUXHFRCOQ << 5)

#define	CMU_CTRL_CLKOUTSEL1_DEFAULT ( _CMU_CTRL_CLKOUTSEL1_DEFAULT << 5)

#define	CMU_CTRL_CLKOUTSEL1_DISABLED ( _CMU_CTRL_CLKOUTSEL1_DISABLED << 5)

#define	CMU_CTRL_CLKOUTSEL1_HFEXPCLK ( _CMU_CTRL_CLKOUTSEL1_HFEXPCLK << 5)

#define	CMU_CTRL_CLKOUTSEL1_HFRCOQ ( _CMU_CTRL_CLKOUTSEL1_HFRCOQ << 5)

#define	CMU_CTRL_CLKOUTSEL1_HFSRCCLK ( _CMU_CTRL_CLKOUTSEL1_HFSRCCLK << 5)

#define	CMU_CTRL_CLKOUTSEL1_HFXO ( _CMU_CTRL_CLKOUTSEL1_HFXO << 5)

#define	CMU_CTRL_CLKOUTSEL1_HFXOQ ( _CMU_CTRL_CLKOUTSEL1_HFXOQ << 5)

#define	CMU_CTRL_CLKOUTSEL1_LFRCO ( _CMU_CTRL_CLKOUTSEL1_LFRCO << 5)

#define	CMU_CTRL_CLKOUTSEL1_LFRCOQ ( _CMU_CTRL_CLKOUTSEL1_LFRCOQ << 5)

#define	CMU_CTRL_CLKOUTSEL1_LFXO ( _CMU_CTRL_CLKOUTSEL1_LFXO << 5)

#define	CMU_CTRL_CLKOUTSEL1_LFXOQ ( _CMU_CTRL_CLKOUTSEL1_LFXOQ << 5)

#define	CMU_CTRL_CLKOUTSEL1_ULFRCO ( _CMU_CTRL_CLKOUTSEL1_ULFRCO << 5)

#define	CMU_CTRL_CLKOUTSEL1_ULFRCOQ ( _CMU_CTRL_CLKOUTSEL1_ULFRCOQ << 5)

#define	CMU_CTRL_CLKOUTSEL1_USHFRCOQ ( _CMU_CTRL_CLKOUTSEL1_USHFRCOQ << 5)

#define	CMU_CTRL_CLKOUTSEL2_AUXHFRCOQ ( _CMU_CTRL_CLKOUTSEL2_AUXHFRCOQ << 10)

#define	CMU_CTRL_CLKOUTSEL2_DEFAULT ( _CMU_CTRL_CLKOUTSEL2_DEFAULT << 10)

#define	CMU_CTRL_CLKOUTSEL2_DISABLED ( _CMU_CTRL_CLKOUTSEL2_DISABLED << 10)

#define	CMU_CTRL_CLKOUTSEL2_HFEXPCLK ( _CMU_CTRL_CLKOUTSEL2_HFEXPCLK << 10)

#define	CMU_CTRL_CLKOUTSEL2_HFRCOQ ( _CMU_CTRL_CLKOUTSEL2_HFRCOQ << 10)

#define	CMU_CTRL_CLKOUTSEL2_HFSRCCLK ( _CMU_CTRL_CLKOUTSEL2_HFSRCCLK << 10)

#define	CMU_CTRL_CLKOUTSEL2_HFXO ( _CMU_CTRL_CLKOUTSEL2_HFXO << 10)

#define	CMU_CTRL_CLKOUTSEL2_HFXODIV2Q ( _CMU_CTRL_CLKOUTSEL2_HFXODIV2Q << 10)

#define	CMU_CTRL_CLKOUTSEL2_HFXOQ ( _CMU_CTRL_CLKOUTSEL2_HFXOQ << 10)

#define	CMU_CTRL_CLKOUTSEL2_HFXOX2Q ( _CMU_CTRL_CLKOUTSEL2_HFXOX2Q << 10)

#define	CMU_CTRL_CLKOUTSEL2_LFRCO ( _CMU_CTRL_CLKOUTSEL2_LFRCO << 10)

#define	CMU_CTRL_CLKOUTSEL2_LFRCOQ ( _CMU_CTRL_CLKOUTSEL2_LFRCOQ << 10)

#define	CMU_CTRL_CLKOUTSEL2_LFXO ( _CMU_CTRL_CLKOUTSEL2_LFXO << 10)

#define	CMU_CTRL_CLKOUTSEL2_LFXOQ ( _CMU_CTRL_CLKOUTSEL2_LFXOQ << 10)

#define	CMU_CTRL_CLKOUTSEL2_ULFRCO ( _CMU_CTRL_CLKOUTSEL2_ULFRCO << 10)

#define	CMU_CTRL_CLKOUTSEL2_ULFRCOQ ( _CMU_CTRL_CLKOUTSEL2_ULFRCOQ << 10)

#define	CMU_CTRL_CLKOUTSEL2_USHFRCOQ ( _CMU_CTRL_CLKOUTSEL2_USHFRCOQ << 10)

#define	CMU_CTRL_HFPERCLKEN (0x1UL << 20)

#define	CMU_CTRL_HFPERCLKEN_DEFAULT ( _CMU_CTRL_HFPERCLKEN_DEFAULT << 20)

#define	CMU_CTRL_WSHFLE (0x1UL << 16)

#define	CMU_CTRL_WSHFLE_DEFAULT ( _CMU_CTRL_WSHFLE_DEFAULT << 16)

#define	CMU_DBGCLKSEL_DBG_AUXHFRCO ( _CMU_DBGCLKSEL_DBG_AUXHFRCO << 0)

#define	CMU_DBGCLKSEL_DBG_DEFAULT ( _CMU_DBGCLKSEL_DBG_DEFAULT << 0)

#define	CMU_DBGCLKSEL_DBG_HFCLK ( _CMU_DBGCLKSEL_DBG_HFCLK << 0)

#define	CMU_DBGCLKSEL_DBG_HFRCODIV2 ( _CMU_DBGCLKSEL_DBG_HFRCODIV2 << 0)

#define	CMU_DPLLCTRL1_M_DEFAULT ( _CMU_DPLLCTRL1_M_DEFAULT << 0)

#define	CMU_DPLLCTRL1_N_DEFAULT ( _CMU_DPLLCTRL1_N_DEFAULT << 16)

#define	CMU_DPLLCTRL_AUTORECOVER (0x1UL << 2)

#define	CMU_DPLLCTRL_AUTORECOVER_DEFAULT ( _CMU_DPLLCTRL_AUTORECOVER_DEFAULT << 2)

#define	CMU_DPLLCTRL_DITHEN (0x1UL << 6)

#define	CMU_DPLLCTRL_DITHEN_DEFAULT ( _CMU_DPLLCTRL_DITHEN_DEFAULT << 6)

#define	CMU_DPLLCTRL_EDGESEL (0x1UL << 1)

#define	CMU_DPLLCTRL_EDGESEL_DEFAULT ( _CMU_DPLLCTRL_EDGESEL_DEFAULT << 1)

#define	CMU_DPLLCTRL_EDGESEL_FALL ( _CMU_DPLLCTRL_EDGESEL_FALL << 1)

#define	CMU_DPLLCTRL_EDGESEL_RISE ( _CMU_DPLLCTRL_EDGESEL_RISE << 1)

#define	CMU_DPLLCTRL_MODE (0x1UL << 0)

#define	CMU_DPLLCTRL_MODE_DEFAULT ( _CMU_DPLLCTRL_MODE_DEFAULT << 0)

#define	CMU_DPLLCTRL_MODE_FREQLL ( _CMU_DPLLCTRL_MODE_FREQLL << 0)

#define	CMU_DPLLCTRL_MODE_PHASELL ( _CMU_DPLLCTRL_MODE_PHASELL << 0)

#define	CMU_DPLLCTRL_REFSEL_CLKIN0 ( _CMU_DPLLCTRL_REFSEL_CLKIN0 << 3)

#define	CMU_DPLLCTRL_REFSEL_DEFAULT ( _CMU_DPLLCTRL_REFSEL_DEFAULT << 3)

#define	CMU_DPLLCTRL_REFSEL_HFXO ( _CMU_DPLLCTRL_REFSEL_HFXO << 3)

#define	CMU_DPLLCTRL_REFSEL_LFXO ( _CMU_DPLLCTRL_REFSEL_LFXO << 3)

#define	CMU_DPLLCTRL_REFSEL_USHFRCO ( _CMU_DPLLCTRL_REFSEL_USHFRCO << 3)

#define	CMU_FREEZE_REGFREEZE (0x1UL << 0)

#define	CMU_FREEZE_REGFREEZE_DEFAULT ( _CMU_FREEZE_REGFREEZE_DEFAULT << 0)

#define	CMU_FREEZE_REGFREEZE_FREEZE ( _CMU_FREEZE_REGFREEZE_FREEZE << 0)

#define	CMU_FREEZE_REGFREEZE_UPDATE ( _CMU_FREEZE_REGFREEZE_UPDATE << 0)

#define	CMU_HFBUSCLKEN0_CRYPTO0 (0x1UL << 1)

#define	CMU_HFBUSCLKEN0_CRYPTO0_DEFAULT ( _CMU_HFBUSCLKEN0_CRYPTO0_DEFAULT << 1)

#define	CMU_HFBUSCLKEN0_EBI (0x1UL << 2)

#define	CMU_HFBUSCLKEN0_EBI_DEFAULT ( _CMU_HFBUSCLKEN0_EBI_DEFAULT << 2)

#define	CMU_HFBUSCLKEN0_GPCRC (0x1UL << 7)

#define	CMU_HFBUSCLKEN0_GPCRC_DEFAULT ( _CMU_HFBUSCLKEN0_GPCRC_DEFAULT << 7)

#define	CMU_HFBUSCLKEN0_GPIO (0x1UL << 4)

#define	CMU_HFBUSCLKEN0_GPIO_DEFAULT ( _CMU_HFBUSCLKEN0_GPIO_DEFAULT << 4)

#define	CMU_HFBUSCLKEN0_LDMA (0x1UL << 6)

#define	CMU_HFBUSCLKEN0_LDMA_DEFAULT ( _CMU_HFBUSCLKEN0_LDMA_DEFAULT << 6)

#define	CMU_HFBUSCLKEN0_LE (0x1UL << 0)

#define	CMU_HFBUSCLKEN0_LE_DEFAULT ( _CMU_HFBUSCLKEN0_LE_DEFAULT << 0)

#define	CMU_HFBUSCLKEN0_PRS (0x1UL << 5)

#define	CMU_HFBUSCLKEN0_PRS_DEFAULT ( _CMU_HFBUSCLKEN0_PRS_DEFAULT << 5)

#define	CMU_HFBUSCLKEN0_QSPI0 (0x1UL << 8)

#define	CMU_HFBUSCLKEN0_QSPI0_DEFAULT ( _CMU_HFBUSCLKEN0_QSPI0_DEFAULT << 8)

#define	CMU_HFBUSCLKEN0_SDIO (0x1UL << 3)

#define	CMU_HFBUSCLKEN0_SDIO_DEFAULT ( _CMU_HFBUSCLKEN0_SDIO_DEFAULT << 3)

#define	CMU_HFBUSCLKEN0_USB (0x1UL << 9)

#define	CMU_HFBUSCLKEN0_USB_DEFAULT ( _CMU_HFBUSCLKEN0_USB_DEFAULT << 9)

#define	CMU_HFBUSPRESC_PRESC_DEFAULT ( _CMU_HFBUSPRESC_PRESC_DEFAULT << 8)

#define	CMU_HFBUSPRESC_PRESC_NODIVISION ( _CMU_HFBUSPRESC_PRESC_NODIVISION << 8)

#define	CMU_HFCLKSEL_HF_CLKIN0 ( _CMU_HFCLKSEL_HF_CLKIN0 << 0)

#define	CMU_HFCLKSEL_HF_DEFAULT ( _CMU_HFCLKSEL_HF_DEFAULT << 0)

#define	CMU_HFCLKSEL_HF_HFRCO ( _CMU_HFCLKSEL_HF_HFRCO << 0)

#define	CMU_HFCLKSEL_HF_HFRCODIV2 ( _CMU_HFCLKSEL_HF_HFRCODIV2 << 0)

#define	CMU_HFCLKSEL_HF_HFXO ( _CMU_HFCLKSEL_HF_HFXO << 0)

#define	CMU_HFCLKSEL_HF_LFRCO ( _CMU_HFCLKSEL_HF_LFRCO << 0)

#define	CMU_HFCLKSEL_HF_LFXO ( _CMU_HFCLKSEL_HF_LFXO << 0)

#define	CMU_HFCLKSEL_HF_USHFRCO ( _CMU_HFCLKSEL_HF_USHFRCO << 0)

#define	CMU_HFCLKSTATUS_SELECTED_CLKIN0 ( _CMU_HFCLKSTATUS_SELECTED_CLKIN0 << 0)

#define	CMU_HFCLKSTATUS_SELECTED_DEFAULT ( _CMU_HFCLKSTATUS_SELECTED_DEFAULT << 0)

#define	CMU_HFCLKSTATUS_SELECTED_HFRCO ( _CMU_HFCLKSTATUS_SELECTED_HFRCO << 0)

#define	CMU_HFCLKSTATUS_SELECTED_HFRCODIV2 ( _CMU_HFCLKSTATUS_SELECTED_HFRCODIV2 << 0)

#define	CMU_HFCLKSTATUS_SELECTED_HFXO ( _CMU_HFCLKSTATUS_SELECTED_HFXO << 0)

#define	CMU_HFCLKSTATUS_SELECTED_LFRCO ( _CMU_HFCLKSTATUS_SELECTED_LFRCO << 0)

#define	CMU_HFCLKSTATUS_SELECTED_LFXO ( _CMU_HFCLKSTATUS_SELECTED_LFXO << 0)

#define	CMU_HFCLKSTATUS_SELECTED_USHFRCO ( _CMU_HFCLKSTATUS_SELECTED_USHFRCO << 0)

#define	CMU_HFCOREPRESC_PRESC_DEFAULT ( _CMU_HFCOREPRESC_PRESC_DEFAULT << 8)

#define	CMU_HFCOREPRESC_PRESC_NODIVISION ( _CMU_HFCOREPRESC_PRESC_NODIVISION << 8)

#define	CMU_HFEXPPRESC_PRESC_DEFAULT ( _CMU_HFEXPPRESC_PRESC_DEFAULT << 8)

#define	CMU_HFEXPPRESC_PRESC_NODIVISION ( _CMU_HFEXPPRESC_PRESC_NODIVISION << 8)

#define	CMU_HFPERCLKEN0_ACMP0 (0x1UL << 9)

#define	CMU_HFPERCLKEN0_ACMP0_DEFAULT ( _CMU_HFPERCLKEN0_ACMP0_DEFAULT << 9)

#define	CMU_HFPERCLKEN0_ACMP1 (0x1UL << 10)

#define	CMU_HFPERCLKEN0_ACMP1_DEFAULT ( _CMU_HFPERCLKEN0_ACMP1_DEFAULT << 10)

#define	CMU_HFPERCLKEN0_ACMP2 (0x1UL << 11)

#define	CMU_HFPERCLKEN0_ACMP2_DEFAULT ( _CMU_HFPERCLKEN0_ACMP2_DEFAULT << 11)

#define	CMU_HFPERCLKEN0_ADC0 (0x1UL << 14)

#define	CMU_HFPERCLKEN0_ADC0_DEFAULT ( _CMU_HFPERCLKEN0_ADC0_DEFAULT << 14)

#define	CMU_HFPERCLKEN0_ADC1 (0x1UL << 15)

#define	CMU_HFPERCLKEN0_ADC1_DEFAULT ( _CMU_HFPERCLKEN0_ADC1_DEFAULT << 15)

#define	CMU_HFPERCLKEN0_CRYOTIMER (0x1UL << 17)

#define	CMU_HFPERCLKEN0_CRYOTIMER_DEFAULT ( _CMU_HFPERCLKEN0_CRYOTIMER_DEFAULT << 17)

#define	CMU_HFPERCLKEN0_I2C0 (0x1UL << 12)

#define	CMU_HFPERCLKEN0_I2C0_DEFAULT ( _CMU_HFPERCLKEN0_I2C0_DEFAULT << 12)

#define	CMU_HFPERCLKEN0_I2C1 (0x1UL << 13)

#define	CMU_HFPERCLKEN0_I2C1_DEFAULT ( _CMU_HFPERCLKEN0_I2C1_DEFAULT << 13)

#define	CMU_HFPERCLKEN0_IDAC0 (0x1UL << 18)

#define	CMU_HFPERCLKEN0_IDAC0_DEFAULT ( _CMU_HFPERCLKEN0_IDAC0_DEFAULT << 18)

#define	CMU_HFPERCLKEN0_PDM (0x1UL << 16)

#define	CMU_HFPERCLKEN0_PDM_DEFAULT ( _CMU_HFPERCLKEN0_PDM_DEFAULT << 16)

#define	CMU_HFPERCLKEN0_TIMER0 (0x1UL << 5)

#define	CMU_HFPERCLKEN0_TIMER0_DEFAULT ( _CMU_HFPERCLKEN0_TIMER0_DEFAULT << 5)

#define	CMU_HFPERCLKEN0_TIMER1 (0x1UL << 6)

#define	CMU_HFPERCLKEN0_TIMER1_DEFAULT ( _CMU_HFPERCLKEN0_TIMER1_DEFAULT << 6)

#define	CMU_HFPERCLKEN0_TIMER2 (0x1UL << 7)

#define	CMU_HFPERCLKEN0_TIMER2_DEFAULT ( _CMU_HFPERCLKEN0_TIMER2_DEFAULT << 7)

#define	CMU_HFPERCLKEN0_TIMER3 (0x1UL << 8)

#define	CMU_HFPERCLKEN0_TIMER3_DEFAULT ( _CMU_HFPERCLKEN0_TIMER3_DEFAULT << 8)

#define	CMU_HFPERCLKEN0_TRNG0 (0x1UL << 19)

#define	CMU_HFPERCLKEN0_TRNG0_DEFAULT ( _CMU_HFPERCLKEN0_TRNG0_DEFAULT << 19)

#define	CMU_HFPERCLKEN0_USART0 (0x1UL << 0)

#define	CMU_HFPERCLKEN0_USART0_DEFAULT ( _CMU_HFPERCLKEN0_USART0_DEFAULT << 0)

#define	CMU_HFPERCLKEN0_USART1 (0x1UL << 1)

#define	CMU_HFPERCLKEN0_USART1_DEFAULT ( _CMU_HFPERCLKEN0_USART1_DEFAULT << 1)

#define	CMU_HFPERCLKEN0_USART2 (0x1UL << 2)

#define	CMU_HFPERCLKEN0_USART2_DEFAULT ( _CMU_HFPERCLKEN0_USART2_DEFAULT << 2)

#define	CMU_HFPERCLKEN0_USART3 (0x1UL << 3)

#define	CMU_HFPERCLKEN0_USART3_DEFAULT ( _CMU_HFPERCLKEN0_USART3_DEFAULT << 3)

#define	CMU_HFPERCLKEN0_USART4 (0x1UL << 4)

#define	CMU_HFPERCLKEN0_USART4_DEFAULT ( _CMU_HFPERCLKEN0_USART4_DEFAULT << 4)

#define	CMU_HFPERCLKEN1_CAN0 (0x1UL << 4)

#define	CMU_HFPERCLKEN1_CAN0_DEFAULT ( _CMU_HFPERCLKEN1_CAN0_DEFAULT << 4)

#define	CMU_HFPERCLKEN1_CAN1 (0x1UL << 5)

#define	CMU_HFPERCLKEN1_CAN1_DEFAULT ( _CMU_HFPERCLKEN1_CAN1_DEFAULT << 5)

#define	CMU_HFPERCLKEN1_CSEN (0x1UL << 7)

#define	CMU_HFPERCLKEN1_CSEN_DEFAULT ( _CMU_HFPERCLKEN1_CSEN_DEFAULT << 7)

#define	CMU_HFPERCLKEN1_UART0 (0x1UL << 0)

#define	CMU_HFPERCLKEN1_UART0_DEFAULT ( _CMU_HFPERCLKEN1_UART0_DEFAULT << 0)

#define	CMU_HFPERCLKEN1_UART1 (0x1UL << 1)

#define	CMU_HFPERCLKEN1_UART1_DEFAULT ( _CMU_HFPERCLKEN1_UART1_DEFAULT << 1)

#define	CMU_HFPERCLKEN1_VDAC0 (0x1UL << 6)

#define	CMU_HFPERCLKEN1_VDAC0_DEFAULT ( _CMU_HFPERCLKEN1_VDAC0_DEFAULT << 6)

#define	CMU_HFPERCLKEN1_WTIMER0 (0x1UL << 2)

#define	CMU_HFPERCLKEN1_WTIMER0_DEFAULT ( _CMU_HFPERCLKEN1_WTIMER0_DEFAULT << 2)

#define	CMU_HFPERCLKEN1_WTIMER1 (0x1UL << 3)

#define	CMU_HFPERCLKEN1_WTIMER1_DEFAULT ( _CMU_HFPERCLKEN1_WTIMER1_DEFAULT << 3)

#define	CMU_HFPERPRESC_PRESC_DEFAULT ( _CMU_HFPERPRESC_PRESC_DEFAULT << 8)

#define	CMU_HFPERPRESC_PRESC_NODIVISION ( _CMU_HFPERPRESC_PRESC_NODIVISION << 8)

#define	CMU_HFPERPRESCB_PRESC_DEFAULT ( _CMU_HFPERPRESCB_PRESC_DEFAULT << 8)

#define	CMU_HFPERPRESCB_PRESC_NODIVISION ( _CMU_HFPERPRESCB_PRESC_NODIVISION << 8)

#define	CMU_HFPERPRESCC_PRESC_DEFAULT ( _CMU_HFPERPRESCC_PRESC_DEFAULT << 8)

#define	CMU_HFPERPRESCC_PRESC_NODIVISION ( _CMU_HFPERPRESCC_PRESC_NODIVISION << 8)

#define	CMU_HFPRESC_HFCLKLEPRESC_DEFAULT ( _CMU_HFPRESC_HFCLKLEPRESC_DEFAULT << 24)

#define	CMU_HFPRESC_HFCLKLEPRESC_DIV2 ( _CMU_HFPRESC_HFCLKLEPRESC_DIV2 << 24)

#define	CMU_HFPRESC_HFCLKLEPRESC_DIV4 ( _CMU_HFPRESC_HFCLKLEPRESC_DIV4 << 24)

#define	CMU_HFPRESC_HFCLKLEPRESC_DIV8 ( _CMU_HFPRESC_HFCLKLEPRESC_DIV8 << 24)

#define	CMU_HFPRESC_PRESC_DEFAULT ( _CMU_HFPRESC_PRESC_DEFAULT << 8)

#define	CMU_HFPRESC_PRESC_NODIVISION ( _CMU_HFPRESC_PRESC_NODIVISION << 8)

#define	CMU_HFRCOCTRL_CLKDIV_DEFAULT ( _CMU_HFRCOCTRL_CLKDIV_DEFAULT << 25)

#define	CMU_HFRCOCTRL_CLKDIV_DIV1 ( _CMU_HFRCOCTRL_CLKDIV_DIV1 << 25)

#define	CMU_HFRCOCTRL_CLKDIV_DIV2 ( _CMU_HFRCOCTRL_CLKDIV_DIV2 << 25)

#define	CMU_HFRCOCTRL_CLKDIV_DIV4 ( _CMU_HFRCOCTRL_CLKDIV_DIV4 << 25)

#define	CMU_HFRCOCTRL_CMPBIAS_DEFAULT ( _CMU_HFRCOCTRL_CMPBIAS_DEFAULT << 21)

#define	CMU_HFRCOCTRL_FINETUNING_DEFAULT ( _CMU_HFRCOCTRL_FINETUNING_DEFAULT << 8)

#define	CMU_HFRCOCTRL_FINETUNINGEN (0x1UL << 27)

#define	CMU_HFRCOCTRL_FINETUNINGEN_DEFAULT ( _CMU_HFRCOCTRL_FINETUNINGEN_DEFAULT << 27)

#define	CMU_HFRCOCTRL_FREQRANGE_DEFAULT ( _CMU_HFRCOCTRL_FREQRANGE_DEFAULT << 16)

#define	CMU_HFRCOCTRL_LDOHP (0x1UL << 24)

#define	CMU_HFRCOCTRL_LDOHP_DEFAULT ( _CMU_HFRCOCTRL_LDOHP_DEFAULT << 24)

#define	CMU_HFRCOCTRL_TUNING_DEFAULT ( _CMU_HFRCOCTRL_TUNING_DEFAULT << 0)

#define	CMU_HFRCOCTRL_VREFTC_DEFAULT ( _CMU_HFRCOCTRL_VREFTC_DEFAULT << 28)

#define	CMU_HFRCOSS_SSAMP_DEFAULT ( _CMU_HFRCOSS_SSAMP_DEFAULT << 0)

#define	CMU_HFRCOSS_SSINV_DEFAULT ( _CMU_HFRCOSS_SSINV_DEFAULT << 8)

#define	CMU_HFXOCTRL1_PEAKDETTHR_DEFAULT ( _CMU_HFXOCTRL1_PEAKDETTHR_DEFAULT << 12)

#define	CMU_HFXOCTRL1_PEAKDETTHR_THR0 ( _CMU_HFXOCTRL1_PEAKDETTHR_THR0 << 12)

#define	CMU_HFXOCTRL1_PEAKDETTHR_THR1 ( _CMU_HFXOCTRL1_PEAKDETTHR_THR1 << 12)

#define	CMU_HFXOCTRL1_PEAKDETTHR_THR2 ( _CMU_HFXOCTRL1_PEAKDETTHR_THR2 << 12)

#define	CMU_HFXOCTRL1_PEAKDETTHR_THR3 ( _CMU_HFXOCTRL1_PEAKDETTHR_THR3 << 12)

#define	CMU_HFXOCTRL1_PEAKDETTHR_THR4 ( _CMU_HFXOCTRL1_PEAKDETTHR_THR4 << 12)

#define	CMU_HFXOCTRL1_PEAKDETTHR_THR5 ( _CMU_HFXOCTRL1_PEAKDETTHR_THR5 << 12)

#define	CMU_HFXOCTRL1_PEAKDETTHR_THR6 ( _CMU_HFXOCTRL1_PEAKDETTHR_THR6 << 12)

#define	CMU_HFXOCTRL1_PEAKDETTHR_THR7 ( _CMU_HFXOCTRL1_PEAKDETTHR_THR7 << 12)

#define	CMU_HFXOCTRL_AUTOSTARTEM0EM1 (0x1UL << 28)

#define	CMU_HFXOCTRL_AUTOSTARTEM0EM1_DEFAULT ( _CMU_HFXOCTRL_AUTOSTARTEM0EM1_DEFAULT << 28)

#define	CMU_HFXOCTRL_AUTOSTARTSELEM0EM1 (0x1UL << 29)

#define	CMU_HFXOCTRL_AUTOSTARTSELEM0EM1_DEFAULT ( _CMU_HFXOCTRL_AUTOSTARTSELEM0EM1_DEFAULT << 29)

#define	CMU_HFXOCTRL_HFXOX2EN (0x1UL << 3)

#define	CMU_HFXOCTRL_HFXOX2EN_DEFAULT ( _CMU_HFXOCTRL_HFXOX2EN_DEFAULT << 3)

#define	CMU_HFXOCTRL_LFTIMEOUT_0CYCLES ( _CMU_HFXOCTRL_LFTIMEOUT_0CYCLES << 24)

#define	CMU_HFXOCTRL_LFTIMEOUT_16CYCLES ( _CMU_HFXOCTRL_LFTIMEOUT_16CYCLES << 24)

#define	CMU_HFXOCTRL_LFTIMEOUT_1KCYCLES ( _CMU_HFXOCTRL_LFTIMEOUT_1KCYCLES << 24)

#define	CMU_HFXOCTRL_LFTIMEOUT_2CYCLES ( _CMU_HFXOCTRL_LFTIMEOUT_2CYCLES << 24)

#define	CMU_HFXOCTRL_LFTIMEOUT_32CYCLES ( _CMU_HFXOCTRL_LFTIMEOUT_32CYCLES << 24)

#define	CMU_HFXOCTRL_LFTIMEOUT_4CYCLES ( _CMU_HFXOCTRL_LFTIMEOUT_4CYCLES << 24)

#define	CMU_HFXOCTRL_LFTIMEOUT_4KCYCLES ( _CMU_HFXOCTRL_LFTIMEOUT_4KCYCLES << 24)

#define	CMU_HFXOCTRL_LFTIMEOUT_64CYCLES ( _CMU_HFXOCTRL_LFTIMEOUT_64CYCLES << 24)

#define	CMU_HFXOCTRL_LFTIMEOUT_DEFAULT ( _CMU_HFXOCTRL_LFTIMEOUT_DEFAULT << 24)

#define	CMU_HFXOCTRL_MODE_ACBUFEXTCLK ( _CMU_HFXOCTRL_MODE_ACBUFEXTCLK << 0)

#define	CMU_HFXOCTRL_MODE_DCBUFEXTCLK ( _CMU_HFXOCTRL_MODE_DCBUFEXTCLK << 0)

#define	CMU_HFXOCTRL_MODE_DEFAULT ( _CMU_HFXOCTRL_MODE_DEFAULT << 0)

#define	CMU_HFXOCTRL_MODE_DIGEXTCLK ( _CMU_HFXOCTRL_MODE_DIGEXTCLK << 0)

#define	CMU_HFXOCTRL_MODE_XTAL ( _CMU_HFXOCTRL_MODE_XTAL << 0)

#define	CMU_HFXOCTRL_PEAKDETMODE_AUTOCMD ( _CMU_HFXOCTRL_PEAKDETMODE_AUTOCMD << 4)

#define	CMU_HFXOCTRL_PEAKDETMODE_CMD ( _CMU_HFXOCTRL_PEAKDETMODE_CMD << 4)

#define	CMU_HFXOCTRL_PEAKDETMODE_DEFAULT ( _CMU_HFXOCTRL_PEAKDETMODE_DEFAULT << 4)

#define	CMU_HFXOCTRL_PEAKDETMODE_MANUAL ( _CMU_HFXOCTRL_PEAKDETMODE_MANUAL << 4)

#define	CMU_HFXOCTRL_PEAKDETMODE_ONCECMD ( _CMU_HFXOCTRL_PEAKDETMODE_ONCECMD << 4)

#define	CMU_HFXOSTARTUPCTRL_CTUNE_DEFAULT ( _CMU_HFXOSTARTUPCTRL_CTUNE_DEFAULT << 11)

#define	CMU_HFXOSTARTUPCTRL_IBTRIMXOCORE_DEFAULT ( _CMU_HFXOSTARTUPCTRL_IBTRIMXOCORE_DEFAULT << 0)

#define	CMU_HFXOSTEADYSTATECTRL_CTUNE_DEFAULT ( _CMU_HFXOSTEADYSTATECTRL_CTUNE_DEFAULT << 11)

#define	CMU_HFXOSTEADYSTATECTRL_IBTRIMXOCORE_DEFAULT ( _CMU_HFXOSTEADYSTATECTRL_IBTRIMXOCORE_DEFAULT << 0)

#define	CMU_HFXOSTEADYSTATECTRL_PEAKDETEN (0x1UL << 26)

#define	CMU_HFXOSTEADYSTATECTRL_PEAKDETEN_DEFAULT ( _CMU_HFXOSTEADYSTATECTRL_PEAKDETEN_DEFAULT << 26)

#define	CMU_HFXOSTEADYSTATECTRL_PEAKMONEN (0x1UL << 27)

#define	CMU_HFXOSTEADYSTATECTRL_PEAKMONEN_DEFAULT ( _CMU_HFXOSTEADYSTATECTRL_PEAKMONEN_DEFAULT << 27)

#define	CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_128CYCLES ( _CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_128CYCLES << 12)

#define	CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_128KCYCLES ( _CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_128KCYCLES << 12)

#define	CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_16CYCLES ( _CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_16CYCLES << 12)

#define	CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_16KCYCLES ( _CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_16KCYCLES << 12)

#define	CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_1KCYCLES ( _CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_1KCYCLES << 12)

#define	CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_256CYCLES ( _CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_256CYCLES << 12)

#define	CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_2CYCLES ( _CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_2CYCLES << 12)

#define	CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_2KCYCLES ( _CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_2KCYCLES << 12)

#define	CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_32CYCLES ( _CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_32CYCLES << 12)

#define	CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_32KCYCLES ( _CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_32KCYCLES << 12)

#define	CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_4CYCLES ( _CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_4CYCLES << 12)

#define	CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_4KCYCLES ( _CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_4KCYCLES << 12)

#define	CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_64CYCLES ( _CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_64CYCLES << 12)

#define	CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_64KCYCLES ( _CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_64KCYCLES << 12)

#define	CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_8KCYCLES ( _CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_8KCYCLES << 12)

#define	CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_DEFAULT ( _CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_DEFAULT << 12)

#define	CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_128CYCLES ( _CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_128CYCLES << 0)

#define	CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_128KCYCLES ( _CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_128KCYCLES << 0)

#define	CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_16CYCLES ( _CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_16CYCLES << 0)

#define	CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_16KCYCLES ( _CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_16KCYCLES << 0)

#define	CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_1KCYCLES ( _CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_1KCYCLES << 0)

#define	CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_256CYCLES ( _CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_256CYCLES << 0)

#define	CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_2CYCLES ( _CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_2CYCLES << 0)

#define	CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_2KCYCLES ( _CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_2KCYCLES << 0)

#define	CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_32CYCLES ( _CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_32CYCLES << 0)

#define	CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_32KCYCLES ( _CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_32KCYCLES << 0)

#define	CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_4CYCLES ( _CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_4CYCLES << 0)

#define	CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_4KCYCLES ( _CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_4KCYCLES << 0)

#define	CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_64CYCLES ( _CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_64CYCLES << 0)

#define	CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_64KCYCLES ( _CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_64KCYCLES << 0)

#define	CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_8KCYCLES ( _CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_8KCYCLES << 0)

#define	CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_DEFAULT ( _CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_DEFAULT << 0)

#define	CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_128CYCLES ( _CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_128CYCLES << 4)

#define	CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_128KCYCLES ( _CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_128KCYCLES << 4)

#define	CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_16CYCLES ( _CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_16CYCLES << 4)

#define	CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_16KCYCLES ( _CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_16KCYCLES << 4)

#define	CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_1KCYCLES ( _CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_1KCYCLES << 4)

#define	CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_256CYCLES ( _CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_256CYCLES << 4)

#define	CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_2CYCLES ( _CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_2CYCLES << 4)

#define	CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_2KCYCLES ( _CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_2KCYCLES << 4)

#define	CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_32CYCLES ( _CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_32CYCLES << 4)

#define	CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_32KCYCLES ( _CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_32KCYCLES << 4)

#define	CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_4CYCLES ( _CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_4CYCLES << 4)

#define	CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_4KCYCLES ( _CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_4KCYCLES << 4)

#define	CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_64CYCLES ( _CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_64CYCLES << 4)

#define	CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_64KCYCLES ( _CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_64KCYCLES << 4)

#define	CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_8KCYCLES ( _CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_8KCYCLES << 4)

#define	CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_DEFAULT ( _CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_DEFAULT << 4)

#define	CMU_HFXOTRIMSTATUS_IBTRIMXOCORE_DEFAULT ( _CMU_HFXOTRIMSTATUS_IBTRIMXOCORE_DEFAULT << 0)

#define	CMU_HFXOTRIMSTATUS_IBTRIMXOCOREMON_DEFAULT ( _CMU_HFXOTRIMSTATUS_IBTRIMXOCOREMON_DEFAULT << 16)

#define	CMU_HFXOTRIMSTATUS_MONVALID (0x1UL << 31)

#define	CMU_HFXOTRIMSTATUS_MONVALID_DEFAULT ( _CMU_HFXOTRIMSTATUS_MONVALID_DEFAULT << 31)

#define	CMU_HFXOTRIMSTATUS_VALID (0x1UL << 30)

#define	CMU_HFXOTRIMSTATUS_VALID_DEFAULT ( _CMU_HFXOTRIMSTATUS_VALID_DEFAULT << 30)

#define	CMU_IEN_AUXHFRCORDY (0x1UL << 4)

#define	CMU_IEN_AUXHFRCORDY_DEFAULT ( _CMU_IEN_AUXHFRCORDY_DEFAULT << 4)

#define	CMU_IEN_CALOF (0x1UL << 6)

#define	CMU_IEN_CALOF_DEFAULT ( _CMU_IEN_CALOF_DEFAULT << 6)

#define	CMU_IEN_CALRDY (0x1UL << 5)

#define	CMU_IEN_CALRDY_DEFAULT ( _CMU_IEN_CALRDY_DEFAULT << 5)

#define	CMU_IEN_CMUERR (0x1UL << 31)

#define	CMU_IEN_CMUERR_DEFAULT ( _CMU_IEN_CMUERR_DEFAULT << 31)

#define	CMU_IEN_DPLLLOCKFAILHIGH (0x1UL << 17)

#define	CMU_IEN_DPLLLOCKFAILHIGH_DEFAULT ( _CMU_IEN_DPLLLOCKFAILHIGH_DEFAULT << 17)

#define	CMU_IEN_DPLLLOCKFAILLOW (0x1UL << 16)

#define	CMU_IEN_DPLLLOCKFAILLOW_DEFAULT ( _CMU_IEN_DPLLLOCKFAILLOW_DEFAULT << 16)

#define	CMU_IEN_DPLLRDY (0x1UL << 15)

#define	CMU_IEN_DPLLRDY_DEFAULT ( _CMU_IEN_DPLLRDY_DEFAULT << 15)

#define	CMU_IEN_HFRCODIS (0x1UL << 13)

#define	CMU_IEN_HFRCODIS_DEFAULT ( _CMU_IEN_HFRCODIS_DEFAULT << 13)

#define	CMU_IEN_HFRCORDY (0x1UL << 0)

#define	CMU_IEN_HFRCORDY_DEFAULT ( _CMU_IEN_HFRCORDY_DEFAULT << 0)

#define	CMU_IEN_HFXOAUTOSW (0x1UL << 9)

#define	CMU_IEN_HFXOAUTOSW_DEFAULT ( _CMU_IEN_HFXOAUTOSW_DEFAULT << 9)

#define	CMU_IEN_HFXODISERR (0x1UL << 8)

#define	CMU_IEN_HFXODISERR_DEFAULT ( _CMU_IEN_HFXODISERR_DEFAULT << 8)

#define	CMU_IEN_HFXOPEAKDETRDY (0x1UL << 11)

#define	CMU_IEN_HFXOPEAKDETRDY_DEFAULT ( _CMU_IEN_HFXOPEAKDETRDY_DEFAULT << 11)

#define	CMU_IEN_HFXORDY (0x1UL << 1)

#define	CMU_IEN_HFXORDY_DEFAULT ( _CMU_IEN_HFXORDY_DEFAULT << 1)

#define	CMU_IEN_LFRCOEDGE (0x1UL << 28)

#define	CMU_IEN_LFRCOEDGE_DEFAULT ( _CMU_IEN_LFRCOEDGE_DEFAULT << 28)

#define	CMU_IEN_LFRCORDY (0x1UL << 2)

#define	CMU_IEN_LFRCORDY_DEFAULT ( _CMU_IEN_LFRCORDY_DEFAULT << 2)

#define	CMU_IEN_LFTIMEOUTERR (0x1UL << 14)

#define	CMU_IEN_LFTIMEOUTERR_DEFAULT ( _CMU_IEN_LFTIMEOUTERR_DEFAULT << 14)

#define	CMU_IEN_LFXOEDGE (0x1UL << 27)

#define	CMU_IEN_LFXOEDGE_DEFAULT ( _CMU_IEN_LFXOEDGE_DEFAULT << 27)

#define	CMU_IEN_LFXORDY (0x1UL << 3)

#define	CMU_IEN_LFXORDY_DEFAULT ( _CMU_IEN_LFXORDY_DEFAULT << 3)

#define	CMU_IEN_ULFRCOEDGE (0x1UL << 29)

#define	CMU_IEN_ULFRCOEDGE_DEFAULT ( _CMU_IEN_ULFRCOEDGE_DEFAULT << 29)

#define	CMU_IEN_USHFRCORDY (0x1UL << 7)

#define	CMU_IEN_USHFRCORDY_DEFAULT ( _CMU_IEN_USHFRCORDY_DEFAULT << 7)

#define	CMU_IF_AUXHFRCORDY (0x1UL << 4)

#define	CMU_IF_AUXHFRCORDY_DEFAULT ( _CMU_IF_AUXHFRCORDY_DEFAULT << 4)

#define	CMU_IF_CALOF (0x1UL << 6)

#define	CMU_IF_CALOF_DEFAULT ( _CMU_IF_CALOF_DEFAULT << 6)

#define	CMU_IF_CALRDY (0x1UL << 5)

#define	CMU_IF_CALRDY_DEFAULT ( _CMU_IF_CALRDY_DEFAULT << 5)

#define	CMU_IF_CMUERR (0x1UL << 31)

#define	CMU_IF_CMUERR_DEFAULT ( _CMU_IF_CMUERR_DEFAULT << 31)

#define	CMU_IF_DPLLLOCKFAILHIGH (0x1UL << 17)

#define	CMU_IF_DPLLLOCKFAILHIGH_DEFAULT ( _CMU_IF_DPLLLOCKFAILHIGH_DEFAULT << 17)

#define	CMU_IF_DPLLLOCKFAILLOW (0x1UL << 16)

#define	CMU_IF_DPLLLOCKFAILLOW_DEFAULT ( _CMU_IF_DPLLLOCKFAILLOW_DEFAULT << 16)

#define	CMU_IF_DPLLRDY (0x1UL << 15)

#define	CMU_IF_DPLLRDY_DEFAULT ( _CMU_IF_DPLLRDY_DEFAULT << 15)

#define	CMU_IF_HFRCODIS (0x1UL << 13)

#define	CMU_IF_HFRCODIS_DEFAULT ( _CMU_IF_HFRCODIS_DEFAULT << 13)

#define	CMU_IF_HFRCORDY (0x1UL << 0)

#define	CMU_IF_HFRCORDY_DEFAULT ( _CMU_IF_HFRCORDY_DEFAULT << 0)

#define	CMU_IF_HFXOAUTOSW (0x1UL << 9)

#define	CMU_IF_HFXOAUTOSW_DEFAULT ( _CMU_IF_HFXOAUTOSW_DEFAULT << 9)

#define	CMU_IF_HFXODISERR (0x1UL << 8)

#define	CMU_IF_HFXODISERR_DEFAULT ( _CMU_IF_HFXODISERR_DEFAULT << 8)

#define	CMU_IF_HFXOPEAKDETRDY (0x1UL << 11)

#define	CMU_IF_HFXOPEAKDETRDY_DEFAULT ( _CMU_IF_HFXOPEAKDETRDY_DEFAULT << 11)

#define	CMU_IF_HFXORDY (0x1UL << 1)

#define	CMU_IF_HFXORDY_DEFAULT ( _CMU_IF_HFXORDY_DEFAULT << 1)

#define	CMU_IF_LFRCOEDGE (0x1UL << 28)

#define	CMU_IF_LFRCOEDGE_DEFAULT ( _CMU_IF_LFRCOEDGE_DEFAULT << 28)

#define	CMU_IF_LFRCORDY (0x1UL << 2)

#define	CMU_IF_LFRCORDY_DEFAULT ( _CMU_IF_LFRCORDY_DEFAULT << 2)

#define	CMU_IF_LFTIMEOUTERR (0x1UL << 14)

#define	CMU_IF_LFTIMEOUTERR_DEFAULT ( _CMU_IF_LFTIMEOUTERR_DEFAULT << 14)

#define	CMU_IF_LFXOEDGE (0x1UL << 27)

#define	CMU_IF_LFXOEDGE_DEFAULT ( _CMU_IF_LFXOEDGE_DEFAULT << 27)

#define	CMU_IF_LFXORDY (0x1UL << 3)

#define	CMU_IF_LFXORDY_DEFAULT ( _CMU_IF_LFXORDY_DEFAULT << 3)

#define	CMU_IF_ULFRCOEDGE (0x1UL << 29)

#define	CMU_IF_ULFRCOEDGE_DEFAULT ( _CMU_IF_ULFRCOEDGE_DEFAULT << 29)

#define	CMU_IF_USHFRCORDY (0x1UL << 7)

#define	CMU_IF_USHFRCORDY_DEFAULT ( _CMU_IF_USHFRCORDY_DEFAULT << 7)

#define	CMU_IFC_AUXHFRCORDY (0x1UL << 4)

#define	CMU_IFC_AUXHFRCORDY_DEFAULT ( _CMU_IFC_AUXHFRCORDY_DEFAULT << 4)

#define	CMU_IFC_CALOF (0x1UL << 6)

#define	CMU_IFC_CALOF_DEFAULT ( _CMU_IFC_CALOF_DEFAULT << 6)

#define	CMU_IFC_CALRDY (0x1UL << 5)

#define	CMU_IFC_CALRDY_DEFAULT ( _CMU_IFC_CALRDY_DEFAULT << 5)

#define	CMU_IFC_CMUERR (0x1UL << 31)

#define	CMU_IFC_CMUERR_DEFAULT ( _CMU_IFC_CMUERR_DEFAULT << 31)

#define	CMU_IFC_DPLLLOCKFAILHIGH (0x1UL << 17)

#define	CMU_IFC_DPLLLOCKFAILHIGH_DEFAULT ( _CMU_IFC_DPLLLOCKFAILHIGH_DEFAULT << 17)

#define	CMU_IFC_DPLLLOCKFAILLOW (0x1UL << 16)

#define	CMU_IFC_DPLLLOCKFAILLOW_DEFAULT ( _CMU_IFC_DPLLLOCKFAILLOW_DEFAULT << 16)

#define	CMU_IFC_DPLLRDY (0x1UL << 15)

#define	CMU_IFC_DPLLRDY_DEFAULT ( _CMU_IFC_DPLLRDY_DEFAULT << 15)

#define	CMU_IFC_HFRCODIS (0x1UL << 13)

#define	CMU_IFC_HFRCODIS_DEFAULT ( _CMU_IFC_HFRCODIS_DEFAULT << 13)

#define	CMU_IFC_HFRCORDY (0x1UL << 0)

#define	CMU_IFC_HFRCORDY_DEFAULT ( _CMU_IFC_HFRCORDY_DEFAULT << 0)

#define	CMU_IFC_HFXOAUTOSW (0x1UL << 9)

#define	CMU_IFC_HFXOAUTOSW_DEFAULT ( _CMU_IFC_HFXOAUTOSW_DEFAULT << 9)

#define	CMU_IFC_HFXODISERR (0x1UL << 8)

#define	CMU_IFC_HFXODISERR_DEFAULT ( _CMU_IFC_HFXODISERR_DEFAULT << 8)

#define	CMU_IFC_HFXOPEAKDETRDY (0x1UL << 11)

#define	CMU_IFC_HFXOPEAKDETRDY_DEFAULT ( _CMU_IFC_HFXOPEAKDETRDY_DEFAULT << 11)

#define	CMU_IFC_HFXORDY (0x1UL << 1)

#define	CMU_IFC_HFXORDY_DEFAULT ( _CMU_IFC_HFXORDY_DEFAULT << 1)

#define	CMU_IFC_LFRCOEDGE (0x1UL << 28)

#define	CMU_IFC_LFRCOEDGE_DEFAULT ( _CMU_IFC_LFRCOEDGE_DEFAULT << 28)

#define	CMU_IFC_LFRCORDY (0x1UL << 2)

#define	CMU_IFC_LFRCORDY_DEFAULT ( _CMU_IFC_LFRCORDY_DEFAULT << 2)

#define	CMU_IFC_LFTIMEOUTERR (0x1UL << 14)

#define	CMU_IFC_LFTIMEOUTERR_DEFAULT ( _CMU_IFC_LFTIMEOUTERR_DEFAULT << 14)

#define	CMU_IFC_LFXOEDGE (0x1UL << 27)

#define	CMU_IFC_LFXOEDGE_DEFAULT ( _CMU_IFC_LFXOEDGE_DEFAULT << 27)

#define	CMU_IFC_LFXORDY (0x1UL << 3)

#define	CMU_IFC_LFXORDY_DEFAULT ( _CMU_IFC_LFXORDY_DEFAULT << 3)

#define	CMU_IFC_ULFRCOEDGE (0x1UL << 29)

#define	CMU_IFC_ULFRCOEDGE_DEFAULT ( _CMU_IFC_ULFRCOEDGE_DEFAULT << 29)

#define	CMU_IFC_USHFRCORDY (0x1UL << 7)

#define	CMU_IFC_USHFRCORDY_DEFAULT ( _CMU_IFC_USHFRCORDY_DEFAULT << 7)

#define	CMU_IFS_AUXHFRCORDY (0x1UL << 4)

#define	CMU_IFS_AUXHFRCORDY_DEFAULT ( _CMU_IFS_AUXHFRCORDY_DEFAULT << 4)

#define	CMU_IFS_CALOF (0x1UL << 6)

#define	CMU_IFS_CALOF_DEFAULT ( _CMU_IFS_CALOF_DEFAULT << 6)

#define	CMU_IFS_CALRDY (0x1UL << 5)

#define	CMU_IFS_CALRDY_DEFAULT ( _CMU_IFS_CALRDY_DEFAULT << 5)

#define	CMU_IFS_CMUERR (0x1UL << 31)

#define	CMU_IFS_CMUERR_DEFAULT ( _CMU_IFS_CMUERR_DEFAULT << 31)

#define	CMU_IFS_DPLLLOCKFAILHIGH (0x1UL << 17)

#define	CMU_IFS_DPLLLOCKFAILHIGH_DEFAULT ( _CMU_IFS_DPLLLOCKFAILHIGH_DEFAULT << 17)

#define	CMU_IFS_DPLLLOCKFAILLOW (0x1UL << 16)

#define	CMU_IFS_DPLLLOCKFAILLOW_DEFAULT ( _CMU_IFS_DPLLLOCKFAILLOW_DEFAULT << 16)

#define	CMU_IFS_DPLLRDY (0x1UL << 15)

#define	CMU_IFS_DPLLRDY_DEFAULT ( _CMU_IFS_DPLLRDY_DEFAULT << 15)

#define	CMU_IFS_HFRCODIS (0x1UL << 13)

#define	CMU_IFS_HFRCODIS_DEFAULT ( _CMU_IFS_HFRCODIS_DEFAULT << 13)

#define	CMU_IFS_HFRCORDY (0x1UL << 0)

#define	CMU_IFS_HFRCORDY_DEFAULT ( _CMU_IFS_HFRCORDY_DEFAULT << 0)

#define	CMU_IFS_HFXOAUTOSW (0x1UL << 9)

#define	CMU_IFS_HFXOAUTOSW_DEFAULT ( _CMU_IFS_HFXOAUTOSW_DEFAULT << 9)

#define	CMU_IFS_HFXODISERR (0x1UL << 8)

#define	CMU_IFS_HFXODISERR_DEFAULT ( _CMU_IFS_HFXODISERR_DEFAULT << 8)

#define	CMU_IFS_HFXOPEAKDETRDY (0x1UL << 11)

#define	CMU_IFS_HFXOPEAKDETRDY_DEFAULT ( _CMU_IFS_HFXOPEAKDETRDY_DEFAULT << 11)

#define	CMU_IFS_HFXORDY (0x1UL << 1)

#define	CMU_IFS_HFXORDY_DEFAULT ( _CMU_IFS_HFXORDY_DEFAULT << 1)

#define	CMU_IFS_LFRCOEDGE (0x1UL << 28)

#define	CMU_IFS_LFRCOEDGE_DEFAULT ( _CMU_IFS_LFRCOEDGE_DEFAULT << 28)

#define	CMU_IFS_LFRCORDY (0x1UL << 2)

#define	CMU_IFS_LFRCORDY_DEFAULT ( _CMU_IFS_LFRCORDY_DEFAULT << 2)

#define	CMU_IFS_LFTIMEOUTERR (0x1UL << 14)

#define	CMU_IFS_LFTIMEOUTERR_DEFAULT ( _CMU_IFS_LFTIMEOUTERR_DEFAULT << 14)

#define	CMU_IFS_LFXOEDGE (0x1UL << 27)

#define	CMU_IFS_LFXOEDGE_DEFAULT ( _CMU_IFS_LFXOEDGE_DEFAULT << 27)

#define	CMU_IFS_LFXORDY (0x1UL << 3)

#define	CMU_IFS_LFXORDY_DEFAULT ( _CMU_IFS_LFXORDY_DEFAULT << 3)

#define	CMU_IFS_ULFRCOEDGE (0x1UL << 29)

#define	CMU_IFS_ULFRCOEDGE_DEFAULT ( _CMU_IFS_ULFRCOEDGE_DEFAULT << 29)

#define	CMU_IFS_USHFRCORDY (0x1UL << 7)

#define	CMU_IFS_USHFRCORDY_DEFAULT ( _CMU_IFS_USHFRCORDY_DEFAULT << 7)

#define	CMU_LFACLKEN0_LCD (0x1UL << 3)

#define	CMU_LFACLKEN0_LCD_DEFAULT ( _CMU_LFACLKEN0_LCD_DEFAULT << 3)

#define	CMU_LFACLKEN0_LESENSE (0x1UL << 2)

#define	CMU_LFACLKEN0_LESENSE_DEFAULT ( _CMU_LFACLKEN0_LESENSE_DEFAULT << 2)

#define	CMU_LFACLKEN0_LETIMER0 (0x1UL << 0)

#define	CMU_LFACLKEN0_LETIMER0_DEFAULT ( _CMU_LFACLKEN0_LETIMER0_DEFAULT << 0)

#define	CMU_LFACLKEN0_LETIMER1 (0x1UL << 1)

#define	CMU_LFACLKEN0_LETIMER1_DEFAULT ( _CMU_LFACLKEN0_LETIMER1_DEFAULT << 1)

#define	CMU_LFACLKEN0_RTC (0x1UL << 4)

#define	CMU_LFACLKEN0_RTC_DEFAULT ( _CMU_LFACLKEN0_RTC_DEFAULT << 4)

#define	CMU_LFACLKSEL_LFA_DEFAULT ( _CMU_LFACLKSEL_LFA_DEFAULT << 0)

#define	CMU_LFACLKSEL_LFA_DISABLED ( _CMU_LFACLKSEL_LFA_DISABLED << 0)

#define	CMU_LFACLKSEL_LFA_LFRCO ( _CMU_LFACLKSEL_LFA_LFRCO << 0)

#define	CMU_LFACLKSEL_LFA_LFXO ( _CMU_LFACLKSEL_LFA_LFXO << 0)

#define	CMU_LFACLKSEL_LFA_ULFRCO ( _CMU_LFACLKSEL_LFA_ULFRCO << 0)

#define	CMU_LFAPRESC0_LCD_DIV1 ( _CMU_LFAPRESC0_LCD_DIV1 << 12)

#define	CMU_LFAPRESC0_LCD_DIV128 ( _CMU_LFAPRESC0_LCD_DIV128 << 12)

#define	CMU_LFAPRESC0_LCD_DIV16 ( _CMU_LFAPRESC0_LCD_DIV16 << 12)

#define	CMU_LFAPRESC0_LCD_DIV2 ( _CMU_LFAPRESC0_LCD_DIV2 << 12)

#define	CMU_LFAPRESC0_LCD_DIV32 ( _CMU_LFAPRESC0_LCD_DIV32 << 12)

#define	CMU_LFAPRESC0_LCD_DIV4 ( _CMU_LFAPRESC0_LCD_DIV4 << 12)

#define	CMU_LFAPRESC0_LCD_DIV64 ( _CMU_LFAPRESC0_LCD_DIV64 << 12)

#define	CMU_LFAPRESC0_LCD_DIV8 ( _CMU_LFAPRESC0_LCD_DIV8 << 12)

#define	CMU_LFAPRESC0_LESENSE_DIV1 ( _CMU_LFAPRESC0_LESENSE_DIV1 << 8)

#define	CMU_LFAPRESC0_LESENSE_DIV2 ( _CMU_LFAPRESC0_LESENSE_DIV2 << 8)

#define	CMU_LFAPRESC0_LESENSE_DIV4 ( _CMU_LFAPRESC0_LESENSE_DIV4 << 8)

#define	CMU_LFAPRESC0_LESENSE_DIV8 ( _CMU_LFAPRESC0_LESENSE_DIV8 << 8)

#define	CMU_LFAPRESC0_LETIMER0_DIV1 ( _CMU_LFAPRESC0_LETIMER0_DIV1 << 0)

#define	CMU_LFAPRESC0_LETIMER0_DIV1024 ( _CMU_LFAPRESC0_LETIMER0_DIV1024 << 0)

#define	CMU_LFAPRESC0_LETIMER0_DIV128 ( _CMU_LFAPRESC0_LETIMER0_DIV128 << 0)

#define	CMU_LFAPRESC0_LETIMER0_DIV16 ( _CMU_LFAPRESC0_LETIMER0_DIV16 << 0)

#define	CMU_LFAPRESC0_LETIMER0_DIV16384 ( _CMU_LFAPRESC0_LETIMER0_DIV16384 << 0)

#define	CMU_LFAPRESC0_LETIMER0_DIV2 ( _CMU_LFAPRESC0_LETIMER0_DIV2 << 0)

#define	CMU_LFAPRESC0_LETIMER0_DIV2048 ( _CMU_LFAPRESC0_LETIMER0_DIV2048 << 0)

#define	CMU_LFAPRESC0_LETIMER0_DIV256 ( _CMU_LFAPRESC0_LETIMER0_DIV256 << 0)

#define	CMU_LFAPRESC0_LETIMER0_DIV32 ( _CMU_LFAPRESC0_LETIMER0_DIV32 << 0)

#define	CMU_LFAPRESC0_LETIMER0_DIV32768 ( _CMU_LFAPRESC0_LETIMER0_DIV32768 << 0)

#define	CMU_LFAPRESC0_LETIMER0_DIV4 ( _CMU_LFAPRESC0_LETIMER0_DIV4 << 0)

#define	CMU_LFAPRESC0_LETIMER0_DIV4096 ( _CMU_LFAPRESC0_LETIMER0_DIV4096 << 0)

#define	CMU_LFAPRESC0_LETIMER0_DIV512 ( _CMU_LFAPRESC0_LETIMER0_DIV512 << 0)

#define	CMU_LFAPRESC0_LETIMER0_DIV64 ( _CMU_LFAPRESC0_LETIMER0_DIV64 << 0)

#define	CMU_LFAPRESC0_LETIMER0_DIV8 ( _CMU_LFAPRESC0_LETIMER0_DIV8 << 0)

#define	CMU_LFAPRESC0_LETIMER0_DIV8192 ( _CMU_LFAPRESC0_LETIMER0_DIV8192 << 0)

#define	CMU_LFAPRESC0_LETIMER1_DIV1 ( _CMU_LFAPRESC0_LETIMER1_DIV1 << 4)

#define	CMU_LFAPRESC0_LETIMER1_DIV1024 ( _CMU_LFAPRESC0_LETIMER1_DIV1024 << 4)

#define	CMU_LFAPRESC0_LETIMER1_DIV128 ( _CMU_LFAPRESC0_LETIMER1_DIV128 << 4)

#define	CMU_LFAPRESC0_LETIMER1_DIV16 ( _CMU_LFAPRESC0_LETIMER1_DIV16 << 4)

#define	CMU_LFAPRESC0_LETIMER1_DIV16384 ( _CMU_LFAPRESC0_LETIMER1_DIV16384 << 4)

#define	CMU_LFAPRESC0_LETIMER1_DIV2 ( _CMU_LFAPRESC0_LETIMER1_DIV2 << 4)

#define	CMU_LFAPRESC0_LETIMER1_DIV2048 ( _CMU_LFAPRESC0_LETIMER1_DIV2048 << 4)

#define	CMU_LFAPRESC0_LETIMER1_DIV256 ( _CMU_LFAPRESC0_LETIMER1_DIV256 << 4)

#define	CMU_LFAPRESC0_LETIMER1_DIV32 ( _CMU_LFAPRESC0_LETIMER1_DIV32 << 4)

#define	CMU_LFAPRESC0_LETIMER1_DIV32768 ( _CMU_LFAPRESC0_LETIMER1_DIV32768 << 4)

#define	CMU_LFAPRESC0_LETIMER1_DIV4 ( _CMU_LFAPRESC0_LETIMER1_DIV4 << 4)

#define	CMU_LFAPRESC0_LETIMER1_DIV4096 ( _CMU_LFAPRESC0_LETIMER1_DIV4096 << 4)

#define	CMU_LFAPRESC0_LETIMER1_DIV512 ( _CMU_LFAPRESC0_LETIMER1_DIV512 << 4)

#define	CMU_LFAPRESC0_LETIMER1_DIV64 ( _CMU_LFAPRESC0_LETIMER1_DIV64 << 4)

#define	CMU_LFAPRESC0_LETIMER1_DIV8 ( _CMU_LFAPRESC0_LETIMER1_DIV8 << 4)

#define	CMU_LFAPRESC0_LETIMER1_DIV8192 ( _CMU_LFAPRESC0_LETIMER1_DIV8192 << 4)

#define	CMU_LFAPRESC0_RTC_DIV1 ( _CMU_LFAPRESC0_RTC_DIV1 << 16)

#define	CMU_LFAPRESC0_RTC_DIV1024 ( _CMU_LFAPRESC0_RTC_DIV1024 << 16)

#define	CMU_LFAPRESC0_RTC_DIV128 ( _CMU_LFAPRESC0_RTC_DIV128 << 16)

#define	CMU_LFAPRESC0_RTC_DIV16 ( _CMU_LFAPRESC0_RTC_DIV16 << 16)

#define	CMU_LFAPRESC0_RTC_DIV16384 ( _CMU_LFAPRESC0_RTC_DIV16384 << 16)

#define	CMU_LFAPRESC0_RTC_DIV2 ( _CMU_LFAPRESC0_RTC_DIV2 << 16)

#define	CMU_LFAPRESC0_RTC_DIV2048 ( _CMU_LFAPRESC0_RTC_DIV2048 << 16)

#define	CMU_LFAPRESC0_RTC_DIV256 ( _CMU_LFAPRESC0_RTC_DIV256 << 16)

#define	CMU_LFAPRESC0_RTC_DIV32 ( _CMU_LFAPRESC0_RTC_DIV32 << 16)

#define	CMU_LFAPRESC0_RTC_DIV32768 ( _CMU_LFAPRESC0_RTC_DIV32768 << 16)

#define	CMU_LFAPRESC0_RTC_DIV4 ( _CMU_LFAPRESC0_RTC_DIV4 << 16)

#define	CMU_LFAPRESC0_RTC_DIV4096 ( _CMU_LFAPRESC0_RTC_DIV4096 << 16)

#define	CMU_LFAPRESC0_RTC_DIV512 ( _CMU_LFAPRESC0_RTC_DIV512 << 16)

#define	CMU_LFAPRESC0_RTC_DIV64 ( _CMU_LFAPRESC0_RTC_DIV64 << 16)

#define	CMU_LFAPRESC0_RTC_DIV8 ( _CMU_LFAPRESC0_RTC_DIV8 << 16)

#define	CMU_LFAPRESC0_RTC_DIV8192 ( _CMU_LFAPRESC0_RTC_DIV8192 << 16)

#define	CMU_LFBCLKEN0_CSEN (0x1UL << 3)

#define	CMU_LFBCLKEN0_CSEN_DEFAULT ( _CMU_LFBCLKEN0_CSEN_DEFAULT << 3)

#define	CMU_LFBCLKEN0_LEUART0 (0x1UL << 0)

#define	CMU_LFBCLKEN0_LEUART0_DEFAULT ( _CMU_LFBCLKEN0_LEUART0_DEFAULT << 0)

#define	CMU_LFBCLKEN0_LEUART1 (0x1UL << 1)

#define	CMU_LFBCLKEN0_LEUART1_DEFAULT ( _CMU_LFBCLKEN0_LEUART1_DEFAULT << 1)

#define	CMU_LFBCLKEN0_SYSTICK (0x1UL << 2)

#define	CMU_LFBCLKEN0_SYSTICK_DEFAULT ( _CMU_LFBCLKEN0_SYSTICK_DEFAULT << 2)

#define	CMU_LFBCLKSEL_LFB_DEFAULT ( _CMU_LFBCLKSEL_LFB_DEFAULT << 0)

#define	CMU_LFBCLKSEL_LFB_DISABLED ( _CMU_LFBCLKSEL_LFB_DISABLED << 0)

#define	CMU_LFBCLKSEL_LFB_HFCLKLE ( _CMU_LFBCLKSEL_LFB_HFCLKLE << 0)

#define	CMU_LFBCLKSEL_LFB_LFRCO ( _CMU_LFBCLKSEL_LFB_LFRCO << 0)

#define	CMU_LFBCLKSEL_LFB_LFXO ( _CMU_LFBCLKSEL_LFB_LFXO << 0)

#define	CMU_LFBCLKSEL_LFB_ULFRCO ( _CMU_LFBCLKSEL_LFB_ULFRCO << 0)

#define	CMU_LFBPRESC0_CSEN_DIV128 ( _CMU_LFBPRESC0_CSEN_DIV128 << 12)

#define	CMU_LFBPRESC0_CSEN_DIV16 ( _CMU_LFBPRESC0_CSEN_DIV16 << 12)

#define	CMU_LFBPRESC0_CSEN_DIV32 ( _CMU_LFBPRESC0_CSEN_DIV32 << 12)

#define	CMU_LFBPRESC0_CSEN_DIV64 ( _CMU_LFBPRESC0_CSEN_DIV64 << 12)

#define	CMU_LFBPRESC0_LEUART0_DIV1 ( _CMU_LFBPRESC0_LEUART0_DIV1 << 0)

#define	CMU_LFBPRESC0_LEUART0_DIV2 ( _CMU_LFBPRESC0_LEUART0_DIV2 << 0)

#define	CMU_LFBPRESC0_LEUART0_DIV4 ( _CMU_LFBPRESC0_LEUART0_DIV4 << 0)

#define	CMU_LFBPRESC0_LEUART0_DIV8 ( _CMU_LFBPRESC0_LEUART0_DIV8 << 0)

#define	CMU_LFBPRESC0_LEUART1_DIV1 ( _CMU_LFBPRESC0_LEUART1_DIV1 << 4)

#define	CMU_LFBPRESC0_LEUART1_DIV2 ( _CMU_LFBPRESC0_LEUART1_DIV2 << 4)

#define	CMU_LFBPRESC0_LEUART1_DIV4 ( _CMU_LFBPRESC0_LEUART1_DIV4 << 4)

#define	CMU_LFBPRESC0_LEUART1_DIV8 ( _CMU_LFBPRESC0_LEUART1_DIV8 << 4)

#define	CMU_LFBPRESC0_SYSTICK_DIV1 ( _CMU_LFBPRESC0_SYSTICK_DIV1 << 8)

#define	CMU_LFCCLKEN0_USB (0x1UL << 0)

#define	CMU_LFCCLKEN0_USB_DEFAULT ( _CMU_LFCCLKEN0_USB_DEFAULT << 0)

#define	CMU_LFCCLKSEL_LFC_DEFAULT ( _CMU_LFCCLKSEL_LFC_DEFAULT << 0)

#define	CMU_LFCCLKSEL_LFC_DISABLED ( _CMU_LFCCLKSEL_LFC_DISABLED << 0)

#define	CMU_LFCCLKSEL_LFC_LFRCO ( _CMU_LFCCLKSEL_LFC_LFRCO << 0)

#define	CMU_LFCCLKSEL_LFC_LFXO ( _CMU_LFCCLKSEL_LFC_LFXO << 0)

#define	CMU_LFCCLKSEL_LFC_ULFRCO ( _CMU_LFCCLKSEL_LFC_ULFRCO << 0)

#define	CMU_LFECLKEN0_RTCC (0x1UL << 0)

#define	CMU_LFECLKEN0_RTCC_DEFAULT ( _CMU_LFECLKEN0_RTCC_DEFAULT << 0)

#define	CMU_LFECLKSEL_LFE_DEFAULT ( _CMU_LFECLKSEL_LFE_DEFAULT << 0)

#define	CMU_LFECLKSEL_LFE_DISABLED ( _CMU_LFECLKSEL_LFE_DISABLED << 0)

#define	CMU_LFECLKSEL_LFE_LFRCO ( _CMU_LFECLKSEL_LFE_LFRCO << 0)

#define	CMU_LFECLKSEL_LFE_LFXO ( _CMU_LFECLKSEL_LFE_LFXO << 0)

#define	CMU_LFECLKSEL_LFE_ULFRCO ( _CMU_LFECLKSEL_LFE_ULFRCO << 0)

#define	CMU_LFEPRESC0_RTCC_DIV1 ( _CMU_LFEPRESC0_RTCC_DIV1 << 0)

#define	CMU_LFEPRESC0_RTCC_DIV2 ( _CMU_LFEPRESC0_RTCC_DIV2 << 0)

#define	CMU_LFEPRESC0_RTCC_DIV4 ( _CMU_LFEPRESC0_RTCC_DIV4 << 0)

#define	CMU_LFRCOCTRL_ENCHOP (0x1UL << 17)

#define	CMU_LFRCOCTRL_ENCHOP_DEFAULT ( _CMU_LFRCOCTRL_ENCHOP_DEFAULT << 17)

#define	CMU_LFRCOCTRL_ENDEM (0x1UL << 18)

#define	CMU_LFRCOCTRL_ENDEM_DEFAULT ( _CMU_LFRCOCTRL_ENDEM_DEFAULT << 18)

#define	CMU_LFRCOCTRL_ENVREF (0x1UL << 16)

#define	CMU_LFRCOCTRL_ENVREF_DEFAULT ( _CMU_LFRCOCTRL_ENVREF_DEFAULT << 16)

#define	CMU_LFRCOCTRL_GMCCURTUNE_DEFAULT ( _CMU_LFRCOCTRL_GMCCURTUNE_DEFAULT << 28)

#define	CMU_LFRCOCTRL_TIMEOUT_16CYCLES ( _CMU_LFRCOCTRL_TIMEOUT_16CYCLES << 24)

#define	CMU_LFRCOCTRL_TIMEOUT_2CYCLES ( _CMU_LFRCOCTRL_TIMEOUT_2CYCLES << 24)

#define	CMU_LFRCOCTRL_TIMEOUT_32CYCLES ( _CMU_LFRCOCTRL_TIMEOUT_32CYCLES << 24)

#define	CMU_LFRCOCTRL_TIMEOUT_DEFAULT ( _CMU_LFRCOCTRL_TIMEOUT_DEFAULT << 24)

#define	CMU_LFRCOCTRL_TUNING_DEFAULT ( _CMU_LFRCOCTRL_TUNING_DEFAULT << 0)

#define	CMU_LFRCOCTRL_VREFUPDATE_128CYCLES ( _CMU_LFRCOCTRL_VREFUPDATE_128CYCLES << 20)

#define	CMU_LFRCOCTRL_VREFUPDATE_256CYCLES ( _CMU_LFRCOCTRL_VREFUPDATE_256CYCLES << 20)

#define	CMU_LFRCOCTRL_VREFUPDATE_32CYCLES ( _CMU_LFRCOCTRL_VREFUPDATE_32CYCLES << 20)

#define	CMU_LFRCOCTRL_VREFUPDATE_64CYCLES ( _CMU_LFRCOCTRL_VREFUPDATE_64CYCLES << 20)

#define	CMU_LFRCOCTRL_VREFUPDATE_DEFAULT ( _CMU_LFRCOCTRL_VREFUPDATE_DEFAULT << 20)

#define	CMU_LFXOCTRL_AGC (0x1UL << 15)

#define	CMU_LFXOCTRL_AGC_DEFAULT ( _CMU_LFXOCTRL_AGC_DEFAULT << 15)

#define	CMU_LFXOCTRL_BUFCUR (0x1UL << 20)

#define	CMU_LFXOCTRL_BUFCUR_DEFAULT ( _CMU_LFXOCTRL_BUFCUR_DEFAULT << 20)

#define	CMU_LFXOCTRL_CUR_DEFAULT ( _CMU_LFXOCTRL_CUR_DEFAULT << 16)

#define	CMU_LFXOCTRL_GAIN_DEFAULT ( _CMU_LFXOCTRL_GAIN_DEFAULT << 11)

#define	CMU_LFXOCTRL_HIGHAMPL (0x1UL << 14)

#define	CMU_LFXOCTRL_HIGHAMPL_DEFAULT ( _CMU_LFXOCTRL_HIGHAMPL_DEFAULT << 14)

#define	CMU_LFXOCTRL_MODE_BUFEXTCLK ( _CMU_LFXOCTRL_MODE_BUFEXTCLK << 8)

#define	CMU_LFXOCTRL_MODE_DEFAULT ( _CMU_LFXOCTRL_MODE_DEFAULT << 8)

#define	CMU_LFXOCTRL_MODE_DIGEXTCLK ( _CMU_LFXOCTRL_MODE_DIGEXTCLK << 8)

#define	CMU_LFXOCTRL_MODE_XTAL ( _CMU_LFXOCTRL_MODE_XTAL << 8)

#define	CMU_LFXOCTRL_TIMEOUT_16KCYCLES ( _CMU_LFXOCTRL_TIMEOUT_16KCYCLES << 24)

#define	CMU_LFXOCTRL_TIMEOUT_1KCYCLES ( _CMU_LFXOCTRL_TIMEOUT_1KCYCLES << 24)

#define	CMU_LFXOCTRL_TIMEOUT_256CYCLES ( _CMU_LFXOCTRL_TIMEOUT_256CYCLES << 24)

#define	CMU_LFXOCTRL_TIMEOUT_2CYCLES ( _CMU_LFXOCTRL_TIMEOUT_2CYCLES << 24)

#define	CMU_LFXOCTRL_TIMEOUT_2KCYCLES ( _CMU_LFXOCTRL_TIMEOUT_2KCYCLES << 24)

#define	CMU_LFXOCTRL_TIMEOUT_32KCYCLES ( _CMU_LFXOCTRL_TIMEOUT_32KCYCLES << 24)

#define	CMU_LFXOCTRL_TIMEOUT_4KCYCLES ( _CMU_LFXOCTRL_TIMEOUT_4KCYCLES << 24)

#define	CMU_LFXOCTRL_TIMEOUT_8KCYCLES ( _CMU_LFXOCTRL_TIMEOUT_8KCYCLES << 24)

#define	CMU_LFXOCTRL_TIMEOUT_DEFAULT ( _CMU_LFXOCTRL_TIMEOUT_DEFAULT << 24)

#define	CMU_LFXOCTRL_TUNING_DEFAULT ( _CMU_LFXOCTRL_TUNING_DEFAULT << 0)

#define	CMU_LOCK_LOCKKEY_DEFAULT ( _CMU_LOCK_LOCKKEY_DEFAULT << 0)

#define	CMU_LOCK_LOCKKEY_LOCK ( _CMU_LOCK_LOCKKEY_LOCK << 0)

#define	CMU_LOCK_LOCKKEY_LOCKED ( _CMU_LOCK_LOCKKEY_LOCKED << 0)

#define	CMU_LOCK_LOCKKEY_UNLOCK ( _CMU_LOCK_LOCKKEY_UNLOCK << 0)

#define	CMU_LOCK_LOCKKEY_UNLOCKED ( _CMU_LOCK_LOCKKEY_UNLOCKED << 0)

#define	CMU_OSCENCMD_AUXHFRCODIS (0x1UL << 5)

#define	CMU_OSCENCMD_AUXHFRCODIS_DEFAULT ( _CMU_OSCENCMD_AUXHFRCODIS_DEFAULT << 5)

#define	CMU_OSCENCMD_AUXHFRCOEN (0x1UL << 4)

#define	CMU_OSCENCMD_AUXHFRCOEN_DEFAULT ( _CMU_OSCENCMD_AUXHFRCOEN_DEFAULT << 4)

#define	CMU_OSCENCMD_DPLLDIS (0x1UL << 13)

#define	CMU_OSCENCMD_DPLLDIS_DEFAULT ( _CMU_OSCENCMD_DPLLDIS_DEFAULT << 13)

#define	CMU_OSCENCMD_DPLLEN (0x1UL << 12)

#define	CMU_OSCENCMD_DPLLEN_DEFAULT ( _CMU_OSCENCMD_DPLLEN_DEFAULT << 12)

#define	CMU_OSCENCMD_HFRCODIS (0x1UL << 1)

#define	CMU_OSCENCMD_HFRCODIS_DEFAULT ( _CMU_OSCENCMD_HFRCODIS_DEFAULT << 1)

#define	CMU_OSCENCMD_HFRCOEN (0x1UL << 0)

#define	CMU_OSCENCMD_HFRCOEN_DEFAULT ( _CMU_OSCENCMD_HFRCOEN_DEFAULT << 0)

#define	CMU_OSCENCMD_HFXODIS (0x1UL << 3)

#define	CMU_OSCENCMD_HFXODIS_DEFAULT ( _CMU_OSCENCMD_HFXODIS_DEFAULT << 3)

#define	CMU_OSCENCMD_HFXOEN (0x1UL << 2)

#define	CMU_OSCENCMD_HFXOEN_DEFAULT ( _CMU_OSCENCMD_HFXOEN_DEFAULT << 2)

#define	CMU_OSCENCMD_LFRCODIS (0x1UL << 7)

#define	CMU_OSCENCMD_LFRCODIS_DEFAULT ( _CMU_OSCENCMD_LFRCODIS_DEFAULT << 7)

#define	CMU_OSCENCMD_LFRCOEN (0x1UL << 6)

#define	CMU_OSCENCMD_LFRCOEN_DEFAULT ( _CMU_OSCENCMD_LFRCOEN_DEFAULT << 6)

#define	CMU_OSCENCMD_LFXODIS (0x1UL << 9)

#define	CMU_OSCENCMD_LFXODIS_DEFAULT ( _CMU_OSCENCMD_LFXODIS_DEFAULT << 9)

#define	CMU_OSCENCMD_LFXOEN (0x1UL << 8)

#define	CMU_OSCENCMD_LFXOEN_DEFAULT ( _CMU_OSCENCMD_LFXOEN_DEFAULT << 8)

#define	CMU_OSCENCMD_USHFRCODIS (0x1UL << 11)

#define	CMU_OSCENCMD_USHFRCODIS_DEFAULT ( _CMU_OSCENCMD_USHFRCODIS_DEFAULT << 11)

#define	CMU_OSCENCMD_USHFRCOEN (0x1UL << 10)

#define	CMU_OSCENCMD_USHFRCOEN_DEFAULT ( _CMU_OSCENCMD_USHFRCOEN_DEFAULT << 10)

#define	CMU_PCNTCTRL_PCNT0CLKEN (0x1UL << 0)

#define	CMU_PCNTCTRL_PCNT0CLKEN_DEFAULT ( _CMU_PCNTCTRL_PCNT0CLKEN_DEFAULT << 0)

#define	CMU_PCNTCTRL_PCNT0CLKSEL (0x1UL << 1)

#define	CMU_PCNTCTRL_PCNT0CLKSEL_DEFAULT ( _CMU_PCNTCTRL_PCNT0CLKSEL_DEFAULT << 1)

#define	CMU_PCNTCTRL_PCNT0CLKSEL_LFACLK ( _CMU_PCNTCTRL_PCNT0CLKSEL_LFACLK << 1)

#define	CMU_PCNTCTRL_PCNT0CLKSEL_PCNT0S0 ( _CMU_PCNTCTRL_PCNT0CLKSEL_PCNT0S0 << 1)

#define	CMU_PCNTCTRL_PCNT1CLKEN (0x1UL << 2)

#define	CMU_PCNTCTRL_PCNT1CLKEN_DEFAULT ( _CMU_PCNTCTRL_PCNT1CLKEN_DEFAULT << 2)

#define	CMU_PCNTCTRL_PCNT1CLKSEL (0x1UL << 3)

#define	CMU_PCNTCTRL_PCNT1CLKSEL_DEFAULT ( _CMU_PCNTCTRL_PCNT1CLKSEL_DEFAULT << 3)

#define	CMU_PCNTCTRL_PCNT1CLKSEL_LFACLK ( _CMU_PCNTCTRL_PCNT1CLKSEL_LFACLK << 3)

#define	CMU_PCNTCTRL_PCNT1CLKSEL_PCNT1S0 ( _CMU_PCNTCTRL_PCNT1CLKSEL_PCNT1S0 << 3)

#define	CMU_PCNTCTRL_PCNT2CLKEN (0x1UL << 4)

#define	CMU_PCNTCTRL_PCNT2CLKEN_DEFAULT ( _CMU_PCNTCTRL_PCNT2CLKEN_DEFAULT << 4)

#define	CMU_PCNTCTRL_PCNT2CLKSEL (0x1UL << 5)

#define	CMU_PCNTCTRL_PCNT2CLKSEL_DEFAULT ( _CMU_PCNTCTRL_PCNT2CLKSEL_DEFAULT << 5)

#define	CMU_PCNTCTRL_PCNT2CLKSEL_LFACLK ( _CMU_PCNTCTRL_PCNT2CLKSEL_LFACLK << 5)

#define	CMU_PCNTCTRL_PCNT2CLKSEL_PCNT2S0 ( _CMU_PCNTCTRL_PCNT2CLKSEL_PCNT2S0 << 5)

#define	CMU_PDMCTRL_PDMCLKEN (0x1UL << 7)

#define	CMU_PDMCTRL_PDMCLKEN_DEFAULT ( _CMU_PDMCTRL_PDMCLKEN_DEFAULT << 7)

#define	CMU_PDMCTRL_PDMCLKSEL_CLKIN0 ( _CMU_PDMCTRL_PDMCLKSEL_CLKIN0 << 0)

#define	CMU_PDMCTRL_PDMCLKSEL_DEFAULT ( _CMU_PDMCTRL_PDMCLKSEL_DEFAULT << 0)

#define	CMU_PDMCTRL_PDMCLKSEL_HFRCO ( _CMU_PDMCTRL_PDMCLKSEL_HFRCO << 0)

#define	CMU_PDMCTRL_PDMCLKSEL_HFXO ( _CMU_PDMCTRL_PDMCLKSEL_HFXO << 0)

#define	CMU_PDMCTRL_PDMCLKSEL_USHFRCO ( _CMU_PDMCTRL_PDMCLKSEL_USHFRCO << 0)

#define	CMU_QSPICTRL_QSPI0CLKDIS (0x1UL << 7)

#define	CMU_QSPICTRL_QSPI0CLKDIS_DEFAULT ( _CMU_QSPICTRL_QSPI0CLKDIS_DEFAULT << 7)

#define	CMU_QSPICTRL_QSPI0CLKSEL_AUXHFRCO ( _CMU_QSPICTRL_QSPI0CLKSEL_AUXHFRCO << 0)

#define	CMU_QSPICTRL_QSPI0CLKSEL_DEFAULT ( _CMU_QSPICTRL_QSPI0CLKSEL_DEFAULT << 0)

#define	CMU_QSPICTRL_QSPI0CLKSEL_HFRCO ( _CMU_QSPICTRL_QSPI0CLKSEL_HFRCO << 0)

#define	CMU_QSPICTRL_QSPI0CLKSEL_HFXO ( _CMU_QSPICTRL_QSPI0CLKSEL_HFXO << 0)

#define	CMU_QSPICTRL_QSPI0CLKSEL_USHFRCO ( _CMU_QSPICTRL_QSPI0CLKSEL_USHFRCO << 0)

#define	CMU_ROUTELOC0_CLKOUT0LOC_DEFAULT ( _CMU_ROUTELOC0_CLKOUT0LOC_DEFAULT << 0)

#define	CMU_ROUTELOC0_CLKOUT0LOC_LOC0 ( _CMU_ROUTELOC0_CLKOUT0LOC_LOC0 << 0)

#define	CMU_ROUTELOC0_CLKOUT0LOC_LOC1 ( _CMU_ROUTELOC0_CLKOUT0LOC_LOC1 << 0)

#define	CMU_ROUTELOC0_CLKOUT0LOC_LOC2 ( _CMU_ROUTELOC0_CLKOUT0LOC_LOC2 << 0)

#define	CMU_ROUTELOC0_CLKOUT0LOC_LOC3 ( _CMU_ROUTELOC0_CLKOUT0LOC_LOC3 << 0)

#define	CMU_ROUTELOC0_CLKOUT0LOC_LOC4 ( _CMU_ROUTELOC0_CLKOUT0LOC_LOC4 << 0)

#define	CMU_ROUTELOC0_CLKOUT0LOC_LOC5 ( _CMU_ROUTELOC0_CLKOUT0LOC_LOC5 << 0)

#define	CMU_ROUTELOC0_CLKOUT1LOC_DEFAULT ( _CMU_ROUTELOC0_CLKOUT1LOC_DEFAULT << 8)

#define	CMU_ROUTELOC0_CLKOUT1LOC_LOC0 ( _CMU_ROUTELOC0_CLKOUT1LOC_LOC0 << 8)

#define	CMU_ROUTELOC0_CLKOUT1LOC_LOC1 ( _CMU_ROUTELOC0_CLKOUT1LOC_LOC1 << 8)

#define	CMU_ROUTELOC0_CLKOUT1LOC_LOC2 ( _CMU_ROUTELOC0_CLKOUT1LOC_LOC2 << 8)

#define	CMU_ROUTELOC0_CLKOUT1LOC_LOC3 ( _CMU_ROUTELOC0_CLKOUT1LOC_LOC3 << 8)

#define	CMU_ROUTELOC0_CLKOUT1LOC_LOC4 ( _CMU_ROUTELOC0_CLKOUT1LOC_LOC4 << 8)

#define	CMU_ROUTELOC0_CLKOUT1LOC_LOC5 ( _CMU_ROUTELOC0_CLKOUT1LOC_LOC5 << 8)

#define	CMU_ROUTELOC0_CLKOUT2LOC_DEFAULT ( _CMU_ROUTELOC0_CLKOUT2LOC_DEFAULT << 16)

#define	CMU_ROUTELOC0_CLKOUT2LOC_LOC0 ( _CMU_ROUTELOC0_CLKOUT2LOC_LOC0 << 16)

#define	CMU_ROUTELOC0_CLKOUT2LOC_LOC1 ( _CMU_ROUTELOC0_CLKOUT2LOC_LOC1 << 16)

#define	CMU_ROUTELOC0_CLKOUT2LOC_LOC2 ( _CMU_ROUTELOC0_CLKOUT2LOC_LOC2 << 16)

#define	CMU_ROUTELOC0_CLKOUT2LOC_LOC3 ( _CMU_ROUTELOC0_CLKOUT2LOC_LOC3 << 16)

#define	CMU_ROUTELOC0_CLKOUT2LOC_LOC4 ( _CMU_ROUTELOC0_CLKOUT2LOC_LOC4 << 16)

#define	CMU_ROUTELOC0_CLKOUT2LOC_LOC5 ( _CMU_ROUTELOC0_CLKOUT2LOC_LOC5 << 16)

#define	CMU_ROUTELOC1_CLKIN0LOC_DEFAULT ( _CMU_ROUTELOC1_CLKIN0LOC_DEFAULT << 0)

#define	CMU_ROUTELOC1_CLKIN0LOC_LOC0 ( _CMU_ROUTELOC1_CLKIN0LOC_LOC0 << 0)

#define	CMU_ROUTELOC1_CLKIN0LOC_LOC1 ( _CMU_ROUTELOC1_CLKIN0LOC_LOC1 << 0)

#define	CMU_ROUTELOC1_CLKIN0LOC_LOC2 ( _CMU_ROUTELOC1_CLKIN0LOC_LOC2 << 0)

#define	CMU_ROUTELOC1_CLKIN0LOC_LOC3 ( _CMU_ROUTELOC1_CLKIN0LOC_LOC3 << 0)

#define	CMU_ROUTELOC1_CLKIN0LOC_LOC4 ( _CMU_ROUTELOC1_CLKIN0LOC_LOC4 << 0)

#define	CMU_ROUTELOC1_CLKIN0LOC_LOC5 ( _CMU_ROUTELOC1_CLKIN0LOC_LOC5 << 0)

#define	CMU_ROUTELOC1_CLKIN0LOC_LOC6 ( _CMU_ROUTELOC1_CLKIN0LOC_LOC6 << 0)

#define	CMU_ROUTELOC1_CLKIN0LOC_LOC7 ( _CMU_ROUTELOC1_CLKIN0LOC_LOC7 << 0)

#define	CMU_ROUTEPEN_CLKIN0PEN (0x1UL << 28)

#define	CMU_ROUTEPEN_CLKIN0PEN_DEFAULT ( _CMU_ROUTEPEN_CLKIN0PEN_DEFAULT << 28)

#define	CMU_ROUTEPEN_CLKOUT0PEN (0x1UL << 0)

#define	CMU_ROUTEPEN_CLKOUT0PEN_DEFAULT ( _CMU_ROUTEPEN_CLKOUT0PEN_DEFAULT << 0)

#define	CMU_ROUTEPEN_CLKOUT1PEN (0x1UL << 1)

#define	CMU_ROUTEPEN_CLKOUT1PEN_DEFAULT ( _CMU_ROUTEPEN_CLKOUT1PEN_DEFAULT << 1)

#define	CMU_ROUTEPEN_CLKOUT2PEN (0x1UL << 2)

#define	CMU_ROUTEPEN_CLKOUT2PEN_DEFAULT ( _CMU_ROUTEPEN_CLKOUT2PEN_DEFAULT << 2)

#define	CMU_SDIOCTRL_SDIOCLKDIS (0x1UL << 7)

#define	CMU_SDIOCTRL_SDIOCLKDIS_DEFAULT ( _CMU_SDIOCTRL_SDIOCLKDIS_DEFAULT << 7)

#define	CMU_SDIOCTRL_SDIOCLKSEL_AUXHFRCO ( _CMU_SDIOCTRL_SDIOCLKSEL_AUXHFRCO << 0)

#define	CMU_SDIOCTRL_SDIOCLKSEL_DEFAULT ( _CMU_SDIOCTRL_SDIOCLKSEL_DEFAULT << 0)

#define	CMU_SDIOCTRL_SDIOCLKSEL_HFRCO ( _CMU_SDIOCTRL_SDIOCLKSEL_HFRCO << 0)

#define	CMU_SDIOCTRL_SDIOCLKSEL_HFXO ( _CMU_SDIOCTRL_SDIOCLKSEL_HFXO << 0)

#define	CMU_SDIOCTRL_SDIOCLKSEL_USHFRCO ( _CMU_SDIOCTRL_SDIOCLKSEL_USHFRCO << 0)

#define	CMU_STATUS_AUXHFRCOENS (0x1UL << 4)

#define	CMU_STATUS_AUXHFRCOENS_DEFAULT ( _CMU_STATUS_AUXHFRCOENS_DEFAULT << 4)

#define	CMU_STATUS_AUXHFRCORDY (0x1UL << 5)

#define	CMU_STATUS_AUXHFRCORDY_DEFAULT ( _CMU_STATUS_AUXHFRCORDY_DEFAULT << 5)

#define	CMU_STATUS_CALRDY (0x1UL << 16)

#define	CMU_STATUS_CALRDY_DEFAULT ( _CMU_STATUS_CALRDY_DEFAULT << 16)

#define	CMU_STATUS_DPLLENS (0x1UL << 12)

#define	CMU_STATUS_DPLLENS_DEFAULT ( _CMU_STATUS_DPLLENS_DEFAULT << 12)

#define	CMU_STATUS_DPLLRDY (0x1UL << 13)

#define	CMU_STATUS_DPLLRDY_DEFAULT ( _CMU_STATUS_DPLLRDY_DEFAULT << 13)

#define	CMU_STATUS_HFRCOENS (0x1UL << 0)

#define	CMU_STATUS_HFRCOENS_DEFAULT ( _CMU_STATUS_HFRCOENS_DEFAULT << 0)

#define	CMU_STATUS_HFRCORDY (0x1UL << 1)

#define	CMU_STATUS_HFRCORDY_DEFAULT ( _CMU_STATUS_HFRCORDY_DEFAULT << 1)

#define	CMU_STATUS_HFXOAMPLOW (0x1UL << 25)

#define	CMU_STATUS_HFXOAMPLOW_DEFAULT ( _CMU_STATUS_HFXOAMPLOW_DEFAULT << 25)

#define	CMU_STATUS_HFXOENS (0x1UL << 2)

#define	CMU_STATUS_HFXOENS_DEFAULT ( _CMU_STATUS_HFXOENS_DEFAULT << 2)

#define	CMU_STATUS_HFXOPEAKDETRDY (0x1UL << 22)

#define	CMU_STATUS_HFXOPEAKDETRDY_DEFAULT ( _CMU_STATUS_HFXOPEAKDETRDY_DEFAULT << 22)

#define	CMU_STATUS_HFXORDY (0x1UL << 3)

#define	CMU_STATUS_HFXORDY_DEFAULT ( _CMU_STATUS_HFXORDY_DEFAULT << 3)

#define	CMU_STATUS_LFRCOENS (0x1UL << 6)

#define	CMU_STATUS_LFRCOENS_DEFAULT ( _CMU_STATUS_LFRCOENS_DEFAULT << 6)

#define	CMU_STATUS_LFRCOPHASE (0x1UL << 28)

#define	CMU_STATUS_LFRCOPHASE_DEFAULT ( _CMU_STATUS_LFRCOPHASE_DEFAULT << 28)

#define	CMU_STATUS_LFRCORDY (0x1UL << 7)

#define	CMU_STATUS_LFRCORDY_DEFAULT ( _CMU_STATUS_LFRCORDY_DEFAULT << 7)

#define	CMU_STATUS_LFXOENS (0x1UL << 8)

#define	CMU_STATUS_LFXOENS_DEFAULT ( _CMU_STATUS_LFXOENS_DEFAULT << 8)

#define	CMU_STATUS_LFXOPHASE (0x1UL << 27)

#define	CMU_STATUS_LFXOPHASE_DEFAULT ( _CMU_STATUS_LFXOPHASE_DEFAULT << 27)

#define	CMU_STATUS_LFXORDY (0x1UL << 9)

#define	CMU_STATUS_LFXORDY_DEFAULT ( _CMU_STATUS_LFXORDY_DEFAULT << 9)

#define	CMU_STATUS_PDMCLKENS (0x1UL << 19)

#define	CMU_STATUS_PDMCLKENS_DEFAULT ( _CMU_STATUS_PDMCLKENS_DEFAULT << 19)

#define	CMU_STATUS_QSPI0CLKENS (0x1UL << 18)

#define	CMU_STATUS_QSPI0CLKENS_DEFAULT ( _CMU_STATUS_QSPI0CLKENS_DEFAULT << 18)

#define	CMU_STATUS_SDIOCLKENS (0x1UL << 17)

#define	CMU_STATUS_SDIOCLKENS_DEFAULT ( _CMU_STATUS_SDIOCLKENS_DEFAULT << 17)

#define	CMU_STATUS_ULFRCOPHASE (0x1UL << 29)

#define	CMU_STATUS_ULFRCOPHASE_DEFAULT ( _CMU_STATUS_ULFRCOPHASE_DEFAULT << 29)

#define	CMU_STATUS_USHFRCOENS (0x1UL << 10)

#define	CMU_STATUS_USHFRCOENS_DEFAULT ( _CMU_STATUS_USHFRCOENS_DEFAULT << 10)

#define	CMU_STATUS_USHFRCORDY (0x1UL << 11)

#define	CMU_STATUS_USHFRCORDY_DEFAULT ( _CMU_STATUS_USHFRCORDY_DEFAULT << 11)

#define	CMU_SYNCBUSY_AUXHFRCOBSY (0x1UL << 25)

#define	CMU_SYNCBUSY_AUXHFRCOBSY_DEFAULT ( _CMU_SYNCBUSY_AUXHFRCOBSY_DEFAULT << 25)

#define	CMU_SYNCBUSY_HFRCOBSY (0x1UL << 24)

#define	CMU_SYNCBUSY_HFRCOBSY_DEFAULT ( _CMU_SYNCBUSY_HFRCOBSY_DEFAULT << 24)

#define	CMU_SYNCBUSY_HFXOBSY (0x1UL << 28)

#define	CMU_SYNCBUSY_HFXOBSY_DEFAULT ( _CMU_SYNCBUSY_HFXOBSY_DEFAULT << 28)

#define	CMU_SYNCBUSY_LFACLKEN0 (0x1UL << 0)

#define	CMU_SYNCBUSY_LFACLKEN0_DEFAULT ( _CMU_SYNCBUSY_LFACLKEN0_DEFAULT << 0)

#define	CMU_SYNCBUSY_LFAPRESC0 (0x1UL << 2)

#define	CMU_SYNCBUSY_LFAPRESC0_DEFAULT ( _CMU_SYNCBUSY_LFAPRESC0_DEFAULT << 2)

#define	CMU_SYNCBUSY_LFBCLKEN0 (0x1UL << 4)

#define	CMU_SYNCBUSY_LFBCLKEN0_DEFAULT ( _CMU_SYNCBUSY_LFBCLKEN0_DEFAULT << 4)

#define	CMU_SYNCBUSY_LFBPRESC0 (0x1UL << 6)

#define	CMU_SYNCBUSY_LFBPRESC0_DEFAULT ( _CMU_SYNCBUSY_LFBPRESC0_DEFAULT << 6)

#define	CMU_SYNCBUSY_LFCCLKEN0 (0x1UL << 8)

#define	CMU_SYNCBUSY_LFCCLKEN0_DEFAULT ( _CMU_SYNCBUSY_LFCCLKEN0_DEFAULT << 8)

#define	CMU_SYNCBUSY_LFECLKEN0 (0x1UL << 16)

#define	CMU_SYNCBUSY_LFECLKEN0_DEFAULT ( _CMU_SYNCBUSY_LFECLKEN0_DEFAULT << 16)

#define	CMU_SYNCBUSY_LFEPRESC0 (0x1UL << 18)

#define	CMU_SYNCBUSY_LFEPRESC0_DEFAULT ( _CMU_SYNCBUSY_LFEPRESC0_DEFAULT << 18)

#define	CMU_SYNCBUSY_LFRCOBSY (0x1UL << 26)

#define	CMU_SYNCBUSY_LFRCOBSY_DEFAULT ( _CMU_SYNCBUSY_LFRCOBSY_DEFAULT << 26)

#define	CMU_SYNCBUSY_LFRCOVREFBSY (0x1UL << 27)

#define	CMU_SYNCBUSY_LFRCOVREFBSY_DEFAULT ( _CMU_SYNCBUSY_LFRCOVREFBSY_DEFAULT << 27)

#define	CMU_SYNCBUSY_LFXOBSY (0x1UL << 29)

#define	CMU_SYNCBUSY_LFXOBSY_DEFAULT ( _CMU_SYNCBUSY_LFXOBSY_DEFAULT << 29)

#define	CMU_SYNCBUSY_USHFRCOBSY (0x1UL << 30)

#define	CMU_SYNCBUSY_USHFRCOBSY_DEFAULT ( _CMU_SYNCBUSY_USHFRCOBSY_DEFAULT << 30)

#define	CMU_USBCRCTRL_USBCREN (0x1UL << 0)

#define	CMU_USBCRCTRL_USBCREN_DEFAULT ( _CMU_USBCRCTRL_USBCREN_DEFAULT << 0)

#define	CMU_USBCRCTRL_USBLSCRMD (0x1UL << 1)

#define	CMU_USBCRCTRL_USBLSCRMD_DEFAULT ( _CMU_USBCRCTRL_USBLSCRMD_DEFAULT << 1)

#define	CMU_USBCTRL_USBCLKEN (0x1UL << 7)

#define	CMU_USBCTRL_USBCLKEN_DEFAULT ( _CMU_USBCTRL_USBCLKEN_DEFAULT << 7)

#define	CMU_USBCTRL_USBCLKSEL_DEFAULT ( _CMU_USBCTRL_USBCLKSEL_DEFAULT << 0)

#define	CMU_USBCTRL_USBCLKSEL_HFRCO ( _CMU_USBCTRL_USBCLKSEL_HFRCO << 0)

#define	CMU_USBCTRL_USBCLKSEL_HFXO ( _CMU_USBCTRL_USBCLKSEL_HFXO << 0)

#define	CMU_USBCTRL_USBCLKSEL_HFXOX2 ( _CMU_USBCTRL_USBCLKSEL_HFXOX2 << 0)

#define	CMU_USBCTRL_USBCLKSEL_LFRCO ( _CMU_USBCTRL_USBCLKSEL_LFRCO << 0)

#define	CMU_USBCTRL_USBCLKSEL_LFXO ( _CMU_USBCTRL_USBCLKSEL_LFXO << 0)

#define	CMU_USBCTRL_USBCLKSEL_USHFRCO ( _CMU_USBCTRL_USBCLKSEL_USHFRCO << 0)

#define	CMU_USHFRCOCTRL_CLKDIV_DEFAULT ( _CMU_USHFRCOCTRL_CLKDIV_DEFAULT << 25)

#define	CMU_USHFRCOCTRL_CLKDIV_DIV1 ( _CMU_USHFRCOCTRL_CLKDIV_DIV1 << 25)

#define	CMU_USHFRCOCTRL_CLKDIV_DIV2 ( _CMU_USHFRCOCTRL_CLKDIV_DIV2 << 25)

#define	CMU_USHFRCOCTRL_CLKDIV_DIV4 ( _CMU_USHFRCOCTRL_CLKDIV_DIV4 << 25)

#define	CMU_USHFRCOCTRL_CMPBIAS_DEFAULT ( _CMU_USHFRCOCTRL_CMPBIAS_DEFAULT << 21)

#define	CMU_USHFRCOCTRL_FINETUNING_DEFAULT ( _CMU_USHFRCOCTRL_FINETUNING_DEFAULT << 8)

#define	CMU_USHFRCOCTRL_FINETUNINGEN (0x1UL << 27)

#define	CMU_USHFRCOCTRL_FINETUNINGEN_DEFAULT ( _CMU_USHFRCOCTRL_FINETUNINGEN_DEFAULT << 27)

#define	CMU_USHFRCOCTRL_FREQRANGE_DEFAULT ( _CMU_USHFRCOCTRL_FREQRANGE_DEFAULT << 16)

#define	CMU_USHFRCOCTRL_LDOHP (0x1UL << 24)

#define	CMU_USHFRCOCTRL_LDOHP_DEFAULT ( _CMU_USHFRCOCTRL_LDOHP_DEFAULT << 24)

#define	CMU_USHFRCOCTRL_TUNING_DEFAULT ( _CMU_USHFRCOCTRL_TUNING_DEFAULT << 0)

#define	CMU_USHFRCOCTRL_VREFTC_DEFAULT ( _CMU_USHFRCOCTRL_VREFTC_DEFAULT << 28)

Macro Definition Documentation

#define _CMU_ADCCTRL_ADC0CLKDIV_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_ADCCTRL

Definition at line 2367 of file efm32gg12b_cmu.h .

#define _CMU_ADCCTRL_ADC0CLKDIV_MASK 0x3UL

Bit mask for CMU_ADC0CLKDIV

Definition at line 2366 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockFreqGet() , CMU_ClockPrescGet() , and CMU_ClockPrescSet() .

#define _CMU_ADCCTRL_ADC0CLKDIV_NODIVISION 0x00000000UL

Mode NODIVISION for CMU_ADCCTRL

Definition at line 2368 of file efm32gg12b_cmu.h .

#define _CMU_ADCCTRL_ADC0CLKDIV_SHIFT 0

Shift value for CMU_ADC0CLKDIV

Definition at line 2365 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockFreqGet() , CMU_ClockPrescGet() , and CMU_ClockPrescSet() .

#define _CMU_ADCCTRL_ADC0CLKINV_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_ADCCTRL

Definition at line 2386 of file efm32gg12b_cmu.h .

#define _CMU_ADCCTRL_ADC0CLKINV_MASK 0x100UL

Bit mask for CMU_ADC0CLKINV

Definition at line 2385 of file efm32gg12b_cmu.h .

#define _CMU_ADCCTRL_ADC0CLKINV_SHIFT 8

Shift value for CMU_ADC0CLKINV

Definition at line 2384 of file efm32gg12b_cmu.h .

#define _CMU_ADCCTRL_ADC0CLKSEL_AUXHFRCO 0x00000001UL

Mode AUXHFRCO for CMU_ADCCTRL

Definition at line 2375 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockSelectSet() .

#define _CMU_ADCCTRL_ADC0CLKSEL_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_ADCCTRL

Definition at line 2373 of file efm32gg12b_cmu.h .

#define _CMU_ADCCTRL_ADC0CLKSEL_DISABLED 0x00000000UL

Mode DISABLED for CMU_ADCCTRL

Definition at line 2374 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockSelectSet() .

#define _CMU_ADCCTRL_ADC0CLKSEL_HFSRCCLK 0x00000003UL

Mode HFSRCCLK for CMU_ADCCTRL

Definition at line 2377 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockSelectSet() .

#define _CMU_ADCCTRL_ADC0CLKSEL_HFXO 0x00000002UL

Mode HFXO for CMU_ADCCTRL

Definition at line 2376 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockSelectSet() .

#define _CMU_ADCCTRL_ADC0CLKSEL_MASK 0x30UL

Bit mask for CMU_ADC0CLKSEL

Definition at line 2372 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockSelectGet() , and CMU_ClockSelectSet() .

#define _CMU_ADCCTRL_ADC0CLKSEL_SHIFT 4

Shift value for CMU_ADC0CLKSEL

Definition at line 2371 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockSelectSet() .

#define _CMU_ADCCTRL_ADC1CLKDIV_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_ADCCTRL

Definition at line 2390 of file efm32gg12b_cmu.h .

#define _CMU_ADCCTRL_ADC1CLKDIV_MASK 0x30000UL

Bit mask for CMU_ADC1CLKDIV

Definition at line 2389 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockFreqGet() , CMU_ClockPrescGet() , and CMU_ClockPrescSet() .

#define _CMU_ADCCTRL_ADC1CLKDIV_NODIVISION 0x00000000UL

Mode NODIVISION for CMU_ADCCTRL

Definition at line 2391 of file efm32gg12b_cmu.h .

#define _CMU_ADCCTRL_ADC1CLKDIV_SHIFT 16

Shift value for CMU_ADC1CLKDIV

Definition at line 2388 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockFreqGet() , CMU_ClockPrescGet() , and CMU_ClockPrescSet() .

#define _CMU_ADCCTRL_ADC1CLKINV_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_ADCCTRL

Definition at line 2409 of file efm32gg12b_cmu.h .

#define _CMU_ADCCTRL_ADC1CLKINV_MASK 0x1000000UL

Bit mask for CMU_ADC1CLKINV

Definition at line 2408 of file efm32gg12b_cmu.h .

#define _CMU_ADCCTRL_ADC1CLKINV_SHIFT 24

Shift value for CMU_ADC1CLKINV

Definition at line 2407 of file efm32gg12b_cmu.h .

#define _CMU_ADCCTRL_ADC1CLKSEL_AUXHFRCO 0x00000001UL

Mode AUXHFRCO for CMU_ADCCTRL

Definition at line 2398 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockSelectSet() .

#define _CMU_ADCCTRL_ADC1CLKSEL_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_ADCCTRL

Definition at line 2396 of file efm32gg12b_cmu.h .

#define _CMU_ADCCTRL_ADC1CLKSEL_DISABLED 0x00000000UL

Mode DISABLED for CMU_ADCCTRL

Definition at line 2397 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockSelectSet() .

#define _CMU_ADCCTRL_ADC1CLKSEL_HFSRCCLK 0x00000003UL

Mode HFSRCCLK for CMU_ADCCTRL

Definition at line 2400 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockSelectSet() .

#define _CMU_ADCCTRL_ADC1CLKSEL_HFXO 0x00000002UL

Mode HFXO for CMU_ADCCTRL

Definition at line 2399 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockSelectSet() .

#define _CMU_ADCCTRL_ADC1CLKSEL_MASK 0x300000UL

Bit mask for CMU_ADC1CLKSEL

Definition at line 2395 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockSelectGet() , and CMU_ClockSelectSet() .

#define _CMU_ADCCTRL_ADC1CLKSEL_SHIFT 20

Shift value for CMU_ADC1CLKSEL

Definition at line 2394 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockSelectSet() .

#define _CMU_ADCCTRL_MASK 0x01330133UL

Mask for CMU_ADCCTRL

Definition at line 2364 of file efm32gg12b_cmu.h .

#define _CMU_ADCCTRL_RESETVALUE 0x00000000UL

Default value for CMU_ADCCTRL

Definition at line 2363 of file efm32gg12b_cmu.h .

#define _CMU_AUXHFRCOCTRL_CLKDIV_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_AUXHFRCOCTRL

Definition at line 380 of file efm32gg12b_cmu.h .

#define _CMU_AUXHFRCOCTRL_CLKDIV_DIV1 0x00000000UL

Mode DIV1 for CMU_AUXHFRCOCTRL

Definition at line 381 of file efm32gg12b_cmu.h .

#define _CMU_AUXHFRCOCTRL_CLKDIV_DIV2 0x00000001UL

Mode DIV2 for CMU_AUXHFRCOCTRL

Definition at line 382 of file efm32gg12b_cmu.h .

#define _CMU_AUXHFRCOCTRL_CLKDIV_DIV4 0x00000002UL

Mode DIV4 for CMU_AUXHFRCOCTRL

Definition at line 383 of file efm32gg12b_cmu.h .

#define _CMU_AUXHFRCOCTRL_CLKDIV_MASK 0x6000000UL

Bit mask for CMU_CLKDIV

Definition at line 379 of file efm32gg12b_cmu.h .

Referenced by CMU_AUXHFRCOBandSet() .

#define _CMU_AUXHFRCOCTRL_CLKDIV_SHIFT 25

Shift value for CMU_CLKDIV

Definition at line 378 of file efm32gg12b_cmu.h .

#define _CMU_AUXHFRCOCTRL_CMPBIAS_DEFAULT 0x00000002UL

Mode DEFAULT for CMU_AUXHFRCOCTRL

Definition at line 371 of file efm32gg12b_cmu.h .

#define _CMU_AUXHFRCOCTRL_CMPBIAS_MASK 0xE00000UL

Bit mask for CMU_CMPBIAS

Definition at line 370 of file efm32gg12b_cmu.h .

#define _CMU_AUXHFRCOCTRL_CMPBIAS_SHIFT 21

Shift value for CMU_CMPBIAS

Definition at line 369 of file efm32gg12b_cmu.h .

#define _CMU_AUXHFRCOCTRL_FINETUNING_DEFAULT 0x0000001FUL

Mode DEFAULT for CMU_AUXHFRCOCTRL

Definition at line 363 of file efm32gg12b_cmu.h .

#define _CMU_AUXHFRCOCTRL_FINETUNING_MASK 0x3F00UL

Bit mask for CMU_FINETUNING

Definition at line 362 of file efm32gg12b_cmu.h .

#define _CMU_AUXHFRCOCTRL_FINETUNING_SHIFT 8

Shift value for CMU_FINETUNING

Definition at line 361 of file efm32gg12b_cmu.h .

#define _CMU_AUXHFRCOCTRL_FINETUNINGEN_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_AUXHFRCOCTRL

Definition at line 391 of file efm32gg12b_cmu.h .

#define _CMU_AUXHFRCOCTRL_FINETUNINGEN_MASK 0x8000000UL

Bit mask for CMU_FINETUNINGEN

Definition at line 390 of file efm32gg12b_cmu.h .

#define _CMU_AUXHFRCOCTRL_FINETUNINGEN_SHIFT 27

Shift value for CMU_FINETUNINGEN

Definition at line 389 of file efm32gg12b_cmu.h .

#define _CMU_AUXHFRCOCTRL_FREQRANGE_DEFAULT 0x00000008UL

Mode DEFAULT for CMU_AUXHFRCOCTRL

Definition at line 367 of file efm32gg12b_cmu.h .

#define _CMU_AUXHFRCOCTRL_FREQRANGE_MASK 0x1F0000UL

Bit mask for CMU_FREQRANGE

Definition at line 366 of file efm32gg12b_cmu.h .

#define _CMU_AUXHFRCOCTRL_FREQRANGE_SHIFT 16

Shift value for CMU_FREQRANGE

Definition at line 365 of file efm32gg12b_cmu.h .

#define _CMU_AUXHFRCOCTRL_LDOHP_DEFAULT 0x00000001UL

Mode DEFAULT for CMU_AUXHFRCOCTRL

Definition at line 376 of file efm32gg12b_cmu.h .

#define _CMU_AUXHFRCOCTRL_LDOHP_MASK 0x1000000UL

Bit mask for CMU_LDOHP

Definition at line 375 of file efm32gg12b_cmu.h .

#define _CMU_AUXHFRCOCTRL_LDOHP_SHIFT 24

Shift value for CMU_LDOHP

Definition at line 374 of file efm32gg12b_cmu.h .

#define _CMU_AUXHFRCOCTRL_MASK 0xFFFF3F7FUL

Mask for CMU_AUXHFRCOCTRL

Definition at line 356 of file efm32gg12b_cmu.h .

#define _CMU_AUXHFRCOCTRL_RESETVALUE 0xB1481F7FUL

Default value for CMU_AUXHFRCOCTRL

Definition at line 355 of file efm32gg12b_cmu.h .

#define _CMU_AUXHFRCOCTRL_TUNING_DEFAULT 0x0000007FUL

Mode DEFAULT for CMU_AUXHFRCOCTRL

Definition at line 359 of file efm32gg12b_cmu.h .

#define _CMU_AUXHFRCOCTRL_TUNING_MASK 0x7FUL

Bit mask for CMU_TUNING

Definition at line 358 of file efm32gg12b_cmu.h .

Referenced by CMU_OscillatorTuningGet() , and CMU_OscillatorTuningSet() .

#define _CMU_AUXHFRCOCTRL_TUNING_SHIFT 0

Shift value for CMU_TUNING

Definition at line 357 of file efm32gg12b_cmu.h .

Referenced by CMU_OscillatorTuningGet() , and CMU_OscillatorTuningSet() .

#define _CMU_AUXHFRCOCTRL_VREFTC_DEFAULT 0x0000000BUL

Mode DEFAULT for CMU_AUXHFRCOCTRL

Definition at line 395 of file efm32gg12b_cmu.h .

#define _CMU_AUXHFRCOCTRL_VREFTC_MASK 0xF0000000UL

Bit mask for CMU_VREFTC

Definition at line 394 of file efm32gg12b_cmu.h .

#define _CMU_AUXHFRCOCTRL_VREFTC_SHIFT 28

Shift value for CMU_VREFTC

Definition at line 393 of file efm32gg12b_cmu.h .

#define _CMU_CALCNT_CALCNT_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_CALCNT

Definition at line 915 of file efm32gg12b_cmu.h .

#define _CMU_CALCNT_CALCNT_MASK 0xFFFFFUL

Bit mask for CMU_CALCNT

Definition at line 914 of file efm32gg12b_cmu.h .

Referenced by CMU_Calibrate() , and CMU_CalibrateConfig() .

#define _CMU_CALCNT_CALCNT_SHIFT 0

Shift value for CMU_CALCNT

Definition at line 913 of file efm32gg12b_cmu.h .

Referenced by CMU_Calibrate() , and CMU_CalibrateConfig() .

#define _CMU_CALCNT_MASK 0x000FFFFFUL

Mask for CMU_CALCNT

Definition at line 912 of file efm32gg12b_cmu.h .

#define _CMU_CALCNT_RESETVALUE 0x00000000UL

Default value for CMU_CALCNT

Definition at line 911 of file efm32gg12b_cmu.h .

#define _CMU_CALCTRL_CONT_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_CALCTRL

Definition at line 835 of file efm32gg12b_cmu.h .

#define _CMU_CALCTRL_CONT_MASK 0x100UL

Bit mask for CMU_CONT

Definition at line 834 of file efm32gg12b_cmu.h .

#define _CMU_CALCTRL_CONT_SHIFT 8

Shift value for CMU_CONT

Definition at line 833 of file efm32gg12b_cmu.h .

Referenced by CMU_CalibrateCont() , and CMU_CalibrateCountGet() .

#define _CMU_CALCTRL_DOWNSEL_AUXHFRCO 0x00000005UL

Mode AUXHFRCO for CMU_CALCTRL

Definition at line 820 of file efm32gg12b_cmu.h .

#define _CMU_CALCTRL_DOWNSEL_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_CALCTRL

Definition at line 814 of file efm32gg12b_cmu.h .

#define _CMU_CALCTRL_DOWNSEL_HFCLK 0x00000000UL

Mode HFCLK for CMU_CALCTRL

Definition at line 815 of file efm32gg12b_cmu.h .

#define _CMU_CALCTRL_DOWNSEL_HFRCO 0x00000003UL

Mode HFRCO for CMU_CALCTRL

Definition at line 818 of file efm32gg12b_cmu.h .

#define _CMU_CALCTRL_DOWNSEL_HFXO 0x00000001UL

Mode HFXO for CMU_CALCTRL

Definition at line 816 of file efm32gg12b_cmu.h .

#define _CMU_CALCTRL_DOWNSEL_LFRCO 0x00000004UL

Mode LFRCO for CMU_CALCTRL

Definition at line 819 of file efm32gg12b_cmu.h .

#define _CMU_CALCTRL_DOWNSEL_LFXO 0x00000002UL

Mode LFXO for CMU_CALCTRL

Definition at line 817 of file efm32gg12b_cmu.h .

#define _CMU_CALCTRL_DOWNSEL_MASK 0xF0UL

Bit mask for CMU_DOWNSEL

Definition at line 813 of file efm32gg12b_cmu.h .

Referenced by CMU_CalibrateConfig() .

#define _CMU_CALCTRL_DOWNSEL_PRS 0x00000006UL

Mode PRS for CMU_CALCTRL

Definition at line 821 of file efm32gg12b_cmu.h .

#define _CMU_CALCTRL_DOWNSEL_SHIFT 4

Shift value for CMU_DOWNSEL

Definition at line 812 of file efm32gg12b_cmu.h .

#define _CMU_CALCTRL_DOWNSEL_USHFRCO 0x00000008UL

Mode USHFRCO for CMU_CALCTRL

Definition at line 822 of file efm32gg12b_cmu.h .

#define _CMU_CALCTRL_MASK 0x0F0F01F7UL

Mask for CMU_CALCTRL

Definition at line 793 of file efm32gg12b_cmu.h .

#define _CMU_CALCTRL_PRSDOWNSEL_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_CALCTRL

Definition at line 875 of file efm32gg12b_cmu.h .

#define _CMU_CALCTRL_PRSDOWNSEL_MASK 0xF000000UL

Bit mask for CMU_PRSDOWNSEL

Definition at line 874 of file efm32gg12b_cmu.h .

#define _CMU_CALCTRL_PRSDOWNSEL_PRSCH0 0x00000000UL

Mode PRSCH0 for CMU_CALCTRL

Definition at line 876 of file efm32gg12b_cmu.h .

#define _CMU_CALCTRL_PRSDOWNSEL_PRSCH1 0x00000001UL

Mode PRSCH1 for CMU_CALCTRL

Definition at line 877 of file efm32gg12b_cmu.h .

#define _CMU_CALCTRL_PRSDOWNSEL_PRSCH10 0x0000000AUL

Mode PRSCH10 for CMU_CALCTRL

Definition at line 886 of file efm32gg12b_cmu.h .

#define _CMU_CALCTRL_PRSDOWNSEL_PRSCH11 0x0000000BUL

Mode PRSCH11 for CMU_CALCTRL

Definition at line 887 of file efm32gg12b_cmu.h .

#define _CMU_CALCTRL_PRSDOWNSEL_PRSCH12 0x0000000CUL

Mode PRSCH12 for CMU_CALCTRL

Definition at line 888 of file efm32gg12b_cmu.h .

#define _CMU_CALCTRL_PRSDOWNSEL_PRSCH13 0x0000000DUL

Mode PRSCH13 for CMU_CALCTRL

Definition at line 889 of file efm32gg12b_cmu.h .

#define _CMU_CALCTRL_PRSDOWNSEL_PRSCH14 0x0000000EUL

Mode PRSCH14 for CMU_CALCTRL

Definition at line 890 of file efm32gg12b_cmu.h .

#define _CMU_CALCTRL_PRSDOWNSEL_PRSCH15 0x0000000FUL

Mode PRSCH15 for CMU_CALCTRL

Definition at line 891 of file efm32gg12b_cmu.h .

#define _CMU_CALCTRL_PRSDOWNSEL_PRSCH2 0x00000002UL

Mode PRSCH2 for CMU_CALCTRL

Definition at line 878 of file efm32gg12b_cmu.h .

#define _CMU_CALCTRL_PRSDOWNSEL_PRSCH3 0x00000003UL

Mode PRSCH3 for CMU_CALCTRL

Definition at line 879 of file efm32gg12b_cmu.h .

#define _CMU_CALCTRL_PRSDOWNSEL_PRSCH4 0x00000004UL

Mode PRSCH4 for CMU_CALCTRL

Definition at line 880 of file efm32gg12b_cmu.h .

#define _CMU_CALCTRL_PRSDOWNSEL_PRSCH5 0x00000005UL

Mode PRSCH5 for CMU_CALCTRL

Definition at line 881 of file efm32gg12b_cmu.h .

#define _CMU_CALCTRL_PRSDOWNSEL_PRSCH6 0x00000006UL

Mode PRSCH6 for CMU_CALCTRL

Definition at line 882 of file efm32gg12b_cmu.h .

#define _CMU_CALCTRL_PRSDOWNSEL_PRSCH7 0x00000007UL

Mode PRSCH7 for CMU_CALCTRL

Definition at line 883 of file efm32gg12b_cmu.h .

#define _CMU_CALCTRL_PRSDOWNSEL_PRSCH8 0x00000008UL

Mode PRSCH8 for CMU_CALCTRL

Definition at line 884 of file efm32gg12b_cmu.h .

#define _CMU_CALCTRL_PRSDOWNSEL_PRSCH9 0x00000009UL

Mode PRSCH9 for CMU_CALCTRL

Definition at line 885 of file efm32gg12b_cmu.h .

#define _CMU_CALCTRL_PRSDOWNSEL_SHIFT 24

Shift value for CMU_PRSDOWNSEL

Definition at line 873 of file efm32gg12b_cmu.h .

#define _CMU_CALCTRL_PRSUPSEL_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_CALCTRL

Definition at line 839 of file efm32gg12b_cmu.h .

#define _CMU_CALCTRL_PRSUPSEL_MASK 0xF0000UL

Bit mask for CMU_PRSUPSEL

Definition at line 838 of file efm32gg12b_cmu.h .

#define _CMU_CALCTRL_PRSUPSEL_PRSCH0 0x00000000UL

Mode PRSCH0 for CMU_CALCTRL

Definition at line 840 of file efm32gg12b_cmu.h .

#define _CMU_CALCTRL_PRSUPSEL_PRSCH1 0x00000001UL

Mode PRSCH1 for CMU_CALCTRL

Definition at line 841 of file efm32gg12b_cmu.h .

#define _CMU_CALCTRL_PRSUPSEL_PRSCH10 0x0000000AUL

Mode PRSCH10 for CMU_CALCTRL

Definition at line 850 of file efm32gg12b_cmu.h .

#define _CMU_CALCTRL_PRSUPSEL_PRSCH11 0x0000000BUL

Mode PRSCH11 for CMU_CALCTRL

Definition at line 851 of file efm32gg12b_cmu.h .

#define _CMU_CALCTRL_PRSUPSEL_PRSCH12 0x0000000CUL

Mode PRSCH12 for CMU_CALCTRL

Definition at line 852 of file efm32gg12b_cmu.h .

#define _CMU_CALCTRL_PRSUPSEL_PRSCH13 0x0000000DUL

Mode PRSCH13 for CMU_CALCTRL

Definition at line 853 of file efm32gg12b_cmu.h .

#define _CMU_CALCTRL_PRSUPSEL_PRSCH14 0x0000000EUL

Mode PRSCH14 for CMU_CALCTRL

Definition at line 854 of file efm32gg12b_cmu.h .

#define _CMU_CALCTRL_PRSUPSEL_PRSCH15 0x0000000FUL

Mode PRSCH15 for CMU_CALCTRL

Definition at line 855 of file efm32gg12b_cmu.h .

#define _CMU_CALCTRL_PRSUPSEL_PRSCH2 0x00000002UL

Mode PRSCH2 for CMU_CALCTRL

Definition at line 842 of file efm32gg12b_cmu.h .

#define _CMU_CALCTRL_PRSUPSEL_PRSCH3 0x00000003UL

Mode PRSCH3 for CMU_CALCTRL

Definition at line 843 of file efm32gg12b_cmu.h .

#define _CMU_CALCTRL_PRSUPSEL_PRSCH4 0x00000004UL

Mode PRSCH4 for CMU_CALCTRL

Definition at line 844 of file efm32gg12b_cmu.h .

#define _CMU_CALCTRL_PRSUPSEL_PRSCH5 0x00000005UL

Mode PRSCH5 for CMU_CALCTRL

Definition at line 845 of file efm32gg12b_cmu.h .

#define _CMU_CALCTRL_PRSUPSEL_PRSCH6 0x00000006UL

Mode PRSCH6 for CMU_CALCTRL

Definition at line 846 of file efm32gg12b_cmu.h .

#define _CMU_CALCTRL_PRSUPSEL_PRSCH7 0x00000007UL

Mode PRSCH7 for CMU_CALCTRL

Definition at line 847 of file efm32gg12b_cmu.h .

#define _CMU_CALCTRL_PRSUPSEL_PRSCH8 0x00000008UL

Mode PRSCH8 for CMU_CALCTRL

Definition at line 848 of file efm32gg12b_cmu.h .

#define _CMU_CALCTRL_PRSUPSEL_PRSCH9 0x00000009UL

Mode PRSCH9 for CMU_CALCTRL

Definition at line 849 of file efm32gg12b_cmu.h .

#define _CMU_CALCTRL_PRSUPSEL_SHIFT 16

Shift value for CMU_PRSUPSEL

Definition at line 837 of file efm32gg12b_cmu.h .

#define _CMU_CALCTRL_RESETVALUE 0x00000000UL

Default value for CMU_CALCTRL

Definition at line 792 of file efm32gg12b_cmu.h .

#define _CMU_CALCTRL_UPSEL_AUXHFRCO 0x00000004UL

Mode AUXHFRCO for CMU_CALCTRL

Definition at line 801 of file efm32gg12b_cmu.h .

#define _CMU_CALCTRL_UPSEL_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_CALCTRL

Definition at line 796 of file efm32gg12b_cmu.h .

#define _CMU_CALCTRL_UPSEL_HFRCO 0x00000002UL

Mode HFRCO for CMU_CALCTRL

Definition at line 799 of file efm32gg12b_cmu.h .

#define _CMU_CALCTRL_UPSEL_HFXO 0x00000000UL

Mode HFXO for CMU_CALCTRL

Definition at line 797 of file efm32gg12b_cmu.h .

#define _CMU_CALCTRL_UPSEL_LFRCO 0x00000003UL

Mode LFRCO for CMU_CALCTRL

Definition at line 800 of file efm32gg12b_cmu.h .

#define _CMU_CALCTRL_UPSEL_LFXO 0x00000001UL

Mode LFXO for CMU_CALCTRL

Definition at line 798 of file efm32gg12b_cmu.h .

#define _CMU_CALCTRL_UPSEL_MASK 0x7UL

Bit mask for CMU_UPSEL

Definition at line 795 of file efm32gg12b_cmu.h .

Referenced by CMU_CalibrateConfig() .

#define _CMU_CALCTRL_UPSEL_PRS 0x00000005UL

Mode PRS for CMU_CALCTRL

Definition at line 802 of file efm32gg12b_cmu.h .

#define _CMU_CALCTRL_UPSEL_SHIFT 0

Shift value for CMU_UPSEL

Definition at line 794 of file efm32gg12b_cmu.h .

#define _CMU_CALCTRL_UPSEL_USHFRCO 0x00000007UL

Mode USHFRCO for CMU_CALCTRL

Definition at line 803 of file efm32gg12b_cmu.h .

#define _CMU_CMD_CALSTART_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_CMD

Definition at line 998 of file efm32gg12b_cmu.h .

#define _CMU_CMD_CALSTART_MASK 0x1UL

Bit mask for CMU_CALSTART

Definition at line 997 of file efm32gg12b_cmu.h .

#define _CMU_CMD_CALSTART_SHIFT 0

Shift value for CMU_CALSTART

Definition at line 996 of file efm32gg12b_cmu.h .

#define _CMU_CMD_CALSTOP_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_CMD

Definition at line 1003 of file efm32gg12b_cmu.h .

#define _CMU_CMD_CALSTOP_MASK 0x2UL

Bit mask for CMU_CALSTOP

Definition at line 1002 of file efm32gg12b_cmu.h .

#define _CMU_CMD_CALSTOP_SHIFT 1

Shift value for CMU_CALSTOP

Definition at line 1001 of file efm32gg12b_cmu.h .

#define _CMU_CMD_HFXOPEAKDETSTART_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_CMD

Definition at line 1008 of file efm32gg12b_cmu.h .

#define _CMU_CMD_HFXOPEAKDETSTART_MASK 0x10UL

Bit mask for CMU_HFXOPEAKDETSTART

Definition at line 1007 of file efm32gg12b_cmu.h .

#define _CMU_CMD_HFXOPEAKDETSTART_SHIFT 4

Shift value for CMU_HFXOPEAKDETSTART

Definition at line 1006 of file efm32gg12b_cmu.h .

#define _CMU_CMD_MASK 0x00000013UL

Mask for CMU_CMD

Definition at line 994 of file efm32gg12b_cmu.h .

#define _CMU_CMD_RESETVALUE 0x00000000UL

Default value for CMU_CMD

Definition at line 993 of file efm32gg12b_cmu.h .

#define _CMU_CTRL_CLKOUTSEL0_AUXHFRCOQ 0x0000000DUL

Mode AUXHFRCOQ for CMU_CTRL

Definition at line 168 of file efm32gg12b_cmu.h .

#define _CMU_CTRL_CLKOUTSEL0_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_CTRL

Definition at line 157 of file efm32gg12b_cmu.h .

#define _CMU_CTRL_CLKOUTSEL0_DISABLED 0x00000000UL

Mode DISABLED for CMU_CTRL

Definition at line 158 of file efm32gg12b_cmu.h .

#define _CMU_CTRL_CLKOUTSEL0_HFEXPCLK 0x00000007UL

Mode HFEXPCLK for CMU_CTRL

Definition at line 163 of file efm32gg12b_cmu.h .

#define _CMU_CTRL_CLKOUTSEL0_HFRCOQ 0x0000000CUL

Mode HFRCOQ for CMU_CTRL

Definition at line 167 of file efm32gg12b_cmu.h .

#define _CMU_CTRL_CLKOUTSEL0_HFSRCCLK 0x0000000FUL

Mode HFSRCCLK for CMU_CTRL

Definition at line 170 of file efm32gg12b_cmu.h .

#define _CMU_CTRL_CLKOUTSEL0_HFXO 0x00000006UL

Mode HFXO for CMU_CTRL

Definition at line 162 of file efm32gg12b_cmu.h .

#define _CMU_CTRL_CLKOUTSEL0_HFXOQ 0x0000000EUL

Mode HFXOQ for CMU_CTRL

Definition at line 169 of file efm32gg12b_cmu.h .

#define _CMU_CTRL_CLKOUTSEL0_LFRCO 0x00000002UL

Mode LFRCO for CMU_CTRL

Definition at line 160 of file efm32gg12b_cmu.h .

#define _CMU_CTRL_CLKOUTSEL0_LFRCOQ 0x0000000AUL

Mode LFRCOQ for CMU_CTRL

Definition at line 165 of file efm32gg12b_cmu.h .

#define _CMU_CTRL_CLKOUTSEL0_LFXO 0x00000003UL

Mode LFXO for CMU_CTRL

Definition at line 161 of file efm32gg12b_cmu.h .

#define _CMU_CTRL_CLKOUTSEL0_LFXOQ 0x0000000BUL

Mode LFXOQ for CMU_CTRL

Definition at line 166 of file efm32gg12b_cmu.h .

#define _CMU_CTRL_CLKOUTSEL0_MASK 0x1FUL

Bit mask for CMU_CLKOUTSEL0

Definition at line 156 of file efm32gg12b_cmu.h .

#define _CMU_CTRL_CLKOUTSEL0_SHIFT 0

Shift value for CMU_CLKOUTSEL0

Definition at line 155 of file efm32gg12b_cmu.h .

#define _CMU_CTRL_CLKOUTSEL0_ULFRCO 0x00000001UL

Mode ULFRCO for CMU_CTRL

Definition at line 159 of file efm32gg12b_cmu.h .

#define _CMU_CTRL_CLKOUTSEL0_ULFRCOQ 0x00000009UL

Mode ULFRCOQ for CMU_CTRL

Definition at line 164 of file efm32gg12b_cmu.h .

#define _CMU_CTRL_CLKOUTSEL0_USHFRCOQ 0x00000012UL

Mode USHFRCOQ for CMU_CTRL

Definition at line 171 of file efm32gg12b_cmu.h .

#define _CMU_CTRL_CLKOUTSEL1_AUXHFRCOQ 0x0000000DUL

Mode AUXHFRCOQ for CMU_CTRL

Definition at line 200 of file efm32gg12b_cmu.h .

#define _CMU_CTRL_CLKOUTSEL1_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_CTRL

Definition at line 189 of file efm32gg12b_cmu.h .

#define _CMU_CTRL_CLKOUTSEL1_DISABLED 0x00000000UL

Mode DISABLED for CMU_CTRL

Definition at line 190 of file efm32gg12b_cmu.h .

#define _CMU_CTRL_CLKOUTSEL1_HFEXPCLK 0x00000007UL

Mode HFEXPCLK for CMU_CTRL

Definition at line 195 of file efm32gg12b_cmu.h .

#define _CMU_CTRL_CLKOUTSEL1_HFRCOQ 0x0000000CUL

Mode HFRCOQ for CMU_CTRL

Definition at line 199 of file efm32gg12b_cmu.h .

#define _CMU_CTRL_CLKOUTSEL1_HFSRCCLK 0x0000000FUL

Mode HFSRCCLK for CMU_CTRL

Definition at line 202 of file efm32gg12b_cmu.h .

#define _CMU_CTRL_CLKOUTSEL1_HFXO 0x00000006UL

Mode HFXO for CMU_CTRL

Definition at line 194 of file efm32gg12b_cmu.h .

#define _CMU_CTRL_CLKOUTSEL1_HFXOQ 0x0000000EUL

Mode HFXOQ for CMU_CTRL

Definition at line 201 of file efm32gg12b_cmu.h .

#define _CMU_CTRL_CLKOUTSEL1_LFRCO 0x00000002UL

Mode LFRCO for CMU_CTRL

Definition at line 192 of file efm32gg12b_cmu.h .

#define _CMU_CTRL_CLKOUTSEL1_LFRCOQ 0x0000000AUL

Mode LFRCOQ for CMU_CTRL

Definition at line 197 of file efm32gg12b_cmu.h .

#define _CMU_CTRL_CLKOUTSEL1_LFXO 0x00000003UL

Mode LFXO for CMU_CTRL

Definition at line 193 of file efm32gg12b_cmu.h .

#define _CMU_CTRL_CLKOUTSEL1_LFXOQ 0x0000000BUL

Mode LFXOQ for CMU_CTRL

Definition at line 198 of file efm32gg12b_cmu.h .

#define _CMU_CTRL_CLKOUTSEL1_MASK 0x3E0UL

Bit mask for CMU_CLKOUTSEL1

Definition at line 188 of file efm32gg12b_cmu.h .

Referenced by adcDeInit() .

#define _CMU_CTRL_CLKOUTSEL1_SHIFT 5

Shift value for CMU_CLKOUTSEL1

Definition at line 187 of file efm32gg12b_cmu.h .

#define _CMU_CTRL_CLKOUTSEL1_ULFRCO 0x00000001UL

Mode ULFRCO for CMU_CTRL

Definition at line 191 of file efm32gg12b_cmu.h .

#define _CMU_CTRL_CLKOUTSEL1_ULFRCOQ 0x00000009UL

Mode ULFRCOQ for CMU_CTRL

Definition at line 196 of file efm32gg12b_cmu.h .

#define _CMU_CTRL_CLKOUTSEL1_USHFRCOQ 0x00000012UL

Mode USHFRCOQ for CMU_CTRL

Definition at line 203 of file efm32gg12b_cmu.h .

#define _CMU_CTRL_CLKOUTSEL2_AUXHFRCOQ 0x0000000DUL

Mode AUXHFRCOQ for CMU_CTRL

Definition at line 234 of file efm32gg12b_cmu.h .

#define _CMU_CTRL_CLKOUTSEL2_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_CTRL

Definition at line 221 of file efm32gg12b_cmu.h .

#define _CMU_CTRL_CLKOUTSEL2_DISABLED 0x00000000UL

Mode DISABLED for CMU_CTRL

Definition at line 222 of file efm32gg12b_cmu.h .

#define _CMU_CTRL_CLKOUTSEL2_HFEXPCLK 0x00000007UL

Mode HFEXPCLK for CMU_CTRL

Definition at line 228 of file efm32gg12b_cmu.h .

#define _CMU_CTRL_CLKOUTSEL2_HFRCOQ 0x0000000CUL

Mode HFRCOQ for CMU_CTRL

Definition at line 233 of file efm32gg12b_cmu.h .

#define _CMU_CTRL_CLKOUTSEL2_HFSRCCLK 0x0000000FUL

Mode HFSRCCLK for CMU_CTRL

Definition at line 236 of file efm32gg12b_cmu.h .

#define _CMU_CTRL_CLKOUTSEL2_HFXO 0x00000006UL

Mode HFXO for CMU_CTRL

Definition at line 227 of file efm32gg12b_cmu.h .

#define _CMU_CTRL_CLKOUTSEL2_HFXODIV2Q 0x00000005UL

Mode HFXODIV2Q for CMU_CTRL

Definition at line 226 of file efm32gg12b_cmu.h .

#define _CMU_CTRL_CLKOUTSEL2_HFXOQ 0x0000000EUL

Mode HFXOQ for CMU_CTRL

Definition at line 235 of file efm32gg12b_cmu.h .

#define _CMU_CTRL_CLKOUTSEL2_HFXOX2Q 0x00000008UL

Mode HFXOX2Q for CMU_CTRL

Definition at line 229 of file efm32gg12b_cmu.h .

#define _CMU_CTRL_CLKOUTSEL2_LFRCO 0x00000002UL

Mode LFRCO for CMU_CTRL

Definition at line 224 of file efm32gg12b_cmu.h .

#define _CMU_CTRL_CLKOUTSEL2_LFRCOQ 0x0000000AUL

Mode LFRCOQ for CMU_CTRL

Definition at line 231 of file efm32gg12b_cmu.h .

#define _CMU_CTRL_CLKOUTSEL2_LFXO 0x00000003UL

Mode LFXO for CMU_CTRL

Definition at line 225 of file efm32gg12b_cmu.h .

#define _CMU_CTRL_CLKOUTSEL2_LFXOQ 0x0000000BUL

Mode LFXOQ for CMU_CTRL

Definition at line 232 of file efm32gg12b_cmu.h .

#define _CMU_CTRL_CLKOUTSEL2_MASK 0x7C00UL

Bit mask for CMU_CLKOUTSEL2

Definition at line 220 of file efm32gg12b_cmu.h .

#define _CMU_CTRL_CLKOUTSEL2_SHIFT 10

Shift value for CMU_CLKOUTSEL2

Definition at line 219 of file efm32gg12b_cmu.h .

#define _CMU_CTRL_CLKOUTSEL2_ULFRCO 0x00000001UL

Mode ULFRCO for CMU_CTRL

Definition at line 223 of file efm32gg12b_cmu.h .

#define _CMU_CTRL_CLKOUTSEL2_ULFRCOQ 0x00000009UL

Mode ULFRCOQ for CMU_CTRL

Definition at line 230 of file efm32gg12b_cmu.h .

#define _CMU_CTRL_CLKOUTSEL2_USHFRCOQ 0x00000012UL

Mode USHFRCOQ for CMU_CTRL

Definition at line 237 of file efm32gg12b_cmu.h .

#define _CMU_CTRL_HFPERCLKEN_DEFAULT 0x00000001UL

Mode DEFAULT for CMU_CTRL

Definition at line 263 of file efm32gg12b_cmu.h .

#define _CMU_CTRL_HFPERCLKEN_MASK 0x100000UL

Bit mask for CMU_HFPERCLKEN

Definition at line 262 of file efm32gg12b_cmu.h .

#define _CMU_CTRL_HFPERCLKEN_SHIFT 20

Shift value for CMU_HFPERCLKEN

Definition at line 261 of file efm32gg12b_cmu.h .

#define _CMU_CTRL_MASK 0x00117FFFUL

Mask for CMU_CTRL

Definition at line 154 of file efm32gg12b_cmu.h .

#define _CMU_CTRL_RESETVALUE 0x00100000UL

Default value for CMU_CTRL

Definition at line 153 of file efm32gg12b_cmu.h .

#define _CMU_CTRL_WSHFLE_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_CTRL

Definition at line 258 of file efm32gg12b_cmu.h .

#define _CMU_CTRL_WSHFLE_MASK 0x10000UL

Bit mask for CMU_WSHFLE

Definition at line 257 of file efm32gg12b_cmu.h .

#define _CMU_CTRL_WSHFLE_SHIFT 16

Shift value for CMU_WSHFLE

Definition at line 256 of file efm32gg12b_cmu.h .

#define _CMU_DBGCLKSEL_DBG_AUXHFRCO 0x00000000UL

Mode AUXHFRCO for CMU_DBGCLKSEL

Definition at line 1017 of file efm32gg12b_cmu.h .

#define _CMU_DBGCLKSEL_DBG_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_DBGCLKSEL

Definition at line 1016 of file efm32gg12b_cmu.h .

#define _CMU_DBGCLKSEL_DBG_HFCLK 0x00000001UL

Mode HFCLK for CMU_DBGCLKSEL

Definition at line 1018 of file efm32gg12b_cmu.h .

#define _CMU_DBGCLKSEL_DBG_HFRCODIV2 0x00000002UL

Mode HFRCODIV2 for CMU_DBGCLKSEL

Definition at line 1019 of file efm32gg12b_cmu.h .

#define _CMU_DBGCLKSEL_DBG_MASK 0x3UL

Bit mask for CMU_DBG

Definition at line 1015 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockSelectGet() .

#define _CMU_DBGCLKSEL_DBG_SHIFT 0

Shift value for CMU_DBG

Definition at line 1014 of file efm32gg12b_cmu.h .

#define _CMU_DBGCLKSEL_MASK 0x00000003UL

Mask for CMU_DBGCLKSEL

Definition at line 1013 of file efm32gg12b_cmu.h .

#define _CMU_DBGCLKSEL_RESETVALUE 0x00000000UL

Default value for CMU_DBGCLKSEL

Definition at line 1012 of file efm32gg12b_cmu.h .

#define _CMU_DPLLCTRL1_M_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_DPLLCTRL1

Definition at line 784 of file efm32gg12b_cmu.h .

#define _CMU_DPLLCTRL1_M_MASK 0xFFFUL

Bit mask for CMU_M

Definition at line 783 of file efm32gg12b_cmu.h .

Referenced by CMU_DPLLLock() .

#define _CMU_DPLLCTRL1_M_SHIFT 0

Shift value for CMU_M

Definition at line 782 of file efm32gg12b_cmu.h .

Referenced by CMU_DPLLLock() .

#define _CMU_DPLLCTRL1_MASK 0x0FFF0FFFUL

Mask for CMU_DPLLCTRL1

Definition at line 781 of file efm32gg12b_cmu.h .

#define _CMU_DPLLCTRL1_N_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_DPLLCTRL1

Definition at line 788 of file efm32gg12b_cmu.h .

#define _CMU_DPLLCTRL1_N_MASK 0xFFF0000UL

Bit mask for CMU_N

Definition at line 787 of file efm32gg12b_cmu.h .

Referenced by CMU_DPLLLock() .

#define _CMU_DPLLCTRL1_N_SHIFT 16

Shift value for CMU_N

Definition at line 786 of file efm32gg12b_cmu.h .

Referenced by CMU_DPLLLock() .

#define _CMU_DPLLCTRL1_RESETVALUE 0x00000000UL

Default value for CMU_DPLLCTRL1

Definition at line 780 of file efm32gg12b_cmu.h .

#define _CMU_DPLLCTRL_AUTORECOVER_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_DPLLCTRL

Definition at line 759 of file efm32gg12b_cmu.h .

#define _CMU_DPLLCTRL_AUTORECOVER_MASK 0x4UL

Bit mask for CMU_AUTORECOVER

Definition at line 758 of file efm32gg12b_cmu.h .

#define _CMU_DPLLCTRL_AUTORECOVER_SHIFT 2

Shift value for CMU_AUTORECOVER

Definition at line 757 of file efm32gg12b_cmu.h .

Referenced by CMU_DPLLLock() .

#define _CMU_DPLLCTRL_DITHEN_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_DPLLCTRL

Definition at line 776 of file efm32gg12b_cmu.h .

#define _CMU_DPLLCTRL_DITHEN_MASK 0x40UL

Bit mask for CMU_DITHEN

Definition at line 775 of file efm32gg12b_cmu.h .

#define _CMU_DPLLCTRL_DITHEN_SHIFT 6

Shift value for CMU_DITHEN

Definition at line 774 of file efm32gg12b_cmu.h .

#define _CMU_DPLLCTRL_EDGESEL_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_DPLLCTRL

Definition at line 750 of file efm32gg12b_cmu.h .

#define _CMU_DPLLCTRL_EDGESEL_FALL 0x00000000UL

Mode FALL for CMU_DPLLCTRL

Definition at line 751 of file efm32gg12b_cmu.h .

#define _CMU_DPLLCTRL_EDGESEL_MASK 0x2UL

Bit mask for CMU_EDGESEL

Definition at line 749 of file efm32gg12b_cmu.h .

#define _CMU_DPLLCTRL_EDGESEL_RISE 0x00000001UL

Mode RISE for CMU_DPLLCTRL

Definition at line 752 of file efm32gg12b_cmu.h .

#define _CMU_DPLLCTRL_EDGESEL_SHIFT 1

Shift value for CMU_EDGESEL

Definition at line 748 of file efm32gg12b_cmu.h .

Referenced by CMU_DPLLLock() .

#define _CMU_DPLLCTRL_MASK 0x0000005FUL

Mask for CMU_DPLLCTRL

Definition at line 737 of file efm32gg12b_cmu.h .

#define _CMU_DPLLCTRL_MODE_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_DPLLCTRL

Definition at line 741 of file efm32gg12b_cmu.h .

#define _CMU_DPLLCTRL_MODE_FREQLL 0x00000000UL

Mode FREQLL for CMU_DPLLCTRL

Definition at line 742 of file efm32gg12b_cmu.h .

#define _CMU_DPLLCTRL_MODE_MASK 0x1UL

Bit mask for CMU_MODE

Definition at line 740 of file efm32gg12b_cmu.h .

#define _CMU_DPLLCTRL_MODE_PHASELL 0x00000001UL

Mode PHASELL for CMU_DPLLCTRL

Definition at line 743 of file efm32gg12b_cmu.h .

#define _CMU_DPLLCTRL_MODE_SHIFT 0

Shift value for CMU_MODE

Definition at line 739 of file efm32gg12b_cmu.h .

Referenced by CMU_DPLLLock() .

#define _CMU_DPLLCTRL_REFSEL_CLKIN0 0x00000003UL

Mode CLKIN0 for CMU_DPLLCTRL

Definition at line 767 of file efm32gg12b_cmu.h .

#define _CMU_DPLLCTRL_REFSEL_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_DPLLCTRL

Definition at line 763 of file efm32gg12b_cmu.h .

#define _CMU_DPLLCTRL_REFSEL_HFXO 0x00000000UL

Mode HFXO for CMU_DPLLCTRL

Definition at line 764 of file efm32gg12b_cmu.h .

#define _CMU_DPLLCTRL_REFSEL_LFXO 0x00000001UL

Mode LFXO for CMU_DPLLCTRL

Definition at line 765 of file efm32gg12b_cmu.h .

#define _CMU_DPLLCTRL_REFSEL_MASK 0x18UL

Bit mask for CMU_REFSEL

Definition at line 762 of file efm32gg12b_cmu.h .

#define _CMU_DPLLCTRL_REFSEL_SHIFT 3

Shift value for CMU_REFSEL

Definition at line 761 of file efm32gg12b_cmu.h .

Referenced by CMU_DPLLLock() .

#define _CMU_DPLLCTRL_REFSEL_USHFRCO 0x00000002UL

Mode USHFRCO for CMU_DPLLCTRL

Definition at line 766 of file efm32gg12b_cmu.h .

#define _CMU_DPLLCTRL_RESETVALUE 0x00000000UL

Default value for CMU_DPLLCTRL

Definition at line 736 of file efm32gg12b_cmu.h .

#define _CMU_FREEZE_MASK 0x00000001UL

Mask for CMU_FREEZE

Definition at line 2305 of file efm32gg12b_cmu.h .

#define _CMU_FREEZE_REGFREEZE_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_FREEZE

Definition at line 2309 of file efm32gg12b_cmu.h .

#define _CMU_FREEZE_REGFREEZE_FREEZE 0x00000001UL

Mode FREEZE for CMU_FREEZE

Definition at line 2311 of file efm32gg12b_cmu.h .

#define _CMU_FREEZE_REGFREEZE_MASK 0x1UL

Bit mask for CMU_REGFREEZE

Definition at line 2308 of file efm32gg12b_cmu.h .

#define _CMU_FREEZE_REGFREEZE_SHIFT 0

Shift value for CMU_REGFREEZE

Definition at line 2307 of file efm32gg12b_cmu.h .

#define _CMU_FREEZE_REGFREEZE_UPDATE 0x00000000UL

Mode UPDATE for CMU_FREEZE

Definition at line 2310 of file efm32gg12b_cmu.h .

#define _CMU_FREEZE_RESETVALUE 0x00000000UL

Default value for CMU_FREEZE

Definition at line 2304 of file efm32gg12b_cmu.h .

#define _CMU_HFBUSCLKEN0_CRYPTO0_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_HFBUSCLKEN0

Definition at line 1703 of file efm32gg12b_cmu.h .

#define _CMU_HFBUSCLKEN0_CRYPTO0_MASK 0x2UL

Bit mask for CMU_CRYPTO0

Definition at line 1702 of file efm32gg12b_cmu.h .

#define _CMU_HFBUSCLKEN0_CRYPTO0_SHIFT 1

Shift value for CMU_CRYPTO0

Definition at line 1701 of file efm32gg12b_cmu.h .

#define _CMU_HFBUSCLKEN0_EBI_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_HFBUSCLKEN0

Definition at line 1708 of file efm32gg12b_cmu.h .

#define _CMU_HFBUSCLKEN0_EBI_MASK 0x4UL

Bit mask for CMU_EBI

Definition at line 1707 of file efm32gg12b_cmu.h .

#define _CMU_HFBUSCLKEN0_EBI_SHIFT 2

Shift value for CMU_EBI

Definition at line 1706 of file efm32gg12b_cmu.h .

#define _CMU_HFBUSCLKEN0_GPCRC_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_HFBUSCLKEN0

Definition at line 1733 of file efm32gg12b_cmu.h .

#define _CMU_HFBUSCLKEN0_GPCRC_MASK 0x80UL

Bit mask for CMU_GPCRC

Definition at line 1732 of file efm32gg12b_cmu.h .

#define _CMU_HFBUSCLKEN0_GPCRC_SHIFT 7

Shift value for CMU_GPCRC

Definition at line 1731 of file efm32gg12b_cmu.h .

#define _CMU_HFBUSCLKEN0_GPIO_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_HFBUSCLKEN0

Definition at line 1718 of file efm32gg12b_cmu.h .

#define _CMU_HFBUSCLKEN0_GPIO_MASK 0x10UL

Bit mask for CMU_GPIO

Definition at line 1717 of file efm32gg12b_cmu.h .

#define _CMU_HFBUSCLKEN0_GPIO_SHIFT 4

Shift value for CMU_GPIO

Definition at line 1716 of file efm32gg12b_cmu.h .

#define _CMU_HFBUSCLKEN0_LDMA_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_HFBUSCLKEN0

Definition at line 1728 of file efm32gg12b_cmu.h .

#define _CMU_HFBUSCLKEN0_LDMA_MASK 0x40UL

Bit mask for CMU_LDMA

Definition at line 1727 of file efm32gg12b_cmu.h .

#define _CMU_HFBUSCLKEN0_LDMA_SHIFT 6

Shift value for CMU_LDMA

Definition at line 1726 of file efm32gg12b_cmu.h .

#define _CMU_HFBUSCLKEN0_LE_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_HFBUSCLKEN0

Definition at line 1698 of file efm32gg12b_cmu.h .

#define _CMU_HFBUSCLKEN0_LE_MASK 0x1UL

Bit mask for CMU_LE

Definition at line 1697 of file efm32gg12b_cmu.h .

#define _CMU_HFBUSCLKEN0_LE_SHIFT 0

Shift value for CMU_LE

Definition at line 1696 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockSelectSet() .

#define _CMU_HFBUSCLKEN0_MASK 0x000003FFUL

Mask for CMU_HFBUSCLKEN0

Definition at line 1694 of file efm32gg12b_cmu.h .

#define _CMU_HFBUSCLKEN0_PRS_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_HFBUSCLKEN0

Definition at line 1723 of file efm32gg12b_cmu.h .

#define _CMU_HFBUSCLKEN0_PRS_MASK 0x20UL

Bit mask for CMU_PRS

Definition at line 1722 of file efm32gg12b_cmu.h .

#define _CMU_HFBUSCLKEN0_PRS_SHIFT 5

Shift value for CMU_PRS

Definition at line 1721 of file efm32gg12b_cmu.h .

#define _CMU_HFBUSCLKEN0_QSPI0_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_HFBUSCLKEN0

Definition at line 1738 of file efm32gg12b_cmu.h .

#define _CMU_HFBUSCLKEN0_QSPI0_MASK 0x100UL

Bit mask for CMU_QSPI0

Definition at line 1737 of file efm32gg12b_cmu.h .

#define _CMU_HFBUSCLKEN0_QSPI0_SHIFT 8

Shift value for CMU_QSPI0

Definition at line 1736 of file efm32gg12b_cmu.h .

#define _CMU_HFBUSCLKEN0_RESETVALUE 0x00000000UL

Default value for CMU_HFBUSCLKEN0

Definition at line 1693 of file efm32gg12b_cmu.h .

#define _CMU_HFBUSCLKEN0_SDIO_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_HFBUSCLKEN0

Definition at line 1713 of file efm32gg12b_cmu.h .

#define _CMU_HFBUSCLKEN0_SDIO_MASK 0x8UL

Bit mask for CMU_SDIO

Definition at line 1712 of file efm32gg12b_cmu.h .

#define _CMU_HFBUSCLKEN0_SDIO_SHIFT 3

Shift value for CMU_SDIO

Definition at line 1711 of file efm32gg12b_cmu.h .

#define _CMU_HFBUSCLKEN0_USB_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_HFBUSCLKEN0

Definition at line 1743 of file efm32gg12b_cmu.h .

#define _CMU_HFBUSCLKEN0_USB_MASK 0x200UL

Bit mask for CMU_USB

Definition at line 1742 of file efm32gg12b_cmu.h .

#define _CMU_HFBUSCLKEN0_USB_SHIFT 9

Shift value for CMU_USB

Definition at line 1741 of file efm32gg12b_cmu.h .

#define _CMU_HFBUSPRESC_MASK 0x0001FF00UL

Mask for CMU_HFBUSPRESC

Definition at line 1987 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockFreqGet() , CMU_ClockPrescGet() , and CMU_ClockPrescSet() .

#define _CMU_HFBUSPRESC_PRESC_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_HFBUSPRESC

Definition at line 1990 of file efm32gg12b_cmu.h .

#define _CMU_HFBUSPRESC_PRESC_MASK 0x1FF00UL

Bit mask for CMU_PRESC

Definition at line 1989 of file efm32gg12b_cmu.h .

#define _CMU_HFBUSPRESC_PRESC_NODIVISION 0x00000000UL

Mode NODIVISION for CMU_HFBUSPRESC

Definition at line 1991 of file efm32gg12b_cmu.h .

#define _CMU_HFBUSPRESC_PRESC_SHIFT 8

Shift value for CMU_PRESC

Definition at line 1988 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockFreqGet() , CMU_ClockPrescGet() , and CMU_ClockPrescSet() .

#define _CMU_HFBUSPRESC_RESETVALUE 0x00000000UL

Default value for CMU_HFBUSPRESC

Definition at line 1986 of file efm32gg12b_cmu.h .

#define _CMU_HFCLKSEL_HF_CLKIN0 0x00000007UL

Mode CLKIN0 for CMU_HFCLKSEL

Definition at line 1037 of file efm32gg12b_cmu.h .

#define _CMU_HFCLKSEL_HF_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_HFCLKSEL

Definition at line 1030 of file efm32gg12b_cmu.h .

#define _CMU_HFCLKSEL_HF_HFRCO 0x00000001UL

Mode HFRCO for CMU_HFCLKSEL

Definition at line 1031 of file efm32gg12b_cmu.h .

#define _CMU_HFCLKSEL_HF_HFRCODIV2 0x00000005UL

Mode HFRCODIV2 for CMU_HFCLKSEL

Definition at line 1035 of file efm32gg12b_cmu.h .

#define _CMU_HFCLKSEL_HF_HFXO 0x00000002UL

Mode HFXO for CMU_HFCLKSEL

Definition at line 1032 of file efm32gg12b_cmu.h .

#define _CMU_HFCLKSEL_HF_LFRCO 0x00000003UL

Mode LFRCO for CMU_HFCLKSEL

Definition at line 1033 of file efm32gg12b_cmu.h .

#define _CMU_HFCLKSEL_HF_LFXO 0x00000004UL

Mode LFXO for CMU_HFCLKSEL

Definition at line 1034 of file efm32gg12b_cmu.h .

#define _CMU_HFCLKSEL_HF_MASK 0x7UL

Bit mask for CMU_HF

Definition at line 1029 of file efm32gg12b_cmu.h .

#define _CMU_HFCLKSEL_HF_SHIFT 0

Shift value for CMU_HF

Definition at line 1028 of file efm32gg12b_cmu.h .

#define _CMU_HFCLKSEL_HF_USHFRCO 0x00000006UL

Mode USHFRCO for CMU_HFCLKSEL

Definition at line 1036 of file efm32gg12b_cmu.h .

#define _CMU_HFCLKSEL_MASK 0x00000007UL

Mask for CMU_HFCLKSEL

Definition at line 1027 of file efm32gg12b_cmu.h .

#define _CMU_HFCLKSEL_RESETVALUE 0x00000000UL

Default value for CMU_HFCLKSEL

Definition at line 1026 of file efm32gg12b_cmu.h .

#define _CMU_HFCLKSTATUS_MASK 0x00000007UL

Mask for CMU_HFCLKSTATUS

Definition at line 1234 of file efm32gg12b_cmu.h .

#define _CMU_HFCLKSTATUS_RESETVALUE 0x00000001UL

Default value for CMU_HFCLKSTATUS

Definition at line 1233 of file efm32gg12b_cmu.h .

#define _CMU_HFCLKSTATUS_SELECTED_CLKIN0 0x00000007UL

Mode CLKIN0 for CMU_HFCLKSTATUS

Definition at line 1244 of file efm32gg12b_cmu.h .

#define _CMU_HFCLKSTATUS_SELECTED_DEFAULT 0x00000001UL

Mode DEFAULT for CMU_HFCLKSTATUS

Definition at line 1237 of file efm32gg12b_cmu.h .

#define _CMU_HFCLKSTATUS_SELECTED_HFRCO 0x00000001UL

Mode HFRCO for CMU_HFCLKSTATUS

Definition at line 1238 of file efm32gg12b_cmu.h .

#define _CMU_HFCLKSTATUS_SELECTED_HFRCODIV2 0x00000005UL

Mode HFRCODIV2 for CMU_HFCLKSTATUS

Definition at line 1242 of file efm32gg12b_cmu.h .

#define _CMU_HFCLKSTATUS_SELECTED_HFXO 0x00000002UL

Mode HFXO for CMU_HFCLKSTATUS

Definition at line 1239 of file efm32gg12b_cmu.h .

#define _CMU_HFCLKSTATUS_SELECTED_LFRCO 0x00000003UL

Mode LFRCO for CMU_HFCLKSTATUS

Definition at line 1240 of file efm32gg12b_cmu.h .

#define _CMU_HFCLKSTATUS_SELECTED_LFXO 0x00000004UL

Mode LFXO for CMU_HFCLKSTATUS

Definition at line 1241 of file efm32gg12b_cmu.h .

#define _CMU_HFCLKSTATUS_SELECTED_MASK 0x7UL

Bit mask for CMU_SELECTED

Definition at line 1236 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockSelectGet() , SystemHFClockGet() , SystemHFXOClockSet() , and SystemLFXOClockSet() .

#define _CMU_HFCLKSTATUS_SELECTED_SHIFT 0

Shift value for CMU_SELECTED

Definition at line 1235 of file efm32gg12b_cmu.h .

#define _CMU_HFCLKSTATUS_SELECTED_USHFRCO 0x00000006UL

Mode USHFRCO for CMU_HFCLKSTATUS

Definition at line 1243 of file efm32gg12b_cmu.h .

#define _CMU_HFCOREPRESC_MASK 0x0001FF00UL

Mask for CMU_HFCOREPRESC

Definition at line 1997 of file efm32gg12b_cmu.h .

#define _CMU_HFCOREPRESC_PRESC_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_HFCOREPRESC

Definition at line 2000 of file efm32gg12b_cmu.h .

#define _CMU_HFCOREPRESC_PRESC_MASK 0x1FF00UL

Bit mask for CMU_PRESC

Definition at line 1999 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockFreqGet() , CMU_ClockPrescGet() , CMU_ClockPrescSet() , and SystemCoreClockGet() .

#define _CMU_HFCOREPRESC_PRESC_NODIVISION 0x00000000UL

Mode NODIVISION for CMU_HFCOREPRESC

Definition at line 2001 of file efm32gg12b_cmu.h .

#define _CMU_HFCOREPRESC_PRESC_SHIFT 8

Shift value for CMU_PRESC

Definition at line 1998 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockFreqGet() , CMU_ClockPrescGet() , CMU_ClockPrescSet() , and SystemCoreClockGet() .

#define _CMU_HFCOREPRESC_RESETVALUE 0x00000000UL

Default value for CMU_HFCOREPRESC

Definition at line 1996 of file efm32gg12b_cmu.h .

#define _CMU_HFEXPPRESC_MASK 0x00001F00UL

Mask for CMU_HFEXPPRESC

Definition at line 2017 of file efm32gg12b_cmu.h .

#define _CMU_HFEXPPRESC_PRESC_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_HFEXPPRESC

Definition at line 2020 of file efm32gg12b_cmu.h .

#define _CMU_HFEXPPRESC_PRESC_MASK 0x1F00UL

Bit mask for CMU_PRESC

Definition at line 2019 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockFreqGet() , CMU_ClockPrescGet() , and CMU_ClockPrescSet() .

#define _CMU_HFEXPPRESC_PRESC_NODIVISION 0x00000000UL

Mode NODIVISION for CMU_HFEXPPRESC

Definition at line 2021 of file efm32gg12b_cmu.h .

#define _CMU_HFEXPPRESC_PRESC_SHIFT 8

Shift value for CMU_PRESC

Definition at line 2018 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockFreqGet() , CMU_ClockPrescGet() , and CMU_ClockPrescSet() .

#define _CMU_HFEXPPRESC_RESETVALUE 0x00000000UL

Default value for CMU_HFEXPPRESC

Definition at line 2016 of file efm32gg12b_cmu.h .

#define _CMU_HFPERCLKEN0_ACMP0_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_HFPERCLKEN0

Definition at line 1797 of file efm32gg12b_cmu.h .

#define _CMU_HFPERCLKEN0_ACMP0_MASK 0x200UL

Bit mask for CMU_ACMP0

Definition at line 1796 of file efm32gg12b_cmu.h .

#define _CMU_HFPERCLKEN0_ACMP0_SHIFT 9

Shift value for CMU_ACMP0

Definition at line 1795 of file efm32gg12b_cmu.h .

#define _CMU_HFPERCLKEN0_ACMP1_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_HFPERCLKEN0

Definition at line 1802 of file efm32gg12b_cmu.h .

#define _CMU_HFPERCLKEN0_ACMP1_MASK 0x400UL

Bit mask for CMU_ACMP1

Definition at line 1801 of file efm32gg12b_cmu.h .

#define _CMU_HFPERCLKEN0_ACMP1_SHIFT 10

Shift value for CMU_ACMP1

Definition at line 1800 of file efm32gg12b_cmu.h .

#define _CMU_HFPERCLKEN0_ACMP2_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_HFPERCLKEN0

Definition at line 1807 of file efm32gg12b_cmu.h .

#define _CMU_HFPERCLKEN0_ACMP2_MASK 0x800UL

Bit mask for CMU_ACMP2

Definition at line 1806 of file efm32gg12b_cmu.h .

#define _CMU_HFPERCLKEN0_ACMP2_SHIFT 11

Shift value for CMU_ACMP2

Definition at line 1805 of file efm32gg12b_cmu.h .

#define _CMU_HFPERCLKEN0_ADC0_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_HFPERCLKEN0

Definition at line 1822 of file efm32gg12b_cmu.h .

#define _CMU_HFPERCLKEN0_ADC0_MASK 0x4000UL

Bit mask for CMU_ADC0

Definition at line 1821 of file efm32gg12b_cmu.h .

#define _CMU_HFPERCLKEN0_ADC0_SHIFT 14

Shift value for CMU_ADC0

Definition at line 1820 of file efm32gg12b_cmu.h .

#define _CMU_HFPERCLKEN0_ADC1_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_HFPERCLKEN0

Definition at line 1827 of file efm32gg12b_cmu.h .

#define _CMU_HFPERCLKEN0_ADC1_MASK 0x8000UL

Bit mask for CMU_ADC1

Definition at line 1826 of file efm32gg12b_cmu.h .

#define _CMU_HFPERCLKEN0_ADC1_SHIFT 15

Shift value for CMU_ADC1

Definition at line 1825 of file efm32gg12b_cmu.h .

#define _CMU_HFPERCLKEN0_CRYOTIMER_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_HFPERCLKEN0

Definition at line 1837 of file efm32gg12b_cmu.h .

#define _CMU_HFPERCLKEN0_CRYOTIMER_MASK 0x20000UL

Bit mask for CMU_CRYOTIMER

Definition at line 1836 of file efm32gg12b_cmu.h .

#define _CMU_HFPERCLKEN0_CRYOTIMER_SHIFT 17

Shift value for CMU_CRYOTIMER

Definition at line 1835 of file efm32gg12b_cmu.h .

#define _CMU_HFPERCLKEN0_I2C0_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_HFPERCLKEN0

Definition at line 1812 of file efm32gg12b_cmu.h .

#define _CMU_HFPERCLKEN0_I2C0_MASK 0x1000UL

Bit mask for CMU_I2C0

Definition at line 1811 of file efm32gg12b_cmu.h .

#define _CMU_HFPERCLKEN0_I2C0_SHIFT 12

Shift value for CMU_I2C0

Definition at line 1810 of file efm32gg12b_cmu.h .

#define _CMU_HFPERCLKEN0_I2C1_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_HFPERCLKEN0

Definition at line 1817 of file efm32gg12b_cmu.h .

#define _CMU_HFPERCLKEN0_I2C1_MASK 0x2000UL

Bit mask for CMU_I2C1

Definition at line 1816 of file efm32gg12b_cmu.h .

#define _CMU_HFPERCLKEN0_I2C1_SHIFT 13

Shift value for CMU_I2C1

Definition at line 1815 of file efm32gg12b_cmu.h .

#define _CMU_HFPERCLKEN0_IDAC0_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_HFPERCLKEN0

Definition at line 1842 of file efm32gg12b_cmu.h .

#define _CMU_HFPERCLKEN0_IDAC0_MASK 0x40000UL

Bit mask for CMU_IDAC0

Definition at line 1841 of file efm32gg12b_cmu.h .

#define _CMU_HFPERCLKEN0_IDAC0_SHIFT 18

Shift value for CMU_IDAC0

Definition at line 1840 of file efm32gg12b_cmu.h .

#define _CMU_HFPERCLKEN0_MASK 0x000FFFFFUL

Mask for CMU_HFPERCLKEN0

Definition at line 1748 of file efm32gg12b_cmu.h .

#define _CMU_HFPERCLKEN0_PDM_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_HFPERCLKEN0

Definition at line 1832 of file efm32gg12b_cmu.h .

#define _CMU_HFPERCLKEN0_PDM_MASK 0x10000UL

Bit mask for CMU_PDM

Definition at line 1831 of file efm32gg12b_cmu.h .

#define _CMU_HFPERCLKEN0_PDM_SHIFT 16

Shift value for CMU_PDM

Definition at line 1830 of file efm32gg12b_cmu.h .

#define _CMU_HFPERCLKEN0_RESETVALUE 0x00000000UL

Default value for CMU_HFPERCLKEN0

Definition at line 1747 of file efm32gg12b_cmu.h .

#define _CMU_HFPERCLKEN0_TIMER0_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_HFPERCLKEN0

Definition at line 1777 of file efm32gg12b_cmu.h .

#define _CMU_HFPERCLKEN0_TIMER0_MASK 0x20UL

Bit mask for CMU_TIMER0

Definition at line 1776 of file efm32gg12b_cmu.h .

#define _CMU_HFPERCLKEN0_TIMER0_SHIFT 5

Shift value for CMU_TIMER0

Definition at line 1775 of file efm32gg12b_cmu.h .

#define _CMU_HFPERCLKEN0_TIMER1_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_HFPERCLKEN0

Definition at line 1782 of file efm32gg12b_cmu.h .

#define _CMU_HFPERCLKEN0_TIMER1_MASK 0x40UL

Bit mask for CMU_TIMER1

Definition at line 1781 of file efm32gg12b_cmu.h .

#define _CMU_HFPERCLKEN0_TIMER1_SHIFT 6

Shift value for CMU_TIMER1

Definition at line 1780 of file efm32gg12b_cmu.h .

#define _CMU_HFPERCLKEN0_TIMER2_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_HFPERCLKEN0

Definition at line 1787 of file efm32gg12b_cmu.h .

#define _CMU_HFPERCLKEN0_TIMER2_MASK 0x80UL

Bit mask for CMU_TIMER2

Definition at line 1786 of file efm32gg12b_cmu.h .

#define _CMU_HFPERCLKEN0_TIMER2_SHIFT 7

Shift value for CMU_TIMER2

Definition at line 1785 of file efm32gg12b_cmu.h .

#define _CMU_HFPERCLKEN0_TIMER3_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_HFPERCLKEN0

Definition at line 1792 of file efm32gg12b_cmu.h .

#define _CMU_HFPERCLKEN0_TIMER3_MASK 0x100UL

Bit mask for CMU_TIMER3

Definition at line 1791 of file efm32gg12b_cmu.h .

#define _CMU_HFPERCLKEN0_TIMER3_SHIFT 8

Shift value for CMU_TIMER3

Definition at line 1790 of file efm32gg12b_cmu.h .

#define _CMU_HFPERCLKEN0_TRNG0_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_HFPERCLKEN0

Definition at line 1847 of file efm32gg12b_cmu.h .

#define _CMU_HFPERCLKEN0_TRNG0_MASK 0x80000UL

Bit mask for CMU_TRNG0

Definition at line 1846 of file efm32gg12b_cmu.h .

#define _CMU_HFPERCLKEN0_TRNG0_SHIFT 19

Shift value for CMU_TRNG0

Definition at line 1845 of file efm32gg12b_cmu.h .

#define _CMU_HFPERCLKEN0_USART0_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_HFPERCLKEN0

Definition at line 1752 of file efm32gg12b_cmu.h .

#define _CMU_HFPERCLKEN0_USART0_MASK 0x1UL

Bit mask for CMU_USART0

Definition at line 1751 of file efm32gg12b_cmu.h .

#define _CMU_HFPERCLKEN0_USART0_SHIFT 0

Shift value for CMU_USART0

Definition at line 1750 of file efm32gg12b_cmu.h .

#define _CMU_HFPERCLKEN0_USART1_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_HFPERCLKEN0

Definition at line 1757 of file efm32gg12b_cmu.h .

#define _CMU_HFPERCLKEN0_USART1_MASK 0x2UL

Bit mask for CMU_USART1

Definition at line 1756 of file efm32gg12b_cmu.h .

#define _CMU_HFPERCLKEN0_USART1_SHIFT 1

Shift value for CMU_USART1

Definition at line 1755 of file efm32gg12b_cmu.h .

#define _CMU_HFPERCLKEN0_USART2_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_HFPERCLKEN0

Definition at line 1762 of file efm32gg12b_cmu.h .

#define _CMU_HFPERCLKEN0_USART2_MASK 0x4UL

Bit mask for CMU_USART2

Definition at line 1761 of file efm32gg12b_cmu.h .

#define _CMU_HFPERCLKEN0_USART2_SHIFT 2

Shift value for CMU_USART2

Definition at line 1760 of file efm32gg12b_cmu.h .

#define _CMU_HFPERCLKEN0_USART3_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_HFPERCLKEN0

Definition at line 1767 of file efm32gg12b_cmu.h .

#define _CMU_HFPERCLKEN0_USART3_MASK 0x8UL

Bit mask for CMU_USART3

Definition at line 1766 of file efm32gg12b_cmu.h .

#define _CMU_HFPERCLKEN0_USART3_SHIFT 3

Shift value for CMU_USART3

Definition at line 1765 of file efm32gg12b_cmu.h .

#define _CMU_HFPERCLKEN0_USART4_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_HFPERCLKEN0

Definition at line 1772 of file efm32gg12b_cmu.h .

#define _CMU_HFPERCLKEN0_USART4_MASK 0x10UL

Bit mask for CMU_USART4

Definition at line 1771 of file efm32gg12b_cmu.h .

#define _CMU_HFPERCLKEN0_USART4_SHIFT 4

Shift value for CMU_USART4

Definition at line 1770 of file efm32gg12b_cmu.h .

#define _CMU_HFPERCLKEN1_CAN0_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_HFPERCLKEN1

Definition at line 1876 of file efm32gg12b_cmu.h .

#define _CMU_HFPERCLKEN1_CAN0_MASK 0x10UL

Bit mask for CMU_CAN0

Definition at line 1875 of file efm32gg12b_cmu.h .

#define _CMU_HFPERCLKEN1_CAN0_SHIFT 4

Shift value for CMU_CAN0

Definition at line 1874 of file efm32gg12b_cmu.h .

#define _CMU_HFPERCLKEN1_CAN1_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_HFPERCLKEN1

Definition at line 1881 of file efm32gg12b_cmu.h .

#define _CMU_HFPERCLKEN1_CAN1_MASK 0x20UL

Bit mask for CMU_CAN1

Definition at line 1880 of file efm32gg12b_cmu.h .

#define _CMU_HFPERCLKEN1_CAN1_SHIFT 5

Shift value for CMU_CAN1

Definition at line 1879 of file efm32gg12b_cmu.h .

#define _CMU_HFPERCLKEN1_CSEN_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_HFPERCLKEN1

Definition at line 1891 of file efm32gg12b_cmu.h .

#define _CMU_HFPERCLKEN1_CSEN_MASK 0x80UL

Bit mask for CMU_CSEN

Definition at line 1890 of file efm32gg12b_cmu.h .

#define _CMU_HFPERCLKEN1_CSEN_SHIFT 7

Shift value for CMU_CSEN

Definition at line 1889 of file efm32gg12b_cmu.h .

#define _CMU_HFPERCLKEN1_MASK 0x000000FFUL

Mask for CMU_HFPERCLKEN1

Definition at line 1852 of file efm32gg12b_cmu.h .

#define _CMU_HFPERCLKEN1_RESETVALUE 0x00000000UL

Default value for CMU_HFPERCLKEN1

Definition at line 1851 of file efm32gg12b_cmu.h .

#define _CMU_HFPERCLKEN1_UART0_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_HFPERCLKEN1

Definition at line 1856 of file efm32gg12b_cmu.h .

#define _CMU_HFPERCLKEN1_UART0_MASK 0x1UL

Bit mask for CMU_UART0

Definition at line 1855 of file efm32gg12b_cmu.h .

#define _CMU_HFPERCLKEN1_UART0_SHIFT 0

Shift value for CMU_UART0

Definition at line 1854 of file efm32gg12b_cmu.h .

#define _CMU_HFPERCLKEN1_UART1_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_HFPERCLKEN1

Definition at line 1861 of file efm32gg12b_cmu.h .

#define _CMU_HFPERCLKEN1_UART1_MASK 0x2UL

Bit mask for CMU_UART1

Definition at line 1860 of file efm32gg12b_cmu.h .

#define _CMU_HFPERCLKEN1_UART1_SHIFT 1

Shift value for CMU_UART1

Definition at line 1859 of file efm32gg12b_cmu.h .

#define _CMU_HFPERCLKEN1_VDAC0_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_HFPERCLKEN1

Definition at line 1886 of file efm32gg12b_cmu.h .

#define _CMU_HFPERCLKEN1_VDAC0_MASK 0x40UL

Bit mask for CMU_VDAC0

Definition at line 1885 of file efm32gg12b_cmu.h .

#define _CMU_HFPERCLKEN1_VDAC0_SHIFT 6

Shift value for CMU_VDAC0

Definition at line 1884 of file efm32gg12b_cmu.h .

#define _CMU_HFPERCLKEN1_WTIMER0_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_HFPERCLKEN1

Definition at line 1866 of file efm32gg12b_cmu.h .

#define _CMU_HFPERCLKEN1_WTIMER0_MASK 0x4UL

Bit mask for CMU_WTIMER0

Definition at line 1865 of file efm32gg12b_cmu.h .

#define _CMU_HFPERCLKEN1_WTIMER0_SHIFT 2

Shift value for CMU_WTIMER0

Definition at line 1864 of file efm32gg12b_cmu.h .

#define _CMU_HFPERCLKEN1_WTIMER1_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_HFPERCLKEN1

Definition at line 1871 of file efm32gg12b_cmu.h .

#define _CMU_HFPERCLKEN1_WTIMER1_MASK 0x8UL

Bit mask for CMU_WTIMER1

Definition at line 1870 of file efm32gg12b_cmu.h .

#define _CMU_HFPERCLKEN1_WTIMER1_SHIFT 3

Shift value for CMU_WTIMER1

Definition at line 1869 of file efm32gg12b_cmu.h .

#define _CMU_HFPERPRESC_MASK 0x0001FF00UL

Mask for CMU_HFPERPRESC

Definition at line 2007 of file efm32gg12b_cmu.h .

#define _CMU_HFPERPRESC_PRESC_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_HFPERPRESC

Definition at line 2010 of file efm32gg12b_cmu.h .

#define _CMU_HFPERPRESC_PRESC_MASK 0x1FF00UL

Bit mask for CMU_PRESC

Definition at line 2009 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockFreqGet() , CMU_ClockPrescGet() , and CMU_ClockPrescSet() .

#define _CMU_HFPERPRESC_PRESC_NODIVISION 0x00000000UL

Mode NODIVISION for CMU_HFPERPRESC

Definition at line 2011 of file efm32gg12b_cmu.h .

#define _CMU_HFPERPRESC_PRESC_SHIFT 8

Shift value for CMU_PRESC

Definition at line 2008 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockFreqGet() , CMU_ClockPrescGet() , and CMU_ClockPrescSet() .

#define _CMU_HFPERPRESC_RESETVALUE 0x00000000UL

Default value for CMU_HFPERPRESC

Definition at line 2006 of file efm32gg12b_cmu.h .

#define _CMU_HFPERPRESCB_MASK 0x0001FF00UL

Mask for CMU_HFPERPRESCB

Definition at line 2027 of file efm32gg12b_cmu.h .

#define _CMU_HFPERPRESCB_PRESC_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_HFPERPRESCB

Definition at line 2030 of file efm32gg12b_cmu.h .

#define _CMU_HFPERPRESCB_PRESC_MASK 0x1FF00UL

Bit mask for CMU_PRESC

Definition at line 2029 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockFreqGet() , CMU_ClockPrescGet() , and CMU_ClockPrescSet() .

#define _CMU_HFPERPRESCB_PRESC_NODIVISION 0x00000000UL

Mode NODIVISION for CMU_HFPERPRESCB

Definition at line 2031 of file efm32gg12b_cmu.h .

#define _CMU_HFPERPRESCB_PRESC_SHIFT 8

Shift value for CMU_PRESC

Definition at line 2028 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockFreqGet() , CMU_ClockPrescGet() , and CMU_ClockPrescSet() .

#define _CMU_HFPERPRESCB_RESETVALUE 0x00000000UL

Default value for CMU_HFPERPRESCB

Definition at line 2026 of file efm32gg12b_cmu.h .

#define _CMU_HFPERPRESCC_MASK 0x0001FF00UL

Mask for CMU_HFPERPRESCC

Definition at line 2037 of file efm32gg12b_cmu.h .

#define _CMU_HFPERPRESCC_PRESC_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_HFPERPRESCC

Definition at line 2040 of file efm32gg12b_cmu.h .

#define _CMU_HFPERPRESCC_PRESC_MASK 0x1FF00UL

Bit mask for CMU_PRESC

Definition at line 2039 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockFreqGet() , CMU_ClockPrescGet() , and CMU_ClockPrescSet() .

#define _CMU_HFPERPRESCC_PRESC_NODIVISION 0x00000000UL

Mode NODIVISION for CMU_HFPERPRESCC

Definition at line 2041 of file efm32gg12b_cmu.h .

#define _CMU_HFPERPRESCC_PRESC_SHIFT 8

Shift value for CMU_PRESC

Definition at line 2038 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockFreqGet() , CMU_ClockPrescGet() , and CMU_ClockPrescSet() .

#define _CMU_HFPERPRESCC_RESETVALUE 0x00000000UL

Default value for CMU_HFPERPRESCC

Definition at line 2036 of file efm32gg12b_cmu.h .

#define _CMU_HFPRESC_HFCLKLEPRESC_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_HFPRESC

Definition at line 1976 of file efm32gg12b_cmu.h .

#define _CMU_HFPRESC_HFCLKLEPRESC_DIV2 0x00000000UL

Mode DIV2 for CMU_HFPRESC

Definition at line 1977 of file efm32gg12b_cmu.h .

#define _CMU_HFPRESC_HFCLKLEPRESC_DIV4 0x00000001UL

Mode DIV4 for CMU_HFPRESC

Definition at line 1978 of file efm32gg12b_cmu.h .

#define _CMU_HFPRESC_HFCLKLEPRESC_DIV8 0x00000002UL

Mode DIV8 for CMU_HFPRESC

Definition at line 1979 of file efm32gg12b_cmu.h .

#define _CMU_HFPRESC_HFCLKLEPRESC_MASK 0x3000000UL

Bit mask for CMU_HFCLKLEPRESC

Definition at line 1975 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockPrescGet() .

#define _CMU_HFPRESC_HFCLKLEPRESC_SHIFT 24

Shift value for CMU_HFCLKLEPRESC

Definition at line 1974 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockPrescGet() .

#define _CMU_HFPRESC_MASK 0x03001F00UL

Mask for CMU_HFPRESC

Definition at line 1967 of file efm32gg12b_cmu.h .

#define _CMU_HFPRESC_PRESC_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_HFPRESC

Definition at line 1970 of file efm32gg12b_cmu.h .

#define _CMU_HFPRESC_PRESC_MASK 0x1F00UL

Bit mask for CMU_PRESC

Definition at line 1969 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockPrescGet() , CMU_ClockPrescSet() , EMU_VScaleEM01() , EMU_VScaleEM01ByClock() , and SystemHFClockGet() .

#define _CMU_HFPRESC_PRESC_NODIVISION 0x00000000UL

Mode NODIVISION for CMU_HFPRESC

Definition at line 1971 of file efm32gg12b_cmu.h .

#define _CMU_HFPRESC_PRESC_SHIFT 8

Shift value for CMU_PRESC

Definition at line 1968 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockPrescGet() , CMU_ClockPrescSet() , EMU_VScaleEM01() , EMU_VScaleEM01ByClock() , and SystemHFClockGet() .

#define _CMU_HFPRESC_RESETVALUE 0x00000000UL

Default value for CMU_HFPRESC

Definition at line 1966 of file efm32gg12b_cmu.h .

#define _CMU_HFRCOCTRL_CLKDIV_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_HFRCOCTRL

Definition at line 336 of file efm32gg12b_cmu.h .

#define _CMU_HFRCOCTRL_CLKDIV_DIV1 0x00000000UL

Mode DIV1 for CMU_HFRCOCTRL

Definition at line 337 of file efm32gg12b_cmu.h .

#define _CMU_HFRCOCTRL_CLKDIV_DIV2 0x00000001UL

Mode DIV2 for CMU_HFRCOCTRL

Definition at line 338 of file efm32gg12b_cmu.h .

#define _CMU_HFRCOCTRL_CLKDIV_DIV4 0x00000002UL

Mode DIV4 for CMU_HFRCOCTRL

Definition at line 339 of file efm32gg12b_cmu.h .

#define _CMU_HFRCOCTRL_CLKDIV_MASK 0x6000000UL

Bit mask for CMU_CLKDIV

Definition at line 335 of file efm32gg12b_cmu.h .

Referenced by CMU_HFRCOBandSet() , and EMU_EnterEM4() .

#define _CMU_HFRCOCTRL_CLKDIV_SHIFT 25

Shift value for CMU_CLKDIV

Definition at line 334 of file efm32gg12b_cmu.h .

#define _CMU_HFRCOCTRL_CMPBIAS_DEFAULT 0x00000002UL

Mode DEFAULT for CMU_HFRCOCTRL

Definition at line 327 of file efm32gg12b_cmu.h .

#define _CMU_HFRCOCTRL_CMPBIAS_MASK 0xE00000UL

Bit mask for CMU_CMPBIAS

Definition at line 326 of file efm32gg12b_cmu.h .

#define _CMU_HFRCOCTRL_CMPBIAS_SHIFT 21

Shift value for CMU_CMPBIAS

Definition at line 325 of file efm32gg12b_cmu.h .

#define _CMU_HFRCOCTRL_FINETUNING_DEFAULT 0x0000001FUL

Mode DEFAULT for CMU_HFRCOCTRL

Definition at line 319 of file efm32gg12b_cmu.h .

#define _CMU_HFRCOCTRL_FINETUNING_MASK 0x3F00UL

Bit mask for CMU_FINETUNING

Definition at line 318 of file efm32gg12b_cmu.h .

#define _CMU_HFRCOCTRL_FINETUNING_SHIFT 8

Shift value for CMU_FINETUNING

Definition at line 317 of file efm32gg12b_cmu.h .

#define _CMU_HFRCOCTRL_FINETUNINGEN_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_HFRCOCTRL

Definition at line 347 of file efm32gg12b_cmu.h .

#define _CMU_HFRCOCTRL_FINETUNINGEN_MASK 0x8000000UL

Bit mask for CMU_FINETUNINGEN

Definition at line 346 of file efm32gg12b_cmu.h .

#define _CMU_HFRCOCTRL_FINETUNINGEN_SHIFT 27

Shift value for CMU_FINETUNINGEN

Definition at line 345 of file efm32gg12b_cmu.h .

#define _CMU_HFRCOCTRL_FREQRANGE_DEFAULT 0x00000008UL

Mode DEFAULT for CMU_HFRCOCTRL

Definition at line 323 of file efm32gg12b_cmu.h .

#define _CMU_HFRCOCTRL_FREQRANGE_MASK 0x1F0000UL

Bit mask for CMU_FREQRANGE

Definition at line 322 of file efm32gg12b_cmu.h .

#define _CMU_HFRCOCTRL_FREQRANGE_SHIFT 16

Shift value for CMU_FREQRANGE

Definition at line 321 of file efm32gg12b_cmu.h .

#define _CMU_HFRCOCTRL_LDOHP_DEFAULT 0x00000001UL

Mode DEFAULT for CMU_HFRCOCTRL

Definition at line 332 of file efm32gg12b_cmu.h .

#define _CMU_HFRCOCTRL_LDOHP_MASK 0x1000000UL

Bit mask for CMU_LDOHP

Definition at line 331 of file efm32gg12b_cmu.h .

#define _CMU_HFRCOCTRL_LDOHP_SHIFT 24

Shift value for CMU_LDOHP

Definition at line 330 of file efm32gg12b_cmu.h .

#define _CMU_HFRCOCTRL_MASK 0xFFFF3F7FUL

Mask for CMU_HFRCOCTRL

Definition at line 312 of file efm32gg12b_cmu.h .

#define _CMU_HFRCOCTRL_RESETVALUE 0xB1481F7FUL

Default value for CMU_HFRCOCTRL

Definition at line 311 of file efm32gg12b_cmu.h .

#define _CMU_HFRCOCTRL_TUNING_DEFAULT 0x0000007FUL

Mode DEFAULT for CMU_HFRCOCTRL

Definition at line 315 of file efm32gg12b_cmu.h .

#define _CMU_HFRCOCTRL_TUNING_MASK 0x7FUL

Bit mask for CMU_TUNING

Definition at line 314 of file efm32gg12b_cmu.h .

Referenced by CMU_DPLLLock() , CMU_OscillatorTuningGet() , and CMU_OscillatorTuningSet() .

#define _CMU_HFRCOCTRL_TUNING_SHIFT 0

Shift value for CMU_TUNING

Definition at line 313 of file efm32gg12b_cmu.h .

Referenced by CMU_DPLLLock() , CMU_OscillatorTuningGet() , and CMU_OscillatorTuningSet() .

#define _CMU_HFRCOCTRL_VREFTC_DEFAULT 0x0000000BUL

Mode DEFAULT for CMU_HFRCOCTRL

Definition at line 351 of file efm32gg12b_cmu.h .

#define _CMU_HFRCOCTRL_VREFTC_MASK 0xF0000000UL

Bit mask for CMU_VREFTC

Definition at line 350 of file efm32gg12b_cmu.h .

#define _CMU_HFRCOCTRL_VREFTC_SHIFT 28

Shift value for CMU_VREFTC

Definition at line 349 of file efm32gg12b_cmu.h .

#define _CMU_HFRCOSS_MASK 0x00001F07UL

Mask for CMU_HFRCOSS

Definition at line 2593 of file efm32gg12b_cmu.h .

#define _CMU_HFRCOSS_RESETVALUE 0x00000000UL

Default value for CMU_HFRCOSS

Definition at line 2592 of file efm32gg12b_cmu.h .

#define _CMU_HFRCOSS_SSAMP_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_HFRCOSS

Definition at line 2596 of file efm32gg12b_cmu.h .

#define _CMU_HFRCOSS_SSAMP_MASK 0x7UL

Bit mask for CMU_SSAMP

Definition at line 2595 of file efm32gg12b_cmu.h .

Referenced by CMU_DPLLLock() .

#define _CMU_HFRCOSS_SSAMP_SHIFT 0

Shift value for CMU_SSAMP

Definition at line 2594 of file efm32gg12b_cmu.h .

Referenced by CMU_DPLLLock() .

#define _CMU_HFRCOSS_SSINV_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_HFRCOSS

Definition at line 2600 of file efm32gg12b_cmu.h .

#define _CMU_HFRCOSS_SSINV_MASK 0x1F00UL

Bit mask for CMU_SSINV

Definition at line 2599 of file efm32gg12b_cmu.h .

Referenced by CMU_DPLLLock() .

#define _CMU_HFRCOSS_SSINV_SHIFT 8

Shift value for CMU_SSINV

Definition at line 2598 of file efm32gg12b_cmu.h .

Referenced by CMU_DPLLLock() .

#define _CMU_HFXOCTRL1_MASK 0x00007000UL

Mask for CMU_HFXOCTRL1

Definition at line 512 of file efm32gg12b_cmu.h .

#define _CMU_HFXOCTRL1_PEAKDETTHR_DEFAULT 0x00000002UL

Mode DEFAULT for CMU_HFXOCTRL1

Definition at line 517 of file efm32gg12b_cmu.h .

#define _CMU_HFXOCTRL1_PEAKDETTHR_MASK 0x7000UL

Bit mask for CMU_PEAKDETTHR

Definition at line 514 of file efm32gg12b_cmu.h .

Referenced by CMU_HFXOInit() .

#define _CMU_HFXOCTRL1_PEAKDETTHR_SHIFT 12

Shift value for CMU_PEAKDETTHR

Definition at line 513 of file efm32gg12b_cmu.h .

Referenced by CMU_HFXOInit() .

#define _CMU_HFXOCTRL1_PEAKDETTHR_THR0 0x00000000UL

Mode THR0 for CMU_HFXOCTRL1

Definition at line 515 of file efm32gg12b_cmu.h .

#define _CMU_HFXOCTRL1_PEAKDETTHR_THR1 0x00000001UL

Mode THR1 for CMU_HFXOCTRL1

Definition at line 516 of file efm32gg12b_cmu.h .

#define _CMU_HFXOCTRL1_PEAKDETTHR_THR2 0x00000002UL

Mode THR2 for CMU_HFXOCTRL1

Definition at line 518 of file efm32gg12b_cmu.h .

#define _CMU_HFXOCTRL1_PEAKDETTHR_THR3 0x00000003UL

Mode THR3 for CMU_HFXOCTRL1

Definition at line 519 of file efm32gg12b_cmu.h .

#define _CMU_HFXOCTRL1_PEAKDETTHR_THR4 0x00000004UL

Mode THR4 for CMU_HFXOCTRL1

Definition at line 520 of file efm32gg12b_cmu.h .

#define _CMU_HFXOCTRL1_PEAKDETTHR_THR5 0x00000005UL

Mode THR5 for CMU_HFXOCTRL1

Definition at line 521 of file efm32gg12b_cmu.h .

#define _CMU_HFXOCTRL1_PEAKDETTHR_THR6 0x00000006UL

Mode THR6 for CMU_HFXOCTRL1

Definition at line 522 of file efm32gg12b_cmu.h .

#define _CMU_HFXOCTRL1_PEAKDETTHR_THR7 0x00000007UL

Mode THR7 for CMU_HFXOCTRL1

Definition at line 523 of file efm32gg12b_cmu.h .

#define _CMU_HFXOCTRL1_RESETVALUE 0x00002000UL

Default value for CMU_HFXOCTRL1

Definition at line 511 of file efm32gg12b_cmu.h .

#define _CMU_HFXOCTRL_AUTOSTARTEM0EM1_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_HFXOCTRL

Definition at line 502 of file efm32gg12b_cmu.h .

#define _CMU_HFXOCTRL_AUTOSTARTEM0EM1_MASK 0x10000000UL

Bit mask for CMU_AUTOSTARTEM0EM1

Definition at line 501 of file efm32gg12b_cmu.h .

Referenced by CMU_HFXOAutostartEnable() .

#define _CMU_HFXOCTRL_AUTOSTARTEM0EM1_SHIFT 28

Shift value for CMU_AUTOSTARTEM0EM1

Definition at line 500 of file efm32gg12b_cmu.h .

#define _CMU_HFXOCTRL_AUTOSTARTSELEM0EM1_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_HFXOCTRL

Definition at line 507 of file efm32gg12b_cmu.h .

#define _CMU_HFXOCTRL_AUTOSTARTSELEM0EM1_MASK 0x20000000UL

Bit mask for CMU_AUTOSTARTSELEM0EM1

Definition at line 506 of file efm32gg12b_cmu.h .

Referenced by CMU_HFXOAutostartEnable() .

#define _CMU_HFXOCTRL_AUTOSTARTSELEM0EM1_SHIFT 29

Shift value for CMU_AUTOSTARTSELEM0EM1

Definition at line 505 of file efm32gg12b_cmu.h .

#define _CMU_HFXOCTRL_HFXOX2EN_DEFAULT 0x00000001UL

Mode DEFAULT for CMU_HFXOCTRL

Definition at line 465 of file efm32gg12b_cmu.h .

#define _CMU_HFXOCTRL_HFXOX2EN_MASK 0x8UL

Bit mask for CMU_HFXOX2EN

Definition at line 464 of file efm32gg12b_cmu.h .

Referenced by CMU_HFXOInit() .

#define _CMU_HFXOCTRL_HFXOX2EN_SHIFT 3

Shift value for CMU_HFXOX2EN

Definition at line 463 of file efm32gg12b_cmu.h .

#define _CMU_HFXOCTRL_LFTIMEOUT_0CYCLES 0x00000000UL

Mode 0CYCLES for CMU_HFXOCTRL

Definition at line 482 of file efm32gg12b_cmu.h .

#define _CMU_HFXOCTRL_LFTIMEOUT_16CYCLES 0x00000003UL

Mode 16CYCLES for CMU_HFXOCTRL

Definition at line 485 of file efm32gg12b_cmu.h .

#define _CMU_HFXOCTRL_LFTIMEOUT_1KCYCLES 0x00000006UL

Mode 1KCYCLES for CMU_HFXOCTRL

Definition at line 488 of file efm32gg12b_cmu.h .

#define _CMU_HFXOCTRL_LFTIMEOUT_2CYCLES 0x00000001UL

Mode 2CYCLES for CMU_HFXOCTRL

Definition at line 483 of file efm32gg12b_cmu.h .

#define _CMU_HFXOCTRL_LFTIMEOUT_32CYCLES 0x00000004UL

Mode 32CYCLES for CMU_HFXOCTRL

Definition at line 486 of file efm32gg12b_cmu.h .

#define _CMU_HFXOCTRL_LFTIMEOUT_4CYCLES 0x00000002UL

Mode 4CYCLES for CMU_HFXOCTRL

Definition at line 484 of file efm32gg12b_cmu.h .

#define _CMU_HFXOCTRL_LFTIMEOUT_4KCYCLES 0x00000007UL

Mode 4KCYCLES for CMU_HFXOCTRL

Definition at line 489 of file efm32gg12b_cmu.h .

#define _CMU_HFXOCTRL_LFTIMEOUT_64CYCLES 0x00000005UL

Mode 64CYCLES for CMU_HFXOCTRL

Definition at line 487 of file efm32gg12b_cmu.h .

#define _CMU_HFXOCTRL_LFTIMEOUT_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_HFXOCTRL

Definition at line 481 of file efm32gg12b_cmu.h .

#define _CMU_HFXOCTRL_LFTIMEOUT_MASK 0x7000000UL

Bit mask for CMU_LFTIMEOUT

Definition at line 480 of file efm32gg12b_cmu.h .

#define _CMU_HFXOCTRL_LFTIMEOUT_SHIFT 24

Shift value for CMU_LFTIMEOUT

Definition at line 479 of file efm32gg12b_cmu.h .

#define _CMU_HFXOCTRL_MASK 0x3700003BUL

Mask for CMU_HFXOCTRL

Definition at line 449 of file efm32gg12b_cmu.h .

#define _CMU_HFXOCTRL_MODE_ACBUFEXTCLK 0x00000001UL

Mode ACBUFEXTCLK for CMU_HFXOCTRL

Definition at line 454 of file efm32gg12b_cmu.h .

#define _CMU_HFXOCTRL_MODE_DCBUFEXTCLK 0x00000002UL

Mode DCBUFEXTCLK for CMU_HFXOCTRL

Definition at line 455 of file efm32gg12b_cmu.h .

#define _CMU_HFXOCTRL_MODE_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_HFXOCTRL

Definition at line 452 of file efm32gg12b_cmu.h .

#define _CMU_HFXOCTRL_MODE_DIGEXTCLK 0x00000003UL

Mode DIGEXTCLK for CMU_HFXOCTRL

Definition at line 456 of file efm32gg12b_cmu.h .

#define _CMU_HFXOCTRL_MODE_MASK 0x3UL

Bit mask for CMU_MODE

Definition at line 451 of file efm32gg12b_cmu.h .

Referenced by CMU_HFXOInit() , and CMU_OscillatorEnable() .

#define _CMU_HFXOCTRL_MODE_SHIFT 0

Shift value for CMU_MODE

Definition at line 450 of file efm32gg12b_cmu.h .

#define _CMU_HFXOCTRL_MODE_XTAL 0x00000000UL

Mode XTAL for CMU_HFXOCTRL

Definition at line 453 of file efm32gg12b_cmu.h .

#define _CMU_HFXOCTRL_PEAKDETMODE_AUTOCMD 0x00000001UL

Mode AUTOCMD for CMU_HFXOCTRL

Definition at line 471 of file efm32gg12b_cmu.h .

#define _CMU_HFXOCTRL_PEAKDETMODE_CMD 0x00000002UL

Mode CMD for CMU_HFXOCTRL

Definition at line 472 of file efm32gg12b_cmu.h .

#define _CMU_HFXOCTRL_PEAKDETMODE_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_HFXOCTRL

Definition at line 469 of file efm32gg12b_cmu.h .

#define _CMU_HFXOCTRL_PEAKDETMODE_MANUAL 0x00000003UL

Mode MANUAL for CMU_HFXOCTRL

Definition at line 473 of file efm32gg12b_cmu.h .

#define _CMU_HFXOCTRL_PEAKDETMODE_MASK 0x30UL

Bit mask for CMU_PEAKDETMODE

Definition at line 468 of file efm32gg12b_cmu.h .

#define _CMU_HFXOCTRL_PEAKDETMODE_ONCECMD 0x00000000UL

Mode ONCECMD for CMU_HFXOCTRL

Definition at line 470 of file efm32gg12b_cmu.h .

#define _CMU_HFXOCTRL_PEAKDETMODE_SHIFT 4

Shift value for CMU_PEAKDETMODE

Definition at line 467 of file efm32gg12b_cmu.h .

#define _CMU_HFXOCTRL_RESETVALUE 0x00000008UL

Default value for CMU_HFXOCTRL

Definition at line 448 of file efm32gg12b_cmu.h .

#define _CMU_HFXOSTARTUPCTRL_CTUNE_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_HFXOSTARTUPCTRL

Definition at line 543 of file efm32gg12b_cmu.h .

#define _CMU_HFXOSTARTUPCTRL_CTUNE_MASK 0xFF800UL

Bit mask for CMU_CTUNE

Definition at line 542 of file efm32gg12b_cmu.h .

#define _CMU_HFXOSTARTUPCTRL_CTUNE_SHIFT 11

Shift value for CMU_CTUNE

Definition at line 541 of file efm32gg12b_cmu.h .

Referenced by CMU_HFXOInit() .

#define _CMU_HFXOSTARTUPCTRL_IBTRIMXOCORE_DEFAULT 0x00000600UL

Mode DEFAULT for CMU_HFXOSTARTUPCTRL

Definition at line 539 of file efm32gg12b_cmu.h .

#define _CMU_HFXOSTARTUPCTRL_IBTRIMXOCORE_MASK 0x7FFUL

Bit mask for CMU_IBTRIMXOCORE

Definition at line 538 of file efm32gg12b_cmu.h .

Referenced by CHIP_Init() .

#define _CMU_HFXOSTARTUPCTRL_IBTRIMXOCORE_SHIFT 0

Shift value for CMU_IBTRIMXOCORE

Definition at line 537 of file efm32gg12b_cmu.h .

Referenced by CHIP_Init() , and CMU_HFXOInit() .

#define _CMU_HFXOSTARTUPCTRL_MASK 0x000FFFFFUL

Mask for CMU_HFXOSTARTUPCTRL

Definition at line 536 of file efm32gg12b_cmu.h .

#define _CMU_HFXOSTARTUPCTRL_RESETVALUE 0x00000600UL

Default value for CMU_HFXOSTARTUPCTRL

Definition at line 535 of file efm32gg12b_cmu.h .

#define _CMU_HFXOSTEADYSTATECTRL_CTUNE_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_HFXOSTEADYSTATECTRL

Definition at line 555 of file efm32gg12b_cmu.h .

#define _CMU_HFXOSTEADYSTATECTRL_CTUNE_MASK 0xFF800UL

Bit mask for CMU_CTUNE

Definition at line 554 of file efm32gg12b_cmu.h .

Referenced by CMU_HFXOInit() .

#define _CMU_HFXOSTEADYSTATECTRL_CTUNE_SHIFT 11

Shift value for CMU_CTUNE

Definition at line 553 of file efm32gg12b_cmu.h .

Referenced by CMU_HFXOInit() .

#define _CMU_HFXOSTEADYSTATECTRL_IBTRIMXOCORE_DEFAULT 0x00000100UL

Mode DEFAULT for CMU_HFXOSTEADYSTATECTRL

Definition at line 551 of file efm32gg12b_cmu.h .

#define _CMU_HFXOSTEADYSTATECTRL_IBTRIMXOCORE_MASK 0x7FFUL

Bit mask for CMU_IBTRIMXOCORE

Definition at line 550 of file efm32gg12b_cmu.h .

Referenced by CMU_HFXOInit() , and CMU_OscillatorTuningSet() .

#define _CMU_HFXOSTEADYSTATECTRL_IBTRIMXOCORE_SHIFT 0

Shift value for CMU_IBTRIMXOCORE

Definition at line 549 of file efm32gg12b_cmu.h .

Referenced by CMU_HFXOInit() .

#define _CMU_HFXOSTEADYSTATECTRL_MASK 0x0C0FFFFFUL

Mask for CMU_HFXOSTEADYSTATECTRL

Definition at line 548 of file efm32gg12b_cmu.h .

#define _CMU_HFXOSTEADYSTATECTRL_PEAKDETEN_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_HFXOSTEADYSTATECTRL

Definition at line 560 of file efm32gg12b_cmu.h .

#define _CMU_HFXOSTEADYSTATECTRL_PEAKDETEN_MASK 0x4000000UL

Bit mask for CMU_PEAKDETEN

Definition at line 559 of file efm32gg12b_cmu.h .

#define _CMU_HFXOSTEADYSTATECTRL_PEAKDETEN_SHIFT 26

Shift value for CMU_PEAKDETEN

Definition at line 558 of file efm32gg12b_cmu.h .

#define _CMU_HFXOSTEADYSTATECTRL_PEAKMONEN_DEFAULT 0x00000001UL

Mode DEFAULT for CMU_HFXOSTEADYSTATECTRL

Definition at line 565 of file efm32gg12b_cmu.h .

#define _CMU_HFXOSTEADYSTATECTRL_PEAKMONEN_MASK 0x8000000UL

Bit mask for CMU_PEAKMONEN

Definition at line 564 of file efm32gg12b_cmu.h .

#define _CMU_HFXOSTEADYSTATECTRL_PEAKMONEN_SHIFT 27

Shift value for CMU_PEAKMONEN

Definition at line 563 of file efm32gg12b_cmu.h .

#define _CMU_HFXOSTEADYSTATECTRL_RESETVALUE 0x08000100UL

Default value for CMU_HFXOSTEADYSTATECTRL

Definition at line 547 of file efm32gg12b_cmu.h .

#define _CMU_HFXOTIMEOUTCTRL_MASK 0x0000F0FFUL

Mask for CMU_HFXOTIMEOUTCTRL

Definition at line 570 of file efm32gg12b_cmu.h .

#define _CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_128CYCLES 0x00000005UL

Mode 128CYCLES for CMU_HFXOTIMEOUTCTRL

Definition at line 646 of file efm32gg12b_cmu.h .

#define _CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_128KCYCLES 0x0000000EUL

Mode 128KCYCLES for CMU_HFXOTIMEOUTCTRL

Definition at line 656 of file efm32gg12b_cmu.h .

#define _CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_16CYCLES 0x00000002UL

Mode 16CYCLES for CMU_HFXOTIMEOUTCTRL

Definition at line 643 of file efm32gg12b_cmu.h .

#define _CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_16KCYCLES 0x0000000BUL

Mode 16KCYCLES for CMU_HFXOTIMEOUTCTRL

Definition at line 652 of file efm32gg12b_cmu.h .

#define _CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_1KCYCLES 0x00000007UL

Mode 1KCYCLES for CMU_HFXOTIMEOUTCTRL

Definition at line 648 of file efm32gg12b_cmu.h .

#define _CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_256CYCLES 0x00000006UL

Mode 256CYCLES for CMU_HFXOTIMEOUTCTRL

Definition at line 647 of file efm32gg12b_cmu.h .

#define _CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_2CYCLES 0x00000000UL

Mode 2CYCLES for CMU_HFXOTIMEOUTCTRL

Definition at line 641 of file efm32gg12b_cmu.h .

#define _CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_2KCYCLES 0x00000008UL

Mode 2KCYCLES for CMU_HFXOTIMEOUTCTRL

Definition at line 649 of file efm32gg12b_cmu.h .

#define _CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_32CYCLES 0x00000003UL

Mode 32CYCLES for CMU_HFXOTIMEOUTCTRL

Definition at line 644 of file efm32gg12b_cmu.h .

#define _CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_32KCYCLES 0x0000000CUL

Mode 32KCYCLES for CMU_HFXOTIMEOUTCTRL

Definition at line 653 of file efm32gg12b_cmu.h .

#define _CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_4CYCLES 0x00000001UL

Mode 4CYCLES for CMU_HFXOTIMEOUTCTRL

Definition at line 642 of file efm32gg12b_cmu.h .

#define _CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_4KCYCLES 0x00000009UL

Mode 4KCYCLES for CMU_HFXOTIMEOUTCTRL

Definition at line 650 of file efm32gg12b_cmu.h .

#define _CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_64CYCLES 0x00000004UL

Mode 64CYCLES for CMU_HFXOTIMEOUTCTRL

Definition at line 645 of file efm32gg12b_cmu.h .

#define _CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_64KCYCLES 0x0000000DUL

Mode 64KCYCLES for CMU_HFXOTIMEOUTCTRL

Definition at line 655 of file efm32gg12b_cmu.h .

#define _CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_8KCYCLES 0x0000000AUL

Mode 8KCYCLES for CMU_HFXOTIMEOUTCTRL

Definition at line 651 of file efm32gg12b_cmu.h .

#define _CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_DEFAULT 0x0000000DUL

Mode DEFAULT for CMU_HFXOTIMEOUTCTRL

Definition at line 654 of file efm32gg12b_cmu.h .

#define _CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_MASK 0xF000UL

Bit mask for CMU_PEAKDETTIMEOUT

Definition at line 640 of file efm32gg12b_cmu.h .

#define _CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_SHIFT 12

Shift value for CMU_PEAKDETTIMEOUT

Definition at line 639 of file efm32gg12b_cmu.h .

Referenced by CMU_HFXOInit() .

#define _CMU_HFXOTIMEOUTCTRL_RESETVALUE 0x0000D08EUL

Default value for CMU_HFXOTIMEOUTCTRL

Definition at line 569 of file efm32gg12b_cmu.h .

#define _CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_128CYCLES 0x00000005UL

Mode 128CYCLES for CMU_HFXOTIMEOUTCTRL

Definition at line 578 of file efm32gg12b_cmu.h .

#define _CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_128KCYCLES 0x0000000EUL

Mode 128KCYCLES for CMU_HFXOTIMEOUTCTRL

Definition at line 588 of file efm32gg12b_cmu.h .

#define _CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_16CYCLES 0x00000002UL

Mode 16CYCLES for CMU_HFXOTIMEOUTCTRL

Definition at line 575 of file efm32gg12b_cmu.h .

#define _CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_16KCYCLES 0x0000000BUL

Mode 16KCYCLES for CMU_HFXOTIMEOUTCTRL

Definition at line 584 of file efm32gg12b_cmu.h .

#define _CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_1KCYCLES 0x00000007UL

Mode 1KCYCLES for CMU_HFXOTIMEOUTCTRL

Definition at line 580 of file efm32gg12b_cmu.h .

#define _CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_256CYCLES 0x00000006UL

Mode 256CYCLES for CMU_HFXOTIMEOUTCTRL

Definition at line 579 of file efm32gg12b_cmu.h .

#define _CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_2CYCLES 0x00000000UL

Mode 2CYCLES for CMU_HFXOTIMEOUTCTRL

Definition at line 573 of file efm32gg12b_cmu.h .

#define _CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_2KCYCLES 0x00000008UL

Mode 2KCYCLES for CMU_HFXOTIMEOUTCTRL

Definition at line 581 of file efm32gg12b_cmu.h .

#define _CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_32CYCLES 0x00000003UL

Mode 32CYCLES for CMU_HFXOTIMEOUTCTRL

Definition at line 576 of file efm32gg12b_cmu.h .

#define _CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_32KCYCLES 0x0000000CUL

Mode 32KCYCLES for CMU_HFXOTIMEOUTCTRL

Definition at line 585 of file efm32gg12b_cmu.h .

#define _CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_4CYCLES 0x00000001UL

Mode 4CYCLES for CMU_HFXOTIMEOUTCTRL

Definition at line 574 of file efm32gg12b_cmu.h .

#define _CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_4KCYCLES 0x00000009UL

Mode 4KCYCLES for CMU_HFXOTIMEOUTCTRL

Definition at line 582 of file efm32gg12b_cmu.h .

#define _CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_64CYCLES 0x00000004UL

Mode 64CYCLES for CMU_HFXOTIMEOUTCTRL

Definition at line 577 of file efm32gg12b_cmu.h .

#define _CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_64KCYCLES 0x0000000DUL

Mode 64KCYCLES for CMU_HFXOTIMEOUTCTRL

Definition at line 586 of file efm32gg12b_cmu.h .

#define _CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_8KCYCLES 0x0000000AUL

Mode 8KCYCLES for CMU_HFXOTIMEOUTCTRL

Definition at line 583 of file efm32gg12b_cmu.h .

#define _CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_DEFAULT 0x0000000EUL

Mode DEFAULT for CMU_HFXOTIMEOUTCTRL

Definition at line 587 of file efm32gg12b_cmu.h .

#define _CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_MASK 0xFUL

Bit mask for CMU_STARTUPTIMEOUT

Definition at line 572 of file efm32gg12b_cmu.h .

#define _CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_SHIFT 0

Shift value for CMU_STARTUPTIMEOUT

Definition at line 571 of file efm32gg12b_cmu.h .

Referenced by CMU_HFXOInit() .

#define _CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_128CYCLES 0x00000005UL

Mode 128CYCLES for CMU_HFXOTIMEOUTCTRL

Definition at line 612 of file efm32gg12b_cmu.h .

#define _CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_128KCYCLES 0x0000000EUL

Mode 128KCYCLES for CMU_HFXOTIMEOUTCTRL

Definition at line 622 of file efm32gg12b_cmu.h .

#define _CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_16CYCLES 0x00000002UL

Mode 16CYCLES for CMU_HFXOTIMEOUTCTRL

Definition at line 609 of file efm32gg12b_cmu.h .

#define _CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_16KCYCLES 0x0000000BUL

Mode 16KCYCLES for CMU_HFXOTIMEOUTCTRL

Definition at line 619 of file efm32gg12b_cmu.h .

#define _CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_1KCYCLES 0x00000007UL

Mode 1KCYCLES for CMU_HFXOTIMEOUTCTRL

Definition at line 614 of file efm32gg12b_cmu.h .

#define _CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_256CYCLES 0x00000006UL

Mode 256CYCLES for CMU_HFXOTIMEOUTCTRL

Definition at line 613 of file efm32gg12b_cmu.h .

#define _CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_2CYCLES 0x00000000UL

Mode 2CYCLES for CMU_HFXOTIMEOUTCTRL

Definition at line 607 of file efm32gg12b_cmu.h .

#define _CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_2KCYCLES 0x00000008UL

Mode 2KCYCLES for CMU_HFXOTIMEOUTCTRL

Definition at line 616 of file efm32gg12b_cmu.h .

#define _CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_32CYCLES 0x00000003UL

Mode 32CYCLES for CMU_HFXOTIMEOUTCTRL

Definition at line 610 of file efm32gg12b_cmu.h .

#define _CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_32KCYCLES 0x0000000CUL

Mode 32KCYCLES for CMU_HFXOTIMEOUTCTRL

Definition at line 620 of file efm32gg12b_cmu.h .

#define _CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_4CYCLES 0x00000001UL

Mode 4CYCLES for CMU_HFXOTIMEOUTCTRL

Definition at line 608 of file efm32gg12b_cmu.h .

#define _CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_4KCYCLES 0x00000009UL

Mode 4KCYCLES for CMU_HFXOTIMEOUTCTRL

Definition at line 617 of file efm32gg12b_cmu.h .

#define _CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_64CYCLES 0x00000004UL

Mode 64CYCLES for CMU_HFXOTIMEOUTCTRL

Definition at line 611 of file efm32gg12b_cmu.h .

#define _CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_64KCYCLES 0x0000000DUL

Mode 64KCYCLES for CMU_HFXOTIMEOUTCTRL

Definition at line 621 of file efm32gg12b_cmu.h .

#define _CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_8KCYCLES 0x0000000AUL

Mode 8KCYCLES for CMU_HFXOTIMEOUTCTRL

Definition at line 618 of file efm32gg12b_cmu.h .

#define _CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_DEFAULT 0x00000008UL

Mode DEFAULT for CMU_HFXOTIMEOUTCTRL

Definition at line 615 of file efm32gg12b_cmu.h .

#define _CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_MASK 0xF0UL

Bit mask for CMU_STEADYTIMEOUT

Definition at line 606 of file efm32gg12b_cmu.h .

#define _CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_SHIFT 4

Shift value for CMU_STEADYTIMEOUT

Definition at line 605 of file efm32gg12b_cmu.h .

Referenced by CMU_HFXOInit() .

#define _CMU_HFXOTRIMSTATUS_IBTRIMXOCORE_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_HFXOTRIMSTATUS

Definition at line 1259 of file efm32gg12b_cmu.h .

#define _CMU_HFXOTRIMSTATUS_IBTRIMXOCORE_MASK 0x7FFUL

Bit mask for CMU_IBTRIMXOCORE

Definition at line 1258 of file efm32gg12b_cmu.h .

Referenced by CMU_OscillatorTuningGet() .

#define _CMU_HFXOTRIMSTATUS_IBTRIMXOCORE_SHIFT 0

Shift value for CMU_IBTRIMXOCORE

Definition at line 1257 of file efm32gg12b_cmu.h .

#define _CMU_HFXOTRIMSTATUS_IBTRIMXOCOREMON_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_HFXOTRIMSTATUS

Definition at line 1263 of file efm32gg12b_cmu.h .

#define _CMU_HFXOTRIMSTATUS_IBTRIMXOCOREMON_MASK 0x7FF0000UL

Bit mask for CMU_IBTRIMXOCOREMON

Definition at line 1262 of file efm32gg12b_cmu.h .

#define _CMU_HFXOTRIMSTATUS_IBTRIMXOCOREMON_SHIFT 16

Shift value for CMU_IBTRIMXOCOREMON

Definition at line 1261 of file efm32gg12b_cmu.h .

#define _CMU_HFXOTRIMSTATUS_MASK 0xC7FF07FFUL

Mask for CMU_HFXOTRIMSTATUS

Definition at line 1256 of file efm32gg12b_cmu.h .

#define _CMU_HFXOTRIMSTATUS_MONVALID_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_HFXOTRIMSTATUS

Definition at line 1273 of file efm32gg12b_cmu.h .

#define _CMU_HFXOTRIMSTATUS_MONVALID_MASK 0x80000000UL

Bit mask for CMU_MONVALID

Definition at line 1272 of file efm32gg12b_cmu.h .

#define _CMU_HFXOTRIMSTATUS_MONVALID_SHIFT 31

Shift value for CMU_MONVALID

Definition at line 1271 of file efm32gg12b_cmu.h .

#define _CMU_HFXOTRIMSTATUS_RESETVALUE 0x00000000UL

Default value for CMU_HFXOTRIMSTATUS

Definition at line 1255 of file efm32gg12b_cmu.h .

#define _CMU_HFXOTRIMSTATUS_VALID_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_HFXOTRIMSTATUS

Definition at line 1268 of file efm32gg12b_cmu.h .

#define _CMU_HFXOTRIMSTATUS_VALID_MASK 0x40000000UL

Bit mask for CMU_VALID

Definition at line 1267 of file efm32gg12b_cmu.h .

#define _CMU_HFXOTRIMSTATUS_VALID_SHIFT 30

Shift value for CMU_VALID

Definition at line 1266 of file efm32gg12b_cmu.h .

#define _CMU_IEN_AUXHFRCORDY_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_IEN

Definition at line 1614 of file efm32gg12b_cmu.h .

#define _CMU_IEN_AUXHFRCORDY_MASK 0x10UL

Bit mask for CMU_AUXHFRCORDY

Definition at line 1613 of file efm32gg12b_cmu.h .

#define _CMU_IEN_AUXHFRCORDY_SHIFT 4

Shift value for CMU_AUXHFRCORDY

Definition at line 1612 of file efm32gg12b_cmu.h .

#define _CMU_IEN_CALOF_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_IEN

Definition at line 1624 of file efm32gg12b_cmu.h .

#define _CMU_IEN_CALOF_MASK 0x40UL

Bit mask for CMU_CALOF

Definition at line 1623 of file efm32gg12b_cmu.h .

#define _CMU_IEN_CALOF_SHIFT 6

Shift value for CMU_CALOF

Definition at line 1622 of file efm32gg12b_cmu.h .

#define _CMU_IEN_CALRDY_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_IEN

Definition at line 1619 of file efm32gg12b_cmu.h .

#define _CMU_IEN_CALRDY_MASK 0x20UL

Bit mask for CMU_CALRDY

Definition at line 1618 of file efm32gg12b_cmu.h .

#define _CMU_IEN_CALRDY_SHIFT 5

Shift value for CMU_CALRDY

Definition at line 1617 of file efm32gg12b_cmu.h .

#define _CMU_IEN_CMUERR_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_IEN

Definition at line 1689 of file efm32gg12b_cmu.h .

#define _CMU_IEN_CMUERR_MASK 0x80000000UL

Bit mask for CMU_CMUERR

Definition at line 1688 of file efm32gg12b_cmu.h .

#define _CMU_IEN_CMUERR_SHIFT 31

Shift value for CMU_CMUERR

Definition at line 1687 of file efm32gg12b_cmu.h .

#define _CMU_IEN_DPLLLOCKFAILHIGH_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_IEN

Definition at line 1669 of file efm32gg12b_cmu.h .

#define _CMU_IEN_DPLLLOCKFAILHIGH_MASK 0x20000UL

Bit mask for CMU_DPLLLOCKFAILHIGH

Definition at line 1668 of file efm32gg12b_cmu.h .

#define _CMU_IEN_DPLLLOCKFAILHIGH_SHIFT 17

Shift value for CMU_DPLLLOCKFAILHIGH

Definition at line 1667 of file efm32gg12b_cmu.h .

#define _CMU_IEN_DPLLLOCKFAILLOW_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_IEN

Definition at line 1664 of file efm32gg12b_cmu.h .

#define _CMU_IEN_DPLLLOCKFAILLOW_MASK 0x10000UL

Bit mask for CMU_DPLLLOCKFAILLOW

Definition at line 1663 of file efm32gg12b_cmu.h .

#define _CMU_IEN_DPLLLOCKFAILLOW_SHIFT 16

Shift value for CMU_DPLLLOCKFAILLOW

Definition at line 1662 of file efm32gg12b_cmu.h .

#define _CMU_IEN_DPLLRDY_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_IEN

Definition at line 1659 of file efm32gg12b_cmu.h .

#define _CMU_IEN_DPLLRDY_MASK 0x8000UL

Bit mask for CMU_DPLLRDY

Definition at line 1658 of file efm32gg12b_cmu.h .

#define _CMU_IEN_DPLLRDY_SHIFT 15

Shift value for CMU_DPLLRDY

Definition at line 1657 of file efm32gg12b_cmu.h .

#define _CMU_IEN_HFRCODIS_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_IEN

Definition at line 1649 of file efm32gg12b_cmu.h .

#define _CMU_IEN_HFRCODIS_MASK 0x2000UL

Bit mask for CMU_HFRCODIS

Definition at line 1648 of file efm32gg12b_cmu.h .

#define _CMU_IEN_HFRCODIS_SHIFT 13

Shift value for CMU_HFRCODIS

Definition at line 1647 of file efm32gg12b_cmu.h .

#define _CMU_IEN_HFRCORDY_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_IEN

Definition at line 1594 of file efm32gg12b_cmu.h .

#define _CMU_IEN_HFRCORDY_MASK 0x1UL

Bit mask for CMU_HFRCORDY

Definition at line 1593 of file efm32gg12b_cmu.h .

#define _CMU_IEN_HFRCORDY_SHIFT 0

Shift value for CMU_HFRCORDY

Definition at line 1592 of file efm32gg12b_cmu.h .

#define _CMU_IEN_HFXOAUTOSW_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_IEN

Definition at line 1639 of file efm32gg12b_cmu.h .

#define _CMU_IEN_HFXOAUTOSW_MASK 0x200UL

Bit mask for CMU_HFXOAUTOSW

Definition at line 1638 of file efm32gg12b_cmu.h .

#define _CMU_IEN_HFXOAUTOSW_SHIFT 9

Shift value for CMU_HFXOAUTOSW

Definition at line 1637 of file efm32gg12b_cmu.h .

#define _CMU_IEN_HFXODISERR_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_IEN

Definition at line 1634 of file efm32gg12b_cmu.h .

#define _CMU_IEN_HFXODISERR_MASK 0x100UL

Bit mask for CMU_HFXODISERR

Definition at line 1633 of file efm32gg12b_cmu.h .

#define _CMU_IEN_HFXODISERR_SHIFT 8

Shift value for CMU_HFXODISERR

Definition at line 1632 of file efm32gg12b_cmu.h .

#define _CMU_IEN_HFXOPEAKDETRDY_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_IEN

Definition at line 1644 of file efm32gg12b_cmu.h .

#define _CMU_IEN_HFXOPEAKDETRDY_MASK 0x800UL

Bit mask for CMU_HFXOPEAKDETRDY

Definition at line 1643 of file efm32gg12b_cmu.h .

#define _CMU_IEN_HFXOPEAKDETRDY_SHIFT 11

Shift value for CMU_HFXOPEAKDETRDY

Definition at line 1642 of file efm32gg12b_cmu.h .

#define _CMU_IEN_HFXORDY_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_IEN

Definition at line 1599 of file efm32gg12b_cmu.h .

#define _CMU_IEN_HFXORDY_MASK 0x2UL

Bit mask for CMU_HFXORDY

Definition at line 1598 of file efm32gg12b_cmu.h .

#define _CMU_IEN_HFXORDY_SHIFT 1

Shift value for CMU_HFXORDY

Definition at line 1597 of file efm32gg12b_cmu.h .

#define _CMU_IEN_LFRCOEDGE_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_IEN

Definition at line 1679 of file efm32gg12b_cmu.h .

#define _CMU_IEN_LFRCOEDGE_MASK 0x10000000UL

Bit mask for CMU_LFRCOEDGE

Definition at line 1678 of file efm32gg12b_cmu.h .

#define _CMU_IEN_LFRCOEDGE_SHIFT 28

Shift value for CMU_LFRCOEDGE

Definition at line 1677 of file efm32gg12b_cmu.h .

#define _CMU_IEN_LFRCORDY_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_IEN

Definition at line 1604 of file efm32gg12b_cmu.h .

#define _CMU_IEN_LFRCORDY_MASK 0x4UL

Bit mask for CMU_LFRCORDY

Definition at line 1603 of file efm32gg12b_cmu.h .

#define _CMU_IEN_LFRCORDY_SHIFT 2

Shift value for CMU_LFRCORDY

Definition at line 1602 of file efm32gg12b_cmu.h .

#define _CMU_IEN_LFTIMEOUTERR_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_IEN

Definition at line 1654 of file efm32gg12b_cmu.h .

#define _CMU_IEN_LFTIMEOUTERR_MASK 0x4000UL

Bit mask for CMU_LFTIMEOUTERR

Definition at line 1653 of file efm32gg12b_cmu.h .

#define _CMU_IEN_LFTIMEOUTERR_SHIFT 14

Shift value for CMU_LFTIMEOUTERR

Definition at line 1652 of file efm32gg12b_cmu.h .

#define _CMU_IEN_LFXOEDGE_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_IEN

Definition at line 1674 of file efm32gg12b_cmu.h .

#define _CMU_IEN_LFXOEDGE_MASK 0x8000000UL

Bit mask for CMU_LFXOEDGE

Definition at line 1673 of file efm32gg12b_cmu.h .

#define _CMU_IEN_LFXOEDGE_SHIFT 27

Shift value for CMU_LFXOEDGE

Definition at line 1672 of file efm32gg12b_cmu.h .

#define _CMU_IEN_LFXORDY_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_IEN

Definition at line 1609 of file efm32gg12b_cmu.h .

#define _CMU_IEN_LFXORDY_MASK 0x8UL

Bit mask for CMU_LFXORDY

Definition at line 1608 of file efm32gg12b_cmu.h .

#define _CMU_IEN_LFXORDY_SHIFT 3

Shift value for CMU_LFXORDY

Definition at line 1607 of file efm32gg12b_cmu.h .

#define _CMU_IEN_MASK 0xB803EBFFUL

Mask for CMU_IEN

Definition at line 1590 of file efm32gg12b_cmu.h .

#define _CMU_IEN_RESETVALUE 0x00000000UL

Default value for CMU_IEN

Definition at line 1589 of file efm32gg12b_cmu.h .

#define _CMU_IEN_ULFRCOEDGE_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_IEN

Definition at line 1684 of file efm32gg12b_cmu.h .

#define _CMU_IEN_ULFRCOEDGE_MASK 0x20000000UL

Bit mask for CMU_ULFRCOEDGE

Definition at line 1683 of file efm32gg12b_cmu.h .

#define _CMU_IEN_ULFRCOEDGE_SHIFT 29

Shift value for CMU_ULFRCOEDGE

Definition at line 1682 of file efm32gg12b_cmu.h .

#define _CMU_IEN_USHFRCORDY_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_IEN

Definition at line 1629 of file efm32gg12b_cmu.h .

#define _CMU_IEN_USHFRCORDY_MASK 0x80UL

Bit mask for CMU_USHFRCORDY

Definition at line 1628 of file efm32gg12b_cmu.h .

#define _CMU_IEN_USHFRCORDY_SHIFT 7

Shift value for CMU_USHFRCORDY

Definition at line 1627 of file efm32gg12b_cmu.h .

#define _CMU_IF_AUXHFRCORDY_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_IF

Definition at line 1302 of file efm32gg12b_cmu.h .

#define _CMU_IF_AUXHFRCORDY_MASK 0x10UL

Bit mask for CMU_AUXHFRCORDY

Definition at line 1301 of file efm32gg12b_cmu.h .

#define _CMU_IF_AUXHFRCORDY_SHIFT 4

Shift value for CMU_AUXHFRCORDY

Definition at line 1300 of file efm32gg12b_cmu.h .

#define _CMU_IF_CALOF_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_IF

Definition at line 1312 of file efm32gg12b_cmu.h .

#define _CMU_IF_CALOF_MASK 0x40UL

Bit mask for CMU_CALOF

Definition at line 1311 of file efm32gg12b_cmu.h .

#define _CMU_IF_CALOF_SHIFT 6

Shift value for CMU_CALOF

Definition at line 1310 of file efm32gg12b_cmu.h .

#define _CMU_IF_CALRDY_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_IF

Definition at line 1307 of file efm32gg12b_cmu.h .

#define _CMU_IF_CALRDY_MASK 0x20UL

Bit mask for CMU_CALRDY

Definition at line 1306 of file efm32gg12b_cmu.h .

#define _CMU_IF_CALRDY_SHIFT 5

Shift value for CMU_CALRDY

Definition at line 1305 of file efm32gg12b_cmu.h .

#define _CMU_IF_CMUERR_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_IF

Definition at line 1377 of file efm32gg12b_cmu.h .

#define _CMU_IF_CMUERR_MASK 0x80000000UL

Bit mask for CMU_CMUERR

Definition at line 1376 of file efm32gg12b_cmu.h .

#define _CMU_IF_CMUERR_SHIFT 31

Shift value for CMU_CMUERR

Definition at line 1375 of file efm32gg12b_cmu.h .

#define _CMU_IF_DPLLLOCKFAILHIGH_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_IF

Definition at line 1357 of file efm32gg12b_cmu.h .

#define _CMU_IF_DPLLLOCKFAILHIGH_MASK 0x20000UL

Bit mask for CMU_DPLLLOCKFAILHIGH

Definition at line 1356 of file efm32gg12b_cmu.h .

#define _CMU_IF_DPLLLOCKFAILHIGH_SHIFT 17

Shift value for CMU_DPLLLOCKFAILHIGH

Definition at line 1355 of file efm32gg12b_cmu.h .

#define _CMU_IF_DPLLLOCKFAILLOW_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_IF

Definition at line 1352 of file efm32gg12b_cmu.h .

#define _CMU_IF_DPLLLOCKFAILLOW_MASK 0x10000UL

Bit mask for CMU_DPLLLOCKFAILLOW

Definition at line 1351 of file efm32gg12b_cmu.h .

#define _CMU_IF_DPLLLOCKFAILLOW_SHIFT 16

Shift value for CMU_DPLLLOCKFAILLOW

Definition at line 1350 of file efm32gg12b_cmu.h .

#define _CMU_IF_DPLLRDY_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_IF

Definition at line 1347 of file efm32gg12b_cmu.h .

#define _CMU_IF_DPLLRDY_MASK 0x8000UL

Bit mask for CMU_DPLLRDY

Definition at line 1346 of file efm32gg12b_cmu.h .

#define _CMU_IF_DPLLRDY_SHIFT 15

Shift value for CMU_DPLLRDY

Definition at line 1345 of file efm32gg12b_cmu.h .

#define _CMU_IF_HFRCODIS_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_IF

Definition at line 1337 of file efm32gg12b_cmu.h .

#define _CMU_IF_HFRCODIS_MASK 0x2000UL

Bit mask for CMU_HFRCODIS

Definition at line 1336 of file efm32gg12b_cmu.h .

#define _CMU_IF_HFRCODIS_SHIFT 13

Shift value for CMU_HFRCODIS

Definition at line 1335 of file efm32gg12b_cmu.h .

#define _CMU_IF_HFRCORDY_DEFAULT 0x00000001UL

Mode DEFAULT for CMU_IF

Definition at line 1282 of file efm32gg12b_cmu.h .

#define _CMU_IF_HFRCORDY_MASK 0x1UL

Bit mask for CMU_HFRCORDY

Definition at line 1281 of file efm32gg12b_cmu.h .

#define _CMU_IF_HFRCORDY_SHIFT 0

Shift value for CMU_HFRCORDY

Definition at line 1280 of file efm32gg12b_cmu.h .

#define _CMU_IF_HFXOAUTOSW_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_IF

Definition at line 1327 of file efm32gg12b_cmu.h .

#define _CMU_IF_HFXOAUTOSW_MASK 0x200UL

Bit mask for CMU_HFXOAUTOSW

Definition at line 1326 of file efm32gg12b_cmu.h .

#define _CMU_IF_HFXOAUTOSW_SHIFT 9

Shift value for CMU_HFXOAUTOSW

Definition at line 1325 of file efm32gg12b_cmu.h .

#define _CMU_IF_HFXODISERR_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_IF

Definition at line 1322 of file efm32gg12b_cmu.h .

#define _CMU_IF_HFXODISERR_MASK 0x100UL

Bit mask for CMU_HFXODISERR

Definition at line 1321 of file efm32gg12b_cmu.h .

#define _CMU_IF_HFXODISERR_SHIFT 8

Shift value for CMU_HFXODISERR

Definition at line 1320 of file efm32gg12b_cmu.h .

#define _CMU_IF_HFXOPEAKDETRDY_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_IF

Definition at line 1332 of file efm32gg12b_cmu.h .

#define _CMU_IF_HFXOPEAKDETRDY_MASK 0x800UL

Bit mask for CMU_HFXOPEAKDETRDY

Definition at line 1331 of file efm32gg12b_cmu.h .

#define _CMU_IF_HFXOPEAKDETRDY_SHIFT 11

Shift value for CMU_HFXOPEAKDETRDY

Definition at line 1330 of file efm32gg12b_cmu.h .

#define _CMU_IF_HFXORDY_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_IF

Definition at line 1287 of file efm32gg12b_cmu.h .

#define _CMU_IF_HFXORDY_MASK 0x2UL

Bit mask for CMU_HFXORDY

Definition at line 1286 of file efm32gg12b_cmu.h .

#define _CMU_IF_HFXORDY_SHIFT 1

Shift value for CMU_HFXORDY

Definition at line 1285 of file efm32gg12b_cmu.h .

#define _CMU_IF_LFRCOEDGE_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_IF

Definition at line 1367 of file efm32gg12b_cmu.h .

#define _CMU_IF_LFRCOEDGE_MASK 0x10000000UL

Bit mask for CMU_LFRCOEDGE

Definition at line 1366 of file efm32gg12b_cmu.h .

#define _CMU_IF_LFRCOEDGE_SHIFT 28

Shift value for CMU_LFRCOEDGE

Definition at line 1365 of file efm32gg12b_cmu.h .

#define _CMU_IF_LFRCORDY_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_IF

Definition at line 1292 of file efm32gg12b_cmu.h .

#define _CMU_IF_LFRCORDY_MASK 0x4UL

Bit mask for CMU_LFRCORDY

Definition at line 1291 of file efm32gg12b_cmu.h .

#define _CMU_IF_LFRCORDY_SHIFT 2

Shift value for CMU_LFRCORDY

Definition at line 1290 of file efm32gg12b_cmu.h .

#define _CMU_IF_LFTIMEOUTERR_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_IF

Definition at line 1342 of file efm32gg12b_cmu.h .

#define _CMU_IF_LFTIMEOUTERR_MASK 0x4000UL

Bit mask for CMU_LFTIMEOUTERR

Definition at line 1341 of file efm32gg12b_cmu.h .

#define _CMU_IF_LFTIMEOUTERR_SHIFT 14

Shift value for CMU_LFTIMEOUTERR

Definition at line 1340 of file efm32gg12b_cmu.h .

#define _CMU_IF_LFXOEDGE_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_IF

Definition at line 1362 of file efm32gg12b_cmu.h .

#define _CMU_IF_LFXOEDGE_MASK 0x8000000UL

Bit mask for CMU_LFXOEDGE

Definition at line 1361 of file efm32gg12b_cmu.h .

#define _CMU_IF_LFXOEDGE_SHIFT 27

Shift value for CMU_LFXOEDGE

Definition at line 1360 of file efm32gg12b_cmu.h .

#define _CMU_IF_LFXORDY_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_IF

Definition at line 1297 of file efm32gg12b_cmu.h .

#define _CMU_IF_LFXORDY_MASK 0x8UL

Bit mask for CMU_LFXORDY

Definition at line 1296 of file efm32gg12b_cmu.h .

#define _CMU_IF_LFXORDY_SHIFT 3

Shift value for CMU_LFXORDY

Definition at line 1295 of file efm32gg12b_cmu.h .

#define _CMU_IF_MASK 0xB803EBFFUL

Mask for CMU_IF

Definition at line 1278 of file efm32gg12b_cmu.h .

#define _CMU_IF_RESETVALUE 0x00000001UL

Default value for CMU_IF

Definition at line 1277 of file efm32gg12b_cmu.h .

#define _CMU_IF_ULFRCOEDGE_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_IF

Definition at line 1372 of file efm32gg12b_cmu.h .

#define _CMU_IF_ULFRCOEDGE_MASK 0x20000000UL

Bit mask for CMU_ULFRCOEDGE

Definition at line 1371 of file efm32gg12b_cmu.h .

#define _CMU_IF_ULFRCOEDGE_SHIFT 29

Shift value for CMU_ULFRCOEDGE

Definition at line 1370 of file efm32gg12b_cmu.h .

#define _CMU_IF_USHFRCORDY_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_IF

Definition at line 1317 of file efm32gg12b_cmu.h .

#define _CMU_IF_USHFRCORDY_MASK 0x80UL

Bit mask for CMU_USHFRCORDY

Definition at line 1316 of file efm32gg12b_cmu.h .

#define _CMU_IF_USHFRCORDY_SHIFT 7

Shift value for CMU_USHFRCORDY

Definition at line 1315 of file efm32gg12b_cmu.h .

#define _CMU_IFC_AUXHFRCORDY_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_IFC

Definition at line 1510 of file efm32gg12b_cmu.h .

#define _CMU_IFC_AUXHFRCORDY_MASK 0x10UL

Bit mask for CMU_AUXHFRCORDY

Definition at line 1509 of file efm32gg12b_cmu.h .

#define _CMU_IFC_AUXHFRCORDY_SHIFT 4

Shift value for CMU_AUXHFRCORDY

Definition at line 1508 of file efm32gg12b_cmu.h .

#define _CMU_IFC_CALOF_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_IFC

Definition at line 1520 of file efm32gg12b_cmu.h .

#define _CMU_IFC_CALOF_MASK 0x40UL

Bit mask for CMU_CALOF

Definition at line 1519 of file efm32gg12b_cmu.h .

#define _CMU_IFC_CALOF_SHIFT 6

Shift value for CMU_CALOF

Definition at line 1518 of file efm32gg12b_cmu.h .

#define _CMU_IFC_CALRDY_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_IFC

Definition at line 1515 of file efm32gg12b_cmu.h .

#define _CMU_IFC_CALRDY_MASK 0x20UL

Bit mask for CMU_CALRDY

Definition at line 1514 of file efm32gg12b_cmu.h .

#define _CMU_IFC_CALRDY_SHIFT 5

Shift value for CMU_CALRDY

Definition at line 1513 of file efm32gg12b_cmu.h .

#define _CMU_IFC_CMUERR_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_IFC

Definition at line 1585 of file efm32gg12b_cmu.h .

#define _CMU_IFC_CMUERR_MASK 0x80000000UL

Bit mask for CMU_CMUERR

Definition at line 1584 of file efm32gg12b_cmu.h .

#define _CMU_IFC_CMUERR_SHIFT 31

Shift value for CMU_CMUERR

Definition at line 1583 of file efm32gg12b_cmu.h .

#define _CMU_IFC_DPLLLOCKFAILHIGH_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_IFC

Definition at line 1565 of file efm32gg12b_cmu.h .

#define _CMU_IFC_DPLLLOCKFAILHIGH_MASK 0x20000UL

Bit mask for CMU_DPLLLOCKFAILHIGH

Definition at line 1564 of file efm32gg12b_cmu.h .

#define _CMU_IFC_DPLLLOCKFAILHIGH_SHIFT 17

Shift value for CMU_DPLLLOCKFAILHIGH

Definition at line 1563 of file efm32gg12b_cmu.h .

#define _CMU_IFC_DPLLLOCKFAILLOW_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_IFC

Definition at line 1560 of file efm32gg12b_cmu.h .

#define _CMU_IFC_DPLLLOCKFAILLOW_MASK 0x10000UL

Bit mask for CMU_DPLLLOCKFAILLOW

Definition at line 1559 of file efm32gg12b_cmu.h .

#define _CMU_IFC_DPLLLOCKFAILLOW_SHIFT 16

Shift value for CMU_DPLLLOCKFAILLOW

Definition at line 1558 of file efm32gg12b_cmu.h .

#define _CMU_IFC_DPLLRDY_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_IFC

Definition at line 1555 of file efm32gg12b_cmu.h .

#define _CMU_IFC_DPLLRDY_MASK 0x8000UL

Bit mask for CMU_DPLLRDY

Definition at line 1554 of file efm32gg12b_cmu.h .

#define _CMU_IFC_DPLLRDY_SHIFT 15

Shift value for CMU_DPLLRDY

Definition at line 1553 of file efm32gg12b_cmu.h .

#define _CMU_IFC_HFRCODIS_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_IFC

Definition at line 1545 of file efm32gg12b_cmu.h .

#define _CMU_IFC_HFRCODIS_MASK 0x2000UL

Bit mask for CMU_HFRCODIS

Definition at line 1544 of file efm32gg12b_cmu.h .

#define _CMU_IFC_HFRCODIS_SHIFT 13

Shift value for CMU_HFRCODIS

Definition at line 1543 of file efm32gg12b_cmu.h .

#define _CMU_IFC_HFRCORDY_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_IFC

Definition at line 1490 of file efm32gg12b_cmu.h .

#define _CMU_IFC_HFRCORDY_MASK 0x1UL

Bit mask for CMU_HFRCORDY

Definition at line 1489 of file efm32gg12b_cmu.h .

#define _CMU_IFC_HFRCORDY_SHIFT 0

Shift value for CMU_HFRCORDY

Definition at line 1488 of file efm32gg12b_cmu.h .

#define _CMU_IFC_HFXOAUTOSW_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_IFC

Definition at line 1535 of file efm32gg12b_cmu.h .

#define _CMU_IFC_HFXOAUTOSW_MASK 0x200UL

Bit mask for CMU_HFXOAUTOSW

Definition at line 1534 of file efm32gg12b_cmu.h .

#define _CMU_IFC_HFXOAUTOSW_SHIFT 9

Shift value for CMU_HFXOAUTOSW

Definition at line 1533 of file efm32gg12b_cmu.h .

#define _CMU_IFC_HFXODISERR_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_IFC

Definition at line 1530 of file efm32gg12b_cmu.h .

#define _CMU_IFC_HFXODISERR_MASK 0x100UL

Bit mask for CMU_HFXODISERR

Definition at line 1529 of file efm32gg12b_cmu.h .

#define _CMU_IFC_HFXODISERR_SHIFT 8

Shift value for CMU_HFXODISERR

Definition at line 1528 of file efm32gg12b_cmu.h .

#define _CMU_IFC_HFXOPEAKDETRDY_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_IFC

Definition at line 1540 of file efm32gg12b_cmu.h .

#define _CMU_IFC_HFXOPEAKDETRDY_MASK 0x800UL

Bit mask for CMU_HFXOPEAKDETRDY

Definition at line 1539 of file efm32gg12b_cmu.h .

#define _CMU_IFC_HFXOPEAKDETRDY_SHIFT 11

Shift value for CMU_HFXOPEAKDETRDY

Definition at line 1538 of file efm32gg12b_cmu.h .

#define _CMU_IFC_HFXORDY_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_IFC

Definition at line 1495 of file efm32gg12b_cmu.h .

#define _CMU_IFC_HFXORDY_MASK 0x2UL

Bit mask for CMU_HFXORDY

Definition at line 1494 of file efm32gg12b_cmu.h .

#define _CMU_IFC_HFXORDY_SHIFT 1

Shift value for CMU_HFXORDY

Definition at line 1493 of file efm32gg12b_cmu.h .

#define _CMU_IFC_LFRCOEDGE_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_IFC

Definition at line 1575 of file efm32gg12b_cmu.h .

#define _CMU_IFC_LFRCOEDGE_MASK 0x10000000UL

Bit mask for CMU_LFRCOEDGE

Definition at line 1574 of file efm32gg12b_cmu.h .

#define _CMU_IFC_LFRCOEDGE_SHIFT 28

Shift value for CMU_LFRCOEDGE

Definition at line 1573 of file efm32gg12b_cmu.h .

#define _CMU_IFC_LFRCORDY_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_IFC

Definition at line 1500 of file efm32gg12b_cmu.h .

#define _CMU_IFC_LFRCORDY_MASK 0x4UL

Bit mask for CMU_LFRCORDY

Definition at line 1499 of file efm32gg12b_cmu.h .

#define _CMU_IFC_LFRCORDY_SHIFT 2

Shift value for CMU_LFRCORDY

Definition at line 1498 of file efm32gg12b_cmu.h .

#define _CMU_IFC_LFTIMEOUTERR_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_IFC

Definition at line 1550 of file efm32gg12b_cmu.h .

#define _CMU_IFC_LFTIMEOUTERR_MASK 0x4000UL

Bit mask for CMU_LFTIMEOUTERR

Definition at line 1549 of file efm32gg12b_cmu.h .

#define _CMU_IFC_LFTIMEOUTERR_SHIFT 14

Shift value for CMU_LFTIMEOUTERR

Definition at line 1548 of file efm32gg12b_cmu.h .

#define _CMU_IFC_LFXOEDGE_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_IFC

Definition at line 1570 of file efm32gg12b_cmu.h .

#define _CMU_IFC_LFXOEDGE_MASK 0x8000000UL

Bit mask for CMU_LFXOEDGE

Definition at line 1569 of file efm32gg12b_cmu.h .

#define _CMU_IFC_LFXOEDGE_SHIFT 27

Shift value for CMU_LFXOEDGE

Definition at line 1568 of file efm32gg12b_cmu.h .

#define _CMU_IFC_LFXORDY_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_IFC

Definition at line 1505 of file efm32gg12b_cmu.h .

#define _CMU_IFC_LFXORDY_MASK 0x8UL

Bit mask for CMU_LFXORDY

Definition at line 1504 of file efm32gg12b_cmu.h .

#define _CMU_IFC_LFXORDY_SHIFT 3

Shift value for CMU_LFXORDY

Definition at line 1503 of file efm32gg12b_cmu.h .

#define _CMU_IFC_MASK 0xB803EBFFUL

Mask for CMU_IFC

Definition at line 1486 of file efm32gg12b_cmu.h .

#define _CMU_IFC_RESETVALUE 0x00000000UL

Default value for CMU_IFC

Definition at line 1485 of file efm32gg12b_cmu.h .

#define _CMU_IFC_ULFRCOEDGE_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_IFC

Definition at line 1580 of file efm32gg12b_cmu.h .

#define _CMU_IFC_ULFRCOEDGE_MASK 0x20000000UL

Bit mask for CMU_ULFRCOEDGE

Definition at line 1579 of file efm32gg12b_cmu.h .

#define _CMU_IFC_ULFRCOEDGE_SHIFT 29

Shift value for CMU_ULFRCOEDGE

Definition at line 1578 of file efm32gg12b_cmu.h .

#define _CMU_IFC_USHFRCORDY_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_IFC

Definition at line 1525 of file efm32gg12b_cmu.h .

#define _CMU_IFC_USHFRCORDY_MASK 0x80UL

Bit mask for CMU_USHFRCORDY

Definition at line 1524 of file efm32gg12b_cmu.h .

#define _CMU_IFC_USHFRCORDY_SHIFT 7

Shift value for CMU_USHFRCORDY

Definition at line 1523 of file efm32gg12b_cmu.h .

#define _CMU_IFS_AUXHFRCORDY_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_IFS

Definition at line 1406 of file efm32gg12b_cmu.h .

#define _CMU_IFS_AUXHFRCORDY_MASK 0x10UL

Bit mask for CMU_AUXHFRCORDY

Definition at line 1405 of file efm32gg12b_cmu.h .

#define _CMU_IFS_AUXHFRCORDY_SHIFT 4

Shift value for CMU_AUXHFRCORDY

Definition at line 1404 of file efm32gg12b_cmu.h .

#define _CMU_IFS_CALOF_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_IFS

Definition at line 1416 of file efm32gg12b_cmu.h .

#define _CMU_IFS_CALOF_MASK 0x40UL

Bit mask for CMU_CALOF

Definition at line 1415 of file efm32gg12b_cmu.h .

#define _CMU_IFS_CALOF_SHIFT 6

Shift value for CMU_CALOF

Definition at line 1414 of file efm32gg12b_cmu.h .

#define _CMU_IFS_CALRDY_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_IFS

Definition at line 1411 of file efm32gg12b_cmu.h .

#define _CMU_IFS_CALRDY_MASK 0x20UL

Bit mask for CMU_CALRDY

Definition at line 1410 of file efm32gg12b_cmu.h .

#define _CMU_IFS_CALRDY_SHIFT 5

Shift value for CMU_CALRDY

Definition at line 1409 of file efm32gg12b_cmu.h .

#define _CMU_IFS_CMUERR_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_IFS

Definition at line 1481 of file efm32gg12b_cmu.h .

#define _CMU_IFS_CMUERR_MASK 0x80000000UL

Bit mask for CMU_CMUERR

Definition at line 1480 of file efm32gg12b_cmu.h .

#define _CMU_IFS_CMUERR_SHIFT 31

Shift value for CMU_CMUERR

Definition at line 1479 of file efm32gg12b_cmu.h .

#define _CMU_IFS_DPLLLOCKFAILHIGH_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_IFS

Definition at line 1461 of file efm32gg12b_cmu.h .

#define _CMU_IFS_DPLLLOCKFAILHIGH_MASK 0x20000UL

Bit mask for CMU_DPLLLOCKFAILHIGH

Definition at line 1460 of file efm32gg12b_cmu.h .

#define _CMU_IFS_DPLLLOCKFAILHIGH_SHIFT 17

Shift value for CMU_DPLLLOCKFAILHIGH

Definition at line 1459 of file efm32gg12b_cmu.h .

#define _CMU_IFS_DPLLLOCKFAILLOW_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_IFS

Definition at line 1456 of file efm32gg12b_cmu.h .

#define _CMU_IFS_DPLLLOCKFAILLOW_MASK 0x10000UL

Bit mask for CMU_DPLLLOCKFAILLOW

Definition at line 1455 of file efm32gg12b_cmu.h .

#define _CMU_IFS_DPLLLOCKFAILLOW_SHIFT 16

Shift value for CMU_DPLLLOCKFAILLOW

Definition at line 1454 of file efm32gg12b_cmu.h .

#define _CMU_IFS_DPLLRDY_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_IFS

Definition at line 1451 of file efm32gg12b_cmu.h .

#define _CMU_IFS_DPLLRDY_MASK 0x8000UL

Bit mask for CMU_DPLLRDY

Definition at line 1450 of file efm32gg12b_cmu.h .

#define _CMU_IFS_DPLLRDY_SHIFT 15

Shift value for CMU_DPLLRDY

Definition at line 1449 of file efm32gg12b_cmu.h .

#define _CMU_IFS_HFRCODIS_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_IFS

Definition at line 1441 of file efm32gg12b_cmu.h .

#define _CMU_IFS_HFRCODIS_MASK 0x2000UL

Bit mask for CMU_HFRCODIS

Definition at line 1440 of file efm32gg12b_cmu.h .

#define _CMU_IFS_HFRCODIS_SHIFT 13

Shift value for CMU_HFRCODIS

Definition at line 1439 of file efm32gg12b_cmu.h .

#define _CMU_IFS_HFRCORDY_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_IFS

Definition at line 1386 of file efm32gg12b_cmu.h .

#define _CMU_IFS_HFRCORDY_MASK 0x1UL

Bit mask for CMU_HFRCORDY

Definition at line 1385 of file efm32gg12b_cmu.h .

#define _CMU_IFS_HFRCORDY_SHIFT 0

Shift value for CMU_HFRCORDY

Definition at line 1384 of file efm32gg12b_cmu.h .

#define _CMU_IFS_HFXOAUTOSW_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_IFS

Definition at line 1431 of file efm32gg12b_cmu.h .

#define _CMU_IFS_HFXOAUTOSW_MASK 0x200UL

Bit mask for CMU_HFXOAUTOSW

Definition at line 1430 of file efm32gg12b_cmu.h .

#define _CMU_IFS_HFXOAUTOSW_SHIFT 9

Shift value for CMU_HFXOAUTOSW

Definition at line 1429 of file efm32gg12b_cmu.h .

#define _CMU_IFS_HFXODISERR_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_IFS

Definition at line 1426 of file efm32gg12b_cmu.h .

#define _CMU_IFS_HFXODISERR_MASK 0x100UL

Bit mask for CMU_HFXODISERR

Definition at line 1425 of file efm32gg12b_cmu.h .

#define _CMU_IFS_HFXODISERR_SHIFT 8

Shift value for CMU_HFXODISERR

Definition at line 1424 of file efm32gg12b_cmu.h .

#define _CMU_IFS_HFXOPEAKDETRDY_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_IFS

Definition at line 1436 of file efm32gg12b_cmu.h .

#define _CMU_IFS_HFXOPEAKDETRDY_MASK 0x800UL

Bit mask for CMU_HFXOPEAKDETRDY

Definition at line 1435 of file efm32gg12b_cmu.h .

#define _CMU_IFS_HFXOPEAKDETRDY_SHIFT 11

Shift value for CMU_HFXOPEAKDETRDY

Definition at line 1434 of file efm32gg12b_cmu.h .

#define _CMU_IFS_HFXORDY_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_IFS

Definition at line 1391 of file efm32gg12b_cmu.h .

#define _CMU_IFS_HFXORDY_MASK 0x2UL

Bit mask for CMU_HFXORDY

Definition at line 1390 of file efm32gg12b_cmu.h .

#define _CMU_IFS_HFXORDY_SHIFT 1

Shift value for CMU_HFXORDY

Definition at line 1389 of file efm32gg12b_cmu.h .

#define _CMU_IFS_LFRCOEDGE_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_IFS

Definition at line 1471 of file efm32gg12b_cmu.h .

#define _CMU_IFS_LFRCOEDGE_MASK 0x10000000UL

Bit mask for CMU_LFRCOEDGE

Definition at line 1470 of file efm32gg12b_cmu.h .

#define _CMU_IFS_LFRCOEDGE_SHIFT 28

Shift value for CMU_LFRCOEDGE

Definition at line 1469 of file efm32gg12b_cmu.h .

#define _CMU_IFS_LFRCORDY_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_IFS

Definition at line 1396 of file efm32gg12b_cmu.h .

#define _CMU_IFS_LFRCORDY_MASK 0x4UL

Bit mask for CMU_LFRCORDY

Definition at line 1395 of file efm32gg12b_cmu.h .

#define _CMU_IFS_LFRCORDY_SHIFT 2

Shift value for CMU_LFRCORDY

Definition at line 1394 of file efm32gg12b_cmu.h .

#define _CMU_IFS_LFTIMEOUTERR_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_IFS

Definition at line 1446 of file efm32gg12b_cmu.h .

#define _CMU_IFS_LFTIMEOUTERR_MASK 0x4000UL

Bit mask for CMU_LFTIMEOUTERR

Definition at line 1445 of file efm32gg12b_cmu.h .

#define _CMU_IFS_LFTIMEOUTERR_SHIFT 14

Shift value for CMU_LFTIMEOUTERR

Definition at line 1444 of file efm32gg12b_cmu.h .

#define _CMU_IFS_LFXOEDGE_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_IFS

Definition at line 1466 of file efm32gg12b_cmu.h .

#define _CMU_IFS_LFXOEDGE_MASK 0x8000000UL

Bit mask for CMU_LFXOEDGE

Definition at line 1465 of file efm32gg12b_cmu.h .

#define _CMU_IFS_LFXOEDGE_SHIFT 27

Shift value for CMU_LFXOEDGE

Definition at line 1464 of file efm32gg12b_cmu.h .

#define _CMU_IFS_LFXORDY_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_IFS

Definition at line 1401 of file efm32gg12b_cmu.h .

#define _CMU_IFS_LFXORDY_MASK 0x8UL

Bit mask for CMU_LFXORDY

Definition at line 1400 of file efm32gg12b_cmu.h .

#define _CMU_IFS_LFXORDY_SHIFT 3

Shift value for CMU_LFXORDY

Definition at line 1399 of file efm32gg12b_cmu.h .

#define _CMU_IFS_MASK 0xB803EBFFUL

Mask for CMU_IFS

Definition at line 1382 of file efm32gg12b_cmu.h .

#define _CMU_IFS_RESETVALUE 0x00000000UL

Default value for CMU_IFS

Definition at line 1381 of file efm32gg12b_cmu.h .

#define _CMU_IFS_ULFRCOEDGE_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_IFS

Definition at line 1476 of file efm32gg12b_cmu.h .

#define _CMU_IFS_ULFRCOEDGE_MASK 0x20000000UL

Bit mask for CMU_ULFRCOEDGE

Definition at line 1475 of file efm32gg12b_cmu.h .

#define _CMU_IFS_ULFRCOEDGE_SHIFT 29

Shift value for CMU_ULFRCOEDGE

Definition at line 1474 of file efm32gg12b_cmu.h .

#define _CMU_IFS_USHFRCORDY_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_IFS

Definition at line 1421 of file efm32gg12b_cmu.h .

#define _CMU_IFS_USHFRCORDY_MASK 0x80UL

Bit mask for CMU_USHFRCORDY

Definition at line 1420 of file efm32gg12b_cmu.h .

#define _CMU_IFS_USHFRCORDY_SHIFT 7

Shift value for CMU_USHFRCORDY

Definition at line 1419 of file efm32gg12b_cmu.h .

#define _CMU_LFACLKEN0_LCD_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_LFACLKEN0

Definition at line 1915 of file efm32gg12b_cmu.h .

#define _CMU_LFACLKEN0_LCD_MASK 0x8UL

Bit mask for CMU_LCD

Definition at line 1914 of file efm32gg12b_cmu.h .

#define _CMU_LFACLKEN0_LCD_SHIFT 3

Shift value for CMU_LCD

Definition at line 1913 of file efm32gg12b_cmu.h .

#define _CMU_LFACLKEN0_LESENSE_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_LFACLKEN0

Definition at line 1910 of file efm32gg12b_cmu.h .

#define _CMU_LFACLKEN0_LESENSE_MASK 0x4UL

Bit mask for CMU_LESENSE

Definition at line 1909 of file efm32gg12b_cmu.h .

#define _CMU_LFACLKEN0_LESENSE_SHIFT 2

Shift value for CMU_LESENSE

Definition at line 1908 of file efm32gg12b_cmu.h .

#define _CMU_LFACLKEN0_LETIMER0_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_LFACLKEN0

Definition at line 1900 of file efm32gg12b_cmu.h .

#define _CMU_LFACLKEN0_LETIMER0_MASK 0x1UL

Bit mask for CMU_LETIMER0

Definition at line 1899 of file efm32gg12b_cmu.h .

#define _CMU_LFACLKEN0_LETIMER0_SHIFT 0

Shift value for CMU_LETIMER0

Definition at line 1898 of file efm32gg12b_cmu.h .

#define _CMU_LFACLKEN0_LETIMER1_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_LFACLKEN0

Definition at line 1905 of file efm32gg12b_cmu.h .

#define _CMU_LFACLKEN0_LETIMER1_MASK 0x2UL

Bit mask for CMU_LETIMER1

Definition at line 1904 of file efm32gg12b_cmu.h .

#define _CMU_LFACLKEN0_LETIMER1_SHIFT 1

Shift value for CMU_LETIMER1

Definition at line 1903 of file efm32gg12b_cmu.h .

#define _CMU_LFACLKEN0_MASK 0x0000001FUL

Mask for CMU_LFACLKEN0

Definition at line 1896 of file efm32gg12b_cmu.h .

#define _CMU_LFACLKEN0_RESETVALUE 0x00000000UL

Default value for CMU_LFACLKEN0

Definition at line 1895 of file efm32gg12b_cmu.h .

#define _CMU_LFACLKEN0_RTC_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_LFACLKEN0

Definition at line 1920 of file efm32gg12b_cmu.h .

#define _CMU_LFACLKEN0_RTC_MASK 0x10UL

Bit mask for CMU_RTC

Definition at line 1919 of file efm32gg12b_cmu.h .

#define _CMU_LFACLKEN0_RTC_SHIFT 4

Shift value for CMU_RTC

Definition at line 1918 of file efm32gg12b_cmu.h .

#define _CMU_LFACLKSEL_LFA_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_LFACLKSEL

Definition at line 1052 of file efm32gg12b_cmu.h .

#define _CMU_LFACLKSEL_LFA_DISABLED 0x00000000UL

Mode DISABLED for CMU_LFACLKSEL

Definition at line 1053 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockSelectSet() .

#define _CMU_LFACLKSEL_LFA_LFRCO 0x00000001UL

Mode LFRCO for CMU_LFACLKSEL

Definition at line 1054 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockSelectSet() .

#define _CMU_LFACLKSEL_LFA_LFXO 0x00000002UL

Mode LFXO for CMU_LFACLKSEL

Definition at line 1055 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockSelectSet() .

#define _CMU_LFACLKSEL_LFA_MASK 0x7UL

Bit mask for CMU_LFA

Definition at line 1051 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockSelectGet() .

#define _CMU_LFACLKSEL_LFA_SHIFT 0

Shift value for CMU_LFA

Definition at line 1050 of file efm32gg12b_cmu.h .

#define _CMU_LFACLKSEL_LFA_ULFRCO 0x00000004UL

Mode ULFRCO for CMU_LFACLKSEL

Definition at line 1056 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockSelectSet() .

#define _CMU_LFACLKSEL_MASK 0x00000007UL

Mask for CMU_LFACLKSEL

Definition at line 1049 of file efm32gg12b_cmu.h .

#define _CMU_LFACLKSEL_RESETVALUE 0x00000000UL

Default value for CMU_LFACLKSEL

Definition at line 1048 of file efm32gg12b_cmu.h .

#define _CMU_LFAPRESC0_LCD_DIV1 0x00000000UL

Mode DIV1 for CMU_LFAPRESC0

Definition at line 2128 of file efm32gg12b_cmu.h .

#define _CMU_LFAPRESC0_LCD_DIV128 0x00000007UL

Mode DIV128 for CMU_LFAPRESC0

Definition at line 2135 of file efm32gg12b_cmu.h .

#define _CMU_LFAPRESC0_LCD_DIV16 0x00000004UL

Mode DIV16 for CMU_LFAPRESC0

Definition at line 2132 of file efm32gg12b_cmu.h .

#define _CMU_LFAPRESC0_LCD_DIV2 0x00000001UL

Mode DIV2 for CMU_LFAPRESC0

Definition at line 2129 of file efm32gg12b_cmu.h .

#define _CMU_LFAPRESC0_LCD_DIV32 0x00000005UL

Mode DIV32 for CMU_LFAPRESC0

Definition at line 2133 of file efm32gg12b_cmu.h .

#define _CMU_LFAPRESC0_LCD_DIV4 0x00000002UL

Mode DIV4 for CMU_LFAPRESC0

Definition at line 2130 of file efm32gg12b_cmu.h .

#define _CMU_LFAPRESC0_LCD_DIV64 0x00000006UL

Mode DIV64 for CMU_LFAPRESC0

Definition at line 2134 of file efm32gg12b_cmu.h .

#define _CMU_LFAPRESC0_LCD_DIV8 0x00000003UL

Mode DIV8 for CMU_LFAPRESC0

Definition at line 2131 of file efm32gg12b_cmu.h .

#define _CMU_LFAPRESC0_LCD_MASK 0x7000UL

Bit mask for CMU_LCD

Definition at line 2127 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockDivGet() , CMU_ClockDivSet() , CMU_ClockFreqGet() , CMU_ClockPrescGet() , and CMU_ClockPrescSet() .

#define _CMU_LFAPRESC0_LCD_SHIFT 12

Shift value for CMU_LCD

Definition at line 2126 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockDivGet() , CMU_ClockDivSet() , CMU_ClockFreqGet() , CMU_ClockPrescGet() , and CMU_ClockPrescSet() .

#define _CMU_LFAPRESC0_LESENSE_DIV1 0x00000000UL

Mode DIV1 for CMU_LFAPRESC0

Definition at line 2118 of file efm32gg12b_cmu.h .

#define _CMU_LFAPRESC0_LESENSE_DIV2 0x00000001UL

Mode DIV2 for CMU_LFAPRESC0

Definition at line 2119 of file efm32gg12b_cmu.h .

#define _CMU_LFAPRESC0_LESENSE_DIV4 0x00000002UL

Mode DIV4 for CMU_LFAPRESC0

Definition at line 2120 of file efm32gg12b_cmu.h .

#define _CMU_LFAPRESC0_LESENSE_DIV8 0x00000003UL

Mode DIV8 for CMU_LFAPRESC0

Definition at line 2121 of file efm32gg12b_cmu.h .

#define _CMU_LFAPRESC0_LESENSE_MASK 0x300UL

Bit mask for CMU_LESENSE

Definition at line 2117 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockDivGet() , CMU_ClockDivSet() , CMU_ClockFreqGet() , CMU_ClockPrescGet() , and CMU_ClockPrescSet() .

#define _CMU_LFAPRESC0_LESENSE_SHIFT 8

Shift value for CMU_LESENSE

Definition at line 2116 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockDivGet() , CMU_ClockDivSet() , CMU_ClockFreqGet() , CMU_ClockPrescGet() , and CMU_ClockPrescSet() .

#define _CMU_LFAPRESC0_LETIMER0_DIV1 0x00000000UL

Mode DIV1 for CMU_LFAPRESC0

Definition at line 2050 of file efm32gg12b_cmu.h .

#define _CMU_LFAPRESC0_LETIMER0_DIV1024 0x0000000AUL

Mode DIV1024 for CMU_LFAPRESC0

Definition at line 2060 of file efm32gg12b_cmu.h .

#define _CMU_LFAPRESC0_LETIMER0_DIV128 0x00000007UL

Mode DIV128 for CMU_LFAPRESC0

Definition at line 2057 of file efm32gg12b_cmu.h .

#define _CMU_LFAPRESC0_LETIMER0_DIV16 0x00000004UL

Mode DIV16 for CMU_LFAPRESC0

Definition at line 2054 of file efm32gg12b_cmu.h .

#define _CMU_LFAPRESC0_LETIMER0_DIV16384 0x0000000EUL

Mode DIV16384 for CMU_LFAPRESC0

Definition at line 2064 of file efm32gg12b_cmu.h .

#define _CMU_LFAPRESC0_LETIMER0_DIV2 0x00000001UL

Mode DIV2 for CMU_LFAPRESC0

Definition at line 2051 of file efm32gg12b_cmu.h .

#define _CMU_LFAPRESC0_LETIMER0_DIV2048 0x0000000BUL

Mode DIV2048 for CMU_LFAPRESC0

Definition at line 2061 of file efm32gg12b_cmu.h .

#define _CMU_LFAPRESC0_LETIMER0_DIV256 0x00000008UL

Mode DIV256 for CMU_LFAPRESC0

Definition at line 2058 of file efm32gg12b_cmu.h .

#define _CMU_LFAPRESC0_LETIMER0_DIV32 0x00000005UL

Mode DIV32 for CMU_LFAPRESC0

Definition at line 2055 of file efm32gg12b_cmu.h .

#define _CMU_LFAPRESC0_LETIMER0_DIV32768 0x0000000FUL

Mode DIV32768 for CMU_LFAPRESC0

Definition at line 2065 of file efm32gg12b_cmu.h .

#define _CMU_LFAPRESC0_LETIMER0_DIV4 0x00000002UL

Mode DIV4 for CMU_LFAPRESC0

Definition at line 2052 of file efm32gg12b_cmu.h .

#define _CMU_LFAPRESC0_LETIMER0_DIV4096 0x0000000CUL

Mode DIV4096 for CMU_LFAPRESC0

Definition at line 2062 of file efm32gg12b_cmu.h .

#define _CMU_LFAPRESC0_LETIMER0_DIV512 0x00000009UL

Mode DIV512 for CMU_LFAPRESC0

Definition at line 2059 of file efm32gg12b_cmu.h .

#define _CMU_LFAPRESC0_LETIMER0_DIV64 0x00000006UL

Mode DIV64 for CMU_LFAPRESC0

Definition at line 2056 of file efm32gg12b_cmu.h .

#define _CMU_LFAPRESC0_LETIMER0_DIV8 0x00000003UL

Mode DIV8 for CMU_LFAPRESC0

Definition at line 2053 of file efm32gg12b_cmu.h .

#define _CMU_LFAPRESC0_LETIMER0_DIV8192 0x0000000DUL

Mode DIV8192 for CMU_LFAPRESC0

Definition at line 2063 of file efm32gg12b_cmu.h .

#define _CMU_LFAPRESC0_LETIMER0_MASK 0xFUL

Bit mask for CMU_LETIMER0

Definition at line 2049 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockDivGet() , CMU_ClockDivSet() , CMU_ClockFreqGet() , CMU_ClockPrescGet() , and CMU_ClockPrescSet() .

#define _CMU_LFAPRESC0_LETIMER0_SHIFT 0

Shift value for CMU_LETIMER0

Definition at line 2048 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockDivGet() , CMU_ClockDivSet() , CMU_ClockFreqGet() , CMU_ClockPrescGet() , and CMU_ClockPrescSet() .

#define _CMU_LFAPRESC0_LETIMER1_DIV1 0x00000000UL

Mode DIV1 for CMU_LFAPRESC0

Definition at line 2084 of file efm32gg12b_cmu.h .

#define _CMU_LFAPRESC0_LETIMER1_DIV1024 0x0000000AUL

Mode DIV1024 for CMU_LFAPRESC0

Definition at line 2094 of file efm32gg12b_cmu.h .

#define _CMU_LFAPRESC0_LETIMER1_DIV128 0x00000007UL

Mode DIV128 for CMU_LFAPRESC0

Definition at line 2091 of file efm32gg12b_cmu.h .

#define _CMU_LFAPRESC0_LETIMER1_DIV16 0x00000004UL

Mode DIV16 for CMU_LFAPRESC0

Definition at line 2088 of file efm32gg12b_cmu.h .

#define _CMU_LFAPRESC0_LETIMER1_DIV16384 0x0000000EUL

Mode DIV16384 for CMU_LFAPRESC0

Definition at line 2098 of file efm32gg12b_cmu.h .

#define _CMU_LFAPRESC0_LETIMER1_DIV2 0x00000001UL

Mode DIV2 for CMU_LFAPRESC0

Definition at line 2085 of file efm32gg12b_cmu.h .

#define _CMU_LFAPRESC0_LETIMER1_DIV2048 0x0000000BUL

Mode DIV2048 for CMU_LFAPRESC0

Definition at line 2095 of file efm32gg12b_cmu.h .

#define _CMU_LFAPRESC0_LETIMER1_DIV256 0x00000008UL

Mode DIV256 for CMU_LFAPRESC0

Definition at line 2092 of file efm32gg12b_cmu.h .

#define _CMU_LFAPRESC0_LETIMER1_DIV32 0x00000005UL

Mode DIV32 for CMU_LFAPRESC0

Definition at line 2089 of file efm32gg12b_cmu.h .

#define _CMU_LFAPRESC0_LETIMER1_DIV32768 0x0000000FUL

Mode DIV32768 for CMU_LFAPRESC0

Definition at line 2099 of file efm32gg12b_cmu.h .

#define _CMU_LFAPRESC0_LETIMER1_DIV4 0x00000002UL

Mode DIV4 for CMU_LFAPRESC0

Definition at line 2086 of file efm32gg12b_cmu.h .

#define _CMU_LFAPRESC0_LETIMER1_DIV4096 0x0000000CUL

Mode DIV4096 for CMU_LFAPRESC0

Definition at line 2096 of file efm32gg12b_cmu.h .

#define _CMU_LFAPRESC0_LETIMER1_DIV512 0x00000009UL

Mode DIV512 for CMU_LFAPRESC0

Definition at line 2093 of file efm32gg12b_cmu.h .

#define _CMU_LFAPRESC0_LETIMER1_DIV64 0x00000006UL

Mode DIV64 for CMU_LFAPRESC0

Definition at line 2090 of file efm32gg12b_cmu.h .

#define _CMU_LFAPRESC0_LETIMER1_DIV8 0x00000003UL

Mode DIV8 for CMU_LFAPRESC0

Definition at line 2087 of file efm32gg12b_cmu.h .

#define _CMU_LFAPRESC0_LETIMER1_DIV8192 0x0000000DUL

Mode DIV8192 for CMU_LFAPRESC0

Definition at line 2097 of file efm32gg12b_cmu.h .

#define _CMU_LFAPRESC0_LETIMER1_MASK 0xF0UL

Bit mask for CMU_LETIMER1

Definition at line 2083 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockFreqGet() , CMU_ClockPrescGet() , and CMU_ClockPrescSet() .

#define _CMU_LFAPRESC0_LETIMER1_SHIFT 4

Shift value for CMU_LETIMER1

Definition at line 2082 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockFreqGet() , CMU_ClockPrescGet() , and CMU_ClockPrescSet() .

#define _CMU_LFAPRESC0_MASK 0x000F73FFUL

Mask for CMU_LFAPRESC0

Definition at line 2047 of file efm32gg12b_cmu.h .

#define _CMU_LFAPRESC0_RESETVALUE 0x00000000UL

Default value for CMU_LFAPRESC0

Definition at line 2046 of file efm32gg12b_cmu.h .

#define _CMU_LFAPRESC0_RTC_DIV1 0x00000000UL

Mode DIV1 for CMU_LFAPRESC0

Definition at line 2146 of file efm32gg12b_cmu.h .

#define _CMU_LFAPRESC0_RTC_DIV1024 0x0000000AUL

Mode DIV1024 for CMU_LFAPRESC0

Definition at line 2156 of file efm32gg12b_cmu.h .

#define _CMU_LFAPRESC0_RTC_DIV128 0x00000007UL

Mode DIV128 for CMU_LFAPRESC0

Definition at line 2153 of file efm32gg12b_cmu.h .

#define _CMU_LFAPRESC0_RTC_DIV16 0x00000004UL

Mode DIV16 for CMU_LFAPRESC0

Definition at line 2150 of file efm32gg12b_cmu.h .

#define _CMU_LFAPRESC0_RTC_DIV16384 0x0000000EUL

Mode DIV16384 for CMU_LFAPRESC0

Definition at line 2160 of file efm32gg12b_cmu.h .

#define _CMU_LFAPRESC0_RTC_DIV2 0x00000001UL

Mode DIV2 for CMU_LFAPRESC0

Definition at line 2147 of file efm32gg12b_cmu.h .

#define _CMU_LFAPRESC0_RTC_DIV2048 0x0000000BUL

Mode DIV2048 for CMU_LFAPRESC0

Definition at line 2157 of file efm32gg12b_cmu.h .

#define _CMU_LFAPRESC0_RTC_DIV256 0x00000008UL

Mode DIV256 for CMU_LFAPRESC0

Definition at line 2154 of file efm32gg12b_cmu.h .

#define _CMU_LFAPRESC0_RTC_DIV32 0x00000005UL

Mode DIV32 for CMU_LFAPRESC0

Definition at line 2151 of file efm32gg12b_cmu.h .

#define _CMU_LFAPRESC0_RTC_DIV32768 0x0000000FUL

Mode DIV32768 for CMU_LFAPRESC0

Definition at line 2161 of file efm32gg12b_cmu.h .

#define _CMU_LFAPRESC0_RTC_DIV4 0x00000002UL

Mode DIV4 for CMU_LFAPRESC0

Definition at line 2148 of file efm32gg12b_cmu.h .

#define _CMU_LFAPRESC0_RTC_DIV4096 0x0000000CUL

Mode DIV4096 for CMU_LFAPRESC0

Definition at line 2158 of file efm32gg12b_cmu.h .

#define _CMU_LFAPRESC0_RTC_DIV512 0x00000009UL

Mode DIV512 for CMU_LFAPRESC0

Definition at line 2155 of file efm32gg12b_cmu.h .

#define _CMU_LFAPRESC0_RTC_DIV64 0x00000006UL

Mode DIV64 for CMU_LFAPRESC0

Definition at line 2152 of file efm32gg12b_cmu.h .

#define _CMU_LFAPRESC0_RTC_DIV8 0x00000003UL

Mode DIV8 for CMU_LFAPRESC0

Definition at line 2149 of file efm32gg12b_cmu.h .

#define _CMU_LFAPRESC0_RTC_DIV8192 0x0000000DUL

Mode DIV8192 for CMU_LFAPRESC0

Definition at line 2159 of file efm32gg12b_cmu.h .

#define _CMU_LFAPRESC0_RTC_MASK 0xF0000UL

Bit mask for CMU_RTC

Definition at line 2145 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockDivGet() , CMU_ClockDivSet() , CMU_ClockFreqGet() , CMU_ClockPrescGet() , and CMU_ClockPrescSet() .

#define _CMU_LFAPRESC0_RTC_SHIFT 16

Shift value for CMU_RTC

Definition at line 2144 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockDivGet() , CMU_ClockDivSet() , CMU_ClockFreqGet() , CMU_ClockPrescGet() , and CMU_ClockPrescSet() .

#define _CMU_LFBCLKEN0_CSEN_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_LFBCLKEN0

Definition at line 1944 of file efm32gg12b_cmu.h .

#define _CMU_LFBCLKEN0_CSEN_MASK 0x8UL

Bit mask for CMU_CSEN

Definition at line 1943 of file efm32gg12b_cmu.h .

#define _CMU_LFBCLKEN0_CSEN_SHIFT 3

Shift value for CMU_CSEN

Definition at line 1942 of file efm32gg12b_cmu.h .

#define _CMU_LFBCLKEN0_LEUART0_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_LFBCLKEN0

Definition at line 1929 of file efm32gg12b_cmu.h .

#define _CMU_LFBCLKEN0_LEUART0_MASK 0x1UL

Bit mask for CMU_LEUART0

Definition at line 1928 of file efm32gg12b_cmu.h .

#define _CMU_LFBCLKEN0_LEUART0_SHIFT 0

Shift value for CMU_LEUART0

Definition at line 1927 of file efm32gg12b_cmu.h .

#define _CMU_LFBCLKEN0_LEUART1_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_LFBCLKEN0

Definition at line 1934 of file efm32gg12b_cmu.h .

#define _CMU_LFBCLKEN0_LEUART1_MASK 0x2UL

Bit mask for CMU_LEUART1

Definition at line 1933 of file efm32gg12b_cmu.h .

#define _CMU_LFBCLKEN0_LEUART1_SHIFT 1

Shift value for CMU_LEUART1

Definition at line 1932 of file efm32gg12b_cmu.h .

#define _CMU_LFBCLKEN0_MASK 0x0000000FUL

Mask for CMU_LFBCLKEN0

Definition at line 1925 of file efm32gg12b_cmu.h .

#define _CMU_LFBCLKEN0_RESETVALUE 0x00000000UL

Default value for CMU_LFBCLKEN0

Definition at line 1924 of file efm32gg12b_cmu.h .

#define _CMU_LFBCLKEN0_SYSTICK_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_LFBCLKEN0

Definition at line 1939 of file efm32gg12b_cmu.h .

#define _CMU_LFBCLKEN0_SYSTICK_MASK 0x4UL

Bit mask for CMU_SYSTICK

Definition at line 1938 of file efm32gg12b_cmu.h .

#define _CMU_LFBCLKEN0_SYSTICK_SHIFT 2

Shift value for CMU_SYSTICK

Definition at line 1937 of file efm32gg12b_cmu.h .

#define _CMU_LFBCLKSEL_LFB_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_LFBCLKSEL

Definition at line 1068 of file efm32gg12b_cmu.h .

#define _CMU_LFBCLKSEL_LFB_DISABLED 0x00000000UL

Mode DISABLED for CMU_LFBCLKSEL

Definition at line 1069 of file efm32gg12b_cmu.h .

#define _CMU_LFBCLKSEL_LFB_HFCLKLE 0x00000003UL

Mode HFCLKLE for CMU_LFBCLKSEL

Definition at line 1072 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockSelectSet() .

#define _CMU_LFBCLKSEL_LFB_LFRCO 0x00000001UL

Mode LFRCO for CMU_LFBCLKSEL

Definition at line 1070 of file efm32gg12b_cmu.h .

#define _CMU_LFBCLKSEL_LFB_LFXO 0x00000002UL

Mode LFXO for CMU_LFBCLKSEL

Definition at line 1071 of file efm32gg12b_cmu.h .

#define _CMU_LFBCLKSEL_LFB_MASK 0x7UL

Bit mask for CMU_LFB

Definition at line 1067 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockSelectGet() .

#define _CMU_LFBCLKSEL_LFB_SHIFT 0

Shift value for CMU_LFB

Definition at line 1066 of file efm32gg12b_cmu.h .

#define _CMU_LFBCLKSEL_LFB_ULFRCO 0x00000004UL

Mode ULFRCO for CMU_LFBCLKSEL

Definition at line 1073 of file efm32gg12b_cmu.h .

#define _CMU_LFBCLKSEL_MASK 0x00000007UL

Mask for CMU_LFBCLKSEL

Definition at line 1065 of file efm32gg12b_cmu.h .

#define _CMU_LFBCLKSEL_RESETVALUE 0x00000000UL

Default value for CMU_LFBCLKSEL

Definition at line 1064 of file efm32gg12b_cmu.h .

#define _CMU_LFBPRESC0_CSEN_DIV128 0x00000003UL

Mode DIV128 for CMU_LFBPRESC0

Definition at line 2211 of file efm32gg12b_cmu.h .

#define _CMU_LFBPRESC0_CSEN_DIV16 0x00000000UL

Mode DIV16 for CMU_LFBPRESC0

Definition at line 2208 of file efm32gg12b_cmu.h .

#define _CMU_LFBPRESC0_CSEN_DIV32 0x00000001UL

Mode DIV32 for CMU_LFBPRESC0

Definition at line 2209 of file efm32gg12b_cmu.h .

#define _CMU_LFBPRESC0_CSEN_DIV64 0x00000002UL

Mode DIV64 for CMU_LFBPRESC0

Definition at line 2210 of file efm32gg12b_cmu.h .

#define _CMU_LFBPRESC0_CSEN_MASK 0x3000UL

Bit mask for CMU_CSEN

Definition at line 2207 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockFreqGet() , CMU_ClockPrescGet() , and CMU_ClockPrescSet() .

#define _CMU_LFBPRESC0_CSEN_SHIFT 12

Shift value for CMU_CSEN

Definition at line 2206 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockFreqGet() , CMU_ClockPrescGet() , and CMU_ClockPrescSet() .

#define _CMU_LFBPRESC0_LEUART0_DIV1 0x00000000UL

Mode DIV1 for CMU_LFBPRESC0

Definition at line 2184 of file efm32gg12b_cmu.h .

#define _CMU_LFBPRESC0_LEUART0_DIV2 0x00000001UL

Mode DIV2 for CMU_LFBPRESC0

Definition at line 2185 of file efm32gg12b_cmu.h .

#define _CMU_LFBPRESC0_LEUART0_DIV4 0x00000002UL

Mode DIV4 for CMU_LFBPRESC0

Definition at line 2186 of file efm32gg12b_cmu.h .

#define _CMU_LFBPRESC0_LEUART0_DIV8 0x00000003UL

Mode DIV8 for CMU_LFBPRESC0

Definition at line 2187 of file efm32gg12b_cmu.h .

#define _CMU_LFBPRESC0_LEUART0_MASK 0x3UL

Bit mask for CMU_LEUART0

Definition at line 2183 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockDivGet() , CMU_ClockDivSet() , CMU_ClockFreqGet() , CMU_ClockPrescGet() , CMU_ClockPrescSet() , and UARTDRV_InitLeuart() .

#define _CMU_LFBPRESC0_LEUART0_SHIFT 0

Shift value for CMU_LEUART0

Definition at line 2182 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockDivGet() , CMU_ClockDivSet() , CMU_ClockFreqGet() , CMU_ClockPrescGet() , CMU_ClockPrescSet() , and UARTDRV_InitLeuart() .

#define _CMU_LFBPRESC0_LEUART1_DIV1 0x00000000UL

Mode DIV1 for CMU_LFBPRESC0

Definition at line 2194 of file efm32gg12b_cmu.h .

#define _CMU_LFBPRESC0_LEUART1_DIV2 0x00000001UL

Mode DIV2 for CMU_LFBPRESC0

Definition at line 2195 of file efm32gg12b_cmu.h .

#define _CMU_LFBPRESC0_LEUART1_DIV4 0x00000002UL

Mode DIV4 for CMU_LFBPRESC0

Definition at line 2196 of file efm32gg12b_cmu.h .

#define _CMU_LFBPRESC0_LEUART1_DIV8 0x00000003UL

Mode DIV8 for CMU_LFBPRESC0

Definition at line 2197 of file efm32gg12b_cmu.h .

#define _CMU_LFBPRESC0_LEUART1_MASK 0x30UL

Bit mask for CMU_LEUART1

Definition at line 2193 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockDivGet() , CMU_ClockDivSet() , CMU_ClockFreqGet() , CMU_ClockPrescGet() , and CMU_ClockPrescSet() .

#define _CMU_LFBPRESC0_LEUART1_SHIFT 4

Shift value for CMU_LEUART1

Definition at line 2192 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockDivGet() , CMU_ClockDivSet() , CMU_ClockFreqGet() , CMU_ClockPrescGet() , and CMU_ClockPrescSet() .

#define _CMU_LFBPRESC0_MASK 0x00003F33UL

Mask for CMU_LFBPRESC0

Definition at line 2181 of file efm32gg12b_cmu.h .

#define _CMU_LFBPRESC0_RESETVALUE 0x00000000UL

Default value for CMU_LFBPRESC0

Definition at line 2180 of file efm32gg12b_cmu.h .

#define _CMU_LFBPRESC0_SYSTICK_DIV1 0x00000000UL

Mode DIV1 for CMU_LFBPRESC0

Definition at line 2204 of file efm32gg12b_cmu.h .

#define _CMU_LFBPRESC0_SYSTICK_MASK 0xF00UL

Bit mask for CMU_SYSTICK

Definition at line 2203 of file efm32gg12b_cmu.h .

#define _CMU_LFBPRESC0_SYSTICK_SHIFT 8

Shift value for CMU_SYSTICK

Definition at line 2202 of file efm32gg12b_cmu.h .

#define _CMU_LFCCLKEN0_MASK 0x00000001UL

Mask for CMU_LFCCLKEN0

Definition at line 1949 of file efm32gg12b_cmu.h .

#define _CMU_LFCCLKEN0_RESETVALUE 0x00000000UL

Default value for CMU_LFCCLKEN0

Definition at line 1948 of file efm32gg12b_cmu.h .

#define _CMU_LFCCLKEN0_USB_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_LFCCLKEN0

Definition at line 1953 of file efm32gg12b_cmu.h .

#define _CMU_LFCCLKEN0_USB_MASK 0x1UL

Bit mask for CMU_USB

Definition at line 1952 of file efm32gg12b_cmu.h .

#define _CMU_LFCCLKEN0_USB_SHIFT 0

Shift value for CMU_USB

Definition at line 1951 of file efm32gg12b_cmu.h .

#define _CMU_LFCCLKSEL_LFC_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_LFCCLKSEL

Definition at line 1102 of file efm32gg12b_cmu.h .

#define _CMU_LFCCLKSEL_LFC_DISABLED 0x00000000UL

Mode DISABLED for CMU_LFCCLKSEL

Definition at line 1103 of file efm32gg12b_cmu.h .

#define _CMU_LFCCLKSEL_LFC_LFRCO 0x00000001UL

Mode LFRCO for CMU_LFCCLKSEL

Definition at line 1104 of file efm32gg12b_cmu.h .

#define _CMU_LFCCLKSEL_LFC_LFXO 0x00000002UL

Mode LFXO for CMU_LFCCLKSEL

Definition at line 1105 of file efm32gg12b_cmu.h .

#define _CMU_LFCCLKSEL_LFC_MASK 0x7UL

Bit mask for CMU_LFC

Definition at line 1101 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockSelectGet() .

#define _CMU_LFCCLKSEL_LFC_SHIFT 0

Shift value for CMU_LFC

Definition at line 1100 of file efm32gg12b_cmu.h .

#define _CMU_LFCCLKSEL_LFC_ULFRCO 0x00000004UL

Mode ULFRCO for CMU_LFCCLKSEL

Definition at line 1106 of file efm32gg12b_cmu.h .

#define _CMU_LFCCLKSEL_MASK 0x00000007UL

Mask for CMU_LFCCLKSEL

Definition at line 1099 of file efm32gg12b_cmu.h .

#define _CMU_LFCCLKSEL_RESETVALUE 0x00000000UL

Default value for CMU_LFCCLKSEL

Definition at line 1098 of file efm32gg12b_cmu.h .

#define _CMU_LFECLKEN0_MASK 0x00000001UL

Mask for CMU_LFECLKEN0

Definition at line 1958 of file efm32gg12b_cmu.h .

#define _CMU_LFECLKEN0_RESETVALUE 0x00000000UL

Default value for CMU_LFECLKEN0

Definition at line 1957 of file efm32gg12b_cmu.h .

#define _CMU_LFECLKEN0_RTCC_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_LFECLKEN0

Definition at line 1962 of file efm32gg12b_cmu.h .

#define _CMU_LFECLKEN0_RTCC_MASK 0x1UL

Bit mask for CMU_RTCC

Definition at line 1961 of file efm32gg12b_cmu.h .

#define _CMU_LFECLKEN0_RTCC_SHIFT 0

Shift value for CMU_RTCC

Definition at line 1960 of file efm32gg12b_cmu.h .

#define _CMU_LFECLKSEL_LFE_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_LFECLKSEL

Definition at line 1086 of file efm32gg12b_cmu.h .

#define _CMU_LFECLKSEL_LFE_DISABLED 0x00000000UL

Mode DISABLED for CMU_LFECLKSEL

Definition at line 1087 of file efm32gg12b_cmu.h .

#define _CMU_LFECLKSEL_LFE_LFRCO 0x00000001UL

Mode LFRCO for CMU_LFECLKSEL

Definition at line 1088 of file efm32gg12b_cmu.h .

#define _CMU_LFECLKSEL_LFE_LFXO 0x00000002UL

Mode LFXO for CMU_LFECLKSEL

Definition at line 1089 of file efm32gg12b_cmu.h .

#define _CMU_LFECLKSEL_LFE_MASK 0x7UL

Bit mask for CMU_LFE

Definition at line 1085 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockSelectGet() .

#define _CMU_LFECLKSEL_LFE_SHIFT 0

Shift value for CMU_LFE

Definition at line 1084 of file efm32gg12b_cmu.h .

#define _CMU_LFECLKSEL_LFE_ULFRCO 0x00000004UL

Mode ULFRCO for CMU_LFECLKSEL

Definition at line 1090 of file efm32gg12b_cmu.h .

#define _CMU_LFECLKSEL_MASK 0x00000007UL

Mask for CMU_LFECLKSEL

Definition at line 1083 of file efm32gg12b_cmu.h .

#define _CMU_LFECLKSEL_RESETVALUE 0x00000000UL

Default value for CMU_LFECLKSEL

Definition at line 1082 of file efm32gg12b_cmu.h .

#define _CMU_LFEPRESC0_MASK 0x00000003UL

Mask for CMU_LFEPRESC0

Definition at line 2219 of file efm32gg12b_cmu.h .

#define _CMU_LFEPRESC0_RESETVALUE 0x00000000UL

Default value for CMU_LFEPRESC0

Definition at line 2218 of file efm32gg12b_cmu.h .

#define _CMU_LFEPRESC0_RTCC_DIV1 0x00000000UL

Mode DIV1 for CMU_LFEPRESC0

Definition at line 2222 of file efm32gg12b_cmu.h .

#define _CMU_LFEPRESC0_RTCC_DIV2 0x00000001UL

Mode DIV2 for CMU_LFEPRESC0

Definition at line 2223 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockPrescSet() .

#define _CMU_LFEPRESC0_RTCC_DIV4 0x00000002UL

Mode DIV4 for CMU_LFEPRESC0

Definition at line 2224 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockPrescSet() .

#define _CMU_LFEPRESC0_RTCC_MASK 0x3UL

Bit mask for CMU_RTCC

Definition at line 2221 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockFreqGet() , CMU_ClockPrescGet() , and CMU_ClockPrescSet() .

#define _CMU_LFEPRESC0_RTCC_SHIFT 0

Shift value for CMU_RTCC

Definition at line 2220 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockFreqGet() , CMU_ClockPrescGet() , and CMU_ClockPrescSet() .

#define _CMU_LFRCOCTRL_ENCHOP_DEFAULT 0x00000001UL

Mode DEFAULT for CMU_LFRCOCTRL

Definition at line 413 of file efm32gg12b_cmu.h .

#define _CMU_LFRCOCTRL_ENCHOP_MASK 0x20000UL

Bit mask for CMU_ENCHOP

Definition at line 412 of file efm32gg12b_cmu.h .

#define _CMU_LFRCOCTRL_ENCHOP_SHIFT 17

Shift value for CMU_ENCHOP

Definition at line 411 of file efm32gg12b_cmu.h .

#define _CMU_LFRCOCTRL_ENDEM_DEFAULT 0x00000001UL

Mode DEFAULT for CMU_LFRCOCTRL

Definition at line 418 of file efm32gg12b_cmu.h .

#define _CMU_LFRCOCTRL_ENDEM_MASK 0x40000UL

Bit mask for CMU_ENDEM

Definition at line 417 of file efm32gg12b_cmu.h .

#define _CMU_LFRCOCTRL_ENDEM_SHIFT 18

Shift value for CMU_ENDEM

Definition at line 416 of file efm32gg12b_cmu.h .

#define _CMU_LFRCOCTRL_ENVREF_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_LFRCOCTRL

Definition at line 408 of file efm32gg12b_cmu.h .

#define _CMU_LFRCOCTRL_ENVREF_MASK 0x10000UL

Bit mask for CMU_ENVREF

Definition at line 407 of file efm32gg12b_cmu.h .

#define _CMU_LFRCOCTRL_ENVREF_SHIFT 16

Shift value for CMU_ENVREF

Definition at line 406 of file efm32gg12b_cmu.h .

#define _CMU_LFRCOCTRL_GMCCURTUNE_DEFAULT 0x00000008UL

Mode DEFAULT for CMU_LFRCOCTRL

Definition at line 444 of file efm32gg12b_cmu.h .

#define _CMU_LFRCOCTRL_GMCCURTUNE_MASK 0xF0000000UL

Bit mask for CMU_GMCCURTUNE

Definition at line 443 of file efm32gg12b_cmu.h .

#define _CMU_LFRCOCTRL_GMCCURTUNE_SHIFT 28

Shift value for CMU_GMCCURTUNE

Definition at line 442 of file efm32gg12b_cmu.h .

#define _CMU_LFRCOCTRL_MASK 0xF33701FFUL

Mask for CMU_LFRCOCTRL

Definition at line 400 of file efm32gg12b_cmu.h .

#define _CMU_LFRCOCTRL_RESETVALUE 0x81160100UL

Default value for CMU_LFRCOCTRL

Definition at line 399 of file efm32gg12b_cmu.h .

#define _CMU_LFRCOCTRL_TIMEOUT_16CYCLES 0x00000001UL

Mode 16CYCLES for CMU_LFRCOCTRL

Definition at line 436 of file efm32gg12b_cmu.h .

#define _CMU_LFRCOCTRL_TIMEOUT_2CYCLES 0x00000000UL

Mode 2CYCLES for CMU_LFRCOCTRL

Definition at line 434 of file efm32gg12b_cmu.h .

#define _CMU_LFRCOCTRL_TIMEOUT_32CYCLES 0x00000002UL

Mode 32CYCLES for CMU_LFRCOCTRL

Definition at line 437 of file efm32gg12b_cmu.h .

#define _CMU_LFRCOCTRL_TIMEOUT_DEFAULT 0x00000001UL

Mode DEFAULT for CMU_LFRCOCTRL

Definition at line 435 of file efm32gg12b_cmu.h .

#define _CMU_LFRCOCTRL_TIMEOUT_MASK 0x3000000UL

Bit mask for CMU_TIMEOUT

Definition at line 433 of file efm32gg12b_cmu.h .

#define _CMU_LFRCOCTRL_TIMEOUT_SHIFT 24

Shift value for CMU_TIMEOUT

Definition at line 432 of file efm32gg12b_cmu.h .

#define _CMU_LFRCOCTRL_TUNING_DEFAULT 0x00000100UL

Mode DEFAULT for CMU_LFRCOCTRL

Definition at line 403 of file efm32gg12b_cmu.h .

#define _CMU_LFRCOCTRL_TUNING_MASK 0x1FFUL

Bit mask for CMU_TUNING

Definition at line 402 of file efm32gg12b_cmu.h .

Referenced by CMU_OscillatorTuningGet() , and CMU_OscillatorTuningSet() .

#define _CMU_LFRCOCTRL_TUNING_SHIFT 0

Shift value for CMU_TUNING

Definition at line 401 of file efm32gg12b_cmu.h .

Referenced by CMU_OscillatorTuningGet() , and CMU_OscillatorTuningSet() .

#define _CMU_LFRCOCTRL_VREFUPDATE_128CYCLES 0x00000002UL

Mode 128CYCLES for CMU_LFRCOCTRL

Definition at line 425 of file efm32gg12b_cmu.h .

#define _CMU_LFRCOCTRL_VREFUPDATE_256CYCLES 0x00000003UL

Mode 256CYCLES for CMU_LFRCOCTRL

Definition at line 426 of file efm32gg12b_cmu.h .

#define _CMU_LFRCOCTRL_VREFUPDATE_32CYCLES 0x00000000UL

Mode 32CYCLES for CMU_LFRCOCTRL

Definition at line 422 of file efm32gg12b_cmu.h .

#define _CMU_LFRCOCTRL_VREFUPDATE_64CYCLES 0x00000001UL

Mode 64CYCLES for CMU_LFRCOCTRL

Definition at line 424 of file efm32gg12b_cmu.h .

#define _CMU_LFRCOCTRL_VREFUPDATE_DEFAULT 0x00000001UL

Mode DEFAULT for CMU_LFRCOCTRL

Definition at line 423 of file efm32gg12b_cmu.h .

#define _CMU_LFRCOCTRL_VREFUPDATE_MASK 0x300000UL

Bit mask for CMU_VREFUPDATE

Definition at line 421 of file efm32gg12b_cmu.h .

Referenced by CHIP_Init() .

#define _CMU_LFRCOCTRL_VREFUPDATE_SHIFT 20

Shift value for CMU_VREFUPDATE

Definition at line 420 of file efm32gg12b_cmu.h .

#define _CMU_LFXOCTRL_AGC_DEFAULT 0x00000001UL

Mode DEFAULT for CMU_LFXOCTRL

Definition at line 703 of file efm32gg12b_cmu.h .

#define _CMU_LFXOCTRL_AGC_MASK 0x8000UL

Bit mask for CMU_AGC

Definition at line 702 of file efm32gg12b_cmu.h .

#define _CMU_LFXOCTRL_AGC_SHIFT 15

Shift value for CMU_AGC

Definition at line 701 of file efm32gg12b_cmu.h .

#define _CMU_LFXOCTRL_BUFCUR_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_LFXOCTRL

Definition at line 712 of file efm32gg12b_cmu.h .

#define _CMU_LFXOCTRL_BUFCUR_MASK 0x100000UL

Bit mask for CMU_BUFCUR

Definition at line 711 of file efm32gg12b_cmu.h .

#define _CMU_LFXOCTRL_BUFCUR_SHIFT 20

Shift value for CMU_BUFCUR

Definition at line 710 of file efm32gg12b_cmu.h .

#define _CMU_LFXOCTRL_CUR_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_LFXOCTRL

Definition at line 707 of file efm32gg12b_cmu.h .

#define _CMU_LFXOCTRL_CUR_MASK 0x30000UL

Bit mask for CMU_CUR

Definition at line 706 of file efm32gg12b_cmu.h .

#define _CMU_LFXOCTRL_CUR_SHIFT 16

Shift value for CMU_CUR

Definition at line 705 of file efm32gg12b_cmu.h .

#define _CMU_LFXOCTRL_GAIN_DEFAULT 0x00000002UL

Mode DEFAULT for CMU_LFXOCTRL

Definition at line 693 of file efm32gg12b_cmu.h .

#define _CMU_LFXOCTRL_GAIN_MASK 0x1800UL

Bit mask for CMU_GAIN

Definition at line 692 of file efm32gg12b_cmu.h .

Referenced by CMU_LFXOInit() .

#define _CMU_LFXOCTRL_GAIN_SHIFT 11

Shift value for CMU_GAIN

Definition at line 691 of file efm32gg12b_cmu.h .

Referenced by CMU_LFXOInit() .

#define _CMU_LFXOCTRL_HIGHAMPL_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_LFXOCTRL

Definition at line 698 of file efm32gg12b_cmu.h .

#define _CMU_LFXOCTRL_HIGHAMPL_MASK 0x4000UL

Bit mask for CMU_HIGHAMPL

Definition at line 697 of file efm32gg12b_cmu.h .

#define _CMU_LFXOCTRL_HIGHAMPL_SHIFT 14

Shift value for CMU_HIGHAMPL

Definition at line 696 of file efm32gg12b_cmu.h .

#define _CMU_LFXOCTRL_MASK 0x0713DB7FUL

Mask for CMU_LFXOCTRL

Definition at line 676 of file efm32gg12b_cmu.h .

#define _CMU_LFXOCTRL_MODE_BUFEXTCLK 0x00000001UL

Mode BUFEXTCLK for CMU_LFXOCTRL

Definition at line 685 of file efm32gg12b_cmu.h .

#define _CMU_LFXOCTRL_MODE_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_LFXOCTRL

Definition at line 683 of file efm32gg12b_cmu.h .

#define _CMU_LFXOCTRL_MODE_DIGEXTCLK 0x00000002UL

Mode DIGEXTCLK for CMU_LFXOCTRL

Definition at line 686 of file efm32gg12b_cmu.h .

#define _CMU_LFXOCTRL_MODE_MASK 0x300UL

Bit mask for CMU_MODE

Definition at line 682 of file efm32gg12b_cmu.h .

Referenced by CMU_LFXOInit() .

#define _CMU_LFXOCTRL_MODE_SHIFT 8

Shift value for CMU_MODE

Definition at line 681 of file efm32gg12b_cmu.h .

Referenced by CMU_LFXOInit() .

#define _CMU_LFXOCTRL_MODE_XTAL 0x00000000UL

Mode XTAL for CMU_LFXOCTRL

Definition at line 684 of file efm32gg12b_cmu.h .

#define _CMU_LFXOCTRL_RESETVALUE 0x07009000UL

Default value for CMU_LFXOCTRL

Definition at line 675 of file efm32gg12b_cmu.h .

#define _CMU_LFXOCTRL_TIMEOUT_16KCYCLES 0x00000006UL

Mode 16KCYCLES for CMU_LFXOCTRL

Definition at line 722 of file efm32gg12b_cmu.h .

#define _CMU_LFXOCTRL_TIMEOUT_1KCYCLES 0x00000002UL

Mode 1KCYCLES for CMU_LFXOCTRL

Definition at line 718 of file efm32gg12b_cmu.h .

#define _CMU_LFXOCTRL_TIMEOUT_256CYCLES 0x00000001UL

Mode 256CYCLES for CMU_LFXOCTRL

Definition at line 717 of file efm32gg12b_cmu.h .

#define _CMU_LFXOCTRL_TIMEOUT_2CYCLES 0x00000000UL

Mode 2CYCLES for CMU_LFXOCTRL

Definition at line 716 of file efm32gg12b_cmu.h .

#define _CMU_LFXOCTRL_TIMEOUT_2KCYCLES 0x00000003UL

Mode 2KCYCLES for CMU_LFXOCTRL

Definition at line 719 of file efm32gg12b_cmu.h .

#define _CMU_LFXOCTRL_TIMEOUT_32KCYCLES 0x00000007UL

Mode 32KCYCLES for CMU_LFXOCTRL

Definition at line 724 of file efm32gg12b_cmu.h .

#define _CMU_LFXOCTRL_TIMEOUT_4KCYCLES 0x00000004UL

Mode 4KCYCLES for CMU_LFXOCTRL

Definition at line 720 of file efm32gg12b_cmu.h .

#define _CMU_LFXOCTRL_TIMEOUT_8KCYCLES 0x00000005UL

Mode 8KCYCLES for CMU_LFXOCTRL

Definition at line 721 of file efm32gg12b_cmu.h .

#define _CMU_LFXOCTRL_TIMEOUT_DEFAULT 0x00000007UL

Mode DEFAULT for CMU_LFXOCTRL

Definition at line 723 of file efm32gg12b_cmu.h .

#define _CMU_LFXOCTRL_TIMEOUT_MASK 0x7000000UL

Bit mask for CMU_TIMEOUT

Definition at line 715 of file efm32gg12b_cmu.h .

Referenced by CMU_LFXOInit() .

#define _CMU_LFXOCTRL_TIMEOUT_SHIFT 24

Shift value for CMU_TIMEOUT

Definition at line 714 of file efm32gg12b_cmu.h .

Referenced by CMU_LFXOInit() .

#define _CMU_LFXOCTRL_TUNING_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_LFXOCTRL

Definition at line 679 of file efm32gg12b_cmu.h .

#define _CMU_LFXOCTRL_TUNING_MASK 0x7FUL

Bit mask for CMU_TUNING

Definition at line 678 of file efm32gg12b_cmu.h .

Referenced by CMU_LFXOInit() .

#define _CMU_LFXOCTRL_TUNING_SHIFT 0

Shift value for CMU_TUNING

Definition at line 677 of file efm32gg12b_cmu.h .

Referenced by CMU_LFXOInit() .

#define _CMU_LOCK_LOCKKEY_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_LOCK

Definition at line 2580 of file efm32gg12b_cmu.h .

#define _CMU_LOCK_LOCKKEY_LOCK 0x00000000UL

Mode LOCK for CMU_LOCK

Definition at line 2581 of file efm32gg12b_cmu.h .

#define _CMU_LOCK_LOCKKEY_LOCKED 0x00000001UL

Mode LOCKED for CMU_LOCK

Definition at line 2583 of file efm32gg12b_cmu.h .

#define _CMU_LOCK_LOCKKEY_MASK 0xFFFFUL

Bit mask for CMU_LOCKKEY

Definition at line 2579 of file efm32gg12b_cmu.h .

#define _CMU_LOCK_LOCKKEY_SHIFT 0

Shift value for CMU_LOCKKEY

Definition at line 2578 of file efm32gg12b_cmu.h .

#define _CMU_LOCK_LOCKKEY_UNLOCK 0x0000580EUL

Mode UNLOCK for CMU_LOCK

Definition at line 2584 of file efm32gg12b_cmu.h .

#define _CMU_LOCK_LOCKKEY_UNLOCKED 0x00000000UL

Mode UNLOCKED for CMU_LOCK

Definition at line 2582 of file efm32gg12b_cmu.h .

#define _CMU_LOCK_MASK 0x0000FFFFUL

Mask for CMU_LOCK

Definition at line 2577 of file efm32gg12b_cmu.h .

#define _CMU_LOCK_RESETVALUE 0x00000000UL

Default value for CMU_LOCK

Definition at line 2576 of file efm32gg12b_cmu.h .

#define _CMU_OSCENCMD_AUXHFRCODIS_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_OSCENCMD

Definition at line 949 of file efm32gg12b_cmu.h .

#define _CMU_OSCENCMD_AUXHFRCODIS_MASK 0x20UL

Bit mask for CMU_AUXHFRCODIS

Definition at line 948 of file efm32gg12b_cmu.h .

#define _CMU_OSCENCMD_AUXHFRCODIS_SHIFT 5

Shift value for CMU_AUXHFRCODIS

Definition at line 947 of file efm32gg12b_cmu.h .

#define _CMU_OSCENCMD_AUXHFRCOEN_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_OSCENCMD

Definition at line 944 of file efm32gg12b_cmu.h .

#define _CMU_OSCENCMD_AUXHFRCOEN_MASK 0x10UL

Bit mask for CMU_AUXHFRCOEN

Definition at line 943 of file efm32gg12b_cmu.h .

#define _CMU_OSCENCMD_AUXHFRCOEN_SHIFT 4

Shift value for CMU_AUXHFRCOEN

Definition at line 942 of file efm32gg12b_cmu.h .

#define _CMU_OSCENCMD_DPLLDIS_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_OSCENCMD

Definition at line 989 of file efm32gg12b_cmu.h .

#define _CMU_OSCENCMD_DPLLDIS_MASK 0x2000UL

Bit mask for CMU_DPLLDIS

Definition at line 988 of file efm32gg12b_cmu.h .

#define _CMU_OSCENCMD_DPLLDIS_SHIFT 13

Shift value for CMU_DPLLDIS

Definition at line 987 of file efm32gg12b_cmu.h .

#define _CMU_OSCENCMD_DPLLEN_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_OSCENCMD

Definition at line 984 of file efm32gg12b_cmu.h .

#define _CMU_OSCENCMD_DPLLEN_MASK 0x1000UL

Bit mask for CMU_DPLLEN

Definition at line 983 of file efm32gg12b_cmu.h .

#define _CMU_OSCENCMD_DPLLEN_SHIFT 12

Shift value for CMU_DPLLEN

Definition at line 982 of file efm32gg12b_cmu.h .

#define _CMU_OSCENCMD_HFRCODIS_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_OSCENCMD

Definition at line 929 of file efm32gg12b_cmu.h .

#define _CMU_OSCENCMD_HFRCODIS_MASK 0x2UL

Bit mask for CMU_HFRCODIS

Definition at line 928 of file efm32gg12b_cmu.h .

#define _CMU_OSCENCMD_HFRCODIS_SHIFT 1

Shift value for CMU_HFRCODIS

Definition at line 927 of file efm32gg12b_cmu.h .

#define _CMU_OSCENCMD_HFRCOEN_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_OSCENCMD

Definition at line 924 of file efm32gg12b_cmu.h .

#define _CMU_OSCENCMD_HFRCOEN_MASK 0x1UL

Bit mask for CMU_HFRCOEN

Definition at line 923 of file efm32gg12b_cmu.h .

#define _CMU_OSCENCMD_HFRCOEN_SHIFT 0

Shift value for CMU_HFRCOEN

Definition at line 922 of file efm32gg12b_cmu.h .

#define _CMU_OSCENCMD_HFXODIS_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_OSCENCMD

Definition at line 939 of file efm32gg12b_cmu.h .

#define _CMU_OSCENCMD_HFXODIS_MASK 0x8UL

Bit mask for CMU_HFXODIS

Definition at line 938 of file efm32gg12b_cmu.h .

#define _CMU_OSCENCMD_HFXODIS_SHIFT 3

Shift value for CMU_HFXODIS

Definition at line 937 of file efm32gg12b_cmu.h .

#define _CMU_OSCENCMD_HFXOEN_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_OSCENCMD

Definition at line 934 of file efm32gg12b_cmu.h .

#define _CMU_OSCENCMD_HFXOEN_MASK 0x4UL

Bit mask for CMU_HFXOEN

Definition at line 933 of file efm32gg12b_cmu.h .

#define _CMU_OSCENCMD_HFXOEN_SHIFT 2

Shift value for CMU_HFXOEN

Definition at line 932 of file efm32gg12b_cmu.h .

#define _CMU_OSCENCMD_LFRCODIS_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_OSCENCMD

Definition at line 959 of file efm32gg12b_cmu.h .

#define _CMU_OSCENCMD_LFRCODIS_MASK 0x80UL

Bit mask for CMU_LFRCODIS

Definition at line 958 of file efm32gg12b_cmu.h .

#define _CMU_OSCENCMD_LFRCODIS_SHIFT 7

Shift value for CMU_LFRCODIS

Definition at line 957 of file efm32gg12b_cmu.h .

#define _CMU_OSCENCMD_LFRCOEN_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_OSCENCMD

Definition at line 954 of file efm32gg12b_cmu.h .

#define _CMU_OSCENCMD_LFRCOEN_MASK 0x40UL

Bit mask for CMU_LFRCOEN

Definition at line 953 of file efm32gg12b_cmu.h .

#define _CMU_OSCENCMD_LFRCOEN_SHIFT 6

Shift value for CMU_LFRCOEN

Definition at line 952 of file efm32gg12b_cmu.h .

#define _CMU_OSCENCMD_LFXODIS_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_OSCENCMD

Definition at line 969 of file efm32gg12b_cmu.h .

#define _CMU_OSCENCMD_LFXODIS_MASK 0x200UL

Bit mask for CMU_LFXODIS

Definition at line 968 of file efm32gg12b_cmu.h .

#define _CMU_OSCENCMD_LFXODIS_SHIFT 9

Shift value for CMU_LFXODIS

Definition at line 967 of file efm32gg12b_cmu.h .

#define _CMU_OSCENCMD_LFXOEN_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_OSCENCMD

Definition at line 964 of file efm32gg12b_cmu.h .

#define _CMU_OSCENCMD_LFXOEN_MASK 0x100UL

Bit mask for CMU_LFXOEN

Definition at line 963 of file efm32gg12b_cmu.h .

#define _CMU_OSCENCMD_LFXOEN_SHIFT 8

Shift value for CMU_LFXOEN

Definition at line 962 of file efm32gg12b_cmu.h .

#define _CMU_OSCENCMD_MASK 0x00003FFFUL

Mask for CMU_OSCENCMD

Definition at line 920 of file efm32gg12b_cmu.h .

#define _CMU_OSCENCMD_RESETVALUE 0x00000000UL

Default value for CMU_OSCENCMD

Definition at line 919 of file efm32gg12b_cmu.h .

#define _CMU_OSCENCMD_USHFRCODIS_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_OSCENCMD

Definition at line 979 of file efm32gg12b_cmu.h .

#define _CMU_OSCENCMD_USHFRCODIS_MASK 0x800UL

Bit mask for CMU_USHFRCODIS

Definition at line 978 of file efm32gg12b_cmu.h .

#define _CMU_OSCENCMD_USHFRCODIS_SHIFT 11

Shift value for CMU_USHFRCODIS

Definition at line 977 of file efm32gg12b_cmu.h .

#define _CMU_OSCENCMD_USHFRCOEN_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_OSCENCMD

Definition at line 974 of file efm32gg12b_cmu.h .

#define _CMU_OSCENCMD_USHFRCOEN_MASK 0x400UL

Bit mask for CMU_USHFRCOEN

Definition at line 973 of file efm32gg12b_cmu.h .

#define _CMU_OSCENCMD_USHFRCOEN_SHIFT 10

Shift value for CMU_USHFRCOEN

Definition at line 972 of file efm32gg12b_cmu.h .

#define _CMU_PCNTCTRL_MASK 0x0000003FUL

Mask for CMU_PCNTCTRL

Definition at line 2318 of file efm32gg12b_cmu.h .

#define _CMU_PCNTCTRL_PCNT0CLKEN_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_PCNTCTRL

Definition at line 2322 of file efm32gg12b_cmu.h .

#define _CMU_PCNTCTRL_PCNT0CLKEN_MASK 0x1UL

Bit mask for CMU_PCNT0CLKEN

Definition at line 2321 of file efm32gg12b_cmu.h .

#define _CMU_PCNTCTRL_PCNT0CLKEN_SHIFT 0

Shift value for CMU_PCNT0CLKEN

Definition at line 2320 of file efm32gg12b_cmu.h .

#define _CMU_PCNTCTRL_PCNT0CLKSEL_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_PCNTCTRL

Definition at line 2327 of file efm32gg12b_cmu.h .

#define _CMU_PCNTCTRL_PCNT0CLKSEL_LFACLK 0x00000000UL

Mode LFACLK for CMU_PCNTCTRL

Definition at line 2328 of file efm32gg12b_cmu.h .

#define _CMU_PCNTCTRL_PCNT0CLKSEL_MASK 0x2UL

Bit mask for CMU_PCNT0CLKSEL

Definition at line 2326 of file efm32gg12b_cmu.h .

#define _CMU_PCNTCTRL_PCNT0CLKSEL_PCNT0S0 0x00000001UL

Mode PCNT0S0 for CMU_PCNTCTRL

Definition at line 2329 of file efm32gg12b_cmu.h .

#define _CMU_PCNTCTRL_PCNT0CLKSEL_SHIFT 1

Shift value for CMU_PCNT0CLKSEL

Definition at line 2325 of file efm32gg12b_cmu.h .

#define _CMU_PCNTCTRL_PCNT1CLKEN_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_PCNTCTRL

Definition at line 2336 of file efm32gg12b_cmu.h .

#define _CMU_PCNTCTRL_PCNT1CLKEN_MASK 0x4UL

Bit mask for CMU_PCNT1CLKEN

Definition at line 2335 of file efm32gg12b_cmu.h .

#define _CMU_PCNTCTRL_PCNT1CLKEN_SHIFT 2

Shift value for CMU_PCNT1CLKEN

Definition at line 2334 of file efm32gg12b_cmu.h .

#define _CMU_PCNTCTRL_PCNT1CLKSEL_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_PCNTCTRL

Definition at line 2341 of file efm32gg12b_cmu.h .

#define _CMU_PCNTCTRL_PCNT1CLKSEL_LFACLK 0x00000000UL

Mode LFACLK for CMU_PCNTCTRL

Definition at line 2342 of file efm32gg12b_cmu.h .

#define _CMU_PCNTCTRL_PCNT1CLKSEL_MASK 0x8UL

Bit mask for CMU_PCNT1CLKSEL

Definition at line 2340 of file efm32gg12b_cmu.h .

#define _CMU_PCNTCTRL_PCNT1CLKSEL_PCNT1S0 0x00000001UL

Mode PCNT1S0 for CMU_PCNTCTRL

Definition at line 2343 of file efm32gg12b_cmu.h .

#define _CMU_PCNTCTRL_PCNT1CLKSEL_SHIFT 3

Shift value for CMU_PCNT1CLKSEL

Definition at line 2339 of file efm32gg12b_cmu.h .

#define _CMU_PCNTCTRL_PCNT2CLKEN_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_PCNTCTRL

Definition at line 2350 of file efm32gg12b_cmu.h .

#define _CMU_PCNTCTRL_PCNT2CLKEN_MASK 0x10UL

Bit mask for CMU_PCNT2CLKEN

Definition at line 2349 of file efm32gg12b_cmu.h .

#define _CMU_PCNTCTRL_PCNT2CLKEN_SHIFT 4

Shift value for CMU_PCNT2CLKEN

Definition at line 2348 of file efm32gg12b_cmu.h .

#define _CMU_PCNTCTRL_PCNT2CLKSEL_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_PCNTCTRL

Definition at line 2355 of file efm32gg12b_cmu.h .

#define _CMU_PCNTCTRL_PCNT2CLKSEL_LFACLK 0x00000000UL

Mode LFACLK for CMU_PCNTCTRL

Definition at line 2356 of file efm32gg12b_cmu.h .

#define _CMU_PCNTCTRL_PCNT2CLKSEL_MASK 0x20UL

Bit mask for CMU_PCNT2CLKSEL

Definition at line 2354 of file efm32gg12b_cmu.h .

#define _CMU_PCNTCTRL_PCNT2CLKSEL_PCNT2S0 0x00000001UL

Mode PCNT2S0 for CMU_PCNTCTRL

Definition at line 2357 of file efm32gg12b_cmu.h .

#define _CMU_PCNTCTRL_PCNT2CLKSEL_SHIFT 5

Shift value for CMU_PCNT2CLKSEL

Definition at line 2353 of file efm32gg12b_cmu.h .

#define _CMU_PCNTCTRL_RESETVALUE 0x00000000UL

Default value for CMU_PCNTCTRL

Definition at line 2317 of file efm32gg12b_cmu.h .

#define _CMU_PDMCTRL_MASK 0x00000083UL

Mask for CMU_PDMCTRL

Definition at line 2456 of file efm32gg12b_cmu.h .

#define _CMU_PDMCTRL_PDMCLKEN_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_PDMCTRL

Definition at line 2472 of file efm32gg12b_cmu.h .

#define _CMU_PDMCTRL_PDMCLKEN_MASK 0x80UL

Bit mask for CMU_PDMCLKEN

Definition at line 2471 of file efm32gg12b_cmu.h .

#define _CMU_PDMCTRL_PDMCLKEN_SHIFT 7

Shift value for CMU_PDMCLKEN

Definition at line 2470 of file efm32gg12b_cmu.h .

#define _CMU_PDMCTRL_PDMCLKSEL_CLKIN0 0x00000003UL

Mode CLKIN0 for CMU_PDMCTRL

Definition at line 2463 of file efm32gg12b_cmu.h .

#define _CMU_PDMCTRL_PDMCLKSEL_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_PDMCTRL

Definition at line 2459 of file efm32gg12b_cmu.h .

#define _CMU_PDMCTRL_PDMCLKSEL_HFRCO 0x00000000UL

Mode HFRCO for CMU_PDMCTRL

Definition at line 2460 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockSelectSet() .

#define _CMU_PDMCTRL_PDMCLKSEL_HFXO 0x00000001UL

Mode HFXO for CMU_PDMCTRL

Definition at line 2461 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockSelectSet() .

#define _CMU_PDMCTRL_PDMCLKSEL_MASK 0x3UL

Bit mask for CMU_PDMCLKSEL

Definition at line 2458 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockSelectGet() , and CMU_ClockSelectSet() .

#define _CMU_PDMCTRL_PDMCLKSEL_SHIFT 0

Shift value for CMU_PDMCLKSEL

Definition at line 2457 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockSelectSet() .

#define _CMU_PDMCTRL_PDMCLKSEL_USHFRCO 0x00000002UL

Mode USHFRCO for CMU_PDMCTRL

Definition at line 2462 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockSelectSet() .

#define _CMU_PDMCTRL_RESETVALUE 0x00000000UL

Default value for CMU_PDMCTRL

Definition at line 2455 of file efm32gg12b_cmu.h .

#define _CMU_QSPICTRL_MASK 0x00000083UL

Mask for CMU_QSPICTRL

Definition at line 2435 of file efm32gg12b_cmu.h .

#define _CMU_QSPICTRL_QSPI0CLKDIS_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_QSPICTRL

Definition at line 2451 of file efm32gg12b_cmu.h .

#define _CMU_QSPICTRL_QSPI0CLKDIS_MASK 0x80UL

Bit mask for CMU_QSPI0CLKDIS

Definition at line 2450 of file efm32gg12b_cmu.h .

#define _CMU_QSPICTRL_QSPI0CLKDIS_SHIFT 7

Shift value for CMU_QSPI0CLKDIS

Definition at line 2449 of file efm32gg12b_cmu.h .

#define _CMU_QSPICTRL_QSPI0CLKSEL_AUXHFRCO 0x00000002UL

Mode AUXHFRCO for CMU_QSPICTRL

Definition at line 2441 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockSelectSet() .

#define _CMU_QSPICTRL_QSPI0CLKSEL_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_QSPICTRL

Definition at line 2438 of file efm32gg12b_cmu.h .

#define _CMU_QSPICTRL_QSPI0CLKSEL_HFRCO 0x00000000UL

Mode HFRCO for CMU_QSPICTRL

Definition at line 2439 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockSelectSet() .

#define _CMU_QSPICTRL_QSPI0CLKSEL_HFXO 0x00000001UL

Mode HFXO for CMU_QSPICTRL

Definition at line 2440 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockSelectSet() .

#define _CMU_QSPICTRL_QSPI0CLKSEL_MASK 0x3UL

Bit mask for CMU_QSPI0CLKSEL

Definition at line 2437 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockSelectGet() , and CMU_ClockSelectSet() .

#define _CMU_QSPICTRL_QSPI0CLKSEL_SHIFT 0

Shift value for CMU_QSPI0CLKSEL

Definition at line 2436 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockSelectSet() .

#define _CMU_QSPICTRL_QSPI0CLKSEL_USHFRCO 0x00000003UL

Mode USHFRCO for CMU_QSPICTRL

Definition at line 2442 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockSelectSet() .

#define _CMU_QSPICTRL_RESETVALUE 0x00000000UL

Default value for CMU_QSPICTRL

Definition at line 2434 of file efm32gg12b_cmu.h .

#define _CMU_ROUTELOC0_CLKOUT0LOC_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_ROUTELOC0

Definition at line 2505 of file efm32gg12b_cmu.h .

#define _CMU_ROUTELOC0_CLKOUT0LOC_LOC0 0x00000000UL

Mode LOC0 for CMU_ROUTELOC0

Definition at line 2504 of file efm32gg12b_cmu.h .

#define _CMU_ROUTELOC0_CLKOUT0LOC_LOC1 0x00000001UL

Mode LOC1 for CMU_ROUTELOC0

Definition at line 2506 of file efm32gg12b_cmu.h .

#define _CMU_ROUTELOC0_CLKOUT0LOC_LOC2 0x00000002UL

Mode LOC2 for CMU_ROUTELOC0

Definition at line 2507 of file efm32gg12b_cmu.h .

#define _CMU_ROUTELOC0_CLKOUT0LOC_LOC3 0x00000003UL

Mode LOC3 for CMU_ROUTELOC0

Definition at line 2508 of file efm32gg12b_cmu.h .

#define _CMU_ROUTELOC0_CLKOUT0LOC_LOC4 0x00000004UL

Mode LOC4 for CMU_ROUTELOC0

Definition at line 2509 of file efm32gg12b_cmu.h .

#define _CMU_ROUTELOC0_CLKOUT0LOC_LOC5 0x00000005UL

Mode LOC5 for CMU_ROUTELOC0

Definition at line 2510 of file efm32gg12b_cmu.h .

#define _CMU_ROUTELOC0_CLKOUT0LOC_MASK 0x7UL

Bit mask for CMU_CLKOUT0LOC

Definition at line 2503 of file efm32gg12b_cmu.h .

#define _CMU_ROUTELOC0_CLKOUT0LOC_SHIFT 0

Shift value for CMU_CLKOUT0LOC

Definition at line 2502 of file efm32gg12b_cmu.h .

#define _CMU_ROUTELOC0_CLKOUT1LOC_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_ROUTELOC0

Definition at line 2521 of file efm32gg12b_cmu.h .

#define _CMU_ROUTELOC0_CLKOUT1LOC_LOC0 0x00000000UL

Mode LOC0 for CMU_ROUTELOC0

Definition at line 2520 of file efm32gg12b_cmu.h .

#define _CMU_ROUTELOC0_CLKOUT1LOC_LOC1 0x00000001UL

Mode LOC1 for CMU_ROUTELOC0

Definition at line 2522 of file efm32gg12b_cmu.h .

#define _CMU_ROUTELOC0_CLKOUT1LOC_LOC2 0x00000002UL

Mode LOC2 for CMU_ROUTELOC0

Definition at line 2523 of file efm32gg12b_cmu.h .

#define _CMU_ROUTELOC0_CLKOUT1LOC_LOC3 0x00000003UL

Mode LOC3 for CMU_ROUTELOC0

Definition at line 2524 of file efm32gg12b_cmu.h .

#define _CMU_ROUTELOC0_CLKOUT1LOC_LOC4 0x00000004UL

Mode LOC4 for CMU_ROUTELOC0

Definition at line 2525 of file efm32gg12b_cmu.h .

#define _CMU_ROUTELOC0_CLKOUT1LOC_LOC5 0x00000005UL

Mode LOC5 for CMU_ROUTELOC0

Definition at line 2526 of file efm32gg12b_cmu.h .

#define _CMU_ROUTELOC0_CLKOUT1LOC_MASK 0x700UL

Bit mask for CMU_CLKOUT1LOC

Definition at line 2519 of file efm32gg12b_cmu.h .

#define _CMU_ROUTELOC0_CLKOUT1LOC_SHIFT 8

Shift value for CMU_CLKOUT1LOC

Definition at line 2518 of file efm32gg12b_cmu.h .

#define _CMU_ROUTELOC0_CLKOUT2LOC_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_ROUTELOC0

Definition at line 2537 of file efm32gg12b_cmu.h .

#define _CMU_ROUTELOC0_CLKOUT2LOC_LOC0 0x00000000UL

Mode LOC0 for CMU_ROUTELOC0

Definition at line 2536 of file efm32gg12b_cmu.h .

#define _CMU_ROUTELOC0_CLKOUT2LOC_LOC1 0x00000001UL

Mode LOC1 for CMU_ROUTELOC0

Definition at line 2538 of file efm32gg12b_cmu.h .

#define _CMU_ROUTELOC0_CLKOUT2LOC_LOC2 0x00000002UL

Mode LOC2 for CMU_ROUTELOC0

Definition at line 2539 of file efm32gg12b_cmu.h .

#define _CMU_ROUTELOC0_CLKOUT2LOC_LOC3 0x00000003UL

Mode LOC3 for CMU_ROUTELOC0

Definition at line 2540 of file efm32gg12b_cmu.h .

#define _CMU_ROUTELOC0_CLKOUT2LOC_LOC4 0x00000004UL

Mode LOC4 for CMU_ROUTELOC0

Definition at line 2541 of file efm32gg12b_cmu.h .

#define _CMU_ROUTELOC0_CLKOUT2LOC_LOC5 0x00000005UL

Mode LOC5 for CMU_ROUTELOC0

Definition at line 2542 of file efm32gg12b_cmu.h .

#define _CMU_ROUTELOC0_CLKOUT2LOC_MASK 0x70000UL

Bit mask for CMU_CLKOUT2LOC

Definition at line 2535 of file efm32gg12b_cmu.h .

#define _CMU_ROUTELOC0_CLKOUT2LOC_SHIFT 16

Shift value for CMU_CLKOUT2LOC

Definition at line 2534 of file efm32gg12b_cmu.h .

#define _CMU_ROUTELOC0_MASK 0x00070707UL

Mask for CMU_ROUTELOC0

Definition at line 2501 of file efm32gg12b_cmu.h .

#define _CMU_ROUTELOC0_RESETVALUE 0x00000000UL

Default value for CMU_ROUTELOC0

Definition at line 2500 of file efm32gg12b_cmu.h .

#define _CMU_ROUTELOC1_CLKIN0LOC_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_ROUTELOC1

Definition at line 2557 of file efm32gg12b_cmu.h .

#define _CMU_ROUTELOC1_CLKIN0LOC_LOC0 0x00000000UL

Mode LOC0 for CMU_ROUTELOC1

Definition at line 2556 of file efm32gg12b_cmu.h .

#define _CMU_ROUTELOC1_CLKIN0LOC_LOC1 0x00000001UL

Mode LOC1 for CMU_ROUTELOC1

Definition at line 2558 of file efm32gg12b_cmu.h .

#define _CMU_ROUTELOC1_CLKIN0LOC_LOC2 0x00000002UL

Mode LOC2 for CMU_ROUTELOC1

Definition at line 2559 of file efm32gg12b_cmu.h .

#define _CMU_ROUTELOC1_CLKIN0LOC_LOC3 0x00000003UL

Mode LOC3 for CMU_ROUTELOC1

Definition at line 2560 of file efm32gg12b_cmu.h .

#define _CMU_ROUTELOC1_CLKIN0LOC_LOC4 0x00000004UL

Mode LOC4 for CMU_ROUTELOC1

Definition at line 2561 of file efm32gg12b_cmu.h .

#define _CMU_ROUTELOC1_CLKIN0LOC_LOC5 0x00000005UL

Mode LOC5 for CMU_ROUTELOC1

Definition at line 2562 of file efm32gg12b_cmu.h .

#define _CMU_ROUTELOC1_CLKIN0LOC_LOC6 0x00000006UL

Mode LOC6 for CMU_ROUTELOC1

Definition at line 2563 of file efm32gg12b_cmu.h .

#define _CMU_ROUTELOC1_CLKIN0LOC_LOC7 0x00000007UL

Mode LOC7 for CMU_ROUTELOC1

Definition at line 2564 of file efm32gg12b_cmu.h .

#define _CMU_ROUTELOC1_CLKIN0LOC_MASK 0x7UL

Bit mask for CMU_CLKIN0LOC

Definition at line 2555 of file efm32gg12b_cmu.h .

#define _CMU_ROUTELOC1_CLKIN0LOC_SHIFT 0

Shift value for CMU_CLKIN0LOC

Definition at line 2554 of file efm32gg12b_cmu.h .

#define _CMU_ROUTELOC1_MASK 0x00000007UL

Mask for CMU_ROUTELOC1

Definition at line 2553 of file efm32gg12b_cmu.h .

#define _CMU_ROUTELOC1_RESETVALUE 0x00000000UL

Default value for CMU_ROUTELOC1

Definition at line 2552 of file efm32gg12b_cmu.h .

#define _CMU_ROUTEPEN_CLKIN0PEN_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_ROUTEPEN

Definition at line 2496 of file efm32gg12b_cmu.h .

#define _CMU_ROUTEPEN_CLKIN0PEN_MASK 0x10000000UL

Bit mask for CMU_CLKIN0PEN

Definition at line 2495 of file efm32gg12b_cmu.h .

#define _CMU_ROUTEPEN_CLKIN0PEN_SHIFT 28

Shift value for CMU_CLKIN0PEN

Definition at line 2494 of file efm32gg12b_cmu.h .

#define _CMU_ROUTEPEN_CLKOUT0PEN_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_ROUTEPEN

Definition at line 2481 of file efm32gg12b_cmu.h .

#define _CMU_ROUTEPEN_CLKOUT0PEN_MASK 0x1UL

Bit mask for CMU_CLKOUT0PEN

Definition at line 2480 of file efm32gg12b_cmu.h .

#define _CMU_ROUTEPEN_CLKOUT0PEN_SHIFT 0

Shift value for CMU_CLKOUT0PEN

Definition at line 2479 of file efm32gg12b_cmu.h .

#define _CMU_ROUTEPEN_CLKOUT1PEN_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_ROUTEPEN

Definition at line 2486 of file efm32gg12b_cmu.h .

#define _CMU_ROUTEPEN_CLKOUT1PEN_MASK 0x2UL

Bit mask for CMU_CLKOUT1PEN

Definition at line 2485 of file efm32gg12b_cmu.h .

#define _CMU_ROUTEPEN_CLKOUT1PEN_SHIFT 1

Shift value for CMU_CLKOUT1PEN

Definition at line 2484 of file efm32gg12b_cmu.h .

#define _CMU_ROUTEPEN_CLKOUT2PEN_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_ROUTEPEN

Definition at line 2491 of file efm32gg12b_cmu.h .

#define _CMU_ROUTEPEN_CLKOUT2PEN_MASK 0x4UL

Bit mask for CMU_CLKOUT2PEN

Definition at line 2490 of file efm32gg12b_cmu.h .

#define _CMU_ROUTEPEN_CLKOUT2PEN_SHIFT 2

Shift value for CMU_CLKOUT2PEN

Definition at line 2489 of file efm32gg12b_cmu.h .

#define _CMU_ROUTEPEN_MASK 0x10000007UL

Mask for CMU_ROUTEPEN

Definition at line 2477 of file efm32gg12b_cmu.h .

#define _CMU_ROUTEPEN_RESETVALUE 0x00000000UL

Default value for CMU_ROUTEPEN

Definition at line 2476 of file efm32gg12b_cmu.h .

#define _CMU_SDIOCTRL_MASK 0x00000083UL

Mask for CMU_SDIOCTRL

Definition at line 2414 of file efm32gg12b_cmu.h .

#define _CMU_SDIOCTRL_RESETVALUE 0x00000000UL

Default value for CMU_SDIOCTRL

Definition at line 2413 of file efm32gg12b_cmu.h .

#define _CMU_SDIOCTRL_SDIOCLKDIS_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_SDIOCTRL

Definition at line 2430 of file efm32gg12b_cmu.h .

#define _CMU_SDIOCTRL_SDIOCLKDIS_MASK 0x80UL

Bit mask for CMU_SDIOCLKDIS

Definition at line 2429 of file efm32gg12b_cmu.h .

#define _CMU_SDIOCTRL_SDIOCLKDIS_SHIFT 7

Shift value for CMU_SDIOCLKDIS

Definition at line 2428 of file efm32gg12b_cmu.h .

#define _CMU_SDIOCTRL_SDIOCLKSEL_AUXHFRCO 0x00000002UL

Mode AUXHFRCO for CMU_SDIOCTRL

Definition at line 2420 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockSelectSet() .

#define _CMU_SDIOCTRL_SDIOCLKSEL_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_SDIOCTRL

Definition at line 2417 of file efm32gg12b_cmu.h .

#define _CMU_SDIOCTRL_SDIOCLKSEL_HFRCO 0x00000000UL

Mode HFRCO for CMU_SDIOCTRL

Definition at line 2418 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockSelectSet() .

#define _CMU_SDIOCTRL_SDIOCLKSEL_HFXO 0x00000001UL

Mode HFXO for CMU_SDIOCTRL

Definition at line 2419 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockSelectSet() .

#define _CMU_SDIOCTRL_SDIOCLKSEL_MASK 0x3UL

Bit mask for CMU_SDIOCLKSEL

Definition at line 2416 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockSelectGet() , and CMU_ClockSelectSet() .

#define _CMU_SDIOCTRL_SDIOCLKSEL_SHIFT 0

Shift value for CMU_SDIOCLKSEL

Definition at line 2415 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockSelectSet() .

#define _CMU_SDIOCTRL_SDIOCLKSEL_USHFRCO 0x00000003UL

Mode USHFRCO for CMU_SDIOCTRL

Definition at line 2421 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockSelectSet() .

#define _CMU_STATUS_AUXHFRCOENS_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_STATUS

Definition at line 1139 of file efm32gg12b_cmu.h .

#define _CMU_STATUS_AUXHFRCOENS_MASK 0x10UL

Bit mask for CMU_AUXHFRCOENS

Definition at line 1138 of file efm32gg12b_cmu.h .

#define _CMU_STATUS_AUXHFRCOENS_SHIFT 4

Shift value for CMU_AUXHFRCOENS

Definition at line 1137 of file efm32gg12b_cmu.h .

Referenced by CMU_OscillatorEnable() .

#define _CMU_STATUS_AUXHFRCORDY_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_STATUS

Definition at line 1144 of file efm32gg12b_cmu.h .

#define _CMU_STATUS_AUXHFRCORDY_MASK 0x20UL

Bit mask for CMU_AUXHFRCORDY

Definition at line 1143 of file efm32gg12b_cmu.h .

#define _CMU_STATUS_AUXHFRCORDY_SHIFT 5

Shift value for CMU_AUXHFRCORDY

Definition at line 1142 of file efm32gg12b_cmu.h .

Referenced by CMU_OscillatorEnable() .

#define _CMU_STATUS_CALRDY_DEFAULT 0x00000001UL

Mode DEFAULT for CMU_STATUS

Definition at line 1189 of file efm32gg12b_cmu.h .

#define _CMU_STATUS_CALRDY_MASK 0x10000UL

Bit mask for CMU_CALRDY

Definition at line 1188 of file efm32gg12b_cmu.h .

#define _CMU_STATUS_CALRDY_SHIFT 16

Shift value for CMU_CALRDY

Definition at line 1187 of file efm32gg12b_cmu.h .

Referenced by CMU_Calibrate() , and CMU_CalibrateCountGet() .

#define _CMU_STATUS_DPLLENS_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_STATUS

Definition at line 1179 of file efm32gg12b_cmu.h .

#define _CMU_STATUS_DPLLENS_MASK 0x1000UL

Bit mask for CMU_DPLLENS

Definition at line 1178 of file efm32gg12b_cmu.h .

#define _CMU_STATUS_DPLLENS_SHIFT 12

Shift value for CMU_DPLLENS

Definition at line 1177 of file efm32gg12b_cmu.h .

#define _CMU_STATUS_DPLLRDY_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_STATUS

Definition at line 1184 of file efm32gg12b_cmu.h .

#define _CMU_STATUS_DPLLRDY_MASK 0x2000UL

Bit mask for CMU_DPLLRDY

Definition at line 1183 of file efm32gg12b_cmu.h .

#define _CMU_STATUS_DPLLRDY_SHIFT 13

Shift value for CMU_DPLLRDY

Definition at line 1182 of file efm32gg12b_cmu.h .

#define _CMU_STATUS_HFRCOENS_DEFAULT 0x00000001UL

Mode DEFAULT for CMU_STATUS

Definition at line 1119 of file efm32gg12b_cmu.h .

#define _CMU_STATUS_HFRCOENS_MASK 0x1UL

Bit mask for CMU_HFRCOENS

Definition at line 1118 of file efm32gg12b_cmu.h .

#define _CMU_STATUS_HFRCOENS_SHIFT 0

Shift value for CMU_HFRCOENS

Definition at line 1117 of file efm32gg12b_cmu.h .

Referenced by CMU_OscillatorEnable() .

#define _CMU_STATUS_HFRCORDY_DEFAULT 0x00000001UL

Mode DEFAULT for CMU_STATUS

Definition at line 1124 of file efm32gg12b_cmu.h .

#define _CMU_STATUS_HFRCORDY_MASK 0x2UL

Bit mask for CMU_HFRCORDY

Definition at line 1123 of file efm32gg12b_cmu.h .

#define _CMU_STATUS_HFRCORDY_SHIFT 1

Shift value for CMU_HFRCORDY

Definition at line 1122 of file efm32gg12b_cmu.h .

Referenced by CMU_OscillatorEnable() .

#define _CMU_STATUS_HFXOAMPLOW_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_STATUS

Definition at line 1214 of file efm32gg12b_cmu.h .

#define _CMU_STATUS_HFXOAMPLOW_MASK 0x2000000UL

Bit mask for CMU_HFXOAMPLOW

Definition at line 1213 of file efm32gg12b_cmu.h .

#define _CMU_STATUS_HFXOAMPLOW_SHIFT 25

Shift value for CMU_HFXOAMPLOW

Definition at line 1212 of file efm32gg12b_cmu.h .

#define _CMU_STATUS_HFXOENS_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_STATUS

Definition at line 1129 of file efm32gg12b_cmu.h .

#define _CMU_STATUS_HFXOENS_MASK 0x4UL

Bit mask for CMU_HFXOENS

Definition at line 1128 of file efm32gg12b_cmu.h .

#define _CMU_STATUS_HFXOENS_SHIFT 2

Shift value for CMU_HFXOENS

Definition at line 1127 of file efm32gg12b_cmu.h .

Referenced by CMU_OscillatorEnable() .

#define _CMU_STATUS_HFXOPEAKDETRDY_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_STATUS

Definition at line 1209 of file efm32gg12b_cmu.h .

#define _CMU_STATUS_HFXOPEAKDETRDY_MASK 0x400000UL

Bit mask for CMU_HFXOPEAKDETRDY

Definition at line 1208 of file efm32gg12b_cmu.h .

#define _CMU_STATUS_HFXOPEAKDETRDY_SHIFT 22

Shift value for CMU_HFXOPEAKDETRDY

Definition at line 1207 of file efm32gg12b_cmu.h .

#define _CMU_STATUS_HFXORDY_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_STATUS

Definition at line 1134 of file efm32gg12b_cmu.h .

#define _CMU_STATUS_HFXORDY_MASK 0x8UL

Bit mask for CMU_HFXORDY

Definition at line 1133 of file efm32gg12b_cmu.h .

#define _CMU_STATUS_HFXORDY_SHIFT 3

Shift value for CMU_HFXORDY

Definition at line 1132 of file efm32gg12b_cmu.h .

Referenced by CMU_OscillatorEnable() .

#define _CMU_STATUS_LFRCOENS_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_STATUS

Definition at line 1149 of file efm32gg12b_cmu.h .

#define _CMU_STATUS_LFRCOENS_MASK 0x40UL

Bit mask for CMU_LFRCOENS

Definition at line 1148 of file efm32gg12b_cmu.h .

#define _CMU_STATUS_LFRCOENS_SHIFT 6

Shift value for CMU_LFRCOENS

Definition at line 1147 of file efm32gg12b_cmu.h .

Referenced by CMU_OscillatorEnable() .

#define _CMU_STATUS_LFRCOPHASE_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_STATUS

Definition at line 1224 of file efm32gg12b_cmu.h .

#define _CMU_STATUS_LFRCOPHASE_MASK 0x10000000UL

Bit mask for CMU_LFRCOPHASE

Definition at line 1223 of file efm32gg12b_cmu.h .

#define _CMU_STATUS_LFRCOPHASE_SHIFT 28

Shift value for CMU_LFRCOPHASE

Definition at line 1222 of file efm32gg12b_cmu.h .

#define _CMU_STATUS_LFRCORDY_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_STATUS

Definition at line 1154 of file efm32gg12b_cmu.h .

#define _CMU_STATUS_LFRCORDY_MASK 0x80UL

Bit mask for CMU_LFRCORDY

Definition at line 1153 of file efm32gg12b_cmu.h .

#define _CMU_STATUS_LFRCORDY_SHIFT 7

Shift value for CMU_LFRCORDY

Definition at line 1152 of file efm32gg12b_cmu.h .

Referenced by CMU_OscillatorEnable() .

#define _CMU_STATUS_LFXOENS_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_STATUS

Definition at line 1159 of file efm32gg12b_cmu.h .

#define _CMU_STATUS_LFXOENS_MASK 0x100UL

Bit mask for CMU_LFXOENS

Definition at line 1158 of file efm32gg12b_cmu.h .

#define _CMU_STATUS_LFXOENS_SHIFT 8

Shift value for CMU_LFXOENS

Definition at line 1157 of file efm32gg12b_cmu.h .

Referenced by CMU_OscillatorEnable() .

#define _CMU_STATUS_LFXOPHASE_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_STATUS

Definition at line 1219 of file efm32gg12b_cmu.h .

#define _CMU_STATUS_LFXOPHASE_MASK 0x8000000UL

Bit mask for CMU_LFXOPHASE

Definition at line 1218 of file efm32gg12b_cmu.h .

#define _CMU_STATUS_LFXOPHASE_SHIFT 27

Shift value for CMU_LFXOPHASE

Definition at line 1217 of file efm32gg12b_cmu.h .

#define _CMU_STATUS_LFXORDY_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_STATUS

Definition at line 1164 of file efm32gg12b_cmu.h .

#define _CMU_STATUS_LFXORDY_MASK 0x200UL

Bit mask for CMU_LFXORDY

Definition at line 1163 of file efm32gg12b_cmu.h .

#define _CMU_STATUS_LFXORDY_SHIFT 9

Shift value for CMU_LFXORDY

Definition at line 1162 of file efm32gg12b_cmu.h .

Referenced by CMU_OscillatorEnable() .

#define _CMU_STATUS_MASK 0x3A4F3FFFUL

Mask for CMU_STATUS

Definition at line 1115 of file efm32gg12b_cmu.h .

Referenced by CMU_OscillatorTuningWait() .

#define _CMU_STATUS_PDMCLKENS_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_STATUS

Definition at line 1204 of file efm32gg12b_cmu.h .

#define _CMU_STATUS_PDMCLKENS_MASK 0x80000UL

Bit mask for CMU_PDMCLKENS

Definition at line 1203 of file efm32gg12b_cmu.h .

#define _CMU_STATUS_PDMCLKENS_SHIFT 19

Shift value for CMU_PDMCLKENS

Definition at line 1202 of file efm32gg12b_cmu.h .

#define _CMU_STATUS_QSPI0CLKENS_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_STATUS

Definition at line 1199 of file efm32gg12b_cmu.h .

#define _CMU_STATUS_QSPI0CLKENS_MASK 0x40000UL

Bit mask for CMU_QSPI0CLKENS

Definition at line 1198 of file efm32gg12b_cmu.h .

#define _CMU_STATUS_QSPI0CLKENS_SHIFT 18

Shift value for CMU_QSPI0CLKENS

Definition at line 1197 of file efm32gg12b_cmu.h .

#define _CMU_STATUS_RESETVALUE 0x00010003UL

Default value for CMU_STATUS

Definition at line 1114 of file efm32gg12b_cmu.h .

#define _CMU_STATUS_SDIOCLKENS_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_STATUS

Definition at line 1194 of file efm32gg12b_cmu.h .

#define _CMU_STATUS_SDIOCLKENS_MASK 0x20000UL

Bit mask for CMU_SDIOCLKENS

Definition at line 1193 of file efm32gg12b_cmu.h .

#define _CMU_STATUS_SDIOCLKENS_SHIFT 17

Shift value for CMU_SDIOCLKENS

Definition at line 1192 of file efm32gg12b_cmu.h .

#define _CMU_STATUS_ULFRCOPHASE_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_STATUS

Definition at line 1229 of file efm32gg12b_cmu.h .

#define _CMU_STATUS_ULFRCOPHASE_MASK 0x20000000UL

Bit mask for CMU_ULFRCOPHASE

Definition at line 1228 of file efm32gg12b_cmu.h .

#define _CMU_STATUS_ULFRCOPHASE_SHIFT 29

Shift value for CMU_ULFRCOPHASE

Definition at line 1227 of file efm32gg12b_cmu.h .

#define _CMU_STATUS_USHFRCOENS_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_STATUS

Definition at line 1169 of file efm32gg12b_cmu.h .

#define _CMU_STATUS_USHFRCOENS_MASK 0x400UL

Bit mask for CMU_USHFRCOENS

Definition at line 1168 of file efm32gg12b_cmu.h .

#define _CMU_STATUS_USHFRCOENS_SHIFT 10

Shift value for CMU_USHFRCOENS

Definition at line 1167 of file efm32gg12b_cmu.h .

Referenced by CMU_OscillatorEnable() .

#define _CMU_STATUS_USHFRCORDY_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_STATUS

Definition at line 1174 of file efm32gg12b_cmu.h .

#define _CMU_STATUS_USHFRCORDY_MASK 0x800UL

Bit mask for CMU_USHFRCORDY

Definition at line 1173 of file efm32gg12b_cmu.h .

#define _CMU_STATUS_USHFRCORDY_SHIFT 11

Shift value for CMU_USHFRCORDY

Definition at line 1172 of file efm32gg12b_cmu.h .

Referenced by CMU_OscillatorEnable() .

#define _CMU_SYNCBUSY_AUXHFRCOBSY_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_SYNCBUSY

Definition at line 2275 of file efm32gg12b_cmu.h .

#define _CMU_SYNCBUSY_AUXHFRCOBSY_MASK 0x2000000UL

Bit mask for CMU_AUXHFRCOBSY

Definition at line 2274 of file efm32gg12b_cmu.h .

#define _CMU_SYNCBUSY_AUXHFRCOBSY_SHIFT 25

Shift value for CMU_AUXHFRCOBSY

Definition at line 2273 of file efm32gg12b_cmu.h .

Referenced by CMU_AUXHFRCOBandSet() , and CMU_OscillatorTuningSet() .

#define _CMU_SYNCBUSY_HFRCOBSY_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_SYNCBUSY

Definition at line 2270 of file efm32gg12b_cmu.h .

#define _CMU_SYNCBUSY_HFRCOBSY_MASK 0x1000000UL

Bit mask for CMU_HFRCOBSY

Definition at line 2269 of file efm32gg12b_cmu.h .

#define _CMU_SYNCBUSY_HFRCOBSY_SHIFT 24

Shift value for CMU_HFRCOBSY

Definition at line 2268 of file efm32gg12b_cmu.h .

Referenced by CMU_HFRCOBandSet() , and CMU_OscillatorTuningSet() .

#define _CMU_SYNCBUSY_HFXOBSY_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_SYNCBUSY

Definition at line 2290 of file efm32gg12b_cmu.h .

#define _CMU_SYNCBUSY_HFXOBSY_MASK 0x10000000UL

Bit mask for CMU_HFXOBSY

Definition at line 2289 of file efm32gg12b_cmu.h .

#define _CMU_SYNCBUSY_HFXOBSY_SHIFT 28

Shift value for CMU_HFXOBSY

Definition at line 2288 of file efm32gg12b_cmu.h .

#define _CMU_SYNCBUSY_LFACLKEN0_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_SYNCBUSY

Definition at line 2235 of file efm32gg12b_cmu.h .

#define _CMU_SYNCBUSY_LFACLKEN0_MASK 0x1UL

Bit mask for CMU_LFACLKEN0

Definition at line 2234 of file efm32gg12b_cmu.h .

#define _CMU_SYNCBUSY_LFACLKEN0_SHIFT 0

Shift value for CMU_LFACLKEN0

Definition at line 2233 of file efm32gg12b_cmu.h .

#define _CMU_SYNCBUSY_LFAPRESC0_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_SYNCBUSY

Definition at line 2240 of file efm32gg12b_cmu.h .

#define _CMU_SYNCBUSY_LFAPRESC0_MASK 0x4UL

Bit mask for CMU_LFAPRESC0

Definition at line 2239 of file efm32gg12b_cmu.h .

#define _CMU_SYNCBUSY_LFAPRESC0_SHIFT 2

Shift value for CMU_LFAPRESC0

Definition at line 2238 of file efm32gg12b_cmu.h .

#define _CMU_SYNCBUSY_LFBCLKEN0_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_SYNCBUSY

Definition at line 2245 of file efm32gg12b_cmu.h .

#define _CMU_SYNCBUSY_LFBCLKEN0_MASK 0x10UL

Bit mask for CMU_LFBCLKEN0

Definition at line 2244 of file efm32gg12b_cmu.h .

#define _CMU_SYNCBUSY_LFBCLKEN0_SHIFT 4

Shift value for CMU_LFBCLKEN0

Definition at line 2243 of file efm32gg12b_cmu.h .

#define _CMU_SYNCBUSY_LFBPRESC0_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_SYNCBUSY

Definition at line 2250 of file efm32gg12b_cmu.h .

#define _CMU_SYNCBUSY_LFBPRESC0_MASK 0x40UL

Bit mask for CMU_LFBPRESC0

Definition at line 2249 of file efm32gg12b_cmu.h .

#define _CMU_SYNCBUSY_LFBPRESC0_SHIFT 6

Shift value for CMU_LFBPRESC0

Definition at line 2248 of file efm32gg12b_cmu.h .

#define _CMU_SYNCBUSY_LFCCLKEN0_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_SYNCBUSY

Definition at line 2255 of file efm32gg12b_cmu.h .

#define _CMU_SYNCBUSY_LFCCLKEN0_MASK 0x100UL

Bit mask for CMU_LFCCLKEN0

Definition at line 2254 of file efm32gg12b_cmu.h .

#define _CMU_SYNCBUSY_LFCCLKEN0_SHIFT 8

Shift value for CMU_LFCCLKEN0

Definition at line 2253 of file efm32gg12b_cmu.h .

#define _CMU_SYNCBUSY_LFECLKEN0_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_SYNCBUSY

Definition at line 2260 of file efm32gg12b_cmu.h .

#define _CMU_SYNCBUSY_LFECLKEN0_MASK 0x10000UL

Bit mask for CMU_LFECLKEN0

Definition at line 2259 of file efm32gg12b_cmu.h .

#define _CMU_SYNCBUSY_LFECLKEN0_SHIFT 16

Shift value for CMU_LFECLKEN0

Definition at line 2258 of file efm32gg12b_cmu.h .

#define _CMU_SYNCBUSY_LFEPRESC0_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_SYNCBUSY

Definition at line 2265 of file efm32gg12b_cmu.h .

#define _CMU_SYNCBUSY_LFEPRESC0_MASK 0x40000UL

Bit mask for CMU_LFEPRESC0

Definition at line 2264 of file efm32gg12b_cmu.h .

#define _CMU_SYNCBUSY_LFEPRESC0_SHIFT 18

Shift value for CMU_LFEPRESC0

Definition at line 2263 of file efm32gg12b_cmu.h .

#define _CMU_SYNCBUSY_LFRCOBSY_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_SYNCBUSY

Definition at line 2280 of file efm32gg12b_cmu.h .

#define _CMU_SYNCBUSY_LFRCOBSY_MASK 0x4000000UL

Bit mask for CMU_LFRCOBSY

Definition at line 2279 of file efm32gg12b_cmu.h .

#define _CMU_SYNCBUSY_LFRCOBSY_SHIFT 26

Shift value for CMU_LFRCOBSY

Definition at line 2278 of file efm32gg12b_cmu.h .

Referenced by CMU_OscillatorTuningSet() .

#define _CMU_SYNCBUSY_LFRCOVREFBSY_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_SYNCBUSY

Definition at line 2285 of file efm32gg12b_cmu.h .

#define _CMU_SYNCBUSY_LFRCOVREFBSY_MASK 0x8000000UL

Bit mask for CMU_LFRCOVREFBSY

Definition at line 2284 of file efm32gg12b_cmu.h .

#define _CMU_SYNCBUSY_LFRCOVREFBSY_SHIFT 27

Shift value for CMU_LFRCOVREFBSY

Definition at line 2283 of file efm32gg12b_cmu.h .

#define _CMU_SYNCBUSY_LFXOBSY_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_SYNCBUSY

Definition at line 2295 of file efm32gg12b_cmu.h .

#define _CMU_SYNCBUSY_LFXOBSY_MASK 0x20000000UL

Bit mask for CMU_LFXOBSY

Definition at line 2294 of file efm32gg12b_cmu.h .

#define _CMU_SYNCBUSY_LFXOBSY_SHIFT 29

Shift value for CMU_LFXOBSY

Definition at line 2293 of file efm32gg12b_cmu.h .

#define _CMU_SYNCBUSY_MASK 0x7F050155UL

Mask for CMU_SYNCBUSY

Definition at line 2231 of file efm32gg12b_cmu.h .

#define _CMU_SYNCBUSY_RESETVALUE 0x00000000UL

Default value for CMU_SYNCBUSY

Definition at line 2230 of file efm32gg12b_cmu.h .

#define _CMU_SYNCBUSY_USHFRCOBSY_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_SYNCBUSY

Definition at line 2300 of file efm32gg12b_cmu.h .

#define _CMU_SYNCBUSY_USHFRCOBSY_MASK 0x40000000UL

Bit mask for CMU_USHFRCOBSY

Definition at line 2299 of file efm32gg12b_cmu.h .

#define _CMU_SYNCBUSY_USHFRCOBSY_SHIFT 30

Shift value for CMU_USHFRCOBSY

Definition at line 2298 of file efm32gg12b_cmu.h .

Referenced by CMU_OscillatorTuningSet() , and CMU_USHFRCOBandSet() .

#define _CMU_USBCRCTRL_MASK 0x00000003UL

Mask for CMU_USBCRCTRL

Definition at line 2630 of file efm32gg12b_cmu.h .

#define _CMU_USBCRCTRL_RESETVALUE 0x00000000UL

Default value for CMU_USBCRCTRL

Definition at line 2629 of file efm32gg12b_cmu.h .

#define _CMU_USBCRCTRL_USBCREN_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_USBCRCTRL

Definition at line 2634 of file efm32gg12b_cmu.h .

#define _CMU_USBCRCTRL_USBCREN_MASK 0x1UL

Bit mask for CMU_USBCREN

Definition at line 2633 of file efm32gg12b_cmu.h .

#define _CMU_USBCRCTRL_USBCREN_SHIFT 0

Shift value for CMU_USBCREN

Definition at line 2632 of file efm32gg12b_cmu.h .

#define _CMU_USBCRCTRL_USBLSCRMD_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_USBCRCTRL

Definition at line 2639 of file efm32gg12b_cmu.h .

#define _CMU_USBCRCTRL_USBLSCRMD_MASK 0x2UL

Bit mask for CMU_USBLSCRMD

Definition at line 2638 of file efm32gg12b_cmu.h .

#define _CMU_USBCRCTRL_USBLSCRMD_SHIFT 1

Shift value for CMU_USBLSCRMD

Definition at line 2637 of file efm32gg12b_cmu.h .

#define _CMU_USBCTRL_MASK 0x00000087UL

Mask for CMU_USBCTRL

Definition at line 2605 of file efm32gg12b_cmu.h .

#define _CMU_USBCTRL_RESETVALUE 0x00000000UL

Default value for CMU_USBCTRL

Definition at line 2604 of file efm32gg12b_cmu.h .

#define _CMU_USBCTRL_USBCLKEN_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_USBCTRL

Definition at line 2625 of file efm32gg12b_cmu.h .

#define _CMU_USBCTRL_USBCLKEN_MASK 0x80UL

Bit mask for CMU_USBCLKEN

Definition at line 2624 of file efm32gg12b_cmu.h .

#define _CMU_USBCTRL_USBCLKEN_SHIFT 7

Shift value for CMU_USBCLKEN

Definition at line 2623 of file efm32gg12b_cmu.h .

#define _CMU_USBCTRL_USBCLKSEL_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_USBCTRL

Definition at line 2608 of file efm32gg12b_cmu.h .

#define _CMU_USBCTRL_USBCLKSEL_HFRCO 0x00000003UL

Mode HFRCO for CMU_USBCTRL

Definition at line 2612 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockSelectSet() .

#define _CMU_USBCTRL_USBCLKSEL_HFXO 0x00000001UL

Mode HFXO for CMU_USBCTRL

Definition at line 2610 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockSelectSet() .

#define _CMU_USBCTRL_USBCLKSEL_HFXOX2 0x00000002UL

Mode HFXOX2 for CMU_USBCTRL

Definition at line 2611 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockSelectSet() .

#define _CMU_USBCTRL_USBCLKSEL_LFRCO 0x00000005UL

Mode LFRCO for CMU_USBCTRL

Definition at line 2614 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockSelectSet() .

#define _CMU_USBCTRL_USBCLKSEL_LFXO 0x00000004UL

Mode LFXO for CMU_USBCTRL

Definition at line 2613 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockSelectSet() .

#define _CMU_USBCTRL_USBCLKSEL_MASK 0x7UL

Bit mask for CMU_USBCLKSEL

Definition at line 2607 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockSelectGet() , and CMU_ClockSelectSet() .

#define _CMU_USBCTRL_USBCLKSEL_SHIFT 0

Shift value for CMU_USBCLKSEL

Definition at line 2606 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockSelectSet() .

#define _CMU_USBCTRL_USBCLKSEL_USHFRCO 0x00000000UL

Mode USHFRCO for CMU_USBCTRL

Definition at line 2609 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockSelectSet() .

#define _CMU_USHFRCOCTRL_CLKDIV_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_USHFRCOCTRL

Definition at line 292 of file efm32gg12b_cmu.h .

#define _CMU_USHFRCOCTRL_CLKDIV_DIV1 0x00000000UL

Mode DIV1 for CMU_USHFRCOCTRL

Definition at line 293 of file efm32gg12b_cmu.h .

#define _CMU_USHFRCOCTRL_CLKDIV_DIV2 0x00000001UL

Mode DIV2 for CMU_USHFRCOCTRL

Definition at line 294 of file efm32gg12b_cmu.h .

#define _CMU_USHFRCOCTRL_CLKDIV_DIV4 0x00000002UL

Mode DIV4 for CMU_USHFRCOCTRL

Definition at line 295 of file efm32gg12b_cmu.h .

#define _CMU_USHFRCOCTRL_CLKDIV_MASK 0x6000000UL

Bit mask for CMU_CLKDIV

Definition at line 291 of file efm32gg12b_cmu.h .

#define _CMU_USHFRCOCTRL_CLKDIV_SHIFT 25

Shift value for CMU_CLKDIV

Definition at line 290 of file efm32gg12b_cmu.h .

#define _CMU_USHFRCOCTRL_CMPBIAS_DEFAULT 0x00000002UL

Mode DEFAULT for CMU_USHFRCOCTRL

Definition at line 283 of file efm32gg12b_cmu.h .

#define _CMU_USHFRCOCTRL_CMPBIAS_MASK 0xE00000UL

Bit mask for CMU_CMPBIAS

Definition at line 282 of file efm32gg12b_cmu.h .

#define _CMU_USHFRCOCTRL_CMPBIAS_SHIFT 21

Shift value for CMU_CMPBIAS

Definition at line 281 of file efm32gg12b_cmu.h .

#define _CMU_USHFRCOCTRL_FINETUNING_DEFAULT 0x0000001FUL

Mode DEFAULT for CMU_USHFRCOCTRL

Definition at line 275 of file efm32gg12b_cmu.h .

#define _CMU_USHFRCOCTRL_FINETUNING_MASK 0x3F00UL

Bit mask for CMU_FINETUNING

Definition at line 274 of file efm32gg12b_cmu.h .

#define _CMU_USHFRCOCTRL_FINETUNING_SHIFT 8

Shift value for CMU_FINETUNING

Definition at line 273 of file efm32gg12b_cmu.h .

#define _CMU_USHFRCOCTRL_FINETUNINGEN_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_USHFRCOCTRL

Definition at line 303 of file efm32gg12b_cmu.h .

#define _CMU_USHFRCOCTRL_FINETUNINGEN_MASK 0x8000000UL

Bit mask for CMU_FINETUNINGEN

Definition at line 302 of file efm32gg12b_cmu.h .

#define _CMU_USHFRCOCTRL_FINETUNINGEN_SHIFT 27

Shift value for CMU_FINETUNINGEN

Definition at line 301 of file efm32gg12b_cmu.h .

#define _CMU_USHFRCOCTRL_FREQRANGE_DEFAULT 0x00000008UL

Mode DEFAULT for CMU_USHFRCOCTRL

Definition at line 279 of file efm32gg12b_cmu.h .

#define _CMU_USHFRCOCTRL_FREQRANGE_MASK 0x1F0000UL

Bit mask for CMU_FREQRANGE

Definition at line 278 of file efm32gg12b_cmu.h .

#define _CMU_USHFRCOCTRL_FREQRANGE_SHIFT 16

Shift value for CMU_FREQRANGE

Definition at line 277 of file efm32gg12b_cmu.h .

#define _CMU_USHFRCOCTRL_LDOHP_DEFAULT 0x00000001UL

Mode DEFAULT for CMU_USHFRCOCTRL

Definition at line 288 of file efm32gg12b_cmu.h .

#define _CMU_USHFRCOCTRL_LDOHP_MASK 0x1000000UL

Bit mask for CMU_LDOHP

Definition at line 287 of file efm32gg12b_cmu.h .

#define _CMU_USHFRCOCTRL_LDOHP_SHIFT 24

Shift value for CMU_LDOHP

Definition at line 286 of file efm32gg12b_cmu.h .

#define _CMU_USHFRCOCTRL_MASK 0xFFFF3F7FUL

Mask for CMU_USHFRCOCTRL

Definition at line 268 of file efm32gg12b_cmu.h .

#define _CMU_USHFRCOCTRL_RESETVALUE 0xB1481F7FUL

Default value for CMU_USHFRCOCTRL

Definition at line 267 of file efm32gg12b_cmu.h .

#define _CMU_USHFRCOCTRL_TUNING_DEFAULT 0x0000007FUL

Mode DEFAULT for CMU_USHFRCOCTRL

Definition at line 271 of file efm32gg12b_cmu.h .

#define _CMU_USHFRCOCTRL_TUNING_MASK 0x7FUL

Bit mask for CMU_TUNING

Definition at line 270 of file efm32gg12b_cmu.h .

Referenced by CMU_OscillatorTuningGet() , and CMU_OscillatorTuningSet() .

#define _CMU_USHFRCOCTRL_TUNING_SHIFT 0

Shift value for CMU_TUNING

Definition at line 269 of file efm32gg12b_cmu.h .

Referenced by CMU_OscillatorTuningGet() , and CMU_OscillatorTuningSet() .

#define _CMU_USHFRCOCTRL_VREFTC_DEFAULT 0x0000000BUL

Mode DEFAULT for CMU_USHFRCOCTRL

Definition at line 307 of file efm32gg12b_cmu.h .

#define _CMU_USHFRCOCTRL_VREFTC_MASK 0xF0000000UL

Bit mask for CMU_VREFTC

Definition at line 306 of file efm32gg12b_cmu.h .

#define _CMU_USHFRCOCTRL_VREFTC_SHIFT 28

Shift value for CMU_VREFTC

Definition at line 305 of file efm32gg12b_cmu.h .

#define CMU_ADCCTRL_ADC0CLKDIV_DEFAULT ( _CMU_ADCCTRL_ADC0CLKDIV_DEFAULT << 0)

Shifted mode DEFAULT for CMU_ADCCTRL

Definition at line 2369 of file efm32gg12b_cmu.h .

#define CMU_ADCCTRL_ADC0CLKDIV_NODIVISION ( _CMU_ADCCTRL_ADC0CLKDIV_NODIVISION << 0)

Shifted mode NODIVISION for CMU_ADCCTRL

Definition at line 2370 of file efm32gg12b_cmu.h .

#define CMU_ADCCTRL_ADC0CLKINV (0x1UL << 8)

Invert Clock Selected By ADC0CLKSEL

Definition at line 2383 of file efm32gg12b_cmu.h .

#define CMU_ADCCTRL_ADC0CLKINV_DEFAULT ( _CMU_ADCCTRL_ADC0CLKINV_DEFAULT << 8)

Shifted mode DEFAULT for CMU_ADCCTRL

Definition at line 2387 of file efm32gg12b_cmu.h .

#define CMU_ADCCTRL_ADC0CLKSEL_AUXHFRCO ( _CMU_ADCCTRL_ADC0CLKSEL_AUXHFRCO << 4)

Shifted mode AUXHFRCO for CMU_ADCCTRL

Definition at line 2380 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockSelectGet() , and MIC_init() .

#define CMU_ADCCTRL_ADC0CLKSEL_DEFAULT ( _CMU_ADCCTRL_ADC0CLKSEL_DEFAULT << 4)

Shifted mode DEFAULT for CMU_ADCCTRL

Definition at line 2378 of file efm32gg12b_cmu.h .

#define CMU_ADCCTRL_ADC0CLKSEL_DISABLED ( _CMU_ADCCTRL_ADC0CLKSEL_DISABLED << 4)

Shifted mode DISABLED for CMU_ADCCTRL

Definition at line 2379 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockSelectGet() .

#define CMU_ADCCTRL_ADC0CLKSEL_HFSRCCLK ( _CMU_ADCCTRL_ADC0CLKSEL_HFSRCCLK << 4)

Shifted mode HFSRCCLK for CMU_ADCCTRL

Definition at line 2382 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockSelectGet() .

#define CMU_ADCCTRL_ADC0CLKSEL_HFXO ( _CMU_ADCCTRL_ADC0CLKSEL_HFXO << 4)

Shifted mode HFXO for CMU_ADCCTRL

Definition at line 2381 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockSelectGet() .

#define CMU_ADCCTRL_ADC1CLKDIV_DEFAULT ( _CMU_ADCCTRL_ADC1CLKDIV_DEFAULT << 16)

Shifted mode DEFAULT for CMU_ADCCTRL

Definition at line 2392 of file efm32gg12b_cmu.h .

#define CMU_ADCCTRL_ADC1CLKDIV_NODIVISION ( _CMU_ADCCTRL_ADC1CLKDIV_NODIVISION << 16)

Shifted mode NODIVISION for CMU_ADCCTRL

Definition at line 2393 of file efm32gg12b_cmu.h .

#define CMU_ADCCTRL_ADC1CLKINV (0x1UL << 24)

Invert Clock Selected By ADC1CLKSEL

Definition at line 2406 of file efm32gg12b_cmu.h .

#define CMU_ADCCTRL_ADC1CLKINV_DEFAULT ( _CMU_ADCCTRL_ADC1CLKINV_DEFAULT << 24)

Shifted mode DEFAULT for CMU_ADCCTRL

Definition at line 2410 of file efm32gg12b_cmu.h .

#define CMU_ADCCTRL_ADC1CLKSEL_AUXHFRCO ( _CMU_ADCCTRL_ADC1CLKSEL_AUXHFRCO << 20)

Shifted mode AUXHFRCO for CMU_ADCCTRL

Definition at line 2403 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockSelectGet() .

#define CMU_ADCCTRL_ADC1CLKSEL_DEFAULT ( _CMU_ADCCTRL_ADC1CLKSEL_DEFAULT << 20)

Shifted mode DEFAULT for CMU_ADCCTRL

Definition at line 2401 of file efm32gg12b_cmu.h .

#define CMU_ADCCTRL_ADC1CLKSEL_DISABLED ( _CMU_ADCCTRL_ADC1CLKSEL_DISABLED << 20)

Shifted mode DISABLED for CMU_ADCCTRL

Definition at line 2402 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockSelectGet() .

#define CMU_ADCCTRL_ADC1CLKSEL_HFSRCCLK ( _CMU_ADCCTRL_ADC1CLKSEL_HFSRCCLK << 20)

Shifted mode HFSRCCLK for CMU_ADCCTRL

Definition at line 2405 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockSelectGet() .

#define CMU_ADCCTRL_ADC1CLKSEL_HFXO ( _CMU_ADCCTRL_ADC1CLKSEL_HFXO << 20)

Shifted mode HFXO for CMU_ADCCTRL

Definition at line 2404 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockSelectGet() .

#define CMU_AUXHFRCOCTRL_CLKDIV_DEFAULT ( _CMU_AUXHFRCOCTRL_CLKDIV_DEFAULT << 25)

Shifted mode DEFAULT for CMU_AUXHFRCOCTRL

Definition at line 384 of file efm32gg12b_cmu.h .

#define CMU_AUXHFRCOCTRL_CLKDIV_DIV1 ( _CMU_AUXHFRCOCTRL_CLKDIV_DIV1 << 25)

Shifted mode DIV1 for CMU_AUXHFRCOCTRL

Definition at line 385 of file efm32gg12b_cmu.h .

Referenced by CMU_AUXHFRCOBandSet() .

#define CMU_AUXHFRCOCTRL_CLKDIV_DIV2 ( _CMU_AUXHFRCOCTRL_CLKDIV_DIV2 << 25)

Shifted mode DIV2 for CMU_AUXHFRCOCTRL

Definition at line 386 of file efm32gg12b_cmu.h .

Referenced by CMU_AUXHFRCOBandSet() .

#define CMU_AUXHFRCOCTRL_CLKDIV_DIV4 ( _CMU_AUXHFRCOCTRL_CLKDIV_DIV4 << 25)

Shifted mode DIV4 for CMU_AUXHFRCOCTRL

Definition at line 387 of file efm32gg12b_cmu.h .

Referenced by CMU_AUXHFRCOBandSet() .

#define CMU_AUXHFRCOCTRL_CMPBIAS_DEFAULT ( _CMU_AUXHFRCOCTRL_CMPBIAS_DEFAULT << 21)

Shifted mode DEFAULT for CMU_AUXHFRCOCTRL

Definition at line 372 of file efm32gg12b_cmu.h .

#define CMU_AUXHFRCOCTRL_FINETUNING_DEFAULT ( _CMU_AUXHFRCOCTRL_FINETUNING_DEFAULT << 8)

Shifted mode DEFAULT for CMU_AUXHFRCOCTRL

Definition at line 364 of file efm32gg12b_cmu.h .

#define CMU_AUXHFRCOCTRL_FINETUNINGEN (0x1UL << 27)

Enable Reference for Fine Tuning

Definition at line 388 of file efm32gg12b_cmu.h .

#define CMU_AUXHFRCOCTRL_FINETUNINGEN_DEFAULT ( _CMU_AUXHFRCOCTRL_FINETUNINGEN_DEFAULT << 27)

Shifted mode DEFAULT for CMU_AUXHFRCOCTRL

Definition at line 392 of file efm32gg12b_cmu.h .

#define CMU_AUXHFRCOCTRL_FREQRANGE_DEFAULT ( _CMU_AUXHFRCOCTRL_FREQRANGE_DEFAULT << 16)

Shifted mode DEFAULT for CMU_AUXHFRCOCTRL

Definition at line 368 of file efm32gg12b_cmu.h .

#define CMU_AUXHFRCOCTRL_LDOHP (0x1UL << 24)

AUXHFRCO LDO High Power Mode

Definition at line 373 of file efm32gg12b_cmu.h .

#define CMU_AUXHFRCOCTRL_LDOHP_DEFAULT ( _CMU_AUXHFRCOCTRL_LDOHP_DEFAULT << 24)

Shifted mode DEFAULT for CMU_AUXHFRCOCTRL

Definition at line 377 of file efm32gg12b_cmu.h .

#define CMU_AUXHFRCOCTRL_TUNING_DEFAULT ( _CMU_AUXHFRCOCTRL_TUNING_DEFAULT << 0)

Shifted mode DEFAULT for CMU_AUXHFRCOCTRL

Definition at line 360 of file efm32gg12b_cmu.h .

#define CMU_AUXHFRCOCTRL_VREFTC_DEFAULT ( _CMU_AUXHFRCOCTRL_VREFTC_DEFAULT << 28)

Shifted mode DEFAULT for CMU_AUXHFRCOCTRL

Definition at line 396 of file efm32gg12b_cmu.h .

#define CMU_CALCNT_CALCNT_DEFAULT ( _CMU_CALCNT_CALCNT_DEFAULT << 0)

Shifted mode DEFAULT for CMU_CALCNT

Definition at line 916 of file efm32gg12b_cmu.h .

#define CMU_CALCTRL_CONT (0x1UL << 8)

Continuous Calibration

Definition at line 832 of file efm32gg12b_cmu.h .

#define CMU_CALCTRL_CONT_DEFAULT ( _CMU_CALCTRL_CONT_DEFAULT << 8)

Shifted mode DEFAULT for CMU_CALCTRL

Definition at line 836 of file efm32gg12b_cmu.h .

#define CMU_CALCTRL_DOWNSEL_AUXHFRCO ( _CMU_CALCTRL_DOWNSEL_AUXHFRCO << 4)

Shifted mode AUXHFRCO for CMU_CALCTRL

Definition at line 829 of file efm32gg12b_cmu.h .

Referenced by CMU_CalibrateConfig() .

#define CMU_CALCTRL_DOWNSEL_DEFAULT ( _CMU_CALCTRL_DOWNSEL_DEFAULT << 4)

Shifted mode DEFAULT for CMU_CALCTRL

Definition at line 823 of file efm32gg12b_cmu.h .

#define CMU_CALCTRL_DOWNSEL_HFCLK ( _CMU_CALCTRL_DOWNSEL_HFCLK << 4)

Shifted mode HFCLK for CMU_CALCTRL

Definition at line 824 of file efm32gg12b_cmu.h .

#define CMU_CALCTRL_DOWNSEL_HFRCO ( _CMU_CALCTRL_DOWNSEL_HFRCO << 4)

Shifted mode HFRCO for CMU_CALCTRL

Definition at line 827 of file efm32gg12b_cmu.h .

Referenced by CMU_CalibrateConfig() .

#define CMU_CALCTRL_DOWNSEL_HFXO ( _CMU_CALCTRL_DOWNSEL_HFXO << 4)

Shifted mode HFXO for CMU_CALCTRL

Definition at line 825 of file efm32gg12b_cmu.h .

Referenced by CMU_CalibrateConfig() .

#define CMU_CALCTRL_DOWNSEL_LFRCO ( _CMU_CALCTRL_DOWNSEL_LFRCO << 4)

Shifted mode LFRCO for CMU_CALCTRL

Definition at line 828 of file efm32gg12b_cmu.h .

Referenced by CMU_CalibrateConfig() .

#define CMU_CALCTRL_DOWNSEL_LFXO ( _CMU_CALCTRL_DOWNSEL_LFXO << 4)

Shifted mode LFXO for CMU_CALCTRL

Definition at line 826 of file efm32gg12b_cmu.h .

Referenced by CMU_CalibrateConfig() .

#define CMU_CALCTRL_DOWNSEL_PRS ( _CMU_CALCTRL_DOWNSEL_PRS << 4)

Shifted mode PRS for CMU_CALCTRL

Definition at line 830 of file efm32gg12b_cmu.h .

#define CMU_CALCTRL_DOWNSEL_USHFRCO ( _CMU_CALCTRL_DOWNSEL_USHFRCO << 4)

Shifted mode USHFRCO for CMU_CALCTRL

Definition at line 831 of file efm32gg12b_cmu.h .

Referenced by CMU_CalibrateConfig() .

#define CMU_CALCTRL_PRSDOWNSEL_DEFAULT ( _CMU_CALCTRL_PRSDOWNSEL_DEFAULT << 24)

Shifted mode DEFAULT for CMU_CALCTRL

Definition at line 892 of file efm32gg12b_cmu.h .

#define CMU_CALCTRL_PRSDOWNSEL_PRSCH0 ( _CMU_CALCTRL_PRSDOWNSEL_PRSCH0 << 24)

Shifted mode PRSCH0 for CMU_CALCTRL

Definition at line 893 of file efm32gg12b_cmu.h .

#define CMU_CALCTRL_PRSDOWNSEL_PRSCH1 ( _CMU_CALCTRL_PRSDOWNSEL_PRSCH1 << 24)

Shifted mode PRSCH1 for CMU_CALCTRL

Definition at line 894 of file efm32gg12b_cmu.h .

#define CMU_CALCTRL_PRSDOWNSEL_PRSCH10 ( _CMU_CALCTRL_PRSDOWNSEL_PRSCH10 << 24)

Shifted mode PRSCH10 for CMU_CALCTRL

Definition at line 903 of file efm32gg12b_cmu.h .

#define CMU_CALCTRL_PRSDOWNSEL_PRSCH11 ( _CMU_CALCTRL_PRSDOWNSEL_PRSCH11 << 24)

Shifted mode PRSCH11 for CMU_CALCTRL

Definition at line 904 of file efm32gg12b_cmu.h .

#define CMU_CALCTRL_PRSDOWNSEL_PRSCH12 ( _CMU_CALCTRL_PRSDOWNSEL_PRSCH12 << 24)

Shifted mode PRSCH12 for CMU_CALCTRL

Definition at line 905 of file efm32gg12b_cmu.h .

#define CMU_CALCTRL_PRSDOWNSEL_PRSCH13 ( _CMU_CALCTRL_PRSDOWNSEL_PRSCH13 << 24)

Shifted mode PRSCH13 for CMU_CALCTRL

Definition at line 906 of file efm32gg12b_cmu.h .

#define CMU_CALCTRL_PRSDOWNSEL_PRSCH14 ( _CMU_CALCTRL_PRSDOWNSEL_PRSCH14 << 24)

Shifted mode PRSCH14 for CMU_CALCTRL

Definition at line 907 of file efm32gg12b_cmu.h .

#define CMU_CALCTRL_PRSDOWNSEL_PRSCH15 ( _CMU_CALCTRL_PRSDOWNSEL_PRSCH15 << 24)

Shifted mode PRSCH15 for CMU_CALCTRL

Definition at line 908 of file efm32gg12b_cmu.h .

#define CMU_CALCTRL_PRSDOWNSEL_PRSCH2 ( _CMU_CALCTRL_PRSDOWNSEL_PRSCH2 << 24)

Shifted mode PRSCH2 for CMU_CALCTRL

Definition at line 895 of file efm32gg12b_cmu.h .

#define CMU_CALCTRL_PRSDOWNSEL_PRSCH3 ( _CMU_CALCTRL_PRSDOWNSEL_PRSCH3 << 24)

Shifted mode PRSCH3 for CMU_CALCTRL

Definition at line 896 of file efm32gg12b_cmu.h .

#define CMU_CALCTRL_PRSDOWNSEL_PRSCH4 ( _CMU_CALCTRL_PRSDOWNSEL_PRSCH4 << 24)

Shifted mode PRSCH4 for CMU_CALCTRL

Definition at line 897 of file efm32gg12b_cmu.h .

#define CMU_CALCTRL_PRSDOWNSEL_PRSCH5 ( _CMU_CALCTRL_PRSDOWNSEL_PRSCH5 << 24)

Shifted mode PRSCH5 for CMU_CALCTRL

Definition at line 898 of file efm32gg12b_cmu.h .

#define CMU_CALCTRL_PRSDOWNSEL_PRSCH6 ( _CMU_CALCTRL_PRSDOWNSEL_PRSCH6 << 24)

Shifted mode PRSCH6 for CMU_CALCTRL

Definition at line 899 of file efm32gg12b_cmu.h .

#define CMU_CALCTRL_PRSDOWNSEL_PRSCH7 ( _CMU_CALCTRL_PRSDOWNSEL_PRSCH7 << 24)

Shifted mode PRSCH7 for CMU_CALCTRL

Definition at line 900 of file efm32gg12b_cmu.h .

#define CMU_CALCTRL_PRSDOWNSEL_PRSCH8 ( _CMU_CALCTRL_PRSDOWNSEL_PRSCH8 << 24)

Shifted mode PRSCH8 for CMU_CALCTRL

Definition at line 901 of file efm32gg12b_cmu.h .

#define CMU_CALCTRL_PRSDOWNSEL_PRSCH9 ( _CMU_CALCTRL_PRSDOWNSEL_PRSCH9 << 24)

Shifted mode PRSCH9 for CMU_CALCTRL

Definition at line 902 of file efm32gg12b_cmu.h .

#define CMU_CALCTRL_PRSUPSEL_DEFAULT ( _CMU_CALCTRL_PRSUPSEL_DEFAULT << 16)

Shifted mode DEFAULT for CMU_CALCTRL

Definition at line 856 of file efm32gg12b_cmu.h .

#define CMU_CALCTRL_PRSUPSEL_PRSCH0 ( _CMU_CALCTRL_PRSUPSEL_PRSCH0 << 16)

Shifted mode PRSCH0 for CMU_CALCTRL

Definition at line 857 of file efm32gg12b_cmu.h .

#define CMU_CALCTRL_PRSUPSEL_PRSCH1 ( _CMU_CALCTRL_PRSUPSEL_PRSCH1 << 16)

Shifted mode PRSCH1 for CMU_CALCTRL

Definition at line 858 of file efm32gg12b_cmu.h .

#define CMU_CALCTRL_PRSUPSEL_PRSCH10 ( _CMU_CALCTRL_PRSUPSEL_PRSCH10 << 16)

Shifted mode PRSCH10 for CMU_CALCTRL

Definition at line 867 of file efm32gg12b_cmu.h .

#define CMU_CALCTRL_PRSUPSEL_PRSCH11 ( _CMU_CALCTRL_PRSUPSEL_PRSCH11 << 16)

Shifted mode PRSCH11 for CMU_CALCTRL

Definition at line 868 of file efm32gg12b_cmu.h .

#define CMU_CALCTRL_PRSUPSEL_PRSCH12 ( _CMU_CALCTRL_PRSUPSEL_PRSCH12 << 16)

Shifted mode PRSCH12 for CMU_CALCTRL

Definition at line 869 of file efm32gg12b_cmu.h .

#define CMU_CALCTRL_PRSUPSEL_PRSCH13 ( _CMU_CALCTRL_PRSUPSEL_PRSCH13 << 16)

Shifted mode PRSCH13 for CMU_CALCTRL

Definition at line 870 of file efm32gg12b_cmu.h .

#define CMU_CALCTRL_PRSUPSEL_PRSCH14 ( _CMU_CALCTRL_PRSUPSEL_PRSCH14 << 16)

Shifted mode PRSCH14 for CMU_CALCTRL

Definition at line 871 of file efm32gg12b_cmu.h .

#define CMU_CALCTRL_PRSUPSEL_PRSCH15 ( _CMU_CALCTRL_PRSUPSEL_PRSCH15 << 16)

Shifted mode PRSCH15 for CMU_CALCTRL

Definition at line 872 of file efm32gg12b_cmu.h .

#define CMU_CALCTRL_PRSUPSEL_PRSCH2 ( _CMU_CALCTRL_PRSUPSEL_PRSCH2 << 16)

Shifted mode PRSCH2 for CMU_CALCTRL

Definition at line 859 of file efm32gg12b_cmu.h .

#define CMU_CALCTRL_PRSUPSEL_PRSCH3 ( _CMU_CALCTRL_PRSUPSEL_PRSCH3 << 16)

Shifted mode PRSCH3 for CMU_CALCTRL

Definition at line 860 of file efm32gg12b_cmu.h .

#define CMU_CALCTRL_PRSUPSEL_PRSCH4 ( _CMU_CALCTRL_PRSUPSEL_PRSCH4 << 16)

Shifted mode PRSCH4 for CMU_CALCTRL

Definition at line 861 of file efm32gg12b_cmu.h .

#define CMU_CALCTRL_PRSUPSEL_PRSCH5 ( _CMU_CALCTRL_PRSUPSEL_PRSCH5 << 16)

Shifted mode PRSCH5 for CMU_CALCTRL

Definition at line 862 of file efm32gg12b_cmu.h .

#define CMU_CALCTRL_PRSUPSEL_PRSCH6 ( _CMU_CALCTRL_PRSUPSEL_PRSCH6 << 16)

Shifted mode PRSCH6 for CMU_CALCTRL

Definition at line 863 of file efm32gg12b_cmu.h .

#define CMU_CALCTRL_PRSUPSEL_PRSCH7 ( _CMU_CALCTRL_PRSUPSEL_PRSCH7 << 16)

Shifted mode PRSCH7 for CMU_CALCTRL

Definition at line 864 of file efm32gg12b_cmu.h .

#define CMU_CALCTRL_PRSUPSEL_PRSCH8 ( _CMU_CALCTRL_PRSUPSEL_PRSCH8 << 16)

Shifted mode PRSCH8 for CMU_CALCTRL

Definition at line 865 of file efm32gg12b_cmu.h .

#define CMU_CALCTRL_PRSUPSEL_PRSCH9 ( _CMU_CALCTRL_PRSUPSEL_PRSCH9 << 16)

Shifted mode PRSCH9 for CMU_CALCTRL

Definition at line 866 of file efm32gg12b_cmu.h .

#define CMU_CALCTRL_UPSEL_AUXHFRCO ( _CMU_CALCTRL_UPSEL_AUXHFRCO << 0)

Shifted mode AUXHFRCO for CMU_CALCTRL

Definition at line 809 of file efm32gg12b_cmu.h .

Referenced by CMU_Calibrate() , and CMU_CalibrateConfig() .

#define CMU_CALCTRL_UPSEL_DEFAULT ( _CMU_CALCTRL_UPSEL_DEFAULT << 0)

Shifted mode DEFAULT for CMU_CALCTRL

Definition at line 804 of file efm32gg12b_cmu.h .

#define CMU_CALCTRL_UPSEL_HFRCO ( _CMU_CALCTRL_UPSEL_HFRCO << 0)

Shifted mode HFRCO for CMU_CALCTRL

Definition at line 807 of file efm32gg12b_cmu.h .

Referenced by CMU_Calibrate() , and CMU_CalibrateConfig() .

#define CMU_CALCTRL_UPSEL_HFXO ( _CMU_CALCTRL_UPSEL_HFXO << 0)

Shifted mode HFXO for CMU_CALCTRL

Definition at line 805 of file efm32gg12b_cmu.h .

Referenced by CMU_Calibrate() , and CMU_CalibrateConfig() .

#define CMU_CALCTRL_UPSEL_LFRCO ( _CMU_CALCTRL_UPSEL_LFRCO << 0)

Shifted mode LFRCO for CMU_CALCTRL

Definition at line 808 of file efm32gg12b_cmu.h .

Referenced by CMU_Calibrate() , and CMU_CalibrateConfig() .

#define CMU_CALCTRL_UPSEL_LFXO ( _CMU_CALCTRL_UPSEL_LFXO << 0)

Shifted mode LFXO for CMU_CALCTRL

Definition at line 806 of file efm32gg12b_cmu.h .

Referenced by CMU_Calibrate() , and CMU_CalibrateConfig() .

#define CMU_CALCTRL_UPSEL_PRS ( _CMU_CALCTRL_UPSEL_PRS << 0)

Shifted mode PRS for CMU_CALCTRL

Definition at line 810 of file efm32gg12b_cmu.h .

#define CMU_CALCTRL_UPSEL_USHFRCO ( _CMU_CALCTRL_UPSEL_USHFRCO << 0)

Shifted mode USHFRCO for CMU_CALCTRL

Definition at line 811 of file efm32gg12b_cmu.h .

Referenced by CMU_Calibrate() , and CMU_CalibrateConfig() .

#define CMU_CMD_CALSTART (0x1UL << 0)

Calibration Start

Definition at line 995 of file efm32gg12b_cmu.h .

Referenced by CMU_Calibrate() , and CMU_CalibrateStart() .

#define CMU_CMD_CALSTART_DEFAULT ( _CMU_CMD_CALSTART_DEFAULT << 0)

Shifted mode DEFAULT for CMU_CMD

Definition at line 999 of file efm32gg12b_cmu.h .

#define CMU_CMD_CALSTOP (0x1UL << 1)

Calibration Stop

Definition at line 1000 of file efm32gg12b_cmu.h .

Referenced by CMU_CalibrateStop() .

#define CMU_CMD_CALSTOP_DEFAULT ( _CMU_CMD_CALSTOP_DEFAULT << 1)

Shifted mode DEFAULT for CMU_CMD

Definition at line 1004 of file efm32gg12b_cmu.h .

#define CMU_CMD_HFXOPEAKDETSTART (0x1UL << 4)

HFXO Peak Detection Start

Definition at line 1005 of file efm32gg12b_cmu.h .

#define CMU_CMD_HFXOPEAKDETSTART_DEFAULT ( _CMU_CMD_HFXOPEAKDETSTART_DEFAULT << 4)

Shifted mode DEFAULT for CMU_CMD

Definition at line 1009 of file efm32gg12b_cmu.h .

#define CMU_CTRL_CLKOUTSEL0_AUXHFRCOQ ( _CMU_CTRL_CLKOUTSEL0_AUXHFRCOQ << 0)

Shifted mode AUXHFRCOQ for CMU_CTRL

Definition at line 183 of file efm32gg12b_cmu.h .

#define CMU_CTRL_CLKOUTSEL0_DEFAULT ( _CMU_CTRL_CLKOUTSEL0_DEFAULT << 0)

Shifted mode DEFAULT for CMU_CTRL

Definition at line 172 of file efm32gg12b_cmu.h .

#define CMU_CTRL_CLKOUTSEL0_DISABLED ( _CMU_CTRL_CLKOUTSEL0_DISABLED << 0)

Shifted mode DISABLED for CMU_CTRL

Definition at line 173 of file efm32gg12b_cmu.h .

#define CMU_CTRL_CLKOUTSEL0_HFEXPCLK ( _CMU_CTRL_CLKOUTSEL0_HFEXPCLK << 0)

Shifted mode HFEXPCLK for CMU_CTRL

Definition at line 178 of file efm32gg12b_cmu.h .

#define CMU_CTRL_CLKOUTSEL0_HFRCOQ ( _CMU_CTRL_CLKOUTSEL0_HFRCOQ << 0)

Shifted mode HFRCOQ for CMU_CTRL

Definition at line 182 of file efm32gg12b_cmu.h .

#define CMU_CTRL_CLKOUTSEL0_HFSRCCLK ( _CMU_CTRL_CLKOUTSEL0_HFSRCCLK << 0)

Shifted mode HFSRCCLK for CMU_CTRL

Definition at line 185 of file efm32gg12b_cmu.h .

#define CMU_CTRL_CLKOUTSEL0_HFXO ( _CMU_CTRL_CLKOUTSEL0_HFXO << 0)

Shifted mode HFXO for CMU_CTRL

Definition at line 177 of file efm32gg12b_cmu.h .

#define CMU_CTRL_CLKOUTSEL0_HFXOQ ( _CMU_CTRL_CLKOUTSEL0_HFXOQ << 0)

Shifted mode HFXOQ for CMU_CTRL

Definition at line 184 of file efm32gg12b_cmu.h .

#define CMU_CTRL_CLKOUTSEL0_LFRCO ( _CMU_CTRL_CLKOUTSEL0_LFRCO << 0)

Shifted mode LFRCO for CMU_CTRL

Definition at line 175 of file efm32gg12b_cmu.h .

#define CMU_CTRL_CLKOUTSEL0_LFRCOQ ( _CMU_CTRL_CLKOUTSEL0_LFRCOQ << 0)

Shifted mode LFRCOQ for CMU_CTRL

Definition at line 180 of file efm32gg12b_cmu.h .

#define CMU_CTRL_CLKOUTSEL0_LFXO ( _CMU_CTRL_CLKOUTSEL0_LFXO << 0)

Shifted mode LFXO for CMU_CTRL

Definition at line 176 of file efm32gg12b_cmu.h .

#define CMU_CTRL_CLKOUTSEL0_LFXOQ ( _CMU_CTRL_CLKOUTSEL0_LFXOQ << 0)

Shifted mode LFXOQ for CMU_CTRL

Definition at line 181 of file efm32gg12b_cmu.h .

#define CMU_CTRL_CLKOUTSEL0_ULFRCO ( _CMU_CTRL_CLKOUTSEL0_ULFRCO << 0)

Shifted mode ULFRCO for CMU_CTRL

Definition at line 174 of file efm32gg12b_cmu.h .

#define CMU_CTRL_CLKOUTSEL0_ULFRCOQ ( _CMU_CTRL_CLKOUTSEL0_ULFRCOQ << 0)

Shifted mode ULFRCOQ for CMU_CTRL

Definition at line 179 of file efm32gg12b_cmu.h .

#define CMU_CTRL_CLKOUTSEL0_USHFRCOQ ( _CMU_CTRL_CLKOUTSEL0_USHFRCOQ << 0)

Shifted mode USHFRCOQ for CMU_CTRL

Definition at line 186 of file efm32gg12b_cmu.h .

#define CMU_CTRL_CLKOUTSEL1_AUXHFRCOQ ( _CMU_CTRL_CLKOUTSEL1_AUXHFRCOQ << 5)

Shifted mode AUXHFRCOQ for CMU_CTRL

Definition at line 215 of file efm32gg12b_cmu.h .

#define CMU_CTRL_CLKOUTSEL1_DEFAULT ( _CMU_CTRL_CLKOUTSEL1_DEFAULT << 5)

Shifted mode DEFAULT for CMU_CTRL

Definition at line 204 of file efm32gg12b_cmu.h .

#define CMU_CTRL_CLKOUTSEL1_DISABLED ( _CMU_CTRL_CLKOUTSEL1_DISABLED << 5)

Shifted mode DISABLED for CMU_CTRL

Definition at line 205 of file efm32gg12b_cmu.h .

#define CMU_CTRL_CLKOUTSEL1_HFEXPCLK ( _CMU_CTRL_CLKOUTSEL1_HFEXPCLK << 5)

Shifted mode HFEXPCLK for CMU_CTRL

Definition at line 210 of file efm32gg12b_cmu.h .

#define CMU_CTRL_CLKOUTSEL1_HFRCOQ ( _CMU_CTRL_CLKOUTSEL1_HFRCOQ << 5)

Shifted mode HFRCOQ for CMU_CTRL

Definition at line 214 of file efm32gg12b_cmu.h .

#define CMU_CTRL_CLKOUTSEL1_HFSRCCLK ( _CMU_CTRL_CLKOUTSEL1_HFSRCCLK << 5)

Shifted mode HFSRCCLK for CMU_CTRL

Definition at line 217 of file efm32gg12b_cmu.h .

#define CMU_CTRL_CLKOUTSEL1_HFXO ( _CMU_CTRL_CLKOUTSEL1_HFXO << 5)

Shifted mode HFXO for CMU_CTRL

Definition at line 209 of file efm32gg12b_cmu.h .

#define CMU_CTRL_CLKOUTSEL1_HFXOQ ( _CMU_CTRL_CLKOUTSEL1_HFXOQ << 5)

Shifted mode HFXOQ for CMU_CTRL

Definition at line 216 of file efm32gg12b_cmu.h .

#define CMU_CTRL_CLKOUTSEL1_LFRCO ( _CMU_CTRL_CLKOUTSEL1_LFRCO << 5)

Shifted mode LFRCO for CMU_CTRL

Definition at line 207 of file efm32gg12b_cmu.h .

#define CMU_CTRL_CLKOUTSEL1_LFRCOQ ( _CMU_CTRL_CLKOUTSEL1_LFRCOQ << 5)

Shifted mode LFRCOQ for CMU_CTRL

Definition at line 212 of file efm32gg12b_cmu.h .

#define CMU_CTRL_CLKOUTSEL1_LFXO ( _CMU_CTRL_CLKOUTSEL1_LFXO << 5)

Shifted mode LFXO for CMU_CTRL

Definition at line 208 of file efm32gg12b_cmu.h .

#define CMU_CTRL_CLKOUTSEL1_LFXOQ ( _CMU_CTRL_CLKOUTSEL1_LFXOQ << 5)

Shifted mode LFXOQ for CMU_CTRL

Definition at line 213 of file efm32gg12b_cmu.h .

Referenced by MIC_init() .

#define CMU_CTRL_CLKOUTSEL1_ULFRCO ( _CMU_CTRL_CLKOUTSEL1_ULFRCO << 5)

Shifted mode ULFRCO for CMU_CTRL

Definition at line 206 of file efm32gg12b_cmu.h .

#define CMU_CTRL_CLKOUTSEL1_ULFRCOQ ( _CMU_CTRL_CLKOUTSEL1_ULFRCOQ << 5)

Shifted mode ULFRCOQ for CMU_CTRL

Definition at line 211 of file efm32gg12b_cmu.h .

Referenced by MIC_init() .

#define CMU_CTRL_CLKOUTSEL1_USHFRCOQ ( _CMU_CTRL_CLKOUTSEL1_USHFRCOQ << 5)

Shifted mode USHFRCOQ for CMU_CTRL

Definition at line 218 of file efm32gg12b_cmu.h .

#define CMU_CTRL_CLKOUTSEL2_AUXHFRCOQ ( _CMU_CTRL_CLKOUTSEL2_AUXHFRCOQ << 10)

Shifted mode AUXHFRCOQ for CMU_CTRL

Definition at line 251 of file efm32gg12b_cmu.h .

#define CMU_CTRL_CLKOUTSEL2_DEFAULT ( _CMU_CTRL_CLKOUTSEL2_DEFAULT << 10)

Shifted mode DEFAULT for CMU_CTRL

Definition at line 238 of file efm32gg12b_cmu.h .

#define CMU_CTRL_CLKOUTSEL2_DISABLED ( _CMU_CTRL_CLKOUTSEL2_DISABLED << 10)

Shifted mode DISABLED for CMU_CTRL

Definition at line 239 of file efm32gg12b_cmu.h .

#define CMU_CTRL_CLKOUTSEL2_HFEXPCLK ( _CMU_CTRL_CLKOUTSEL2_HFEXPCLK << 10)

Shifted mode HFEXPCLK for CMU_CTRL

Definition at line 245 of file efm32gg12b_cmu.h .

#define CMU_CTRL_CLKOUTSEL2_HFRCOQ ( _CMU_CTRL_CLKOUTSEL2_HFRCOQ << 10)

Shifted mode HFRCOQ for CMU_CTRL

Definition at line 250 of file efm32gg12b_cmu.h .

#define CMU_CTRL_CLKOUTSEL2_HFSRCCLK ( _CMU_CTRL_CLKOUTSEL2_HFSRCCLK << 10)

Shifted mode HFSRCCLK for CMU_CTRL

Definition at line 253 of file efm32gg12b_cmu.h .

#define CMU_CTRL_CLKOUTSEL2_HFXO ( _CMU_CTRL_CLKOUTSEL2_HFXO << 10)

Shifted mode HFXO for CMU_CTRL

Definition at line 244 of file efm32gg12b_cmu.h .

#define CMU_CTRL_CLKOUTSEL2_HFXODIV2Q ( _CMU_CTRL_CLKOUTSEL2_HFXODIV2Q << 10)

Shifted mode HFXODIV2Q for CMU_CTRL

Definition at line 243 of file efm32gg12b_cmu.h .

#define CMU_CTRL_CLKOUTSEL2_HFXOQ ( _CMU_CTRL_CLKOUTSEL2_HFXOQ << 10)

Shifted mode HFXOQ for CMU_CTRL

Definition at line 252 of file efm32gg12b_cmu.h .

#define CMU_CTRL_CLKOUTSEL2_HFXOX2Q ( _CMU_CTRL_CLKOUTSEL2_HFXOX2Q << 10)

Shifted mode HFXOX2Q for CMU_CTRL

Definition at line 246 of file efm32gg12b_cmu.h .

#define CMU_CTRL_CLKOUTSEL2_LFRCO ( _CMU_CTRL_CLKOUTSEL2_LFRCO << 10)

Shifted mode LFRCO for CMU_CTRL

Definition at line 241 of file efm32gg12b_cmu.h .

#define CMU_CTRL_CLKOUTSEL2_LFRCOQ ( _CMU_CTRL_CLKOUTSEL2_LFRCOQ << 10)

Shifted mode LFRCOQ for CMU_CTRL

Definition at line 248 of file efm32gg12b_cmu.h .

#define CMU_CTRL_CLKOUTSEL2_LFXO ( _CMU_CTRL_CLKOUTSEL2_LFXO << 10)

Shifted mode LFXO for CMU_CTRL

Definition at line 242 of file efm32gg12b_cmu.h .

#define CMU_CTRL_CLKOUTSEL2_LFXOQ ( _CMU_CTRL_CLKOUTSEL2_LFXOQ << 10)

Shifted mode LFXOQ for CMU_CTRL

Definition at line 249 of file efm32gg12b_cmu.h .

#define CMU_CTRL_CLKOUTSEL2_ULFRCO ( _CMU_CTRL_CLKOUTSEL2_ULFRCO << 10)

Shifted mode ULFRCO for CMU_CTRL

Definition at line 240 of file efm32gg12b_cmu.h .

#define CMU_CTRL_CLKOUTSEL2_ULFRCOQ ( _CMU_CTRL_CLKOUTSEL2_ULFRCOQ << 10)

Shifted mode ULFRCOQ for CMU_CTRL

Definition at line 247 of file efm32gg12b_cmu.h .

#define CMU_CTRL_CLKOUTSEL2_USHFRCOQ ( _CMU_CTRL_CLKOUTSEL2_USHFRCOQ << 10)

Shifted mode USHFRCOQ for CMU_CTRL

Definition at line 254 of file efm32gg12b_cmu.h .

#define CMU_CTRL_HFPERCLKEN (0x1UL << 20)

HFPERCLK Enable

Definition at line 260 of file efm32gg12b_cmu.h .

#define CMU_CTRL_HFPERCLKEN_DEFAULT ( _CMU_CTRL_HFPERCLKEN_DEFAULT << 20)

Shifted mode DEFAULT for CMU_CTRL

Definition at line 264 of file efm32gg12b_cmu.h .

#define CMU_CTRL_WSHFLE (0x1UL << 16)

Wait State for High-Frequency LE Interface

Definition at line 255 of file efm32gg12b_cmu.h .

#define CMU_CTRL_WSHFLE_DEFAULT ( _CMU_CTRL_WSHFLE_DEFAULT << 16)

Shifted mode DEFAULT for CMU_CTRL

Definition at line 259 of file efm32gg12b_cmu.h .

#define CMU_DBGCLKSEL_DBG_AUXHFRCO ( _CMU_DBGCLKSEL_DBG_AUXHFRCO << 0)

Shifted mode AUXHFRCO for CMU_DBGCLKSEL

Definition at line 1021 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockSelectGet() , and CMU_ClockSelectSet() .

#define CMU_DBGCLKSEL_DBG_DEFAULT ( _CMU_DBGCLKSEL_DBG_DEFAULT << 0)

Shifted mode DEFAULT for CMU_DBGCLKSEL

Definition at line 1020 of file efm32gg12b_cmu.h .

#define CMU_DBGCLKSEL_DBG_HFCLK ( _CMU_DBGCLKSEL_DBG_HFCLK << 0)

Shifted mode HFCLK for CMU_DBGCLKSEL

Definition at line 1022 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockSelectGet() , and CMU_ClockSelectSet() .

#define CMU_DBGCLKSEL_DBG_HFRCODIV2 ( _CMU_DBGCLKSEL_DBG_HFRCODIV2 << 0)

Shifted mode HFRCODIV2 for CMU_DBGCLKSEL

Definition at line 1023 of file efm32gg12b_cmu.h .

#define CMU_DPLLCTRL1_M_DEFAULT ( _CMU_DPLLCTRL1_M_DEFAULT << 0)

Shifted mode DEFAULT for CMU_DPLLCTRL1

Definition at line 785 of file efm32gg12b_cmu.h .

#define CMU_DPLLCTRL1_N_DEFAULT ( _CMU_DPLLCTRL1_N_DEFAULT << 16)

Shifted mode DEFAULT for CMU_DPLLCTRL1

Definition at line 789 of file efm32gg12b_cmu.h .

#define CMU_DPLLCTRL_AUTORECOVER (0x1UL << 2)

Automatic Recovery Ctrl

Definition at line 756 of file efm32gg12b_cmu.h .

#define CMU_DPLLCTRL_AUTORECOVER_DEFAULT ( _CMU_DPLLCTRL_AUTORECOVER_DEFAULT << 2)

Shifted mode DEFAULT for CMU_DPLLCTRL

Definition at line 760 of file efm32gg12b_cmu.h .

#define CMU_DPLLCTRL_DITHEN (0x1UL << 6)

Dither Enable Control

Definition at line 773 of file efm32gg12b_cmu.h .

#define CMU_DPLLCTRL_DITHEN_DEFAULT ( _CMU_DPLLCTRL_DITHEN_DEFAULT << 6)

Shifted mode DEFAULT for CMU_DPLLCTRL

Definition at line 777 of file efm32gg12b_cmu.h .

#define CMU_DPLLCTRL_EDGESEL (0x1UL << 1)

Reference Edge Select

Definition at line 747 of file efm32gg12b_cmu.h .

#define CMU_DPLLCTRL_EDGESEL_DEFAULT ( _CMU_DPLLCTRL_EDGESEL_DEFAULT << 1)

Shifted mode DEFAULT for CMU_DPLLCTRL

Definition at line 753 of file efm32gg12b_cmu.h .

#define CMU_DPLLCTRL_EDGESEL_FALL ( _CMU_DPLLCTRL_EDGESEL_FALL << 1)

Shifted mode FALL for CMU_DPLLCTRL

Definition at line 754 of file efm32gg12b_cmu.h .

#define CMU_DPLLCTRL_EDGESEL_RISE ( _CMU_DPLLCTRL_EDGESEL_RISE << 1)

Shifted mode RISE for CMU_DPLLCTRL

Definition at line 755 of file efm32gg12b_cmu.h .

#define CMU_DPLLCTRL_MODE (0x1UL << 0)

Operating Mode Control

Definition at line 738 of file efm32gg12b_cmu.h .

#define CMU_DPLLCTRL_MODE_DEFAULT ( _CMU_DPLLCTRL_MODE_DEFAULT << 0)

Shifted mode DEFAULT for CMU_DPLLCTRL

Definition at line 744 of file efm32gg12b_cmu.h .

#define CMU_DPLLCTRL_MODE_FREQLL ( _CMU_DPLLCTRL_MODE_FREQLL << 0)

Shifted mode FREQLL for CMU_DPLLCTRL

Definition at line 745 of file efm32gg12b_cmu.h .

#define CMU_DPLLCTRL_MODE_PHASELL ( _CMU_DPLLCTRL_MODE_PHASELL << 0)

Shifted mode PHASELL for CMU_DPLLCTRL

Definition at line 746 of file efm32gg12b_cmu.h .

#define CMU_DPLLCTRL_REFSEL_CLKIN0 ( _CMU_DPLLCTRL_REFSEL_CLKIN0 << 3)

Shifted mode CLKIN0 for CMU_DPLLCTRL

Definition at line 772 of file efm32gg12b_cmu.h .

#define CMU_DPLLCTRL_REFSEL_DEFAULT ( _CMU_DPLLCTRL_REFSEL_DEFAULT << 3)

Shifted mode DEFAULT for CMU_DPLLCTRL

Definition at line 768 of file efm32gg12b_cmu.h .

#define CMU_DPLLCTRL_REFSEL_HFXO ( _CMU_DPLLCTRL_REFSEL_HFXO << 3)

Shifted mode HFXO for CMU_DPLLCTRL

Definition at line 769 of file efm32gg12b_cmu.h .

#define CMU_DPLLCTRL_REFSEL_LFXO ( _CMU_DPLLCTRL_REFSEL_LFXO << 3)

Shifted mode LFXO for CMU_DPLLCTRL

Definition at line 770 of file efm32gg12b_cmu.h .

#define CMU_DPLLCTRL_REFSEL_USHFRCO ( _CMU_DPLLCTRL_REFSEL_USHFRCO << 3)

Shifted mode USHFRCO for CMU_DPLLCTRL

Definition at line 771 of file efm32gg12b_cmu.h .

#define CMU_FREEZE_REGFREEZE (0x1UL << 0)

Register Update Freeze

Definition at line 2306 of file efm32gg12b_cmu.h .

Referenced by CMU_FreezeEnable() .

#define CMU_FREEZE_REGFREEZE_DEFAULT ( _CMU_FREEZE_REGFREEZE_DEFAULT << 0)

Shifted mode DEFAULT for CMU_FREEZE

Definition at line 2312 of file efm32gg12b_cmu.h .

#define CMU_FREEZE_REGFREEZE_FREEZE ( _CMU_FREEZE_REGFREEZE_FREEZE << 0)

Shifted mode FREEZE for CMU_FREEZE

Definition at line 2314 of file efm32gg12b_cmu.h .

#define CMU_FREEZE_REGFREEZE_UPDATE ( _CMU_FREEZE_REGFREEZE_UPDATE << 0)

Shifted mode UPDATE for CMU_FREEZE

Definition at line 2313 of file efm32gg12b_cmu.h .

#define CMU_HFBUSCLKEN0_CRYPTO0 (0x1UL << 1)

Advanced Encryption Standard Accelerator Clock Enable

Definition at line 1700 of file efm32gg12b_cmu.h .

#define CMU_HFBUSCLKEN0_CRYPTO0_DEFAULT ( _CMU_HFBUSCLKEN0_CRYPTO0_DEFAULT << 1)

Shifted mode DEFAULT for CMU_HFBUSCLKEN0

Definition at line 1704 of file efm32gg12b_cmu.h .

#define CMU_HFBUSCLKEN0_EBI (0x1UL << 2)

External Bus Interface Clock Enable

Definition at line 1705 of file efm32gg12b_cmu.h .

#define CMU_HFBUSCLKEN0_EBI_DEFAULT ( _CMU_HFBUSCLKEN0_EBI_DEFAULT << 2)

Shifted mode DEFAULT for CMU_HFBUSCLKEN0

Definition at line 1709 of file efm32gg12b_cmu.h .

#define CMU_HFBUSCLKEN0_GPCRC (0x1UL << 7)

General Purpose CRC Clock Enable

Definition at line 1730 of file efm32gg12b_cmu.h .

#define CMU_HFBUSCLKEN0_GPCRC_DEFAULT ( _CMU_HFBUSCLKEN0_GPCRC_DEFAULT << 7)

Shifted mode DEFAULT for CMU_HFBUSCLKEN0

Definition at line 1734 of file efm32gg12b_cmu.h .

#define CMU_HFBUSCLKEN0_GPIO (0x1UL << 4)

General purpose Input/Output Clock Enable

Definition at line 1715 of file efm32gg12b_cmu.h .

Referenced by BSP_TraceProfilerSetup() , and CHIP_Init() .

#define CMU_HFBUSCLKEN0_GPIO_DEFAULT ( _CMU_HFBUSCLKEN0_GPIO_DEFAULT << 4)

Shifted mode DEFAULT for CMU_HFBUSCLKEN0

Definition at line 1719 of file efm32gg12b_cmu.h .

#define CMU_HFBUSCLKEN0_LDMA (0x1UL << 6)

Linked Direct Memory Access Controller Clock Enable

Definition at line 1725 of file efm32gg12b_cmu.h .

#define CMU_HFBUSCLKEN0_LDMA_DEFAULT ( _CMU_HFBUSCLKEN0_LDMA_DEFAULT << 6)

Shifted mode DEFAULT for CMU_HFBUSCLKEN0

Definition at line 1729 of file efm32gg12b_cmu.h .

#define CMU_HFBUSCLKEN0_LE (0x1UL << 0)

Low Energy Peripheral Interface Clock Enable

Definition at line 1695 of file efm32gg12b_cmu.h .

Referenced by CHIP_Init() , and UDELAY_Calibrate() .

#define CMU_HFBUSCLKEN0_LE_DEFAULT ( _CMU_HFBUSCLKEN0_LE_DEFAULT << 0)

Shifted mode DEFAULT for CMU_HFBUSCLKEN0

Definition at line 1699 of file efm32gg12b_cmu.h .

#define CMU_HFBUSCLKEN0_PRS (0x1UL << 5)

Peripheral Reflex System Clock Enable

Definition at line 1720 of file efm32gg12b_cmu.h .

#define CMU_HFBUSCLKEN0_PRS_DEFAULT ( _CMU_HFBUSCLKEN0_PRS_DEFAULT << 5)

Shifted mode DEFAULT for CMU_HFBUSCLKEN0

Definition at line 1724 of file efm32gg12b_cmu.h .

#define CMU_HFBUSCLKEN0_QSPI0 (0x1UL << 8)

Quad-SPI Clock Enable

Definition at line 1735 of file efm32gg12b_cmu.h .

#define CMU_HFBUSCLKEN0_QSPI0_DEFAULT ( _CMU_HFBUSCLKEN0_QSPI0_DEFAULT << 8)

Shifted mode DEFAULT for CMU_HFBUSCLKEN0

Definition at line 1739 of file efm32gg12b_cmu.h .

#define CMU_HFBUSCLKEN0_SDIO (0x1UL << 3)

SDIO Controller Clock Enable

Definition at line 1710 of file efm32gg12b_cmu.h .

#define CMU_HFBUSCLKEN0_SDIO_DEFAULT ( _CMU_HFBUSCLKEN0_SDIO_DEFAULT << 3)

Shifted mode DEFAULT for CMU_HFBUSCLKEN0

Definition at line 1714 of file efm32gg12b_cmu.h .

#define CMU_HFBUSCLKEN0_USB (0x1UL << 9)

Universal Serial Bus Interface Clock Enable

Definition at line 1740 of file efm32gg12b_cmu.h .

#define CMU_HFBUSCLKEN0_USB_DEFAULT ( _CMU_HFBUSCLKEN0_USB_DEFAULT << 9)

Shifted mode DEFAULT for CMU_HFBUSCLKEN0

Definition at line 1744 of file efm32gg12b_cmu.h .

#define CMU_HFBUSPRESC_PRESC_DEFAULT ( _CMU_HFBUSPRESC_PRESC_DEFAULT << 8)

Shifted mode DEFAULT for CMU_HFBUSPRESC

Definition at line 1992 of file efm32gg12b_cmu.h .

#define CMU_HFBUSPRESC_PRESC_NODIVISION ( _CMU_HFBUSPRESC_PRESC_NODIVISION << 8)

Shifted mode NODIVISION for CMU_HFBUSPRESC

Definition at line 1993 of file efm32gg12b_cmu.h .

#define CMU_HFCLKSEL_HF_CLKIN0 ( _CMU_HFCLKSEL_HF_CLKIN0 << 0)

Shifted mode CLKIN0 for CMU_HFCLKSEL

Definition at line 1045 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockSelectSet() .

#define CMU_HFCLKSEL_HF_DEFAULT ( _CMU_HFCLKSEL_HF_DEFAULT << 0)

Shifted mode DEFAULT for CMU_HFCLKSEL

Definition at line 1038 of file efm32gg12b_cmu.h .

#define CMU_HFCLKSEL_HF_HFRCO ( _CMU_HFCLKSEL_HF_HFRCO << 0)

Shifted mode HFRCO for CMU_HFCLKSEL

Definition at line 1039 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockSelectSet() , CMU_DPLLLock() , and EMU_EnterEM4() .

#define CMU_HFCLKSEL_HF_HFRCODIV2 ( _CMU_HFCLKSEL_HF_HFRCODIV2 << 0)

Shifted mode HFRCODIV2 for CMU_HFCLKSEL

Definition at line 1043 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockSelectSet() , and CMU_DPLLLock() .

#define CMU_HFCLKSEL_HF_HFXO ( _CMU_HFCLKSEL_HF_HFXO << 0)

Shifted mode HFXO for CMU_HFCLKSEL

Definition at line 1040 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockSelectSet() .

#define CMU_HFCLKSEL_HF_LFRCO ( _CMU_HFCLKSEL_HF_LFRCO << 0)

Shifted mode LFRCO for CMU_HFCLKSEL

Definition at line 1041 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockSelectSet() .

#define CMU_HFCLKSEL_HF_LFXO ( _CMU_HFCLKSEL_HF_LFXO << 0)

Shifted mode LFXO for CMU_HFCLKSEL

Definition at line 1042 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockSelectSet() .

#define CMU_HFCLKSEL_HF_USHFRCO ( _CMU_HFCLKSEL_HF_USHFRCO << 0)

Shifted mode USHFRCO for CMU_HFCLKSEL

Definition at line 1044 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockSelectSet() .

#define CMU_HFCLKSTATUS_SELECTED_CLKIN0 ( _CMU_HFCLKSTATUS_SELECTED_CLKIN0 << 0)

Shifted mode CLKIN0 for CMU_HFCLKSTATUS

Definition at line 1252 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockSelectGet() .

#define CMU_HFCLKSTATUS_SELECTED_DEFAULT ( _CMU_HFCLKSTATUS_SELECTED_DEFAULT << 0)

Shifted mode DEFAULT for CMU_HFCLKSTATUS

Definition at line 1245 of file efm32gg12b_cmu.h .

#define CMU_HFCLKSTATUS_SELECTED_HFRCO ( _CMU_HFCLKSTATUS_SELECTED_HFRCO << 0)

Shifted mode HFRCO for CMU_HFCLKSTATUS

Definition at line 1246 of file efm32gg12b_cmu.h .

#define CMU_HFCLKSTATUS_SELECTED_HFRCODIV2 ( _CMU_HFCLKSTATUS_SELECTED_HFRCODIV2 << 0)

Shifted mode HFRCODIV2 for CMU_HFCLKSTATUS

Definition at line 1250 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockSelectGet() .

#define CMU_HFCLKSTATUS_SELECTED_HFXO ( _CMU_HFCLKSTATUS_SELECTED_HFXO << 0)

Shifted mode HFXO for CMU_HFCLKSTATUS

Definition at line 1247 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockSelectGet() , SystemHFClockGet() , and SystemHFXOClockSet() .

#define CMU_HFCLKSTATUS_SELECTED_LFRCO ( _CMU_HFCLKSTATUS_SELECTED_LFRCO << 0)

Shifted mode LFRCO for CMU_HFCLKSTATUS

Definition at line 1248 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockSelectGet() , and SystemHFClockGet() .

#define CMU_HFCLKSTATUS_SELECTED_LFXO ( _CMU_HFCLKSTATUS_SELECTED_LFXO << 0)

Shifted mode LFXO for CMU_HFCLKSTATUS

Definition at line 1249 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockSelectGet() , SystemHFClockGet() , and SystemLFXOClockSet() .

#define CMU_HFCLKSTATUS_SELECTED_USHFRCO ( _CMU_HFCLKSTATUS_SELECTED_USHFRCO << 0)

Shifted mode USHFRCO for CMU_HFCLKSTATUS

Definition at line 1251 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockSelectGet() .

#define CMU_HFCOREPRESC_PRESC_DEFAULT ( _CMU_HFCOREPRESC_PRESC_DEFAULT << 8)

Shifted mode DEFAULT for CMU_HFCOREPRESC

Definition at line 2002 of file efm32gg12b_cmu.h .

#define CMU_HFCOREPRESC_PRESC_NODIVISION ( _CMU_HFCOREPRESC_PRESC_NODIVISION << 8)

Shifted mode NODIVISION for CMU_HFCOREPRESC

Definition at line 2003 of file efm32gg12b_cmu.h .

#define CMU_HFEXPPRESC_PRESC_DEFAULT ( _CMU_HFEXPPRESC_PRESC_DEFAULT << 8)

Shifted mode DEFAULT for CMU_HFEXPPRESC

Definition at line 2022 of file efm32gg12b_cmu.h .

#define CMU_HFEXPPRESC_PRESC_NODIVISION ( _CMU_HFEXPPRESC_PRESC_NODIVISION << 8)

Shifted mode NODIVISION for CMU_HFEXPPRESC

Definition at line 2023 of file efm32gg12b_cmu.h .

#define CMU_HFPERCLKEN0_ACMP0 (0x1UL << 9)

Analog Comparator 0 Clock Enable

Definition at line 1794 of file efm32gg12b_cmu.h .

#define CMU_HFPERCLKEN0_ACMP0_DEFAULT ( _CMU_HFPERCLKEN0_ACMP0_DEFAULT << 9)

Shifted mode DEFAULT for CMU_HFPERCLKEN0

Definition at line 1798 of file efm32gg12b_cmu.h .

#define CMU_HFPERCLKEN0_ACMP1 (0x1UL << 10)

Analog Comparator 1 Clock Enable

Definition at line 1799 of file efm32gg12b_cmu.h .

#define CMU_HFPERCLKEN0_ACMP1_DEFAULT ( _CMU_HFPERCLKEN0_ACMP1_DEFAULT << 10)

Shifted mode DEFAULT for CMU_HFPERCLKEN0

Definition at line 1803 of file efm32gg12b_cmu.h .

#define CMU_HFPERCLKEN0_ACMP2 (0x1UL << 11)

Analog Comparator 2 Clock Enable

Definition at line 1804 of file efm32gg12b_cmu.h .

#define CMU_HFPERCLKEN0_ACMP2_DEFAULT ( _CMU_HFPERCLKEN0_ACMP2_DEFAULT << 11)

Shifted mode DEFAULT for CMU_HFPERCLKEN0

Definition at line 1808 of file efm32gg12b_cmu.h .

#define CMU_HFPERCLKEN0_ADC0 (0x1UL << 14)

Analog to Digital Converter 0 Clock Enable

Definition at line 1819 of file efm32gg12b_cmu.h .

#define CMU_HFPERCLKEN0_ADC0_DEFAULT ( _CMU_HFPERCLKEN0_ADC0_DEFAULT << 14)

Shifted mode DEFAULT for CMU_HFPERCLKEN0

Definition at line 1823 of file efm32gg12b_cmu.h .

#define CMU_HFPERCLKEN0_ADC1 (0x1UL << 15)

Analog to Digital Converter 0 Clock Enable

Definition at line 1824 of file efm32gg12b_cmu.h .

#define CMU_HFPERCLKEN0_ADC1_DEFAULT ( _CMU_HFPERCLKEN0_ADC1_DEFAULT << 15)

Shifted mode DEFAULT for CMU_HFPERCLKEN0

Definition at line 1828 of file efm32gg12b_cmu.h .

#define CMU_HFPERCLKEN0_CRYOTIMER (0x1UL << 17)

CryoTimer Clock Enable

Definition at line 1834 of file efm32gg12b_cmu.h .

#define CMU_HFPERCLKEN0_CRYOTIMER_DEFAULT ( _CMU_HFPERCLKEN0_CRYOTIMER_DEFAULT << 17)

Shifted mode DEFAULT for CMU_HFPERCLKEN0

Definition at line 1838 of file efm32gg12b_cmu.h .

#define CMU_HFPERCLKEN0_I2C0 (0x1UL << 12)

I2C 0 Clock Enable

Definition at line 1809 of file efm32gg12b_cmu.h .

#define CMU_HFPERCLKEN0_I2C0_DEFAULT ( _CMU_HFPERCLKEN0_I2C0_DEFAULT << 12)

Shifted mode DEFAULT for CMU_HFPERCLKEN0

Definition at line 1813 of file efm32gg12b_cmu.h .

#define CMU_HFPERCLKEN0_I2C1 (0x1UL << 13)

I2C 1 Clock Enable

Definition at line 1814 of file efm32gg12b_cmu.h .

#define CMU_HFPERCLKEN0_I2C1_DEFAULT ( _CMU_HFPERCLKEN0_I2C1_DEFAULT << 13)

Shifted mode DEFAULT for CMU_HFPERCLKEN0

Definition at line 1818 of file efm32gg12b_cmu.h .

#define CMU_HFPERCLKEN0_IDAC0 (0x1UL << 18)

Current Digital to Analog Converter 0 Clock Enable

Definition at line 1839 of file efm32gg12b_cmu.h .

#define CMU_HFPERCLKEN0_IDAC0_DEFAULT ( _CMU_HFPERCLKEN0_IDAC0_DEFAULT << 18)

Shifted mode DEFAULT for CMU_HFPERCLKEN0

Definition at line 1843 of file efm32gg12b_cmu.h .

#define CMU_HFPERCLKEN0_PDM (0x1UL << 16)

PDM Interface Clock Enable

Definition at line 1829 of file efm32gg12b_cmu.h .

#define CMU_HFPERCLKEN0_PDM_DEFAULT ( _CMU_HFPERCLKEN0_PDM_DEFAULT << 16)

Shifted mode DEFAULT for CMU_HFPERCLKEN0

Definition at line 1833 of file efm32gg12b_cmu.h .

#define CMU_HFPERCLKEN0_TIMER0 (0x1UL << 5)

Timer 0 Clock Enable

Definition at line 1774 of file efm32gg12b_cmu.h .

#define CMU_HFPERCLKEN0_TIMER0_DEFAULT ( _CMU_HFPERCLKEN0_TIMER0_DEFAULT << 5)

Shifted mode DEFAULT for CMU_HFPERCLKEN0

Definition at line 1778 of file efm32gg12b_cmu.h .

#define CMU_HFPERCLKEN0_TIMER1 (0x1UL << 6)

Timer 1 Clock Enable

Definition at line 1779 of file efm32gg12b_cmu.h .

#define CMU_HFPERCLKEN0_TIMER1_DEFAULT ( _CMU_HFPERCLKEN0_TIMER1_DEFAULT << 6)

Shifted mode DEFAULT for CMU_HFPERCLKEN0

Definition at line 1783 of file efm32gg12b_cmu.h .

#define CMU_HFPERCLKEN0_TIMER2 (0x1UL << 7)

Timer 2 Clock Enable

Definition at line 1784 of file efm32gg12b_cmu.h .

#define CMU_HFPERCLKEN0_TIMER2_DEFAULT ( _CMU_HFPERCLKEN0_TIMER2_DEFAULT << 7)

Shifted mode DEFAULT for CMU_HFPERCLKEN0

Definition at line 1788 of file efm32gg12b_cmu.h .

#define CMU_HFPERCLKEN0_TIMER3 (0x1UL << 8)

Timer 3 Clock Enable

Definition at line 1789 of file efm32gg12b_cmu.h .

#define CMU_HFPERCLKEN0_TIMER3_DEFAULT ( _CMU_HFPERCLKEN0_TIMER3_DEFAULT << 8)

Shifted mode DEFAULT for CMU_HFPERCLKEN0

Definition at line 1793 of file efm32gg12b_cmu.h .

#define CMU_HFPERCLKEN0_TRNG0 (0x1UL << 19)

True Random Number Generator 0 Clock Enable

Definition at line 1844 of file efm32gg12b_cmu.h .

#define CMU_HFPERCLKEN0_TRNG0_DEFAULT ( _CMU_HFPERCLKEN0_TRNG0_DEFAULT << 19)

Shifted mode DEFAULT for CMU_HFPERCLKEN0

Definition at line 1848 of file efm32gg12b_cmu.h .

#define CMU_HFPERCLKEN0_USART0 (0x1UL << 0)

Universal Synchronous/Asynchronous Receiver/Transmitter 0 Clock Enable

Definition at line 1749 of file efm32gg12b_cmu.h .

#define CMU_HFPERCLKEN0_USART0_DEFAULT ( _CMU_HFPERCLKEN0_USART0_DEFAULT << 0)

Shifted mode DEFAULT for CMU_HFPERCLKEN0

Definition at line 1753 of file efm32gg12b_cmu.h .

#define CMU_HFPERCLKEN0_USART1 (0x1UL << 1)

Universal Synchronous/Asynchronous Receiver/Transmitter 1 Clock Enable

Definition at line 1754 of file efm32gg12b_cmu.h .

#define CMU_HFPERCLKEN0_USART1_DEFAULT ( _CMU_HFPERCLKEN0_USART1_DEFAULT << 1)

Shifted mode DEFAULT for CMU_HFPERCLKEN0

Definition at line 1758 of file efm32gg12b_cmu.h .

#define CMU_HFPERCLKEN0_USART2 (0x1UL << 2)

Universal Synchronous/Asynchronous Receiver/Transmitter 2 Clock Enable

Definition at line 1759 of file efm32gg12b_cmu.h .

#define CMU_HFPERCLKEN0_USART2_DEFAULT ( _CMU_HFPERCLKEN0_USART2_DEFAULT << 2)

Shifted mode DEFAULT for CMU_HFPERCLKEN0

Definition at line 1763 of file efm32gg12b_cmu.h .

#define CMU_HFPERCLKEN0_USART3 (0x1UL << 3)

Universal Synchronous/Asynchronous Receiver/Transmitter 3 Clock Enable

Definition at line 1764 of file efm32gg12b_cmu.h .

#define CMU_HFPERCLKEN0_USART3_DEFAULT ( _CMU_HFPERCLKEN0_USART3_DEFAULT << 3)

Shifted mode DEFAULT for CMU_HFPERCLKEN0

Definition at line 1768 of file efm32gg12b_cmu.h .

#define CMU_HFPERCLKEN0_USART4 (0x1UL << 4)

Universal Synchronous/Asynchronous Receiver/Transmitter 4 Clock Enable

Definition at line 1769 of file efm32gg12b_cmu.h .

#define CMU_HFPERCLKEN0_USART4_DEFAULT ( _CMU_HFPERCLKEN0_USART4_DEFAULT << 4)

Shifted mode DEFAULT for CMU_HFPERCLKEN0

Definition at line 1773 of file efm32gg12b_cmu.h .

#define CMU_HFPERCLKEN1_CAN0 (0x1UL << 4)

CAN 0 Clock Enable

Definition at line 1873 of file efm32gg12b_cmu.h .

#define CMU_HFPERCLKEN1_CAN0_DEFAULT ( _CMU_HFPERCLKEN1_CAN0_DEFAULT << 4)

Shifted mode DEFAULT for CMU_HFPERCLKEN1

Definition at line 1877 of file efm32gg12b_cmu.h .

#define CMU_HFPERCLKEN1_CAN1 (0x1UL << 5)

CAN 1 Clock Enable

Definition at line 1878 of file efm32gg12b_cmu.h .

#define CMU_HFPERCLKEN1_CAN1_DEFAULT ( _CMU_HFPERCLKEN1_CAN1_DEFAULT << 5)

Shifted mode DEFAULT for CMU_HFPERCLKEN1

Definition at line 1882 of file efm32gg12b_cmu.h .

#define CMU_HFPERCLKEN1_CSEN (0x1UL << 7)

Capacitive touch sense module Clock Enable

Definition at line 1888 of file efm32gg12b_cmu.h .

#define CMU_HFPERCLKEN1_CSEN_DEFAULT ( _CMU_HFPERCLKEN1_CSEN_DEFAULT << 7)

Shifted mode DEFAULT for CMU_HFPERCLKEN1

Definition at line 1892 of file efm32gg12b_cmu.h .

#define CMU_HFPERCLKEN1_UART0 (0x1UL << 0)

Universal Asynchronous Receiver/Transmitter 0 Clock Enable

Definition at line 1853 of file efm32gg12b_cmu.h .

#define CMU_HFPERCLKEN1_UART0_DEFAULT ( _CMU_HFPERCLKEN1_UART0_DEFAULT << 0)

Shifted mode DEFAULT for CMU_HFPERCLKEN1

Definition at line 1857 of file efm32gg12b_cmu.h .

#define CMU_HFPERCLKEN1_UART1 (0x1UL << 1)

Universal Asynchronous Receiver/Transmitter 1 Clock Enable

Definition at line 1858 of file efm32gg12b_cmu.h .

#define CMU_HFPERCLKEN1_UART1_DEFAULT ( _CMU_HFPERCLKEN1_UART1_DEFAULT << 1)

Shifted mode DEFAULT for CMU_HFPERCLKEN1

Definition at line 1862 of file efm32gg12b_cmu.h .

#define CMU_HFPERCLKEN1_VDAC0 (0x1UL << 6)

Digital to Analog Converter 0 Clock Enable

Definition at line 1883 of file efm32gg12b_cmu.h .

#define CMU_HFPERCLKEN1_VDAC0_DEFAULT ( _CMU_HFPERCLKEN1_VDAC0_DEFAULT << 6)

Shifted mode DEFAULT for CMU_HFPERCLKEN1

Definition at line 1887 of file efm32gg12b_cmu.h .

#define CMU_HFPERCLKEN1_WTIMER0 (0x1UL << 2)

Wide Timer 0 Clock Enable

Definition at line 1863 of file efm32gg12b_cmu.h .

#define CMU_HFPERCLKEN1_WTIMER0_DEFAULT ( _CMU_HFPERCLKEN1_WTIMER0_DEFAULT << 2)

Shifted mode DEFAULT for CMU_HFPERCLKEN1

Definition at line 1867 of file efm32gg12b_cmu.h .

#define CMU_HFPERCLKEN1_WTIMER1 (0x1UL << 3)

Wide Timer 0 Clock Enable

Definition at line 1868 of file efm32gg12b_cmu.h .

#define CMU_HFPERCLKEN1_WTIMER1_DEFAULT ( _CMU_HFPERCLKEN1_WTIMER1_DEFAULT << 3)

Shifted mode DEFAULT for CMU_HFPERCLKEN1

Definition at line 1872 of file efm32gg12b_cmu.h .

#define CMU_HFPERPRESC_PRESC_DEFAULT ( _CMU_HFPERPRESC_PRESC_DEFAULT << 8)

Shifted mode DEFAULT for CMU_HFPERPRESC

Definition at line 2012 of file efm32gg12b_cmu.h .

#define CMU_HFPERPRESC_PRESC_NODIVISION ( _CMU_HFPERPRESC_PRESC_NODIVISION << 8)

Shifted mode NODIVISION for CMU_HFPERPRESC

Definition at line 2013 of file efm32gg12b_cmu.h .

#define CMU_HFPERPRESCB_PRESC_DEFAULT ( _CMU_HFPERPRESCB_PRESC_DEFAULT << 8)

Shifted mode DEFAULT for CMU_HFPERPRESCB

Definition at line 2032 of file efm32gg12b_cmu.h .

#define CMU_HFPERPRESCB_PRESC_NODIVISION ( _CMU_HFPERPRESCB_PRESC_NODIVISION << 8)

Shifted mode NODIVISION for CMU_HFPERPRESCB

Definition at line 2033 of file efm32gg12b_cmu.h .

#define CMU_HFPERPRESCC_PRESC_DEFAULT ( _CMU_HFPERPRESCC_PRESC_DEFAULT << 8)

Shifted mode DEFAULT for CMU_HFPERPRESCC

Definition at line 2042 of file efm32gg12b_cmu.h .

#define CMU_HFPERPRESCC_PRESC_NODIVISION ( _CMU_HFPERPRESCC_PRESC_NODIVISION << 8)

Shifted mode NODIVISION for CMU_HFPERPRESCC

Definition at line 2043 of file efm32gg12b_cmu.h .

#define CMU_HFPRESC_HFCLKLEPRESC_DEFAULT ( _CMU_HFPRESC_HFCLKLEPRESC_DEFAULT << 24)

Shifted mode DEFAULT for CMU_HFPRESC

Definition at line 1980 of file efm32gg12b_cmu.h .

#define CMU_HFPRESC_HFCLKLEPRESC_DIV2 ( _CMU_HFPRESC_HFCLKLEPRESC_DIV2 << 24)

Shifted mode DIV2 for CMU_HFPRESC

Definition at line 1981 of file efm32gg12b_cmu.h .

#define CMU_HFPRESC_HFCLKLEPRESC_DIV4 ( _CMU_HFPRESC_HFCLKLEPRESC_DIV4 << 24)

Shifted mode DIV4 for CMU_HFPRESC

Definition at line 1982 of file efm32gg12b_cmu.h .

#define CMU_HFPRESC_HFCLKLEPRESC_DIV8 ( _CMU_HFPRESC_HFCLKLEPRESC_DIV8 << 24)

Shifted mode DIV8 for CMU_HFPRESC

Definition at line 1983 of file efm32gg12b_cmu.h .

#define CMU_HFPRESC_PRESC_DEFAULT ( _CMU_HFPRESC_PRESC_DEFAULT << 8)

Shifted mode DEFAULT for CMU_HFPRESC

Definition at line 1972 of file efm32gg12b_cmu.h .

#define CMU_HFPRESC_PRESC_NODIVISION ( _CMU_HFPRESC_PRESC_NODIVISION << 8)

Shifted mode NODIVISION for CMU_HFPRESC

Definition at line 1973 of file efm32gg12b_cmu.h .

#define CMU_HFRCOCTRL_CLKDIV_DEFAULT ( _CMU_HFRCOCTRL_CLKDIV_DEFAULT << 25)

Shifted mode DEFAULT for CMU_HFRCOCTRL

Definition at line 340 of file efm32gg12b_cmu.h .

#define CMU_HFRCOCTRL_CLKDIV_DIV1 ( _CMU_HFRCOCTRL_CLKDIV_DIV1 << 25)

Shifted mode DIV1 for CMU_HFRCOCTRL

Definition at line 341 of file efm32gg12b_cmu.h .

Referenced by CMU_HFRCOBandSet() .

#define CMU_HFRCOCTRL_CLKDIV_DIV2 ( _CMU_HFRCOCTRL_CLKDIV_DIV2 << 25)

Shifted mode DIV2 for CMU_HFRCOCTRL

Definition at line 342 of file efm32gg12b_cmu.h .

Referenced by CMU_HFRCOBandSet() .

#define CMU_HFRCOCTRL_CLKDIV_DIV4 ( _CMU_HFRCOCTRL_CLKDIV_DIV4 << 25)

Shifted mode DIV4 for CMU_HFRCOCTRL

Definition at line 343 of file efm32gg12b_cmu.h .

Referenced by CMU_HFRCOBandSet() , and EMU_EnterEM4() .

#define CMU_HFRCOCTRL_CMPBIAS_DEFAULT ( _CMU_HFRCOCTRL_CMPBIAS_DEFAULT << 21)

Shifted mode DEFAULT for CMU_HFRCOCTRL

Definition at line 328 of file efm32gg12b_cmu.h .

#define CMU_HFRCOCTRL_FINETUNING_DEFAULT ( _CMU_HFRCOCTRL_FINETUNING_DEFAULT << 8)

Shifted mode DEFAULT for CMU_HFRCOCTRL

Definition at line 320 of file efm32gg12b_cmu.h .

#define CMU_HFRCOCTRL_FINETUNINGEN (0x1UL << 27)

Enable Reference for Fine Tuning

Definition at line 344 of file efm32gg12b_cmu.h .

#define CMU_HFRCOCTRL_FINETUNINGEN_DEFAULT ( _CMU_HFRCOCTRL_FINETUNINGEN_DEFAULT << 27)

Shifted mode DEFAULT for CMU_HFRCOCTRL

Definition at line 348 of file efm32gg12b_cmu.h .

#define CMU_HFRCOCTRL_FREQRANGE_DEFAULT ( _CMU_HFRCOCTRL_FREQRANGE_DEFAULT << 16)

Shifted mode DEFAULT for CMU_HFRCOCTRL

Definition at line 324 of file efm32gg12b_cmu.h .

#define CMU_HFRCOCTRL_LDOHP (0x1UL << 24)

HFRCO LDO High Power Mode

Definition at line 329 of file efm32gg12b_cmu.h .

#define CMU_HFRCOCTRL_LDOHP_DEFAULT ( _CMU_HFRCOCTRL_LDOHP_DEFAULT << 24)

Shifted mode DEFAULT for CMU_HFRCOCTRL

Definition at line 333 of file efm32gg12b_cmu.h .

#define CMU_HFRCOCTRL_TUNING_DEFAULT ( _CMU_HFRCOCTRL_TUNING_DEFAULT << 0)

Shifted mode DEFAULT for CMU_HFRCOCTRL

Definition at line 316 of file efm32gg12b_cmu.h .

#define CMU_HFRCOCTRL_VREFTC_DEFAULT ( _CMU_HFRCOCTRL_VREFTC_DEFAULT << 28)

Shifted mode DEFAULT for CMU_HFRCOCTRL

Definition at line 352 of file efm32gg12b_cmu.h .

#define CMU_HFRCOSS_SSAMP_DEFAULT ( _CMU_HFRCOSS_SSAMP_DEFAULT << 0)

Shifted mode DEFAULT for CMU_HFRCOSS

Definition at line 2597 of file efm32gg12b_cmu.h .

#define CMU_HFRCOSS_SSINV_DEFAULT ( _CMU_HFRCOSS_SSINV_DEFAULT << 8)

Shifted mode DEFAULT for CMU_HFRCOSS

Definition at line 2601 of file efm32gg12b_cmu.h .

#define CMU_HFXOCTRL1_PEAKDETTHR_DEFAULT ( _CMU_HFXOCTRL1_PEAKDETTHR_DEFAULT << 12)

Shifted mode DEFAULT for CMU_HFXOCTRL1

Definition at line 526 of file efm32gg12b_cmu.h .

#define CMU_HFXOCTRL1_PEAKDETTHR_THR0 ( _CMU_HFXOCTRL1_PEAKDETTHR_THR0 << 12)

Shifted mode THR0 for CMU_HFXOCTRL1

Definition at line 524 of file efm32gg12b_cmu.h .

#define CMU_HFXOCTRL1_PEAKDETTHR_THR1 ( _CMU_HFXOCTRL1_PEAKDETTHR_THR1 << 12)

Shifted mode THR1 for CMU_HFXOCTRL1

Definition at line 525 of file efm32gg12b_cmu.h .

#define CMU_HFXOCTRL1_PEAKDETTHR_THR2 ( _CMU_HFXOCTRL1_PEAKDETTHR_THR2 << 12)

Shifted mode THR2 for CMU_HFXOCTRL1

Definition at line 527 of file efm32gg12b_cmu.h .

#define CMU_HFXOCTRL1_PEAKDETTHR_THR3 ( _CMU_HFXOCTRL1_PEAKDETTHR_THR3 << 12)

Shifted mode THR3 for CMU_HFXOCTRL1

Definition at line 528 of file efm32gg12b_cmu.h .

#define CMU_HFXOCTRL1_PEAKDETTHR_THR4 ( _CMU_HFXOCTRL1_PEAKDETTHR_THR4 << 12)

Shifted mode THR4 for CMU_HFXOCTRL1

Definition at line 529 of file efm32gg12b_cmu.h .

#define CMU_HFXOCTRL1_PEAKDETTHR_THR5 ( _CMU_HFXOCTRL1_PEAKDETTHR_THR5 << 12)

Shifted mode THR5 for CMU_HFXOCTRL1

Definition at line 530 of file efm32gg12b_cmu.h .

#define CMU_HFXOCTRL1_PEAKDETTHR_THR6 ( _CMU_HFXOCTRL1_PEAKDETTHR_THR6 << 12)

Shifted mode THR6 for CMU_HFXOCTRL1

Definition at line 531 of file efm32gg12b_cmu.h .

#define CMU_HFXOCTRL1_PEAKDETTHR_THR7 ( _CMU_HFXOCTRL1_PEAKDETTHR_THR7 << 12)

Shifted mode THR7 for CMU_HFXOCTRL1

Definition at line 532 of file efm32gg12b_cmu.h .

#define CMU_HFXOCTRL_AUTOSTARTEM0EM1 (0x1UL << 28)

Automatically Start of HFXO Upon EM0/EM1 Entry From EM2/EM3

Definition at line 499 of file efm32gg12b_cmu.h .

Referenced by CMU_HFXOAutostartEnable() .

#define CMU_HFXOCTRL_AUTOSTARTEM0EM1_DEFAULT ( _CMU_HFXOCTRL_AUTOSTARTEM0EM1_DEFAULT << 28)

Shifted mode DEFAULT for CMU_HFXOCTRL

Definition at line 503 of file efm32gg12b_cmu.h .

#define CMU_HFXOCTRL_AUTOSTARTSELEM0EM1 (0x1UL << 29)

Automatically Start and Select of HFXO Upon EM0/EM1 Entry From EM2/EM3

Definition at line 504 of file efm32gg12b_cmu.h .

Referenced by CMU_HFXOAutostartEnable() , and EMU_EM23Init() .

#define CMU_HFXOCTRL_AUTOSTARTSELEM0EM1_DEFAULT ( _CMU_HFXOCTRL_AUTOSTARTSELEM0EM1_DEFAULT << 29)

Shifted mode DEFAULT for CMU_HFXOCTRL

Definition at line 508 of file efm32gg12b_cmu.h .

#define CMU_HFXOCTRL_HFXOX2EN (0x1UL << 3)

Enable Double Frequency on HFXOX2 Clock (compared to HFXO Clock)

Definition at line 462 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockSelectSet() , and CMU_HFXOInit() .

#define CMU_HFXOCTRL_HFXOX2EN_DEFAULT ( _CMU_HFXOCTRL_HFXOX2EN_DEFAULT << 3)

Shifted mode DEFAULT for CMU_HFXOCTRL

Definition at line 466 of file efm32gg12b_cmu.h .

#define CMU_HFXOCTRL_LFTIMEOUT_0CYCLES ( _CMU_HFXOCTRL_LFTIMEOUT_0CYCLES << 24)

Shifted mode 0CYCLES for CMU_HFXOCTRL

Definition at line 491 of file efm32gg12b_cmu.h .

#define CMU_HFXOCTRL_LFTIMEOUT_16CYCLES ( _CMU_HFXOCTRL_LFTIMEOUT_16CYCLES << 24)

Shifted mode 16CYCLES for CMU_HFXOCTRL

Definition at line 494 of file efm32gg12b_cmu.h .

#define CMU_HFXOCTRL_LFTIMEOUT_1KCYCLES ( _CMU_HFXOCTRL_LFTIMEOUT_1KCYCLES << 24)

Shifted mode 1KCYCLES for CMU_HFXOCTRL

Definition at line 497 of file efm32gg12b_cmu.h .

#define CMU_HFXOCTRL_LFTIMEOUT_2CYCLES ( _CMU_HFXOCTRL_LFTIMEOUT_2CYCLES << 24)

Shifted mode 2CYCLES for CMU_HFXOCTRL

Definition at line 492 of file efm32gg12b_cmu.h .

#define CMU_HFXOCTRL_LFTIMEOUT_32CYCLES ( _CMU_HFXOCTRL_LFTIMEOUT_32CYCLES << 24)

Shifted mode 32CYCLES for CMU_HFXOCTRL

Definition at line 495 of file efm32gg12b_cmu.h .

#define CMU_HFXOCTRL_LFTIMEOUT_4CYCLES ( _CMU_HFXOCTRL_LFTIMEOUT_4CYCLES << 24)

Shifted mode 4CYCLES for CMU_HFXOCTRL

Definition at line 493 of file efm32gg12b_cmu.h .

#define CMU_HFXOCTRL_LFTIMEOUT_4KCYCLES ( _CMU_HFXOCTRL_LFTIMEOUT_4KCYCLES << 24)

Shifted mode 4KCYCLES for CMU_HFXOCTRL

Definition at line 498 of file efm32gg12b_cmu.h .

#define CMU_HFXOCTRL_LFTIMEOUT_64CYCLES ( _CMU_HFXOCTRL_LFTIMEOUT_64CYCLES << 24)

Shifted mode 64CYCLES for CMU_HFXOCTRL

Definition at line 496 of file efm32gg12b_cmu.h .

#define CMU_HFXOCTRL_LFTIMEOUT_DEFAULT ( _CMU_HFXOCTRL_LFTIMEOUT_DEFAULT << 24)

Shifted mode DEFAULT for CMU_HFXOCTRL

Definition at line 490 of file efm32gg12b_cmu.h .

#define CMU_HFXOCTRL_MODE_ACBUFEXTCLK ( _CMU_HFXOCTRL_MODE_ACBUFEXTCLK << 0)

Shifted mode ACBUFEXTCLK for CMU_HFXOCTRL

Definition at line 459 of file efm32gg12b_cmu.h .

Referenced by CMU_HFXOInit() .

#define CMU_HFXOCTRL_MODE_DCBUFEXTCLK ( _CMU_HFXOCTRL_MODE_DCBUFEXTCLK << 0)

Shifted mode DCBUFEXTCLK for CMU_HFXOCTRL

Definition at line 460 of file efm32gg12b_cmu.h .

#define CMU_HFXOCTRL_MODE_DEFAULT ( _CMU_HFXOCTRL_MODE_DEFAULT << 0)

Shifted mode DEFAULT for CMU_HFXOCTRL

Definition at line 457 of file efm32gg12b_cmu.h .

#define CMU_HFXOCTRL_MODE_DIGEXTCLK ( _CMU_HFXOCTRL_MODE_DIGEXTCLK << 0)

Shifted mode DIGEXTCLK for CMU_HFXOCTRL

Definition at line 461 of file efm32gg12b_cmu.h .

Referenced by CMU_HFXOInit() , and CMU_OscillatorEnable() .

#define CMU_HFXOCTRL_MODE_XTAL ( _CMU_HFXOCTRL_MODE_XTAL << 0)

Shifted mode XTAL for CMU_HFXOCTRL

Definition at line 458 of file efm32gg12b_cmu.h .

Referenced by CMU_HFXOInit() .

#define CMU_HFXOCTRL_PEAKDETMODE_AUTOCMD ( _CMU_HFXOCTRL_PEAKDETMODE_AUTOCMD << 4)

Shifted mode AUTOCMD for CMU_HFXOCTRL

Definition at line 476 of file efm32gg12b_cmu.h .

#define CMU_HFXOCTRL_PEAKDETMODE_CMD ( _CMU_HFXOCTRL_PEAKDETMODE_CMD << 4)

Shifted mode CMD for CMU_HFXOCTRL

Definition at line 477 of file efm32gg12b_cmu.h .

#define CMU_HFXOCTRL_PEAKDETMODE_DEFAULT ( _CMU_HFXOCTRL_PEAKDETMODE_DEFAULT << 4)

Shifted mode DEFAULT for CMU_HFXOCTRL

Definition at line 474 of file efm32gg12b_cmu.h .

#define CMU_HFXOCTRL_PEAKDETMODE_MANUAL ( _CMU_HFXOCTRL_PEAKDETMODE_MANUAL << 4)

Shifted mode MANUAL for CMU_HFXOCTRL

Definition at line 478 of file efm32gg12b_cmu.h .

#define CMU_HFXOCTRL_PEAKDETMODE_ONCECMD ( _CMU_HFXOCTRL_PEAKDETMODE_ONCECMD << 4)

Shifted mode ONCECMD for CMU_HFXOCTRL

Definition at line 475 of file efm32gg12b_cmu.h .

#define CMU_HFXOSTARTUPCTRL_CTUNE_DEFAULT ( _CMU_HFXOSTARTUPCTRL_CTUNE_DEFAULT << 11)

Shifted mode DEFAULT for CMU_HFXOSTARTUPCTRL

Definition at line 544 of file efm32gg12b_cmu.h .

#define CMU_HFXOSTARTUPCTRL_IBTRIMXOCORE_DEFAULT ( _CMU_HFXOSTARTUPCTRL_IBTRIMXOCORE_DEFAULT << 0)

Shifted mode DEFAULT for CMU_HFXOSTARTUPCTRL

Definition at line 540 of file efm32gg12b_cmu.h .

#define CMU_HFXOSTEADYSTATECTRL_CTUNE_DEFAULT ( _CMU_HFXOSTEADYSTATECTRL_CTUNE_DEFAULT << 11)

Shifted mode DEFAULT for CMU_HFXOSTEADYSTATECTRL

Definition at line 556 of file efm32gg12b_cmu.h .

#define CMU_HFXOSTEADYSTATECTRL_IBTRIMXOCORE_DEFAULT ( _CMU_HFXOSTEADYSTATECTRL_IBTRIMXOCORE_DEFAULT << 0)

Shifted mode DEFAULT for CMU_HFXOSTEADYSTATECTRL

Definition at line 552 of file efm32gg12b_cmu.h .

#define CMU_HFXOSTEADYSTATECTRL_PEAKDETEN (0x1UL << 26)

Enables Oscillator Peak Detectors

Definition at line 557 of file efm32gg12b_cmu.h .

#define CMU_HFXOSTEADYSTATECTRL_PEAKDETEN_DEFAULT ( _CMU_HFXOSTEADYSTATECTRL_PEAKDETEN_DEFAULT << 26)

Shifted mode DEFAULT for CMU_HFXOSTEADYSTATECTRL

Definition at line 561 of file efm32gg12b_cmu.h .

#define CMU_HFXOSTEADYSTATECTRL_PEAKMONEN (0x1UL << 27)

Automatically Perform Peak Monitoring Algorithm on Every Rising Edge of ULFRCO

Definition at line 562 of file efm32gg12b_cmu.h .

#define CMU_HFXOSTEADYSTATECTRL_PEAKMONEN_DEFAULT ( _CMU_HFXOSTEADYSTATECTRL_PEAKMONEN_DEFAULT << 27)

Shifted mode DEFAULT for CMU_HFXOSTEADYSTATECTRL

Definition at line 566 of file efm32gg12b_cmu.h .

#define CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_128CYCLES ( _CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_128CYCLES << 12)

Shifted mode 128CYCLES for CMU_HFXOTIMEOUTCTRL

Definition at line 662 of file efm32gg12b_cmu.h .

#define CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_128KCYCLES ( _CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_128KCYCLES << 12)

Shifted mode 128KCYCLES for CMU_HFXOTIMEOUTCTRL

Definition at line 672 of file efm32gg12b_cmu.h .

#define CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_16CYCLES ( _CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_16CYCLES << 12)

Shifted mode 16CYCLES for CMU_HFXOTIMEOUTCTRL

Definition at line 659 of file efm32gg12b_cmu.h .

#define CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_16KCYCLES ( _CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_16KCYCLES << 12)

Shifted mode 16KCYCLES for CMU_HFXOTIMEOUTCTRL

Definition at line 668 of file efm32gg12b_cmu.h .

#define CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_1KCYCLES ( _CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_1KCYCLES << 12)

Shifted mode 1KCYCLES for CMU_HFXOTIMEOUTCTRL

Definition at line 664 of file efm32gg12b_cmu.h .

#define CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_256CYCLES ( _CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_256CYCLES << 12)

Shifted mode 256CYCLES for CMU_HFXOTIMEOUTCTRL

Definition at line 663 of file efm32gg12b_cmu.h .

#define CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_2CYCLES ( _CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_2CYCLES << 12)

Shifted mode 2CYCLES for CMU_HFXOTIMEOUTCTRL

Definition at line 657 of file efm32gg12b_cmu.h .

#define CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_2KCYCLES ( _CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_2KCYCLES << 12)

Shifted mode 2KCYCLES for CMU_HFXOTIMEOUTCTRL

Definition at line 665 of file efm32gg12b_cmu.h .

#define CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_32CYCLES ( _CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_32CYCLES << 12)

Shifted mode 32CYCLES for CMU_HFXOTIMEOUTCTRL

Definition at line 660 of file efm32gg12b_cmu.h .

#define CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_32KCYCLES ( _CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_32KCYCLES << 12)

Shifted mode 32KCYCLES for CMU_HFXOTIMEOUTCTRL

Definition at line 669 of file efm32gg12b_cmu.h .

#define CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_4CYCLES ( _CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_4CYCLES << 12)

Shifted mode 4CYCLES for CMU_HFXOTIMEOUTCTRL

Definition at line 658 of file efm32gg12b_cmu.h .

#define CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_4KCYCLES ( _CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_4KCYCLES << 12)

Shifted mode 4KCYCLES for CMU_HFXOTIMEOUTCTRL

Definition at line 666 of file efm32gg12b_cmu.h .

#define CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_64CYCLES ( _CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_64CYCLES << 12)

Shifted mode 64CYCLES for CMU_HFXOTIMEOUTCTRL

Definition at line 661 of file efm32gg12b_cmu.h .

#define CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_64KCYCLES ( _CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_64KCYCLES << 12)

Shifted mode 64KCYCLES for CMU_HFXOTIMEOUTCTRL

Definition at line 671 of file efm32gg12b_cmu.h .

#define CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_8KCYCLES ( _CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_8KCYCLES << 12)

Shifted mode 8KCYCLES for CMU_HFXOTIMEOUTCTRL

Definition at line 667 of file efm32gg12b_cmu.h .

#define CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_DEFAULT ( _CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_DEFAULT << 12)

Shifted mode DEFAULT for CMU_HFXOTIMEOUTCTRL

Definition at line 670 of file efm32gg12b_cmu.h .

#define CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_128CYCLES ( _CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_128CYCLES << 0)

Shifted mode 128CYCLES for CMU_HFXOTIMEOUTCTRL

Definition at line 594 of file efm32gg12b_cmu.h .

#define CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_128KCYCLES ( _CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_128KCYCLES << 0)

Shifted mode 128KCYCLES for CMU_HFXOTIMEOUTCTRL

Definition at line 604 of file efm32gg12b_cmu.h .

#define CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_16CYCLES ( _CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_16CYCLES << 0)

Shifted mode 16CYCLES for CMU_HFXOTIMEOUTCTRL

Definition at line 591 of file efm32gg12b_cmu.h .

#define CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_16KCYCLES ( _CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_16KCYCLES << 0)

Shifted mode 16KCYCLES for CMU_HFXOTIMEOUTCTRL

Definition at line 600 of file efm32gg12b_cmu.h .

#define CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_1KCYCLES ( _CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_1KCYCLES << 0)

Shifted mode 1KCYCLES for CMU_HFXOTIMEOUTCTRL

Definition at line 596 of file efm32gg12b_cmu.h .

#define CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_256CYCLES ( _CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_256CYCLES << 0)

Shifted mode 256CYCLES for CMU_HFXOTIMEOUTCTRL

Definition at line 595 of file efm32gg12b_cmu.h .

#define CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_2CYCLES ( _CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_2CYCLES << 0)

Shifted mode 2CYCLES for CMU_HFXOTIMEOUTCTRL

Definition at line 589 of file efm32gg12b_cmu.h .

#define CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_2KCYCLES ( _CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_2KCYCLES << 0)

Shifted mode 2KCYCLES for CMU_HFXOTIMEOUTCTRL

Definition at line 597 of file efm32gg12b_cmu.h .

#define CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_32CYCLES ( _CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_32CYCLES << 0)

Shifted mode 32CYCLES for CMU_HFXOTIMEOUTCTRL

Definition at line 592 of file efm32gg12b_cmu.h .

#define CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_32KCYCLES ( _CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_32KCYCLES << 0)

Shifted mode 32KCYCLES for CMU_HFXOTIMEOUTCTRL

Definition at line 601 of file efm32gg12b_cmu.h .

#define CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_4CYCLES ( _CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_4CYCLES << 0)

Shifted mode 4CYCLES for CMU_HFXOTIMEOUTCTRL

Definition at line 590 of file efm32gg12b_cmu.h .

#define CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_4KCYCLES ( _CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_4KCYCLES << 0)

Shifted mode 4KCYCLES for CMU_HFXOTIMEOUTCTRL

Definition at line 598 of file efm32gg12b_cmu.h .

#define CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_64CYCLES ( _CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_64CYCLES << 0)

Shifted mode 64CYCLES for CMU_HFXOTIMEOUTCTRL

Definition at line 593 of file efm32gg12b_cmu.h .

#define CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_64KCYCLES ( _CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_64KCYCLES << 0)

Shifted mode 64KCYCLES for CMU_HFXOTIMEOUTCTRL

Definition at line 602 of file efm32gg12b_cmu.h .

#define CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_8KCYCLES ( _CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_8KCYCLES << 0)

Shifted mode 8KCYCLES for CMU_HFXOTIMEOUTCTRL

Definition at line 599 of file efm32gg12b_cmu.h .

#define CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_DEFAULT ( _CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_DEFAULT << 0)

Shifted mode DEFAULT for CMU_HFXOTIMEOUTCTRL

Definition at line 603 of file efm32gg12b_cmu.h .

#define CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_128CYCLES ( _CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_128CYCLES << 4)

Shifted mode 128CYCLES for CMU_HFXOTIMEOUTCTRL

Definition at line 628 of file efm32gg12b_cmu.h .

#define CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_128KCYCLES ( _CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_128KCYCLES << 4)

Shifted mode 128KCYCLES for CMU_HFXOTIMEOUTCTRL

Definition at line 638 of file efm32gg12b_cmu.h .

#define CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_16CYCLES ( _CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_16CYCLES << 4)

Shifted mode 16CYCLES for CMU_HFXOTIMEOUTCTRL

Definition at line 625 of file efm32gg12b_cmu.h .

#define CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_16KCYCLES ( _CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_16KCYCLES << 4)

Shifted mode 16KCYCLES for CMU_HFXOTIMEOUTCTRL

Definition at line 635 of file efm32gg12b_cmu.h .

#define CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_1KCYCLES ( _CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_1KCYCLES << 4)

Shifted mode 1KCYCLES for CMU_HFXOTIMEOUTCTRL

Definition at line 630 of file efm32gg12b_cmu.h .

#define CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_256CYCLES ( _CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_256CYCLES << 4)

Shifted mode 256CYCLES for CMU_HFXOTIMEOUTCTRL

Definition at line 629 of file efm32gg12b_cmu.h .

#define CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_2CYCLES ( _CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_2CYCLES << 4)

Shifted mode 2CYCLES for CMU_HFXOTIMEOUTCTRL

Definition at line 623 of file efm32gg12b_cmu.h .

#define CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_2KCYCLES ( _CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_2KCYCLES << 4)

Shifted mode 2KCYCLES for CMU_HFXOTIMEOUTCTRL

Definition at line 632 of file efm32gg12b_cmu.h .

#define CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_32CYCLES ( _CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_32CYCLES << 4)

Shifted mode 32CYCLES for CMU_HFXOTIMEOUTCTRL

Definition at line 626 of file efm32gg12b_cmu.h .

#define CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_32KCYCLES ( _CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_32KCYCLES << 4)

Shifted mode 32KCYCLES for CMU_HFXOTIMEOUTCTRL

Definition at line 636 of file efm32gg12b_cmu.h .

#define CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_4CYCLES ( _CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_4CYCLES << 4)

Shifted mode 4CYCLES for CMU_HFXOTIMEOUTCTRL

Definition at line 624 of file efm32gg12b_cmu.h .

#define CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_4KCYCLES ( _CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_4KCYCLES << 4)

Shifted mode 4KCYCLES for CMU_HFXOTIMEOUTCTRL

Definition at line 633 of file efm32gg12b_cmu.h .

#define CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_64CYCLES ( _CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_64CYCLES << 4)

Shifted mode 64CYCLES for CMU_HFXOTIMEOUTCTRL

Definition at line 627 of file efm32gg12b_cmu.h .

#define CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_64KCYCLES ( _CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_64KCYCLES << 4)

Shifted mode 64KCYCLES for CMU_HFXOTIMEOUTCTRL

Definition at line 637 of file efm32gg12b_cmu.h .

#define CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_8KCYCLES ( _CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_8KCYCLES << 4)

Shifted mode 8KCYCLES for CMU_HFXOTIMEOUTCTRL

Definition at line 634 of file efm32gg12b_cmu.h .

#define CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_DEFAULT ( _CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_DEFAULT << 4)

Shifted mode DEFAULT for CMU_HFXOTIMEOUTCTRL

Definition at line 631 of file efm32gg12b_cmu.h .

#define CMU_HFXOTRIMSTATUS_IBTRIMXOCORE_DEFAULT ( _CMU_HFXOTRIMSTATUS_IBTRIMXOCORE_DEFAULT << 0)

Shifted mode DEFAULT for CMU_HFXOTRIMSTATUS

Definition at line 1260 of file efm32gg12b_cmu.h .

#define CMU_HFXOTRIMSTATUS_IBTRIMXOCOREMON_DEFAULT ( _CMU_HFXOTRIMSTATUS_IBTRIMXOCOREMON_DEFAULT << 16)

Shifted mode DEFAULT for CMU_HFXOTRIMSTATUS

Definition at line 1264 of file efm32gg12b_cmu.h .

#define CMU_HFXOTRIMSTATUS_MONVALID (0x1UL << 31)

Peak Detection Algorithm or Peak Monitoring Algorithm Found a Value for IBTRIMXOCOREMON

Definition at line 1270 of file efm32gg12b_cmu.h .

#define CMU_HFXOTRIMSTATUS_MONVALID_DEFAULT ( _CMU_HFXOTRIMSTATUS_MONVALID_DEFAULT << 31)

Shifted mode DEFAULT for CMU_HFXOTRIMSTATUS

Definition at line 1274 of file efm32gg12b_cmu.h .

#define CMU_HFXOTRIMSTATUS_VALID (0x1UL << 30)

Peak Detection Algorithm Found a Value for IBTRIMXOCORE

Definition at line 1265 of file efm32gg12b_cmu.h .

#define CMU_HFXOTRIMSTATUS_VALID_DEFAULT ( _CMU_HFXOTRIMSTATUS_VALID_DEFAULT << 30)

Shifted mode DEFAULT for CMU_HFXOTRIMSTATUS

Definition at line 1269 of file efm32gg12b_cmu.h .

#define CMU_IEN_AUXHFRCORDY (0x1UL << 4)

AUXHFRCORDY Interrupt Enable

Definition at line 1611 of file efm32gg12b_cmu.h .

#define CMU_IEN_AUXHFRCORDY_DEFAULT ( _CMU_IEN_AUXHFRCORDY_DEFAULT << 4)

Shifted mode DEFAULT for CMU_IEN

Definition at line 1615 of file efm32gg12b_cmu.h .

#define CMU_IEN_CALOF (0x1UL << 6)

CALOF Interrupt Enable

Definition at line 1621 of file efm32gg12b_cmu.h .

#define CMU_IEN_CALOF_DEFAULT ( _CMU_IEN_CALOF_DEFAULT << 6)

Shifted mode DEFAULT for CMU_IEN

Definition at line 1625 of file efm32gg12b_cmu.h .

#define CMU_IEN_CALRDY (0x1UL << 5)

CALRDY Interrupt Enable

Definition at line 1616 of file efm32gg12b_cmu.h .

#define CMU_IEN_CALRDY_DEFAULT ( _CMU_IEN_CALRDY_DEFAULT << 5)

Shifted mode DEFAULT for CMU_IEN

Definition at line 1620 of file efm32gg12b_cmu.h .

#define CMU_IEN_CMUERR (0x1UL << 31)

CMUERR Interrupt Enable

Definition at line 1686 of file efm32gg12b_cmu.h .

#define CMU_IEN_CMUERR_DEFAULT ( _CMU_IEN_CMUERR_DEFAULT << 31)

Shifted mode DEFAULT for CMU_IEN

Definition at line 1690 of file efm32gg12b_cmu.h .

#define CMU_IEN_DPLLLOCKFAILHIGH (0x1UL << 17)

DPLLLOCKFAILHIGH Interrupt Enable

Definition at line 1666 of file efm32gg12b_cmu.h .

#define CMU_IEN_DPLLLOCKFAILHIGH_DEFAULT ( _CMU_IEN_DPLLLOCKFAILHIGH_DEFAULT << 17)

Shifted mode DEFAULT for CMU_IEN

Definition at line 1670 of file efm32gg12b_cmu.h .

#define CMU_IEN_DPLLLOCKFAILLOW (0x1UL << 16)

DPLLLOCKFAILLOW Interrupt Enable

Definition at line 1661 of file efm32gg12b_cmu.h .

#define CMU_IEN_DPLLLOCKFAILLOW_DEFAULT ( _CMU_IEN_DPLLLOCKFAILLOW_DEFAULT << 16)

Shifted mode DEFAULT for CMU_IEN

Definition at line 1665 of file efm32gg12b_cmu.h .

#define CMU_IEN_DPLLRDY (0x1UL << 15)

DPLLRDY Interrupt Enable

Definition at line 1656 of file efm32gg12b_cmu.h .

#define CMU_IEN_DPLLRDY_DEFAULT ( _CMU_IEN_DPLLRDY_DEFAULT << 15)

Shifted mode DEFAULT for CMU_IEN

Definition at line 1660 of file efm32gg12b_cmu.h .

#define CMU_IEN_HFRCODIS (0x1UL << 13)

HFRCODIS Interrupt Enable

Definition at line 1646 of file efm32gg12b_cmu.h .

#define CMU_IEN_HFRCODIS_DEFAULT ( _CMU_IEN_HFRCODIS_DEFAULT << 13)

Shifted mode DEFAULT for CMU_IEN

Definition at line 1650 of file efm32gg12b_cmu.h .

#define CMU_IEN_HFRCORDY (0x1UL << 0)

HFRCORDY Interrupt Enable

Definition at line 1591 of file efm32gg12b_cmu.h .

#define CMU_IEN_HFRCORDY_DEFAULT ( _CMU_IEN_HFRCORDY_DEFAULT << 0)

Shifted mode DEFAULT for CMU_IEN

Definition at line 1595 of file efm32gg12b_cmu.h .

#define CMU_IEN_HFXOAUTOSW (0x1UL << 9)

HFXOAUTOSW Interrupt Enable

Definition at line 1636 of file efm32gg12b_cmu.h .

#define CMU_IEN_HFXOAUTOSW_DEFAULT ( _CMU_IEN_HFXOAUTOSW_DEFAULT << 9)

Shifted mode DEFAULT for CMU_IEN

Definition at line 1640 of file efm32gg12b_cmu.h .

#define CMU_IEN_HFXODISERR (0x1UL << 8)

HFXODISERR Interrupt Enable

Definition at line 1631 of file efm32gg12b_cmu.h .

#define CMU_IEN_HFXODISERR_DEFAULT ( _CMU_IEN_HFXODISERR_DEFAULT << 8)

Shifted mode DEFAULT for CMU_IEN

Definition at line 1635 of file efm32gg12b_cmu.h .

#define CMU_IEN_HFXOPEAKDETRDY (0x1UL << 11)

HFXOPEAKDETRDY Interrupt Enable

Definition at line 1641 of file efm32gg12b_cmu.h .

#define CMU_IEN_HFXOPEAKDETRDY_DEFAULT ( _CMU_IEN_HFXOPEAKDETRDY_DEFAULT << 11)

Shifted mode DEFAULT for CMU_IEN

Definition at line 1645 of file efm32gg12b_cmu.h .

#define CMU_IEN_HFXORDY (0x1UL << 1)

HFXORDY Interrupt Enable

Definition at line 1596 of file efm32gg12b_cmu.h .

#define CMU_IEN_HFXORDY_DEFAULT ( _CMU_IEN_HFXORDY_DEFAULT << 1)

Shifted mode DEFAULT for CMU_IEN

Definition at line 1600 of file efm32gg12b_cmu.h .

#define CMU_IEN_LFRCOEDGE (0x1UL << 28)

LFRCOEDGE Interrupt Enable

Definition at line 1676 of file efm32gg12b_cmu.h .

#define CMU_IEN_LFRCOEDGE_DEFAULT ( _CMU_IEN_LFRCOEDGE_DEFAULT << 28)

Shifted mode DEFAULT for CMU_IEN

Definition at line 1680 of file efm32gg12b_cmu.h .

#define CMU_IEN_LFRCORDY (0x1UL << 2)

LFRCORDY Interrupt Enable

Definition at line 1601 of file efm32gg12b_cmu.h .

#define CMU_IEN_LFRCORDY_DEFAULT ( _CMU_IEN_LFRCORDY_DEFAULT << 2)

Shifted mode DEFAULT for CMU_IEN

Definition at line 1605 of file efm32gg12b_cmu.h .

#define CMU_IEN_LFTIMEOUTERR (0x1UL << 14)

LFTIMEOUTERR Interrupt Enable

Definition at line 1651 of file efm32gg12b_cmu.h .

#define CMU_IEN_LFTIMEOUTERR_DEFAULT ( _CMU_IEN_LFTIMEOUTERR_DEFAULT << 14)

Shifted mode DEFAULT for CMU_IEN

Definition at line 1655 of file efm32gg12b_cmu.h .

#define CMU_IEN_LFXOEDGE (0x1UL << 27)

LFXOEDGE Interrupt Enable

Definition at line 1671 of file efm32gg12b_cmu.h .

#define CMU_IEN_LFXOEDGE_DEFAULT ( _CMU_IEN_LFXOEDGE_DEFAULT << 27)

Shifted mode DEFAULT for CMU_IEN

Definition at line 1675 of file efm32gg12b_cmu.h .

#define CMU_IEN_LFXORDY (0x1UL << 3)

LFXORDY Interrupt Enable

Definition at line 1606 of file efm32gg12b_cmu.h .

#define CMU_IEN_LFXORDY_DEFAULT ( _CMU_IEN_LFXORDY_DEFAULT << 3)

Shifted mode DEFAULT for CMU_IEN

Definition at line 1610 of file efm32gg12b_cmu.h .

#define CMU_IEN_ULFRCOEDGE (0x1UL << 29)

ULFRCOEDGE Interrupt Enable

Definition at line 1681 of file efm32gg12b_cmu.h .

#define CMU_IEN_ULFRCOEDGE_DEFAULT ( _CMU_IEN_ULFRCOEDGE_DEFAULT << 29)

Shifted mode DEFAULT for CMU_IEN

Definition at line 1685 of file efm32gg12b_cmu.h .

#define CMU_IEN_USHFRCORDY (0x1UL << 7)

USHFRCORDY Interrupt Enable

Definition at line 1626 of file efm32gg12b_cmu.h .

#define CMU_IEN_USHFRCORDY_DEFAULT ( _CMU_IEN_USHFRCORDY_DEFAULT << 7)

Shifted mode DEFAULT for CMU_IEN

Definition at line 1630 of file efm32gg12b_cmu.h .

#define CMU_IF_AUXHFRCORDY (0x1UL << 4)

AUXHFRCO Ready Interrupt Flag

Definition at line 1299 of file efm32gg12b_cmu.h .

#define CMU_IF_AUXHFRCORDY_DEFAULT ( _CMU_IF_AUXHFRCORDY_DEFAULT << 4)

Shifted mode DEFAULT for CMU_IF

Definition at line 1303 of file efm32gg12b_cmu.h .

#define CMU_IF_CALOF (0x1UL << 6)

Calibration Overflow Interrupt Flag

Definition at line 1309 of file efm32gg12b_cmu.h .

#define CMU_IF_CALOF_DEFAULT ( _CMU_IF_CALOF_DEFAULT << 6)

Shifted mode DEFAULT for CMU_IF

Definition at line 1313 of file efm32gg12b_cmu.h .

#define CMU_IF_CALRDY (0x1UL << 5)

Calibration Ready Interrupt Flag

Definition at line 1304 of file efm32gg12b_cmu.h .

#define CMU_IF_CALRDY_DEFAULT ( _CMU_IF_CALRDY_DEFAULT << 5)

Shifted mode DEFAULT for CMU_IF

Definition at line 1308 of file efm32gg12b_cmu.h .

#define CMU_IF_CMUERR (0x1UL << 31)

CMU Error Interrupt Flag

Definition at line 1374 of file efm32gg12b_cmu.h .

#define CMU_IF_CMUERR_DEFAULT ( _CMU_IF_CMUERR_DEFAULT << 31)

Shifted mode DEFAULT for CMU_IF

Definition at line 1378 of file efm32gg12b_cmu.h .

#define CMU_IF_DPLLLOCKFAILHIGH (0x1UL << 17)

DPLL Lock Failure Low Interrupt Flag

Definition at line 1354 of file efm32gg12b_cmu.h .

Referenced by CMU_DPLLLock() .

#define CMU_IF_DPLLLOCKFAILHIGH_DEFAULT ( _CMU_IF_DPLLLOCKFAILHIGH_DEFAULT << 17)

Shifted mode DEFAULT for CMU_IF

Definition at line 1358 of file efm32gg12b_cmu.h .

#define CMU_IF_DPLLLOCKFAILLOW (0x1UL << 16)

DPLL Lock Failure Low Interrupt Flag

Definition at line 1349 of file efm32gg12b_cmu.h .

Referenced by CMU_DPLLLock() .

#define CMU_IF_DPLLLOCKFAILLOW_DEFAULT ( _CMU_IF_DPLLLOCKFAILLOW_DEFAULT << 16)

Shifted mode DEFAULT for CMU_IF

Definition at line 1353 of file efm32gg12b_cmu.h .

#define CMU_IF_DPLLRDY (0x1UL << 15)

DPLL Lock Interrupt Flag

Definition at line 1344 of file efm32gg12b_cmu.h .

Referenced by CMU_DPLLLock() .

#define CMU_IF_DPLLRDY_DEFAULT ( _CMU_IF_DPLLRDY_DEFAULT << 15)

Shifted mode DEFAULT for CMU_IF

Definition at line 1348 of file efm32gg12b_cmu.h .

#define CMU_IF_HFRCODIS (0x1UL << 13)

HFRCO Disable Interrupt Flag

Definition at line 1334 of file efm32gg12b_cmu.h .

#define CMU_IF_HFRCODIS_DEFAULT ( _CMU_IF_HFRCODIS_DEFAULT << 13)

Shifted mode DEFAULT for CMU_IF

Definition at line 1338 of file efm32gg12b_cmu.h .

#define CMU_IF_HFRCORDY (0x1UL << 0)

HFRCO Ready Interrupt Flag

Definition at line 1279 of file efm32gg12b_cmu.h .

#define CMU_IF_HFRCORDY_DEFAULT ( _CMU_IF_HFRCORDY_DEFAULT << 0)

Shifted mode DEFAULT for CMU_IF

Definition at line 1283 of file efm32gg12b_cmu.h .

#define CMU_IF_HFXOAUTOSW (0x1UL << 9)

HFXO Automatic Switch Interrupt Flag

Definition at line 1324 of file efm32gg12b_cmu.h .

#define CMU_IF_HFXOAUTOSW_DEFAULT ( _CMU_IF_HFXOAUTOSW_DEFAULT << 9)

Shifted mode DEFAULT for CMU_IF

Definition at line 1328 of file efm32gg12b_cmu.h .

#define CMU_IF_HFXODISERR (0x1UL << 8)

HFXO Disable Error Interrupt Flag

Definition at line 1319 of file efm32gg12b_cmu.h .

#define CMU_IF_HFXODISERR_DEFAULT ( _CMU_IF_HFXODISERR_DEFAULT << 8)

Shifted mode DEFAULT for CMU_IF

Definition at line 1323 of file efm32gg12b_cmu.h .

#define CMU_IF_HFXOPEAKDETRDY (0x1UL << 11)

HFXO Automatic Peak Detection Ready Interrupt Flag

Definition at line 1329 of file efm32gg12b_cmu.h .

#define CMU_IF_HFXOPEAKDETRDY_DEFAULT ( _CMU_IF_HFXOPEAKDETRDY_DEFAULT << 11)

Shifted mode DEFAULT for CMU_IF

Definition at line 1333 of file efm32gg12b_cmu.h .

#define CMU_IF_HFXORDY (0x1UL << 1)

HFXO Ready Interrupt Flag

Definition at line 1284 of file efm32gg12b_cmu.h .

#define CMU_IF_HFXORDY_DEFAULT ( _CMU_IF_HFXORDY_DEFAULT << 1)

Shifted mode DEFAULT for CMU_IF

Definition at line 1288 of file efm32gg12b_cmu.h .

#define CMU_IF_LFRCOEDGE (0x1UL << 28)

LFRCO Clock Edge Detected Interrupt Flag

Definition at line 1364 of file efm32gg12b_cmu.h .

#define CMU_IF_LFRCOEDGE_DEFAULT ( _CMU_IF_LFRCOEDGE_DEFAULT << 28)

Shifted mode DEFAULT for CMU_IF

Definition at line 1368 of file efm32gg12b_cmu.h .

#define CMU_IF_LFRCORDY (0x1UL << 2)

LFRCO Ready Interrupt Flag

Definition at line 1289 of file efm32gg12b_cmu.h .

#define CMU_IF_LFRCORDY_DEFAULT ( _CMU_IF_LFRCORDY_DEFAULT << 2)

Shifted mode DEFAULT for CMU_IF

Definition at line 1293 of file efm32gg12b_cmu.h .

#define CMU_IF_LFTIMEOUTERR (0x1UL << 14)

Low Frequency Timeout Error Interrupt Flag

Definition at line 1339 of file efm32gg12b_cmu.h .

#define CMU_IF_LFTIMEOUTERR_DEFAULT ( _CMU_IF_LFTIMEOUTERR_DEFAULT << 14)

Shifted mode DEFAULT for CMU_IF

Definition at line 1343 of file efm32gg12b_cmu.h .

#define CMU_IF_LFXOEDGE (0x1UL << 27)

LFXO Clock Edge Detected Interrupt Flag

Definition at line 1359 of file efm32gg12b_cmu.h .

#define CMU_IF_LFXOEDGE_DEFAULT ( _CMU_IF_LFXOEDGE_DEFAULT << 27)

Shifted mode DEFAULT for CMU_IF

Definition at line 1363 of file efm32gg12b_cmu.h .

#define CMU_IF_LFXORDY (0x1UL << 3)

LFXO Ready Interrupt Flag

Definition at line 1294 of file efm32gg12b_cmu.h .

#define CMU_IF_LFXORDY_DEFAULT ( _CMU_IF_LFXORDY_DEFAULT << 3)

Shifted mode DEFAULT for CMU_IF

Definition at line 1298 of file efm32gg12b_cmu.h .

#define CMU_IF_ULFRCOEDGE (0x1UL << 29)

ULFRCO Clock Edge Detected Interrupt Flag

Definition at line 1369 of file efm32gg12b_cmu.h .

#define CMU_IF_ULFRCOEDGE_DEFAULT ( _CMU_IF_ULFRCOEDGE_DEFAULT << 29)

Shifted mode DEFAULT for CMU_IF

Definition at line 1373 of file efm32gg12b_cmu.h .

#define CMU_IF_USHFRCORDY (0x1UL << 7)

USHFRCO Ready Interrupt Flag

Definition at line 1314 of file efm32gg12b_cmu.h .

#define CMU_IF_USHFRCORDY_DEFAULT ( _CMU_IF_USHFRCORDY_DEFAULT << 7)

Shifted mode DEFAULT for CMU_IF

Definition at line 1318 of file efm32gg12b_cmu.h .

#define CMU_IFC_AUXHFRCORDY (0x1UL << 4)

Clear AUXHFRCORDY Interrupt Flag

Definition at line 1507 of file efm32gg12b_cmu.h .

#define CMU_IFC_AUXHFRCORDY_DEFAULT ( _CMU_IFC_AUXHFRCORDY_DEFAULT << 4)

Shifted mode DEFAULT for CMU_IFC

Definition at line 1511 of file efm32gg12b_cmu.h .

#define CMU_IFC_CALOF (0x1UL << 6)

Clear CALOF Interrupt Flag

Definition at line 1517 of file efm32gg12b_cmu.h .

#define CMU_IFC_CALOF_DEFAULT ( _CMU_IFC_CALOF_DEFAULT << 6)

Shifted mode DEFAULT for CMU_IFC

Definition at line 1521 of file efm32gg12b_cmu.h .

#define CMU_IFC_CALRDY (0x1UL << 5)

Clear CALRDY Interrupt Flag

Definition at line 1512 of file efm32gg12b_cmu.h .

#define CMU_IFC_CALRDY_DEFAULT ( _CMU_IFC_CALRDY_DEFAULT << 5)

Shifted mode DEFAULT for CMU_IFC

Definition at line 1516 of file efm32gg12b_cmu.h .

#define CMU_IFC_CMUERR (0x1UL << 31)

Clear CMUERR Interrupt Flag

Definition at line 1582 of file efm32gg12b_cmu.h .

#define CMU_IFC_CMUERR_DEFAULT ( _CMU_IFC_CMUERR_DEFAULT << 31)

Shifted mode DEFAULT for CMU_IFC

Definition at line 1586 of file efm32gg12b_cmu.h .

#define CMU_IFC_DPLLLOCKFAILHIGH (0x1UL << 17)

Clear DPLLLOCKFAILHIGH Interrupt Flag

Definition at line 1562 of file efm32gg12b_cmu.h .

Referenced by CMU_DPLLLock() .

#define CMU_IFC_DPLLLOCKFAILHIGH_DEFAULT ( _CMU_IFC_DPLLLOCKFAILHIGH_DEFAULT << 17)

Shifted mode DEFAULT for CMU_IFC

Definition at line 1566 of file efm32gg12b_cmu.h .

#define CMU_IFC_DPLLLOCKFAILLOW (0x1UL << 16)

Clear DPLLLOCKFAILLOW Interrupt Flag

Definition at line 1557 of file efm32gg12b_cmu.h .

Referenced by CMU_DPLLLock() .

#define CMU_IFC_DPLLLOCKFAILLOW_DEFAULT ( _CMU_IFC_DPLLLOCKFAILLOW_DEFAULT << 16)

Shifted mode DEFAULT for CMU_IFC

Definition at line 1561 of file efm32gg12b_cmu.h .

#define CMU_IFC_DPLLRDY (0x1UL << 15)

Clear DPLLRDY Interrupt Flag

Definition at line 1552 of file efm32gg12b_cmu.h .

Referenced by CMU_DPLLLock() .

#define CMU_IFC_DPLLRDY_DEFAULT ( _CMU_IFC_DPLLRDY_DEFAULT << 15)

Shifted mode DEFAULT for CMU_IFC

Definition at line 1556 of file efm32gg12b_cmu.h .

#define CMU_IFC_HFRCODIS (0x1UL << 13)

Clear HFRCODIS Interrupt Flag

Definition at line 1542 of file efm32gg12b_cmu.h .

#define CMU_IFC_HFRCODIS_DEFAULT ( _CMU_IFC_HFRCODIS_DEFAULT << 13)

Shifted mode DEFAULT for CMU_IFC

Definition at line 1546 of file efm32gg12b_cmu.h .

#define CMU_IFC_HFRCORDY (0x1UL << 0)

Clear HFRCORDY Interrupt Flag

Definition at line 1487 of file efm32gg12b_cmu.h .

#define CMU_IFC_HFRCORDY_DEFAULT ( _CMU_IFC_HFRCORDY_DEFAULT << 0)

Shifted mode DEFAULT for CMU_IFC

Definition at line 1491 of file efm32gg12b_cmu.h .

#define CMU_IFC_HFXOAUTOSW (0x1UL << 9)

Clear HFXOAUTOSW Interrupt Flag

Definition at line 1532 of file efm32gg12b_cmu.h .

#define CMU_IFC_HFXOAUTOSW_DEFAULT ( _CMU_IFC_HFXOAUTOSW_DEFAULT << 9)

Shifted mode DEFAULT for CMU_IFC

Definition at line 1536 of file efm32gg12b_cmu.h .

#define CMU_IFC_HFXODISERR (0x1UL << 8)

Clear HFXODISERR Interrupt Flag

Definition at line 1527 of file efm32gg12b_cmu.h .

#define CMU_IFC_HFXODISERR_DEFAULT ( _CMU_IFC_HFXODISERR_DEFAULT << 8)

Shifted mode DEFAULT for CMU_IFC

Definition at line 1531 of file efm32gg12b_cmu.h .

#define CMU_IFC_HFXOPEAKDETRDY (0x1UL << 11)

Clear HFXOPEAKDETRDY Interrupt Flag

Definition at line 1537 of file efm32gg12b_cmu.h .

#define CMU_IFC_HFXOPEAKDETRDY_DEFAULT ( _CMU_IFC_HFXOPEAKDETRDY_DEFAULT << 11)

Shifted mode DEFAULT for CMU_IFC

Definition at line 1541 of file efm32gg12b_cmu.h .

#define CMU_IFC_HFXORDY (0x1UL << 1)

Clear HFXORDY Interrupt Flag

Definition at line 1492 of file efm32gg12b_cmu.h .

#define CMU_IFC_HFXORDY_DEFAULT ( _CMU_IFC_HFXORDY_DEFAULT << 1)

Shifted mode DEFAULT for CMU_IFC

Definition at line 1496 of file efm32gg12b_cmu.h .

#define CMU_IFC_LFRCOEDGE (0x1UL << 28)

Clear LFRCOEDGE Interrupt Flag

Definition at line 1572 of file efm32gg12b_cmu.h .

#define CMU_IFC_LFRCOEDGE_DEFAULT ( _CMU_IFC_LFRCOEDGE_DEFAULT << 28)

Shifted mode DEFAULT for CMU_IFC

Definition at line 1576 of file efm32gg12b_cmu.h .

#define CMU_IFC_LFRCORDY (0x1UL << 2)

Clear LFRCORDY Interrupt Flag

Definition at line 1497 of file efm32gg12b_cmu.h .

#define CMU_IFC_LFRCORDY_DEFAULT ( _CMU_IFC_LFRCORDY_DEFAULT << 2)

Shifted mode DEFAULT for CMU_IFC

Definition at line 1501 of file efm32gg12b_cmu.h .

#define CMU_IFC_LFTIMEOUTERR (0x1UL << 14)

Clear LFTIMEOUTERR Interrupt Flag

Definition at line 1547 of file efm32gg12b_cmu.h .

#define CMU_IFC_LFTIMEOUTERR_DEFAULT ( _CMU_IFC_LFTIMEOUTERR_DEFAULT << 14)

Shifted mode DEFAULT for CMU_IFC

Definition at line 1551 of file efm32gg12b_cmu.h .

#define CMU_IFC_LFXOEDGE (0x1UL << 27)

Clear LFXOEDGE Interrupt Flag

Definition at line 1567 of file efm32gg12b_cmu.h .

#define CMU_IFC_LFXOEDGE_DEFAULT ( _CMU_IFC_LFXOEDGE_DEFAULT << 27)

Shifted mode DEFAULT for CMU_IFC

Definition at line 1571 of file efm32gg12b_cmu.h .

#define CMU_IFC_LFXORDY (0x1UL << 3)

Clear LFXORDY Interrupt Flag

Definition at line 1502 of file efm32gg12b_cmu.h .

#define CMU_IFC_LFXORDY_DEFAULT ( _CMU_IFC_LFXORDY_DEFAULT << 3)

Shifted mode DEFAULT for CMU_IFC

Definition at line 1506 of file efm32gg12b_cmu.h .

#define CMU_IFC_ULFRCOEDGE (0x1UL << 29)

Clear ULFRCOEDGE Interrupt Flag

Definition at line 1577 of file efm32gg12b_cmu.h .

#define CMU_IFC_ULFRCOEDGE_DEFAULT ( _CMU_IFC_ULFRCOEDGE_DEFAULT << 29)

Shifted mode DEFAULT for CMU_IFC

Definition at line 1581 of file efm32gg12b_cmu.h .

#define CMU_IFC_USHFRCORDY (0x1UL << 7)

Clear USHFRCORDY Interrupt Flag

Definition at line 1522 of file efm32gg12b_cmu.h .

#define CMU_IFC_USHFRCORDY_DEFAULT ( _CMU_IFC_USHFRCORDY_DEFAULT << 7)

Shifted mode DEFAULT for CMU_IFC

Definition at line 1526 of file efm32gg12b_cmu.h .

#define CMU_IFS_AUXHFRCORDY (0x1UL << 4)

Set AUXHFRCORDY Interrupt Flag

Definition at line 1403 of file efm32gg12b_cmu.h .

#define CMU_IFS_AUXHFRCORDY_DEFAULT ( _CMU_IFS_AUXHFRCORDY_DEFAULT << 4)

Shifted mode DEFAULT for CMU_IFS

Definition at line 1407 of file efm32gg12b_cmu.h .

#define CMU_IFS_CALOF (0x1UL << 6)

Set CALOF Interrupt Flag

Definition at line 1413 of file efm32gg12b_cmu.h .

#define CMU_IFS_CALOF_DEFAULT ( _CMU_IFS_CALOF_DEFAULT << 6)

Shifted mode DEFAULT for CMU_IFS

Definition at line 1417 of file efm32gg12b_cmu.h .

#define CMU_IFS_CALRDY (0x1UL << 5)

Set CALRDY Interrupt Flag

Definition at line 1408 of file efm32gg12b_cmu.h .

#define CMU_IFS_CALRDY_DEFAULT ( _CMU_IFS_CALRDY_DEFAULT << 5)

Shifted mode DEFAULT for CMU_IFS

Definition at line 1412 of file efm32gg12b_cmu.h .

#define CMU_IFS_CMUERR (0x1UL << 31)

Set CMUERR Interrupt Flag

Definition at line 1478 of file efm32gg12b_cmu.h .

#define CMU_IFS_CMUERR_DEFAULT ( _CMU_IFS_CMUERR_DEFAULT << 31)

Shifted mode DEFAULT for CMU_IFS

Definition at line 1482 of file efm32gg12b_cmu.h .

#define CMU_IFS_DPLLLOCKFAILHIGH (0x1UL << 17)

Set DPLLLOCKFAILHIGH Interrupt Flag

Definition at line 1458 of file efm32gg12b_cmu.h .

#define CMU_IFS_DPLLLOCKFAILHIGH_DEFAULT ( _CMU_IFS_DPLLLOCKFAILHIGH_DEFAULT << 17)

Shifted mode DEFAULT for CMU_IFS

Definition at line 1462 of file efm32gg12b_cmu.h .

#define CMU_IFS_DPLLLOCKFAILLOW (0x1UL << 16)

Set DPLLLOCKFAILLOW Interrupt Flag

Definition at line 1453 of file efm32gg12b_cmu.h .

#define CMU_IFS_DPLLLOCKFAILLOW_DEFAULT ( _CMU_IFS_DPLLLOCKFAILLOW_DEFAULT << 16)

Shifted mode DEFAULT for CMU_IFS

Definition at line 1457 of file efm32gg12b_cmu.h .

#define CMU_IFS_DPLLRDY (0x1UL << 15)

Set DPLLRDY Interrupt Flag

Definition at line 1448 of file efm32gg12b_cmu.h .

#define CMU_IFS_DPLLRDY_DEFAULT ( _CMU_IFS_DPLLRDY_DEFAULT << 15)

Shifted mode DEFAULT for CMU_IFS

Definition at line 1452 of file efm32gg12b_cmu.h .

#define CMU_IFS_HFRCODIS (0x1UL << 13)

Set HFRCODIS Interrupt Flag

Definition at line 1438 of file efm32gg12b_cmu.h .

#define CMU_IFS_HFRCODIS_DEFAULT ( _CMU_IFS_HFRCODIS_DEFAULT << 13)

Shifted mode DEFAULT for CMU_IFS

Definition at line 1442 of file efm32gg12b_cmu.h .

#define CMU_IFS_HFRCORDY (0x1UL << 0)

Set HFRCORDY Interrupt Flag

Definition at line 1383 of file efm32gg12b_cmu.h .

#define CMU_IFS_HFRCORDY_DEFAULT ( _CMU_IFS_HFRCORDY_DEFAULT << 0)

Shifted mode DEFAULT for CMU_IFS

Definition at line 1387 of file efm32gg12b_cmu.h .

#define CMU_IFS_HFXOAUTOSW (0x1UL << 9)

Set HFXOAUTOSW Interrupt Flag

Definition at line 1428 of file efm32gg12b_cmu.h .

#define CMU_IFS_HFXOAUTOSW_DEFAULT ( _CMU_IFS_HFXOAUTOSW_DEFAULT << 9)

Shifted mode DEFAULT for CMU_IFS

Definition at line 1432 of file efm32gg12b_cmu.h .

#define CMU_IFS_HFXODISERR (0x1UL << 8)

Set HFXODISERR Interrupt Flag

Definition at line 1423 of file efm32gg12b_cmu.h .

#define CMU_IFS_HFXODISERR_DEFAULT ( _CMU_IFS_HFXODISERR_DEFAULT << 8)

Shifted mode DEFAULT for CMU_IFS

Definition at line 1427 of file efm32gg12b_cmu.h .

#define CMU_IFS_HFXOPEAKDETRDY (0x1UL << 11)

Set HFXOPEAKDETRDY Interrupt Flag

Definition at line 1433 of file efm32gg12b_cmu.h .

#define CMU_IFS_HFXOPEAKDETRDY_DEFAULT ( _CMU_IFS_HFXOPEAKDETRDY_DEFAULT << 11)

Shifted mode DEFAULT for CMU_IFS

Definition at line 1437 of file efm32gg12b_cmu.h .

#define CMU_IFS_HFXORDY (0x1UL << 1)

Set HFXORDY Interrupt Flag

Definition at line 1388 of file efm32gg12b_cmu.h .

#define CMU_IFS_HFXORDY_DEFAULT ( _CMU_IFS_HFXORDY_DEFAULT << 1)

Shifted mode DEFAULT for CMU_IFS

Definition at line 1392 of file efm32gg12b_cmu.h .

#define CMU_IFS_LFRCOEDGE (0x1UL << 28)

Set LFRCOEDGE Interrupt Flag

Definition at line 1468 of file efm32gg12b_cmu.h .

#define CMU_IFS_LFRCOEDGE_DEFAULT ( _CMU_IFS_LFRCOEDGE_DEFAULT << 28)

Shifted mode DEFAULT for CMU_IFS

Definition at line 1472 of file efm32gg12b_cmu.h .

#define CMU_IFS_LFRCORDY (0x1UL << 2)

Set LFRCORDY Interrupt Flag

Definition at line 1393 of file efm32gg12b_cmu.h .

#define CMU_IFS_LFRCORDY_DEFAULT ( _CMU_IFS_LFRCORDY_DEFAULT << 2)

Shifted mode DEFAULT for CMU_IFS

Definition at line 1397 of file efm32gg12b_cmu.h .

#define CMU_IFS_LFTIMEOUTERR (0x1UL << 14)

Set LFTIMEOUTERR Interrupt Flag

Definition at line 1443 of file efm32gg12b_cmu.h .

#define CMU_IFS_LFTIMEOUTERR_DEFAULT ( _CMU_IFS_LFTIMEOUTERR_DEFAULT << 14)

Shifted mode DEFAULT for CMU_IFS

Definition at line 1447 of file efm32gg12b_cmu.h .

#define CMU_IFS_LFXOEDGE (0x1UL << 27)

Set LFXOEDGE Interrupt Flag

Definition at line 1463 of file efm32gg12b_cmu.h .

#define CMU_IFS_LFXOEDGE_DEFAULT ( _CMU_IFS_LFXOEDGE_DEFAULT << 27)

Shifted mode DEFAULT for CMU_IFS

Definition at line 1467 of file efm32gg12b_cmu.h .

#define CMU_IFS_LFXORDY (0x1UL << 3)

Set LFXORDY Interrupt Flag

Definition at line 1398 of file efm32gg12b_cmu.h .

#define CMU_IFS_LFXORDY_DEFAULT ( _CMU_IFS_LFXORDY_DEFAULT << 3)

Shifted mode DEFAULT for CMU_IFS

Definition at line 1402 of file efm32gg12b_cmu.h .

#define CMU_IFS_ULFRCOEDGE (0x1UL << 29)

Set ULFRCOEDGE Interrupt Flag

Definition at line 1473 of file efm32gg12b_cmu.h .

#define CMU_IFS_ULFRCOEDGE_DEFAULT ( _CMU_IFS_ULFRCOEDGE_DEFAULT << 29)

Shifted mode DEFAULT for CMU_IFS

Definition at line 1477 of file efm32gg12b_cmu.h .

#define CMU_IFS_USHFRCORDY (0x1UL << 7)

Set USHFRCORDY Interrupt Flag

Definition at line 1418 of file efm32gg12b_cmu.h .

#define CMU_IFS_USHFRCORDY_DEFAULT ( _CMU_IFS_USHFRCORDY_DEFAULT << 7)

Shifted mode DEFAULT for CMU_IFS

Definition at line 1422 of file efm32gg12b_cmu.h .

#define CMU_LFACLKEN0_LCD (0x1UL << 3)

Liquid Crystal Display Controller Clock Enable

Definition at line 1912 of file efm32gg12b_cmu.h .

Referenced by CHIP_Init() , and CMU_LCDClkFDIVSet() .

#define CMU_LFACLKEN0_LCD_DEFAULT ( _CMU_LFACLKEN0_LCD_DEFAULT << 3)

Shifted mode DEFAULT for CMU_LFACLKEN0

Definition at line 1916 of file efm32gg12b_cmu.h .

#define CMU_LFACLKEN0_LESENSE (0x1UL << 2)

Low Energy Sensor Interface Clock Enable

Definition at line 1907 of file efm32gg12b_cmu.h .

#define CMU_LFACLKEN0_LESENSE_DEFAULT ( _CMU_LFACLKEN0_LESENSE_DEFAULT << 2)

Shifted mode DEFAULT for CMU_LFACLKEN0

Definition at line 1911 of file efm32gg12b_cmu.h .

#define CMU_LFACLKEN0_LETIMER0 (0x1UL << 0)

Low Energy Timer 0 Clock Enable

Definition at line 1897 of file efm32gg12b_cmu.h .

#define CMU_LFACLKEN0_LETIMER0_DEFAULT ( _CMU_LFACLKEN0_LETIMER0_DEFAULT << 0)

Shifted mode DEFAULT for CMU_LFACLKEN0

Definition at line 1901 of file efm32gg12b_cmu.h .

#define CMU_LFACLKEN0_LETIMER1 (0x1UL << 1)

Low Energy Timer 1 Clock Enable

Definition at line 1902 of file efm32gg12b_cmu.h .

#define CMU_LFACLKEN0_LETIMER1_DEFAULT ( _CMU_LFACLKEN0_LETIMER1_DEFAULT << 1)

Shifted mode DEFAULT for CMU_LFACLKEN0

Definition at line 1906 of file efm32gg12b_cmu.h .

#define CMU_LFACLKEN0_RTC (0x1UL << 4)

Real-Time Counter Clock Enable

Definition at line 1917 of file efm32gg12b_cmu.h .

Referenced by UDELAY_Calibrate() .

#define CMU_LFACLKEN0_RTC_DEFAULT ( _CMU_LFACLKEN0_RTC_DEFAULT << 4)

Shifted mode DEFAULT for CMU_LFACLKEN0

Definition at line 1921 of file efm32gg12b_cmu.h .

#define CMU_LFACLKSEL_LFA_DEFAULT ( _CMU_LFACLKSEL_LFA_DEFAULT << 0)

Shifted mode DEFAULT for CMU_LFACLKSEL

Definition at line 1057 of file efm32gg12b_cmu.h .

#define CMU_LFACLKSEL_LFA_DISABLED ( _CMU_LFACLKSEL_LFA_DISABLED << 0)

Shifted mode DISABLED for CMU_LFACLKSEL

Definition at line 1058 of file efm32gg12b_cmu.h .

#define CMU_LFACLKSEL_LFA_LFRCO ( _CMU_LFACLKSEL_LFA_LFRCO << 0)

Shifted mode LFRCO for CMU_LFACLKSEL

Definition at line 1059 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockSelectGet() .

#define CMU_LFACLKSEL_LFA_LFXO ( _CMU_LFACLKSEL_LFA_LFXO << 0)

Shifted mode LFXO for CMU_LFACLKSEL

Definition at line 1060 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockSelectGet() .

#define CMU_LFACLKSEL_LFA_ULFRCO ( _CMU_LFACLKSEL_LFA_ULFRCO << 0)

Shifted mode ULFRCO for CMU_LFACLKSEL

Definition at line 1061 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockSelectGet() .

#define CMU_LFAPRESC0_LCD_DIV1 ( _CMU_LFAPRESC0_LCD_DIV1 << 12)

Shifted mode DIV1 for CMU_LFAPRESC0

Definition at line 2136 of file efm32gg12b_cmu.h .

#define CMU_LFAPRESC0_LCD_DIV128 ( _CMU_LFAPRESC0_LCD_DIV128 << 12)

Shifted mode DIV128 for CMU_LFAPRESC0

Definition at line 2143 of file efm32gg12b_cmu.h .

#define CMU_LFAPRESC0_LCD_DIV16 ( _CMU_LFAPRESC0_LCD_DIV16 << 12)

Shifted mode DIV16 for CMU_LFAPRESC0

Definition at line 2140 of file efm32gg12b_cmu.h .

#define CMU_LFAPRESC0_LCD_DIV2 ( _CMU_LFAPRESC0_LCD_DIV2 << 12)

Shifted mode DIV2 for CMU_LFAPRESC0

Definition at line 2137 of file efm32gg12b_cmu.h .

#define CMU_LFAPRESC0_LCD_DIV32 ( _CMU_LFAPRESC0_LCD_DIV32 << 12)

Shifted mode DIV32 for CMU_LFAPRESC0

Definition at line 2141 of file efm32gg12b_cmu.h .

#define CMU_LFAPRESC0_LCD_DIV4 ( _CMU_LFAPRESC0_LCD_DIV4 << 12)

Shifted mode DIV4 for CMU_LFAPRESC0

Definition at line 2138 of file efm32gg12b_cmu.h .

#define CMU_LFAPRESC0_LCD_DIV64 ( _CMU_LFAPRESC0_LCD_DIV64 << 12)

Shifted mode DIV64 for CMU_LFAPRESC0

Definition at line 2142 of file efm32gg12b_cmu.h .

#define CMU_LFAPRESC0_LCD_DIV8 ( _CMU_LFAPRESC0_LCD_DIV8 << 12)

Shifted mode DIV8 for CMU_LFAPRESC0

Definition at line 2139 of file efm32gg12b_cmu.h .

#define CMU_LFAPRESC0_LESENSE_DIV1 ( _CMU_LFAPRESC0_LESENSE_DIV1 << 8)

Shifted mode DIV1 for CMU_LFAPRESC0

Definition at line 2122 of file efm32gg12b_cmu.h .

#define CMU_LFAPRESC0_LESENSE_DIV2 ( _CMU_LFAPRESC0_LESENSE_DIV2 << 8)

Shifted mode DIV2 for CMU_LFAPRESC0

Definition at line 2123 of file efm32gg12b_cmu.h .

#define CMU_LFAPRESC0_LESENSE_DIV4 ( _CMU_LFAPRESC0_LESENSE_DIV4 << 8)

Shifted mode DIV4 for CMU_LFAPRESC0

Definition at line 2124 of file efm32gg12b_cmu.h .

#define CMU_LFAPRESC0_LESENSE_DIV8 ( _CMU_LFAPRESC0_LESENSE_DIV8 << 8)

Shifted mode DIV8 for CMU_LFAPRESC0

Definition at line 2125 of file efm32gg12b_cmu.h .

#define CMU_LFAPRESC0_LETIMER0_DIV1 ( _CMU_LFAPRESC0_LETIMER0_DIV1 << 0)

Shifted mode DIV1 for CMU_LFAPRESC0

Definition at line 2066 of file efm32gg12b_cmu.h .

#define CMU_LFAPRESC0_LETIMER0_DIV1024 ( _CMU_LFAPRESC0_LETIMER0_DIV1024 << 0)

Shifted mode DIV1024 for CMU_LFAPRESC0

Definition at line 2076 of file efm32gg12b_cmu.h .

#define CMU_LFAPRESC0_LETIMER0_DIV128 ( _CMU_LFAPRESC0_LETIMER0_DIV128 << 0)

Shifted mode DIV128 for CMU_LFAPRESC0

Definition at line 2073 of file efm32gg12b_cmu.h .

#define CMU_LFAPRESC0_LETIMER0_DIV16 ( _CMU_LFAPRESC0_LETIMER0_DIV16 << 0)

Shifted mode DIV16 for CMU_LFAPRESC0

Definition at line 2070 of file efm32gg12b_cmu.h .

#define CMU_LFAPRESC0_LETIMER0_DIV16384 ( _CMU_LFAPRESC0_LETIMER0_DIV16384 << 0)

Shifted mode DIV16384 for CMU_LFAPRESC0

Definition at line 2080 of file efm32gg12b_cmu.h .

#define CMU_LFAPRESC0_LETIMER0_DIV2 ( _CMU_LFAPRESC0_LETIMER0_DIV2 << 0)

Shifted mode DIV2 for CMU_LFAPRESC0

Definition at line 2067 of file efm32gg12b_cmu.h .

#define CMU_LFAPRESC0_LETIMER0_DIV2048 ( _CMU_LFAPRESC0_LETIMER0_DIV2048 << 0)

Shifted mode DIV2048 for CMU_LFAPRESC0

Definition at line 2077 of file efm32gg12b_cmu.h .

#define CMU_LFAPRESC0_LETIMER0_DIV256 ( _CMU_LFAPRESC0_LETIMER0_DIV256 << 0)

Shifted mode DIV256 for CMU_LFAPRESC0

Definition at line 2074 of file efm32gg12b_cmu.h .

#define CMU_LFAPRESC0_LETIMER0_DIV32 ( _CMU_LFAPRESC0_LETIMER0_DIV32 << 0)

Shifted mode DIV32 for CMU_LFAPRESC0

Definition at line 2071 of file efm32gg12b_cmu.h .

#define CMU_LFAPRESC0_LETIMER0_DIV32768 ( _CMU_LFAPRESC0_LETIMER0_DIV32768 << 0)

Shifted mode DIV32768 for CMU_LFAPRESC0

Definition at line 2081 of file efm32gg12b_cmu.h .

#define CMU_LFAPRESC0_LETIMER0_DIV4 ( _CMU_LFAPRESC0_LETIMER0_DIV4 << 0)

Shifted mode DIV4 for CMU_LFAPRESC0

Definition at line 2068 of file efm32gg12b_cmu.h .

#define CMU_LFAPRESC0_LETIMER0_DIV4096 ( _CMU_LFAPRESC0_LETIMER0_DIV4096 << 0)

Shifted mode DIV4096 for CMU_LFAPRESC0

Definition at line 2078 of file efm32gg12b_cmu.h .

#define CMU_LFAPRESC0_LETIMER0_DIV512 ( _CMU_LFAPRESC0_LETIMER0_DIV512 << 0)

Shifted mode DIV512 for CMU_LFAPRESC0

Definition at line 2075 of file efm32gg12b_cmu.h .

#define CMU_LFAPRESC0_LETIMER0_DIV64 ( _CMU_LFAPRESC0_LETIMER0_DIV64 << 0)

Shifted mode DIV64 for CMU_LFAPRESC0

Definition at line 2072 of file efm32gg12b_cmu.h .

#define CMU_LFAPRESC0_LETIMER0_DIV8 ( _CMU_LFAPRESC0_LETIMER0_DIV8 << 0)

Shifted mode DIV8 for CMU_LFAPRESC0

Definition at line 2069 of file efm32gg12b_cmu.h .

#define CMU_LFAPRESC0_LETIMER0_DIV8192 ( _CMU_LFAPRESC0_LETIMER0_DIV8192 << 0)

Shifted mode DIV8192 for CMU_LFAPRESC0

Definition at line 2079 of file efm32gg12b_cmu.h .

#define CMU_LFAPRESC0_LETIMER1_DIV1 ( _CMU_LFAPRESC0_LETIMER1_DIV1 << 4)

Shifted mode DIV1 for CMU_LFAPRESC0

Definition at line 2100 of file efm32gg12b_cmu.h .

#define CMU_LFAPRESC0_LETIMER1_DIV1024 ( _CMU_LFAPRESC0_LETIMER1_DIV1024 << 4)

Shifted mode DIV1024 for CMU_LFAPRESC0

Definition at line 2110 of file efm32gg12b_cmu.h .

#define CMU_LFAPRESC0_LETIMER1_DIV128 ( _CMU_LFAPRESC0_LETIMER1_DIV128 << 4)

Shifted mode DIV128 for CMU_LFAPRESC0

Definition at line 2107 of file efm32gg12b_cmu.h .

#define CMU_LFAPRESC0_LETIMER1_DIV16 ( _CMU_LFAPRESC0_LETIMER1_DIV16 << 4)

Shifted mode DIV16 for CMU_LFAPRESC0

Definition at line 2104 of file efm32gg12b_cmu.h .

#define CMU_LFAPRESC0_LETIMER1_DIV16384 ( _CMU_LFAPRESC0_LETIMER1_DIV16384 << 4)

Shifted mode DIV16384 for CMU_LFAPRESC0

Definition at line 2114 of file efm32gg12b_cmu.h .

#define CMU_LFAPRESC0_LETIMER1_DIV2 ( _CMU_LFAPRESC0_LETIMER1_DIV2 << 4)

Shifted mode DIV2 for CMU_LFAPRESC0

Definition at line 2101 of file efm32gg12b_cmu.h .

#define CMU_LFAPRESC0_LETIMER1_DIV2048 ( _CMU_LFAPRESC0_LETIMER1_DIV2048 << 4)

Shifted mode DIV2048 for CMU_LFAPRESC0

Definition at line 2111 of file efm32gg12b_cmu.h .

#define CMU_LFAPRESC0_LETIMER1_DIV256 ( _CMU_LFAPRESC0_LETIMER1_DIV256 << 4)

Shifted mode DIV256 for CMU_LFAPRESC0

Definition at line 2108 of file efm32gg12b_cmu.h .

#define CMU_LFAPRESC0_LETIMER1_DIV32 ( _CMU_LFAPRESC0_LETIMER1_DIV32 << 4)

Shifted mode DIV32 for CMU_LFAPRESC0

Definition at line 2105 of file efm32gg12b_cmu.h .

#define CMU_LFAPRESC0_LETIMER1_DIV32768 ( _CMU_LFAPRESC0_LETIMER1_DIV32768 << 4)

Shifted mode DIV32768 for CMU_LFAPRESC0

Definition at line 2115 of file efm32gg12b_cmu.h .

#define CMU_LFAPRESC0_LETIMER1_DIV4 ( _CMU_LFAPRESC0_LETIMER1_DIV4 << 4)

Shifted mode DIV4 for CMU_LFAPRESC0

Definition at line 2102 of file efm32gg12b_cmu.h .

#define CMU_LFAPRESC0_LETIMER1_DIV4096 ( _CMU_LFAPRESC0_LETIMER1_DIV4096 << 4)

Shifted mode DIV4096 for CMU_LFAPRESC0

Definition at line 2112 of file efm32gg12b_cmu.h .

#define CMU_LFAPRESC0_LETIMER1_DIV512 ( _CMU_LFAPRESC0_LETIMER1_DIV512 << 4)

Shifted mode DIV512 for CMU_LFAPRESC0

Definition at line 2109 of file efm32gg12b_cmu.h .

#define CMU_LFAPRESC0_LETIMER1_DIV64 ( _CMU_LFAPRESC0_LETIMER1_DIV64 << 4)

Shifted mode DIV64 for CMU_LFAPRESC0

Definition at line 2106 of file efm32gg12b_cmu.h .

#define CMU_LFAPRESC0_LETIMER1_DIV8 ( _CMU_LFAPRESC0_LETIMER1_DIV8 << 4)

Shifted mode DIV8 for CMU_LFAPRESC0

Definition at line 2103 of file efm32gg12b_cmu.h .

#define CMU_LFAPRESC0_LETIMER1_DIV8192 ( _CMU_LFAPRESC0_LETIMER1_DIV8192 << 4)

Shifted mode DIV8192 for CMU_LFAPRESC0

Definition at line 2113 of file efm32gg12b_cmu.h .

#define CMU_LFAPRESC0_RTC_DIV1 ( _CMU_LFAPRESC0_RTC_DIV1 << 16)

Shifted mode DIV1 for CMU_LFAPRESC0

Definition at line 2162 of file efm32gg12b_cmu.h .

#define CMU_LFAPRESC0_RTC_DIV1024 ( _CMU_LFAPRESC0_RTC_DIV1024 << 16)

Shifted mode DIV1024 for CMU_LFAPRESC0

Definition at line 2172 of file efm32gg12b_cmu.h .

#define CMU_LFAPRESC0_RTC_DIV128 ( _CMU_LFAPRESC0_RTC_DIV128 << 16)

Shifted mode DIV128 for CMU_LFAPRESC0

Definition at line 2169 of file efm32gg12b_cmu.h .

#define CMU_LFAPRESC0_RTC_DIV16 ( _CMU_LFAPRESC0_RTC_DIV16 << 16)

Shifted mode DIV16 for CMU_LFAPRESC0

Definition at line 2166 of file efm32gg12b_cmu.h .

#define CMU_LFAPRESC0_RTC_DIV16384 ( _CMU_LFAPRESC0_RTC_DIV16384 << 16)

Shifted mode DIV16384 for CMU_LFAPRESC0

Definition at line 2176 of file efm32gg12b_cmu.h .

#define CMU_LFAPRESC0_RTC_DIV2 ( _CMU_LFAPRESC0_RTC_DIV2 << 16)

Shifted mode DIV2 for CMU_LFAPRESC0

Definition at line 2163 of file efm32gg12b_cmu.h .

#define CMU_LFAPRESC0_RTC_DIV2048 ( _CMU_LFAPRESC0_RTC_DIV2048 << 16)

Shifted mode DIV2048 for CMU_LFAPRESC0

Definition at line 2173 of file efm32gg12b_cmu.h .

#define CMU_LFAPRESC0_RTC_DIV256 ( _CMU_LFAPRESC0_RTC_DIV256 << 16)

Shifted mode DIV256 for CMU_LFAPRESC0

Definition at line 2170 of file efm32gg12b_cmu.h .

#define CMU_LFAPRESC0_RTC_DIV32 ( _CMU_LFAPRESC0_RTC_DIV32 << 16)

Shifted mode DIV32 for CMU_LFAPRESC0

Definition at line 2167 of file efm32gg12b_cmu.h .

#define CMU_LFAPRESC0_RTC_DIV32768 ( _CMU_LFAPRESC0_RTC_DIV32768 << 16)

Shifted mode DIV32768 for CMU_LFAPRESC0

Definition at line 2177 of file efm32gg12b_cmu.h .

#define CMU_LFAPRESC0_RTC_DIV4 ( _CMU_LFAPRESC0_RTC_DIV4 << 16)

Shifted mode DIV4 for CMU_LFAPRESC0

Definition at line 2164 of file efm32gg12b_cmu.h .

#define CMU_LFAPRESC0_RTC_DIV4096 ( _CMU_LFAPRESC0_RTC_DIV4096 << 16)

Shifted mode DIV4096 for CMU_LFAPRESC0

Definition at line 2174 of file efm32gg12b_cmu.h .

#define CMU_LFAPRESC0_RTC_DIV512 ( _CMU_LFAPRESC0_RTC_DIV512 << 16)

Shifted mode DIV512 for CMU_LFAPRESC0

Definition at line 2171 of file efm32gg12b_cmu.h .

#define CMU_LFAPRESC0_RTC_DIV64 ( _CMU_LFAPRESC0_RTC_DIV64 << 16)

Shifted mode DIV64 for CMU_LFAPRESC0

Definition at line 2168 of file efm32gg12b_cmu.h .

#define CMU_LFAPRESC0_RTC_DIV8 ( _CMU_LFAPRESC0_RTC_DIV8 << 16)

Shifted mode DIV8 for CMU_LFAPRESC0

Definition at line 2165 of file efm32gg12b_cmu.h .

#define CMU_LFAPRESC0_RTC_DIV8192 ( _CMU_LFAPRESC0_RTC_DIV8192 << 16)

Shifted mode DIV8192 for CMU_LFAPRESC0

Definition at line 2175 of file efm32gg12b_cmu.h .

#define CMU_LFBCLKEN0_CSEN (0x1UL << 3)

Capacitive touch sense module Clock Enable

Definition at line 1941 of file efm32gg12b_cmu.h .

#define CMU_LFBCLKEN0_CSEN_DEFAULT ( _CMU_LFBCLKEN0_CSEN_DEFAULT << 3)

Shifted mode DEFAULT for CMU_LFBCLKEN0

Definition at line 1945 of file efm32gg12b_cmu.h .

#define CMU_LFBCLKEN0_LEUART0 (0x1UL << 0)

Low Energy UART 0 Clock Enable

Definition at line 1926 of file efm32gg12b_cmu.h .

#define CMU_LFBCLKEN0_LEUART0_DEFAULT ( _CMU_LFBCLKEN0_LEUART0_DEFAULT << 0)

Shifted mode DEFAULT for CMU_LFBCLKEN0

Definition at line 1930 of file efm32gg12b_cmu.h .

#define CMU_LFBCLKEN0_LEUART1 (0x1UL << 1)

Low Energy UART 1 Clock Enable

Definition at line 1931 of file efm32gg12b_cmu.h .

#define CMU_LFBCLKEN0_LEUART1_DEFAULT ( _CMU_LFBCLKEN0_LEUART1_DEFAULT << 1)

Shifted mode DEFAULT for CMU_LFBCLKEN0

Definition at line 1935 of file efm32gg12b_cmu.h .

#define CMU_LFBCLKEN0_SYSTICK (0x1UL << 2)

Clock Enable

Definition at line 1936 of file efm32gg12b_cmu.h .

#define CMU_LFBCLKEN0_SYSTICK_DEFAULT ( _CMU_LFBCLKEN0_SYSTICK_DEFAULT << 2)

Shifted mode DEFAULT for CMU_LFBCLKEN0

Definition at line 1940 of file efm32gg12b_cmu.h .

#define CMU_LFBCLKSEL_LFB_DEFAULT ( _CMU_LFBCLKSEL_LFB_DEFAULT << 0)

Shifted mode DEFAULT for CMU_LFBCLKSEL

Definition at line 1074 of file efm32gg12b_cmu.h .

#define CMU_LFBCLKSEL_LFB_DISABLED ( _CMU_LFBCLKSEL_LFB_DISABLED << 0)

Shifted mode DISABLED for CMU_LFBCLKSEL

Definition at line 1075 of file efm32gg12b_cmu.h .

#define CMU_LFBCLKSEL_LFB_HFCLKLE ( _CMU_LFBCLKSEL_LFB_HFCLKLE << 0)

Shifted mode HFCLKLE for CMU_LFBCLKSEL

Definition at line 1078 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockSelectGet() .

#define CMU_LFBCLKSEL_LFB_LFRCO ( _CMU_LFBCLKSEL_LFB_LFRCO << 0)

Shifted mode LFRCO for CMU_LFBCLKSEL

Definition at line 1076 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockSelectGet() .

#define CMU_LFBCLKSEL_LFB_LFXO ( _CMU_LFBCLKSEL_LFB_LFXO << 0)

Shifted mode LFXO for CMU_LFBCLKSEL

Definition at line 1077 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockSelectGet() .

#define CMU_LFBCLKSEL_LFB_ULFRCO ( _CMU_LFBCLKSEL_LFB_ULFRCO << 0)

Shifted mode ULFRCO for CMU_LFBCLKSEL

Definition at line 1079 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockSelectGet() .

#define CMU_LFBPRESC0_CSEN_DIV128 ( _CMU_LFBPRESC0_CSEN_DIV128 << 12)

Shifted mode DIV128 for CMU_LFBPRESC0

Definition at line 2215 of file efm32gg12b_cmu.h .

#define CMU_LFBPRESC0_CSEN_DIV16 ( _CMU_LFBPRESC0_CSEN_DIV16 << 12)

Shifted mode DIV16 for CMU_LFBPRESC0

Definition at line 2212 of file efm32gg12b_cmu.h .

#define CMU_LFBPRESC0_CSEN_DIV32 ( _CMU_LFBPRESC0_CSEN_DIV32 << 12)

Shifted mode DIV32 for CMU_LFBPRESC0

Definition at line 2213 of file efm32gg12b_cmu.h .

#define CMU_LFBPRESC0_CSEN_DIV64 ( _CMU_LFBPRESC0_CSEN_DIV64 << 12)

Shifted mode DIV64 for CMU_LFBPRESC0

Definition at line 2214 of file efm32gg12b_cmu.h .

#define CMU_LFBPRESC0_LEUART0_DIV1 ( _CMU_LFBPRESC0_LEUART0_DIV1 << 0)

Shifted mode DIV1 for CMU_LFBPRESC0

Definition at line 2188 of file efm32gg12b_cmu.h .

#define CMU_LFBPRESC0_LEUART0_DIV2 ( _CMU_LFBPRESC0_LEUART0_DIV2 << 0)

Shifted mode DIV2 for CMU_LFBPRESC0

Definition at line 2189 of file efm32gg12b_cmu.h .

#define CMU_LFBPRESC0_LEUART0_DIV4 ( _CMU_LFBPRESC0_LEUART0_DIV4 << 0)

Shifted mode DIV4 for CMU_LFBPRESC0

Definition at line 2190 of file efm32gg12b_cmu.h .

#define CMU_LFBPRESC0_LEUART0_DIV8 ( _CMU_LFBPRESC0_LEUART0_DIV8 << 0)

Shifted mode DIV8 for CMU_LFBPRESC0

Definition at line 2191 of file efm32gg12b_cmu.h .

#define CMU_LFBPRESC0_LEUART1_DIV1 ( _CMU_LFBPRESC0_LEUART1_DIV1 << 4)

Shifted mode DIV1 for CMU_LFBPRESC0

Definition at line 2198 of file efm32gg12b_cmu.h .

#define CMU_LFBPRESC0_LEUART1_DIV2 ( _CMU_LFBPRESC0_LEUART1_DIV2 << 4)

Shifted mode DIV2 for CMU_LFBPRESC0

Definition at line 2199 of file efm32gg12b_cmu.h .

#define CMU_LFBPRESC0_LEUART1_DIV4 ( _CMU_LFBPRESC0_LEUART1_DIV4 << 4)

Shifted mode DIV4 for CMU_LFBPRESC0

Definition at line 2200 of file efm32gg12b_cmu.h .

#define CMU_LFBPRESC0_LEUART1_DIV8 ( _CMU_LFBPRESC0_LEUART1_DIV8 << 4)

Shifted mode DIV8 for CMU_LFBPRESC0

Definition at line 2201 of file efm32gg12b_cmu.h .

#define CMU_LFBPRESC0_SYSTICK_DIV1 ( _CMU_LFBPRESC0_SYSTICK_DIV1 << 8)

Shifted mode DIV1 for CMU_LFBPRESC0

Definition at line 2205 of file efm32gg12b_cmu.h .

#define CMU_LFCCLKEN0_USB (0x1UL << 0)

Universal Serial Bus Interface Clock Enable

Definition at line 1950 of file efm32gg12b_cmu.h .

#define CMU_LFCCLKEN0_USB_DEFAULT ( _CMU_LFCCLKEN0_USB_DEFAULT << 0)

Shifted mode DEFAULT for CMU_LFCCLKEN0

Definition at line 1954 of file efm32gg12b_cmu.h .

#define CMU_LFCCLKSEL_LFC_DEFAULT ( _CMU_LFCCLKSEL_LFC_DEFAULT << 0)

Shifted mode DEFAULT for CMU_LFCCLKSEL

Definition at line 1107 of file efm32gg12b_cmu.h .

#define CMU_LFCCLKSEL_LFC_DISABLED ( _CMU_LFCCLKSEL_LFC_DISABLED << 0)

Shifted mode DISABLED for CMU_LFCCLKSEL

Definition at line 1108 of file efm32gg12b_cmu.h .

#define CMU_LFCCLKSEL_LFC_LFRCO ( _CMU_LFCCLKSEL_LFC_LFRCO << 0)

Shifted mode LFRCO for CMU_LFCCLKSEL

Definition at line 1109 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockSelectGet() .

#define CMU_LFCCLKSEL_LFC_LFXO ( _CMU_LFCCLKSEL_LFC_LFXO << 0)

Shifted mode LFXO for CMU_LFCCLKSEL

Definition at line 1110 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockSelectGet() .

#define CMU_LFCCLKSEL_LFC_ULFRCO ( _CMU_LFCCLKSEL_LFC_ULFRCO << 0)

Shifted mode ULFRCO for CMU_LFCCLKSEL

Definition at line 1111 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockSelectGet() .

#define CMU_LFECLKEN0_RTCC (0x1UL << 0)

Real-Time Counter and Calendar Clock Enable

Definition at line 1959 of file efm32gg12b_cmu.h .

Referenced by UDELAY_Calibrate() .

#define CMU_LFECLKEN0_RTCC_DEFAULT ( _CMU_LFECLKEN0_RTCC_DEFAULT << 0)

Shifted mode DEFAULT for CMU_LFECLKEN0

Definition at line 1963 of file efm32gg12b_cmu.h .

#define CMU_LFECLKSEL_LFE_DEFAULT ( _CMU_LFECLKSEL_LFE_DEFAULT << 0)

Shifted mode DEFAULT for CMU_LFECLKSEL

Definition at line 1091 of file efm32gg12b_cmu.h .

#define CMU_LFECLKSEL_LFE_DISABLED ( _CMU_LFECLKSEL_LFE_DISABLED << 0)

Shifted mode DISABLED for CMU_LFECLKSEL

Definition at line 1092 of file efm32gg12b_cmu.h .

#define CMU_LFECLKSEL_LFE_LFRCO ( _CMU_LFECLKSEL_LFE_LFRCO << 0)

Shifted mode LFRCO for CMU_LFECLKSEL

Definition at line 1093 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockSelectGet() .

#define CMU_LFECLKSEL_LFE_LFXO ( _CMU_LFECLKSEL_LFE_LFXO << 0)

Shifted mode LFXO for CMU_LFECLKSEL

Definition at line 1094 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockSelectGet() .

#define CMU_LFECLKSEL_LFE_ULFRCO ( _CMU_LFECLKSEL_LFE_ULFRCO << 0)

Shifted mode ULFRCO for CMU_LFECLKSEL

Definition at line 1095 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockSelectGet() .

#define CMU_LFEPRESC0_RTCC_DIV1 ( _CMU_LFEPRESC0_RTCC_DIV1 << 0)

Shifted mode DIV1 for CMU_LFEPRESC0

Definition at line 2225 of file efm32gg12b_cmu.h .

#define CMU_LFEPRESC0_RTCC_DIV2 ( _CMU_LFEPRESC0_RTCC_DIV2 << 0)

Shifted mode DIV2 for CMU_LFEPRESC0

Definition at line 2226 of file efm32gg12b_cmu.h .

#define CMU_LFEPRESC0_RTCC_DIV4 ( _CMU_LFEPRESC0_RTCC_DIV4 << 0)

Shifted mode DIV4 for CMU_LFEPRESC0

Definition at line 2227 of file efm32gg12b_cmu.h .

#define CMU_LFRCOCTRL_ENCHOP (0x1UL << 17)

Enable Comparator Chopping

Definition at line 410 of file efm32gg12b_cmu.h .

#define CMU_LFRCOCTRL_ENCHOP_DEFAULT ( _CMU_LFRCOCTRL_ENCHOP_DEFAULT << 17)

Shifted mode DEFAULT for CMU_LFRCOCTRL

Definition at line 414 of file efm32gg12b_cmu.h .

#define CMU_LFRCOCTRL_ENDEM (0x1UL << 18)

Enable Dynamic Element Matching

Definition at line 415 of file efm32gg12b_cmu.h .

#define CMU_LFRCOCTRL_ENDEM_DEFAULT ( _CMU_LFRCOCTRL_ENDEM_DEFAULT << 18)

Shifted mode DEFAULT for CMU_LFRCOCTRL

Definition at line 419 of file efm32gg12b_cmu.h .

#define CMU_LFRCOCTRL_ENVREF (0x1UL << 16)

Enable Duty Cycling of Vref

Definition at line 405 of file efm32gg12b_cmu.h .

Referenced by CHIP_Init() .

#define CMU_LFRCOCTRL_ENVREF_DEFAULT ( _CMU_LFRCOCTRL_ENVREF_DEFAULT << 16)

Shifted mode DEFAULT for CMU_LFRCOCTRL

Definition at line 409 of file efm32gg12b_cmu.h .

#define CMU_LFRCOCTRL_GMCCURTUNE_DEFAULT ( _CMU_LFRCOCTRL_GMCCURTUNE_DEFAULT << 28)

Shifted mode DEFAULT for CMU_LFRCOCTRL

Definition at line 445 of file efm32gg12b_cmu.h .

#define CMU_LFRCOCTRL_TIMEOUT_16CYCLES ( _CMU_LFRCOCTRL_TIMEOUT_16CYCLES << 24)

Shifted mode 16CYCLES for CMU_LFRCOCTRL

Definition at line 440 of file efm32gg12b_cmu.h .

#define CMU_LFRCOCTRL_TIMEOUT_2CYCLES ( _CMU_LFRCOCTRL_TIMEOUT_2CYCLES << 24)

Shifted mode 2CYCLES for CMU_LFRCOCTRL

Definition at line 438 of file efm32gg12b_cmu.h .

#define CMU_LFRCOCTRL_TIMEOUT_32CYCLES ( _CMU_LFRCOCTRL_TIMEOUT_32CYCLES << 24)

Shifted mode 32CYCLES for CMU_LFRCOCTRL

Definition at line 441 of file efm32gg12b_cmu.h .

#define CMU_LFRCOCTRL_TIMEOUT_DEFAULT ( _CMU_LFRCOCTRL_TIMEOUT_DEFAULT << 24)

Shifted mode DEFAULT for CMU_LFRCOCTRL

Definition at line 439 of file efm32gg12b_cmu.h .

#define CMU_LFRCOCTRL_TUNING_DEFAULT ( _CMU_LFRCOCTRL_TUNING_DEFAULT << 0)

Shifted mode DEFAULT for CMU_LFRCOCTRL

Definition at line 404 of file efm32gg12b_cmu.h .

#define CMU_LFRCOCTRL_VREFUPDATE_128CYCLES ( _CMU_LFRCOCTRL_VREFUPDATE_128CYCLES << 20)

Shifted mode 128CYCLES for CMU_LFRCOCTRL

Definition at line 430 of file efm32gg12b_cmu.h .

#define CMU_LFRCOCTRL_VREFUPDATE_256CYCLES ( _CMU_LFRCOCTRL_VREFUPDATE_256CYCLES << 20)

Shifted mode 256CYCLES for CMU_LFRCOCTRL

Definition at line 431 of file efm32gg12b_cmu.h .

#define CMU_LFRCOCTRL_VREFUPDATE_32CYCLES ( _CMU_LFRCOCTRL_VREFUPDATE_32CYCLES << 20)

Shifted mode 32CYCLES for CMU_LFRCOCTRL

Definition at line 427 of file efm32gg12b_cmu.h .

#define CMU_LFRCOCTRL_VREFUPDATE_64CYCLES ( _CMU_LFRCOCTRL_VREFUPDATE_64CYCLES << 20)

Shifted mode 64CYCLES for CMU_LFRCOCTRL

Definition at line 429 of file efm32gg12b_cmu.h .

Referenced by CHIP_Init() .

#define CMU_LFRCOCTRL_VREFUPDATE_DEFAULT ( _CMU_LFRCOCTRL_VREFUPDATE_DEFAULT << 20)

Shifted mode DEFAULT for CMU_LFRCOCTRL

Definition at line 428 of file efm32gg12b_cmu.h .

#define CMU_LFXOCTRL_AGC (0x1UL << 15)

LFXO AGC Enable

Definition at line 700 of file efm32gg12b_cmu.h .

#define CMU_LFXOCTRL_AGC_DEFAULT ( _CMU_LFXOCTRL_AGC_DEFAULT << 15)

Shifted mode DEFAULT for CMU_LFXOCTRL

Definition at line 704 of file efm32gg12b_cmu.h .

#define CMU_LFXOCTRL_BUFCUR (0x1UL << 20)

LFXO Buffer Bias Current

Definition at line 709 of file efm32gg12b_cmu.h .

#define CMU_LFXOCTRL_BUFCUR_DEFAULT ( _CMU_LFXOCTRL_BUFCUR_DEFAULT << 20)

Shifted mode DEFAULT for CMU_LFXOCTRL

Definition at line 713 of file efm32gg12b_cmu.h .

#define CMU_LFXOCTRL_CUR_DEFAULT ( _CMU_LFXOCTRL_CUR_DEFAULT << 16)

Shifted mode DEFAULT for CMU_LFXOCTRL

Definition at line 708 of file efm32gg12b_cmu.h .

#define CMU_LFXOCTRL_GAIN_DEFAULT ( _CMU_LFXOCTRL_GAIN_DEFAULT << 11)

Shifted mode DEFAULT for CMU_LFXOCTRL

Definition at line 694 of file efm32gg12b_cmu.h .

#define CMU_LFXOCTRL_HIGHAMPL (0x1UL << 14)

LFXO High XTAL Oscillation Amplitude Enable

Definition at line 695 of file efm32gg12b_cmu.h .

#define CMU_LFXOCTRL_HIGHAMPL_DEFAULT ( _CMU_LFXOCTRL_HIGHAMPL_DEFAULT << 14)

Shifted mode DEFAULT for CMU_LFXOCTRL

Definition at line 699 of file efm32gg12b_cmu.h .

#define CMU_LFXOCTRL_MODE_BUFEXTCLK ( _CMU_LFXOCTRL_MODE_BUFEXTCLK << 8)

Shifted mode BUFEXTCLK for CMU_LFXOCTRL

Definition at line 689 of file efm32gg12b_cmu.h .

#define CMU_LFXOCTRL_MODE_DEFAULT ( _CMU_LFXOCTRL_MODE_DEFAULT << 8)

Shifted mode DEFAULT for CMU_LFXOCTRL

Definition at line 687 of file efm32gg12b_cmu.h .

#define CMU_LFXOCTRL_MODE_DIGEXTCLK ( _CMU_LFXOCTRL_MODE_DIGEXTCLK << 8)

Shifted mode DIGEXTCLK for CMU_LFXOCTRL

Definition at line 690 of file efm32gg12b_cmu.h .

#define CMU_LFXOCTRL_MODE_XTAL ( _CMU_LFXOCTRL_MODE_XTAL << 8)

Shifted mode XTAL for CMU_LFXOCTRL

Definition at line 688 of file efm32gg12b_cmu.h .

#define CMU_LFXOCTRL_TIMEOUT_16KCYCLES ( _CMU_LFXOCTRL_TIMEOUT_16KCYCLES << 24)

Shifted mode 16KCYCLES for CMU_LFXOCTRL

Definition at line 731 of file efm32gg12b_cmu.h .

#define CMU_LFXOCTRL_TIMEOUT_1KCYCLES ( _CMU_LFXOCTRL_TIMEOUT_1KCYCLES << 24)

Shifted mode 1KCYCLES for CMU_LFXOCTRL

Definition at line 727 of file efm32gg12b_cmu.h .

#define CMU_LFXOCTRL_TIMEOUT_256CYCLES ( _CMU_LFXOCTRL_TIMEOUT_256CYCLES << 24)

Shifted mode 256CYCLES for CMU_LFXOCTRL

Definition at line 726 of file efm32gg12b_cmu.h .

#define CMU_LFXOCTRL_TIMEOUT_2CYCLES ( _CMU_LFXOCTRL_TIMEOUT_2CYCLES << 24)

Shifted mode 2CYCLES for CMU_LFXOCTRL

Definition at line 725 of file efm32gg12b_cmu.h .

#define CMU_LFXOCTRL_TIMEOUT_2KCYCLES ( _CMU_LFXOCTRL_TIMEOUT_2KCYCLES << 24)

Shifted mode 2KCYCLES for CMU_LFXOCTRL

Definition at line 728 of file efm32gg12b_cmu.h .

#define CMU_LFXOCTRL_TIMEOUT_32KCYCLES ( _CMU_LFXOCTRL_TIMEOUT_32KCYCLES << 24)

Shifted mode 32KCYCLES for CMU_LFXOCTRL

Definition at line 733 of file efm32gg12b_cmu.h .

#define CMU_LFXOCTRL_TIMEOUT_4KCYCLES ( _CMU_LFXOCTRL_TIMEOUT_4KCYCLES << 24)

Shifted mode 4KCYCLES for CMU_LFXOCTRL

Definition at line 729 of file efm32gg12b_cmu.h .

#define CMU_LFXOCTRL_TIMEOUT_8KCYCLES ( _CMU_LFXOCTRL_TIMEOUT_8KCYCLES << 24)

Shifted mode 8KCYCLES for CMU_LFXOCTRL

Definition at line 730 of file efm32gg12b_cmu.h .

#define CMU_LFXOCTRL_TIMEOUT_DEFAULT ( _CMU_LFXOCTRL_TIMEOUT_DEFAULT << 24)

Shifted mode DEFAULT for CMU_LFXOCTRL

Definition at line 732 of file efm32gg12b_cmu.h .

#define CMU_LFXOCTRL_TUNING_DEFAULT ( _CMU_LFXOCTRL_TUNING_DEFAULT << 0)

Shifted mode DEFAULT for CMU_LFXOCTRL

Definition at line 680 of file efm32gg12b_cmu.h .

#define CMU_LOCK_LOCKKEY_DEFAULT ( _CMU_LOCK_LOCKKEY_DEFAULT << 0)

Shifted mode DEFAULT for CMU_LOCK

Definition at line 2585 of file efm32gg12b_cmu.h .

#define CMU_LOCK_LOCKKEY_LOCK ( _CMU_LOCK_LOCKKEY_LOCK << 0)

Shifted mode LOCK for CMU_LOCK

Definition at line 2586 of file efm32gg12b_cmu.h .

Referenced by CMU_Lock() , RTCC_Lock() , and RTCC_Unlock() .

#define CMU_LOCK_LOCKKEY_LOCKED ( _CMU_LOCK_LOCKKEY_LOCKED << 0)

Shifted mode LOCKED for CMU_LOCK

Definition at line 2588 of file efm32gg12b_cmu.h .

Referenced by EMU_EnterEM3() , RTCC_Lock() , and RTCC_Unlock() .

#define CMU_LOCK_LOCKKEY_UNLOCK ( _CMU_LOCK_LOCKKEY_UNLOCK << 0)

Shifted mode UNLOCK for CMU_LOCK

Definition at line 2589 of file efm32gg12b_cmu.h .

Referenced by CMU_Unlock() , RTCC_Lock() , and RTCC_Unlock() .

#define CMU_LOCK_LOCKKEY_UNLOCKED ( _CMU_LOCK_LOCKKEY_UNLOCKED << 0)

Shifted mode UNLOCKED for CMU_LOCK

Definition at line 2587 of file efm32gg12b_cmu.h .

#define CMU_OSCENCMD_AUXHFRCODIS (0x1UL << 5)

AUXHFRCO Disable

Definition at line 946 of file efm32gg12b_cmu.h .

Referenced by CMU_OscillatorEnable() .

#define CMU_OSCENCMD_AUXHFRCODIS_DEFAULT ( _CMU_OSCENCMD_AUXHFRCODIS_DEFAULT << 5)

Shifted mode DEFAULT for CMU_OSCENCMD

Definition at line 950 of file efm32gg12b_cmu.h .

#define CMU_OSCENCMD_AUXHFRCOEN (0x1UL << 4)

AUXHFRCO Enable

Definition at line 941 of file efm32gg12b_cmu.h .

Referenced by BSP_TraceProfilerSetup() , and CMU_OscillatorEnable() .

#define CMU_OSCENCMD_AUXHFRCOEN_DEFAULT ( _CMU_OSCENCMD_AUXHFRCOEN_DEFAULT << 4)

Shifted mode DEFAULT for CMU_OSCENCMD

Definition at line 945 of file efm32gg12b_cmu.h .

#define CMU_OSCENCMD_DPLLDIS (0x1UL << 13)

DPLL Disable

Definition at line 986 of file efm32gg12b_cmu.h .

Referenced by CMU_DPLLLock() , and CMU_DPLLUnlock() .

#define CMU_OSCENCMD_DPLLDIS_DEFAULT ( _CMU_OSCENCMD_DPLLDIS_DEFAULT << 13)

Shifted mode DEFAULT for CMU_OSCENCMD

Definition at line 990 of file efm32gg12b_cmu.h .

#define CMU_OSCENCMD_DPLLEN (0x1UL << 12)

DPLL Enable

Definition at line 981 of file efm32gg12b_cmu.h .

Referenced by CMU_DPLLLock() .

#define CMU_OSCENCMD_DPLLEN_DEFAULT ( _CMU_OSCENCMD_DPLLEN_DEFAULT << 12)

Shifted mode DEFAULT for CMU_OSCENCMD

Definition at line 985 of file efm32gg12b_cmu.h .

#define CMU_OSCENCMD_HFRCODIS (0x1UL << 1)

HFRCO Disable

Definition at line 926 of file efm32gg12b_cmu.h .

Referenced by CMU_OscillatorEnable() .

#define CMU_OSCENCMD_HFRCODIS_DEFAULT ( _CMU_OSCENCMD_HFRCODIS_DEFAULT << 1)

Shifted mode DEFAULT for CMU_OSCENCMD

Definition at line 930 of file efm32gg12b_cmu.h .

#define CMU_OSCENCMD_HFRCOEN (0x1UL << 0)

HFRCO Enable

Definition at line 921 of file efm32gg12b_cmu.h .

Referenced by CMU_OscillatorEnable() , and EMU_EnterEM4() .

#define CMU_OSCENCMD_HFRCOEN_DEFAULT ( _CMU_OSCENCMD_HFRCOEN_DEFAULT << 0)

Shifted mode DEFAULT for CMU_OSCENCMD

Definition at line 925 of file efm32gg12b_cmu.h .

#define CMU_OSCENCMD_HFXODIS (0x1UL << 3)

HFXO Disable

Definition at line 936 of file efm32gg12b_cmu.h .

Referenced by CMU_OscillatorEnable() .

#define CMU_OSCENCMD_HFXODIS_DEFAULT ( _CMU_OSCENCMD_HFXODIS_DEFAULT << 3)

Shifted mode DEFAULT for CMU_OSCENCMD

Definition at line 940 of file efm32gg12b_cmu.h .

#define CMU_OSCENCMD_HFXOEN (0x1UL << 2)

HFXO Enable

Definition at line 931 of file efm32gg12b_cmu.h .

Referenced by CMU_OscillatorEnable() .

#define CMU_OSCENCMD_HFXOEN_DEFAULT ( _CMU_OSCENCMD_HFXOEN_DEFAULT << 2)

Shifted mode DEFAULT for CMU_OSCENCMD

Definition at line 935 of file efm32gg12b_cmu.h .

#define CMU_OSCENCMD_LFRCODIS (0x1UL << 7)

LFRCO Disable

Definition at line 956 of file efm32gg12b_cmu.h .

Referenced by CMU_OscillatorEnable() , and EMU_EnterEM3() .

#define CMU_OSCENCMD_LFRCODIS_DEFAULT ( _CMU_OSCENCMD_LFRCODIS_DEFAULT << 7)

Shifted mode DEFAULT for CMU_OSCENCMD

Definition at line 960 of file efm32gg12b_cmu.h .

#define CMU_OSCENCMD_LFRCOEN (0x1UL << 6)

LFRCO Enable

Definition at line 951 of file efm32gg12b_cmu.h .

Referenced by CMU_OscillatorEnable() .

#define CMU_OSCENCMD_LFRCOEN_DEFAULT ( _CMU_OSCENCMD_LFRCOEN_DEFAULT << 6)

Shifted mode DEFAULT for CMU_OSCENCMD

Definition at line 955 of file efm32gg12b_cmu.h .

#define CMU_OSCENCMD_LFXODIS (0x1UL << 9)

LFXO Disable

Definition at line 966 of file efm32gg12b_cmu.h .

Referenced by CMU_OscillatorEnable() , and EMU_EnterEM3() .

#define CMU_OSCENCMD_LFXODIS_DEFAULT ( _CMU_OSCENCMD_LFXODIS_DEFAULT << 9)

Shifted mode DEFAULT for CMU_OSCENCMD

Definition at line 970 of file efm32gg12b_cmu.h .

#define CMU_OSCENCMD_LFXOEN (0x1UL << 8)

LFXO Enable

Definition at line 961 of file efm32gg12b_cmu.h .

Referenced by CMU_OscillatorEnable() .

#define CMU_OSCENCMD_LFXOEN_DEFAULT ( _CMU_OSCENCMD_LFXOEN_DEFAULT << 8)

Shifted mode DEFAULT for CMU_OSCENCMD

Definition at line 965 of file efm32gg12b_cmu.h .

#define CMU_OSCENCMD_USHFRCODIS (0x1UL << 11)

USHFRCO Disable

Definition at line 976 of file efm32gg12b_cmu.h .

Referenced by CMU_OscillatorEnable() .

#define CMU_OSCENCMD_USHFRCODIS_DEFAULT ( _CMU_OSCENCMD_USHFRCODIS_DEFAULT << 11)

Shifted mode DEFAULT for CMU_OSCENCMD

Definition at line 980 of file efm32gg12b_cmu.h .

#define CMU_OSCENCMD_USHFRCOEN (0x1UL << 10)

USHFRCO Enable

Definition at line 971 of file efm32gg12b_cmu.h .

Referenced by CMU_OscillatorEnable() .

#define CMU_OSCENCMD_USHFRCOEN_DEFAULT ( _CMU_OSCENCMD_USHFRCOEN_DEFAULT << 10)

Shifted mode DEFAULT for CMU_OSCENCMD

Definition at line 975 of file efm32gg12b_cmu.h .

#define CMU_PCNTCTRL_PCNT0CLKEN (0x1UL << 0)

PCNT0 Clock Enable

Definition at line 2319 of file efm32gg12b_cmu.h .

#define CMU_PCNTCTRL_PCNT0CLKEN_DEFAULT ( _CMU_PCNTCTRL_PCNT0CLKEN_DEFAULT << 0)

Shifted mode DEFAULT for CMU_PCNTCTRL

Definition at line 2323 of file efm32gg12b_cmu.h .

#define CMU_PCNTCTRL_PCNT0CLKSEL (0x1UL << 1)

PCNT0 Clock Select

Definition at line 2324 of file efm32gg12b_cmu.h .

#define CMU_PCNTCTRL_PCNT0CLKSEL_DEFAULT ( _CMU_PCNTCTRL_PCNT0CLKSEL_DEFAULT << 1)

Shifted mode DEFAULT for CMU_PCNTCTRL

Definition at line 2330 of file efm32gg12b_cmu.h .

#define CMU_PCNTCTRL_PCNT0CLKSEL_LFACLK ( _CMU_PCNTCTRL_PCNT0CLKSEL_LFACLK << 1)

Shifted mode LFACLK for CMU_PCNTCTRL

Definition at line 2331 of file efm32gg12b_cmu.h .

#define CMU_PCNTCTRL_PCNT0CLKSEL_PCNT0S0 ( _CMU_PCNTCTRL_PCNT0CLKSEL_PCNT0S0 << 1)

Shifted mode PCNT0S0 for CMU_PCNTCTRL

Definition at line 2332 of file efm32gg12b_cmu.h .

Referenced by CMU_PCNTClockExternalGet() .

#define CMU_PCNTCTRL_PCNT1CLKEN (0x1UL << 2)

PCNT1 Clock Enable

Definition at line 2333 of file efm32gg12b_cmu.h .

#define CMU_PCNTCTRL_PCNT1CLKEN_DEFAULT ( _CMU_PCNTCTRL_PCNT1CLKEN_DEFAULT << 2)

Shifted mode DEFAULT for CMU_PCNTCTRL

Definition at line 2337 of file efm32gg12b_cmu.h .

#define CMU_PCNTCTRL_PCNT1CLKSEL (0x1UL << 3)

PCNT1 Clock Select

Definition at line 2338 of file efm32gg12b_cmu.h .

#define CMU_PCNTCTRL_PCNT1CLKSEL_DEFAULT ( _CMU_PCNTCTRL_PCNT1CLKSEL_DEFAULT << 3)

Shifted mode DEFAULT for CMU_PCNTCTRL

Definition at line 2344 of file efm32gg12b_cmu.h .

#define CMU_PCNTCTRL_PCNT1CLKSEL_LFACLK ( _CMU_PCNTCTRL_PCNT1CLKSEL_LFACLK << 3)

Shifted mode LFACLK for CMU_PCNTCTRL

Definition at line 2345 of file efm32gg12b_cmu.h .

#define CMU_PCNTCTRL_PCNT1CLKSEL_PCNT1S0 ( _CMU_PCNTCTRL_PCNT1CLKSEL_PCNT1S0 << 3)

Shifted mode PCNT1S0 for CMU_PCNTCTRL

Definition at line 2346 of file efm32gg12b_cmu.h .

Referenced by CMU_PCNTClockExternalGet() .

#define CMU_PCNTCTRL_PCNT2CLKEN (0x1UL << 4)

PCNT2 Clock Enable

Definition at line 2347 of file efm32gg12b_cmu.h .

#define CMU_PCNTCTRL_PCNT2CLKEN_DEFAULT ( _CMU_PCNTCTRL_PCNT2CLKEN_DEFAULT << 4)

Shifted mode DEFAULT for CMU_PCNTCTRL

Definition at line 2351 of file efm32gg12b_cmu.h .

#define CMU_PCNTCTRL_PCNT2CLKSEL (0x1UL << 5)

PCNT2 Clock Select

Definition at line 2352 of file efm32gg12b_cmu.h .

#define CMU_PCNTCTRL_PCNT2CLKSEL_DEFAULT ( _CMU_PCNTCTRL_PCNT2CLKSEL_DEFAULT << 5)

Shifted mode DEFAULT for CMU_PCNTCTRL

Definition at line 2358 of file efm32gg12b_cmu.h .

#define CMU_PCNTCTRL_PCNT2CLKSEL_LFACLK ( _CMU_PCNTCTRL_PCNT2CLKSEL_LFACLK << 5)

Shifted mode LFACLK for CMU_PCNTCTRL

Definition at line 2359 of file efm32gg12b_cmu.h .

#define CMU_PCNTCTRL_PCNT2CLKSEL_PCNT2S0 ( _CMU_PCNTCTRL_PCNT2CLKSEL_PCNT2S0 << 5)

Shifted mode PCNT2S0 for CMU_PCNTCTRL

Definition at line 2360 of file efm32gg12b_cmu.h .

Referenced by CMU_PCNTClockExternalGet() .

#define CMU_PDMCTRL_PDMCLKEN (0x1UL << 7)

PDM Core Clock Enable

Definition at line 2469 of file efm32gg12b_cmu.h .

#define CMU_PDMCTRL_PDMCLKEN_DEFAULT ( _CMU_PDMCTRL_PDMCLKEN_DEFAULT << 7)

Shifted mode DEFAULT for CMU_PDMCTRL

Definition at line 2473 of file efm32gg12b_cmu.h .

#define CMU_PDMCTRL_PDMCLKSEL_CLKIN0 ( _CMU_PDMCTRL_PDMCLKSEL_CLKIN0 << 0)

Shifted mode CLKIN0 for CMU_PDMCTRL

Definition at line 2468 of file efm32gg12b_cmu.h .

#define CMU_PDMCTRL_PDMCLKSEL_DEFAULT ( _CMU_PDMCTRL_PDMCLKSEL_DEFAULT << 0)

Shifted mode DEFAULT for CMU_PDMCTRL

Definition at line 2464 of file efm32gg12b_cmu.h .

#define CMU_PDMCTRL_PDMCLKSEL_HFRCO ( _CMU_PDMCTRL_PDMCLKSEL_HFRCO << 0)

Shifted mode HFRCO for CMU_PDMCTRL

Definition at line 2465 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockSelectGet() .

#define CMU_PDMCTRL_PDMCLKSEL_HFXO ( _CMU_PDMCTRL_PDMCLKSEL_HFXO << 0)

Shifted mode HFXO for CMU_PDMCTRL

Definition at line 2466 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockSelectGet() .

#define CMU_PDMCTRL_PDMCLKSEL_USHFRCO ( _CMU_PDMCTRL_PDMCLKSEL_USHFRCO << 0)

Shifted mode USHFRCO for CMU_PDMCTRL

Definition at line 2467 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockSelectGet() .

#define CMU_QSPICTRL_QSPI0CLKDIS (0x1UL << 7)

QSPI0 Reference Clock Disable

Definition at line 2448 of file efm32gg12b_cmu.h .

#define CMU_QSPICTRL_QSPI0CLKDIS_DEFAULT ( _CMU_QSPICTRL_QSPI0CLKDIS_DEFAULT << 7)

Shifted mode DEFAULT for CMU_QSPICTRL

Definition at line 2452 of file efm32gg12b_cmu.h .

#define CMU_QSPICTRL_QSPI0CLKSEL_AUXHFRCO ( _CMU_QSPICTRL_QSPI0CLKSEL_AUXHFRCO << 0)

Shifted mode AUXHFRCO for CMU_QSPICTRL

Definition at line 2446 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockSelectGet() .

#define CMU_QSPICTRL_QSPI0CLKSEL_DEFAULT ( _CMU_QSPICTRL_QSPI0CLKSEL_DEFAULT << 0)

Shifted mode DEFAULT for CMU_QSPICTRL

Definition at line 2443 of file efm32gg12b_cmu.h .

#define CMU_QSPICTRL_QSPI0CLKSEL_HFRCO ( _CMU_QSPICTRL_QSPI0CLKSEL_HFRCO << 0)

Shifted mode HFRCO for CMU_QSPICTRL

Definition at line 2444 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockSelectGet() .

#define CMU_QSPICTRL_QSPI0CLKSEL_HFXO ( _CMU_QSPICTRL_QSPI0CLKSEL_HFXO << 0)

Shifted mode HFXO for CMU_QSPICTRL

Definition at line 2445 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockSelectGet() .

#define CMU_QSPICTRL_QSPI0CLKSEL_USHFRCO ( _CMU_QSPICTRL_QSPI0CLKSEL_USHFRCO << 0)

Shifted mode USHFRCO for CMU_QSPICTRL

Definition at line 2447 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockSelectGet() .

#define CMU_ROUTELOC0_CLKOUT0LOC_DEFAULT ( _CMU_ROUTELOC0_CLKOUT0LOC_DEFAULT << 0)

Shifted mode DEFAULT for CMU_ROUTELOC0

Definition at line 2512 of file efm32gg12b_cmu.h .

#define CMU_ROUTELOC0_CLKOUT0LOC_LOC0 ( _CMU_ROUTELOC0_CLKOUT0LOC_LOC0 << 0)

Shifted mode LOC0 for CMU_ROUTELOC0

Definition at line 2511 of file efm32gg12b_cmu.h .

#define CMU_ROUTELOC0_CLKOUT0LOC_LOC1 ( _CMU_ROUTELOC0_CLKOUT0LOC_LOC1 << 0)

Shifted mode LOC1 for CMU_ROUTELOC0

Definition at line 2513 of file efm32gg12b_cmu.h .

#define CMU_ROUTELOC0_CLKOUT0LOC_LOC2 ( _CMU_ROUTELOC0_CLKOUT0LOC_LOC2 << 0)

Shifted mode LOC2 for CMU_ROUTELOC0

Definition at line 2514 of file efm32gg12b_cmu.h .

#define CMU_ROUTELOC0_CLKOUT0LOC_LOC3 ( _CMU_ROUTELOC0_CLKOUT0LOC_LOC3 << 0)

Shifted mode LOC3 for CMU_ROUTELOC0

Definition at line 2515 of file efm32gg12b_cmu.h .

#define CMU_ROUTELOC0_CLKOUT0LOC_LOC4 ( _CMU_ROUTELOC0_CLKOUT0LOC_LOC4 << 0)

Shifted mode LOC4 for CMU_ROUTELOC0

Definition at line 2516 of file efm32gg12b_cmu.h .

#define CMU_ROUTELOC0_CLKOUT0LOC_LOC5 ( _CMU_ROUTELOC0_CLKOUT0LOC_LOC5 << 0)

Shifted mode LOC5 for CMU_ROUTELOC0

Definition at line 2517 of file efm32gg12b_cmu.h .

#define CMU_ROUTELOC0_CLKOUT1LOC_DEFAULT ( _CMU_ROUTELOC0_CLKOUT1LOC_DEFAULT << 8)

Shifted mode DEFAULT for CMU_ROUTELOC0

Definition at line 2528 of file efm32gg12b_cmu.h .

#define CMU_ROUTELOC0_CLKOUT1LOC_LOC0 ( _CMU_ROUTELOC0_CLKOUT1LOC_LOC0 << 8)

Shifted mode LOC0 for CMU_ROUTELOC0

Definition at line 2527 of file efm32gg12b_cmu.h .

#define CMU_ROUTELOC0_CLKOUT1LOC_LOC1 ( _CMU_ROUTELOC0_CLKOUT1LOC_LOC1 << 8)

Shifted mode LOC1 for CMU_ROUTELOC0

Definition at line 2529 of file efm32gg12b_cmu.h .

#define CMU_ROUTELOC0_CLKOUT1LOC_LOC2 ( _CMU_ROUTELOC0_CLKOUT1LOC_LOC2 << 8)

Shifted mode LOC2 for CMU_ROUTELOC0

Definition at line 2530 of file efm32gg12b_cmu.h .

#define CMU_ROUTELOC0_CLKOUT1LOC_LOC3 ( _CMU_ROUTELOC0_CLKOUT1LOC_LOC3 << 8)

Shifted mode LOC3 for CMU_ROUTELOC0

Definition at line 2531 of file efm32gg12b_cmu.h .

#define CMU_ROUTELOC0_CLKOUT1LOC_LOC4 ( _CMU_ROUTELOC0_CLKOUT1LOC_LOC4 << 8)

Shifted mode LOC4 for CMU_ROUTELOC0

Definition at line 2532 of file efm32gg12b_cmu.h .

#define CMU_ROUTELOC0_CLKOUT1LOC_LOC5 ( _CMU_ROUTELOC0_CLKOUT1LOC_LOC5 << 8)

Shifted mode LOC5 for CMU_ROUTELOC0

Definition at line 2533 of file efm32gg12b_cmu.h .

#define CMU_ROUTELOC0_CLKOUT2LOC_DEFAULT ( _CMU_ROUTELOC0_CLKOUT2LOC_DEFAULT << 16)

Shifted mode DEFAULT for CMU_ROUTELOC0

Definition at line 2544 of file efm32gg12b_cmu.h .

#define CMU_ROUTELOC0_CLKOUT2LOC_LOC0 ( _CMU_ROUTELOC0_CLKOUT2LOC_LOC0 << 16)

Shifted mode LOC0 for CMU_ROUTELOC0

Definition at line 2543 of file efm32gg12b_cmu.h .

#define CMU_ROUTELOC0_CLKOUT2LOC_LOC1 ( _CMU_ROUTELOC0_CLKOUT2LOC_LOC1 << 16)

Shifted mode LOC1 for CMU_ROUTELOC0

Definition at line 2545 of file efm32gg12b_cmu.h .

#define CMU_ROUTELOC0_CLKOUT2LOC_LOC2 ( _CMU_ROUTELOC0_CLKOUT2LOC_LOC2 << 16)

Shifted mode LOC2 for CMU_ROUTELOC0

Definition at line 2546 of file efm32gg12b_cmu.h .

#define CMU_ROUTELOC0_CLKOUT2LOC_LOC3 ( _CMU_ROUTELOC0_CLKOUT2LOC_LOC3 << 16)

Shifted mode LOC3 for CMU_ROUTELOC0

Definition at line 2547 of file efm32gg12b_cmu.h .

#define CMU_ROUTELOC0_CLKOUT2LOC_LOC4 ( _CMU_ROUTELOC0_CLKOUT2LOC_LOC4 << 16)

Shifted mode LOC4 for CMU_ROUTELOC0

Definition at line 2548 of file efm32gg12b_cmu.h .

#define CMU_ROUTELOC0_CLKOUT2LOC_LOC5 ( _CMU_ROUTELOC0_CLKOUT2LOC_LOC5 << 16)

Shifted mode LOC5 for CMU_ROUTELOC0

Definition at line 2549 of file efm32gg12b_cmu.h .

#define CMU_ROUTELOC1_CLKIN0LOC_DEFAULT ( _CMU_ROUTELOC1_CLKIN0LOC_DEFAULT << 0)

Shifted mode DEFAULT for CMU_ROUTELOC1

Definition at line 2566 of file efm32gg12b_cmu.h .

#define CMU_ROUTELOC1_CLKIN0LOC_LOC0 ( _CMU_ROUTELOC1_CLKIN0LOC_LOC0 << 0)

Shifted mode LOC0 for CMU_ROUTELOC1

Definition at line 2565 of file efm32gg12b_cmu.h .

#define CMU_ROUTELOC1_CLKIN0LOC_LOC1 ( _CMU_ROUTELOC1_CLKIN0LOC_LOC1 << 0)

Shifted mode LOC1 for CMU_ROUTELOC1

Definition at line 2567 of file efm32gg12b_cmu.h .

#define CMU_ROUTELOC1_CLKIN0LOC_LOC2 ( _CMU_ROUTELOC1_CLKIN0LOC_LOC2 << 0)

Shifted mode LOC2 for CMU_ROUTELOC1

Definition at line 2568 of file efm32gg12b_cmu.h .

#define CMU_ROUTELOC1_CLKIN0LOC_LOC3 ( _CMU_ROUTELOC1_CLKIN0LOC_LOC3 << 0)

Shifted mode LOC3 for CMU_ROUTELOC1

Definition at line 2569 of file efm32gg12b_cmu.h .

#define CMU_ROUTELOC1_CLKIN0LOC_LOC4 ( _CMU_ROUTELOC1_CLKIN0LOC_LOC4 << 0)

Shifted mode LOC4 for CMU_ROUTELOC1

Definition at line 2570 of file efm32gg12b_cmu.h .

#define CMU_ROUTELOC1_CLKIN0LOC_LOC5 ( _CMU_ROUTELOC1_CLKIN0LOC_LOC5 << 0)

Shifted mode LOC5 for CMU_ROUTELOC1

Definition at line 2571 of file efm32gg12b_cmu.h .

#define CMU_ROUTELOC1_CLKIN0LOC_LOC6 ( _CMU_ROUTELOC1_CLKIN0LOC_LOC6 << 0)

Shifted mode LOC6 for CMU_ROUTELOC1

Definition at line 2572 of file efm32gg12b_cmu.h .

#define CMU_ROUTELOC1_CLKIN0LOC_LOC7 ( _CMU_ROUTELOC1_CLKIN0LOC_LOC7 << 0)

Shifted mode LOC7 for CMU_ROUTELOC1

Definition at line 2573 of file efm32gg12b_cmu.h .

#define CMU_ROUTEPEN_CLKIN0PEN (0x1UL << 28)

CLKIN0 Pin Enable

Definition at line 2493 of file efm32gg12b_cmu.h .

#define CMU_ROUTEPEN_CLKIN0PEN_DEFAULT ( _CMU_ROUTEPEN_CLKIN0PEN_DEFAULT << 28)

Shifted mode DEFAULT for CMU_ROUTEPEN

Definition at line 2497 of file efm32gg12b_cmu.h .

#define CMU_ROUTEPEN_CLKOUT0PEN (0x1UL << 0)

CLKOUT0 Pin Enable

Definition at line 2478 of file efm32gg12b_cmu.h .

#define CMU_ROUTEPEN_CLKOUT0PEN_DEFAULT ( _CMU_ROUTEPEN_CLKOUT0PEN_DEFAULT << 0)

Shifted mode DEFAULT for CMU_ROUTEPEN

Definition at line 2482 of file efm32gg12b_cmu.h .

#define CMU_ROUTEPEN_CLKOUT1PEN (0x1UL << 1)

CLKOUT1 Pin Enable

Definition at line 2483 of file efm32gg12b_cmu.h .

#define CMU_ROUTEPEN_CLKOUT1PEN_DEFAULT ( _CMU_ROUTEPEN_CLKOUT1PEN_DEFAULT << 1)

Shifted mode DEFAULT for CMU_ROUTEPEN

Definition at line 2487 of file efm32gg12b_cmu.h .

#define CMU_ROUTEPEN_CLKOUT2PEN (0x1UL << 2)

CLKOUT2 Pin Enable

Definition at line 2488 of file efm32gg12b_cmu.h .

#define CMU_ROUTEPEN_CLKOUT2PEN_DEFAULT ( _CMU_ROUTEPEN_CLKOUT2PEN_DEFAULT << 2)

Shifted mode DEFAULT for CMU_ROUTEPEN

Definition at line 2492 of file efm32gg12b_cmu.h .

#define CMU_SDIOCTRL_SDIOCLKDIS (0x1UL << 7)

SDIO Reference Clock Disable

Definition at line 2427 of file efm32gg12b_cmu.h .

#define CMU_SDIOCTRL_SDIOCLKDIS_DEFAULT ( _CMU_SDIOCTRL_SDIOCLKDIS_DEFAULT << 7)

Shifted mode DEFAULT for CMU_SDIOCTRL

Definition at line 2431 of file efm32gg12b_cmu.h .

#define CMU_SDIOCTRL_SDIOCLKSEL_AUXHFRCO ( _CMU_SDIOCTRL_SDIOCLKSEL_AUXHFRCO << 0)

Shifted mode AUXHFRCO for CMU_SDIOCTRL

Definition at line 2425 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockSelectGet() .

#define CMU_SDIOCTRL_SDIOCLKSEL_DEFAULT ( _CMU_SDIOCTRL_SDIOCLKSEL_DEFAULT << 0)

Shifted mode DEFAULT for CMU_SDIOCTRL

Definition at line 2422 of file efm32gg12b_cmu.h .

#define CMU_SDIOCTRL_SDIOCLKSEL_HFRCO ( _CMU_SDIOCTRL_SDIOCLKSEL_HFRCO << 0)

Shifted mode HFRCO for CMU_SDIOCTRL

Definition at line 2423 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockSelectGet() .

#define CMU_SDIOCTRL_SDIOCLKSEL_HFXO ( _CMU_SDIOCTRL_SDIOCLKSEL_HFXO << 0)

Shifted mode HFXO for CMU_SDIOCTRL

Definition at line 2424 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockSelectGet() .

#define CMU_SDIOCTRL_SDIOCLKSEL_USHFRCO ( _CMU_SDIOCTRL_SDIOCLKSEL_USHFRCO << 0)

Shifted mode USHFRCO for CMU_SDIOCTRL

Definition at line 2426 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockSelectGet() .

#define CMU_STATUS_AUXHFRCOENS (0x1UL << 4)

AUXHFRCO Enable Status

Definition at line 1136 of file efm32gg12b_cmu.h .

#define CMU_STATUS_AUXHFRCOENS_DEFAULT ( _CMU_STATUS_AUXHFRCOENS_DEFAULT << 4)

Shifted mode DEFAULT for CMU_STATUS

Definition at line 1140 of file efm32gg12b_cmu.h .

#define CMU_STATUS_AUXHFRCORDY (0x1UL << 5)

AUXHFRCO Ready

Definition at line 1141 of file efm32gg12b_cmu.h .

Referenced by BSP_TraceProfilerSetup() .

#define CMU_STATUS_AUXHFRCORDY_DEFAULT ( _CMU_STATUS_AUXHFRCORDY_DEFAULT << 5)

Shifted mode DEFAULT for CMU_STATUS

Definition at line 1145 of file efm32gg12b_cmu.h .

#define CMU_STATUS_CALRDY (0x1UL << 16)

Calibration Ready

Definition at line 1186 of file efm32gg12b_cmu.h .

#define CMU_STATUS_CALRDY_DEFAULT ( _CMU_STATUS_CALRDY_DEFAULT << 16)

Shifted mode DEFAULT for CMU_STATUS

Definition at line 1190 of file efm32gg12b_cmu.h .

#define CMU_STATUS_DPLLENS (0x1UL << 12)

DPLL Enable Status

Definition at line 1176 of file efm32gg12b_cmu.h .

Referenced by CMU_DPLLLock() .

#define CMU_STATUS_DPLLENS_DEFAULT ( _CMU_STATUS_DPLLENS_DEFAULT << 12)

Shifted mode DEFAULT for CMU_STATUS

Definition at line 1180 of file efm32gg12b_cmu.h .

#define CMU_STATUS_DPLLRDY (0x1UL << 13)

DPLL Ready

Definition at line 1181 of file efm32gg12b_cmu.h .

Referenced by CMU_DPLLLock() .

#define CMU_STATUS_DPLLRDY_DEFAULT ( _CMU_STATUS_DPLLRDY_DEFAULT << 13)

Shifted mode DEFAULT for CMU_STATUS

Definition at line 1185 of file efm32gg12b_cmu.h .

#define CMU_STATUS_HFRCOENS (0x1UL << 0)

HFRCO Enable Status

Definition at line 1116 of file efm32gg12b_cmu.h .

#define CMU_STATUS_HFRCOENS_DEFAULT ( _CMU_STATUS_HFRCOENS_DEFAULT << 0)

Shifted mode DEFAULT for CMU_STATUS

Definition at line 1120 of file efm32gg12b_cmu.h .

#define CMU_STATUS_HFRCORDY (0x1UL << 1)

HFRCO Ready

Definition at line 1121 of file efm32gg12b_cmu.h .

Referenced by EMU_EnterEM4() .

#define CMU_STATUS_HFRCORDY_DEFAULT ( _CMU_STATUS_HFRCORDY_DEFAULT << 1)

Shifted mode DEFAULT for CMU_STATUS

Definition at line 1125 of file efm32gg12b_cmu.h .

#define CMU_STATUS_HFXOAMPLOW (0x1UL << 25)

HFXO Amplitude Tuning Value Too Low

Definition at line 1211 of file efm32gg12b_cmu.h .

#define CMU_STATUS_HFXOAMPLOW_DEFAULT ( _CMU_STATUS_HFXOAMPLOW_DEFAULT << 25)

Shifted mode DEFAULT for CMU_STATUS

Definition at line 1215 of file efm32gg12b_cmu.h .

#define CMU_STATUS_HFXOENS (0x1UL << 2)

HFXO Enable Status

Definition at line 1126 of file efm32gg12b_cmu.h .

Referenced by CMU_OscillatorTuningSet() .

#define CMU_STATUS_HFXOENS_DEFAULT ( _CMU_STATUS_HFXOENS_DEFAULT << 2)

Shifted mode DEFAULT for CMU_STATUS

Definition at line 1130 of file efm32gg12b_cmu.h .

#define CMU_STATUS_HFXOPEAKDETRDY (0x1UL << 22)

HFXO Peak Detection Ready

Definition at line 1206 of file efm32gg12b_cmu.h .

Referenced by CMU_OscillatorTuningWait() .

#define CMU_STATUS_HFXOPEAKDETRDY_DEFAULT ( _CMU_STATUS_HFXOPEAKDETRDY_DEFAULT << 22)

Shifted mode DEFAULT for CMU_STATUS

Definition at line 1210 of file efm32gg12b_cmu.h .

#define CMU_STATUS_HFXORDY (0x1UL << 3)

HFXO Ready

Definition at line 1131 of file efm32gg12b_cmu.h .

#define CMU_STATUS_HFXORDY_DEFAULT ( _CMU_STATUS_HFXORDY_DEFAULT << 3)

Shifted mode DEFAULT for CMU_STATUS

Definition at line 1135 of file efm32gg12b_cmu.h .

#define CMU_STATUS_LFRCOENS (0x1UL << 6)

LFRCO Enable Status

Definition at line 1146 of file efm32gg12b_cmu.h .

Referenced by UDELAY_Calibrate() .

#define CMU_STATUS_LFRCOENS_DEFAULT ( _CMU_STATUS_LFRCOENS_DEFAULT << 6)

Shifted mode DEFAULT for CMU_STATUS

Definition at line 1150 of file efm32gg12b_cmu.h .

#define CMU_STATUS_LFRCOPHASE (0x1UL << 28)

LFRCO Clock Phase

Definition at line 1221 of file efm32gg12b_cmu.h .

#define CMU_STATUS_LFRCOPHASE_DEFAULT ( _CMU_STATUS_LFRCOPHASE_DEFAULT << 28)

Shifted mode DEFAULT for CMU_STATUS

Definition at line 1225 of file efm32gg12b_cmu.h .

#define CMU_STATUS_LFRCORDY (0x1UL << 7)

LFRCO Ready

Definition at line 1151 of file efm32gg12b_cmu.h .

#define CMU_STATUS_LFRCORDY_DEFAULT ( _CMU_STATUS_LFRCORDY_DEFAULT << 7)

Shifted mode DEFAULT for CMU_STATUS

Definition at line 1155 of file efm32gg12b_cmu.h .

#define CMU_STATUS_LFXOENS (0x1UL << 8)

LFXO Enable Status

Definition at line 1156 of file efm32gg12b_cmu.h .

Referenced by UARTDRV_InitLeuart() , and UDELAY_Calibrate() .

#define CMU_STATUS_LFXOENS_DEFAULT ( _CMU_STATUS_LFXOENS_DEFAULT << 8)

Shifted mode DEFAULT for CMU_STATUS

Definition at line 1160 of file efm32gg12b_cmu.h .

#define CMU_STATUS_LFXOPHASE (0x1UL << 27)

LFXO Clock Phase

Definition at line 1216 of file efm32gg12b_cmu.h .

#define CMU_STATUS_LFXOPHASE_DEFAULT ( _CMU_STATUS_LFXOPHASE_DEFAULT << 27)

Shifted mode DEFAULT for CMU_STATUS

Definition at line 1220 of file efm32gg12b_cmu.h .

#define CMU_STATUS_LFXORDY (0x1UL << 9)

LFXO Ready

Definition at line 1161 of file efm32gg12b_cmu.h .

#define CMU_STATUS_LFXORDY_DEFAULT ( _CMU_STATUS_LFXORDY_DEFAULT << 9)

Shifted mode DEFAULT for CMU_STATUS

Definition at line 1165 of file efm32gg12b_cmu.h .

#define CMU_STATUS_PDMCLKENS (0x1UL << 19)

PDM Clock Enabled Status

Definition at line 1201 of file efm32gg12b_cmu.h .

#define CMU_STATUS_PDMCLKENS_DEFAULT ( _CMU_STATUS_PDMCLKENS_DEFAULT << 19)

Shifted mode DEFAULT for CMU_STATUS

Definition at line 1205 of file efm32gg12b_cmu.h .

#define CMU_STATUS_QSPI0CLKENS (0x1UL << 18)

QSPI0 Clock Enabled Status

Definition at line 1196 of file efm32gg12b_cmu.h .

#define CMU_STATUS_QSPI0CLKENS_DEFAULT ( _CMU_STATUS_QSPI0CLKENS_DEFAULT << 18)

Shifted mode DEFAULT for CMU_STATUS

Definition at line 1200 of file efm32gg12b_cmu.h .

#define CMU_STATUS_SDIOCLKENS (0x1UL << 17)

SDIO Clock Enabled Status

Definition at line 1191 of file efm32gg12b_cmu.h .

#define CMU_STATUS_SDIOCLKENS_DEFAULT ( _CMU_STATUS_SDIOCLKENS_DEFAULT << 17)

Shifted mode DEFAULT for CMU_STATUS

Definition at line 1195 of file efm32gg12b_cmu.h .

#define CMU_STATUS_ULFRCOPHASE (0x1UL << 29)

ULFRCO Clock Phase

Definition at line 1226 of file efm32gg12b_cmu.h .

#define CMU_STATUS_ULFRCOPHASE_DEFAULT ( _CMU_STATUS_ULFRCOPHASE_DEFAULT << 29)

Shifted mode DEFAULT for CMU_STATUS

Definition at line 1230 of file efm32gg12b_cmu.h .

#define CMU_STATUS_USHFRCOENS (0x1UL << 10)

USHFRCO Enable Status

Definition at line 1166 of file efm32gg12b_cmu.h .

#define CMU_STATUS_USHFRCOENS_DEFAULT ( _CMU_STATUS_USHFRCOENS_DEFAULT << 10)

Shifted mode DEFAULT for CMU_STATUS

Definition at line 1170 of file efm32gg12b_cmu.h .

#define CMU_STATUS_USHFRCORDY (0x1UL << 11)

USHFRCO Ready

Definition at line 1171 of file efm32gg12b_cmu.h .

#define CMU_STATUS_USHFRCORDY_DEFAULT ( _CMU_STATUS_USHFRCORDY_DEFAULT << 11)

Shifted mode DEFAULT for CMU_STATUS

Definition at line 1175 of file efm32gg12b_cmu.h .

#define CMU_SYNCBUSY_AUXHFRCOBSY (0x1UL << 25)

AUXHFRCO Busy

Definition at line 2272 of file efm32gg12b_cmu.h .

#define CMU_SYNCBUSY_AUXHFRCOBSY_DEFAULT ( _CMU_SYNCBUSY_AUXHFRCOBSY_DEFAULT << 25)

Shifted mode DEFAULT for CMU_SYNCBUSY

Definition at line 2276 of file efm32gg12b_cmu.h .

#define CMU_SYNCBUSY_HFRCOBSY (0x1UL << 24)

HFRCO Busy

Definition at line 2267 of file efm32gg12b_cmu.h .

Referenced by EMU_EnterEM4() .

#define CMU_SYNCBUSY_HFRCOBSY_DEFAULT ( _CMU_SYNCBUSY_HFRCOBSY_DEFAULT << 24)

Shifted mode DEFAULT for CMU_SYNCBUSY

Definition at line 2271 of file efm32gg12b_cmu.h .

#define CMU_SYNCBUSY_HFXOBSY (0x1UL << 28)

HFXO Busy

Definition at line 2287 of file efm32gg12b_cmu.h .

#define CMU_SYNCBUSY_HFXOBSY_DEFAULT ( _CMU_SYNCBUSY_HFXOBSY_DEFAULT << 28)

Shifted mode DEFAULT for CMU_SYNCBUSY

Definition at line 2291 of file efm32gg12b_cmu.h .

#define CMU_SYNCBUSY_LFACLKEN0 (0x1UL << 0)

Low Frequency a Clock Enable 0 Busy

Definition at line 2232 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockEnable() .

#define CMU_SYNCBUSY_LFACLKEN0_DEFAULT ( _CMU_SYNCBUSY_LFACLKEN0_DEFAULT << 0)

Shifted mode DEFAULT for CMU_SYNCBUSY

Definition at line 2236 of file efm32gg12b_cmu.h .

#define CMU_SYNCBUSY_LFAPRESC0 (0x1UL << 2)

Low Frequency a Prescaler 0 Busy

Definition at line 2237 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockDivSet() , and CMU_ClockPrescSet() .

#define CMU_SYNCBUSY_LFAPRESC0_DEFAULT ( _CMU_SYNCBUSY_LFAPRESC0_DEFAULT << 2)

Shifted mode DEFAULT for CMU_SYNCBUSY

Definition at line 2241 of file efm32gg12b_cmu.h .

#define CMU_SYNCBUSY_LFBCLKEN0 (0x1UL << 4)

Low Frequency B Clock Enable 0 Busy

Definition at line 2242 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockEnable() .

#define CMU_SYNCBUSY_LFBCLKEN0_DEFAULT ( _CMU_SYNCBUSY_LFBCLKEN0_DEFAULT << 4)

Shifted mode DEFAULT for CMU_SYNCBUSY

Definition at line 2246 of file efm32gg12b_cmu.h .

#define CMU_SYNCBUSY_LFBPRESC0 (0x1UL << 6)

Low Frequency B Prescaler 0 Busy

Definition at line 2247 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockDivSet() , and CMU_ClockPrescSet() .

#define CMU_SYNCBUSY_LFBPRESC0_DEFAULT ( _CMU_SYNCBUSY_LFBPRESC0_DEFAULT << 6)

Shifted mode DEFAULT for CMU_SYNCBUSY

Definition at line 2251 of file efm32gg12b_cmu.h .

#define CMU_SYNCBUSY_LFCCLKEN0 (0x1UL << 8)

Low Frequency C Clock Enable 0 Busy

Definition at line 2252 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockEnable() .

#define CMU_SYNCBUSY_LFCCLKEN0_DEFAULT ( _CMU_SYNCBUSY_LFCCLKEN0_DEFAULT << 8)

Shifted mode DEFAULT for CMU_SYNCBUSY

Definition at line 2256 of file efm32gg12b_cmu.h .

#define CMU_SYNCBUSY_LFECLKEN0 (0x1UL << 16)

Low Frequency E Clock Enable 0 Busy

Definition at line 2257 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockEnable() .

#define CMU_SYNCBUSY_LFECLKEN0_DEFAULT ( _CMU_SYNCBUSY_LFECLKEN0_DEFAULT << 16)

Shifted mode DEFAULT for CMU_SYNCBUSY

Definition at line 2261 of file efm32gg12b_cmu.h .

#define CMU_SYNCBUSY_LFEPRESC0 (0x1UL << 18)

Low Frequency E Prescaler 0 Busy

Definition at line 2262 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockPrescSet() .

#define CMU_SYNCBUSY_LFEPRESC0_DEFAULT ( _CMU_SYNCBUSY_LFEPRESC0_DEFAULT << 18)

Shifted mode DEFAULT for CMU_SYNCBUSY

Definition at line 2266 of file efm32gg12b_cmu.h .

#define CMU_SYNCBUSY_LFRCOBSY (0x1UL << 26)

LFRCO Busy

Definition at line 2277 of file efm32gg12b_cmu.h .

#define CMU_SYNCBUSY_LFRCOBSY_DEFAULT ( _CMU_SYNCBUSY_LFRCOBSY_DEFAULT << 26)

Shifted mode DEFAULT for CMU_SYNCBUSY

Definition at line 2281 of file efm32gg12b_cmu.h .

#define CMU_SYNCBUSY_LFRCOVREFBSY (0x1UL << 27)

LFRCO VREF Busy

Definition at line 2282 of file efm32gg12b_cmu.h .

#define CMU_SYNCBUSY_LFRCOVREFBSY_DEFAULT ( _CMU_SYNCBUSY_LFRCOVREFBSY_DEFAULT << 27)

Shifted mode DEFAULT for CMU_SYNCBUSY

Definition at line 2286 of file efm32gg12b_cmu.h .

#define CMU_SYNCBUSY_LFXOBSY (0x1UL << 29)

LFXO Busy

Definition at line 2292 of file efm32gg12b_cmu.h .

#define CMU_SYNCBUSY_LFXOBSY_DEFAULT ( _CMU_SYNCBUSY_LFXOBSY_DEFAULT << 29)

Shifted mode DEFAULT for CMU_SYNCBUSY

Definition at line 2296 of file efm32gg12b_cmu.h .

#define CMU_SYNCBUSY_USHFRCOBSY (0x1UL << 30)

USHFRCO Busy

Definition at line 2297 of file efm32gg12b_cmu.h .

#define CMU_SYNCBUSY_USHFRCOBSY_DEFAULT ( _CMU_SYNCBUSY_USHFRCOBSY_DEFAULT << 30)

Shifted mode DEFAULT for CMU_SYNCBUSY

Definition at line 2301 of file efm32gg12b_cmu.h .

#define CMU_USBCRCTRL_USBCREN (0x1UL << 0)

Clock Recovery Enable

Definition at line 2631 of file efm32gg12b_cmu.h .

#define CMU_USBCRCTRL_USBCREN_DEFAULT ( _CMU_USBCRCTRL_USBCREN_DEFAULT << 0)

Shifted mode DEFAULT for CMU_USBCRCTRL

Definition at line 2635 of file efm32gg12b_cmu.h .

#define CMU_USBCRCTRL_USBLSCRMD (0x1UL << 1)

Low Speed Clock Recovery Mode

Definition at line 2636 of file efm32gg12b_cmu.h .

#define CMU_USBCRCTRL_USBLSCRMD_DEFAULT ( _CMU_USBCRCTRL_USBLSCRMD_DEFAULT << 1)

Shifted mode DEFAULT for CMU_USBCRCTRL

Definition at line 2640 of file efm32gg12b_cmu.h .

#define CMU_USBCTRL_USBCLKEN (0x1UL << 7)

USB Rate Clock Enable

Definition at line 2622 of file efm32gg12b_cmu.h .

#define CMU_USBCTRL_USBCLKEN_DEFAULT ( _CMU_USBCTRL_USBCLKEN_DEFAULT << 7)

Shifted mode DEFAULT for CMU_USBCTRL

Definition at line 2626 of file efm32gg12b_cmu.h .

#define CMU_USBCTRL_USBCLKSEL_DEFAULT ( _CMU_USBCTRL_USBCLKSEL_DEFAULT << 0)

Shifted mode DEFAULT for CMU_USBCTRL

Definition at line 2615 of file efm32gg12b_cmu.h .

#define CMU_USBCTRL_USBCLKSEL_HFRCO ( _CMU_USBCTRL_USBCLKSEL_HFRCO << 0)

Shifted mode HFRCO for CMU_USBCTRL

Definition at line 2619 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockSelectGet() .

#define CMU_USBCTRL_USBCLKSEL_HFXO ( _CMU_USBCTRL_USBCLKSEL_HFXO << 0)

Shifted mode HFXO for CMU_USBCTRL

Definition at line 2617 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockSelectGet() .

#define CMU_USBCTRL_USBCLKSEL_HFXOX2 ( _CMU_USBCTRL_USBCLKSEL_HFXOX2 << 0)

Shifted mode HFXOX2 for CMU_USBCTRL

Definition at line 2618 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockSelectGet() .

#define CMU_USBCTRL_USBCLKSEL_LFRCO ( _CMU_USBCTRL_USBCLKSEL_LFRCO << 0)

Shifted mode LFRCO for CMU_USBCTRL

Definition at line 2621 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockSelectGet() .

#define CMU_USBCTRL_USBCLKSEL_LFXO ( _CMU_USBCTRL_USBCLKSEL_LFXO << 0)

Shifted mode LFXO for CMU_USBCTRL

Definition at line 2620 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockSelectGet() .

#define CMU_USBCTRL_USBCLKSEL_USHFRCO ( _CMU_USBCTRL_USBCLKSEL_USHFRCO << 0)

Shifted mode USHFRCO for CMU_USBCTRL

Definition at line 2616 of file efm32gg12b_cmu.h .

Referenced by CMU_ClockSelectGet() .

#define CMU_USHFRCOCTRL_CLKDIV_DEFAULT ( _CMU_USHFRCOCTRL_CLKDIV_DEFAULT << 25)

Shifted mode DEFAULT for CMU_USHFRCOCTRL

Definition at line 296 of file efm32gg12b_cmu.h .

#define CMU_USHFRCOCTRL_CLKDIV_DIV1 ( _CMU_USHFRCOCTRL_CLKDIV_DIV1 << 25)

Shifted mode DIV1 for CMU_USHFRCOCTRL

Definition at line 297 of file efm32gg12b_cmu.h .

#define CMU_USHFRCOCTRL_CLKDIV_DIV2 ( _CMU_USHFRCOCTRL_CLKDIV_DIV2 << 25)

Shifted mode DIV2 for CMU_USHFRCOCTRL

Definition at line 298 of file efm32gg12b_cmu.h .

#define CMU_USHFRCOCTRL_CLKDIV_DIV4 ( _CMU_USHFRCOCTRL_CLKDIV_DIV4 << 25)

Shifted mode DIV4 for CMU_USHFRCOCTRL

Definition at line 299 of file efm32gg12b_cmu.h .

#define CMU_USHFRCOCTRL_CMPBIAS_DEFAULT ( _CMU_USHFRCOCTRL_CMPBIAS_DEFAULT << 21)

Shifted mode DEFAULT for CMU_USHFRCOCTRL

Definition at line 284 of file efm32gg12b_cmu.h .

#define CMU_USHFRCOCTRL_FINETUNING_DEFAULT ( _CMU_USHFRCOCTRL_FINETUNING_DEFAULT << 8)

Shifted mode DEFAULT for CMU_USHFRCOCTRL

Definition at line 276 of file efm32gg12b_cmu.h .

#define CMU_USHFRCOCTRL_FINETUNINGEN (0x1UL << 27)

Enable Reference for Fine Tuning

Definition at line 300 of file efm32gg12b_cmu.h .

#define CMU_USHFRCOCTRL_FINETUNINGEN_DEFAULT ( _CMU_USHFRCOCTRL_FINETUNINGEN_DEFAULT << 27)

Shifted mode DEFAULT for CMU_USHFRCOCTRL

Definition at line 304 of file efm32gg12b_cmu.h .

#define CMU_USHFRCOCTRL_FREQRANGE_DEFAULT ( _CMU_USHFRCOCTRL_FREQRANGE_DEFAULT << 16)

Shifted mode DEFAULT for CMU_USHFRCOCTRL

Definition at line 280 of file efm32gg12b_cmu.h .

#define CMU_USHFRCOCTRL_LDOHP (0x1UL << 24)

USHFRCO LDO High Power Mode

Definition at line 285 of file efm32gg12b_cmu.h .

#define CMU_USHFRCOCTRL_LDOHP_DEFAULT ( _CMU_USHFRCOCTRL_LDOHP_DEFAULT << 24)

Shifted mode DEFAULT for CMU_USHFRCOCTRL

Definition at line 289 of file efm32gg12b_cmu.h .

#define CMU_USHFRCOCTRL_TUNING_DEFAULT ( _CMU_USHFRCOCTRL_TUNING_DEFAULT << 0)

Shifted mode DEFAULT for CMU_USHFRCOCTRL

Definition at line 272 of file efm32gg12b_cmu.h .

#define CMU_USHFRCOCTRL_VREFTC_DEFAULT ( _CMU_USHFRCOCTRL_VREFTC_DEFAULT << 28)

Shifted mode DEFAULT for CMU_USHFRCOCTRL

Definition at line 308 of file efm32gg12b_cmu.h .

CMU Bit FieldsDevices > CMU

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