Macros
#define	_VDAC_CAL_GAINERRTRIM_DEFAULT 0x00000020UL

#define	_VDAC_CAL_GAINERRTRIM_MASK 0x3F00UL

#define	_VDAC_CAL_GAINERRTRIM_SHIFT 8

#define	_VDAC_CAL_GAINERRTRIMCH1_DEFAULT 0x00000008UL

#define	_VDAC_CAL_GAINERRTRIMCH1_MASK 0xF0000UL

#define	_VDAC_CAL_GAINERRTRIMCH1_SHIFT 16

#define	_VDAC_CAL_MASK 0x000F3F07UL

#define	_VDAC_CAL_OFFSETTRIM_DEFAULT 0x00000004UL

#define	_VDAC_CAL_OFFSETTRIM_MASK 0x7UL

#define	_VDAC_CAL_OFFSETTRIM_SHIFT 0

#define	_VDAC_CAL_RESETVALUE 0x00082004UL

#define	_VDAC_CH0CTRL_CONVMODE_CONTINUOUS 0x00000000UL

#define	_VDAC_CH0CTRL_CONVMODE_DEFAULT 0x00000000UL

#define	_VDAC_CH0CTRL_CONVMODE_MASK 0x1UL

#define	_VDAC_CH0CTRL_CONVMODE_SAMPLEOFF 0x00000001UL

#define	_VDAC_CH0CTRL_CONVMODE_SHIFT 0

#define	_VDAC_CH0CTRL_MASK 0x0000F171UL

#define	_VDAC_CH0CTRL_PRSASYNC_DEFAULT 0x00000000UL

#define	_VDAC_CH0CTRL_PRSASYNC_MASK 0x100UL

#define	_VDAC_CH0CTRL_PRSASYNC_SHIFT 8

#define	_VDAC_CH0CTRL_PRSSEL_DEFAULT 0x00000000UL

#define	_VDAC_CH0CTRL_PRSSEL_MASK 0xF000UL

#define	_VDAC_CH0CTRL_PRSSEL_PRSCH0 0x00000000UL

#define	_VDAC_CH0CTRL_PRSSEL_PRSCH1 0x00000001UL

#define	_VDAC_CH0CTRL_PRSSEL_PRSCH10 0x0000000AUL

#define	_VDAC_CH0CTRL_PRSSEL_PRSCH11 0x0000000BUL

#define	_VDAC_CH0CTRL_PRSSEL_PRSCH12 0x0000000CUL

#define	_VDAC_CH0CTRL_PRSSEL_PRSCH13 0x0000000DUL

#define	_VDAC_CH0CTRL_PRSSEL_PRSCH14 0x0000000EUL

#define	_VDAC_CH0CTRL_PRSSEL_PRSCH15 0x0000000FUL

#define	_VDAC_CH0CTRL_PRSSEL_PRSCH2 0x00000002UL

#define	_VDAC_CH0CTRL_PRSSEL_PRSCH3 0x00000003UL

#define	_VDAC_CH0CTRL_PRSSEL_PRSCH4 0x00000004UL

#define	_VDAC_CH0CTRL_PRSSEL_PRSCH5 0x00000005UL

#define	_VDAC_CH0CTRL_PRSSEL_PRSCH6 0x00000006UL

#define	_VDAC_CH0CTRL_PRSSEL_PRSCH7 0x00000007UL

#define	_VDAC_CH0CTRL_PRSSEL_PRSCH8 0x00000008UL

#define	_VDAC_CH0CTRL_PRSSEL_PRSCH9 0x00000009UL

#define	_VDAC_CH0CTRL_PRSSEL_SHIFT 12

#define	_VDAC_CH0CTRL_RESETVALUE 0x00000000UL

#define	_VDAC_CH0CTRL_TRIGMODE_DEFAULT 0x00000000UL

#define	_VDAC_CH0CTRL_TRIGMODE_LESENSE 0x00000005UL

#define	_VDAC_CH0CTRL_TRIGMODE_MASK 0x70UL

#define	_VDAC_CH0CTRL_TRIGMODE_PRS 0x00000001UL

#define	_VDAC_CH0CTRL_TRIGMODE_REFRESH 0x00000002UL

#define	_VDAC_CH0CTRL_TRIGMODE_SHIFT 4

#define	_VDAC_CH0CTRL_TRIGMODE_SW 0x00000000UL

#define	_VDAC_CH0CTRL_TRIGMODE_SWPRS 0x00000003UL

#define	_VDAC_CH0CTRL_TRIGMODE_SWREFRESH 0x00000004UL

#define	_VDAC_CH0DATA_DATA_DEFAULT 0x00000800UL

#define	_VDAC_CH0DATA_DATA_MASK 0xFFFUL

#define	_VDAC_CH0DATA_DATA_SHIFT 0

#define	_VDAC_CH0DATA_MASK 0x00000FFFUL

#define	_VDAC_CH0DATA_RESETVALUE 0x00000800UL

#define	_VDAC_CH1CTRL_CONVMODE_CONTINUOUS 0x00000000UL

#define	_VDAC_CH1CTRL_CONVMODE_DEFAULT 0x00000000UL

#define	_VDAC_CH1CTRL_CONVMODE_MASK 0x1UL

#define	_VDAC_CH1CTRL_CONVMODE_SAMPLEOFF 0x00000001UL

#define	_VDAC_CH1CTRL_CONVMODE_SHIFT 0

#define	_VDAC_CH1CTRL_MASK 0x0000F171UL

#define	_VDAC_CH1CTRL_PRSASYNC_DEFAULT 0x00000000UL

#define	_VDAC_CH1CTRL_PRSASYNC_MASK 0x100UL

#define	_VDAC_CH1CTRL_PRSASYNC_SHIFT 8

#define	_VDAC_CH1CTRL_PRSSEL_DEFAULT 0x00000000UL

#define	_VDAC_CH1CTRL_PRSSEL_MASK 0xF000UL

#define	_VDAC_CH1CTRL_PRSSEL_PRSCH0 0x00000000UL

#define	_VDAC_CH1CTRL_PRSSEL_PRSCH1 0x00000001UL

#define	_VDAC_CH1CTRL_PRSSEL_PRSCH10 0x0000000AUL

#define	_VDAC_CH1CTRL_PRSSEL_PRSCH11 0x0000000BUL

#define	_VDAC_CH1CTRL_PRSSEL_PRSCH12 0x0000000CUL

#define	_VDAC_CH1CTRL_PRSSEL_PRSCH13 0x0000000DUL

#define	_VDAC_CH1CTRL_PRSSEL_PRSCH14 0x0000000EUL

#define	_VDAC_CH1CTRL_PRSSEL_PRSCH15 0x0000000FUL

#define	_VDAC_CH1CTRL_PRSSEL_PRSCH2 0x00000002UL

#define	_VDAC_CH1CTRL_PRSSEL_PRSCH3 0x00000003UL

#define	_VDAC_CH1CTRL_PRSSEL_PRSCH4 0x00000004UL

#define	_VDAC_CH1CTRL_PRSSEL_PRSCH5 0x00000005UL

#define	_VDAC_CH1CTRL_PRSSEL_PRSCH6 0x00000006UL

#define	_VDAC_CH1CTRL_PRSSEL_PRSCH7 0x00000007UL

#define	_VDAC_CH1CTRL_PRSSEL_PRSCH8 0x00000008UL

#define	_VDAC_CH1CTRL_PRSSEL_PRSCH9 0x00000009UL

#define	_VDAC_CH1CTRL_PRSSEL_SHIFT 12

#define	_VDAC_CH1CTRL_RESETVALUE 0x00000000UL

#define	_VDAC_CH1CTRL_TRIGMODE_DEFAULT 0x00000000UL

#define	_VDAC_CH1CTRL_TRIGMODE_LESENSE 0x00000005UL

#define	_VDAC_CH1CTRL_TRIGMODE_MASK 0x70UL

#define	_VDAC_CH1CTRL_TRIGMODE_PRS 0x00000001UL

#define	_VDAC_CH1CTRL_TRIGMODE_REFRESH 0x00000002UL

#define	_VDAC_CH1CTRL_TRIGMODE_SHIFT 4

#define	_VDAC_CH1CTRL_TRIGMODE_SW 0x00000000UL

#define	_VDAC_CH1CTRL_TRIGMODE_SWPRS 0x00000003UL

#define	_VDAC_CH1CTRL_TRIGMODE_SWREFRESH 0x00000004UL

#define	_VDAC_CH1DATA_DATA_DEFAULT 0x00000800UL

#define	_VDAC_CH1DATA_DATA_MASK 0xFFFUL

#define	_VDAC_CH1DATA_DATA_SHIFT 0

#define	_VDAC_CH1DATA_MASK 0x00000FFFUL

#define	_VDAC_CH1DATA_RESETVALUE 0x00000800UL

#define	_VDAC_CMD_CH0DIS_DEFAULT 0x00000000UL

#define	_VDAC_CMD_CH0DIS_MASK 0x2UL

#define	_VDAC_CMD_CH0DIS_SHIFT 1

#define	_VDAC_CMD_CH0EN_DEFAULT 0x00000000UL

#define	_VDAC_CMD_CH0EN_MASK 0x1UL

#define	_VDAC_CMD_CH0EN_SHIFT 0

#define	_VDAC_CMD_CH1DIS_DEFAULT 0x00000000UL

#define	_VDAC_CMD_CH1DIS_MASK 0x8UL

#define	_VDAC_CMD_CH1DIS_SHIFT 3

#define	_VDAC_CMD_CH1EN_DEFAULT 0x00000000UL

#define	_VDAC_CMD_CH1EN_MASK 0x4UL

#define	_VDAC_CMD_CH1EN_SHIFT 2

#define	_VDAC_CMD_MASK 0x00FF000FUL

#define	_VDAC_CMD_OPA0DIS_DEFAULT 0x00000000UL

#define	_VDAC_CMD_OPA0DIS_MASK 0x20000UL

#define	_VDAC_CMD_OPA0DIS_SHIFT 17

#define	_VDAC_CMD_OPA0EN_DEFAULT 0x00000000UL

#define	_VDAC_CMD_OPA0EN_MASK 0x10000UL

#define	_VDAC_CMD_OPA0EN_SHIFT 16

#define	_VDAC_CMD_OPA1DIS_DEFAULT 0x00000000UL

#define	_VDAC_CMD_OPA1DIS_MASK 0x80000UL

#define	_VDAC_CMD_OPA1DIS_SHIFT 19

#define	_VDAC_CMD_OPA1EN_DEFAULT 0x00000000UL

#define	_VDAC_CMD_OPA1EN_MASK 0x40000UL

#define	_VDAC_CMD_OPA1EN_SHIFT 18

#define	_VDAC_CMD_OPA2DIS_DEFAULT 0x00000000UL

#define	_VDAC_CMD_OPA2DIS_MASK 0x200000UL

#define	_VDAC_CMD_OPA2DIS_SHIFT 21

#define	_VDAC_CMD_OPA2EN_DEFAULT 0x00000000UL

#define	_VDAC_CMD_OPA2EN_MASK 0x100000UL

#define	_VDAC_CMD_OPA2EN_SHIFT 20

#define	_VDAC_CMD_OPA3DIS_DEFAULT 0x00000000UL

#define	_VDAC_CMD_OPA3DIS_MASK 0x800000UL

#define	_VDAC_CMD_OPA3DIS_SHIFT 23

#define	_VDAC_CMD_OPA3EN_DEFAULT 0x00000000UL

#define	_VDAC_CMD_OPA3EN_MASK 0x400000UL

#define	_VDAC_CMD_OPA3EN_SHIFT 22

#define	_VDAC_CMD_RESETVALUE 0x00000000UL

#define	_VDAC_COMBDATA_CH0DATA_DEFAULT 0x00000800UL

#define	_VDAC_COMBDATA_CH0DATA_MASK 0xFFFUL

#define	_VDAC_COMBDATA_CH0DATA_SHIFT 0

#define	_VDAC_COMBDATA_CH1DATA_DEFAULT 0x00000800UL

#define	_VDAC_COMBDATA_CH1DATA_MASK 0xFFF0000UL

#define	_VDAC_COMBDATA_CH1DATA_SHIFT 16

#define	_VDAC_COMBDATA_MASK 0x0FFF0FFFUL

#define	_VDAC_COMBDATA_RESETVALUE 0x08000800UL

#define	_VDAC_CTRL_CH0PRESCRST_DEFAULT 0x00000000UL

#define	_VDAC_CTRL_CH0PRESCRST_MASK 0x40UL

#define	_VDAC_CTRL_CH0PRESCRST_SHIFT 6

#define	_VDAC_CTRL_DACCLKMODE_ASYNC 0x00000001UL

#define	_VDAC_CTRL_DACCLKMODE_DEFAULT 0x00000000UL

#define	_VDAC_CTRL_DACCLKMODE_MASK 0x80000000UL

#define	_VDAC_CTRL_DACCLKMODE_SHIFT 31

#define	_VDAC_CTRL_DACCLKMODE_SYNC 0x00000000UL

#define	_VDAC_CTRL_DIFF_DEFAULT 0x00000000UL

#define	_VDAC_CTRL_DIFF_MASK 0x1UL

#define	_VDAC_CTRL_DIFF_SHIFT 0

#define	_VDAC_CTRL_MASK 0x937F0771UL

#define	_VDAC_CTRL_OUTENPRS_DEFAULT 0x00000000UL

#define	_VDAC_CTRL_OUTENPRS_MASK 0x20UL

#define	_VDAC_CTRL_OUTENPRS_SHIFT 5

#define	_VDAC_CTRL_PRESC_DEFAULT 0x00000000UL

#define	_VDAC_CTRL_PRESC_MASK 0x7F0000UL

#define	_VDAC_CTRL_PRESC_NODIVISION 0x00000000UL

#define	_VDAC_CTRL_PRESC_SHIFT 16

#define	_VDAC_CTRL_REFRESHPERIOD_16CYCLES 0x00000001UL

#define	_VDAC_CTRL_REFRESHPERIOD_32CYCLES 0x00000002UL

#define	_VDAC_CTRL_REFRESHPERIOD_64CYCLES 0x00000003UL

#define	_VDAC_CTRL_REFRESHPERIOD_8CYCLES 0x00000000UL

#define	_VDAC_CTRL_REFRESHPERIOD_DEFAULT 0x00000000UL

#define	_VDAC_CTRL_REFRESHPERIOD_MASK 0x3000000UL

#define	_VDAC_CTRL_REFRESHPERIOD_SHIFT 24

#define	_VDAC_CTRL_REFSEL_1V25 0x00000002UL

#define	_VDAC_CTRL_REFSEL_1V25LN 0x00000000UL

#define	_VDAC_CTRL_REFSEL_2V5 0x00000003UL

#define	_VDAC_CTRL_REFSEL_2V5LN 0x00000001UL

#define	_VDAC_CTRL_REFSEL_DEFAULT 0x00000000UL

#define	_VDAC_CTRL_REFSEL_EXT 0x00000006UL

#define	_VDAC_CTRL_REFSEL_MASK 0x700UL

#define	_VDAC_CTRL_REFSEL_SHIFT 8

#define	_VDAC_CTRL_REFSEL_VDD 0x00000004UL

#define	_VDAC_CTRL_RESETVALUE 0x00000000UL

#define	_VDAC_CTRL_SINEMODE_DEFAULT 0x00000000UL

#define	_VDAC_CTRL_SINEMODE_MASK 0x10UL

#define	_VDAC_CTRL_SINEMODE_SHIFT 4

#define	_VDAC_CTRL_WARMUPMODE_DEFAULT 0x00000000UL

#define	_VDAC_CTRL_WARMUPMODE_KEEPINSTANDBY 0x00000001UL

#define	_VDAC_CTRL_WARMUPMODE_MASK 0x10000000UL

#define	_VDAC_CTRL_WARMUPMODE_NORMAL 0x00000000UL

#define	_VDAC_CTRL_WARMUPMODE_SHIFT 28

#define	_VDAC_IEN_CH0BL_DEFAULT 0x00000000UL

#define	_VDAC_IEN_CH0BL_MASK 0x40UL

#define	_VDAC_IEN_CH0BL_SHIFT 6

#define	_VDAC_IEN_CH0CD_DEFAULT 0x00000000UL

#define	_VDAC_IEN_CH0CD_MASK 0x1UL

#define	_VDAC_IEN_CH0CD_SHIFT 0

#define	_VDAC_IEN_CH0OF_DEFAULT 0x00000000UL

#define	_VDAC_IEN_CH0OF_MASK 0x4UL

#define	_VDAC_IEN_CH0OF_SHIFT 2

#define	_VDAC_IEN_CH0UF_DEFAULT 0x00000000UL

#define	_VDAC_IEN_CH0UF_MASK 0x10UL

#define	_VDAC_IEN_CH0UF_SHIFT 4

#define	_VDAC_IEN_CH1BL_DEFAULT 0x00000000UL

#define	_VDAC_IEN_CH1BL_MASK 0x80UL

#define	_VDAC_IEN_CH1BL_SHIFT 7

#define	_VDAC_IEN_CH1CD_DEFAULT 0x00000000UL

#define	_VDAC_IEN_CH1CD_MASK 0x2UL

#define	_VDAC_IEN_CH1CD_SHIFT 1

#define	_VDAC_IEN_CH1OF_DEFAULT 0x00000000UL

#define	_VDAC_IEN_CH1OF_MASK 0x8UL

#define	_VDAC_IEN_CH1OF_SHIFT 3

#define	_VDAC_IEN_CH1UF_DEFAULT 0x00000000UL

#define	_VDAC_IEN_CH1UF_MASK 0x20UL

#define	_VDAC_IEN_CH1UF_SHIFT 5

#define	_VDAC_IEN_EM23ERR_DEFAULT 0x00000000UL

#define	_VDAC_IEN_EM23ERR_MASK 0x8000UL

#define	_VDAC_IEN_EM23ERR_SHIFT 15

#define	_VDAC_IEN_MASK 0xF0FF80FFUL

#define	_VDAC_IEN_OPA0APORTCONFLICT_DEFAULT 0x00000000UL

#define	_VDAC_IEN_OPA0APORTCONFLICT_MASK 0x10000UL

#define	_VDAC_IEN_OPA0APORTCONFLICT_SHIFT 16

#define	_VDAC_IEN_OPA0OUTVALID_DEFAULT 0x00000000UL

#define	_VDAC_IEN_OPA0OUTVALID_MASK 0x10000000UL

#define	_VDAC_IEN_OPA0OUTVALID_SHIFT 28

#define	_VDAC_IEN_OPA0PRSTIMEDERR_DEFAULT 0x00000000UL

#define	_VDAC_IEN_OPA0PRSTIMEDERR_MASK 0x100000UL

#define	_VDAC_IEN_OPA0PRSTIMEDERR_SHIFT 20

#define	_VDAC_IEN_OPA1APORTCONFLICT_DEFAULT 0x00000000UL

#define	_VDAC_IEN_OPA1APORTCONFLICT_MASK 0x20000UL

#define	_VDAC_IEN_OPA1APORTCONFLICT_SHIFT 17

#define	_VDAC_IEN_OPA1OUTVALID_DEFAULT 0x00000000UL

#define	_VDAC_IEN_OPA1OUTVALID_MASK 0x20000000UL

#define	_VDAC_IEN_OPA1OUTVALID_SHIFT 29

#define	_VDAC_IEN_OPA1PRSTIMEDERR_DEFAULT 0x00000000UL

#define	_VDAC_IEN_OPA1PRSTIMEDERR_MASK 0x200000UL

#define	_VDAC_IEN_OPA1PRSTIMEDERR_SHIFT 21

#define	_VDAC_IEN_OPA2APORTCONFLICT_DEFAULT 0x00000000UL

#define	_VDAC_IEN_OPA2APORTCONFLICT_MASK 0x40000UL

#define	_VDAC_IEN_OPA2APORTCONFLICT_SHIFT 18

#define	_VDAC_IEN_OPA2OUTVALID_DEFAULT 0x00000000UL

#define	_VDAC_IEN_OPA2OUTVALID_MASK 0x40000000UL

#define	_VDAC_IEN_OPA2OUTVALID_SHIFT 30

#define	_VDAC_IEN_OPA2PRSTIMEDERR_DEFAULT 0x00000000UL

#define	_VDAC_IEN_OPA2PRSTIMEDERR_MASK 0x400000UL

#define	_VDAC_IEN_OPA2PRSTIMEDERR_SHIFT 22

#define	_VDAC_IEN_OPA3APORTCONFLICT_DEFAULT 0x00000000UL

#define	_VDAC_IEN_OPA3APORTCONFLICT_MASK 0x80000UL

#define	_VDAC_IEN_OPA3APORTCONFLICT_SHIFT 19

#define	_VDAC_IEN_OPA3OUTVALID_DEFAULT 0x00000000UL

#define	_VDAC_IEN_OPA3OUTVALID_MASK 0x80000000UL

#define	_VDAC_IEN_OPA3OUTVALID_SHIFT 31

#define	_VDAC_IEN_OPA3PRSTIMEDERR_DEFAULT 0x00000000UL

#define	_VDAC_IEN_OPA3PRSTIMEDERR_MASK 0x800000UL

#define	_VDAC_IEN_OPA3PRSTIMEDERR_SHIFT 23

#define	_VDAC_IEN_RESETVALUE 0x00000000UL

#define	_VDAC_IF_CH0BL_DEFAULT 0x00000001UL

#define	_VDAC_IF_CH0BL_MASK 0x40UL

#define	_VDAC_IF_CH0BL_SHIFT 6

#define	_VDAC_IF_CH0CD_DEFAULT 0x00000000UL

#define	_VDAC_IF_CH0CD_MASK 0x1UL

#define	_VDAC_IF_CH0CD_SHIFT 0

#define	_VDAC_IF_CH0OF_DEFAULT 0x00000000UL

#define	_VDAC_IF_CH0OF_MASK 0x4UL

#define	_VDAC_IF_CH0OF_SHIFT 2

#define	_VDAC_IF_CH0UF_DEFAULT 0x00000000UL

#define	_VDAC_IF_CH0UF_MASK 0x10UL

#define	_VDAC_IF_CH0UF_SHIFT 4

#define	_VDAC_IF_CH1BL_DEFAULT 0x00000001UL

#define	_VDAC_IF_CH1BL_MASK 0x80UL

#define	_VDAC_IF_CH1BL_SHIFT 7

#define	_VDAC_IF_CH1CD_DEFAULT 0x00000000UL

#define	_VDAC_IF_CH1CD_MASK 0x2UL

#define	_VDAC_IF_CH1CD_SHIFT 1

#define	_VDAC_IF_CH1OF_DEFAULT 0x00000000UL

#define	_VDAC_IF_CH1OF_MASK 0x8UL

#define	_VDAC_IF_CH1OF_SHIFT 3

#define	_VDAC_IF_CH1UF_DEFAULT 0x00000000UL

#define	_VDAC_IF_CH1UF_MASK 0x20UL

#define	_VDAC_IF_CH1UF_SHIFT 5

#define	_VDAC_IF_EM23ERR_DEFAULT 0x00000000UL

#define	_VDAC_IF_EM23ERR_MASK 0x8000UL

#define	_VDAC_IF_EM23ERR_SHIFT 15

#define	_VDAC_IF_MASK 0xF0FF80FFUL

#define	_VDAC_IF_OPA0APORTCONFLICT_DEFAULT 0x00000000UL

#define	_VDAC_IF_OPA0APORTCONFLICT_MASK 0x10000UL

#define	_VDAC_IF_OPA0APORTCONFLICT_SHIFT 16

#define	_VDAC_IF_OPA0OUTVALID_DEFAULT 0x00000000UL

#define	_VDAC_IF_OPA0OUTVALID_MASK 0x10000000UL

#define	_VDAC_IF_OPA0OUTVALID_SHIFT 28

#define	_VDAC_IF_OPA0PRSTIMEDERR_DEFAULT 0x00000000UL

#define	_VDAC_IF_OPA0PRSTIMEDERR_MASK 0x100000UL

#define	_VDAC_IF_OPA0PRSTIMEDERR_SHIFT 20

#define	_VDAC_IF_OPA1APORTCONFLICT_DEFAULT 0x00000000UL

#define	_VDAC_IF_OPA1APORTCONFLICT_MASK 0x20000UL

#define	_VDAC_IF_OPA1APORTCONFLICT_SHIFT 17

#define	_VDAC_IF_OPA1OUTVALID_DEFAULT 0x00000000UL

#define	_VDAC_IF_OPA1OUTVALID_MASK 0x20000000UL

#define	_VDAC_IF_OPA1OUTVALID_SHIFT 29

#define	_VDAC_IF_OPA1PRSTIMEDERR_DEFAULT 0x00000000UL

#define	_VDAC_IF_OPA1PRSTIMEDERR_MASK 0x200000UL

#define	_VDAC_IF_OPA1PRSTIMEDERR_SHIFT 21

#define	_VDAC_IF_OPA2APORTCONFLICT_DEFAULT 0x00000000UL

#define	_VDAC_IF_OPA2APORTCONFLICT_MASK 0x40000UL

#define	_VDAC_IF_OPA2APORTCONFLICT_SHIFT 18

#define	_VDAC_IF_OPA2OUTVALID_DEFAULT 0x00000000UL

#define	_VDAC_IF_OPA2OUTVALID_MASK 0x40000000UL

#define	_VDAC_IF_OPA2OUTVALID_SHIFT 30

#define	_VDAC_IF_OPA2PRSTIMEDERR_DEFAULT 0x00000000UL

#define	_VDAC_IF_OPA2PRSTIMEDERR_MASK 0x400000UL

#define	_VDAC_IF_OPA2PRSTIMEDERR_SHIFT 22

#define	_VDAC_IF_OPA3APORTCONFLICT_DEFAULT 0x00000000UL

#define	_VDAC_IF_OPA3APORTCONFLICT_MASK 0x80000UL

#define	_VDAC_IF_OPA3APORTCONFLICT_SHIFT 19

#define	_VDAC_IF_OPA3OUTVALID_DEFAULT 0x00000000UL

#define	_VDAC_IF_OPA3OUTVALID_MASK 0x80000000UL

#define	_VDAC_IF_OPA3OUTVALID_SHIFT 31

#define	_VDAC_IF_OPA3PRSTIMEDERR_DEFAULT 0x00000000UL

#define	_VDAC_IF_OPA3PRSTIMEDERR_MASK 0x800000UL

#define	_VDAC_IF_OPA3PRSTIMEDERR_SHIFT 23

#define	_VDAC_IF_RESETVALUE 0x000000C0UL

#define	_VDAC_IFC_CH0CD_DEFAULT 0x00000000UL

#define	_VDAC_IFC_CH0CD_MASK 0x1UL

#define	_VDAC_IFC_CH0CD_SHIFT 0

#define	_VDAC_IFC_CH0OF_DEFAULT 0x00000000UL

#define	_VDAC_IFC_CH0OF_MASK 0x4UL

#define	_VDAC_IFC_CH0OF_SHIFT 2

#define	_VDAC_IFC_CH0UF_DEFAULT 0x00000000UL

#define	_VDAC_IFC_CH0UF_MASK 0x10UL

#define	_VDAC_IFC_CH0UF_SHIFT 4

#define	_VDAC_IFC_CH1CD_DEFAULT 0x00000000UL

#define	_VDAC_IFC_CH1CD_MASK 0x2UL

#define	_VDAC_IFC_CH1CD_SHIFT 1

#define	_VDAC_IFC_CH1OF_DEFAULT 0x00000000UL

#define	_VDAC_IFC_CH1OF_MASK 0x8UL

#define	_VDAC_IFC_CH1OF_SHIFT 3

#define	_VDAC_IFC_CH1UF_DEFAULT 0x00000000UL

#define	_VDAC_IFC_CH1UF_MASK 0x20UL

#define	_VDAC_IFC_CH1UF_SHIFT 5

#define	_VDAC_IFC_EM23ERR_DEFAULT 0x00000000UL

#define	_VDAC_IFC_EM23ERR_MASK 0x8000UL

#define	_VDAC_IFC_EM23ERR_SHIFT 15

#define	_VDAC_IFC_MASK 0xF0FF803FUL

#define	_VDAC_IFC_OPA0APORTCONFLICT_DEFAULT 0x00000000UL

#define	_VDAC_IFC_OPA0APORTCONFLICT_MASK 0x10000UL

#define	_VDAC_IFC_OPA0APORTCONFLICT_SHIFT 16

#define	_VDAC_IFC_OPA0OUTVALID_DEFAULT 0x00000000UL

#define	_VDAC_IFC_OPA0OUTVALID_MASK 0x10000000UL

#define	_VDAC_IFC_OPA0OUTVALID_SHIFT 28

#define	_VDAC_IFC_OPA0PRSTIMEDERR_DEFAULT 0x00000000UL

#define	_VDAC_IFC_OPA0PRSTIMEDERR_MASK 0x100000UL

#define	_VDAC_IFC_OPA0PRSTIMEDERR_SHIFT 20

#define	_VDAC_IFC_OPA1APORTCONFLICT_DEFAULT 0x00000000UL

#define	_VDAC_IFC_OPA1APORTCONFLICT_MASK 0x20000UL

#define	_VDAC_IFC_OPA1APORTCONFLICT_SHIFT 17

#define	_VDAC_IFC_OPA1OUTVALID_DEFAULT 0x00000000UL

#define	_VDAC_IFC_OPA1OUTVALID_MASK 0x20000000UL

#define	_VDAC_IFC_OPA1OUTVALID_SHIFT 29

#define	_VDAC_IFC_OPA1PRSTIMEDERR_DEFAULT 0x00000000UL

#define	_VDAC_IFC_OPA1PRSTIMEDERR_MASK 0x200000UL

#define	_VDAC_IFC_OPA1PRSTIMEDERR_SHIFT 21

#define	_VDAC_IFC_OPA2APORTCONFLICT_DEFAULT 0x00000000UL

#define	_VDAC_IFC_OPA2APORTCONFLICT_MASK 0x40000UL

#define	_VDAC_IFC_OPA2APORTCONFLICT_SHIFT 18

#define	_VDAC_IFC_OPA2OUTVALID_DEFAULT 0x00000000UL

#define	_VDAC_IFC_OPA2OUTVALID_MASK 0x40000000UL

#define	_VDAC_IFC_OPA2OUTVALID_SHIFT 30

#define	_VDAC_IFC_OPA2PRSTIMEDERR_DEFAULT 0x00000000UL

#define	_VDAC_IFC_OPA2PRSTIMEDERR_MASK 0x400000UL

#define	_VDAC_IFC_OPA2PRSTIMEDERR_SHIFT 22

#define	_VDAC_IFC_OPA3APORTCONFLICT_DEFAULT 0x00000000UL

#define	_VDAC_IFC_OPA3APORTCONFLICT_MASK 0x80000UL

#define	_VDAC_IFC_OPA3APORTCONFLICT_SHIFT 19

#define	_VDAC_IFC_OPA3OUTVALID_DEFAULT 0x00000000UL

#define	_VDAC_IFC_OPA3OUTVALID_MASK 0x80000000UL

#define	_VDAC_IFC_OPA3OUTVALID_SHIFT 31

#define	_VDAC_IFC_OPA3PRSTIMEDERR_DEFAULT 0x00000000UL

#define	_VDAC_IFC_OPA3PRSTIMEDERR_MASK 0x800000UL

#define	_VDAC_IFC_OPA3PRSTIMEDERR_SHIFT 23

#define	_VDAC_IFC_RESETVALUE 0x00000000UL

#define	_VDAC_IFS_CH0CD_DEFAULT 0x00000000UL

#define	_VDAC_IFS_CH0CD_MASK 0x1UL

#define	_VDAC_IFS_CH0CD_SHIFT 0

#define	_VDAC_IFS_CH0OF_DEFAULT 0x00000000UL

#define	_VDAC_IFS_CH0OF_MASK 0x4UL

#define	_VDAC_IFS_CH0OF_SHIFT 2

#define	_VDAC_IFS_CH0UF_DEFAULT 0x00000000UL

#define	_VDAC_IFS_CH0UF_MASK 0x10UL

#define	_VDAC_IFS_CH0UF_SHIFT 4

#define	_VDAC_IFS_CH1CD_DEFAULT 0x00000000UL

#define	_VDAC_IFS_CH1CD_MASK 0x2UL

#define	_VDAC_IFS_CH1CD_SHIFT 1

#define	_VDAC_IFS_CH1OF_DEFAULT 0x00000000UL

#define	_VDAC_IFS_CH1OF_MASK 0x8UL

#define	_VDAC_IFS_CH1OF_SHIFT 3

#define	_VDAC_IFS_CH1UF_DEFAULT 0x00000000UL

#define	_VDAC_IFS_CH1UF_MASK 0x20UL

#define	_VDAC_IFS_CH1UF_SHIFT 5

#define	_VDAC_IFS_EM23ERR_DEFAULT 0x00000000UL

#define	_VDAC_IFS_EM23ERR_MASK 0x8000UL

#define	_VDAC_IFS_EM23ERR_SHIFT 15

#define	_VDAC_IFS_MASK 0xF0FF803FUL

#define	_VDAC_IFS_OPA0APORTCONFLICT_DEFAULT 0x00000000UL

#define	_VDAC_IFS_OPA0APORTCONFLICT_MASK 0x10000UL

#define	_VDAC_IFS_OPA0APORTCONFLICT_SHIFT 16

#define	_VDAC_IFS_OPA0OUTVALID_DEFAULT 0x00000000UL

#define	_VDAC_IFS_OPA0OUTVALID_MASK 0x10000000UL

#define	_VDAC_IFS_OPA0OUTVALID_SHIFT 28

#define	_VDAC_IFS_OPA0PRSTIMEDERR_DEFAULT 0x00000000UL

#define	_VDAC_IFS_OPA0PRSTIMEDERR_MASK 0x100000UL

#define	_VDAC_IFS_OPA0PRSTIMEDERR_SHIFT 20

#define	_VDAC_IFS_OPA1APORTCONFLICT_DEFAULT 0x00000000UL

#define	_VDAC_IFS_OPA1APORTCONFLICT_MASK 0x20000UL

#define	_VDAC_IFS_OPA1APORTCONFLICT_SHIFT 17

#define	_VDAC_IFS_OPA1OUTVALID_DEFAULT 0x00000000UL

#define	_VDAC_IFS_OPA1OUTVALID_MASK 0x20000000UL

#define	_VDAC_IFS_OPA1OUTVALID_SHIFT 29

#define	_VDAC_IFS_OPA1PRSTIMEDERR_DEFAULT 0x00000000UL

#define	_VDAC_IFS_OPA1PRSTIMEDERR_MASK 0x200000UL

#define	_VDAC_IFS_OPA1PRSTIMEDERR_SHIFT 21

#define	_VDAC_IFS_OPA2APORTCONFLICT_DEFAULT 0x00000000UL

#define	_VDAC_IFS_OPA2APORTCONFLICT_MASK 0x40000UL

#define	_VDAC_IFS_OPA2APORTCONFLICT_SHIFT 18

#define	_VDAC_IFS_OPA2OUTVALID_DEFAULT 0x00000000UL

#define	_VDAC_IFS_OPA2OUTVALID_MASK 0x40000000UL

#define	_VDAC_IFS_OPA2OUTVALID_SHIFT 30

#define	_VDAC_IFS_OPA2PRSTIMEDERR_DEFAULT 0x00000000UL

#define	_VDAC_IFS_OPA2PRSTIMEDERR_MASK 0x400000UL

#define	_VDAC_IFS_OPA2PRSTIMEDERR_SHIFT 22

#define	_VDAC_IFS_OPA3APORTCONFLICT_DEFAULT 0x00000000UL

#define	_VDAC_IFS_OPA3APORTCONFLICT_MASK 0x80000UL

#define	_VDAC_IFS_OPA3APORTCONFLICT_SHIFT 19

#define	_VDAC_IFS_OPA3OUTVALID_DEFAULT 0x00000000UL

#define	_VDAC_IFS_OPA3OUTVALID_MASK 0x80000000UL

#define	_VDAC_IFS_OPA3OUTVALID_SHIFT 31

#define	_VDAC_IFS_OPA3PRSTIMEDERR_DEFAULT 0x00000000UL

#define	_VDAC_IFS_OPA3PRSTIMEDERR_MASK 0x800000UL

#define	_VDAC_IFS_OPA3PRSTIMEDERR_SHIFT 23

#define	_VDAC_IFS_RESETVALUE 0x00000000UL

#define	_VDAC_OPA_APORTCONFLICT_APORT1XCONFLICT_DEFAULT 0x00000000UL

#define	_VDAC_OPA_APORTCONFLICT_APORT1XCONFLICT_MASK 0x4UL

#define	_VDAC_OPA_APORTCONFLICT_APORT1XCONFLICT_SHIFT 2

#define	_VDAC_OPA_APORTCONFLICT_APORT1YCONFLICT_DEFAULT 0x00000000UL

#define	_VDAC_OPA_APORTCONFLICT_APORT1YCONFLICT_MASK 0x8UL

#define	_VDAC_OPA_APORTCONFLICT_APORT1YCONFLICT_SHIFT 3

#define	_VDAC_OPA_APORTCONFLICT_APORT2XCONFLICT_DEFAULT 0x00000000UL

#define	_VDAC_OPA_APORTCONFLICT_APORT2XCONFLICT_MASK 0x10UL

#define	_VDAC_OPA_APORTCONFLICT_APORT2XCONFLICT_SHIFT 4

#define	_VDAC_OPA_APORTCONFLICT_APORT2YCONFLICT_DEFAULT 0x00000000UL

#define	_VDAC_OPA_APORTCONFLICT_APORT2YCONFLICT_MASK 0x20UL

#define	_VDAC_OPA_APORTCONFLICT_APORT2YCONFLICT_SHIFT 5

#define	_VDAC_OPA_APORTCONFLICT_APORT3XCONFLICT_DEFAULT 0x00000000UL

#define	_VDAC_OPA_APORTCONFLICT_APORT3XCONFLICT_MASK 0x40UL

#define	_VDAC_OPA_APORTCONFLICT_APORT3XCONFLICT_SHIFT 6

#define	_VDAC_OPA_APORTCONFLICT_APORT3YCONFLICT_DEFAULT 0x00000000UL

#define	_VDAC_OPA_APORTCONFLICT_APORT3YCONFLICT_MASK 0x80UL

#define	_VDAC_OPA_APORTCONFLICT_APORT3YCONFLICT_SHIFT 7

#define	_VDAC_OPA_APORTCONFLICT_APORT4XCONFLICT_DEFAULT 0x00000000UL

#define	_VDAC_OPA_APORTCONFLICT_APORT4XCONFLICT_MASK 0x100UL

#define	_VDAC_OPA_APORTCONFLICT_APORT4XCONFLICT_SHIFT 8

#define	_VDAC_OPA_APORTCONFLICT_APORT4YCONFLICT_DEFAULT 0x00000000UL

#define	_VDAC_OPA_APORTCONFLICT_APORT4YCONFLICT_MASK 0x200UL

#define	_VDAC_OPA_APORTCONFLICT_APORT4YCONFLICT_SHIFT 9

#define	_VDAC_OPA_APORTCONFLICT_MASK 0x000003FCUL

#define	_VDAC_OPA_APORTCONFLICT_RESETVALUE 0x00000000UL

#define	_VDAC_OPA_APORTREQ_APORT1XREQ_DEFAULT 0x00000000UL

#define	_VDAC_OPA_APORTREQ_APORT1XREQ_MASK 0x4UL

#define	_VDAC_OPA_APORTREQ_APORT1XREQ_SHIFT 2

#define	_VDAC_OPA_APORTREQ_APORT1YREQ_DEFAULT 0x00000000UL

#define	_VDAC_OPA_APORTREQ_APORT1YREQ_MASK 0x8UL

#define	_VDAC_OPA_APORTREQ_APORT1YREQ_SHIFT 3

#define	_VDAC_OPA_APORTREQ_APORT2XREQ_DEFAULT 0x00000000UL

#define	_VDAC_OPA_APORTREQ_APORT2XREQ_MASK 0x10UL

#define	_VDAC_OPA_APORTREQ_APORT2XREQ_SHIFT 4

#define	_VDAC_OPA_APORTREQ_APORT2YREQ_DEFAULT 0x00000000UL

#define	_VDAC_OPA_APORTREQ_APORT2YREQ_MASK 0x20UL

#define	_VDAC_OPA_APORTREQ_APORT2YREQ_SHIFT 5

#define	_VDAC_OPA_APORTREQ_APORT3XREQ_DEFAULT 0x00000000UL

#define	_VDAC_OPA_APORTREQ_APORT3XREQ_MASK 0x40UL

#define	_VDAC_OPA_APORTREQ_APORT3XREQ_SHIFT 6

#define	_VDAC_OPA_APORTREQ_APORT3YREQ_DEFAULT 0x00000000UL

#define	_VDAC_OPA_APORTREQ_APORT3YREQ_MASK 0x80UL

#define	_VDAC_OPA_APORTREQ_APORT3YREQ_SHIFT 7

#define	_VDAC_OPA_APORTREQ_APORT4XREQ_DEFAULT 0x00000000UL

#define	_VDAC_OPA_APORTREQ_APORT4XREQ_MASK 0x100UL

#define	_VDAC_OPA_APORTREQ_APORT4XREQ_SHIFT 8

#define	_VDAC_OPA_APORTREQ_APORT4YREQ_DEFAULT 0x00000000UL

#define	_VDAC_OPA_APORTREQ_APORT4YREQ_MASK 0x200UL

#define	_VDAC_OPA_APORTREQ_APORT4YREQ_SHIFT 9

#define	_VDAC_OPA_APORTREQ_MASK 0x000003FCUL

#define	_VDAC_OPA_APORTREQ_RESETVALUE 0x00000000UL

#define	_VDAC_OPA_CAL_CM1_DEFAULT 0x00000007UL

#define	_VDAC_OPA_CAL_CM1_MASK 0xFUL

#define	_VDAC_OPA_CAL_CM1_SHIFT 0

#define	_VDAC_OPA_CAL_CM2_DEFAULT 0x00000007UL

#define	_VDAC_OPA_CAL_CM2_MASK 0x1E0UL

#define	_VDAC_OPA_CAL_CM2_SHIFT 5

#define	_VDAC_OPA_CAL_CM3_DEFAULT 0x00000000UL

#define	_VDAC_OPA_CAL_CM3_MASK 0xC00UL

#define	_VDAC_OPA_CAL_CM3_SHIFT 10

#define	_VDAC_OPA_CAL_GM3_DEFAULT 0x00000000UL

#define	_VDAC_OPA_CAL_GM3_MASK 0x60000UL

#define	_VDAC_OPA_CAL_GM3_SHIFT 17

#define	_VDAC_OPA_CAL_GM_DEFAULT 0x00000004UL

#define	_VDAC_OPA_CAL_GM_MASK 0xE000UL

#define	_VDAC_OPA_CAL_GM_SHIFT 13

#define	_VDAC_OPA_CAL_MASK 0x7DF6EDEFUL

#define	_VDAC_OPA_CAL_OFFSETN_DEFAULT 0x00000000UL

#define	_VDAC_OPA_CAL_OFFSETN_MASK 0x7C000000UL

#define	_VDAC_OPA_CAL_OFFSETN_SHIFT 26

#define	_VDAC_OPA_CAL_OFFSETP_DEFAULT 0x00000000UL

#define	_VDAC_OPA_CAL_OFFSETP_MASK 0x1F00000UL

#define	_VDAC_OPA_CAL_OFFSETP_SHIFT 20

#define	_VDAC_OPA_CAL_RESETVALUE 0x000080E7UL

#define	_VDAC_OPA_CTRL_APORTXMASTERDIS_DEFAULT 0x00000000UL

#define	_VDAC_OPA_CTRL_APORTXMASTERDIS_MASK 0x100000UL

#define	_VDAC_OPA_CTRL_APORTXMASTERDIS_SHIFT 20

#define	_VDAC_OPA_CTRL_APORTYMASTERDIS_DEFAULT 0x00000000UL

#define	_VDAC_OPA_CTRL_APORTYMASTERDIS_MASK 0x200000UL

#define	_VDAC_OPA_CTRL_APORTYMASTERDIS_SHIFT 21

#define	_VDAC_OPA_CTRL_DRIVESTRENGTH_DEFAULT 0x00000002UL

#define	_VDAC_OPA_CTRL_DRIVESTRENGTH_MASK 0x3UL

#define	_VDAC_OPA_CTRL_DRIVESTRENGTH_SHIFT 0

#define	_VDAC_OPA_CTRL_HCMDIS_DEFAULT 0x00000001UL

#define	_VDAC_OPA_CTRL_HCMDIS_MASK 0x8UL

#define	_VDAC_OPA_CTRL_HCMDIS_SHIFT 3

#define	_VDAC_OPA_CTRL_INCBW_DEFAULT 0x00000001UL

#define	_VDAC_OPA_CTRL_INCBW_MASK 0x4UL

#define	_VDAC_OPA_CTRL_INCBW_SHIFT 2

#define	_VDAC_OPA_CTRL_MASK 0x00313F1FUL

#define	_VDAC_OPA_CTRL_OUTSCALE_DEFAULT 0x00000000UL

#define	_VDAC_OPA_CTRL_OUTSCALE_FULL 0x00000000UL

#define	_VDAC_OPA_CTRL_OUTSCALE_HALF 0x00000001UL

#define	_VDAC_OPA_CTRL_OUTSCALE_MASK 0x10UL

#define	_VDAC_OPA_CTRL_OUTSCALE_SHIFT 4

#define	_VDAC_OPA_CTRL_PRSEN_DEFAULT 0x00000000UL

#define	_VDAC_OPA_CTRL_PRSEN_MASK 0x100UL

#define	_VDAC_OPA_CTRL_PRSEN_SHIFT 8

#define	_VDAC_OPA_CTRL_PRSMODE_DEFAULT 0x00000000UL

#define	_VDAC_OPA_CTRL_PRSMODE_MASK 0x200UL

#define	_VDAC_OPA_CTRL_PRSMODE_PULSED 0x00000000UL

#define	_VDAC_OPA_CTRL_PRSMODE_SHIFT 9

#define	_VDAC_OPA_CTRL_PRSMODE_TIMED 0x00000001UL

#define	_VDAC_OPA_CTRL_PRSOUTMODE_DEFAULT 0x00000000UL

#define	_VDAC_OPA_CTRL_PRSOUTMODE_MASK 0x10000UL

#define	_VDAC_OPA_CTRL_PRSOUTMODE_OUTVALID 0x00000001UL

#define	_VDAC_OPA_CTRL_PRSOUTMODE_SHIFT 16

#define	_VDAC_OPA_CTRL_PRSOUTMODE_WARM 0x00000000UL

#define	_VDAC_OPA_CTRL_PRSSEL_DEFAULT 0x00000000UL

#define	_VDAC_OPA_CTRL_PRSSEL_MASK 0x3C00UL

#define	_VDAC_OPA_CTRL_PRSSEL_PRSCH0 0x00000000UL

#define	_VDAC_OPA_CTRL_PRSSEL_PRSCH1 0x00000001UL

#define	_VDAC_OPA_CTRL_PRSSEL_PRSCH10 0x0000000AUL

#define	_VDAC_OPA_CTRL_PRSSEL_PRSCH11 0x0000000BUL

#define	_VDAC_OPA_CTRL_PRSSEL_PRSCH12 0x0000000CUL

#define	_VDAC_OPA_CTRL_PRSSEL_PRSCH13 0x0000000DUL

#define	_VDAC_OPA_CTRL_PRSSEL_PRSCH14 0x0000000EUL

#define	_VDAC_OPA_CTRL_PRSSEL_PRSCH15 0x0000000FUL

#define	_VDAC_OPA_CTRL_PRSSEL_PRSCH2 0x00000002UL

#define	_VDAC_OPA_CTRL_PRSSEL_PRSCH3 0x00000003UL

#define	_VDAC_OPA_CTRL_PRSSEL_PRSCH4 0x00000004UL

#define	_VDAC_OPA_CTRL_PRSSEL_PRSCH5 0x00000005UL

#define	_VDAC_OPA_CTRL_PRSSEL_PRSCH6 0x00000006UL

#define	_VDAC_OPA_CTRL_PRSSEL_PRSCH7 0x00000007UL

#define	_VDAC_OPA_CTRL_PRSSEL_PRSCH8 0x00000008UL

#define	_VDAC_OPA_CTRL_PRSSEL_PRSCH9 0x00000009UL

#define	_VDAC_OPA_CTRL_PRSSEL_SHIFT 10

#define	_VDAC_OPA_CTRL_RESETVALUE 0x0000000EUL

#define	_VDAC_OPA_MUX_GAIN3X_DEFAULT 0x00000001UL

#define	_VDAC_OPA_MUX_GAIN3X_MASK 0x100000UL

#define	_VDAC_OPA_MUX_GAIN3X_SHIFT 20

#define	_VDAC_OPA_MUX_MASK 0x0717FFFFUL

#define	_VDAC_OPA_MUX_NEGSEL_APORT1YCH1 0x00000030UL

#define	_VDAC_OPA_MUX_NEGSEL_APORT1YCH11 0x00000035UL

#define	_VDAC_OPA_MUX_NEGSEL_APORT1YCH13 0x00000036UL

#define	_VDAC_OPA_MUX_NEGSEL_APORT1YCH15 0x00000037UL

#define	_VDAC_OPA_MUX_NEGSEL_APORT1YCH17 0x00000038UL

#define	_VDAC_OPA_MUX_NEGSEL_APORT1YCH19 0x00000039UL

#define	_VDAC_OPA_MUX_NEGSEL_APORT1YCH21 0x0000003AUL

#define	_VDAC_OPA_MUX_NEGSEL_APORT1YCH23 0x0000003BUL

#define	_VDAC_OPA_MUX_NEGSEL_APORT1YCH25 0x0000003CUL

#define	_VDAC_OPA_MUX_NEGSEL_APORT1YCH27 0x0000003DUL

#define	_VDAC_OPA_MUX_NEGSEL_APORT1YCH29 0x0000003EUL

#define	_VDAC_OPA_MUX_NEGSEL_APORT1YCH3 0x00000031UL

#define	_VDAC_OPA_MUX_NEGSEL_APORT1YCH31 0x0000003FUL

#define	_VDAC_OPA_MUX_NEGSEL_APORT1YCH5 0x00000032UL

#define	_VDAC_OPA_MUX_NEGSEL_APORT1YCH7 0x00000033UL

#define	_VDAC_OPA_MUX_NEGSEL_APORT1YCH9 0x00000034UL

#define	_VDAC_OPA_MUX_NEGSEL_APORT2YCH0 0x00000050UL

#define	_VDAC_OPA_MUX_NEGSEL_APORT2YCH10 0x00000055UL

#define	_VDAC_OPA_MUX_NEGSEL_APORT2YCH12 0x00000056UL

#define	_VDAC_OPA_MUX_NEGSEL_APORT2YCH14 0x00000057UL

#define	_VDAC_OPA_MUX_NEGSEL_APORT2YCH16 0x00000058UL

#define	_VDAC_OPA_MUX_NEGSEL_APORT2YCH18 0x00000059UL

#define	_VDAC_OPA_MUX_NEGSEL_APORT2YCH2 0x00000051UL

#define	_VDAC_OPA_MUX_NEGSEL_APORT2YCH20 0x0000005AUL

#define	_VDAC_OPA_MUX_NEGSEL_APORT2YCH22 0x0000005BUL

#define	_VDAC_OPA_MUX_NEGSEL_APORT2YCH24 0x0000005CUL

#define	_VDAC_OPA_MUX_NEGSEL_APORT2YCH26 0x0000005DUL

#define	_VDAC_OPA_MUX_NEGSEL_APORT2YCH28 0x0000005EUL

#define	_VDAC_OPA_MUX_NEGSEL_APORT2YCH30 0x0000005FUL

#define	_VDAC_OPA_MUX_NEGSEL_APORT2YCH4 0x00000052UL

#define	_VDAC_OPA_MUX_NEGSEL_APORT2YCH6 0x00000053UL

#define	_VDAC_OPA_MUX_NEGSEL_APORT2YCH8 0x00000054UL

#define	_VDAC_OPA_MUX_NEGSEL_APORT3YCH1 0x00000070UL

#define	_VDAC_OPA_MUX_NEGSEL_APORT3YCH11 0x00000075UL

#define	_VDAC_OPA_MUX_NEGSEL_APORT3YCH13 0x00000076UL

#define	_VDAC_OPA_MUX_NEGSEL_APORT3YCH15 0x00000077UL

#define	_VDAC_OPA_MUX_NEGSEL_APORT3YCH17 0x00000078UL

#define	_VDAC_OPA_MUX_NEGSEL_APORT3YCH19 0x00000079UL

#define	_VDAC_OPA_MUX_NEGSEL_APORT3YCH21 0x0000007AUL

#define	_VDAC_OPA_MUX_NEGSEL_APORT3YCH23 0x0000007BUL

#define	_VDAC_OPA_MUX_NEGSEL_APORT3YCH25 0x0000007CUL

#define	_VDAC_OPA_MUX_NEGSEL_APORT3YCH27 0x0000007DUL

#define	_VDAC_OPA_MUX_NEGSEL_APORT3YCH29 0x0000007EUL

#define	_VDAC_OPA_MUX_NEGSEL_APORT3YCH3 0x00000071UL

#define	_VDAC_OPA_MUX_NEGSEL_APORT3YCH31 0x0000007FUL

#define	_VDAC_OPA_MUX_NEGSEL_APORT3YCH5 0x00000072UL

#define	_VDAC_OPA_MUX_NEGSEL_APORT3YCH7 0x00000073UL

#define	_VDAC_OPA_MUX_NEGSEL_APORT3YCH9 0x00000074UL

#define	_VDAC_OPA_MUX_NEGSEL_APORT4YCH0 0x00000090UL

#define	_VDAC_OPA_MUX_NEGSEL_APORT4YCH10 0x00000095UL

#define	_VDAC_OPA_MUX_NEGSEL_APORT4YCH12 0x00000096UL

#define	_VDAC_OPA_MUX_NEGSEL_APORT4YCH14 0x00000097UL

#define	_VDAC_OPA_MUX_NEGSEL_APORT4YCH16 0x00000098UL

#define	_VDAC_OPA_MUX_NEGSEL_APORT4YCH18 0x00000099UL

#define	_VDAC_OPA_MUX_NEGSEL_APORT4YCH2 0x00000091UL

#define	_VDAC_OPA_MUX_NEGSEL_APORT4YCH20 0x0000009AUL

#define	_VDAC_OPA_MUX_NEGSEL_APORT4YCH22 0x0000009BUL

#define	_VDAC_OPA_MUX_NEGSEL_APORT4YCH24 0x0000009CUL

#define	_VDAC_OPA_MUX_NEGSEL_APORT4YCH26 0x0000009DUL

#define	_VDAC_OPA_MUX_NEGSEL_APORT4YCH28 0x0000009EUL

#define	_VDAC_OPA_MUX_NEGSEL_APORT4YCH30 0x0000009FUL

#define	_VDAC_OPA_MUX_NEGSEL_APORT4YCH4 0x00000092UL

#define	_VDAC_OPA_MUX_NEGSEL_APORT4YCH6 0x00000093UL

#define	_VDAC_OPA_MUX_NEGSEL_APORT4YCH8 0x00000094UL

#define	_VDAC_OPA_MUX_NEGSEL_DEFAULT 0x000000F2UL

#define	_VDAC_OPA_MUX_NEGSEL_DISABLE 0x000000F0UL

#define	_VDAC_OPA_MUX_NEGSEL_MASK 0xFF00UL

#define	_VDAC_OPA_MUX_NEGSEL_NEGPAD 0x000000F3UL

#define	_VDAC_OPA_MUX_NEGSEL_OPATAP 0x000000F2UL

#define	_VDAC_OPA_MUX_NEGSEL_SHIFT 8

#define	_VDAC_OPA_MUX_NEGSEL_UG 0x000000F1UL

#define	_VDAC_OPA_MUX_POSSEL_APORT1XCH0 0x00000020UL

#define	_VDAC_OPA_MUX_POSSEL_APORT1XCH10 0x00000025UL

#define	_VDAC_OPA_MUX_POSSEL_APORT1XCH12 0x00000026UL

#define	_VDAC_OPA_MUX_POSSEL_APORT1XCH14 0x00000027UL

#define	_VDAC_OPA_MUX_POSSEL_APORT1XCH16 0x00000028UL

#define	_VDAC_OPA_MUX_POSSEL_APORT1XCH18 0x00000029UL

#define	_VDAC_OPA_MUX_POSSEL_APORT1XCH2 0x00000021UL

#define	_VDAC_OPA_MUX_POSSEL_APORT1XCH20 0x0000002AUL

#define	_VDAC_OPA_MUX_POSSEL_APORT1XCH22 0x0000002BUL

#define	_VDAC_OPA_MUX_POSSEL_APORT1XCH24 0x0000002CUL

#define	_VDAC_OPA_MUX_POSSEL_APORT1XCH26 0x0000002DUL

#define	_VDAC_OPA_MUX_POSSEL_APORT1XCH28 0x0000002EUL

#define	_VDAC_OPA_MUX_POSSEL_APORT1XCH30 0x0000002FUL

#define	_VDAC_OPA_MUX_POSSEL_APORT1XCH4 0x00000022UL

#define	_VDAC_OPA_MUX_POSSEL_APORT1XCH6 0x00000023UL

#define	_VDAC_OPA_MUX_POSSEL_APORT1XCH8 0x00000024UL

#define	_VDAC_OPA_MUX_POSSEL_APORT2XCH1 0x00000040UL

#define	_VDAC_OPA_MUX_POSSEL_APORT2XCH11 0x00000045UL

#define	_VDAC_OPA_MUX_POSSEL_APORT2XCH13 0x00000046UL

#define	_VDAC_OPA_MUX_POSSEL_APORT2XCH15 0x00000047UL

#define	_VDAC_OPA_MUX_POSSEL_APORT2XCH17 0x00000048UL

#define	_VDAC_OPA_MUX_POSSEL_APORT2XCH19 0x00000049UL

#define	_VDAC_OPA_MUX_POSSEL_APORT2XCH21 0x0000004AUL

#define	_VDAC_OPA_MUX_POSSEL_APORT2XCH23 0x0000004BUL

#define	_VDAC_OPA_MUX_POSSEL_APORT2XCH25 0x0000004CUL

#define	_VDAC_OPA_MUX_POSSEL_APORT2XCH27 0x0000004DUL

#define	_VDAC_OPA_MUX_POSSEL_APORT2XCH29 0x0000004EUL

#define	_VDAC_OPA_MUX_POSSEL_APORT2XCH3 0x00000041UL

#define	_VDAC_OPA_MUX_POSSEL_APORT2XCH31 0x0000004FUL

#define	_VDAC_OPA_MUX_POSSEL_APORT2XCH5 0x00000042UL

#define	_VDAC_OPA_MUX_POSSEL_APORT2XCH7 0x00000043UL

#define	_VDAC_OPA_MUX_POSSEL_APORT2XCH9 0x00000044UL

#define	_VDAC_OPA_MUX_POSSEL_APORT3XCH0 0x00000060UL

#define	_VDAC_OPA_MUX_POSSEL_APORT3XCH10 0x00000065UL

#define	_VDAC_OPA_MUX_POSSEL_APORT3XCH12 0x00000066UL

#define	_VDAC_OPA_MUX_POSSEL_APORT3XCH14 0x00000067UL

#define	_VDAC_OPA_MUX_POSSEL_APORT3XCH16 0x00000068UL

#define	_VDAC_OPA_MUX_POSSEL_APORT3XCH18 0x00000069UL

#define	_VDAC_OPA_MUX_POSSEL_APORT3XCH2 0x00000061UL

#define	_VDAC_OPA_MUX_POSSEL_APORT3XCH20 0x0000006AUL

#define	_VDAC_OPA_MUX_POSSEL_APORT3XCH22 0x0000006BUL

#define	_VDAC_OPA_MUX_POSSEL_APORT3XCH24 0x0000006CUL

#define	_VDAC_OPA_MUX_POSSEL_APORT3XCH26 0x0000006DUL

#define	_VDAC_OPA_MUX_POSSEL_APORT3XCH28 0x0000006EUL

#define	_VDAC_OPA_MUX_POSSEL_APORT3XCH30 0x0000006FUL

#define	_VDAC_OPA_MUX_POSSEL_APORT3XCH4 0x00000062UL

#define	_VDAC_OPA_MUX_POSSEL_APORT3XCH6 0x00000063UL

#define	_VDAC_OPA_MUX_POSSEL_APORT3XCH8 0x00000064UL

#define	_VDAC_OPA_MUX_POSSEL_APORT4XCH1 0x00000080UL

#define	_VDAC_OPA_MUX_POSSEL_APORT4XCH11 0x00000085UL

#define	_VDAC_OPA_MUX_POSSEL_APORT4XCH13 0x00000086UL

#define	_VDAC_OPA_MUX_POSSEL_APORT4XCH15 0x00000087UL

#define	_VDAC_OPA_MUX_POSSEL_APORT4XCH17 0x00000088UL

#define	_VDAC_OPA_MUX_POSSEL_APORT4XCH19 0x00000089UL

#define	_VDAC_OPA_MUX_POSSEL_APORT4XCH21 0x0000008AUL

#define	_VDAC_OPA_MUX_POSSEL_APORT4XCH23 0x0000008BUL

#define	_VDAC_OPA_MUX_POSSEL_APORT4XCH25 0x0000008CUL

#define	_VDAC_OPA_MUX_POSSEL_APORT4XCH27 0x0000008DUL

#define	_VDAC_OPA_MUX_POSSEL_APORT4XCH29 0x0000008EUL

#define	_VDAC_OPA_MUX_POSSEL_APORT4XCH3 0x00000081UL

#define	_VDAC_OPA_MUX_POSSEL_APORT4XCH31 0x0000008FUL

#define	_VDAC_OPA_MUX_POSSEL_APORT4XCH5 0x00000082UL

#define	_VDAC_OPA_MUX_POSSEL_APORT4XCH7 0x00000083UL

#define	_VDAC_OPA_MUX_POSSEL_APORT4XCH9 0x00000084UL

#define	_VDAC_OPA_MUX_POSSEL_DAC 0x000000F1UL

#define	_VDAC_OPA_MUX_POSSEL_DEFAULT 0x000000F1UL

#define	_VDAC_OPA_MUX_POSSEL_DISABLE 0x000000F0UL

#define	_VDAC_OPA_MUX_POSSEL_MASK 0xFFUL

#define	_VDAC_OPA_MUX_POSSEL_OPANEXT 0x000000F3UL

#define	_VDAC_OPA_MUX_POSSEL_OPATAP 0x000000F4UL

#define	_VDAC_OPA_MUX_POSSEL_POSPAD 0x000000F2UL

#define	_VDAC_OPA_MUX_POSSEL_SHIFT 0

#define	_VDAC_OPA_MUX_RESETVALUE 0x0016F2F1UL

#define	_VDAC_OPA_MUX_RESINMUX_CENTER 0x00000005UL

#define	_VDAC_OPA_MUX_RESINMUX_COMPAD 0x00000004UL

#define	_VDAC_OPA_MUX_RESINMUX_DEFAULT 0x00000006UL

#define	_VDAC_OPA_MUX_RESINMUX_DISABLE 0x00000000UL

#define	_VDAC_OPA_MUX_RESINMUX_MASK 0x70000UL

#define	_VDAC_OPA_MUX_RESINMUX_NEGPAD 0x00000002UL

#define	_VDAC_OPA_MUX_RESINMUX_OPANEXT 0x00000001UL

#define	_VDAC_OPA_MUX_RESINMUX_POSPAD 0x00000003UL

#define	_VDAC_OPA_MUX_RESINMUX_SHIFT 16

#define	_VDAC_OPA_MUX_RESINMUX_VSS 0x00000006UL

#define	_VDAC_OPA_MUX_RESSEL_DEFAULT 0x00000000UL

#define	_VDAC_OPA_MUX_RESSEL_MASK 0x7000000UL

#define	_VDAC_OPA_MUX_RESSEL_RES0 0x00000000UL

#define	_VDAC_OPA_MUX_RESSEL_RES1 0x00000001UL

#define	_VDAC_OPA_MUX_RESSEL_RES2 0x00000002UL

#define	_VDAC_OPA_MUX_RESSEL_RES3 0x00000003UL

#define	_VDAC_OPA_MUX_RESSEL_RES4 0x00000004UL

#define	_VDAC_OPA_MUX_RESSEL_RES5 0x00000005UL

#define	_VDAC_OPA_MUX_RESSEL_RES6 0x00000006UL

#define	_VDAC_OPA_MUX_RESSEL_RES7 0x00000007UL

#define	_VDAC_OPA_MUX_RESSEL_SHIFT 24

#define	_VDAC_OPA_OUT_ALTOUTEN_DEFAULT 0x00000000UL

#define	_VDAC_OPA_OUT_ALTOUTEN_MASK 0x2UL

#define	_VDAC_OPA_OUT_ALTOUTEN_SHIFT 1

#define	_VDAC_OPA_OUT_ALTOUTPADEN_DEFAULT 0x00000000UL

#define	_VDAC_OPA_OUT_ALTOUTPADEN_MASK 0x1F0UL

#define	_VDAC_OPA_OUT_ALTOUTPADEN_OUT0 0x00000001UL

#define	_VDAC_OPA_OUT_ALTOUTPADEN_OUT1 0x00000002UL

#define	_VDAC_OPA_OUT_ALTOUTPADEN_OUT2 0x00000004UL

#define	_VDAC_OPA_OUT_ALTOUTPADEN_OUT3 0x00000008UL

#define	_VDAC_OPA_OUT_ALTOUTPADEN_OUT4 0x00000010UL

#define	_VDAC_OPA_OUT_ALTOUTPADEN_SHIFT 4

#define	_VDAC_OPA_OUT_APORTOUTEN_DEFAULT 0x00000000UL

#define	_VDAC_OPA_OUT_APORTOUTEN_MASK 0x4UL

#define	_VDAC_OPA_OUT_APORTOUTEN_SHIFT 2

#define	_VDAC_OPA_OUT_APORTOUTSEL_APORT1YCH1 0x00000030UL

#define	_VDAC_OPA_OUT_APORTOUTSEL_APORT1YCH11 0x00000035UL

#define	_VDAC_OPA_OUT_APORTOUTSEL_APORT1YCH13 0x00000036UL

#define	_VDAC_OPA_OUT_APORTOUTSEL_APORT1YCH15 0x00000037UL

#define	_VDAC_OPA_OUT_APORTOUTSEL_APORT1YCH17 0x00000038UL

#define	_VDAC_OPA_OUT_APORTOUTSEL_APORT1YCH19 0x00000039UL

#define	_VDAC_OPA_OUT_APORTOUTSEL_APORT1YCH21 0x0000003AUL

#define	_VDAC_OPA_OUT_APORTOUTSEL_APORT1YCH23 0x0000003BUL

#define	_VDAC_OPA_OUT_APORTOUTSEL_APORT1YCH25 0x0000003CUL

#define	_VDAC_OPA_OUT_APORTOUTSEL_APORT1YCH27 0x0000003DUL

#define	_VDAC_OPA_OUT_APORTOUTSEL_APORT1YCH29 0x0000003EUL

#define	_VDAC_OPA_OUT_APORTOUTSEL_APORT1YCH3 0x00000031UL

#define	_VDAC_OPA_OUT_APORTOUTSEL_APORT1YCH31 0x0000003FUL

#define	_VDAC_OPA_OUT_APORTOUTSEL_APORT1YCH5 0x00000032UL

#define	_VDAC_OPA_OUT_APORTOUTSEL_APORT1YCH7 0x00000033UL

#define	_VDAC_OPA_OUT_APORTOUTSEL_APORT1YCH9 0x00000034UL

#define	_VDAC_OPA_OUT_APORTOUTSEL_APORT2YCH0 0x00000050UL

#define	_VDAC_OPA_OUT_APORTOUTSEL_APORT2YCH10 0x00000055UL

#define	_VDAC_OPA_OUT_APORTOUTSEL_APORT2YCH12 0x00000056UL

#define	_VDAC_OPA_OUT_APORTOUTSEL_APORT2YCH14 0x00000057UL

#define	_VDAC_OPA_OUT_APORTOUTSEL_APORT2YCH16 0x00000058UL

#define	_VDAC_OPA_OUT_APORTOUTSEL_APORT2YCH18 0x00000059UL

#define	_VDAC_OPA_OUT_APORTOUTSEL_APORT2YCH2 0x00000051UL

#define	_VDAC_OPA_OUT_APORTOUTSEL_APORT2YCH20 0x0000005AUL

#define	_VDAC_OPA_OUT_APORTOUTSEL_APORT2YCH22 0x0000005BUL

#define	_VDAC_OPA_OUT_APORTOUTSEL_APORT2YCH24 0x0000005CUL

#define	_VDAC_OPA_OUT_APORTOUTSEL_APORT2YCH26 0x0000005DUL

#define	_VDAC_OPA_OUT_APORTOUTSEL_APORT2YCH28 0x0000005EUL

#define	_VDAC_OPA_OUT_APORTOUTSEL_APORT2YCH30 0x0000005FUL

#define	_VDAC_OPA_OUT_APORTOUTSEL_APORT2YCH4 0x00000052UL

#define	_VDAC_OPA_OUT_APORTOUTSEL_APORT2YCH6 0x00000053UL

#define	_VDAC_OPA_OUT_APORTOUTSEL_APORT2YCH8 0x00000054UL

#define	_VDAC_OPA_OUT_APORTOUTSEL_APORT3YCH1 0x00000070UL

#define	_VDAC_OPA_OUT_APORTOUTSEL_APORT3YCH11 0x00000075UL

#define	_VDAC_OPA_OUT_APORTOUTSEL_APORT3YCH13 0x00000076UL

#define	_VDAC_OPA_OUT_APORTOUTSEL_APORT3YCH15 0x00000077UL

#define	_VDAC_OPA_OUT_APORTOUTSEL_APORT3YCH17 0x00000078UL

#define	_VDAC_OPA_OUT_APORTOUTSEL_APORT3YCH19 0x00000079UL

#define	_VDAC_OPA_OUT_APORTOUTSEL_APORT3YCH21 0x0000007AUL

#define	_VDAC_OPA_OUT_APORTOUTSEL_APORT3YCH23 0x0000007BUL

#define	_VDAC_OPA_OUT_APORTOUTSEL_APORT3YCH25 0x0000007CUL

#define	_VDAC_OPA_OUT_APORTOUTSEL_APORT3YCH27 0x0000007DUL

#define	_VDAC_OPA_OUT_APORTOUTSEL_APORT3YCH29 0x0000007EUL

#define	_VDAC_OPA_OUT_APORTOUTSEL_APORT3YCH3 0x00000071UL

#define	_VDAC_OPA_OUT_APORTOUTSEL_APORT3YCH31 0x0000007FUL

#define	_VDAC_OPA_OUT_APORTOUTSEL_APORT3YCH5 0x00000072UL

#define	_VDAC_OPA_OUT_APORTOUTSEL_APORT3YCH7 0x00000073UL

#define	_VDAC_OPA_OUT_APORTOUTSEL_APORT3YCH9 0x00000074UL

#define	_VDAC_OPA_OUT_APORTOUTSEL_APORT4YCH0 0x00000090UL

#define	_VDAC_OPA_OUT_APORTOUTSEL_APORT4YCH10 0x00000095UL

#define	_VDAC_OPA_OUT_APORTOUTSEL_APORT4YCH12 0x00000096UL

#define	_VDAC_OPA_OUT_APORTOUTSEL_APORT4YCH14 0x00000097UL

#define	_VDAC_OPA_OUT_APORTOUTSEL_APORT4YCH16 0x00000098UL

#define	_VDAC_OPA_OUT_APORTOUTSEL_APORT4YCH18 0x00000099UL

#define	_VDAC_OPA_OUT_APORTOUTSEL_APORT4YCH2 0x00000091UL

#define	_VDAC_OPA_OUT_APORTOUTSEL_APORT4YCH20 0x0000009AUL

#define	_VDAC_OPA_OUT_APORTOUTSEL_APORT4YCH22 0x0000009BUL

#define	_VDAC_OPA_OUT_APORTOUTSEL_APORT4YCH24 0x0000009CUL

#define	_VDAC_OPA_OUT_APORTOUTSEL_APORT4YCH26 0x0000009DUL

#define	_VDAC_OPA_OUT_APORTOUTSEL_APORT4YCH28 0x0000009EUL

#define	_VDAC_OPA_OUT_APORTOUTSEL_APORT4YCH30 0x0000009FUL

#define	_VDAC_OPA_OUT_APORTOUTSEL_APORT4YCH4 0x00000092UL

#define	_VDAC_OPA_OUT_APORTOUTSEL_APORT4YCH6 0x00000093UL

#define	_VDAC_OPA_OUT_APORTOUTSEL_APORT4YCH8 0x00000094UL

#define	_VDAC_OPA_OUT_APORTOUTSEL_DEFAULT 0x00000000UL

#define	_VDAC_OPA_OUT_APORTOUTSEL_MASK 0xFF0000UL

#define	_VDAC_OPA_OUT_APORTOUTSEL_SHIFT 16

#define	_VDAC_OPA_OUT_MAINOUTEN_DEFAULT 0x00000001UL

#define	_VDAC_OPA_OUT_MAINOUTEN_MASK 0x1UL

#define	_VDAC_OPA_OUT_MAINOUTEN_SHIFT 0

#define	_VDAC_OPA_OUT_MASK 0x00FF01FFUL

#define	_VDAC_OPA_OUT_RESETVALUE 0x00000001UL

#define	_VDAC_OPA_OUT_SHORT_DEFAULT 0x00000000UL

#define	_VDAC_OPA_OUT_SHORT_MASK 0x8UL

#define	_VDAC_OPA_OUT_SHORT_SHIFT 3

#define	_VDAC_OPA_TIMER_MASK 0x03FF7F3FUL

#define	_VDAC_OPA_TIMER_RESETVALUE 0x00010700UL

#define	_VDAC_OPA_TIMER_SETTLETIME_DEFAULT 0x00000001UL

#define	_VDAC_OPA_TIMER_SETTLETIME_MASK 0x3FF0000UL

#define	_VDAC_OPA_TIMER_SETTLETIME_SHIFT 16

#define	_VDAC_OPA_TIMER_STARTUPDLY_DEFAULT 0x00000000UL

#define	_VDAC_OPA_TIMER_STARTUPDLY_MASK 0x3FUL

#define	_VDAC_OPA_TIMER_STARTUPDLY_SHIFT 0

#define	_VDAC_OPA_TIMER_WARMUPTIME_DEFAULT 0x00000007UL

#define	_VDAC_OPA_TIMER_WARMUPTIME_MASK 0x7F00UL

#define	_VDAC_OPA_TIMER_WARMUPTIME_SHIFT 8

#define	_VDAC_STATUS_CH0BL_DEFAULT 0x00000001UL

#define	_VDAC_STATUS_CH0BL_MASK 0x4UL

#define	_VDAC_STATUS_CH0BL_SHIFT 2

#define	_VDAC_STATUS_CH0ENS_DEFAULT 0x00000000UL

#define	_VDAC_STATUS_CH0ENS_MASK 0x1UL

#define	_VDAC_STATUS_CH0ENS_SHIFT 0

#define	_VDAC_STATUS_CH0WARM_DEFAULT 0x00000000UL

#define	_VDAC_STATUS_CH0WARM_MASK 0x10UL

#define	_VDAC_STATUS_CH0WARM_SHIFT 4

#define	_VDAC_STATUS_CH1BL_DEFAULT 0x00000001UL

#define	_VDAC_STATUS_CH1BL_MASK 0x8UL

#define	_VDAC_STATUS_CH1BL_SHIFT 3

#define	_VDAC_STATUS_CH1ENS_DEFAULT 0x00000000UL

#define	_VDAC_STATUS_CH1ENS_MASK 0x2UL

#define	_VDAC_STATUS_CH1ENS_SHIFT 1

#define	_VDAC_STATUS_CH1WARM_DEFAULT 0x00000000UL

#define	_VDAC_STATUS_CH1WARM_MASK 0x20UL

#define	_VDAC_STATUS_CH1WARM_SHIFT 5

#define	_VDAC_STATUS_MASK 0xFFFF003FUL

#define	_VDAC_STATUS_OPA0APORTCONFLICT_DEFAULT 0x00000000UL

#define	_VDAC_STATUS_OPA0APORTCONFLICT_MASK 0x10000UL

#define	_VDAC_STATUS_OPA0APORTCONFLICT_SHIFT 16

#define	_VDAC_STATUS_OPA0ENS_DEFAULT 0x00000000UL

#define	_VDAC_STATUS_OPA0ENS_MASK 0x100000UL

#define	_VDAC_STATUS_OPA0ENS_SHIFT 20

#define	_VDAC_STATUS_OPA0OUTVALID_DEFAULT 0x00000000UL

#define	_VDAC_STATUS_OPA0OUTVALID_MASK 0x10000000UL

#define	_VDAC_STATUS_OPA0OUTVALID_SHIFT 28

#define	_VDAC_STATUS_OPA0WARM_DEFAULT 0x00000000UL

#define	_VDAC_STATUS_OPA0WARM_MASK 0x1000000UL

#define	_VDAC_STATUS_OPA0WARM_SHIFT 24

#define	_VDAC_STATUS_OPA1APORTCONFLICT_DEFAULT 0x00000000UL

#define	_VDAC_STATUS_OPA1APORTCONFLICT_MASK 0x20000UL

#define	_VDAC_STATUS_OPA1APORTCONFLICT_SHIFT 17

#define	_VDAC_STATUS_OPA1ENS_DEFAULT 0x00000000UL

#define	_VDAC_STATUS_OPA1ENS_MASK 0x200000UL

#define	_VDAC_STATUS_OPA1ENS_SHIFT 21

#define	_VDAC_STATUS_OPA1OUTVALID_DEFAULT 0x00000000UL

#define	_VDAC_STATUS_OPA1OUTVALID_MASK 0x20000000UL

#define	_VDAC_STATUS_OPA1OUTVALID_SHIFT 29

#define	_VDAC_STATUS_OPA1WARM_DEFAULT 0x00000000UL

#define	_VDAC_STATUS_OPA1WARM_MASK 0x2000000UL

#define	_VDAC_STATUS_OPA1WARM_SHIFT 25

#define	_VDAC_STATUS_OPA2APORTCONFLICT_DEFAULT 0x00000000UL

#define	_VDAC_STATUS_OPA2APORTCONFLICT_MASK 0x40000UL

#define	_VDAC_STATUS_OPA2APORTCONFLICT_SHIFT 18

#define	_VDAC_STATUS_OPA2ENS_DEFAULT 0x00000000UL

#define	_VDAC_STATUS_OPA2ENS_MASK 0x400000UL

#define	_VDAC_STATUS_OPA2ENS_SHIFT 22

#define	_VDAC_STATUS_OPA2OUTVALID_DEFAULT 0x00000000UL

#define	_VDAC_STATUS_OPA2OUTVALID_MASK 0x40000000UL

#define	_VDAC_STATUS_OPA2OUTVALID_SHIFT 30

#define	_VDAC_STATUS_OPA2WARM_DEFAULT 0x00000000UL

#define	_VDAC_STATUS_OPA2WARM_MASK 0x4000000UL

#define	_VDAC_STATUS_OPA2WARM_SHIFT 26

#define	_VDAC_STATUS_OPA3APORTCONFLICT_DEFAULT 0x00000000UL

#define	_VDAC_STATUS_OPA3APORTCONFLICT_MASK 0x80000UL

#define	_VDAC_STATUS_OPA3APORTCONFLICT_SHIFT 19

#define	_VDAC_STATUS_OPA3ENS_DEFAULT 0x00000000UL

#define	_VDAC_STATUS_OPA3ENS_MASK 0x800000UL

#define	_VDAC_STATUS_OPA3ENS_SHIFT 23

#define	_VDAC_STATUS_OPA3OUTVALID_DEFAULT 0x00000000UL

#define	_VDAC_STATUS_OPA3OUTVALID_MASK 0x80000000UL

#define	_VDAC_STATUS_OPA3OUTVALID_SHIFT 31

#define	_VDAC_STATUS_OPA3WARM_DEFAULT 0x00000000UL

#define	_VDAC_STATUS_OPA3WARM_MASK 0x8000000UL

#define	_VDAC_STATUS_OPA3WARM_SHIFT 27

#define	_VDAC_STATUS_RESETVALUE 0x0000000CUL

#define	VDAC_CAL_GAINERRTRIM_DEFAULT ( _VDAC_CAL_GAINERRTRIM_DEFAULT << 8)

#define	VDAC_CAL_GAINERRTRIMCH1_DEFAULT ( _VDAC_CAL_GAINERRTRIMCH1_DEFAULT << 16)

#define	VDAC_CAL_OFFSETTRIM_DEFAULT ( _VDAC_CAL_OFFSETTRIM_DEFAULT << 0)

#define	VDAC_CH0CTRL_CONVMODE (0x1UL << 0)

#define	VDAC_CH0CTRL_CONVMODE_CONTINUOUS ( _VDAC_CH0CTRL_CONVMODE_CONTINUOUS << 0)

#define	VDAC_CH0CTRL_CONVMODE_DEFAULT ( _VDAC_CH0CTRL_CONVMODE_DEFAULT << 0)

#define	VDAC_CH0CTRL_CONVMODE_SAMPLEOFF ( _VDAC_CH0CTRL_CONVMODE_SAMPLEOFF << 0)

#define	VDAC_CH0CTRL_PRSASYNC (0x1UL << 8)

#define	VDAC_CH0CTRL_PRSASYNC_DEFAULT ( _VDAC_CH0CTRL_PRSASYNC_DEFAULT << 8)

#define	VDAC_CH0CTRL_PRSSEL_DEFAULT ( _VDAC_CH0CTRL_PRSSEL_DEFAULT << 12)

#define	VDAC_CH0CTRL_PRSSEL_PRSCH0 ( _VDAC_CH0CTRL_PRSSEL_PRSCH0 << 12)

#define	VDAC_CH0CTRL_PRSSEL_PRSCH1 ( _VDAC_CH0CTRL_PRSSEL_PRSCH1 << 12)

#define	VDAC_CH0CTRL_PRSSEL_PRSCH10 ( _VDAC_CH0CTRL_PRSSEL_PRSCH10 << 12)

#define	VDAC_CH0CTRL_PRSSEL_PRSCH11 ( _VDAC_CH0CTRL_PRSSEL_PRSCH11 << 12)

#define	VDAC_CH0CTRL_PRSSEL_PRSCH12 ( _VDAC_CH0CTRL_PRSSEL_PRSCH12 << 12)

#define	VDAC_CH0CTRL_PRSSEL_PRSCH13 ( _VDAC_CH0CTRL_PRSSEL_PRSCH13 << 12)

#define	VDAC_CH0CTRL_PRSSEL_PRSCH14 ( _VDAC_CH0CTRL_PRSSEL_PRSCH14 << 12)

#define	VDAC_CH0CTRL_PRSSEL_PRSCH15 ( _VDAC_CH0CTRL_PRSSEL_PRSCH15 << 12)

#define	VDAC_CH0CTRL_PRSSEL_PRSCH2 ( _VDAC_CH0CTRL_PRSSEL_PRSCH2 << 12)

#define	VDAC_CH0CTRL_PRSSEL_PRSCH3 ( _VDAC_CH0CTRL_PRSSEL_PRSCH3 << 12)

#define	VDAC_CH0CTRL_PRSSEL_PRSCH4 ( _VDAC_CH0CTRL_PRSSEL_PRSCH4 << 12)

#define	VDAC_CH0CTRL_PRSSEL_PRSCH5 ( _VDAC_CH0CTRL_PRSSEL_PRSCH5 << 12)

#define	VDAC_CH0CTRL_PRSSEL_PRSCH6 ( _VDAC_CH0CTRL_PRSSEL_PRSCH6 << 12)

#define	VDAC_CH0CTRL_PRSSEL_PRSCH7 ( _VDAC_CH0CTRL_PRSSEL_PRSCH7 << 12)

#define	VDAC_CH0CTRL_PRSSEL_PRSCH8 ( _VDAC_CH0CTRL_PRSSEL_PRSCH8 << 12)

#define	VDAC_CH0CTRL_PRSSEL_PRSCH9 ( _VDAC_CH0CTRL_PRSSEL_PRSCH9 << 12)

#define	VDAC_CH0CTRL_TRIGMODE_DEFAULT ( _VDAC_CH0CTRL_TRIGMODE_DEFAULT << 4)

#define	VDAC_CH0CTRL_TRIGMODE_LESENSE ( _VDAC_CH0CTRL_TRIGMODE_LESENSE << 4)

#define	VDAC_CH0CTRL_TRIGMODE_PRS ( _VDAC_CH0CTRL_TRIGMODE_PRS << 4)

#define	VDAC_CH0CTRL_TRIGMODE_REFRESH ( _VDAC_CH0CTRL_TRIGMODE_REFRESH << 4)

#define	VDAC_CH0CTRL_TRIGMODE_SW ( _VDAC_CH0CTRL_TRIGMODE_SW << 4)

#define	VDAC_CH0CTRL_TRIGMODE_SWPRS ( _VDAC_CH0CTRL_TRIGMODE_SWPRS << 4)

#define	VDAC_CH0CTRL_TRIGMODE_SWREFRESH ( _VDAC_CH0CTRL_TRIGMODE_SWREFRESH << 4)

#define	VDAC_CH0DATA_DATA_DEFAULT ( _VDAC_CH0DATA_DATA_DEFAULT << 0)

#define	VDAC_CH1CTRL_CONVMODE (0x1UL << 0)

#define	VDAC_CH1CTRL_CONVMODE_CONTINUOUS ( _VDAC_CH1CTRL_CONVMODE_CONTINUOUS << 0)

#define	VDAC_CH1CTRL_CONVMODE_DEFAULT ( _VDAC_CH1CTRL_CONVMODE_DEFAULT << 0)

#define	VDAC_CH1CTRL_CONVMODE_SAMPLEOFF ( _VDAC_CH1CTRL_CONVMODE_SAMPLEOFF << 0)

#define	VDAC_CH1CTRL_PRSASYNC (0x1UL << 8)

#define	VDAC_CH1CTRL_PRSASYNC_DEFAULT ( _VDAC_CH1CTRL_PRSASYNC_DEFAULT << 8)

#define	VDAC_CH1CTRL_PRSSEL_DEFAULT ( _VDAC_CH1CTRL_PRSSEL_DEFAULT << 12)

#define	VDAC_CH1CTRL_PRSSEL_PRSCH0 ( _VDAC_CH1CTRL_PRSSEL_PRSCH0 << 12)

#define	VDAC_CH1CTRL_PRSSEL_PRSCH1 ( _VDAC_CH1CTRL_PRSSEL_PRSCH1 << 12)

#define	VDAC_CH1CTRL_PRSSEL_PRSCH10 ( _VDAC_CH1CTRL_PRSSEL_PRSCH10 << 12)

#define	VDAC_CH1CTRL_PRSSEL_PRSCH11 ( _VDAC_CH1CTRL_PRSSEL_PRSCH11 << 12)

#define	VDAC_CH1CTRL_PRSSEL_PRSCH12 ( _VDAC_CH1CTRL_PRSSEL_PRSCH12 << 12)

#define	VDAC_CH1CTRL_PRSSEL_PRSCH13 ( _VDAC_CH1CTRL_PRSSEL_PRSCH13 << 12)

#define	VDAC_CH1CTRL_PRSSEL_PRSCH14 ( _VDAC_CH1CTRL_PRSSEL_PRSCH14 << 12)

#define	VDAC_CH1CTRL_PRSSEL_PRSCH15 ( _VDAC_CH1CTRL_PRSSEL_PRSCH15 << 12)

#define	VDAC_CH1CTRL_PRSSEL_PRSCH2 ( _VDAC_CH1CTRL_PRSSEL_PRSCH2 << 12)

#define	VDAC_CH1CTRL_PRSSEL_PRSCH3 ( _VDAC_CH1CTRL_PRSSEL_PRSCH3 << 12)

#define	VDAC_CH1CTRL_PRSSEL_PRSCH4 ( _VDAC_CH1CTRL_PRSSEL_PRSCH4 << 12)

#define	VDAC_CH1CTRL_PRSSEL_PRSCH5 ( _VDAC_CH1CTRL_PRSSEL_PRSCH5 << 12)

#define	VDAC_CH1CTRL_PRSSEL_PRSCH6 ( _VDAC_CH1CTRL_PRSSEL_PRSCH6 << 12)

#define	VDAC_CH1CTRL_PRSSEL_PRSCH7 ( _VDAC_CH1CTRL_PRSSEL_PRSCH7 << 12)

#define	VDAC_CH1CTRL_PRSSEL_PRSCH8 ( _VDAC_CH1CTRL_PRSSEL_PRSCH8 << 12)

#define	VDAC_CH1CTRL_PRSSEL_PRSCH9 ( _VDAC_CH1CTRL_PRSSEL_PRSCH9 << 12)

#define	VDAC_CH1CTRL_TRIGMODE_DEFAULT ( _VDAC_CH1CTRL_TRIGMODE_DEFAULT << 4)

#define	VDAC_CH1CTRL_TRIGMODE_LESENSE ( _VDAC_CH1CTRL_TRIGMODE_LESENSE << 4)

#define	VDAC_CH1CTRL_TRIGMODE_PRS ( _VDAC_CH1CTRL_TRIGMODE_PRS << 4)

#define	VDAC_CH1CTRL_TRIGMODE_REFRESH ( _VDAC_CH1CTRL_TRIGMODE_REFRESH << 4)

#define	VDAC_CH1CTRL_TRIGMODE_SW ( _VDAC_CH1CTRL_TRIGMODE_SW << 4)

#define	VDAC_CH1CTRL_TRIGMODE_SWPRS ( _VDAC_CH1CTRL_TRIGMODE_SWPRS << 4)

#define	VDAC_CH1CTRL_TRIGMODE_SWREFRESH ( _VDAC_CH1CTRL_TRIGMODE_SWREFRESH << 4)

#define	VDAC_CH1DATA_DATA_DEFAULT ( _VDAC_CH1DATA_DATA_DEFAULT << 0)

#define	VDAC_CMD_CH0DIS (0x1UL << 1)

#define	VDAC_CMD_CH0DIS_DEFAULT ( _VDAC_CMD_CH0DIS_DEFAULT << 1)

#define	VDAC_CMD_CH0EN (0x1UL << 0)

#define	VDAC_CMD_CH0EN_DEFAULT ( _VDAC_CMD_CH0EN_DEFAULT << 0)

#define	VDAC_CMD_CH1DIS (0x1UL << 3)

#define	VDAC_CMD_CH1DIS_DEFAULT ( _VDAC_CMD_CH1DIS_DEFAULT << 3)

#define	VDAC_CMD_CH1EN (0x1UL << 2)

#define	VDAC_CMD_CH1EN_DEFAULT ( _VDAC_CMD_CH1EN_DEFAULT << 2)

#define	VDAC_CMD_OPA0DIS (0x1UL << 17)

#define	VDAC_CMD_OPA0DIS_DEFAULT ( _VDAC_CMD_OPA0DIS_DEFAULT << 17)

#define	VDAC_CMD_OPA0EN (0x1UL << 16)

#define	VDAC_CMD_OPA0EN_DEFAULT ( _VDAC_CMD_OPA0EN_DEFAULT << 16)

#define	VDAC_CMD_OPA1DIS (0x1UL << 19)

#define	VDAC_CMD_OPA1DIS_DEFAULT ( _VDAC_CMD_OPA1DIS_DEFAULT << 19)

#define	VDAC_CMD_OPA1EN (0x1UL << 18)

#define	VDAC_CMD_OPA1EN_DEFAULT ( _VDAC_CMD_OPA1EN_DEFAULT << 18)

#define	VDAC_CMD_OPA2DIS (0x1UL << 21)

#define	VDAC_CMD_OPA2DIS_DEFAULT ( _VDAC_CMD_OPA2DIS_DEFAULT << 21)

#define	VDAC_CMD_OPA2EN (0x1UL << 20)

#define	VDAC_CMD_OPA2EN_DEFAULT ( _VDAC_CMD_OPA2EN_DEFAULT << 20)

#define	VDAC_CMD_OPA3DIS (0x1UL << 23)

#define	VDAC_CMD_OPA3DIS_DEFAULT ( _VDAC_CMD_OPA3DIS_DEFAULT << 23)

#define	VDAC_CMD_OPA3EN (0x1UL << 22)

#define	VDAC_CMD_OPA3EN_DEFAULT ( _VDAC_CMD_OPA3EN_DEFAULT << 22)

#define	VDAC_COMBDATA_CH0DATA_DEFAULT ( _VDAC_COMBDATA_CH0DATA_DEFAULT << 0)

#define	VDAC_COMBDATA_CH1DATA_DEFAULT ( _VDAC_COMBDATA_CH1DATA_DEFAULT << 16)

#define	VDAC_CTRL_CH0PRESCRST (0x1UL << 6)

#define	VDAC_CTRL_CH0PRESCRST_DEFAULT ( _VDAC_CTRL_CH0PRESCRST_DEFAULT << 6)

#define	VDAC_CTRL_DACCLKMODE (0x1UL << 31)

#define	VDAC_CTRL_DACCLKMODE_ASYNC ( _VDAC_CTRL_DACCLKMODE_ASYNC << 31)

#define	VDAC_CTRL_DACCLKMODE_DEFAULT ( _VDAC_CTRL_DACCLKMODE_DEFAULT << 31)

#define	VDAC_CTRL_DACCLKMODE_SYNC ( _VDAC_CTRL_DACCLKMODE_SYNC << 31)

#define	VDAC_CTRL_DIFF (0x1UL << 0)

#define	VDAC_CTRL_DIFF_DEFAULT ( _VDAC_CTRL_DIFF_DEFAULT << 0)

#define	VDAC_CTRL_OUTENPRS (0x1UL << 5)

#define	VDAC_CTRL_OUTENPRS_DEFAULT ( _VDAC_CTRL_OUTENPRS_DEFAULT << 5)

#define	VDAC_CTRL_PRESC_DEFAULT ( _VDAC_CTRL_PRESC_DEFAULT << 16)

#define	VDAC_CTRL_PRESC_NODIVISION ( _VDAC_CTRL_PRESC_NODIVISION << 16)

#define	VDAC_CTRL_REFRESHPERIOD_16CYCLES ( _VDAC_CTRL_REFRESHPERIOD_16CYCLES << 24)

#define	VDAC_CTRL_REFRESHPERIOD_32CYCLES ( _VDAC_CTRL_REFRESHPERIOD_32CYCLES << 24)

#define	VDAC_CTRL_REFRESHPERIOD_64CYCLES ( _VDAC_CTRL_REFRESHPERIOD_64CYCLES << 24)

#define	VDAC_CTRL_REFRESHPERIOD_8CYCLES ( _VDAC_CTRL_REFRESHPERIOD_8CYCLES << 24)

#define	VDAC_CTRL_REFRESHPERIOD_DEFAULT ( _VDAC_CTRL_REFRESHPERIOD_DEFAULT << 24)

#define	VDAC_CTRL_REFSEL_1V25 ( _VDAC_CTRL_REFSEL_1V25 << 8)

#define	VDAC_CTRL_REFSEL_1V25LN ( _VDAC_CTRL_REFSEL_1V25LN << 8)

#define	VDAC_CTRL_REFSEL_2V5 ( _VDAC_CTRL_REFSEL_2V5 << 8)

#define	VDAC_CTRL_REFSEL_2V5LN ( _VDAC_CTRL_REFSEL_2V5LN << 8)

#define	VDAC_CTRL_REFSEL_DEFAULT ( _VDAC_CTRL_REFSEL_DEFAULT << 8)

#define	VDAC_CTRL_REFSEL_EXT ( _VDAC_CTRL_REFSEL_EXT << 8)

#define	VDAC_CTRL_REFSEL_VDD ( _VDAC_CTRL_REFSEL_VDD << 8)

#define	VDAC_CTRL_SINEMODE (0x1UL << 4)

#define	VDAC_CTRL_SINEMODE_DEFAULT ( _VDAC_CTRL_SINEMODE_DEFAULT << 4)

#define	VDAC_CTRL_WARMUPMODE (0x1UL << 28)

#define	VDAC_CTRL_WARMUPMODE_DEFAULT ( _VDAC_CTRL_WARMUPMODE_DEFAULT << 28)

#define	VDAC_CTRL_WARMUPMODE_KEEPINSTANDBY ( _VDAC_CTRL_WARMUPMODE_KEEPINSTANDBY << 28)

#define	VDAC_CTRL_WARMUPMODE_NORMAL ( _VDAC_CTRL_WARMUPMODE_NORMAL << 28)

#define	VDAC_IEN_CH0BL (0x1UL << 6)

#define	VDAC_IEN_CH0BL_DEFAULT ( _VDAC_IEN_CH0BL_DEFAULT << 6)

#define	VDAC_IEN_CH0CD (0x1UL << 0)

#define	VDAC_IEN_CH0CD_DEFAULT ( _VDAC_IEN_CH0CD_DEFAULT << 0)

#define	VDAC_IEN_CH0OF (0x1UL << 2)

#define	VDAC_IEN_CH0OF_DEFAULT ( _VDAC_IEN_CH0OF_DEFAULT << 2)

#define	VDAC_IEN_CH0UF (0x1UL << 4)

#define	VDAC_IEN_CH0UF_DEFAULT ( _VDAC_IEN_CH0UF_DEFAULT << 4)

#define	VDAC_IEN_CH1BL (0x1UL << 7)

#define	VDAC_IEN_CH1BL_DEFAULT ( _VDAC_IEN_CH1BL_DEFAULT << 7)

#define	VDAC_IEN_CH1CD (0x1UL << 1)

#define	VDAC_IEN_CH1CD_DEFAULT ( _VDAC_IEN_CH1CD_DEFAULT << 1)

#define	VDAC_IEN_CH1OF (0x1UL << 3)

#define	VDAC_IEN_CH1OF_DEFAULT ( _VDAC_IEN_CH1OF_DEFAULT << 3)

#define	VDAC_IEN_CH1UF (0x1UL << 5)

#define	VDAC_IEN_CH1UF_DEFAULT ( _VDAC_IEN_CH1UF_DEFAULT << 5)

#define	VDAC_IEN_EM23ERR (0x1UL << 15)

#define	VDAC_IEN_EM23ERR_DEFAULT ( _VDAC_IEN_EM23ERR_DEFAULT << 15)

#define	VDAC_IEN_OPA0APORTCONFLICT (0x1UL << 16)

#define	VDAC_IEN_OPA0APORTCONFLICT_DEFAULT ( _VDAC_IEN_OPA0APORTCONFLICT_DEFAULT << 16)

#define	VDAC_IEN_OPA0OUTVALID (0x1UL << 28)

#define	VDAC_IEN_OPA0OUTVALID_DEFAULT ( _VDAC_IEN_OPA0OUTVALID_DEFAULT << 28)

#define	VDAC_IEN_OPA0PRSTIMEDERR (0x1UL << 20)

#define	VDAC_IEN_OPA0PRSTIMEDERR_DEFAULT ( _VDAC_IEN_OPA0PRSTIMEDERR_DEFAULT << 20)

#define	VDAC_IEN_OPA1APORTCONFLICT (0x1UL << 17)

#define	VDAC_IEN_OPA1APORTCONFLICT_DEFAULT ( _VDAC_IEN_OPA1APORTCONFLICT_DEFAULT << 17)

#define	VDAC_IEN_OPA1OUTVALID (0x1UL << 29)

#define	VDAC_IEN_OPA1OUTVALID_DEFAULT ( _VDAC_IEN_OPA1OUTVALID_DEFAULT << 29)

#define	VDAC_IEN_OPA1PRSTIMEDERR (0x1UL << 21)

#define	VDAC_IEN_OPA1PRSTIMEDERR_DEFAULT ( _VDAC_IEN_OPA1PRSTIMEDERR_DEFAULT << 21)

#define	VDAC_IEN_OPA2APORTCONFLICT (0x1UL << 18)

#define	VDAC_IEN_OPA2APORTCONFLICT_DEFAULT ( _VDAC_IEN_OPA2APORTCONFLICT_DEFAULT << 18)

#define	VDAC_IEN_OPA2OUTVALID (0x1UL << 30)

#define	VDAC_IEN_OPA2OUTVALID_DEFAULT ( _VDAC_IEN_OPA2OUTVALID_DEFAULT << 30)

#define	VDAC_IEN_OPA2PRSTIMEDERR (0x1UL << 22)

#define	VDAC_IEN_OPA2PRSTIMEDERR_DEFAULT ( _VDAC_IEN_OPA2PRSTIMEDERR_DEFAULT << 22)

#define	VDAC_IEN_OPA3APORTCONFLICT (0x1UL << 19)

#define	VDAC_IEN_OPA3APORTCONFLICT_DEFAULT ( _VDAC_IEN_OPA3APORTCONFLICT_DEFAULT << 19)

#define	VDAC_IEN_OPA3OUTVALID (0x1UL << 31)

#define	VDAC_IEN_OPA3OUTVALID_DEFAULT ( _VDAC_IEN_OPA3OUTVALID_DEFAULT << 31)

#define	VDAC_IEN_OPA3PRSTIMEDERR (0x1UL << 23)

#define	VDAC_IEN_OPA3PRSTIMEDERR_DEFAULT ( _VDAC_IEN_OPA3PRSTIMEDERR_DEFAULT << 23)

#define	VDAC_IF_CH0BL (0x1UL << 6)

#define	VDAC_IF_CH0BL_DEFAULT ( _VDAC_IF_CH0BL_DEFAULT << 6)

#define	VDAC_IF_CH0CD (0x1UL << 0)

#define	VDAC_IF_CH0CD_DEFAULT ( _VDAC_IF_CH0CD_DEFAULT << 0)

#define	VDAC_IF_CH0OF (0x1UL << 2)

#define	VDAC_IF_CH0OF_DEFAULT ( _VDAC_IF_CH0OF_DEFAULT << 2)

#define	VDAC_IF_CH0UF (0x1UL << 4)

#define	VDAC_IF_CH0UF_DEFAULT ( _VDAC_IF_CH0UF_DEFAULT << 4)

#define	VDAC_IF_CH1BL (0x1UL << 7)

#define	VDAC_IF_CH1BL_DEFAULT ( _VDAC_IF_CH1BL_DEFAULT << 7)

#define	VDAC_IF_CH1CD (0x1UL << 1)

#define	VDAC_IF_CH1CD_DEFAULT ( _VDAC_IF_CH1CD_DEFAULT << 1)

#define	VDAC_IF_CH1OF (0x1UL << 3)

#define	VDAC_IF_CH1OF_DEFAULT ( _VDAC_IF_CH1OF_DEFAULT << 3)

#define	VDAC_IF_CH1UF (0x1UL << 5)

#define	VDAC_IF_CH1UF_DEFAULT ( _VDAC_IF_CH1UF_DEFAULT << 5)

#define	VDAC_IF_EM23ERR (0x1UL << 15)

#define	VDAC_IF_EM23ERR_DEFAULT ( _VDAC_IF_EM23ERR_DEFAULT << 15)

#define	VDAC_IF_OPA0APORTCONFLICT (0x1UL << 16)

#define	VDAC_IF_OPA0APORTCONFLICT_DEFAULT ( _VDAC_IF_OPA0APORTCONFLICT_DEFAULT << 16)

#define	VDAC_IF_OPA0OUTVALID (0x1UL << 28)

#define	VDAC_IF_OPA0OUTVALID_DEFAULT ( _VDAC_IF_OPA0OUTVALID_DEFAULT << 28)

#define	VDAC_IF_OPA0PRSTIMEDERR (0x1UL << 20)

#define	VDAC_IF_OPA0PRSTIMEDERR_DEFAULT ( _VDAC_IF_OPA0PRSTIMEDERR_DEFAULT << 20)

#define	VDAC_IF_OPA1APORTCONFLICT (0x1UL << 17)

#define	VDAC_IF_OPA1APORTCONFLICT_DEFAULT ( _VDAC_IF_OPA1APORTCONFLICT_DEFAULT << 17)

#define	VDAC_IF_OPA1OUTVALID (0x1UL << 29)

#define	VDAC_IF_OPA1OUTVALID_DEFAULT ( _VDAC_IF_OPA1OUTVALID_DEFAULT << 29)

#define	VDAC_IF_OPA1PRSTIMEDERR (0x1UL << 21)

#define	VDAC_IF_OPA1PRSTIMEDERR_DEFAULT ( _VDAC_IF_OPA1PRSTIMEDERR_DEFAULT << 21)

#define	VDAC_IF_OPA2APORTCONFLICT (0x1UL << 18)

#define	VDAC_IF_OPA2APORTCONFLICT_DEFAULT ( _VDAC_IF_OPA2APORTCONFLICT_DEFAULT << 18)

#define	VDAC_IF_OPA2OUTVALID (0x1UL << 30)

#define	VDAC_IF_OPA2OUTVALID_DEFAULT ( _VDAC_IF_OPA2OUTVALID_DEFAULT << 30)

#define	VDAC_IF_OPA2PRSTIMEDERR (0x1UL << 22)

#define	VDAC_IF_OPA2PRSTIMEDERR_DEFAULT ( _VDAC_IF_OPA2PRSTIMEDERR_DEFAULT << 22)

#define	VDAC_IF_OPA3APORTCONFLICT (0x1UL << 19)

#define	VDAC_IF_OPA3APORTCONFLICT_DEFAULT ( _VDAC_IF_OPA3APORTCONFLICT_DEFAULT << 19)

#define	VDAC_IF_OPA3OUTVALID (0x1UL << 31)

#define	VDAC_IF_OPA3OUTVALID_DEFAULT ( _VDAC_IF_OPA3OUTVALID_DEFAULT << 31)

#define	VDAC_IF_OPA3PRSTIMEDERR (0x1UL << 23)

#define	VDAC_IF_OPA3PRSTIMEDERR_DEFAULT ( _VDAC_IF_OPA3PRSTIMEDERR_DEFAULT << 23)

#define	VDAC_IFC_CH0CD (0x1UL << 0)

#define	VDAC_IFC_CH0CD_DEFAULT ( _VDAC_IFC_CH0CD_DEFAULT << 0)

#define	VDAC_IFC_CH0OF (0x1UL << 2)

#define	VDAC_IFC_CH0OF_DEFAULT ( _VDAC_IFC_CH0OF_DEFAULT << 2)

#define	VDAC_IFC_CH0UF (0x1UL << 4)

#define	VDAC_IFC_CH0UF_DEFAULT ( _VDAC_IFC_CH0UF_DEFAULT << 4)

#define	VDAC_IFC_CH1CD (0x1UL << 1)

#define	VDAC_IFC_CH1CD_DEFAULT ( _VDAC_IFC_CH1CD_DEFAULT << 1)

#define	VDAC_IFC_CH1OF (0x1UL << 3)

#define	VDAC_IFC_CH1OF_DEFAULT ( _VDAC_IFC_CH1OF_DEFAULT << 3)

#define	VDAC_IFC_CH1UF (0x1UL << 5)

#define	VDAC_IFC_CH1UF_DEFAULT ( _VDAC_IFC_CH1UF_DEFAULT << 5)

#define	VDAC_IFC_EM23ERR (0x1UL << 15)

#define	VDAC_IFC_EM23ERR_DEFAULT ( _VDAC_IFC_EM23ERR_DEFAULT << 15)

#define	VDAC_IFC_OPA0APORTCONFLICT (0x1UL << 16)

#define	VDAC_IFC_OPA0APORTCONFLICT_DEFAULT ( _VDAC_IFC_OPA0APORTCONFLICT_DEFAULT << 16)

#define	VDAC_IFC_OPA0OUTVALID (0x1UL << 28)

#define	VDAC_IFC_OPA0OUTVALID_DEFAULT ( _VDAC_IFC_OPA0OUTVALID_DEFAULT << 28)

#define	VDAC_IFC_OPA0PRSTIMEDERR (0x1UL << 20)

#define	VDAC_IFC_OPA0PRSTIMEDERR_DEFAULT ( _VDAC_IFC_OPA0PRSTIMEDERR_DEFAULT << 20)

#define	VDAC_IFC_OPA1APORTCONFLICT (0x1UL << 17)

#define	VDAC_IFC_OPA1APORTCONFLICT_DEFAULT ( _VDAC_IFC_OPA1APORTCONFLICT_DEFAULT << 17)

#define	VDAC_IFC_OPA1OUTVALID (0x1UL << 29)

#define	VDAC_IFC_OPA1OUTVALID_DEFAULT ( _VDAC_IFC_OPA1OUTVALID_DEFAULT << 29)

#define	VDAC_IFC_OPA1PRSTIMEDERR (0x1UL << 21)

#define	VDAC_IFC_OPA1PRSTIMEDERR_DEFAULT ( _VDAC_IFC_OPA1PRSTIMEDERR_DEFAULT << 21)

#define	VDAC_IFC_OPA2APORTCONFLICT (0x1UL << 18)

#define	VDAC_IFC_OPA2APORTCONFLICT_DEFAULT ( _VDAC_IFC_OPA2APORTCONFLICT_DEFAULT << 18)

#define	VDAC_IFC_OPA2OUTVALID (0x1UL << 30)

#define	VDAC_IFC_OPA2OUTVALID_DEFAULT ( _VDAC_IFC_OPA2OUTVALID_DEFAULT << 30)

#define	VDAC_IFC_OPA2PRSTIMEDERR (0x1UL << 22)

#define	VDAC_IFC_OPA2PRSTIMEDERR_DEFAULT ( _VDAC_IFC_OPA2PRSTIMEDERR_DEFAULT << 22)

#define	VDAC_IFC_OPA3APORTCONFLICT (0x1UL << 19)

#define	VDAC_IFC_OPA3APORTCONFLICT_DEFAULT ( _VDAC_IFC_OPA3APORTCONFLICT_DEFAULT << 19)

#define	VDAC_IFC_OPA3OUTVALID (0x1UL << 31)

#define	VDAC_IFC_OPA3OUTVALID_DEFAULT ( _VDAC_IFC_OPA3OUTVALID_DEFAULT << 31)

#define	VDAC_IFC_OPA3PRSTIMEDERR (0x1UL << 23)

#define	VDAC_IFC_OPA3PRSTIMEDERR_DEFAULT ( _VDAC_IFC_OPA3PRSTIMEDERR_DEFAULT << 23)

#define	VDAC_IFS_CH0CD (0x1UL << 0)

#define	VDAC_IFS_CH0CD_DEFAULT ( _VDAC_IFS_CH0CD_DEFAULT << 0)

#define	VDAC_IFS_CH0OF (0x1UL << 2)

#define	VDAC_IFS_CH0OF_DEFAULT ( _VDAC_IFS_CH0OF_DEFAULT << 2)

#define	VDAC_IFS_CH0UF (0x1UL << 4)

#define	VDAC_IFS_CH0UF_DEFAULT ( _VDAC_IFS_CH0UF_DEFAULT << 4)

#define	VDAC_IFS_CH1CD (0x1UL << 1)

#define	VDAC_IFS_CH1CD_DEFAULT ( _VDAC_IFS_CH1CD_DEFAULT << 1)

#define	VDAC_IFS_CH1OF (0x1UL << 3)

#define	VDAC_IFS_CH1OF_DEFAULT ( _VDAC_IFS_CH1OF_DEFAULT << 3)

#define	VDAC_IFS_CH1UF (0x1UL << 5)

#define	VDAC_IFS_CH1UF_DEFAULT ( _VDAC_IFS_CH1UF_DEFAULT << 5)

#define	VDAC_IFS_EM23ERR (0x1UL << 15)

#define	VDAC_IFS_EM23ERR_DEFAULT ( _VDAC_IFS_EM23ERR_DEFAULT << 15)

#define	VDAC_IFS_OPA0APORTCONFLICT (0x1UL << 16)

#define	VDAC_IFS_OPA0APORTCONFLICT_DEFAULT ( _VDAC_IFS_OPA0APORTCONFLICT_DEFAULT << 16)

#define	VDAC_IFS_OPA0OUTVALID (0x1UL << 28)

#define	VDAC_IFS_OPA0OUTVALID_DEFAULT ( _VDAC_IFS_OPA0OUTVALID_DEFAULT << 28)

#define	VDAC_IFS_OPA0PRSTIMEDERR (0x1UL << 20)

#define	VDAC_IFS_OPA0PRSTIMEDERR_DEFAULT ( _VDAC_IFS_OPA0PRSTIMEDERR_DEFAULT << 20)

#define	VDAC_IFS_OPA1APORTCONFLICT (0x1UL << 17)

#define	VDAC_IFS_OPA1APORTCONFLICT_DEFAULT ( _VDAC_IFS_OPA1APORTCONFLICT_DEFAULT << 17)

#define	VDAC_IFS_OPA1OUTVALID (0x1UL << 29)

#define	VDAC_IFS_OPA1OUTVALID_DEFAULT ( _VDAC_IFS_OPA1OUTVALID_DEFAULT << 29)

#define	VDAC_IFS_OPA1PRSTIMEDERR (0x1UL << 21)

#define	VDAC_IFS_OPA1PRSTIMEDERR_DEFAULT ( _VDAC_IFS_OPA1PRSTIMEDERR_DEFAULT << 21)

#define	VDAC_IFS_OPA2APORTCONFLICT (0x1UL << 18)

#define	VDAC_IFS_OPA2APORTCONFLICT_DEFAULT ( _VDAC_IFS_OPA2APORTCONFLICT_DEFAULT << 18)

#define	VDAC_IFS_OPA2OUTVALID (0x1UL << 30)

#define	VDAC_IFS_OPA2OUTVALID_DEFAULT ( _VDAC_IFS_OPA2OUTVALID_DEFAULT << 30)

#define	VDAC_IFS_OPA2PRSTIMEDERR (0x1UL << 22)

#define	VDAC_IFS_OPA2PRSTIMEDERR_DEFAULT ( _VDAC_IFS_OPA2PRSTIMEDERR_DEFAULT << 22)

#define	VDAC_IFS_OPA3APORTCONFLICT (0x1UL << 19)

#define	VDAC_IFS_OPA3APORTCONFLICT_DEFAULT ( _VDAC_IFS_OPA3APORTCONFLICT_DEFAULT << 19)

#define	VDAC_IFS_OPA3OUTVALID (0x1UL << 31)

#define	VDAC_IFS_OPA3OUTVALID_DEFAULT ( _VDAC_IFS_OPA3OUTVALID_DEFAULT << 31)

#define	VDAC_IFS_OPA3PRSTIMEDERR (0x1UL << 23)

#define	VDAC_IFS_OPA3PRSTIMEDERR_DEFAULT ( _VDAC_IFS_OPA3PRSTIMEDERR_DEFAULT << 23)

#define	VDAC_OPA_APORTCONFLICT_APORT1XCONFLICT (0x1UL << 2)

#define	VDAC_OPA_APORTCONFLICT_APORT1XCONFLICT_DEFAULT ( _VDAC_OPA_APORTCONFLICT_APORT1XCONFLICT_DEFAULT << 2)

#define	VDAC_OPA_APORTCONFLICT_APORT1YCONFLICT (0x1UL << 3)

#define	VDAC_OPA_APORTCONFLICT_APORT1YCONFLICT_DEFAULT ( _VDAC_OPA_APORTCONFLICT_APORT1YCONFLICT_DEFAULT << 3)

#define	VDAC_OPA_APORTCONFLICT_APORT2XCONFLICT (0x1UL << 4)

#define	VDAC_OPA_APORTCONFLICT_APORT2XCONFLICT_DEFAULT ( _VDAC_OPA_APORTCONFLICT_APORT2XCONFLICT_DEFAULT << 4)

#define	VDAC_OPA_APORTCONFLICT_APORT2YCONFLICT (0x1UL << 5)

#define	VDAC_OPA_APORTCONFLICT_APORT2YCONFLICT_DEFAULT ( _VDAC_OPA_APORTCONFLICT_APORT2YCONFLICT_DEFAULT << 5)

#define	VDAC_OPA_APORTCONFLICT_APORT3XCONFLICT (0x1UL << 6)

#define	VDAC_OPA_APORTCONFLICT_APORT3XCONFLICT_DEFAULT ( _VDAC_OPA_APORTCONFLICT_APORT3XCONFLICT_DEFAULT << 6)

#define	VDAC_OPA_APORTCONFLICT_APORT3YCONFLICT (0x1UL << 7)

#define	VDAC_OPA_APORTCONFLICT_APORT3YCONFLICT_DEFAULT ( _VDAC_OPA_APORTCONFLICT_APORT3YCONFLICT_DEFAULT << 7)

#define	VDAC_OPA_APORTCONFLICT_APORT4XCONFLICT (0x1UL << 8)

#define	VDAC_OPA_APORTCONFLICT_APORT4XCONFLICT_DEFAULT ( _VDAC_OPA_APORTCONFLICT_APORT4XCONFLICT_DEFAULT << 8)

#define	VDAC_OPA_APORTCONFLICT_APORT4YCONFLICT (0x1UL << 9)

#define	VDAC_OPA_APORTCONFLICT_APORT4YCONFLICT_DEFAULT ( _VDAC_OPA_APORTCONFLICT_APORT4YCONFLICT_DEFAULT << 9)

#define	VDAC_OPA_APORTREQ_APORT1XREQ (0x1UL << 2)

#define	VDAC_OPA_APORTREQ_APORT1XREQ_DEFAULT ( _VDAC_OPA_APORTREQ_APORT1XREQ_DEFAULT << 2)

#define	VDAC_OPA_APORTREQ_APORT1YREQ (0x1UL << 3)

#define	VDAC_OPA_APORTREQ_APORT1YREQ_DEFAULT ( _VDAC_OPA_APORTREQ_APORT1YREQ_DEFAULT << 3)

#define	VDAC_OPA_APORTREQ_APORT2XREQ (0x1UL << 4)

#define	VDAC_OPA_APORTREQ_APORT2XREQ_DEFAULT ( _VDAC_OPA_APORTREQ_APORT2XREQ_DEFAULT << 4)

#define	VDAC_OPA_APORTREQ_APORT2YREQ (0x1UL << 5)

#define	VDAC_OPA_APORTREQ_APORT2YREQ_DEFAULT ( _VDAC_OPA_APORTREQ_APORT2YREQ_DEFAULT << 5)

#define	VDAC_OPA_APORTREQ_APORT3XREQ (0x1UL << 6)

#define	VDAC_OPA_APORTREQ_APORT3XREQ_DEFAULT ( _VDAC_OPA_APORTREQ_APORT3XREQ_DEFAULT << 6)

#define	VDAC_OPA_APORTREQ_APORT3YREQ (0x1UL << 7)

#define	VDAC_OPA_APORTREQ_APORT3YREQ_DEFAULT ( _VDAC_OPA_APORTREQ_APORT3YREQ_DEFAULT << 7)

#define	VDAC_OPA_APORTREQ_APORT4XREQ (0x1UL << 8)

#define	VDAC_OPA_APORTREQ_APORT4XREQ_DEFAULT ( _VDAC_OPA_APORTREQ_APORT4XREQ_DEFAULT << 8)

#define	VDAC_OPA_APORTREQ_APORT4YREQ (0x1UL << 9)

#define	VDAC_OPA_APORTREQ_APORT4YREQ_DEFAULT ( _VDAC_OPA_APORTREQ_APORT4YREQ_DEFAULT << 9)

#define	VDAC_OPA_CAL_CM1_DEFAULT ( _VDAC_OPA_CAL_CM1_DEFAULT << 0)

#define	VDAC_OPA_CAL_CM2_DEFAULT ( _VDAC_OPA_CAL_CM2_DEFAULT << 5)

#define	VDAC_OPA_CAL_CM3_DEFAULT ( _VDAC_OPA_CAL_CM3_DEFAULT << 10)

#define	VDAC_OPA_CAL_GM3_DEFAULT ( _VDAC_OPA_CAL_GM3_DEFAULT << 17)

#define	VDAC_OPA_CAL_GM_DEFAULT ( _VDAC_OPA_CAL_GM_DEFAULT << 13)

#define	VDAC_OPA_CAL_OFFSETN_DEFAULT ( _VDAC_OPA_CAL_OFFSETN_DEFAULT << 26)

#define	VDAC_OPA_CAL_OFFSETP_DEFAULT ( _VDAC_OPA_CAL_OFFSETP_DEFAULT << 20)

#define	VDAC_OPA_CTRL_APORTXMASTERDIS (0x1UL << 20)

#define	VDAC_OPA_CTRL_APORTXMASTERDIS_DEFAULT ( _VDAC_OPA_CTRL_APORTXMASTERDIS_DEFAULT << 20)

#define	VDAC_OPA_CTRL_APORTYMASTERDIS (0x1UL << 21)

#define	VDAC_OPA_CTRL_APORTYMASTERDIS_DEFAULT ( _VDAC_OPA_CTRL_APORTYMASTERDIS_DEFAULT << 21)

#define	VDAC_OPA_CTRL_DRIVESTRENGTH_DEFAULT ( _VDAC_OPA_CTRL_DRIVESTRENGTH_DEFAULT << 0)

#define	VDAC_OPA_CTRL_HCMDIS (0x1UL << 3)

#define	VDAC_OPA_CTRL_HCMDIS_DEFAULT ( _VDAC_OPA_CTRL_HCMDIS_DEFAULT << 3)

#define	VDAC_OPA_CTRL_INCBW (0x1UL << 2)

#define	VDAC_OPA_CTRL_INCBW_DEFAULT ( _VDAC_OPA_CTRL_INCBW_DEFAULT << 2)

#define	VDAC_OPA_CTRL_OUTSCALE (0x1UL << 4)

#define	VDAC_OPA_CTRL_OUTSCALE_DEFAULT ( _VDAC_OPA_CTRL_OUTSCALE_DEFAULT << 4)

#define	VDAC_OPA_CTRL_OUTSCALE_FULL ( _VDAC_OPA_CTRL_OUTSCALE_FULL << 4)

#define	VDAC_OPA_CTRL_OUTSCALE_HALF ( _VDAC_OPA_CTRL_OUTSCALE_HALF << 4)

#define	VDAC_OPA_CTRL_PRSEN (0x1UL << 8)

#define	VDAC_OPA_CTRL_PRSEN_DEFAULT ( _VDAC_OPA_CTRL_PRSEN_DEFAULT << 8)

#define	VDAC_OPA_CTRL_PRSMODE (0x1UL << 9)

#define	VDAC_OPA_CTRL_PRSMODE_DEFAULT ( _VDAC_OPA_CTRL_PRSMODE_DEFAULT << 9)

#define	VDAC_OPA_CTRL_PRSMODE_PULSED ( _VDAC_OPA_CTRL_PRSMODE_PULSED << 9)

#define	VDAC_OPA_CTRL_PRSMODE_TIMED ( _VDAC_OPA_CTRL_PRSMODE_TIMED << 9)

#define	VDAC_OPA_CTRL_PRSOUTMODE (0x1UL << 16)

#define	VDAC_OPA_CTRL_PRSOUTMODE_DEFAULT ( _VDAC_OPA_CTRL_PRSOUTMODE_DEFAULT << 16)

#define	VDAC_OPA_CTRL_PRSOUTMODE_OUTVALID ( _VDAC_OPA_CTRL_PRSOUTMODE_OUTVALID << 16)

#define	VDAC_OPA_CTRL_PRSOUTMODE_WARM ( _VDAC_OPA_CTRL_PRSOUTMODE_WARM << 16)

#define	VDAC_OPA_CTRL_PRSSEL_DEFAULT ( _VDAC_OPA_CTRL_PRSSEL_DEFAULT << 10)

#define	VDAC_OPA_CTRL_PRSSEL_PRSCH0 ( _VDAC_OPA_CTRL_PRSSEL_PRSCH0 << 10)

#define	VDAC_OPA_CTRL_PRSSEL_PRSCH1 ( _VDAC_OPA_CTRL_PRSSEL_PRSCH1 << 10)

#define	VDAC_OPA_CTRL_PRSSEL_PRSCH10 ( _VDAC_OPA_CTRL_PRSSEL_PRSCH10 << 10)

#define	VDAC_OPA_CTRL_PRSSEL_PRSCH11 ( _VDAC_OPA_CTRL_PRSSEL_PRSCH11 << 10)

#define	VDAC_OPA_CTRL_PRSSEL_PRSCH12 ( _VDAC_OPA_CTRL_PRSSEL_PRSCH12 << 10)

#define	VDAC_OPA_CTRL_PRSSEL_PRSCH13 ( _VDAC_OPA_CTRL_PRSSEL_PRSCH13 << 10)

#define	VDAC_OPA_CTRL_PRSSEL_PRSCH14 ( _VDAC_OPA_CTRL_PRSSEL_PRSCH14 << 10)

#define	VDAC_OPA_CTRL_PRSSEL_PRSCH15 ( _VDAC_OPA_CTRL_PRSSEL_PRSCH15 << 10)

#define	VDAC_OPA_CTRL_PRSSEL_PRSCH2 ( _VDAC_OPA_CTRL_PRSSEL_PRSCH2 << 10)

#define	VDAC_OPA_CTRL_PRSSEL_PRSCH3 ( _VDAC_OPA_CTRL_PRSSEL_PRSCH3 << 10)

#define	VDAC_OPA_CTRL_PRSSEL_PRSCH4 ( _VDAC_OPA_CTRL_PRSSEL_PRSCH4 << 10)

#define	VDAC_OPA_CTRL_PRSSEL_PRSCH5 ( _VDAC_OPA_CTRL_PRSSEL_PRSCH5 << 10)

#define	VDAC_OPA_CTRL_PRSSEL_PRSCH6 ( _VDAC_OPA_CTRL_PRSSEL_PRSCH6 << 10)

#define	VDAC_OPA_CTRL_PRSSEL_PRSCH7 ( _VDAC_OPA_CTRL_PRSSEL_PRSCH7 << 10)

#define	VDAC_OPA_CTRL_PRSSEL_PRSCH8 ( _VDAC_OPA_CTRL_PRSSEL_PRSCH8 << 10)

#define	VDAC_OPA_CTRL_PRSSEL_PRSCH9 ( _VDAC_OPA_CTRL_PRSSEL_PRSCH9 << 10)

#define	VDAC_OPA_MUX_GAIN3X (0x1UL << 20)

#define	VDAC_OPA_MUX_GAIN3X_DEFAULT ( _VDAC_OPA_MUX_GAIN3X_DEFAULT << 20)

#define	VDAC_OPA_MUX_NEGSEL_APORT1YCH1 ( _VDAC_OPA_MUX_NEGSEL_APORT1YCH1 << 8)

#define	VDAC_OPA_MUX_NEGSEL_APORT1YCH11 ( _VDAC_OPA_MUX_NEGSEL_APORT1YCH11 << 8)

#define	VDAC_OPA_MUX_NEGSEL_APORT1YCH13 ( _VDAC_OPA_MUX_NEGSEL_APORT1YCH13 << 8)

#define	VDAC_OPA_MUX_NEGSEL_APORT1YCH15 ( _VDAC_OPA_MUX_NEGSEL_APORT1YCH15 << 8)

#define	VDAC_OPA_MUX_NEGSEL_APORT1YCH17 ( _VDAC_OPA_MUX_NEGSEL_APORT1YCH17 << 8)

#define	VDAC_OPA_MUX_NEGSEL_APORT1YCH19 ( _VDAC_OPA_MUX_NEGSEL_APORT1YCH19 << 8)

#define	VDAC_OPA_MUX_NEGSEL_APORT1YCH21 ( _VDAC_OPA_MUX_NEGSEL_APORT1YCH21 << 8)

#define	VDAC_OPA_MUX_NEGSEL_APORT1YCH23 ( _VDAC_OPA_MUX_NEGSEL_APORT1YCH23 << 8)

#define	VDAC_OPA_MUX_NEGSEL_APORT1YCH25 ( _VDAC_OPA_MUX_NEGSEL_APORT1YCH25 << 8)

#define	VDAC_OPA_MUX_NEGSEL_APORT1YCH27 ( _VDAC_OPA_MUX_NEGSEL_APORT1YCH27 << 8)

#define	VDAC_OPA_MUX_NEGSEL_APORT1YCH29 ( _VDAC_OPA_MUX_NEGSEL_APORT1YCH29 << 8)

#define	VDAC_OPA_MUX_NEGSEL_APORT1YCH3 ( _VDAC_OPA_MUX_NEGSEL_APORT1YCH3 << 8)

#define	VDAC_OPA_MUX_NEGSEL_APORT1YCH31 ( _VDAC_OPA_MUX_NEGSEL_APORT1YCH31 << 8)

#define	VDAC_OPA_MUX_NEGSEL_APORT1YCH5 ( _VDAC_OPA_MUX_NEGSEL_APORT1YCH5 << 8)

#define	VDAC_OPA_MUX_NEGSEL_APORT1YCH7 ( _VDAC_OPA_MUX_NEGSEL_APORT1YCH7 << 8)

#define	VDAC_OPA_MUX_NEGSEL_APORT1YCH9 ( _VDAC_OPA_MUX_NEGSEL_APORT1YCH9 << 8)

#define	VDAC_OPA_MUX_NEGSEL_APORT2YCH0 ( _VDAC_OPA_MUX_NEGSEL_APORT2YCH0 << 8)

#define	VDAC_OPA_MUX_NEGSEL_APORT2YCH10 ( _VDAC_OPA_MUX_NEGSEL_APORT2YCH10 << 8)

#define	VDAC_OPA_MUX_NEGSEL_APORT2YCH12 ( _VDAC_OPA_MUX_NEGSEL_APORT2YCH12 << 8)

#define	VDAC_OPA_MUX_NEGSEL_APORT2YCH14 ( _VDAC_OPA_MUX_NEGSEL_APORT2YCH14 << 8)

#define	VDAC_OPA_MUX_NEGSEL_APORT2YCH16 ( _VDAC_OPA_MUX_NEGSEL_APORT2YCH16 << 8)

#define	VDAC_OPA_MUX_NEGSEL_APORT2YCH18 ( _VDAC_OPA_MUX_NEGSEL_APORT2YCH18 << 8)

#define	VDAC_OPA_MUX_NEGSEL_APORT2YCH2 ( _VDAC_OPA_MUX_NEGSEL_APORT2YCH2 << 8)

#define	VDAC_OPA_MUX_NEGSEL_APORT2YCH20 ( _VDAC_OPA_MUX_NEGSEL_APORT2YCH20 << 8)

#define	VDAC_OPA_MUX_NEGSEL_APORT2YCH22 ( _VDAC_OPA_MUX_NEGSEL_APORT2YCH22 << 8)

#define	VDAC_OPA_MUX_NEGSEL_APORT2YCH24 ( _VDAC_OPA_MUX_NEGSEL_APORT2YCH24 << 8)

#define	VDAC_OPA_MUX_NEGSEL_APORT2YCH26 ( _VDAC_OPA_MUX_NEGSEL_APORT2YCH26 << 8)

#define	VDAC_OPA_MUX_NEGSEL_APORT2YCH28 ( _VDAC_OPA_MUX_NEGSEL_APORT2YCH28 << 8)

#define	VDAC_OPA_MUX_NEGSEL_APORT2YCH30 ( _VDAC_OPA_MUX_NEGSEL_APORT2YCH30 << 8)

#define	VDAC_OPA_MUX_NEGSEL_APORT2YCH4 ( _VDAC_OPA_MUX_NEGSEL_APORT2YCH4 << 8)

#define	VDAC_OPA_MUX_NEGSEL_APORT2YCH6 ( _VDAC_OPA_MUX_NEGSEL_APORT2YCH6 << 8)

#define	VDAC_OPA_MUX_NEGSEL_APORT2YCH8 ( _VDAC_OPA_MUX_NEGSEL_APORT2YCH8 << 8)

#define	VDAC_OPA_MUX_NEGSEL_APORT3YCH1 ( _VDAC_OPA_MUX_NEGSEL_APORT3YCH1 << 8)

#define	VDAC_OPA_MUX_NEGSEL_APORT3YCH11 ( _VDAC_OPA_MUX_NEGSEL_APORT3YCH11 << 8)

#define	VDAC_OPA_MUX_NEGSEL_APORT3YCH13 ( _VDAC_OPA_MUX_NEGSEL_APORT3YCH13 << 8)

#define	VDAC_OPA_MUX_NEGSEL_APORT3YCH15 ( _VDAC_OPA_MUX_NEGSEL_APORT3YCH15 << 8)

#define	VDAC_OPA_MUX_NEGSEL_APORT3YCH17 ( _VDAC_OPA_MUX_NEGSEL_APORT3YCH17 << 8)

#define	VDAC_OPA_MUX_NEGSEL_APORT3YCH19 ( _VDAC_OPA_MUX_NEGSEL_APORT3YCH19 << 8)

#define	VDAC_OPA_MUX_NEGSEL_APORT3YCH21 ( _VDAC_OPA_MUX_NEGSEL_APORT3YCH21 << 8)

#define	VDAC_OPA_MUX_NEGSEL_APORT3YCH23 ( _VDAC_OPA_MUX_NEGSEL_APORT3YCH23 << 8)

#define	VDAC_OPA_MUX_NEGSEL_APORT3YCH25 ( _VDAC_OPA_MUX_NEGSEL_APORT3YCH25 << 8)

#define	VDAC_OPA_MUX_NEGSEL_APORT3YCH27 ( _VDAC_OPA_MUX_NEGSEL_APORT3YCH27 << 8)

#define	VDAC_OPA_MUX_NEGSEL_APORT3YCH29 ( _VDAC_OPA_MUX_NEGSEL_APORT3YCH29 << 8)

#define	VDAC_OPA_MUX_NEGSEL_APORT3YCH3 ( _VDAC_OPA_MUX_NEGSEL_APORT3YCH3 << 8)

#define	VDAC_OPA_MUX_NEGSEL_APORT3YCH31 ( _VDAC_OPA_MUX_NEGSEL_APORT3YCH31 << 8)

#define	VDAC_OPA_MUX_NEGSEL_APORT3YCH5 ( _VDAC_OPA_MUX_NEGSEL_APORT3YCH5 << 8)

#define	VDAC_OPA_MUX_NEGSEL_APORT3YCH7 ( _VDAC_OPA_MUX_NEGSEL_APORT3YCH7 << 8)

#define	VDAC_OPA_MUX_NEGSEL_APORT3YCH9 ( _VDAC_OPA_MUX_NEGSEL_APORT3YCH9 << 8)

#define	VDAC_OPA_MUX_NEGSEL_APORT4YCH0 ( _VDAC_OPA_MUX_NEGSEL_APORT4YCH0 << 8)

#define	VDAC_OPA_MUX_NEGSEL_APORT4YCH10 ( _VDAC_OPA_MUX_NEGSEL_APORT4YCH10 << 8)

#define	VDAC_OPA_MUX_NEGSEL_APORT4YCH12 ( _VDAC_OPA_MUX_NEGSEL_APORT4YCH12 << 8)

#define	VDAC_OPA_MUX_NEGSEL_APORT4YCH14 ( _VDAC_OPA_MUX_NEGSEL_APORT4YCH14 << 8)

#define	VDAC_OPA_MUX_NEGSEL_APORT4YCH16 ( _VDAC_OPA_MUX_NEGSEL_APORT4YCH16 << 8)

#define	VDAC_OPA_MUX_NEGSEL_APORT4YCH18 ( _VDAC_OPA_MUX_NEGSEL_APORT4YCH18 << 8)

#define	VDAC_OPA_MUX_NEGSEL_APORT4YCH2 ( _VDAC_OPA_MUX_NEGSEL_APORT4YCH2 << 8)

#define	VDAC_OPA_MUX_NEGSEL_APORT4YCH20 ( _VDAC_OPA_MUX_NEGSEL_APORT4YCH20 << 8)

#define	VDAC_OPA_MUX_NEGSEL_APORT4YCH22 ( _VDAC_OPA_MUX_NEGSEL_APORT4YCH22 << 8)

#define	VDAC_OPA_MUX_NEGSEL_APORT4YCH24 ( _VDAC_OPA_MUX_NEGSEL_APORT4YCH24 << 8)

#define	VDAC_OPA_MUX_NEGSEL_APORT4YCH26 ( _VDAC_OPA_MUX_NEGSEL_APORT4YCH26 << 8)

#define	VDAC_OPA_MUX_NEGSEL_APORT4YCH28 ( _VDAC_OPA_MUX_NEGSEL_APORT4YCH28 << 8)

#define	VDAC_OPA_MUX_NEGSEL_APORT4YCH30 ( _VDAC_OPA_MUX_NEGSEL_APORT4YCH30 << 8)

#define	VDAC_OPA_MUX_NEGSEL_APORT4YCH4 ( _VDAC_OPA_MUX_NEGSEL_APORT4YCH4 << 8)

#define	VDAC_OPA_MUX_NEGSEL_APORT4YCH6 ( _VDAC_OPA_MUX_NEGSEL_APORT4YCH6 << 8)

#define	VDAC_OPA_MUX_NEGSEL_APORT4YCH8 ( _VDAC_OPA_MUX_NEGSEL_APORT4YCH8 << 8)

#define	VDAC_OPA_MUX_NEGSEL_DEFAULT ( _VDAC_OPA_MUX_NEGSEL_DEFAULT << 8)

#define	VDAC_OPA_MUX_NEGSEL_DISABLE ( _VDAC_OPA_MUX_NEGSEL_DISABLE << 8)

#define	VDAC_OPA_MUX_NEGSEL_NEGPAD ( _VDAC_OPA_MUX_NEGSEL_NEGPAD << 8)

#define	VDAC_OPA_MUX_NEGSEL_OPATAP ( _VDAC_OPA_MUX_NEGSEL_OPATAP << 8)

#define	VDAC_OPA_MUX_NEGSEL_UG ( _VDAC_OPA_MUX_NEGSEL_UG << 8)

#define	VDAC_OPA_MUX_POSSEL_APORT1XCH0 ( _VDAC_OPA_MUX_POSSEL_APORT1XCH0 << 0)

#define	VDAC_OPA_MUX_POSSEL_APORT1XCH10 ( _VDAC_OPA_MUX_POSSEL_APORT1XCH10 << 0)

#define	VDAC_OPA_MUX_POSSEL_APORT1XCH12 ( _VDAC_OPA_MUX_POSSEL_APORT1XCH12 << 0)

#define	VDAC_OPA_MUX_POSSEL_APORT1XCH14 ( _VDAC_OPA_MUX_POSSEL_APORT1XCH14 << 0)

#define	VDAC_OPA_MUX_POSSEL_APORT1XCH16 ( _VDAC_OPA_MUX_POSSEL_APORT1XCH16 << 0)

#define	VDAC_OPA_MUX_POSSEL_APORT1XCH18 ( _VDAC_OPA_MUX_POSSEL_APORT1XCH18 << 0)

#define	VDAC_OPA_MUX_POSSEL_APORT1XCH2 ( _VDAC_OPA_MUX_POSSEL_APORT1XCH2 << 0)

#define	VDAC_OPA_MUX_POSSEL_APORT1XCH20 ( _VDAC_OPA_MUX_POSSEL_APORT1XCH20 << 0)

#define	VDAC_OPA_MUX_POSSEL_APORT1XCH22 ( _VDAC_OPA_MUX_POSSEL_APORT1XCH22 << 0)

#define	VDAC_OPA_MUX_POSSEL_APORT1XCH24 ( _VDAC_OPA_MUX_POSSEL_APORT1XCH24 << 0)

#define	VDAC_OPA_MUX_POSSEL_APORT1XCH26 ( _VDAC_OPA_MUX_POSSEL_APORT1XCH26 << 0)

#define	VDAC_OPA_MUX_POSSEL_APORT1XCH28 ( _VDAC_OPA_MUX_POSSEL_APORT1XCH28 << 0)

#define	VDAC_OPA_MUX_POSSEL_APORT1XCH30 ( _VDAC_OPA_MUX_POSSEL_APORT1XCH30 << 0)

#define	VDAC_OPA_MUX_POSSEL_APORT1XCH4 ( _VDAC_OPA_MUX_POSSEL_APORT1XCH4 << 0)

#define	VDAC_OPA_MUX_POSSEL_APORT1XCH6 ( _VDAC_OPA_MUX_POSSEL_APORT1XCH6 << 0)

#define	VDAC_OPA_MUX_POSSEL_APORT1XCH8 ( _VDAC_OPA_MUX_POSSEL_APORT1XCH8 << 0)

#define	VDAC_OPA_MUX_POSSEL_APORT2XCH1 ( _VDAC_OPA_MUX_POSSEL_APORT2XCH1 << 0)

#define	VDAC_OPA_MUX_POSSEL_APORT2XCH11 ( _VDAC_OPA_MUX_POSSEL_APORT2XCH11 << 0)

#define	VDAC_OPA_MUX_POSSEL_APORT2XCH13 ( _VDAC_OPA_MUX_POSSEL_APORT2XCH13 << 0)

#define	VDAC_OPA_MUX_POSSEL_APORT2XCH15 ( _VDAC_OPA_MUX_POSSEL_APORT2XCH15 << 0)

#define	VDAC_OPA_MUX_POSSEL_APORT2XCH17 ( _VDAC_OPA_MUX_POSSEL_APORT2XCH17 << 0)

#define	VDAC_OPA_MUX_POSSEL_APORT2XCH19 ( _VDAC_OPA_MUX_POSSEL_APORT2XCH19 << 0)

#define	VDAC_OPA_MUX_POSSEL_APORT2XCH21 ( _VDAC_OPA_MUX_POSSEL_APORT2XCH21 << 0)

#define	VDAC_OPA_MUX_POSSEL_APORT2XCH23 ( _VDAC_OPA_MUX_POSSEL_APORT2XCH23 << 0)

#define	VDAC_OPA_MUX_POSSEL_APORT2XCH25 ( _VDAC_OPA_MUX_POSSEL_APORT2XCH25 << 0)

#define	VDAC_OPA_MUX_POSSEL_APORT2XCH27 ( _VDAC_OPA_MUX_POSSEL_APORT2XCH27 << 0)

#define	VDAC_OPA_MUX_POSSEL_APORT2XCH29 ( _VDAC_OPA_MUX_POSSEL_APORT2XCH29 << 0)

#define	VDAC_OPA_MUX_POSSEL_APORT2XCH3 ( _VDAC_OPA_MUX_POSSEL_APORT2XCH3 << 0)

#define	VDAC_OPA_MUX_POSSEL_APORT2XCH31 ( _VDAC_OPA_MUX_POSSEL_APORT2XCH31 << 0)

#define	VDAC_OPA_MUX_POSSEL_APORT2XCH5 ( _VDAC_OPA_MUX_POSSEL_APORT2XCH5 << 0)

#define	VDAC_OPA_MUX_POSSEL_APORT2XCH7 ( _VDAC_OPA_MUX_POSSEL_APORT2XCH7 << 0)

#define	VDAC_OPA_MUX_POSSEL_APORT2XCH9 ( _VDAC_OPA_MUX_POSSEL_APORT2XCH9 << 0)

#define	VDAC_OPA_MUX_POSSEL_APORT3XCH0 ( _VDAC_OPA_MUX_POSSEL_APORT3XCH0 << 0)

#define	VDAC_OPA_MUX_POSSEL_APORT3XCH10 ( _VDAC_OPA_MUX_POSSEL_APORT3XCH10 << 0)

#define	VDAC_OPA_MUX_POSSEL_APORT3XCH12 ( _VDAC_OPA_MUX_POSSEL_APORT3XCH12 << 0)

#define	VDAC_OPA_MUX_POSSEL_APORT3XCH14 ( _VDAC_OPA_MUX_POSSEL_APORT3XCH14 << 0)

#define	VDAC_OPA_MUX_POSSEL_APORT3XCH16 ( _VDAC_OPA_MUX_POSSEL_APORT3XCH16 << 0)

#define	VDAC_OPA_MUX_POSSEL_APORT3XCH18 ( _VDAC_OPA_MUX_POSSEL_APORT3XCH18 << 0)

#define	VDAC_OPA_MUX_POSSEL_APORT3XCH2 ( _VDAC_OPA_MUX_POSSEL_APORT3XCH2 << 0)

#define	VDAC_OPA_MUX_POSSEL_APORT3XCH20 ( _VDAC_OPA_MUX_POSSEL_APORT3XCH20 << 0)

#define	VDAC_OPA_MUX_POSSEL_APORT3XCH22 ( _VDAC_OPA_MUX_POSSEL_APORT3XCH22 << 0)

#define	VDAC_OPA_MUX_POSSEL_APORT3XCH24 ( _VDAC_OPA_MUX_POSSEL_APORT3XCH24 << 0)

#define	VDAC_OPA_MUX_POSSEL_APORT3XCH26 ( _VDAC_OPA_MUX_POSSEL_APORT3XCH26 << 0)

#define	VDAC_OPA_MUX_POSSEL_APORT3XCH28 ( _VDAC_OPA_MUX_POSSEL_APORT3XCH28 << 0)

#define	VDAC_OPA_MUX_POSSEL_APORT3XCH30 ( _VDAC_OPA_MUX_POSSEL_APORT3XCH30 << 0)

#define	VDAC_OPA_MUX_POSSEL_APORT3XCH4 ( _VDAC_OPA_MUX_POSSEL_APORT3XCH4 << 0)

#define	VDAC_OPA_MUX_POSSEL_APORT3XCH6 ( _VDAC_OPA_MUX_POSSEL_APORT3XCH6 << 0)

#define	VDAC_OPA_MUX_POSSEL_APORT3XCH8 ( _VDAC_OPA_MUX_POSSEL_APORT3XCH8 << 0)

#define	VDAC_OPA_MUX_POSSEL_APORT4XCH1 ( _VDAC_OPA_MUX_POSSEL_APORT4XCH1 << 0)

#define	VDAC_OPA_MUX_POSSEL_APORT4XCH11 ( _VDAC_OPA_MUX_POSSEL_APORT4XCH11 << 0)

#define	VDAC_OPA_MUX_POSSEL_APORT4XCH13 ( _VDAC_OPA_MUX_POSSEL_APORT4XCH13 << 0)

#define	VDAC_OPA_MUX_POSSEL_APORT4XCH15 ( _VDAC_OPA_MUX_POSSEL_APORT4XCH15 << 0)

#define	VDAC_OPA_MUX_POSSEL_APORT4XCH17 ( _VDAC_OPA_MUX_POSSEL_APORT4XCH17 << 0)

#define	VDAC_OPA_MUX_POSSEL_APORT4XCH19 ( _VDAC_OPA_MUX_POSSEL_APORT4XCH19 << 0)

#define	VDAC_OPA_MUX_POSSEL_APORT4XCH21 ( _VDAC_OPA_MUX_POSSEL_APORT4XCH21 << 0)

#define	VDAC_OPA_MUX_POSSEL_APORT4XCH23 ( _VDAC_OPA_MUX_POSSEL_APORT4XCH23 << 0)

#define	VDAC_OPA_MUX_POSSEL_APORT4XCH25 ( _VDAC_OPA_MUX_POSSEL_APORT4XCH25 << 0)

#define	VDAC_OPA_MUX_POSSEL_APORT4XCH27 ( _VDAC_OPA_MUX_POSSEL_APORT4XCH27 << 0)

#define	VDAC_OPA_MUX_POSSEL_APORT4XCH29 ( _VDAC_OPA_MUX_POSSEL_APORT4XCH29 << 0)

#define	VDAC_OPA_MUX_POSSEL_APORT4XCH3 ( _VDAC_OPA_MUX_POSSEL_APORT4XCH3 << 0)

#define	VDAC_OPA_MUX_POSSEL_APORT4XCH31 ( _VDAC_OPA_MUX_POSSEL_APORT4XCH31 << 0)

#define	VDAC_OPA_MUX_POSSEL_APORT4XCH5 ( _VDAC_OPA_MUX_POSSEL_APORT4XCH5 << 0)

#define	VDAC_OPA_MUX_POSSEL_APORT4XCH7 ( _VDAC_OPA_MUX_POSSEL_APORT4XCH7 << 0)

#define	VDAC_OPA_MUX_POSSEL_APORT4XCH9 ( _VDAC_OPA_MUX_POSSEL_APORT4XCH9 << 0)

#define	VDAC_OPA_MUX_POSSEL_DAC ( _VDAC_OPA_MUX_POSSEL_DAC << 0)

#define	VDAC_OPA_MUX_POSSEL_DEFAULT ( _VDAC_OPA_MUX_POSSEL_DEFAULT << 0)

#define	VDAC_OPA_MUX_POSSEL_DISABLE ( _VDAC_OPA_MUX_POSSEL_DISABLE << 0)

#define	VDAC_OPA_MUX_POSSEL_OPANEXT ( _VDAC_OPA_MUX_POSSEL_OPANEXT << 0)

#define	VDAC_OPA_MUX_POSSEL_OPATAP ( _VDAC_OPA_MUX_POSSEL_OPATAP << 0)

#define	VDAC_OPA_MUX_POSSEL_POSPAD ( _VDAC_OPA_MUX_POSSEL_POSPAD << 0)

#define	VDAC_OPA_MUX_RESINMUX_CENTER ( _VDAC_OPA_MUX_RESINMUX_CENTER << 16)

#define	VDAC_OPA_MUX_RESINMUX_COMPAD ( _VDAC_OPA_MUX_RESINMUX_COMPAD << 16)

#define	VDAC_OPA_MUX_RESINMUX_DEFAULT ( _VDAC_OPA_MUX_RESINMUX_DEFAULT << 16)

#define	VDAC_OPA_MUX_RESINMUX_DISABLE ( _VDAC_OPA_MUX_RESINMUX_DISABLE << 16)

#define	VDAC_OPA_MUX_RESINMUX_NEGPAD ( _VDAC_OPA_MUX_RESINMUX_NEGPAD << 16)

#define	VDAC_OPA_MUX_RESINMUX_OPANEXT ( _VDAC_OPA_MUX_RESINMUX_OPANEXT << 16)

#define	VDAC_OPA_MUX_RESINMUX_POSPAD ( _VDAC_OPA_MUX_RESINMUX_POSPAD << 16)

#define	VDAC_OPA_MUX_RESINMUX_VSS ( _VDAC_OPA_MUX_RESINMUX_VSS << 16)

#define	VDAC_OPA_MUX_RESSEL_DEFAULT ( _VDAC_OPA_MUX_RESSEL_DEFAULT << 24)

#define	VDAC_OPA_MUX_RESSEL_RES0 ( _VDAC_OPA_MUX_RESSEL_RES0 << 24)

#define	VDAC_OPA_MUX_RESSEL_RES1 ( _VDAC_OPA_MUX_RESSEL_RES1 << 24)

#define	VDAC_OPA_MUX_RESSEL_RES2 ( _VDAC_OPA_MUX_RESSEL_RES2 << 24)

#define	VDAC_OPA_MUX_RESSEL_RES3 ( _VDAC_OPA_MUX_RESSEL_RES3 << 24)

#define	VDAC_OPA_MUX_RESSEL_RES4 ( _VDAC_OPA_MUX_RESSEL_RES4 << 24)

#define	VDAC_OPA_MUX_RESSEL_RES5 ( _VDAC_OPA_MUX_RESSEL_RES5 << 24)

#define	VDAC_OPA_MUX_RESSEL_RES6 ( _VDAC_OPA_MUX_RESSEL_RES6 << 24)

#define	VDAC_OPA_MUX_RESSEL_RES7 ( _VDAC_OPA_MUX_RESSEL_RES7 << 24)

#define	VDAC_OPA_OUT_ALTOUTEN (0x1UL << 1)

#define	VDAC_OPA_OUT_ALTOUTEN_DEFAULT ( _VDAC_OPA_OUT_ALTOUTEN_DEFAULT << 1)

#define	VDAC_OPA_OUT_ALTOUTPADEN_DEFAULT ( _VDAC_OPA_OUT_ALTOUTPADEN_DEFAULT << 4)

#define	VDAC_OPA_OUT_ALTOUTPADEN_OUT0 ( _VDAC_OPA_OUT_ALTOUTPADEN_OUT0 << 4)

#define	VDAC_OPA_OUT_ALTOUTPADEN_OUT1 ( _VDAC_OPA_OUT_ALTOUTPADEN_OUT1 << 4)

#define	VDAC_OPA_OUT_ALTOUTPADEN_OUT2 ( _VDAC_OPA_OUT_ALTOUTPADEN_OUT2 << 4)

#define	VDAC_OPA_OUT_ALTOUTPADEN_OUT3 ( _VDAC_OPA_OUT_ALTOUTPADEN_OUT3 << 4)

#define	VDAC_OPA_OUT_ALTOUTPADEN_OUT4 ( _VDAC_OPA_OUT_ALTOUTPADEN_OUT4 << 4)

#define	VDAC_OPA_OUT_APORTOUTEN (0x1UL << 2)

#define	VDAC_OPA_OUT_APORTOUTEN_DEFAULT ( _VDAC_OPA_OUT_APORTOUTEN_DEFAULT << 2)

#define	VDAC_OPA_OUT_APORTOUTSEL_APORT1YCH1 ( _VDAC_OPA_OUT_APORTOUTSEL_APORT1YCH1 << 16)

#define	VDAC_OPA_OUT_APORTOUTSEL_APORT1YCH11 ( _VDAC_OPA_OUT_APORTOUTSEL_APORT1YCH11 << 16)

#define	VDAC_OPA_OUT_APORTOUTSEL_APORT1YCH13 ( _VDAC_OPA_OUT_APORTOUTSEL_APORT1YCH13 << 16)

#define	VDAC_OPA_OUT_APORTOUTSEL_APORT1YCH15 ( _VDAC_OPA_OUT_APORTOUTSEL_APORT1YCH15 << 16)

#define	VDAC_OPA_OUT_APORTOUTSEL_APORT1YCH17 ( _VDAC_OPA_OUT_APORTOUTSEL_APORT1YCH17 << 16)

#define	VDAC_OPA_OUT_APORTOUTSEL_APORT1YCH19 ( _VDAC_OPA_OUT_APORTOUTSEL_APORT1YCH19 << 16)

#define	VDAC_OPA_OUT_APORTOUTSEL_APORT1YCH21 ( _VDAC_OPA_OUT_APORTOUTSEL_APORT1YCH21 << 16)

#define	VDAC_OPA_OUT_APORTOUTSEL_APORT1YCH23 ( _VDAC_OPA_OUT_APORTOUTSEL_APORT1YCH23 << 16)

#define	VDAC_OPA_OUT_APORTOUTSEL_APORT1YCH25 ( _VDAC_OPA_OUT_APORTOUTSEL_APORT1YCH25 << 16)

#define	VDAC_OPA_OUT_APORTOUTSEL_APORT1YCH27 ( _VDAC_OPA_OUT_APORTOUTSEL_APORT1YCH27 << 16)

#define	VDAC_OPA_OUT_APORTOUTSEL_APORT1YCH29 ( _VDAC_OPA_OUT_APORTOUTSEL_APORT1YCH29 << 16)

#define	VDAC_OPA_OUT_APORTOUTSEL_APORT1YCH3 ( _VDAC_OPA_OUT_APORTOUTSEL_APORT1YCH3 << 16)

#define	VDAC_OPA_OUT_APORTOUTSEL_APORT1YCH31 ( _VDAC_OPA_OUT_APORTOUTSEL_APORT1YCH31 << 16)

#define	VDAC_OPA_OUT_APORTOUTSEL_APORT1YCH5 ( _VDAC_OPA_OUT_APORTOUTSEL_APORT1YCH5 << 16)

#define	VDAC_OPA_OUT_APORTOUTSEL_APORT1YCH7 ( _VDAC_OPA_OUT_APORTOUTSEL_APORT1YCH7 << 16)

#define	VDAC_OPA_OUT_APORTOUTSEL_APORT1YCH9 ( _VDAC_OPA_OUT_APORTOUTSEL_APORT1YCH9 << 16)

#define	VDAC_OPA_OUT_APORTOUTSEL_APORT2YCH0 ( _VDAC_OPA_OUT_APORTOUTSEL_APORT2YCH0 << 16)

#define	VDAC_OPA_OUT_APORTOUTSEL_APORT2YCH10 ( _VDAC_OPA_OUT_APORTOUTSEL_APORT2YCH10 << 16)

#define	VDAC_OPA_OUT_APORTOUTSEL_APORT2YCH12 ( _VDAC_OPA_OUT_APORTOUTSEL_APORT2YCH12 << 16)

#define	VDAC_OPA_OUT_APORTOUTSEL_APORT2YCH14 ( _VDAC_OPA_OUT_APORTOUTSEL_APORT2YCH14 << 16)

#define	VDAC_OPA_OUT_APORTOUTSEL_APORT2YCH16 ( _VDAC_OPA_OUT_APORTOUTSEL_APORT2YCH16 << 16)

#define	VDAC_OPA_OUT_APORTOUTSEL_APORT2YCH18 ( _VDAC_OPA_OUT_APORTOUTSEL_APORT2YCH18 << 16)

#define	VDAC_OPA_OUT_APORTOUTSEL_APORT2YCH2 ( _VDAC_OPA_OUT_APORTOUTSEL_APORT2YCH2 << 16)

#define	VDAC_OPA_OUT_APORTOUTSEL_APORT2YCH20 ( _VDAC_OPA_OUT_APORTOUTSEL_APORT2YCH20 << 16)

#define	VDAC_OPA_OUT_APORTOUTSEL_APORT2YCH22 ( _VDAC_OPA_OUT_APORTOUTSEL_APORT2YCH22 << 16)

#define	VDAC_OPA_OUT_APORTOUTSEL_APORT2YCH24 ( _VDAC_OPA_OUT_APORTOUTSEL_APORT2YCH24 << 16)

#define	VDAC_OPA_OUT_APORTOUTSEL_APORT2YCH26 ( _VDAC_OPA_OUT_APORTOUTSEL_APORT2YCH26 << 16)

#define	VDAC_OPA_OUT_APORTOUTSEL_APORT2YCH28 ( _VDAC_OPA_OUT_APORTOUTSEL_APORT2YCH28 << 16)

#define	VDAC_OPA_OUT_APORTOUTSEL_APORT2YCH30 ( _VDAC_OPA_OUT_APORTOUTSEL_APORT2YCH30 << 16)

#define	VDAC_OPA_OUT_APORTOUTSEL_APORT2YCH4 ( _VDAC_OPA_OUT_APORTOUTSEL_APORT2YCH4 << 16)

#define	VDAC_OPA_OUT_APORTOUTSEL_APORT2YCH6 ( _VDAC_OPA_OUT_APORTOUTSEL_APORT2YCH6 << 16)

#define	VDAC_OPA_OUT_APORTOUTSEL_APORT2YCH8 ( _VDAC_OPA_OUT_APORTOUTSEL_APORT2YCH8 << 16)

#define	VDAC_OPA_OUT_APORTOUTSEL_APORT3YCH1 ( _VDAC_OPA_OUT_APORTOUTSEL_APORT3YCH1 << 16)

#define	VDAC_OPA_OUT_APORTOUTSEL_APORT3YCH11 ( _VDAC_OPA_OUT_APORTOUTSEL_APORT3YCH11 << 16)

#define	VDAC_OPA_OUT_APORTOUTSEL_APORT3YCH13 ( _VDAC_OPA_OUT_APORTOUTSEL_APORT3YCH13 << 16)

#define	VDAC_OPA_OUT_APORTOUTSEL_APORT3YCH15 ( _VDAC_OPA_OUT_APORTOUTSEL_APORT3YCH15 << 16)

#define	VDAC_OPA_OUT_APORTOUTSEL_APORT3YCH17 ( _VDAC_OPA_OUT_APORTOUTSEL_APORT3YCH17 << 16)

#define	VDAC_OPA_OUT_APORTOUTSEL_APORT3YCH19 ( _VDAC_OPA_OUT_APORTOUTSEL_APORT3YCH19 << 16)

#define	VDAC_OPA_OUT_APORTOUTSEL_APORT3YCH21 ( _VDAC_OPA_OUT_APORTOUTSEL_APORT3YCH21 << 16)

#define	VDAC_OPA_OUT_APORTOUTSEL_APORT3YCH23 ( _VDAC_OPA_OUT_APORTOUTSEL_APORT3YCH23 << 16)

#define	VDAC_OPA_OUT_APORTOUTSEL_APORT3YCH25 ( _VDAC_OPA_OUT_APORTOUTSEL_APORT3YCH25 << 16)

#define	VDAC_OPA_OUT_APORTOUTSEL_APORT3YCH27 ( _VDAC_OPA_OUT_APORTOUTSEL_APORT3YCH27 << 16)

#define	VDAC_OPA_OUT_APORTOUTSEL_APORT3YCH29 ( _VDAC_OPA_OUT_APORTOUTSEL_APORT3YCH29 << 16)

#define	VDAC_OPA_OUT_APORTOUTSEL_APORT3YCH3 ( _VDAC_OPA_OUT_APORTOUTSEL_APORT3YCH3 << 16)

#define	VDAC_OPA_OUT_APORTOUTSEL_APORT3YCH31 ( _VDAC_OPA_OUT_APORTOUTSEL_APORT3YCH31 << 16)

#define	VDAC_OPA_OUT_APORTOUTSEL_APORT3YCH5 ( _VDAC_OPA_OUT_APORTOUTSEL_APORT3YCH5 << 16)

#define	VDAC_OPA_OUT_APORTOUTSEL_APORT3YCH7 ( _VDAC_OPA_OUT_APORTOUTSEL_APORT3YCH7 << 16)

#define	VDAC_OPA_OUT_APORTOUTSEL_APORT3YCH9 ( _VDAC_OPA_OUT_APORTOUTSEL_APORT3YCH9 << 16)

#define	VDAC_OPA_OUT_APORTOUTSEL_APORT4YCH0 ( _VDAC_OPA_OUT_APORTOUTSEL_APORT4YCH0 << 16)

#define	VDAC_OPA_OUT_APORTOUTSEL_APORT4YCH10 ( _VDAC_OPA_OUT_APORTOUTSEL_APORT4YCH10 << 16)

#define	VDAC_OPA_OUT_APORTOUTSEL_APORT4YCH12 ( _VDAC_OPA_OUT_APORTOUTSEL_APORT4YCH12 << 16)

#define	VDAC_OPA_OUT_APORTOUTSEL_APORT4YCH14 ( _VDAC_OPA_OUT_APORTOUTSEL_APORT4YCH14 << 16)

#define	VDAC_OPA_OUT_APORTOUTSEL_APORT4YCH16 ( _VDAC_OPA_OUT_APORTOUTSEL_APORT4YCH16 << 16)

#define	VDAC_OPA_OUT_APORTOUTSEL_APORT4YCH18 ( _VDAC_OPA_OUT_APORTOUTSEL_APORT4YCH18 << 16)

#define	VDAC_OPA_OUT_APORTOUTSEL_APORT4YCH2 ( _VDAC_OPA_OUT_APORTOUTSEL_APORT4YCH2 << 16)

#define	VDAC_OPA_OUT_APORTOUTSEL_APORT4YCH20 ( _VDAC_OPA_OUT_APORTOUTSEL_APORT4YCH20 << 16)

#define	VDAC_OPA_OUT_APORTOUTSEL_APORT4YCH22 ( _VDAC_OPA_OUT_APORTOUTSEL_APORT4YCH22 << 16)

#define	VDAC_OPA_OUT_APORTOUTSEL_APORT4YCH24 ( _VDAC_OPA_OUT_APORTOUTSEL_APORT4YCH24 << 16)

#define	VDAC_OPA_OUT_APORTOUTSEL_APORT4YCH26 ( _VDAC_OPA_OUT_APORTOUTSEL_APORT4YCH26 << 16)

#define	VDAC_OPA_OUT_APORTOUTSEL_APORT4YCH28 ( _VDAC_OPA_OUT_APORTOUTSEL_APORT4YCH28 << 16)

#define	VDAC_OPA_OUT_APORTOUTSEL_APORT4YCH30 ( _VDAC_OPA_OUT_APORTOUTSEL_APORT4YCH30 << 16)

#define	VDAC_OPA_OUT_APORTOUTSEL_APORT4YCH4 ( _VDAC_OPA_OUT_APORTOUTSEL_APORT4YCH4 << 16)

#define	VDAC_OPA_OUT_APORTOUTSEL_APORT4YCH6 ( _VDAC_OPA_OUT_APORTOUTSEL_APORT4YCH6 << 16)

#define	VDAC_OPA_OUT_APORTOUTSEL_APORT4YCH8 ( _VDAC_OPA_OUT_APORTOUTSEL_APORT4YCH8 << 16)

#define	VDAC_OPA_OUT_APORTOUTSEL_DEFAULT ( _VDAC_OPA_OUT_APORTOUTSEL_DEFAULT << 16)

#define	VDAC_OPA_OUT_MAINOUTEN (0x1UL << 0)

#define	VDAC_OPA_OUT_MAINOUTEN_DEFAULT ( _VDAC_OPA_OUT_MAINOUTEN_DEFAULT << 0)

#define	VDAC_OPA_OUT_SHORT (0x1UL << 3)

#define	VDAC_OPA_OUT_SHORT_DEFAULT ( _VDAC_OPA_OUT_SHORT_DEFAULT << 3)

#define	VDAC_OPA_TIMER_SETTLETIME_DEFAULT ( _VDAC_OPA_TIMER_SETTLETIME_DEFAULT << 16)

#define	VDAC_OPA_TIMER_STARTUPDLY_DEFAULT ( _VDAC_OPA_TIMER_STARTUPDLY_DEFAULT << 0)

#define	VDAC_OPA_TIMER_WARMUPTIME_DEFAULT ( _VDAC_OPA_TIMER_WARMUPTIME_DEFAULT << 8)

#define	VDAC_STATUS_CH0BL (0x1UL << 2)

#define	VDAC_STATUS_CH0BL_DEFAULT ( _VDAC_STATUS_CH0BL_DEFAULT << 2)

#define	VDAC_STATUS_CH0ENS (0x1UL << 0)

#define	VDAC_STATUS_CH0ENS_DEFAULT ( _VDAC_STATUS_CH0ENS_DEFAULT << 0)

#define	VDAC_STATUS_CH0WARM (0x1UL << 4)

#define	VDAC_STATUS_CH0WARM_DEFAULT ( _VDAC_STATUS_CH0WARM_DEFAULT << 4)

#define	VDAC_STATUS_CH1BL (0x1UL << 3)

#define	VDAC_STATUS_CH1BL_DEFAULT ( _VDAC_STATUS_CH1BL_DEFAULT << 3)

#define	VDAC_STATUS_CH1ENS (0x1UL << 1)

#define	VDAC_STATUS_CH1ENS_DEFAULT ( _VDAC_STATUS_CH1ENS_DEFAULT << 1)

#define	VDAC_STATUS_CH1WARM (0x1UL << 5)

#define	VDAC_STATUS_CH1WARM_DEFAULT ( _VDAC_STATUS_CH1WARM_DEFAULT << 5)

#define	VDAC_STATUS_OPA0APORTCONFLICT (0x1UL << 16)

#define	VDAC_STATUS_OPA0APORTCONFLICT_DEFAULT ( _VDAC_STATUS_OPA0APORTCONFLICT_DEFAULT << 16)

#define	VDAC_STATUS_OPA0ENS (0x1UL << 20)

#define	VDAC_STATUS_OPA0ENS_DEFAULT ( _VDAC_STATUS_OPA0ENS_DEFAULT << 20)

#define	VDAC_STATUS_OPA0OUTVALID (0x1UL << 28)

#define	VDAC_STATUS_OPA0OUTVALID_DEFAULT ( _VDAC_STATUS_OPA0OUTVALID_DEFAULT << 28)

#define	VDAC_STATUS_OPA0WARM (0x1UL << 24)

#define	VDAC_STATUS_OPA0WARM_DEFAULT ( _VDAC_STATUS_OPA0WARM_DEFAULT << 24)

#define	VDAC_STATUS_OPA1APORTCONFLICT (0x1UL << 17)

#define	VDAC_STATUS_OPA1APORTCONFLICT_DEFAULT ( _VDAC_STATUS_OPA1APORTCONFLICT_DEFAULT << 17)

#define	VDAC_STATUS_OPA1ENS (0x1UL << 21)

#define	VDAC_STATUS_OPA1ENS_DEFAULT ( _VDAC_STATUS_OPA1ENS_DEFAULT << 21)

#define	VDAC_STATUS_OPA1OUTVALID (0x1UL << 29)

#define	VDAC_STATUS_OPA1OUTVALID_DEFAULT ( _VDAC_STATUS_OPA1OUTVALID_DEFAULT << 29)

#define	VDAC_STATUS_OPA1WARM (0x1UL << 25)

#define	VDAC_STATUS_OPA1WARM_DEFAULT ( _VDAC_STATUS_OPA1WARM_DEFAULT << 25)

#define	VDAC_STATUS_OPA2APORTCONFLICT (0x1UL << 18)

#define	VDAC_STATUS_OPA2APORTCONFLICT_DEFAULT ( _VDAC_STATUS_OPA2APORTCONFLICT_DEFAULT << 18)

#define	VDAC_STATUS_OPA2ENS (0x1UL << 22)

#define	VDAC_STATUS_OPA2ENS_DEFAULT ( _VDAC_STATUS_OPA2ENS_DEFAULT << 22)

#define	VDAC_STATUS_OPA2OUTVALID (0x1UL << 30)

#define	VDAC_STATUS_OPA2OUTVALID_DEFAULT ( _VDAC_STATUS_OPA2OUTVALID_DEFAULT << 30)

#define	VDAC_STATUS_OPA2WARM (0x1UL << 26)

#define	VDAC_STATUS_OPA2WARM_DEFAULT ( _VDAC_STATUS_OPA2WARM_DEFAULT << 26)

#define	VDAC_STATUS_OPA3APORTCONFLICT (0x1UL << 19)

#define	VDAC_STATUS_OPA3APORTCONFLICT_DEFAULT ( _VDAC_STATUS_OPA3APORTCONFLICT_DEFAULT << 19)

#define	VDAC_STATUS_OPA3ENS (0x1UL << 23)

#define	VDAC_STATUS_OPA3ENS_DEFAULT ( _VDAC_STATUS_OPA3ENS_DEFAULT << 23)

#define	VDAC_STATUS_OPA3OUTVALID (0x1UL << 31)

#define	VDAC_STATUS_OPA3OUTVALID_DEFAULT ( _VDAC_STATUS_OPA3OUTVALID_DEFAULT << 31)

#define	VDAC_STATUS_OPA3WARM (0x1UL << 27)

#define	VDAC_STATUS_OPA3WARM_DEFAULT ( _VDAC_STATUS_OPA3WARM_DEFAULT << 27)

Macro Definition Documentation

#define _VDAC_CAL_GAINERRTRIM_DEFAULT 0x00000020UL

Mode DEFAULT for VDAC_CAL

Definition at line 921 of file efm32gg12b_vdac.h .

#define _VDAC_CAL_GAINERRTRIM_MASK 0x3F00UL

Bit mask for VDAC_GAINERRTRIM

Definition at line 920 of file efm32gg12b_vdac.h .

#define _VDAC_CAL_GAINERRTRIM_SHIFT 8

Shift value for VDAC_GAINERRTRIM

Definition at line 919 of file efm32gg12b_vdac.h .

Referenced by VDAC_Init() .

#define _VDAC_CAL_GAINERRTRIMCH1_DEFAULT 0x00000008UL

Mode DEFAULT for VDAC_CAL

Definition at line 925 of file efm32gg12b_vdac.h .

#define _VDAC_CAL_GAINERRTRIMCH1_MASK 0xF0000UL

Bit mask for VDAC_GAINERRTRIMCH1

Definition at line 924 of file efm32gg12b_vdac.h .

#define _VDAC_CAL_GAINERRTRIMCH1_SHIFT 16

Shift value for VDAC_GAINERRTRIMCH1

Definition at line 923 of file efm32gg12b_vdac.h .

Referenced by VDAC_Init() .

#define _VDAC_CAL_MASK 0x000F3F07UL

Mask for VDAC_CAL

Definition at line 914 of file efm32gg12b_vdac.h .

#define _VDAC_CAL_OFFSETTRIM_DEFAULT 0x00000004UL

Mode DEFAULT for VDAC_CAL

Definition at line 917 of file efm32gg12b_vdac.h .

#define _VDAC_CAL_OFFSETTRIM_MASK 0x7UL

Bit mask for VDAC_OFFSETTRIM

Definition at line 916 of file efm32gg12b_vdac.h .

#define _VDAC_CAL_OFFSETTRIM_SHIFT 0

Shift value for VDAC_OFFSETTRIM

Definition at line 915 of file efm32gg12b_vdac.h .

Referenced by VDAC_Init() .

#define _VDAC_CAL_RESETVALUE 0x00082004UL

Default value for VDAC_CAL

Definition at line 913 of file efm32gg12b_vdac.h .

Referenced by VDAC_Reset() .

#define _VDAC_CH0CTRL_CONVMODE_CONTINUOUS 0x00000000UL

Mode CONTINUOUS for VDAC_CH0CTRL

Definition at line 271 of file efm32gg12b_vdac.h .

#define _VDAC_CH0CTRL_CONVMODE_DEFAULT 0x00000000UL

Mode DEFAULT for VDAC_CH0CTRL

Definition at line 270 of file efm32gg12b_vdac.h .

#define _VDAC_CH0CTRL_CONVMODE_MASK 0x1UL

Bit mask for VDAC_CONVMODE

Definition at line 269 of file efm32gg12b_vdac.h .

#define _VDAC_CH0CTRL_CONVMODE_SAMPLEOFF 0x00000001UL

Mode SAMPLEOFF for VDAC_CH0CTRL

Definition at line 272 of file efm32gg12b_vdac.h .

#define _VDAC_CH0CTRL_CONVMODE_SHIFT 0

Shift value for VDAC_CONVMODE

Definition at line 268 of file efm32gg12b_vdac.h .

Referenced by VDAC_InitChannel() .

#define _VDAC_CH0CTRL_MASK 0x0000F171UL

Mask for VDAC_CH0CTRL

Definition at line 266 of file efm32gg12b_vdac.h .

#define _VDAC_CH0CTRL_PRSASYNC_DEFAULT 0x00000000UL

Mode DEFAULT for VDAC_CH0CTRL

Definition at line 295 of file efm32gg12b_vdac.h .

#define _VDAC_CH0CTRL_PRSASYNC_MASK 0x100UL

Bit mask for VDAC_PRSASYNC

Definition at line 294 of file efm32gg12b_vdac.h .

#define _VDAC_CH0CTRL_PRSASYNC_SHIFT 8

Shift value for VDAC_PRSASYNC

Definition at line 293 of file efm32gg12b_vdac.h .

Referenced by VDAC_InitChannel() .

#define _VDAC_CH0CTRL_PRSSEL_DEFAULT 0x00000000UL

Mode DEFAULT for VDAC_CH0CTRL

Definition at line 299 of file efm32gg12b_vdac.h .

#define _VDAC_CH0CTRL_PRSSEL_MASK 0xF000UL

Bit mask for VDAC_PRSSEL

Definition at line 298 of file efm32gg12b_vdac.h .

#define _VDAC_CH0CTRL_PRSSEL_PRSCH0 0x00000000UL

Mode PRSCH0 for VDAC_CH0CTRL

Definition at line 300 of file efm32gg12b_vdac.h .

#define _VDAC_CH0CTRL_PRSSEL_PRSCH1 0x00000001UL

Mode PRSCH1 for VDAC_CH0CTRL

Definition at line 301 of file efm32gg12b_vdac.h .

#define _VDAC_CH0CTRL_PRSSEL_PRSCH10 0x0000000AUL

Mode PRSCH10 for VDAC_CH0CTRL

Definition at line 310 of file efm32gg12b_vdac.h .

#define _VDAC_CH0CTRL_PRSSEL_PRSCH11 0x0000000BUL

Mode PRSCH11 for VDAC_CH0CTRL

Definition at line 311 of file efm32gg12b_vdac.h .

#define _VDAC_CH0CTRL_PRSSEL_PRSCH12 0x0000000CUL

Mode PRSCH12 for VDAC_CH0CTRL

Definition at line 312 of file efm32gg12b_vdac.h .

#define _VDAC_CH0CTRL_PRSSEL_PRSCH13 0x0000000DUL

Mode PRSCH13 for VDAC_CH0CTRL

Definition at line 313 of file efm32gg12b_vdac.h .

#define _VDAC_CH0CTRL_PRSSEL_PRSCH14 0x0000000EUL

Mode PRSCH14 for VDAC_CH0CTRL

Definition at line 314 of file efm32gg12b_vdac.h .

#define _VDAC_CH0CTRL_PRSSEL_PRSCH15 0x0000000FUL

Mode PRSCH15 for VDAC_CH0CTRL

Definition at line 315 of file efm32gg12b_vdac.h .

#define _VDAC_CH0CTRL_PRSSEL_PRSCH2 0x00000002UL

Mode PRSCH2 for VDAC_CH0CTRL

Definition at line 302 of file efm32gg12b_vdac.h .

#define _VDAC_CH0CTRL_PRSSEL_PRSCH3 0x00000003UL

Mode PRSCH3 for VDAC_CH0CTRL

Definition at line 303 of file efm32gg12b_vdac.h .

#define _VDAC_CH0CTRL_PRSSEL_PRSCH4 0x00000004UL

Mode PRSCH4 for VDAC_CH0CTRL

Definition at line 304 of file efm32gg12b_vdac.h .

#define _VDAC_CH0CTRL_PRSSEL_PRSCH5 0x00000005UL

Mode PRSCH5 for VDAC_CH0CTRL

Definition at line 305 of file efm32gg12b_vdac.h .

#define _VDAC_CH0CTRL_PRSSEL_PRSCH6 0x00000006UL

Mode PRSCH6 for VDAC_CH0CTRL

Definition at line 306 of file efm32gg12b_vdac.h .

#define _VDAC_CH0CTRL_PRSSEL_PRSCH7 0x00000007UL

Mode PRSCH7 for VDAC_CH0CTRL

Definition at line 307 of file efm32gg12b_vdac.h .

#define _VDAC_CH0CTRL_PRSSEL_PRSCH8 0x00000008UL

Mode PRSCH8 for VDAC_CH0CTRL

Definition at line 308 of file efm32gg12b_vdac.h .

#define _VDAC_CH0CTRL_PRSSEL_PRSCH9 0x00000009UL

Mode PRSCH9 for VDAC_CH0CTRL

Definition at line 309 of file efm32gg12b_vdac.h .

#define _VDAC_CH0CTRL_PRSSEL_SHIFT 12

Shift value for VDAC_PRSSEL

Definition at line 297 of file efm32gg12b_vdac.h .

Referenced by VDAC_InitChannel() .

#define _VDAC_CH0CTRL_RESETVALUE 0x00000000UL

Default value for VDAC_CH0CTRL

Definition at line 265 of file efm32gg12b_vdac.h .

Referenced by VDAC_Reset() .

#define _VDAC_CH0CTRL_TRIGMODE_DEFAULT 0x00000000UL

Mode DEFAULT for VDAC_CH0CTRL

Definition at line 278 of file efm32gg12b_vdac.h .

#define _VDAC_CH0CTRL_TRIGMODE_LESENSE 0x00000005UL

Mode LESENSE for VDAC_CH0CTRL

Definition at line 284 of file efm32gg12b_vdac.h .

#define _VDAC_CH0CTRL_TRIGMODE_MASK 0x70UL

Bit mask for VDAC_TRIGMODE

Definition at line 277 of file efm32gg12b_vdac.h .

#define _VDAC_CH0CTRL_TRIGMODE_PRS 0x00000001UL

Mode PRS for VDAC_CH0CTRL

Definition at line 280 of file efm32gg12b_vdac.h .

#define _VDAC_CH0CTRL_TRIGMODE_REFRESH 0x00000002UL

Mode REFRESH for VDAC_CH0CTRL

Definition at line 281 of file efm32gg12b_vdac.h .

#define _VDAC_CH0CTRL_TRIGMODE_SHIFT 4

Shift value for VDAC_TRIGMODE

Definition at line 276 of file efm32gg12b_vdac.h .

Referenced by VDAC_InitChannel() .

#define _VDAC_CH0CTRL_TRIGMODE_SW 0x00000000UL

Mode SW for VDAC_CH0CTRL

Definition at line 279 of file efm32gg12b_vdac.h .

#define _VDAC_CH0CTRL_TRIGMODE_SWPRS 0x00000003UL

Mode SWPRS for VDAC_CH0CTRL

Definition at line 282 of file efm32gg12b_vdac.h .

#define _VDAC_CH0CTRL_TRIGMODE_SWREFRESH 0x00000004UL

Mode SWREFRESH for VDAC_CH0CTRL

Definition at line 283 of file efm32gg12b_vdac.h .

#define _VDAC_CH0DATA_DATA_DEFAULT 0x00000800UL

Mode DEFAULT for VDAC_CH0DATA

Definition at line 889 of file efm32gg12b_vdac.h .

#define _VDAC_CH0DATA_DATA_MASK 0xFFFUL

Bit mask for VDAC_DATA

Definition at line 888 of file efm32gg12b_vdac.h .

#define _VDAC_CH0DATA_DATA_SHIFT 0

Shift value for VDAC_DATA

Definition at line 887 of file efm32gg12b_vdac.h .

#define _VDAC_CH0DATA_MASK 0x00000FFFUL

Mask for VDAC_CH0DATA

Definition at line 886 of file efm32gg12b_vdac.h .

Referenced by VDAC_Channel0OutputSet() .

#define _VDAC_CH0DATA_RESETVALUE 0x00000800UL

Default value for VDAC_CH0DATA

Definition at line 885 of file efm32gg12b_vdac.h .

Referenced by VDAC_Reset() .

#define _VDAC_CH1CTRL_CONVMODE_CONTINUOUS 0x00000000UL

Mode CONTINUOUS for VDAC_CH1CTRL

Definition at line 341 of file efm32gg12b_vdac.h .

#define _VDAC_CH1CTRL_CONVMODE_DEFAULT 0x00000000UL

Mode DEFAULT for VDAC_CH1CTRL

Definition at line 340 of file efm32gg12b_vdac.h .

#define _VDAC_CH1CTRL_CONVMODE_MASK 0x1UL

Bit mask for VDAC_CONVMODE

Definition at line 339 of file efm32gg12b_vdac.h .

#define _VDAC_CH1CTRL_CONVMODE_SAMPLEOFF 0x00000001UL

Mode SAMPLEOFF for VDAC_CH1CTRL

Definition at line 342 of file efm32gg12b_vdac.h .

#define _VDAC_CH1CTRL_CONVMODE_SHIFT 0

Shift value for VDAC_CONVMODE

Definition at line 338 of file efm32gg12b_vdac.h .

#define _VDAC_CH1CTRL_MASK 0x0000F171UL

Mask for VDAC_CH1CTRL

Definition at line 336 of file efm32gg12b_vdac.h .

#define _VDAC_CH1CTRL_PRSASYNC_DEFAULT 0x00000000UL

Mode DEFAULT for VDAC_CH1CTRL

Definition at line 365 of file efm32gg12b_vdac.h .

#define _VDAC_CH1CTRL_PRSASYNC_MASK 0x100UL

Bit mask for VDAC_PRSASYNC

Definition at line 364 of file efm32gg12b_vdac.h .

#define _VDAC_CH1CTRL_PRSASYNC_SHIFT 8

Shift value for VDAC_PRSASYNC

Definition at line 363 of file efm32gg12b_vdac.h .

#define _VDAC_CH1CTRL_PRSSEL_DEFAULT 0x00000000UL

Mode DEFAULT for VDAC_CH1CTRL

Definition at line 369 of file efm32gg12b_vdac.h .

#define _VDAC_CH1CTRL_PRSSEL_MASK 0xF000UL

Bit mask for VDAC_PRSSEL

Definition at line 368 of file efm32gg12b_vdac.h .

#define _VDAC_CH1CTRL_PRSSEL_PRSCH0 0x00000000UL

Mode PRSCH0 for VDAC_CH1CTRL

Definition at line 370 of file efm32gg12b_vdac.h .

#define _VDAC_CH1CTRL_PRSSEL_PRSCH1 0x00000001UL

Mode PRSCH1 for VDAC_CH1CTRL

Definition at line 371 of file efm32gg12b_vdac.h .

#define _VDAC_CH1CTRL_PRSSEL_PRSCH10 0x0000000AUL

Mode PRSCH10 for VDAC_CH1CTRL

Definition at line 380 of file efm32gg12b_vdac.h .

#define _VDAC_CH1CTRL_PRSSEL_PRSCH11 0x0000000BUL

Mode PRSCH11 for VDAC_CH1CTRL

Definition at line 381 of file efm32gg12b_vdac.h .

#define _VDAC_CH1CTRL_PRSSEL_PRSCH12 0x0000000CUL

Mode PRSCH12 for VDAC_CH1CTRL

Definition at line 382 of file efm32gg12b_vdac.h .

#define _VDAC_CH1CTRL_PRSSEL_PRSCH13 0x0000000DUL

Mode PRSCH13 for VDAC_CH1CTRL

Definition at line 383 of file efm32gg12b_vdac.h .

#define _VDAC_CH1CTRL_PRSSEL_PRSCH14 0x0000000EUL

Mode PRSCH14 for VDAC_CH1CTRL

Definition at line 384 of file efm32gg12b_vdac.h .

#define _VDAC_CH1CTRL_PRSSEL_PRSCH15 0x0000000FUL

Mode PRSCH15 for VDAC_CH1CTRL

Definition at line 385 of file efm32gg12b_vdac.h .

#define _VDAC_CH1CTRL_PRSSEL_PRSCH2 0x00000002UL

Mode PRSCH2 for VDAC_CH1CTRL

Definition at line 372 of file efm32gg12b_vdac.h .

#define _VDAC_CH1CTRL_PRSSEL_PRSCH3 0x00000003UL

Mode PRSCH3 for VDAC_CH1CTRL

Definition at line 373 of file efm32gg12b_vdac.h .

#define _VDAC_CH1CTRL_PRSSEL_PRSCH4 0x00000004UL

Mode PRSCH4 for VDAC_CH1CTRL

Definition at line 374 of file efm32gg12b_vdac.h .

#define _VDAC_CH1CTRL_PRSSEL_PRSCH5 0x00000005UL

Mode PRSCH5 for VDAC_CH1CTRL

Definition at line 375 of file efm32gg12b_vdac.h .

#define _VDAC_CH1CTRL_PRSSEL_PRSCH6 0x00000006UL

Mode PRSCH6 for VDAC_CH1CTRL

Definition at line 376 of file efm32gg12b_vdac.h .

#define _VDAC_CH1CTRL_PRSSEL_PRSCH7 0x00000007UL

Mode PRSCH7 for VDAC_CH1CTRL

Definition at line 377 of file efm32gg12b_vdac.h .

#define _VDAC_CH1CTRL_PRSSEL_PRSCH8 0x00000008UL

Mode PRSCH8 for VDAC_CH1CTRL

Definition at line 378 of file efm32gg12b_vdac.h .

#define _VDAC_CH1CTRL_PRSSEL_PRSCH9 0x00000009UL

Mode PRSCH9 for VDAC_CH1CTRL

Definition at line 379 of file efm32gg12b_vdac.h .

#define _VDAC_CH1CTRL_PRSSEL_SHIFT 12

Shift value for VDAC_PRSSEL

Definition at line 367 of file efm32gg12b_vdac.h .

#define _VDAC_CH1CTRL_RESETVALUE 0x00000000UL

Default value for VDAC_CH1CTRL

Definition at line 335 of file efm32gg12b_vdac.h .

Referenced by VDAC_Reset() .

#define _VDAC_CH1CTRL_TRIGMODE_DEFAULT 0x00000000UL

Mode DEFAULT for VDAC_CH1CTRL

Definition at line 348 of file efm32gg12b_vdac.h .

#define _VDAC_CH1CTRL_TRIGMODE_LESENSE 0x00000005UL

Mode LESENSE for VDAC_CH1CTRL

Definition at line 354 of file efm32gg12b_vdac.h .

#define _VDAC_CH1CTRL_TRIGMODE_MASK 0x70UL

Bit mask for VDAC_TRIGMODE

Definition at line 347 of file efm32gg12b_vdac.h .

#define _VDAC_CH1CTRL_TRIGMODE_PRS 0x00000001UL

Mode PRS for VDAC_CH1CTRL

Definition at line 350 of file efm32gg12b_vdac.h .

#define _VDAC_CH1CTRL_TRIGMODE_REFRESH 0x00000002UL

Mode REFRESH for VDAC_CH1CTRL

Definition at line 351 of file efm32gg12b_vdac.h .

#define _VDAC_CH1CTRL_TRIGMODE_SHIFT 4

Shift value for VDAC_TRIGMODE

Definition at line 346 of file efm32gg12b_vdac.h .

#define _VDAC_CH1CTRL_TRIGMODE_SW 0x00000000UL

Mode SW for VDAC_CH1CTRL

Definition at line 349 of file efm32gg12b_vdac.h .

#define _VDAC_CH1CTRL_TRIGMODE_SWPRS 0x00000003UL

Mode SWPRS for VDAC_CH1CTRL

Definition at line 352 of file efm32gg12b_vdac.h .

#define _VDAC_CH1CTRL_TRIGMODE_SWREFRESH 0x00000004UL

Mode SWREFRESH for VDAC_CH1CTRL

Definition at line 353 of file efm32gg12b_vdac.h .

#define _VDAC_CH1DATA_DATA_DEFAULT 0x00000800UL

Mode DEFAULT for VDAC_CH1DATA

Definition at line 897 of file efm32gg12b_vdac.h .

#define _VDAC_CH1DATA_DATA_MASK 0xFFFUL

Bit mask for VDAC_DATA

Definition at line 896 of file efm32gg12b_vdac.h .

#define _VDAC_CH1DATA_DATA_SHIFT 0

Shift value for VDAC_DATA

Definition at line 895 of file efm32gg12b_vdac.h .

#define _VDAC_CH1DATA_MASK 0x00000FFFUL

Mask for VDAC_CH1DATA

Definition at line 894 of file efm32gg12b_vdac.h .

Referenced by VDAC_Channel1OutputSet() .

#define _VDAC_CH1DATA_RESETVALUE 0x00000800UL

Default value for VDAC_CH1DATA

Definition at line 893 of file efm32gg12b_vdac.h .

Referenced by VDAC_Reset() .

#define _VDAC_CMD_CH0DIS_DEFAULT 0x00000000UL

Mode DEFAULT for VDAC_CMD

Definition at line 415 of file efm32gg12b_vdac.h .

#define _VDAC_CMD_CH0DIS_MASK 0x2UL

Bit mask for VDAC_CH0DIS

Definition at line 414 of file efm32gg12b_vdac.h .

#define _VDAC_CMD_CH0DIS_SHIFT 1

Shift value for VDAC_CH0DIS

Definition at line 413 of file efm32gg12b_vdac.h .

#define _VDAC_CMD_CH0EN_DEFAULT 0x00000000UL

Mode DEFAULT for VDAC_CMD

Definition at line 410 of file efm32gg12b_vdac.h .

#define _VDAC_CMD_CH0EN_MASK 0x1UL

Bit mask for VDAC_CH0EN

Definition at line 409 of file efm32gg12b_vdac.h .

#define _VDAC_CMD_CH0EN_SHIFT 0

Shift value for VDAC_CH0EN

Definition at line 408 of file efm32gg12b_vdac.h .

#define _VDAC_CMD_CH1DIS_DEFAULT 0x00000000UL

Mode DEFAULT for VDAC_CMD

Definition at line 425 of file efm32gg12b_vdac.h .

#define _VDAC_CMD_CH1DIS_MASK 0x8UL

Bit mask for VDAC_CH1DIS

Definition at line 424 of file efm32gg12b_vdac.h .

#define _VDAC_CMD_CH1DIS_SHIFT 3

Shift value for VDAC_CH1DIS

Definition at line 423 of file efm32gg12b_vdac.h .

#define _VDAC_CMD_CH1EN_DEFAULT 0x00000000UL

Mode DEFAULT for VDAC_CMD

Definition at line 420 of file efm32gg12b_vdac.h .

#define _VDAC_CMD_CH1EN_MASK 0x4UL

Bit mask for VDAC_CH1EN

Definition at line 419 of file efm32gg12b_vdac.h .

#define _VDAC_CMD_CH1EN_SHIFT 2

Shift value for VDAC_CH1EN

Definition at line 418 of file efm32gg12b_vdac.h .

#define _VDAC_CMD_MASK 0x00FF000FUL

Mask for VDAC_CMD

Definition at line 406 of file efm32gg12b_vdac.h .

#define _VDAC_CMD_OPA0DIS_DEFAULT 0x00000000UL

Mode DEFAULT for VDAC_CMD

Definition at line 435 of file efm32gg12b_vdac.h .

#define _VDAC_CMD_OPA0DIS_MASK 0x20000UL

Bit mask for VDAC_OPA0DIS

Definition at line 434 of file efm32gg12b_vdac.h .

#define _VDAC_CMD_OPA0DIS_SHIFT 17

Shift value for VDAC_OPA0DIS

Definition at line 433 of file efm32gg12b_vdac.h .

#define _VDAC_CMD_OPA0EN_DEFAULT 0x00000000UL

Mode DEFAULT for VDAC_CMD

Definition at line 430 of file efm32gg12b_vdac.h .

#define _VDAC_CMD_OPA0EN_MASK 0x10000UL

Bit mask for VDAC_OPA0EN

Definition at line 429 of file efm32gg12b_vdac.h .

#define _VDAC_CMD_OPA0EN_SHIFT 16

Shift value for VDAC_OPA0EN

Definition at line 428 of file efm32gg12b_vdac.h .

#define _VDAC_CMD_OPA1DIS_DEFAULT 0x00000000UL

Mode DEFAULT for VDAC_CMD

Definition at line 445 of file efm32gg12b_vdac.h .

#define _VDAC_CMD_OPA1DIS_MASK 0x80000UL

Bit mask for VDAC_OPA1DIS

Definition at line 444 of file efm32gg12b_vdac.h .

#define _VDAC_CMD_OPA1DIS_SHIFT 19

Shift value for VDAC_OPA1DIS

Definition at line 443 of file efm32gg12b_vdac.h .

#define _VDAC_CMD_OPA1EN_DEFAULT 0x00000000UL

Mode DEFAULT for VDAC_CMD

Definition at line 440 of file efm32gg12b_vdac.h .

#define _VDAC_CMD_OPA1EN_MASK 0x40000UL

Bit mask for VDAC_OPA1EN

Definition at line 439 of file efm32gg12b_vdac.h .

#define _VDAC_CMD_OPA1EN_SHIFT 18

Shift value for VDAC_OPA1EN

Definition at line 438 of file efm32gg12b_vdac.h .

#define _VDAC_CMD_OPA2DIS_DEFAULT 0x00000000UL

Mode DEFAULT for VDAC_CMD

Definition at line 455 of file efm32gg12b_vdac.h .

#define _VDAC_CMD_OPA2DIS_MASK 0x200000UL

Bit mask for VDAC_OPA2DIS

Definition at line 454 of file efm32gg12b_vdac.h .

#define _VDAC_CMD_OPA2DIS_SHIFT 21

Shift value for VDAC_OPA2DIS

Definition at line 453 of file efm32gg12b_vdac.h .

#define _VDAC_CMD_OPA2EN_DEFAULT 0x00000000UL

Mode DEFAULT for VDAC_CMD

Definition at line 450 of file efm32gg12b_vdac.h .

#define _VDAC_CMD_OPA2EN_MASK 0x100000UL

Bit mask for VDAC_OPA2EN

Definition at line 449 of file efm32gg12b_vdac.h .

#define _VDAC_CMD_OPA2EN_SHIFT 20

Shift value for VDAC_OPA2EN

Definition at line 448 of file efm32gg12b_vdac.h .

#define _VDAC_CMD_OPA3DIS_DEFAULT 0x00000000UL

Mode DEFAULT for VDAC_CMD

Definition at line 465 of file efm32gg12b_vdac.h .

#define _VDAC_CMD_OPA3DIS_MASK 0x800000UL

Bit mask for VDAC_OPA3DIS

Definition at line 464 of file efm32gg12b_vdac.h .

#define _VDAC_CMD_OPA3DIS_SHIFT 23

Shift value for VDAC_OPA3DIS

Definition at line 463 of file efm32gg12b_vdac.h .

#define _VDAC_CMD_OPA3EN_DEFAULT 0x00000000UL

Mode DEFAULT for VDAC_CMD

Definition at line 460 of file efm32gg12b_vdac.h .

#define _VDAC_CMD_OPA3EN_MASK 0x400000UL

Bit mask for VDAC_OPA3EN

Definition at line 459 of file efm32gg12b_vdac.h .

#define _VDAC_CMD_OPA3EN_SHIFT 22

Shift value for VDAC_OPA3EN

Definition at line 458 of file efm32gg12b_vdac.h .

#define _VDAC_CMD_RESETVALUE 0x00000000UL

Default value for VDAC_CMD

Definition at line 405 of file efm32gg12b_vdac.h .

#define _VDAC_COMBDATA_CH0DATA_DEFAULT 0x00000800UL

Mode DEFAULT for VDAC_COMBDATA

Definition at line 905 of file efm32gg12b_vdac.h .

#define _VDAC_COMBDATA_CH0DATA_MASK 0xFFFUL

Bit mask for VDAC_CH0DATA

Definition at line 904 of file efm32gg12b_vdac.h .

#define _VDAC_COMBDATA_CH0DATA_SHIFT 0

Shift value for VDAC_CH0DATA

Definition at line 903 of file efm32gg12b_vdac.h .

#define _VDAC_COMBDATA_CH1DATA_DEFAULT 0x00000800UL

Mode DEFAULT for VDAC_COMBDATA

Definition at line 909 of file efm32gg12b_vdac.h .

#define _VDAC_COMBDATA_CH1DATA_MASK 0xFFF0000UL

Bit mask for VDAC_CH1DATA

Definition at line 908 of file efm32gg12b_vdac.h .

#define _VDAC_COMBDATA_CH1DATA_SHIFT 16

Shift value for VDAC_CH1DATA

Definition at line 907 of file efm32gg12b_vdac.h .

#define _VDAC_COMBDATA_MASK 0x0FFF0FFFUL

Mask for VDAC_COMBDATA

Definition at line 902 of file efm32gg12b_vdac.h .

#define _VDAC_COMBDATA_RESETVALUE 0x08000800UL

Default value for VDAC_COMBDATA

Definition at line 901 of file efm32gg12b_vdac.h .

#define _VDAC_CTRL_CH0PRESCRST_DEFAULT 0x00000000UL

Mode DEFAULT for VDAC_CTRL

Definition at line 95 of file efm32gg12b_vdac.h .

#define _VDAC_CTRL_CH0PRESCRST_MASK 0x40UL

Bit mask for VDAC_CH0PRESCRST

Definition at line 94 of file efm32gg12b_vdac.h .

#define _VDAC_CTRL_CH0PRESCRST_SHIFT 6

Shift value for VDAC_CH0PRESCRST

Definition at line 93 of file efm32gg12b_vdac.h .

Referenced by VDAC_Init() .

#define _VDAC_CTRL_DACCLKMODE_ASYNC 0x00000001UL

Mode ASYNC for VDAC_CTRL

Definition at line 145 of file efm32gg12b_vdac.h .

#define _VDAC_CTRL_DACCLKMODE_DEFAULT 0x00000000UL

Mode DEFAULT for VDAC_CTRL

Definition at line 143 of file efm32gg12b_vdac.h .

#define _VDAC_CTRL_DACCLKMODE_MASK 0x80000000UL

Bit mask for VDAC_DACCLKMODE

Definition at line 142 of file efm32gg12b_vdac.h .

#define _VDAC_CTRL_DACCLKMODE_SHIFT 31

Shift value for VDAC_DACCLKMODE

Definition at line 141 of file efm32gg12b_vdac.h .

Referenced by VDAC_Init() .

#define _VDAC_CTRL_DACCLKMODE_SYNC 0x00000000UL

Mode SYNC for VDAC_CTRL

Definition at line 144 of file efm32gg12b_vdac.h .

#define _VDAC_CTRL_DIFF_DEFAULT 0x00000000UL

Mode DEFAULT for VDAC_CTRL

Definition at line 80 of file efm32gg12b_vdac.h .

#define _VDAC_CTRL_DIFF_MASK 0x1UL

Bit mask for VDAC_DIFF

Definition at line 79 of file efm32gg12b_vdac.h .

#define _VDAC_CTRL_DIFF_SHIFT 0

Shift value for VDAC_DIFF

Definition at line 78 of file efm32gg12b_vdac.h .

Referenced by VDAC_Init() .

#define _VDAC_CTRL_MASK 0x937F0771UL

Mask for VDAC_CTRL

Definition at line 76 of file efm32gg12b_vdac.h .

#define _VDAC_CTRL_OUTENPRS_DEFAULT 0x00000000UL

Mode DEFAULT for VDAC_CTRL

Definition at line 90 of file efm32gg12b_vdac.h .

#define _VDAC_CTRL_OUTENPRS_MASK 0x20UL

Bit mask for VDAC_OUTENPRS

Definition at line 89 of file efm32gg12b_vdac.h .

#define _VDAC_CTRL_OUTENPRS_SHIFT 5

Shift value for VDAC_OUTENPRS

Definition at line 88 of file efm32gg12b_vdac.h .

Referenced by VDAC_Init() .

#define _VDAC_CTRL_PRESC_DEFAULT 0x00000000UL

Mode DEFAULT for VDAC_CTRL

Definition at line 115 of file efm32gg12b_vdac.h .

#define _VDAC_CTRL_PRESC_MASK 0x7F0000UL

Bit mask for VDAC_PRESC

Definition at line 114 of file efm32gg12b_vdac.h .

Referenced by VDAC_Init() , and VDAC_PrescaleCalc() .

#define _VDAC_CTRL_PRESC_NODIVISION 0x00000000UL

Mode NODIVISION for VDAC_CTRL

Definition at line 116 of file efm32gg12b_vdac.h .

#define _VDAC_CTRL_PRESC_SHIFT 16

Shift value for VDAC_PRESC

Definition at line 113 of file efm32gg12b_vdac.h .

Referenced by VDAC_Init() , and VDAC_PrescaleCalc() .

#define _VDAC_CTRL_REFRESHPERIOD_16CYCLES 0x00000001UL

Mode 16CYCLES for VDAC_CTRL

Definition at line 123 of file efm32gg12b_vdac.h .

#define _VDAC_CTRL_REFRESHPERIOD_32CYCLES 0x00000002UL

Mode 32CYCLES for VDAC_CTRL

Definition at line 124 of file efm32gg12b_vdac.h .

#define _VDAC_CTRL_REFRESHPERIOD_64CYCLES 0x00000003UL

Mode 64CYCLES for VDAC_CTRL

Definition at line 125 of file efm32gg12b_vdac.h .

#define _VDAC_CTRL_REFRESHPERIOD_8CYCLES 0x00000000UL

Mode 8CYCLES for VDAC_CTRL

Definition at line 122 of file efm32gg12b_vdac.h .

#define _VDAC_CTRL_REFRESHPERIOD_DEFAULT 0x00000000UL

Mode DEFAULT for VDAC_CTRL

Definition at line 121 of file efm32gg12b_vdac.h .

#define _VDAC_CTRL_REFRESHPERIOD_MASK 0x3000000UL

Bit mask for VDAC_REFRESHPERIOD

Definition at line 120 of file efm32gg12b_vdac.h .

#define _VDAC_CTRL_REFRESHPERIOD_SHIFT 24

Shift value for VDAC_REFRESHPERIOD

Definition at line 119 of file efm32gg12b_vdac.h .

Referenced by VDAC_Init() .

#define _VDAC_CTRL_REFSEL_1V25 0x00000002UL

Mode 1V25 for VDAC_CTRL

Definition at line 102 of file efm32gg12b_vdac.h .

#define _VDAC_CTRL_REFSEL_1V25LN 0x00000000UL

Mode 1V25LN for VDAC_CTRL

Definition at line 100 of file efm32gg12b_vdac.h .

#define _VDAC_CTRL_REFSEL_2V5 0x00000003UL

Mode 2V5 for VDAC_CTRL

Definition at line 103 of file efm32gg12b_vdac.h .

#define _VDAC_CTRL_REFSEL_2V5LN 0x00000001UL

Mode 2V5LN for VDAC_CTRL

Definition at line 101 of file efm32gg12b_vdac.h .

#define _VDAC_CTRL_REFSEL_DEFAULT 0x00000000UL

Mode DEFAULT for VDAC_CTRL

Definition at line 99 of file efm32gg12b_vdac.h .

#define _VDAC_CTRL_REFSEL_EXT 0x00000006UL

Mode EXT for VDAC_CTRL

Definition at line 105 of file efm32gg12b_vdac.h .

#define _VDAC_CTRL_REFSEL_MASK 0x700UL

Bit mask for VDAC_REFSEL

Definition at line 98 of file efm32gg12b_vdac.h .

#define _VDAC_CTRL_REFSEL_SHIFT 8

Shift value for VDAC_REFSEL

Definition at line 97 of file efm32gg12b_vdac.h .

Referenced by VDAC_Init() .

#define _VDAC_CTRL_REFSEL_VDD 0x00000004UL

Mode VDD for VDAC_CTRL

Definition at line 104 of file efm32gg12b_vdac.h .

#define _VDAC_CTRL_RESETVALUE 0x00000000UL

Default value for VDAC_CTRL

Definition at line 75 of file efm32gg12b_vdac.h .

Referenced by VDAC_Reset() .

#define _VDAC_CTRL_SINEMODE_DEFAULT 0x00000000UL

Mode DEFAULT for VDAC_CTRL

Definition at line 85 of file efm32gg12b_vdac.h .

#define _VDAC_CTRL_SINEMODE_MASK 0x10UL

Bit mask for VDAC_SINEMODE

Definition at line 84 of file efm32gg12b_vdac.h .

#define _VDAC_CTRL_SINEMODE_SHIFT 4

Shift value for VDAC_SINEMODE

Definition at line 83 of file efm32gg12b_vdac.h .

Referenced by VDAC_Init() .

#define _VDAC_CTRL_WARMUPMODE_DEFAULT 0x00000000UL

Mode DEFAULT for VDAC_CTRL

Definition at line 134 of file efm32gg12b_vdac.h .

#define _VDAC_CTRL_WARMUPMODE_KEEPINSTANDBY 0x00000001UL

Mode KEEPINSTANDBY for VDAC_CTRL

Definition at line 136 of file efm32gg12b_vdac.h .

#define _VDAC_CTRL_WARMUPMODE_MASK 0x10000000UL

Bit mask for VDAC_WARMUPMODE

Definition at line 133 of file efm32gg12b_vdac.h .

#define _VDAC_CTRL_WARMUPMODE_NORMAL 0x00000000UL

Mode NORMAL for VDAC_CTRL

Definition at line 135 of file efm32gg12b_vdac.h .

#define _VDAC_CTRL_WARMUPMODE_SHIFT 28

Shift value for VDAC_WARMUPMODE

Definition at line 132 of file efm32gg12b_vdac.h .

Referenced by VDAC_Init() .

#define _VDAC_IEN_CH0BL_DEFAULT 0x00000000UL

Mode DEFAULT for VDAC_IEN

Definition at line 811 of file efm32gg12b_vdac.h .

#define _VDAC_IEN_CH0BL_MASK 0x40UL

Bit mask for VDAC_CH0BL

Definition at line 810 of file efm32gg12b_vdac.h .

#define _VDAC_IEN_CH0BL_SHIFT 6

Shift value for VDAC_CH0BL

Definition at line 809 of file efm32gg12b_vdac.h .

#define _VDAC_IEN_CH0CD_DEFAULT 0x00000000UL

Mode DEFAULT for VDAC_IEN

Definition at line 781 of file efm32gg12b_vdac.h .

#define _VDAC_IEN_CH0CD_MASK 0x1UL

Bit mask for VDAC_CH0CD

Definition at line 780 of file efm32gg12b_vdac.h .

#define _VDAC_IEN_CH0CD_SHIFT 0

Shift value for VDAC_CH0CD

Definition at line 779 of file efm32gg12b_vdac.h .

#define _VDAC_IEN_CH0OF_DEFAULT 0x00000000UL

Mode DEFAULT for VDAC_IEN

Definition at line 791 of file efm32gg12b_vdac.h .

#define _VDAC_IEN_CH0OF_MASK 0x4UL

Bit mask for VDAC_CH0OF

Definition at line 790 of file efm32gg12b_vdac.h .

#define _VDAC_IEN_CH0OF_SHIFT 2

Shift value for VDAC_CH0OF

Definition at line 789 of file efm32gg12b_vdac.h .

#define _VDAC_IEN_CH0UF_DEFAULT 0x00000000UL

Mode DEFAULT for VDAC_IEN

Definition at line 801 of file efm32gg12b_vdac.h .

#define _VDAC_IEN_CH0UF_MASK 0x10UL

Bit mask for VDAC_CH0UF

Definition at line 800 of file efm32gg12b_vdac.h .

#define _VDAC_IEN_CH0UF_SHIFT 4

Shift value for VDAC_CH0UF

Definition at line 799 of file efm32gg12b_vdac.h .

#define _VDAC_IEN_CH1BL_DEFAULT 0x00000000UL

Mode DEFAULT for VDAC_IEN

Definition at line 816 of file efm32gg12b_vdac.h .

#define _VDAC_IEN_CH1BL_MASK 0x80UL

Bit mask for VDAC_CH1BL

Definition at line 815 of file efm32gg12b_vdac.h .

#define _VDAC_IEN_CH1BL_SHIFT 7

Shift value for VDAC_CH1BL

Definition at line 814 of file efm32gg12b_vdac.h .

#define _VDAC_IEN_CH1CD_DEFAULT 0x00000000UL

Mode DEFAULT for VDAC_IEN

Definition at line 786 of file efm32gg12b_vdac.h .

#define _VDAC_IEN_CH1CD_MASK 0x2UL

Bit mask for VDAC_CH1CD

Definition at line 785 of file efm32gg12b_vdac.h .

#define _VDAC_IEN_CH1CD_SHIFT 1

Shift value for VDAC_CH1CD

Definition at line 784 of file efm32gg12b_vdac.h .

#define _VDAC_IEN_CH1OF_DEFAULT 0x00000000UL

Mode DEFAULT for VDAC_IEN

Definition at line 796 of file efm32gg12b_vdac.h .

#define _VDAC_IEN_CH1OF_MASK 0x8UL

Bit mask for VDAC_CH1OF

Definition at line 795 of file efm32gg12b_vdac.h .

#define _VDAC_IEN_CH1OF_SHIFT 3

Shift value for VDAC_CH1OF

Definition at line 794 of file efm32gg12b_vdac.h .

#define _VDAC_IEN_CH1UF_DEFAULT 0x00000000UL

Mode DEFAULT for VDAC_IEN

Definition at line 806 of file efm32gg12b_vdac.h .

#define _VDAC_IEN_CH1UF_MASK 0x20UL

Bit mask for VDAC_CH1UF

Definition at line 805 of file efm32gg12b_vdac.h .

#define _VDAC_IEN_CH1UF_SHIFT 5

Shift value for VDAC_CH1UF

Definition at line 804 of file efm32gg12b_vdac.h .

#define _VDAC_IEN_EM23ERR_DEFAULT 0x00000000UL

Mode DEFAULT for VDAC_IEN

Definition at line 821 of file efm32gg12b_vdac.h .

#define _VDAC_IEN_EM23ERR_MASK 0x8000UL

Bit mask for VDAC_EM23ERR

Definition at line 820 of file efm32gg12b_vdac.h .

#define _VDAC_IEN_EM23ERR_SHIFT 15

Shift value for VDAC_EM23ERR

Definition at line 819 of file efm32gg12b_vdac.h .

#define _VDAC_IEN_MASK 0xF0FF80FFUL

Mask for VDAC_IEN

Definition at line 777 of file efm32gg12b_vdac.h .

#define _VDAC_IEN_OPA0APORTCONFLICT_DEFAULT 0x00000000UL

Mode DEFAULT for VDAC_IEN

Definition at line 826 of file efm32gg12b_vdac.h .

#define _VDAC_IEN_OPA0APORTCONFLICT_MASK 0x10000UL

Bit mask for VDAC_OPA0APORTCONFLICT

Definition at line 825 of file efm32gg12b_vdac.h .

#define _VDAC_IEN_OPA0APORTCONFLICT_SHIFT 16

Shift value for VDAC_OPA0APORTCONFLICT

Definition at line 824 of file efm32gg12b_vdac.h .

#define _VDAC_IEN_OPA0OUTVALID_DEFAULT 0x00000000UL

Mode DEFAULT for VDAC_IEN

Definition at line 866 of file efm32gg12b_vdac.h .

#define _VDAC_IEN_OPA0OUTVALID_MASK 0x10000000UL

Bit mask for VDAC_OPA0OUTVALID

Definition at line 865 of file efm32gg12b_vdac.h .

#define _VDAC_IEN_OPA0OUTVALID_SHIFT 28

Shift value for VDAC_OPA0OUTVALID

Definition at line 864 of file efm32gg12b_vdac.h .

#define _VDAC_IEN_OPA0PRSTIMEDERR_DEFAULT 0x00000000UL

Mode DEFAULT for VDAC_IEN

Definition at line 846 of file efm32gg12b_vdac.h .

#define _VDAC_IEN_OPA0PRSTIMEDERR_MASK 0x100000UL

Bit mask for VDAC_OPA0PRSTIMEDERR

Definition at line 845 of file efm32gg12b_vdac.h .

#define _VDAC_IEN_OPA0PRSTIMEDERR_SHIFT 20

Shift value for VDAC_OPA0PRSTIMEDERR

Definition at line 844 of file efm32gg12b_vdac.h .

#define _VDAC_IEN_OPA1APORTCONFLICT_DEFAULT 0x00000000UL

Mode DEFAULT for VDAC_IEN

Definition at line 831 of file efm32gg12b_vdac.h .

#define _VDAC_IEN_OPA1APORTCONFLICT_MASK 0x20000UL

Bit mask for VDAC_OPA1APORTCONFLICT

Definition at line 830 of file efm32gg12b_vdac.h .

#define _VDAC_IEN_OPA1APORTCONFLICT_SHIFT 17

Shift value for VDAC_OPA1APORTCONFLICT

Definition at line 829 of file efm32gg12b_vdac.h .

#define _VDAC_IEN_OPA1OUTVALID_DEFAULT 0x00000000UL

Mode DEFAULT for VDAC_IEN

Definition at line 871 of file efm32gg12b_vdac.h .

#define _VDAC_IEN_OPA1OUTVALID_MASK 0x20000000UL

Bit mask for VDAC_OPA1OUTVALID

Definition at line 870 of file efm32gg12b_vdac.h .

#define _VDAC_IEN_OPA1OUTVALID_SHIFT 29

Shift value for VDAC_OPA1OUTVALID

Definition at line 869 of file efm32gg12b_vdac.h .

#define _VDAC_IEN_OPA1PRSTIMEDERR_DEFAULT 0x00000000UL

Mode DEFAULT for VDAC_IEN

Definition at line 851 of file efm32gg12b_vdac.h .

#define _VDAC_IEN_OPA1PRSTIMEDERR_MASK 0x200000UL

Bit mask for VDAC_OPA1PRSTIMEDERR

Definition at line 850 of file efm32gg12b_vdac.h .

#define _VDAC_IEN_OPA1PRSTIMEDERR_SHIFT 21

Shift value for VDAC_OPA1PRSTIMEDERR

Definition at line 849 of file efm32gg12b_vdac.h .

#define _VDAC_IEN_OPA2APORTCONFLICT_DEFAULT 0x00000000UL

Mode DEFAULT for VDAC_IEN

Definition at line 836 of file efm32gg12b_vdac.h .

#define _VDAC_IEN_OPA2APORTCONFLICT_MASK 0x40000UL

Bit mask for VDAC_OPA2APORTCONFLICT

Definition at line 835 of file efm32gg12b_vdac.h .

#define _VDAC_IEN_OPA2APORTCONFLICT_SHIFT 18

Shift value for VDAC_OPA2APORTCONFLICT

Definition at line 834 of file efm32gg12b_vdac.h .

#define _VDAC_IEN_OPA2OUTVALID_DEFAULT 0x00000000UL

Mode DEFAULT for VDAC_IEN

Definition at line 876 of file efm32gg12b_vdac.h .

#define _VDAC_IEN_OPA2OUTVALID_MASK 0x40000000UL

Bit mask for VDAC_OPA2OUTVALID

Definition at line 875 of file efm32gg12b_vdac.h .

#define _VDAC_IEN_OPA2OUTVALID_SHIFT 30

Shift value for VDAC_OPA2OUTVALID

Definition at line 874 of file efm32gg12b_vdac.h .

#define _VDAC_IEN_OPA2PRSTIMEDERR_DEFAULT 0x00000000UL

Mode DEFAULT for VDAC_IEN

Definition at line 856 of file efm32gg12b_vdac.h .

#define _VDAC_IEN_OPA2PRSTIMEDERR_MASK 0x400000UL

Bit mask for VDAC_OPA2PRSTIMEDERR

Definition at line 855 of file efm32gg12b_vdac.h .

#define _VDAC_IEN_OPA2PRSTIMEDERR_SHIFT 22

Shift value for VDAC_OPA2PRSTIMEDERR

Definition at line 854 of file efm32gg12b_vdac.h .

#define _VDAC_IEN_OPA3APORTCONFLICT_DEFAULT 0x00000000UL

Mode DEFAULT for VDAC_IEN

Definition at line 841 of file efm32gg12b_vdac.h .

#define _VDAC_IEN_OPA3APORTCONFLICT_MASK 0x80000UL

Bit mask for VDAC_OPA3APORTCONFLICT

Definition at line 840 of file efm32gg12b_vdac.h .

#define _VDAC_IEN_OPA3APORTCONFLICT_SHIFT 19

Shift value for VDAC_OPA3APORTCONFLICT

Definition at line 839 of file efm32gg12b_vdac.h .

#define _VDAC_IEN_OPA3OUTVALID_DEFAULT 0x00000000UL

Mode DEFAULT for VDAC_IEN

Definition at line 881 of file efm32gg12b_vdac.h .

#define _VDAC_IEN_OPA3OUTVALID_MASK 0x80000000UL

Bit mask for VDAC_OPA3OUTVALID

Definition at line 880 of file efm32gg12b_vdac.h .

#define _VDAC_IEN_OPA3OUTVALID_SHIFT 31

Shift value for VDAC_OPA3OUTVALID

Definition at line 879 of file efm32gg12b_vdac.h .

#define _VDAC_IEN_OPA3PRSTIMEDERR_DEFAULT 0x00000000UL

Mode DEFAULT for VDAC_IEN

Definition at line 861 of file efm32gg12b_vdac.h .

#define _VDAC_IEN_OPA3PRSTIMEDERR_MASK 0x800000UL

Bit mask for VDAC_OPA3PRSTIMEDERR

Definition at line 860 of file efm32gg12b_vdac.h .

#define _VDAC_IEN_OPA3PRSTIMEDERR_SHIFT 23

Shift value for VDAC_OPA3PRSTIMEDERR

Definition at line 859 of file efm32gg12b_vdac.h .

#define _VDAC_IEN_RESETVALUE 0x00000000UL

Default value for VDAC_IEN

Definition at line 776 of file efm32gg12b_vdac.h .

Referenced by VDAC_Reset() .

#define _VDAC_IF_CH0BL_DEFAULT 0x00000001UL

Mode DEFAULT for VDAC_IF

Definition at line 504 of file efm32gg12b_vdac.h .

#define _VDAC_IF_CH0BL_MASK 0x40UL

Bit mask for VDAC_CH0BL

Definition at line 503 of file efm32gg12b_vdac.h .

#define _VDAC_IF_CH0BL_SHIFT 6

Shift value for VDAC_CH0BL

Definition at line 502 of file efm32gg12b_vdac.h .

#define _VDAC_IF_CH0CD_DEFAULT 0x00000000UL

Mode DEFAULT for VDAC_IF

Definition at line 474 of file efm32gg12b_vdac.h .

#define _VDAC_IF_CH0CD_MASK 0x1UL

Bit mask for VDAC_CH0CD

Definition at line 473 of file efm32gg12b_vdac.h .

#define _VDAC_IF_CH0CD_SHIFT 0

Shift value for VDAC_CH0CD

Definition at line 472 of file efm32gg12b_vdac.h .

#define _VDAC_IF_CH0OF_DEFAULT 0x00000000UL

Mode DEFAULT for VDAC_IF

Definition at line 484 of file efm32gg12b_vdac.h .

#define _VDAC_IF_CH0OF_MASK 0x4UL

Bit mask for VDAC_CH0OF

Definition at line 483 of file efm32gg12b_vdac.h .

#define _VDAC_IF_CH0OF_SHIFT 2

Shift value for VDAC_CH0OF

Definition at line 482 of file efm32gg12b_vdac.h .

#define _VDAC_IF_CH0UF_DEFAULT 0x00000000UL

Mode DEFAULT for VDAC_IF

Definition at line 494 of file efm32gg12b_vdac.h .

#define _VDAC_IF_CH0UF_MASK 0x10UL

Bit mask for VDAC_CH0UF

Definition at line 493 of file efm32gg12b_vdac.h .

#define _VDAC_IF_CH0UF_SHIFT 4

Shift value for VDAC_CH0UF

Definition at line 492 of file efm32gg12b_vdac.h .

#define _VDAC_IF_CH1BL_DEFAULT 0x00000001UL

Mode DEFAULT for VDAC_IF

Definition at line 509 of file efm32gg12b_vdac.h .

#define _VDAC_IF_CH1BL_MASK 0x80UL

Bit mask for VDAC_CH1BL

Definition at line 508 of file efm32gg12b_vdac.h .

VDAC Bit FieldsDevices > VDAC

Macros

Macro Definition Documentation