Responses
Description
Si1133 responses.
Macros |
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#define | SI1133_RSP0_CHIPSTAT_MASK 0xE0 |
Chip state mask in Response0 register
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#define | SI1133_RSP0_COUNTER_MASK 0x1F |
Command counter and error indicator mask in Response0 register
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#define | SI1133_RSP0_SLEEP 0x20 |
Sleep state indicator bit mask in Response0 register
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Macro Definition Documentation
◆ SI1133_RSP0_CHIPSTAT_MASK
#define SI1133_RSP0_CHIPSTAT_MASK 0xE0 |
Chip state mask in Response0 register
◆ SI1133_RSP0_COUNTER_MASK
#define SI1133_RSP0_COUNTER_MASK 0x1F |
Command counter and error indicator mask in Response0 register
◆ SI1133_RSP0_SLEEP
#define SI1133_RSP0_SLEEP 0x20 |
Sleep state indicator bit mask in Response0 register