Parameters
Description
Si1133 parameters.
Macros |
|
#define | SI1133_PARAM_I2C_ADDR 0x00 |
I2C address
|
|
#define | SI1133_PARAM_CH_LIST 0x01 |
Channel list
|
|
#define | SI1133_PARAM_ADCCONFIG0 0x02 |
ADC config for Channel 0
|
|
#define | SI1133_PARAM_ADCSENS0 0x03 |
ADC sensitivity setting for Channel 0
|
|
#define | SI1133_PARAM_ADCPOST0 0x04 |
ADC resolution, shift and threshold settings for Channel 0
|
|
#define | SI1133_PARAM_MEASCONFIG0 0x05 |
ADC measurement counter selection for Channel 0
|
|
#define | SI1133_PARAM_ADCCONFIG1 0x06 |
ADC config for Channel 1
|
|
#define | SI1133_PARAM_ADCSENS1 0x07 |
ADC sensitivity setting for Channel 1
|
|
#define | SI1133_PARAM_ADCPOST1 0x08 |
ADC resolution, shift and threshold settings for Channel 1
|
|
#define | SI1133_PARAM_MEASCONFIG1 0x09 |
ADC measurement counter selection for Channel 1
|
|
#define | SI1133_PARAM_ADCCONFIG2 0x0A |
ADC config for Channel 2
|
|
#define | SI1133_PARAM_ADCSENS2 0x0B |
ADC sensitivity setting for Channel 2
|
|
#define | SI1133_PARAM_ADCPOST2 0x0C |
ADC resolution, shift and threshold settings for Channel 2
|
|
#define | SI1133_PARAM_MEASCONFIG2 0x0D |
ADC measurement counter selection for Channel 2
|
|
#define | SI1133_PARAM_ADCCONFIG3 0x0E |
ADC config for Channel 3
|
|
#define | SI1133_PARAM_ADCSENS3 0x0F |
ADC sensitivity setting for Channel 3
|
|
#define | SI1133_PARAM_ADCPOST3 0x10 |
ADC resolution, shift and threshold settings for Channel 3
|
|
#define | SI1133_PARAM_MEASCONFIG3 0x11 |
ADC measurement counter selection for Channel 3
|
|
#define | SI1133_PARAM_ADCCONFIG4 0x12 |
ADC config for Channel 4
|
|
#define | SI1133_PARAM_ADCSENS4 0x13 |
ADC sensitivity setting for Channel 4
|
|
#define | SI1133_PARAM_ADCPOST4 0x14 |
ADC resolution, shift and threshold settings for Channel 4
|
|
#define | SI1133_PARAM_MEASCONFIG4 0x15 |
ADC measurement counter selection for Channel 4
|
|
#define | SI1133_PARAM_ADCCONFIG5 0x16 |
ADC config for Channel 5
|
|
#define | SI1133_PARAM_ADCSENS5 0x17 |
ADC sensitivity setting for Channel 5
|
|
#define | SI1133_PARAM_ADCPOST5 0x18 |
ADC resolution, shift and threshold settings for Channel 5
|
|
#define | SI1133_PARAM_MEASCONFIG5 0x19 |
ADC measurement counter selection for Channel 5
|
|
#define | SI1133_PARAM_MEASRATE_H 0x1A |
Main measurement rate counter MSB
|
|
#define | SI1133_PARAM_MEASRATE_L 0x1B |
Main measurement rate counter LSB
|
|
#define | SI1133_PARAM_MEASCOUNT0 0x1C |
Measurement rate extension counter 0
|
|
#define | SI1133_PARAM_MEASCOUNT1 0x1D |
Measurement rate extension counter 1
|
|
#define | SI1133_PARAM_MEASCOUNT2 0x1E |
Measurement rate extension counter 2
|
|
#define | SI1133_PARAM_THRESHOLD0_H 0x25 |
Threshold level 0 MSB
|
|
#define | SI1133_PARAM_THRESHOLD0_L 0x26 |
Threshold level 0 LSB
|
|
#define | SI1133_PARAM_THRESHOLD1_H 0x27 |
Threshold level 1 MSB
|
|
#define | SI1133_PARAM_THRESHOLD1_L 0x28 |
Threshold level 1 LSB
|
|
#define | SI1133_PARAM_THRESHOLD2_H 0x29 |
Threshold level 2 MSB
|
|
#define | SI1133_PARAM_THRESHOLD2_L 0x2A |
Threshold level 2 LSB
|
|
#define | SI1133_PARAM_BURST 0x2B |
Burst enable and burst count
|
|
Macro Definition Documentation
◆ SI1133_PARAM_I2C_ADDR
#define SI1133_PARAM_I2C_ADDR 0x00 |
I2C address
◆ SI1133_PARAM_CH_LIST
#define SI1133_PARAM_CH_LIST 0x01 |
Channel list
◆ SI1133_PARAM_ADCCONFIG0
#define SI1133_PARAM_ADCCONFIG0 0x02 |
ADC config for Channel 0
◆ SI1133_PARAM_ADCSENS0
#define SI1133_PARAM_ADCSENS0 0x03 |
ADC sensitivity setting for Channel 0
◆ SI1133_PARAM_ADCPOST0
#define SI1133_PARAM_ADCPOST0 0x04 |
ADC resolution, shift and threshold settings for Channel 0
◆ SI1133_PARAM_MEASCONFIG0
#define SI1133_PARAM_MEASCONFIG0 0x05 |
ADC measurement counter selection for Channel 0
◆ SI1133_PARAM_ADCCONFIG1
#define SI1133_PARAM_ADCCONFIG1 0x06 |
ADC config for Channel 1
◆ SI1133_PARAM_ADCSENS1
#define SI1133_PARAM_ADCSENS1 0x07 |
ADC sensitivity setting for Channel 1
◆ SI1133_PARAM_ADCPOST1
#define SI1133_PARAM_ADCPOST1 0x08 |
ADC resolution, shift and threshold settings for Channel 1
◆ SI1133_PARAM_MEASCONFIG1
#define SI1133_PARAM_MEASCONFIG1 0x09 |
ADC measurement counter selection for Channel 1
◆ SI1133_PARAM_ADCCONFIG2
#define SI1133_PARAM_ADCCONFIG2 0x0A |
ADC config for Channel 2
◆ SI1133_PARAM_ADCSENS2
#define SI1133_PARAM_ADCSENS2 0x0B |
ADC sensitivity setting for Channel 2
◆ SI1133_PARAM_ADCPOST2
#define SI1133_PARAM_ADCPOST2 0x0C |
ADC resolution, shift and threshold settings for Channel 2
◆ SI1133_PARAM_MEASCONFIG2
#define SI1133_PARAM_MEASCONFIG2 0x0D |
ADC measurement counter selection for Channel 2
◆ SI1133_PARAM_ADCCONFIG3
#define SI1133_PARAM_ADCCONFIG3 0x0E |
ADC config for Channel 3
◆ SI1133_PARAM_ADCSENS3
#define SI1133_PARAM_ADCSENS3 0x0F |
ADC sensitivity setting for Channel 3
◆ SI1133_PARAM_ADCPOST3
#define SI1133_PARAM_ADCPOST3 0x10 |
ADC resolution, shift and threshold settings for Channel 3
◆ SI1133_PARAM_MEASCONFIG3
#define SI1133_PARAM_MEASCONFIG3 0x11 |
ADC measurement counter selection for Channel 3
◆ SI1133_PARAM_ADCCONFIG4
#define SI1133_PARAM_ADCCONFIG4 0x12 |
ADC config for Channel 4
◆ SI1133_PARAM_ADCSENS4
#define SI1133_PARAM_ADCSENS4 0x13 |
ADC sensitivity setting for Channel 4
◆ SI1133_PARAM_ADCPOST4
#define SI1133_PARAM_ADCPOST4 0x14 |
ADC resolution, shift and threshold settings for Channel 4
◆ SI1133_PARAM_MEASCONFIG4
#define SI1133_PARAM_MEASCONFIG4 0x15 |
ADC measurement counter selection for Channel 4
◆ SI1133_PARAM_ADCCONFIG5
#define SI1133_PARAM_ADCCONFIG5 0x16 |
ADC config for Channel 5
◆ SI1133_PARAM_ADCSENS5
#define SI1133_PARAM_ADCSENS5 0x17 |
ADC sensitivity setting for Channel 5
◆ SI1133_PARAM_ADCPOST5
#define SI1133_PARAM_ADCPOST5 0x18 |
ADC resolution, shift and threshold settings for Channel 5
◆ SI1133_PARAM_MEASCONFIG5
#define SI1133_PARAM_MEASCONFIG5 0x19 |
ADC measurement counter selection for Channel 5
◆ SI1133_PARAM_MEASRATE_H
#define SI1133_PARAM_MEASRATE_H 0x1A |
Main measurement rate counter MSB
◆ SI1133_PARAM_MEASRATE_L
#define SI1133_PARAM_MEASRATE_L 0x1B |
Main measurement rate counter LSB
◆ SI1133_PARAM_MEASCOUNT0
#define SI1133_PARAM_MEASCOUNT0 0x1C |
Measurement rate extension counter 0
◆ SI1133_PARAM_MEASCOUNT1
#define SI1133_PARAM_MEASCOUNT1 0x1D |
Measurement rate extension counter 1
◆ SI1133_PARAM_MEASCOUNT2
#define SI1133_PARAM_MEASCOUNT2 0x1E |
Measurement rate extension counter 2
◆ SI1133_PARAM_THRESHOLD0_H
#define SI1133_PARAM_THRESHOLD0_H 0x25 |
Threshold level 0 MSB
◆ SI1133_PARAM_THRESHOLD0_L
#define SI1133_PARAM_THRESHOLD0_L 0x26 |
Threshold level 0 LSB
◆ SI1133_PARAM_THRESHOLD1_H
#define SI1133_PARAM_THRESHOLD1_H 0x27 |
Threshold level 1 MSB
◆ SI1133_PARAM_THRESHOLD1_L
#define SI1133_PARAM_THRESHOLD1_L 0x28 |
Threshold level 1 LSB
◆ SI1133_PARAM_THRESHOLD2_H
#define SI1133_PARAM_THRESHOLD2_H 0x29 |
Threshold level 2 MSB
◆ SI1133_PARAM_THRESHOLD2_L
#define SI1133_PARAM_THRESHOLD2_L 0x2A |
Threshold level 2 LSB
◆ SI1133_PARAM_BURST
#define SI1133_PARAM_BURST 0x2B |
Burst enable and burst count