Sample Breakout Board Configuration
Hardware Abstraction Layer (HAL) API Reference > HAL Configuration

Functions and definitions specific to the breakout board.

Macros

#define PWRUP_CFG_SC1_TXD _GPIO_P_CFGL_Px0_OUT_ALT
Give GPIO SC1 TXD and nRTS configurations friendly names.
#define PWRDN_OUT_SC1_nRTS 1

Custom Baud Rate Definitions

Application Framework NCP Configuration Board Header

This board header (dev0680) is not supported in framework NCP applications. NCP applications must use either the dev0680spi or dev0680uart board headers when creating custom NCP applications through the framework.

The following define is used with defining a custom baud rate for the UART. This define provides a simple hook into the definition of the baud rates used with the UART. The baudSettings[] array in uart.c links the BAUD_* defines with the actual register values needed for operating the UART. The array baudSettings[] can be edited directly for a custom baud rate or another entry (the register settings) can be provided here with this define.

#define EMBER_SERIAL_BAUD_CUSTOM 13
This define is the register setting for generating a baud of.

LED Definitions

The following are used to aid in the abstraction with the LED connections. The microcontroller-specific sources use these definitions so they are able to work across a variety of boards which could have different connections. The names and ports/pins used below are intended to match with a schematic of the system to provide the abstraction.

The HalBoardLedPins enum values should always be used when manipulating the state of LEDs, as they directly refer to the GPIOs to which the LEDs are connected.

Note: LEDs 0 and 1 are on the RCM.

Note: LED 2 is on the breakout board (dev0680).

Note: LED 3 simply redirects to LED 2.

enum HalBoardLedPins {
BOARDLED0 = PORTA_PIN(6),
BOARDLED1 = PORTA_PIN(7),
BOARDLED2 = PORTC_PIN(5),
BOARDLED3 = BOARDLED2,
BOARD_ACTIVITY_LED = BOARDLED0,
BOARD_HEARTBEAT_LED = BOARDLED1
}
Assign each GPIO with an LED connected to a convenient name. BOARD_ACTIVITY_LED and BOARD_HEARTBEAT_LED provide a further layer of abstraction on top of the 3 LEDs for verbose coding.

Button Definitions

The following are used to aid in the abstraction with the Button connections. The microcontroller-specific sources use these definitions so they are able to work across a variety of boards which could have different connections. The names and ports/pins used below are intended to match with a schematic of the system to provide the abstraction.

The BUTTONn macros should always be used with manipulating the buttons as they directly refer to the GPIOs to which the buttons are connected.

Note
The GPIO number must match the IRQ letter
#define BUTTON0 PORTB_PIN(6)
The actual GPIO BUTTON0 is connected to. This define should be used whenever referencing BUTTON0.
#define BUTTON0_IN (GPIO->P[1].IN)
The GPIO input register for BUTTON0.
#define BUTTON0_SEL ()   do {} while (0)
Point the proper IRQ at the desired pin for BUTTON0.
#define BUTTON0_ISR halIrqBIsr
The interrupt service routine for BUTTON0.
#define BUTTON0_INTCFG (EVENT_GPIO->CFGB)
The interrupt configuration register for BUTTON0.
#define BUTTON0_INT_EN_IRQN IRQB_IRQn
The interrupt enable bit for BUTTON0.
#define BUTTON0_INT_EN_BIT BIT32 ( BUTTON0_INT_EN_IRQN )
The actual GPIO BUTTON0 is connected to. This define should be used whenever referencing BUTTON0.
#define BUTTON0_FLAG_BIT EVENT_GPIO_FLAG_IRQB
The interrupt flag bit for BUTTON0.
#define BUTTON0_MISS_BIT EVENT_MISS_MISS_IRQB
The missed interrupt bit for BUTTON0.
#define BUTTON1 PORTC_PIN(6)
The actual GPIO BUTTON1 is connected to. This define should be used whenever referencing BUTTON1, such as controlling if pieces are compiled in. Remember there may be other things that might want to use IRQC.
#define BUTTON1_IN (GPIO->P[2].IN)
The GPIO input register for BUTTON1.
#define BUTTON1_SEL ()   do { GPIO->IRQCSEL = PORTC_PIN(6); } while (0)
Point the proper IRQ at the desired pin for BUTTON1. Remember there may be other things that might want to use IRQC.
#define BUTTON1_ISR halIrqCIsr
The interrupt service routine for BUTTON1. Remember there may be other things that might want to use IRQC.
#define BUTTON1_INTCFG (EVENT_GPIO->CFGC)
The interrupt configuration register for BUTTON1.
#define BUTTON1_INT_EN_IRQN IRQC_IRQn
The interrupt enable bit for BUTTON1.
#define BUTTON1_INT_EN_BIT BIT32 ( BUTTON1_INT_EN_IRQN )
The actual GPIO BUTTON0 is connected to. This define should be used whenever referencing BUTTON0.
#define BUTTON1_FLAG_BIT EVENT_GPIO_FLAG_IRQC
The interrupt flag bit for BUTTON1.
#define BUTTON1_MISS_BIT EVENT_MISS_MISS_IRQC
The missed interrupt bit for BUTTON1.

USB Power State

Define if the USB is self powered or bus powered since the configuration descriptor needs to report to the host the powered state.

Note
VBUS Monitoring is required for USB to function when the EM358 device is configured as self-powered.
#define USB_SELFPWRD_STATE (1)
The USB power state.

USB Remote Wakeup Enable

If the USB device needs to awake the host from suspend, then it needs to have remote wakeup enable.

Note
The host can deny remote wakeup, keeping the device in suspend.

If the device has remote wakeup enabled the configuration descriptor needs to report this fact to the host. Additionally, the USB core in the chip needs to be directly told. Set the define USB_REMOTEWKUPEN_STATE to 0 if remote wake is disabled or 1 if enabled.

#define USB_REMOTEWKUPEN_STATE (1)
USB Remote Wakeup Enable.

USB Maximum Power Consumption

The USB device must report the maximum power it will draw from the bus. This is done via the bMaxPower parameter in the Configuration Descriptor reported to the host. The value used is in units of 2mA.

Self-powered devices are low power devices and must draw less than 100mA.

Systems that have components such as a FEM are likely to consume more than 100mA and are considered high power and therefore must be bus-powered.

#define USB_MAX_POWER (50)
USB Max Power parameter (bMaxPower) the driver will report to the host in the Configuration Descriptor.

USB Enumeration Control

The following are used to aid in the abstraction of which GPIO is used for controlloing the pull-up resistor for enumeation.

The hardware setup connects the D+ signal to a GPIO via a 1.5kOhm pull-up resistor. Any GPIO can be used since it just needs to be a simple push-pull output configuration.

#define ENUMCTRL PORTA_PIN(2)
The actual GPIO ENUMCTRL is connected to. The GPIO only needs to be a simple push-pull output or input.
#define ENUMCTRL_SETCFG (cfg)
Set the GPIO's configuration to the provided state. The two states used are GPIOCFG_OUT when the device is enumerated and GPIOCFG_IN when the device is not enumerated.
#define ENUMCTRL_SET ()   do { GPIO->P[0].SET = GPIO_P_SET_Px2; } while (0)
When the GPIO used for enumeration is configured as push-pull, this macro makes it easy to set the output state high.
#define ENUMCTRL_CLR ()   do { GPIO->P[0].CLR = GPIO_P_SET_Px2; } while (0)
When the GPIO used for enumeration is configured as push-pull, this macro makes it easy to clear the output state low.

USB VBUS Monitoring Support

Note
VBUS Monitoring is required for USB to function when the EM358 device is configured as self-powered.

The following are used to aid in the abstraction of which GPIO and IRQ is used for VBUS Monitoring.

Remember that IRQA and IRQB are fixed to GPIO PB0 and PB6 respectively while IRQC and IRQD can be assigned to any GPIO. Since USB's D- and D+ data pins are fixed to PA0 and PA1 respectively, SC2 can't be used so it makes sense to allocate PA2 for enumeration control and PA3 for VBUS monitoring. Therefore, using PA3 for VBUS monitoring requires IRQC or IRQD.

The driver will only try to use VBUSMON functionality if USB_SELFPWRD_STATE is set to 1.

#define VBUSMON GPIO_P_IN_Px3
The actual GPIO VBUSMON is connected to. Remember that other pieces might want to use PA3.
#define VBUSMON_IN (GPIO->P[0].IN)
The GPIO input register for VBUSMON.
#define VBUSMON_SETCFG ()
The GPIO configuration needed for VBUSMON. The configuration needs to be a simple input that will monitor for edge tansitions.
#define VBUSMON_SEL ()   do { GPIO->IRQDSEL = PORTA_PIN(3); } while (0)
Point the proper IRQ at the desired pin for VBUSMON. Remember that other pieces that might want to use IRQC.
#define VBUSMON_ISR halIrqDIsr
The interrupt service routine for VBUSMON. Remember that other pieces that might want to use IRQC.
#define VBUSMON_INTCFG (EVENT_GPIO->CFGD)
The interrupt configuration register for VBUSMON.
#define VBUSMON_INT_EN_IRQN IRQD_IRQn
The interrupt enable bit for VBUSMON.
#define VBUSMON_INT_EN_BIT BIT32 ( VBUSMON_INT_EN_IRQN )
The actual GPIO VBUSMON is connected to. Remember that other pieces might want to use PA3.
#define VBUSMON_FLAG_BIT EVENT_GPIO_FLAG_IRQD
The interrupt flag bit for VBUSMON.
#define VBUSMON_MISS_BIT EVENT_MISS_MISS_IRQD
The missed interrupt bit for VBUSMON.

Radio HoldOff Configuration Definitions

This define does not equate to anything. It is used as a trigger to enable Radio HoldOff support.

The following are used to aid in the abstraction with Radio HoldOff (RHO). The microcontroller-specific sources use these definitions so they are able to work across a variety of boards which could have different connections. The names and ports/pins used below are intended to match with a schematic of the system to provide the abstraction.

The Radio HoldOff input GPIO is abstracted like BUTTON0/1.

#define RHO_ASSERTED 1
The actual GPIO used to control Radio HoldOff.
#define RHO_CFG (GPIO->P[0].CFGH)
The GPIO configuration register for Radio HoldOff.
#define RHO_IN (GPIO->P[0].IN)
The GPIO input register for Radio HoldOff.
#define RHO_OUT (GPIO->P[0].OUT)
The GPIO output register for Radio HoldOff.
#define RHO_SEL ()   do { GPIO->IRQDSEL = RHO_GPIO; } while (0)
Point the proper IRQ at the desired pin for Radio HoldOff. Remember there may be other things that might want to use this IRQ.
#define RHO_ISR halIrqDIsr
The interrupt service routine for Radio HoldOff. Remember there may be other things that might want to use this IRQ.
#define RHO_INTCFG (EVENT_GPIO->CFGD)
The interrupt configuration register for Radio HoldOff.
#define RHO_INT_EN_IRQN IRQD_IRQn
The interrupt enable bit for Radio HoldOff.
#define RHO_INT_EN_BIT BIT32 ( RHO_INT_EN_IRQN )
The actual GPIO used to control Radio HoldOff.
#define RHO_FLAG_BIT EVENT_GPIO_FLAG_IRQD
The interrupt flag bit for Radio HoldOff.
#define RHO_MISS_BIT EVENT_MISS_MISS_IRQD
The missed interrupt bit for Radio HoldOff.
#define PWRUP_CFG_DFL_RHO_FOR_RHO _GPIO_P_CFGL_Px0_IN_PUD
Configuration of GPIO for Radio HoldOff operation.
#define PWRUP_OUT_DFL_RHO_FOR_RHO 0 /* Deassert */
The actual GPIO used to control Radio HoldOff.
#define PWRDN_CFG_DFL_RHO_FOR_RHO _GPIO_P_CFGL_Px0_IN_PUD
The actual GPIO used to control Radio HoldOff.
#define PWRDN_OUT_DFL_RHO_FOR_RHO 0 /* Deassert */
The actual GPIO used to control Radio HoldOff.
#define PWRUP_CFG_DFL_RHO_FOR_DFL _GPIO_P_CFGL_Px0_OUT
Configuration of GPIO for default behavior.
#define PWRUP_OUT_DFL_RHO_FOR_DFL 1 /* LED default off */
The actual GPIO used to control Radio HoldOff.
#define PWRDN_CFG_DFL_RHO_FOR_DFL _GPIO_P_CFGL_Px0_OUT
The actual GPIO used to control Radio HoldOff.
#define PWRDN_OUT_DFL_RHO_FOR_DFL 1 /* LED off */
The actual GPIO used to control Radio HoldOff.
#define PWRUP_CFG_DFL_RHO PWRUP_CFG_DFL_RHO_FOR_DFL
The following definitions are helpers for managing Radio HoldOff and should not be modified.
#define PWRUP_OUT_DFL_RHO PWRUP_OUT_DFL_RHO_FOR_DFL
The actual GPIO used to control Radio HoldOff.
#define PWRDN_CFG_DFL_RHO PWRDN_CFG_DFL_RHO_FOR_DFL
The actual GPIO used to control Radio HoldOff.
#define PWRDN_OUT_DFL_RHO PWRDN_OUT_DFL_RHO_FOR_DFL
The actual GPIO used to control Radio HoldOff.
#define halInternalInitRadioHoldOff ()   /* no-op */
The actual GPIO used to control Radio HoldOff.

Temperature sensor ADC channel

Define the analog input channel connected to the LM-20 temperature sensor. The scale factor compensates for different platform input ranges. PB5/ADC0 must be an analog input. PC7 must be an output and set to a high level to power the sensor.

#define TEMP_SENSOR_ADC_CHANNEL ADC_SOURCE_ADC0_VREF2
The analog input channel to use for the temperature sensor.
#define TEMP_SENSOR_SCALE_FACTOR 1
The scale factor to compensate for different input ranges.

Packet Trace

When PACKET_TRACE is defined, ::GPIO_PACFGH will automatically be setup by halInit() to enable Packet Trace support on PA4 and PA5, in addition to the configuration specified below.

Note
This define will override any settings for PA4 and PA5.
#define PACKET_TRACE
This define does not equate to anything. It is used as a trigger to enable Packet Trace support on the breakout board (dev0680).

ENABLE_OSC32K

When ENABLE_OSC32K is defined, halInit() will configure system timekeeping to utilize the external 32.768 kHz crystal oscillator rather than the internal 1 kHz RC oscillator.

Note
ENABLE_OSC32K is mutually exclusive with ENABLE_ALT_FUNCTION_NTX_ACTIVE since they define conflicting usage of GPIO PC6.

On initial powerup the 32.768 kHz crystal oscillator will take a little while to start stable oscillation. This only happens on initial powerup, not on wake-from-sleep, since the crystal usually stays running in deep sleep mode.

When ENABLE_OSC32K is defined the crystal oscillator is started as part of halInit() . After the crystal is started we delay for OSC32K_STARTUP_DELAY_MS (time in milliseconds). This delay allows the crystal oscillator to stabilize before we start using it for system timing.

If you set OSC32K_STARTUP_DELAY_MS to less than the crystal's startup time:

  • The system timer won't produce a reliable one millisecond tick before the crystal is stable.
  • You may see some number of ticks of unknown period occur before the crystal is stable.
  • halInit() will complete and application code will begin running, but any events based on the system timer will not be accurate until the crystal is stable.
  • An unstable system timer will only affect the APIs in system-timer.h .

Typical 32.768 kHz crystals measured by Ember take about 400 milliseconds to stabilize. Be sure to characterize your particular crystal's stabilization time since crystal behavior can vary.

#define OSC32K_STARTUP_DELAY_MS (0)

Packet Trace Configuration Defines

Provide the proper set of pin configuration for when the Packet Trace is enabled (look above for the define which enables it). When Packet Trace is not enabled, leave the two PTI pins in their default configuration. If Packet Trace is not being used, feel free to set the pin configurations as desired. The config shown here is simply the Power On Reset defaults.

#define PWRUP_CFG_PTI_EN _GPIO_P_CFGL_Px0_OUT_ALT
Give the packet trace configuration a friendly name.
#define PWRUP_OUT_PTI_EN 0
Give the packet trace configuration a friendly name.
#define PWRDN_CFG_PTI_EN _GPIO_P_CFGL_Px0_IN_PUD
Give the packet trace configuration a friendly name.
#define PWRDN_OUT_PTI_EN 0
Give the packet trace configuration a friendly name.
#define PWRUP_CFG_PTI_DATA _GPIO_P_CFGL_Px0_OUT_ALT
Give the packet trace configuration a friendly name.
#define PWRUP_OUT_PTI_DATA 1
Give the packet trace configuration a friendly name.
#define PWRDN_CFG_PTI_DATA _GPIO_P_CFGL_Px0_IN_PUD
Give the packet trace configuration a friendly name.
#define PWRDN_OUT_PTI_DATA 1
Give the packet trace configuration a friendly name.

32kHz Oscillator and nTX_ACTIVE Configuration Defines

Since the 32kHz Oscillator and nTX_ACTIVE both share PC6, their configuration defines are linked and instantiated together. Look above for the defines that enable the 32kHz Oscillator and nTX_ACTIVE.

Note
ENABLE_OSC32K is mutually exclusive with ENABLE_ALT_FUNCTION_NTX_ACTIVE since they define conflicting usage of GPIO PC6.

When using the 32kHz, configure PC6 and PC7 for analog for the XTAL.

When using nTX_ACTIVE, configure PC6 for alternate output while awake and a low output when deepsleeping. Also, configure PC7 for TEMP_EN.

When not using the 32kHz or nTX_ACTIVE, configure PC6 and PC7 for Button1 and TEMP_EN.

#define PWRUP_CFG_BUTTON1 _GPIO_P_CFGL_Px0_IN_PUD
Give GPIO PC6 configuration a friendly name.
#define PWRUP_OUT_BUTTON1 1 /* Button needs a pullup */
Give GPIO PC6 configuration a friendly name.
#define PWRDN_CFG_BUTTON1 _GPIO_P_CFGL_Px0_IN_PUD
Give GPIO PC6 configuration a friendly name.
#define PWRDN_OUT_BUTTON1 1 /* Button needs a pullup */
Give GPIO PC6 configuration a friendly name.
#define CFG_TEMPEN _GPIO_P_CFGL_Px0_OUT
Give GPIO PC7 configuration a friendly name.

TX_ACTIVE Configuration Defines

Provide the proper set of pin (PC5) configurations for when TX_ACTIVE is enabled (look above for the define which enables it). When TX_ACTIVE is not enabled, configure the pin for LED2.

#define PWRUP_CFG_LED2 _GPIO_P_CFGL_Px0_OUT
Give the TX_ACTIVE configuration a friendly name.
#define PWRUP_OUT_LED2 1 /* LED default off */
Give the TX_ACTIVE configuration a friendly name.
#define PWRDN_CFG_LED2 _GPIO_P_CFGL_Px0_OUT
Give the TX_ACTIVE configuration a friendly name.
#define PWRDN_OUT_LED2 1 /* LED default off */
Give the TX_ACTIVE configuration a friendly name.

USB Configuration Defines

Provide the proper set of pin configuration for when USB is not enumerated. Not enumerated primarily refers to the driver not being configured or deep sleep. The configuration used here is only for keeping the USB off the bus. The GPIO configuration used when active is controlled by the USB driver since the driver needs to control the enumeration process (which affects GPIO state.)

Note
: Using USB requires Serial port 3 to be defined and is only possible on EM3582/EM3586/EM3588/EM359 chips.
#define PWRUP_CFG_USBDM _GPIO_P_CFGL_Px0_OUT_ALT
Give the USB configuration a friendly name.
#define PWRUP_OUT_USBDM 0
Give the USB configuration a friendly name.
#define PWRUP_CFG_USBDP _GPIO_P_CFGL_Px0_IN
Give the USB configuration a friendly name.
#define PWRUP_OUT_USBDP 0
Give the USB configuration a friendly name.
#define PWRUP_CFG_ENUMCTRL _GPIO_P_CFGL_Px0_OUT_ALT
Give the USB configuration a friendly name.
#define PWRUP_OUT_ENUMCTRL 0
Give the USB configuration a friendly name.
#define PWRUP_CFG_VBUSMON _GPIO_P_CFGL_Px0_OUT
Give the USB configuration a friendly name.
#define PWRUP_OUT_VBUSMON 1
Give the USB configuration a friendly name.
#define PWRDN_CFG_USBDM _GPIO_P_CFGL_Px0_IN_PUD
Give the USB configuration a friendly name.
#define PWRDN_OUT_USBDM 1
Give the USB configuration a friendly name.
#define PWRDN_CFG_USBDP _GPIO_P_CFGL_Px0_IN_PUD
Give the USB configuration a friendly name.
#define PWRDN_OUT_USBDP 1
Give the USB configuration a friendly name.
#define PWRDN_CFG_ENUMCTRL _GPIO_P_CFGL_Px0_IN_PUD
Give the USB configuration a friendly name.
#define PWRDN_OUT_ENUMCTRL 1
Give the USB configuration a friendly name.
#define PWRDN_CFG_VBUSMON _GPIO_P_CFGL_Px0_OUT
Give the USB configuration a friendly name.
#define PWRDN_OUT_VBUSMON 1
Give the USB configuration a friendly name.

GPIO Configuration Macros

These macros define the GPIO configuration and initial state of the output registers for all the GPIO in the powerup and powerdown modes.

uint16_t gpioCfgPowerUp [6]
Define the mask for GPIO relevant to the radio in the context of power state. Each bit in the mask indicates the corresponding GPIO which should be affected when invoking halStackRadioPowerUpBoard() or halStackRadioPowerDownBoard() .
uint16_t gpioCfgPowerDown [6]
Define the mask for GPIO relevant to the radio in the context of power state. Each bit in the mask indicates the corresponding GPIO which should be affected when invoking halStackRadioPowerUpBoard() or halStackRadioPowerDownBoard() .
uint8_t gpioOutPowerUp [3]
Define the mask for GPIO relevant to the radio in the context of power state. Each bit in the mask indicates the corresponding GPIO which should be affected when invoking halStackRadioPowerUpBoard() or halStackRadioPowerDownBoard() .
uint8_t gpioOutPowerDown [3]
Define the mask for GPIO relevant to the radio in the context of power state. Each bit in the mask indicates the corresponding GPIO which should be affected when invoking halStackRadioPowerUpBoard() or halStackRadioPowerDownBoard() .
GpioMaskType gpioRadioPowerBoardMask
Define the mask for GPIO relevant to the radio in the context of power state. Each bit in the mask indicates the corresponding GPIO which should be affected when invoking halStackRadioPowerUpBoard() or halStackRadioPowerDownBoard() .
#define DEFINE_GPIO_RADIO_POWER_BOARD_MASK_VARIABLE ()   GpioMaskType gpioRadioPowerBoardMask = 0
Define the mask for GPIO relevant to the radio in the context of power state. Each bit in the mask indicates the corresponding GPIO which should be affected when invoking halStackRadioPowerUpBoard() or halStackRadioPowerDownBoard() .
#define DEFINE_POWERUP_GPIO_CFG_VARIABLES ()
Initialize GPIO powerup configuration variables.
#define DEFINE_POWERUP_GPIO_OUTPUT_DATA_VARIABLES ()
Initialize GPIO powerup output variables.
#define DEFINE_POWERDOWN_GPIO_CFG_VARIABLES ()
Initialize powerdown GPIO configuration variables.
#define DEFINE_POWERDOWN_GPIO_OUTPUT_DATA_VARIABLES ()
Initialize powerdown GPIO output variables.
#define SET_POWERUP_GPIO_CFG_REGISTERS ()
Set powerup GPIO configuration registers.
#define SET_POWERUP_GPIO_OUTPUT_DATA_REGISTERS ()
Set powerup GPIO output registers.
#define SET_POWERDOWN_GPIO_CFG_REGISTERS ()
Set powerdown GPIO configuration registers.
#define SET_POWERDOWN_GPIO_OUTPUT_DATA_REGISTERS ()
Set powerdown GPIO output registers.
#define SET_RESUME_GPIO_CFG_REGISTERS ()
Set resume GPIO configuration registers. Identical to SET_POWERUP.
#define SET_RESUME_GPIO_OUTPUT_DATA_REGISTERS ()
Set resume GPIO output registers. Identical to SET_POWERUP.
#define SET_SUSPEND_GPIO_CFG_REGISTERS ()
Set suspend GPIO configuration registers. SET_POWERDOWN minus USB regs.
#define SET_SUSPEND_GPIO_OUTPUT_DATA_REGISTERS ()
Set suspend GPIO output registers. SET_POWERDOWN minus USB regs.
#define CONFIGURE_EXTERNAL_REGULATOR_ENABLE ()   GPIO->DBGCFG &= ~GPIO_DBGCFG_EXTREGEN;
External regulator enable/disable macro.

GPIO Wake Source Definitions

A convenient define that chooses if this external signal can be used as source to wake from deep sleep. Any change in the state of the signal will wake up the CPU.

#define WAKE_ON_PA0 false
true if this GPIO can wake the chip from deep sleep, false if not.
#define WAKE_ON_PA1 false
true if this GPIO can wake the chip from deep sleep, false if not.
#define WAKE_ON_PA2 false
true if this GPIO can wake the chip from deep sleep, false if not.
#define WAKE_ON_PA3 false
true if this GPIO can wake the chip from deep sleep, false if not.
#define WAKE_ON_PA4 false
true if this GPIO can wake the chip from deep sleep, false if not.
#define WAKE_ON_PA5 false
true if this GPIO can wake the chip from deep sleep, false if not.
#define WAKE_ON_PA6 false
true if this GPIO can wake the chip from deep sleep, false if not.
#define WAKE_ON_PA7 false
true if this GPIO can wake the chip from deep sleep, false if not.
#define WAKE_ON_PB0 false
true if this GPIO can wake the chip from deep sleep, false if not.
#define WAKE_ON_PB1 false
true if this GPIO can wake the chip from deep sleep, false if not.
#define WAKE_ON_PB2 false
true if this GPIO can wake the chip from deep sleep, false if not.
#define WAKE_ON_PB3 false
true if this GPIO can wake the chip from deep sleep, false if not.
#define WAKE_ON_PB4 false
true if this GPIO can wake the chip from deep sleep, false if not.
#define WAKE_ON_PB5 false
true if this GPIO can wake the chip from deep sleep, false if not.
#define WAKE_ON_PB6 true
true if this GPIO can wake the chip from deep sleep, false if not.
#define WAKE_ON_PB7 false
true if this GPIO can wake the chip from deep sleep, false if not.
#define WAKE_ON_PC0 false
true if this GPIO can wake the chip from deep sleep, false if not.
#define WAKE_ON_PC1 false
true if this GPIO can wake the chip from deep sleep, false if not.
#define WAKE_ON_PC2 false
true if this GPIO can wake the chip from deep sleep, false if not.
#define WAKE_ON_PC3 false
true if this GPIO can wake the chip from deep sleep, false if not.
#define WAKE_ON_PC4 false
true if this GPIO can wake the chip from deep sleep, false if not.
#define WAKE_ON_PC5 false
true if this GPIO can wake the chip from deep sleep, false if not.
#define WAKE_ON_PC6 true
true if this GPIO can wake the chip from deep sleep, false if not.
#define WAKE_ON_PC7 false
true if this GPIO can wake the chip from deep sleep, false if not.
Note
The file dev0680.h is intended to be copied, renamed, and customized for customer-specific hardware.

The file dev0680.h is the default BOARD_HEADER file used with the breakout board of the development kit.

The EM35x on a dev0680 BoB has the following example GPIO configuration. This board file and the default HAL setup reflects this configuration.

  • PA0 - SC2MOSI
  • PA1 - SC2MISO
  • PA2 - SC2SCLK
  • PA3 - SC2nSSEL
  • PA4 - PTI_EN
  • PA5 - PTI_DATA
  • PA6 - LED (on RCM), or Radio HoldOff
  • PA7 - LED (on RCM)
  • PB0 - Power Amplifier shutdown control / TRACEDATA2
  • PB1 - SC1TXD
  • PB2 - SC1RXD
  • PB3 - SC1nCTS
  • PB4 - SC1nRTS
  • PB5 - TEMP_SENSE
  • PB6 - Button (IRQB fixed to PB6)
  • PB7 - Buzzer (also used for DataFlash Enable)
  • PC0 - JTAG (JRST) / TRACEDATA1
  • PC1 - Power Amplifier antenna select control / TRACEDATA3
  • PC2 - JTAG (JTDO) / SWO / TRACEDATA0
  • PC3 - JTAG (JTDI) / TRACECLK
  • PC4 - JTAG (JTMS) / SWDIO
  • PC5 - LED (on BoB)
  • PC6 - Button (IRQC pointed to PC6)
  • PC7 - TEMP_EN

Macro Definition Documentation

#define BUTTON0   PORTB_PIN(6)
#define BUTTON0_FLAG_BIT   EVENT_GPIO_FLAG_IRQB
#define BUTTON0_IN   (GPIO->P[1].IN)
#define BUTTON0_INT_EN_BIT BIT32 ( BUTTON0_INT_EN_IRQN )
#define BUTTON0_INT_EN_IRQN   IRQB_IRQn
#define BUTTON0_INTCFG   (EVENT_GPIO->CFGB)
#define BUTTON0_ISR   halIrqBIsr
#define BUTTON0_MISS_BIT   EVENT_MISS_MISS_IRQB
#define BUTTON0_SEL ( ) do {} while (0)
Note
IRQB is fixed and as such does not need any selection operation.
#define BUTTON1   PORTC_PIN(6)
#define BUTTON1_FLAG_BIT   EVENT_GPIO_FLAG_IRQC
#define BUTTON1_IN   (GPIO->P[2].IN)
#define BUTTON1_INT_EN_BIT BIT32 ( BUTTON1_INT_EN_IRQN )
#define BUTTON1_INT_EN_IRQN   IRQC_IRQn
#define BUTTON1_INTCFG   (EVENT_GPIO->CFGC)
#define BUTTON1_ISR   halIrqCIsr
#define BUTTON1_MISS_BIT   EVENT_MISS_MISS_IRQC
#define BUTTON1_SEL ( ) do { GPIO->IRQCSEL = PORTC_PIN(6); } while (0)
Note
For this board, IRQC is pointed at PC6
#define CFG_TEMPEN   _GPIO_P_CFGL_Px0_OUT

ENABLE_OSC32K

#define CONFIGURE_EXTERNAL_REGULATOR_ENABLE ( ) GPIO->DBGCFG &= ~GPIO_DBGCFG_EXTREGEN;
#define DEFINE_GPIO_RADIO_POWER_BOARD_MASK_VARIABLE ( ) GpioMaskType gpioRadioPowerBoardMask = 0
#define DEFINE_POWERDOWN_GPIO_CFG_VARIABLES ( )
Value:
uint16_t gpioCfgPowerDown [6] = { \
(( PWRDN_CFG_USBDM << _GPIO_P_CFGL_Px0_SHIFT) \
| ( PWRDN_CFG_USBDP << _GPIO_P_CFGL_Px1_SHIFT) \
| ( PWRDN_CFG_ENUMCTRL << _GPIO_P_CFGL_Px2_SHIFT) \
| ( PWRDN_CFG_VBUSMON << _GPIO_P_CFGL_Px3_SHIFT)), \
(( PWRDN_CFG_PTI_EN << _GPIO_P_CFGH_Px4_SHIFT) \
| ( PWRDN_CFG_PTI_DATA << _GPIO_P_CFGH_Px5_SHIFT) \
| ( PWRDN_CFG_DFL_RHO << _GPIO_P_CFGH_Px6_SHIFT) \
| (_GPIO_P_CFGL_Px0_OUT << _GPIO_P_CFGH_Px7_SHIFT)), \
((_GPIO_P_CFGL_Px0_OUT << _GPIO_P_CFGL_Px0_SHIFT) \
| (_GPIO_P_CFGL_Px0_OUT << _GPIO_P_CFGL_Px1_SHIFT) /* SC1TXD */ \
| (_GPIO_P_CFGL_Px0_IN_PUD << _GPIO_P_CFGL_Px2_SHIFT) /* SC1RXD */ \
| (_GPIO_P_CFGL_Px0_IN_PUD << _GPIO_P_CFGL_Px3_SHIFT)), /* SC1nCTS */ \
((_GPIO_P_CFGL_Px0_OUT << _GPIO_P_CFGH_Px4_SHIFT) /* SC1nRTS */ \
| /* disable analog for sleep */ \
(_GPIO_P_CFGL_Px0_IN_PUD << _GPIO_P_CFGH_Px5_SHIFT) \
| (_GPIO_P_CFGL_Px0_IN_PUD << _GPIO_P_CFGH_Px6_SHIFT) \
| /* need to use pulldown for sleep */ \
(_GPIO_P_CFGL_Px0_IN_PUD << _GPIO_P_CFGH_Px7_SHIFT)), \
((_GPIO_P_CFGL_Px0_IN_PUD << _GPIO_P_CFGL_Px0_SHIFT) \
| (_GPIO_P_CFGL_Px0_OUT << _GPIO_P_CFGL_Px1_SHIFT) \
| (_GPIO_P_CFGL_Px0_OUT << _GPIO_P_CFGL_Px2_SHIFT) \
| (_GPIO_P_CFGL_Px0_IN_PUD << _GPIO_P_CFGL_Px3_SHIFT)), \
((_GPIO_P_CFGL_Px0_IN_PUD << _GPIO_P_CFGH_Px4_SHIFT) \
| ( PWRDN_CFG_LED2 << _GPIO_P_CFGH_Px5_SHIFT) \
| ( PWRDN_CFG_BUTTON1 << _GPIO_P_CFGH_Px6_SHIFT) \
| ( CFG_TEMPEN << _GPIO_P_CFGH_Px7_SHIFT)) \
}
gpioCfgPowerDown
uint16_t gpioCfgPowerDown[6]
Define the mask for GPIO relevant to the radio in the context of power state. Each bit in the mask in...
PWRDN_CFG_VBUSMON
#define PWRDN_CFG_VBUSMON
Give the USB configuration a friendly name.
Definition: dev0680.h:994
PWRDN_CFG_PTI_DATA
#define PWRDN_CFG_PTI_DATA
Give the packet trace configuration a friendly name.
Definition: dev0680.h:844
PWRDN_CFG_PTI_EN
#define PWRDN_CFG_PTI_EN
Give the packet trace configuration a friendly name.
Definition: dev0680.h:840
PWRDN_CFG_DFL_RHO
#define PWRDN_CFG_DFL_RHO
The actual GPIO used to control Radio HoldOff.
Definition: dev0680.h:549
PWRDN_CFG_USBDP
#define PWRDN_CFG_USBDP
Give the USB configuration a friendly name.
Definition: dev0680.h:990
PWRDN_CFG_BUTTON1
#define PWRDN_CFG_BUTTON1
Give GPIO PC6 configuration a friendly name.
Definition: dev0680.h:904
CFG_TEMPEN
#define CFG_TEMPEN
Give GPIO PC7 configuration a friendly name.
Definition: dev0680.h:915
PWRDN_CFG_ENUMCTRL
#define PWRDN_CFG_ENUMCTRL
Give the USB configuration a friendly name.
Definition: dev0680.h:992
PWRDN_CFG_USBDM
#define PWRDN_CFG_USBDM
Give the USB configuration a friendly name.
Definition: dev0680.h:988
PWRDN_CFG_LED2
#define PWRDN_CFG_LED2
Give the TX_ACTIVE configuration a friendly name.
Definition: dev0680.h:938
#define DEFINE_POWERDOWN_GPIO_OUTPUT_DATA_VARIABLES ( )
#define DEFINE_POWERUP_GPIO_CFG_VARIABLES ( )
Value:
uint16_t gpioCfgPowerUp [6] = { \
(( PWRUP_CFG_USBDM << _GPIO_P_CFGL_Px0_SHIFT) \
| ( PWRUP_CFG_USBDP << _GPIO_P_CFGL_Px1_SHIFT) \
| ( PWRUP_CFG_ENUMCTRL << _GPIO_P_CFGL_Px2_SHIFT) \
| ( PWRUP_CFG_VBUSMON << _GPIO_P_CFGL_Px3_SHIFT)), \
(( PWRUP_CFG_PTI_EN << _GPIO_P_CFGH_Px4_SHIFT) \
| ( PWRUP_CFG_PTI_DATA << _GPIO_P_CFGH_Px5_SHIFT) \
| ( PWRUP_CFG_DFL_RHO << _GPIO_P_CFGH_Px6_SHIFT) \
| (_GPIO_P_CFGL_Px0_OUT << _GPIO_P_CFGH_Px7_SHIFT)), \
((_GPIO_P_CFGL_Px0_OUT << _GPIO_P_CFGL_Px0_SHIFT) \
| ( PWRUP_CFG_SC1_TXD << _GPIO_P_CFGL_Px1_SHIFT) /* SC1TXD */ \
| (_GPIO_P_CFGL_Px0_IN_PUD << _GPIO_P_CFGL_Px2_SHIFT) /* SC1RXD */ \
| (_GPIO_P_CFGL_Px0_IN_PUD << _GPIO_P_CFGL_Px3_SHIFT)), /* SC1nCTS */ \
((_GPIO_P_CFGL_Px0_OUT_ALT << _GPIO_P_CFGH_Px4_SHIFT) /* SC1nRTS */ \
| (_GPIO_P_CFGL_Px0_ANALOG << _GPIO_P_CFGH_Px5_SHIFT) \
| (_GPIO_P_CFGL_Px0_IN_PUD << _GPIO_P_CFGH_Px6_SHIFT) \
| (_GPIO_P_CFGL_Px0_OUT_ALT << _GPIO_P_CFGH_Px7_SHIFT)), \
((_GPIO_P_CFGL_Px0_IN << _GPIO_P_CFGL_Px0_SHIFT) \
| (_GPIO_P_CFGL_Px0_OUT << _GPIO_P_CFGL_Px1_SHIFT) \
| (_GPIO_P_CFGL_Px0_OUT_ALT << _GPIO_P_CFGL_Px2_SHIFT) \
| (_GPIO_P_CFGL_Px0_IN << _GPIO_P_CFGL_Px3_SHIFT)), \
((_GPIO_P_CFGL_Px0_IN << _GPIO_P_CFGH_Px4_SHIFT) \
| ( PWRUP_CFG_LED2 << _GPIO_P_CFGH_Px5_SHIFT) \
| ( PWRUP_CFG_BUTTON1 << _GPIO_P_CFGH_Px6_SHIFT) \
| ( CFG_TEMPEN << _GPIO_P_CFGH_Px7_SHIFT)) \
}
PWRUP_CFG_ENUMCTRL
#define PWRUP_CFG_ENUMCTRL
Give the USB configuration a friendly name.
Definition: dev0680.h:984
PWRUP_CFG_PTI_EN
#define PWRUP_CFG_PTI_EN
Give the packet trace configuration a friendly name.
Definition: dev0680.h:838
PWRUP_CFG_DFL_RHO
#define PWRUP_CFG_DFL_RHO
The following definitions are helpers for managing Radio HoldOff and should not be modified...
Definition: dev0680.h:547
gpioCfgPowerUp
uint16_t gpioCfgPowerUp[6]
Define the mask for GPIO relevant to the radio in the context of power state. Each bit in the mask in...
PWRUP_CFG_VBUSMON
#define PWRUP_CFG_VBUSMON
Give the USB configuration a friendly name.
Definition: dev0680.h:986
PWRUP_CFG_SC1_TXD
#define PWRUP_CFG_SC1_TXD
Give GPIO SC1 TXD and nRTS configurations friendly names.
Definition: dev0680.h:1006
PWRUP_CFG_PTI_DATA
#define PWRUP_CFG_PTI_DATA
Give the packet trace configuration a friendly name.
Definition: dev0680.h:842
PWRUP_CFG_USBDP
#define PWRUP_CFG_USBDP
Give the USB configuration a friendly name.
Definition: dev0680.h:982
PWRUP_CFG_USBDM
#define PWRUP_CFG_USBDM
Give the USB configuration a friendly name.
Definition: dev0680.h:980
PWRUP_CFG_BUTTON1
#define PWRUP_CFG_BUTTON1
Give GPIO PC6 configuration a friendly name.
Definition: dev0680.h:902
CFG_TEMPEN
#define CFG_TEMPEN
Give GPIO PC7 configuration a friendly name.
Definition: dev0680.h:915
PWRUP_CFG_LED2
#define PWRUP_CFG_LED2
Give the TX_ACTIVE configuration a friendly name.
Definition: dev0680.h:936
#define DEFINE_POWERUP_GPIO_OUTPUT_DATA_VARIABLES ( )
Value:
uint8_t gpioOutPowerUp [3] = { \
(( PWRUP_OUT_USBDM << _GPIO_P_OUT_Px0_SHIFT) \
| ( PWRUP_OUT_USBDP << _GPIO_P_OUT_Px1_SHIFT) \
| ( PWRUP_OUT_ENUMCTRL << _GPIO_P_OUT_Px2_SHIFT) \
| ( PWRUP_OUT_VBUSMON << _GPIO_P_OUT_Px3_SHIFT) \
| ( PWRUP_OUT_PTI_EN << _GPIO_P_OUT_Px4_SHIFT) \
| ( PWRUP_OUT_PTI_DATA << _GPIO_P_OUT_Px5_SHIFT) \
| ( PWRUP_OUT_DFL_RHO << _GPIO_P_OUT_Px6_SHIFT) \
| /* LED default off */ \
(1 << _GPIO_P_OUT_Px7_SHIFT)), \
((1 << _GPIO_P_OUT_Px0_SHIFT) \
| (1 << _GPIO_P_OUT_Px1_SHIFT) /* SC1TXD */ \
| (1 << _GPIO_P_OUT_Px2_SHIFT) /* SC1RXD */ \
| (1 << _GPIO_P_OUT_Px3_SHIFT) /* SC1nCTS */ \
| (0 << _GPIO_P_OUT_Px4_SHIFT) /* SC1nRTS */ \
| (0 << _GPIO_P_OUT_Px5_SHIFT) \
| /* PB6 has button needing a pullup */ \
(1 << _GPIO_P_OUT_Px6_SHIFT) \
| (0 << _GPIO_P_OUT_Px7_SHIFT)), \
((0 << _GPIO_P_OUT_Px0_SHIFT) \
| (0 << _GPIO_P_OUT_Px1_SHIFT) \
| (1 << _GPIO_P_OUT_Px2_SHIFT) \
| (0 << _GPIO_P_OUT_Px3_SHIFT) \
| (0 << _GPIO_P_OUT_Px4_SHIFT) \
| ( PWRUP_OUT_LED2 << _GPIO_P_OUT_Px5_SHIFT) \
| ( PWRUP_OUT_BUTTON1 << _GPIO_P_OUT_Px6_SHIFT) \
| /* Temp Sensor default on */ \
(1 << _GPIO_P_OUT_Px7_SHIFT)) \
}
PWRUP_OUT_PTI_DATA
#define PWRUP_OUT_PTI_DATA
Give the packet trace configuration a friendly name.
Definition: dev0680.h:843
PWRUP_OUT_DFL_RHO
#define PWRUP_OUT_DFL_RHO
The actual GPIO used to control Radio HoldOff.
Definition: dev0680.h:548
gpioOutPowerUp
uint8_t gpioOutPowerUp[3]
Define the mask for GPIO relevant to the radio in the context of power state. Each bit in the mask in...
PWRUP_OUT_ENUMCTRL
#define PWRUP_OUT_ENUMCTRL
Give the USB configuration a friendly name.
Definition: dev0680.h:985
PWRUP_OUT_BUTTON1
#define PWRUP_OUT_BUTTON1
Give GPIO PC6 configuration a friendly name.
Definition: dev0680.h:903
PWRUP_OUT_USBDP
#define PWRUP_OUT_USBDP
Give the USB configuration a friendly name.
Definition: dev0680.h:983
PWRUP_OUT_LED2
#define PWRUP_OUT_LED2
Give the TX_ACTIVE configuration a friendly name.
Definition: dev0680.h:937
PWRUP_OUT_VBUSMON
#define PWRUP_OUT_VBUSMON
Give the USB configuration a friendly name.
Definition: dev0680.h:987
PWRUP_OUT_PTI_EN
#define PWRUP_OUT_PTI_EN
Give the packet trace configuration a friendly name.
Definition: dev0680.h:839
PWRUP_OUT_USBDM
#define PWRUP_OUT_USBDM
Give the USB configuration a friendly name.
Definition: dev0680.h:981
#define EMBER_SERIAL_BAUD_CUSTOM   13
  1. Refer to the EM35x datasheet's discussion on UART baud rates for the equation used to derive this value.
#define ENUMCTRL   PORTA_PIN(2)
#define ENUMCTRL_CLR ( ) do { GPIO->P[0].CLR = GPIO_P_SET_Px2; } while (0)
#define ENUMCTRL_SET ( ) do { GPIO->P[0].SET = GPIO_P_SET_Px2; } while (0)
#define ENUMCTRL_SETCFG ( cfg )
Value:
do { SET_CMSIS_REG_FIELD (GPIO->P[0].CFGL, \
GPIO_P_CFGL_Px2, \
cfg); \
} while (0)
SET_CMSIS_REG_FIELD
#define SET_CMSIS_REG_FIELD(reg, field, value)
A convenience macro that makes it easy to change the field of a register, as defined in CMSIS Device ...
Definition: iar.h:261
#define halInternalInitRadioHoldOff ( ) /* no-op */
Note
If ::RHO_GPIO is not defined, then Radio HoldOff support will not be built in even for runtime use. The GPIO signal level to assert Radio HoldOff (1=high, 0=low).
#define OSC32K_STARTUP_DELAY_MS   (0)
#define PACKET_TRACE
#define PWRDN_CFG_BUTTON1   _GPIO_P_CFGL_Px0_IN_PUD
#define PWRDN_CFG_DFL_RHO PWRDN_CFG_DFL_RHO_FOR_DFL
Note
If ::RHO_GPIO is not defined, then Radio HoldOff support will not be built in even for runtime use. The GPIO signal level to assert Radio HoldOff (1=high, 0=low).
#define PWRDN_CFG_DFL_RHO_FOR_DFL   _GPIO_P_CFGL_Px0_OUT
Note
If ::RHO_GPIO is not defined, then Radio HoldOff support will not be built in even for runtime use. The GPIO signal level to assert Radio HoldOff (1=high, 0=low).
#define PWRDN_CFG_DFL_RHO_FOR_RHO   _GPIO_P_CFGL_Px0_IN_PUD
Note
If ::RHO_GPIO is not defined, then Radio HoldOff support will not be built in even for runtime use. The GPIO signal level to assert Radio HoldOff (1=high, 0=low).
#define PWRDN_CFG_ENUMCTRL   _GPIO_P_CFGL_Px0_IN_PUD
#define PWRDN_CFG_LED2   _GPIO_P_CFGL_Px0_OUT

ENABLE_ALT_FUNCTION_TX_ACTIVE

#define PWRDN_CFG_PTI_DATA   _GPIO_P_CFGL_Px0_IN_PUD
#define PWRDN_CFG_PTI_EN   _GPIO_P_CFGL_Px0_IN_PUD
#define PWRDN_CFG_USBDM   _GPIO_P_CFGL_Px0_IN_PUD
#define PWRDN_CFG_USBDP   _GPIO_P_CFGL_Px0_IN_PUD
#define PWRDN_CFG_VBUSMON   _GPIO_P_CFGL_Px0_OUT
#define PWRDN_OUT_BUTTON1   1 /* Button needs a pullup */
#define PWRDN_OUT_DFL_RHO PWRDN_OUT_DFL_RHO_FOR_DFL
Note
If ::RHO_GPIO is not defined, then Radio HoldOff support will not be built in even for runtime use. The GPIO signal level to assert Radio HoldOff (1=high, 0=low).
#define PWRDN_OUT_DFL_RHO_FOR_DFL   1 /* LED off */
Note
If ::RHO_GPIO is not defined, then Radio HoldOff support will not be built in even for runtime use. The GPIO signal level to assert Radio HoldOff (1=high, 0=low).
#define PWRDN_OUT_DFL_RHO_FOR_RHO   0 /* Deassert */
Note
If ::RHO_GPIO is not defined, then Radio HoldOff support will not be built in even for runtime use. The GPIO signal level to assert Radio HoldOff (1=high, 0=low).
#define PWRDN_OUT_ENUMCTRL   1
#define PWRDN_OUT_LED2   1 /* LED default off */

ENABLE_ALT_FUNCTION_TX_ACTIVE

#define PWRDN_OUT_PTI_DATA   1
#define PWRDN_OUT_PTI_EN   0
#define PWRDN_OUT_SC1_nRTS   1
#define PWRDN_OUT_USBDM   1
#define PWRDN_OUT_USBDP   1
#define PWRDN_OUT_VBUSMON   1
#define PWRUP_CFG_BUTTON1   _GPIO_P_CFGL_Px0_IN_PUD
#define PWRUP_CFG_DFL_RHO PWRUP_CFG_DFL_RHO_FOR_DFL

(defined(RADIO_HOLDOFF) && defined(RHO_GPIO))

#define PWRUP_CFG_DFL_RHO_FOR_DFL   _GPIO_P_CFGL_Px0_OUT
#define PWRUP_CFG_DFL_RHO_FOR_RHO   _GPIO_P_CFGL_Px0_IN_PUD
#define PWRUP_CFG_ENUMCTRL   _GPIO_P_CFGL_Px0_OUT_ALT
#define PWRUP_CFG_LED2   _GPIO_P_CFGL_Px0_OUT

ENABLE_ALT_FUNCTION_TX_ACTIVE

#define PWRUP_CFG_PTI_DATA   _GPIO_P_CFGL_Px0_OUT_ALT
#define PWRUP_CFG_PTI_EN   _GPIO_P_CFGL_Px0_OUT_ALT
#define PWRUP_CFG_SC1_TXD   _GPIO_P_CFGL_Px0_OUT_ALT

SLEEPY_IP_MODEM_UART

#define PWRUP_CFG_USBDM   _GPIO_P_CFGL_Px0_OUT_ALT
#define PWRUP_CFG_USBDP   _GPIO_P_CFGL_Px0_IN
#define PWRUP_CFG_VBUSMON   _GPIO_P_CFGL_Px0_OUT
#define PWRUP_OUT_BUTTON1   1 /* Button needs a pullup */
#define PWRUP_OUT_DFL_RHO PWRUP_OUT_DFL_RHO_FOR_DFL
Note
If ::RHO_GPIO is not defined, then Radio HoldOff support will not be built in even for runtime use. The GPIO signal level to assert Radio HoldOff (1=high, 0=low).
#define PWRUP_OUT_DFL_RHO_FOR_DFL   1 /* LED default off */
Note
If ::RHO_GPIO is not defined, then Radio HoldOff support will not be built in even for runtime use. The GPIO signal level to assert Radio HoldOff (1=high, 0=low).
#define PWRUP_OUT_DFL_RHO_FOR_RHO   0 /* Deassert */
Note
If ::RHO_GPIO is not defined, then Radio HoldOff support will not be built in even for runtime use. The GPIO signal level to assert Radio HoldOff (1=high, 0=low).
#define PWRUP_OUT_ENUMCTRL   0
#define PWRUP_OUT_LED2   1 /* LED default off */

ENABLE_ALT_FUNCTION_TX_ACTIVE

#define PWRUP_OUT_PTI_DATA   1
#define PWRUP_OUT_PTI_EN   0
#define PWRUP_OUT_USBDM   0
#define PWRUP_OUT_USBDP   0
#define PWRUP_OUT_VBUSMON   1
#define RHO_ASSERTED   1
Note
If ::RHO_GPIO is not defined, then Radio HoldOff support will not be built in even for runtime use. The GPIO signal level to assert Radio HoldOff (1=high, 0=low).
#define RHO_CFG   (GPIO->P[0].CFGH)
#define RHO_FLAG_BIT   EVENT_GPIO_FLAG_IRQD
#define RHO_IN   (GPIO->P[0].IN)
#define RHO_INT_EN_BIT BIT32 ( RHO_INT_EN_IRQN )
Note
If ::RHO_GPIO is not defined, then Radio HoldOff support will not be built in even for runtime use. The GPIO signal level to assert Radio HoldOff (1=high, 0=low).
#define RHO_INT_EN_IRQN   IRQD_IRQn
#define RHO_INTCFG   (EVENT_GPIO->CFGD)
#define RHO_ISR   halIrqDIsr
#define RHO_MISS_BIT   EVENT_MISS_MISS_IRQD
#define RHO_OUT   (GPIO->P[0].OUT)
#define RHO_SEL ( ) do { GPIO->IRQDSEL = RHO_GPIO; } while (0)
#define SET_POWERDOWN_GPIO_CFG_REGISTERS ( )
Value:
GPIO->P[0].CFGL = gpioCfgPowerDown [0]; \
GPIO->P[0].CFGH = gpioCfgPowerDown [1]; \
GPIO->P[1].CFGL = gpioCfgPowerDown [2]; \
GPIO->P[1].CFGH = gpioCfgPowerDown [3]; \
GPIO->P[2].CFGL = gpioCfgPowerDown [4]; \
GPIO->P[2].CFGH = gpioCfgPowerDown [5];
gpioCfgPowerDown
uint16_t gpioCfgPowerDown[6]
Define the mask for GPIO relevant to the radio in the context of power state. Each bit in the mask in...
#define SET_POWERDOWN_GPIO_OUTPUT_DATA_REGISTERS ( )
Value:
GPIO->P[0].OUT = gpioOutPowerDown [0]; \
GPIO->P[1].OUT = gpioOutPowerDown [1]; \
GPIO->P[2].OUT = gpioOutPowerDown [2];
gpioOutPowerDown
uint8_t gpioOutPowerDown[3]
Define the mask for GPIO relevant to the radio in the context of power state. Each bit in the mask in...
#define SET_POWERUP_GPIO_CFG_REGISTERS ( )
Value:
GPIO->P[0].CFGL = gpioCfgPowerUp [0]; \
GPIO->P[0].CFGH = gpioCfgPowerUp [1]; \
GPIO->P[1].CFGL = gpioCfgPowerUp [2]; \
GPIO->P[1].CFGH = gpioCfgPowerUp [3]; \
GPIO->P[2].CFGL = gpioCfgPowerUp [4]; \
GPIO->P[2].CFGH = gpioCfgPowerUp [5];
gpioCfgPowerUp
uint16_t gpioCfgPowerUp[6]
Define the mask for GPIO relevant to the radio in the context of power state. Each bit in the mask in...
#define SET_POWERUP_GPIO_OUTPUT_DATA_REGISTERS ( )
Value:
GPIO->P[0].OUT = gpioOutPowerUp [0]; \
GPIO->P[1].OUT = gpioOutPowerUp [1]; \
GPIO->P[2].OUT = gpioOutPowerUp [2];
gpioOutPowerUp
uint8_t gpioOutPowerUp[3]
Define the mask for GPIO relevant to the radio in the context of power state. Each bit in the mask in...
#define SET_RESUME_GPIO_CFG_REGISTERS ( )
Value:
/* GPIO->P[0].CFGL USB untouched! */ \
GPIO->P[0].CFGH = gpioCfgPowerUp [1]; \
GPIO->P[1].CFGL = gpioCfgPowerUp [2]; \
GPIO->P[1].CFGH = gpioCfgPowerUp [3]; \
GPIO->P[2].CFGL = gpioCfgPowerUp [4]; \
GPIO->P[2].CFGH = gpioCfgPowerUp [5];
gpioCfgPowerUp
uint16_t gpioCfgPowerUp[6]
Define the mask for GPIO relevant to the radio in the context of power state. Each bit in the mask in...
#define SET_RESUME_GPIO_OUTPUT_DATA_REGISTERS ( )
Value:
GPIO->P[0].OUT = (GPIO->P[0].OUT & 0x0F) /*USB untouched*/ \
| ( gpioOutPowerUp [0] & 0xF0); \
GPIO->P[1].OUT = gpioOutPowerUp [1]; \
GPIO->P[2].OUT = gpioOutPowerUp [2];
gpioOutPowerUp
uint8_t gpioOutPowerUp[3]
Define the mask for GPIO relevant to the radio in the context of power state. Each bit in the mask in...
#define SET_SUSPEND_GPIO_CFG_REGISTERS ( )
Value:
/* GPIO->P[0].CFGL USB untouched! */ \
GPIO->P[0].CFGH = gpioCfgPowerDown [1]; \
GPIO->P[1].CFGL = gpioCfgPowerDown [2]; \
GPIO->P[1].CFGH = gpioCfgPowerDown [3]; \
GPIO->P[2].CFGL = gpioCfgPowerDown [4]; \
GPIO->P[2].CFGH = gpioCfgPowerDown [5];
gpioCfgPowerDown
uint16_t gpioCfgPowerDown[6]
Define the mask for GPIO relevant to the radio in the context of power state. Each bit in the mask in...
#define SET_SUSPEND_GPIO_OUTPUT_DATA_REGISTERS ( )
Value:
GPIO->P[0].OUT = (GPIO->P[0].OUT & 0x0F) /*USB untouched*/ \
| ( gpioOutPowerDown [0] & 0xF0); \
GPIO->P[1].OUT = gpioOutPowerDown [1]; \
GPIO->P[2].OUT = gpioOutPowerDown [2];
gpioOutPowerDown
uint8_t gpioOutPowerDown[3]
Define the mask for GPIO relevant to the radio in the context of power state. Each bit in the mask in...
#define TEMP_SENSOR_ADC_CHANNEL   ADC_SOURCE_ADC0_VREF2
#define TEMP_SENSOR_SCALE_FACTOR   1
#define USB_MAX_POWER   (50)
#define USB_REMOTEWKUPEN_STATE   (1)

Set the define USB_REMOTEWKUPEN_STATE: 0 remote wakeup is disabled. 1 remote wakeup is enabled.

Referenced by USBD_Init() .

#define USB_SELFPWRD_STATE   (1)

Set the define USB_SELFPWRD_STATE: 0 if the device is bus powered. 1 if the device self powered.

#define VBUSMON   GPIO_P_IN_Px3

Leaving VBUSMON undefined will keep VBUS Monitoring functionality from being compiled in and not conflict with other pieces that might want to use the GPIO or IRQ that VBUS Monitoring needs.

#define VBUSMON_FLAG_BIT   EVENT_GPIO_FLAG_IRQD
#define VBUSMON_IN   (GPIO->P[0].IN)
#define VBUSMON_INT_EN_BIT BIT32 ( VBUSMON_INT_EN_IRQN )

Leaving VBUSMON undefined will keep VBUS Monitoring functionality from being compiled in and not conflict with other pieces that might want to use the GPIO or IRQ that VBUS Monitoring needs.

#define VBUSMON_INT_EN_IRQN   IRQD_IRQn
#define VBUSMON_INTCFG   (EVENT_GPIO->CFGD)
#define VBUSMON_ISR   halIrqDIsr
#define VBUSMON_MISS_BIT   EVENT_MISS_MISS_IRQD
#define VBUSMON_SEL ( ) do { GPIO->IRQDSEL = PORTA_PIN(3); } while (0)
Note
For this board, IRQC is pointed at PA3.
#define VBUSMON_SETCFG ( )
Value:
do { SET_CMSIS_REG_FIELD (GPIO->P[0].CFGL, \
GPIO_P_CFGL_Px3, \
_GPIO_P_CFGL_Px3_IN); \
} while (0)
SET_CMSIS_REG_FIELD
#define SET_CMSIS_REG_FIELD(reg, field, value)
A convenience macro that makes it easy to change the field of a register, as defined in CMSIS Device ...
Definition: iar.h:261
#define WAKE_ON_PA0   false
#define WAKE_ON_PA1   false
#define WAKE_ON_PA2   false
#define WAKE_ON_PA3   false
#define WAKE_ON_PA4   false
#define WAKE_ON_PA5   false
#define WAKE_ON_PA6   false
#define WAKE_ON_PA7   false
#define WAKE_ON_PB0   false
#define WAKE_ON_PB1   false
#define WAKE_ON_PB2   false
#define WAKE_ON_PB3   false
#define WAKE_ON_PB4   false
#define WAKE_ON_PB5   false
#define WAKE_ON_PB6   true
#define WAKE_ON_PB7   false
#define WAKE_ON_PC0   false
#define WAKE_ON_PC1   false
#define WAKE_ON_PC2   false
#define WAKE_ON_PC3   false
#define WAKE_ON_PC4   false
#define WAKE_ON_PC5   false
#define WAKE_ON_PC6   true
#define WAKE_ON_PC7   false

Enumeration Type Documentation

enum HalBoardLedPins
Enumerator
BOARDLED0
BOARDLED1
BOARDLED2
BOARDLED3
BOARD_ACTIVITY_LED
BOARD_HEARTBEAT_LED

Variable Documentation

uint16_t gpioCfgPowerDown[6]
uint16_t gpioCfgPowerUp[6]
uint8_t gpioOutPowerDown[3]
uint8_t gpioOutPowerUp[3]
GpioMaskType gpioRadioPowerBoardMask