Si7210 DetailsSi7210 - Magnetic Hall Effect sensor

Description

Register interface and implementation details.

Functions

Read register from the OTP area of the Si7021 device.

Read register from the Hall sensor device.

sl_status_t sl_si7210_write_register (sl_i2cspm_t *i2cspm, uint8_t addr, uint8_t data)
Write a register in the Hall sensor device.

Set the given bit(s) in a register in the Hall sensor device.

Clear the given bit(s) in a register in the Hall sensor device.

uint8_t sl_si7210_calculate_sw_op (float threshold)
Calculate the sw_op value from the threshold by finding the inverse of the formula: threshold = (16 + sw_op[3:0]) * 2^sw_op[6:4].

uint8_t sl_si7210_calculate_sw_hyst (float hysteresis, bool scale200mT)
Calculate the sw_hyst value from the hysteresis by finding the inverse of the formula: hysteresis = (8 + sw_hyst[2:0]) * 2^sw_hyst[5:3].

uint8_t sl_si7210_calculate_sw_tamper (float tamper, bool scale200mT)
Calculate the sw_tamper value from the tamper threshold by finding the inverse of the formula: tamper = (16 + sw_tamper[3:0]) * 2^(sw_tamper[5:4] + 5)

uint8_t sl_si7210_calculate_sltime (uint32_t samplePeriod, uint8_t *slFast)
Calculate the slTime value from the sleep time by finding the inverse of the formula: tsleep = (32 + slTime[4:0]) * 2^(8 + slTime[7:5]) / 12 MHz.

Registers

Hardware revision ID register

The most significant byte of the last conversion result

The least significant byte of the last conversion result

Select the data after filtering

Power control register

Enables auto increment of the I2C register address pointer

Control register 1, output pin configuration

Control register 2, output pin configuration

Sleep time control register

Control register 3, output pin and sleep time configuration

Coefficient A0

Coefficient A1

Coefficient A2

Control register 4, Digital filter configuration

Coefficient A3

Coefficient A4

Coefficient A5

On-chip test coil control

Revision ID mask, Hardware revision ID register

#define SI7210_REG_HREVID_REVID_SHIFT   0
Revision ID shift value, Hardware revision ID register

Chip ID mask, Hardware revision ID register

#define SI7210_REG_HREVID_CHIPID_SHIFT   4
Revision ID shift value, Hardware revision ID register

New data available mask, MSB of last conversion result register

#define SI7210_REG_DSPSIGM_FRESH_SHIFT   7
New data available shift value, MSB of last conversion result register

MSB bits of conversion mask, MSB of last conversion result register

#define SI7210_REG_DSPSIGM_DSPSIGM_SHIFT   0
MSB bits of conversion shift value, MSB of last conversion result register

Sleep mode bit mask, Power control register

#define SI7210_REG_POWER_CTRL_SLEEP_SHIFT   0
Sleep mode bit shift value, Power control register

Stop bit mask, Power control register

#define SI7210_REG_POWER_CTRL_STOP_SHIFT   1
Stop bit shift value, Power control register

One burst mesurement bit mask, Power control register

#define SI7210_REG_POWER_CTRL_ONEBURST_SHIFT   2
One burst mesurement bit shift value, Power control register

Save the current state of OTP regs bit mask, Power control register

#define SI7210_REG_POWER_CTRL_USESTORE_SHIFT   3
Save the current state of OTP regs bit shift value, Power control register

Measurement in progress bit mask, Power control register

#define SI7210_REG_POWER_CTRL_MEAS_SHIFT   7
Measurement in progress bit shift value, Power control register

Switching point mask, Control register 1

#define SI7210_REG_CTRL1_SW_OP_SHIFT   0
Switching point shift value, Control register 1

Output polarity setting bit mask, Control register 1

#define SI7210_REG_CTRL1_SW_LOW4FIELD_SHIFT   7
Output polarity setting bit shift value, Control register 1

Switch hysteresis mask, Control register 2

#define SI7210_REG_CTRL2_SW_HYST_SHIFT   0
Switch hyteresis shift value, Control register 2

Switch polarity mask, Control register 2

#define SI7210_REG_CTRL2_SW_FIELDPOLSEL_SHIFT   6
Switchi polarity shift value, Control register 2

Sleep timer enable bit mask, Control register 3

#define SI7210_REG_CTRL3_SLTIMEENA_SHIFT   0
Sleep timer enable bit shift value, Control register 3

Sleep time reduction enable bit mask, Control register 3

#define SI7210_REG_CTRL3_SLFAST_SHIFT   1
Sleep time reduction bit shift value, Control register 3

Tamper switch threshold mask, Control register 3

#define SI7210_REG_CTRL3_SW_TAMPER_SHIFT   2
Tamper switch threshold shift value, Control register 3

IIR filter enable bit mask, Control register 4

#define SI7210_REG_CTRL4_IIR_SHIFT   0
IIR filter enable bit shift value, Control register 4

Number of samples to average mask, Control register 4

#define SI7210_REG_CTRL4_DF_BW_SHIFT   1
Number of samples to average shift value, Control register 4

Measurement burst size mask, Control register 4

#define SI7210_REG_CTRL4_DF_BURSTSIZE_SHIFT   5
Measurement burst size shift value, Control register 4

#define SI7210_REG_OTP_CTRL_BUSY_SHIFT   0
OTP busy indicator bit shift value, OTP read control register

OTP Control register 1, output pin configuration

OTP Control register 2, output pin configuration

OTP Sleep time control register

OTP Control register 3, output pin and sleep time configuration

OTP Coefficient A0

OTP Coefficient A1

OTP Coefficient A2

OTP Control register 4, Digital filter configuration

OTP Coefficient A3

OTP Coefficient A4

OTP Coefficient A5

OTP Base part number

OTP Variant number

OTP Serial number

OTP On-chip field generator calibration value

OTP 20mT scale no magnet temperature compensation value

OTP 200mT scale no magnet temperature compensation value

OTP 20mT scale neodymium magnet temperature compensation value

OTP 200mT scale neodymium temperature compensation value

OTP 20mT scale ceramic magnet temperature compensation value

OTP 200mT scale ceramic magnet temperature compensation value

Function Documentation

 sl_status_t sl_si7210_read_otp_register ( sl_i2cspm_t * `i2cspm, ` uint8_t `otpAddr, ` uint8_t * `otpData ` )

Read register from the OTP area of the Si7021 device.

Parameters
 [in] `i2cspm` The I2CSPM instance to use. [in] `otpAddr` The register address to read from in the sensor [out] `otpData` The data read from the device
Return values
 `SL_STATUS_OK` Success `SL_STATUS_TRANSMIT` I2C transmission error

 sl_status_t sl_si7210_read_register ( sl_i2cspm_t * `i2cspm, ` uint8_t `addr, ` uint8_t * `data ` )

Read register from the Hall sensor device.

Parameters
 [in] `i2cspm` The I2CSPM instance to use. [in] `addr` The register address to read from in the sensor [out] `data` The data read from the device
Return values
 `SL_STATUS_OK` Success `SL_STATUS_TRANSMIT` I2C transmission error

◆ sl_si7210_write_register()

 sl_status_t sl_si7210_write_register ( sl_i2cspm_t * `i2cspm, ` uint8_t `addr, ` uint8_t `data ` )

Write a register in the Hall sensor device.

Parameters
 [in] `i2cspm` The I2CSPM instance to use. [in] `addr` The register address to write [in] `data` The data to write to the register
Return values
 `SL_STATUS_OK` Success `SL_STATUS_TRANSMIT` I2C transmission error

◆ sl_si7210_set_register_bits()

 sl_status_t sl_si7210_set_register_bits ( sl_i2cspm_t * `i2cspm, ` uint8_t `addr, ` uint8_t `mask ` )

Set the given bit(s) in a register in the Hall sensor device.

Parameters
 [in] `i2cspm` The I2CSPM instance to use. [in] `addr` The address of the register [in] `mask` The mask specifies which bits should be set. If a given bit of the mask is 1, that register bit will be set to 1. All the other register bits will be untouched.
Return values
 `SL_STATUS_OK` Success `SL_STATUS_TRANSMIT` I2C transmission error

◆ sl_si7210_clear_register_bits()

 sl_status_t sl_si7210_clear_register_bits ( sl_i2cspm_t * `i2cspm, ` uint8_t `addr, ` uint8_t `mask ` )

Clear the given bit(s) in a register in the Hall sensor device.

Parameters
 [in] `i2cspm` The I2CSPM instance to use. [in] `addr` The address of the register [in] `mask` The mask specifies which bits should be clear. If a given bit of the mask is 1 that register bit will be cleared to 0. All the other register bits will be untouched.
Return values
 `SL_STATUS_OK` Success `SL_STATUS_TRANSMIT` I2C transmission error

◆ sl_si7210_calculate_sw_op()

 uint8_t sl_si7210_calculate_sw_op ( float `threshold` )

Calculate the sw_op value from the threshold by finding the inverse of the formula: threshold = (16 + sw_op[3:0]) * 2^sw_op[6:4].

Parameters
 [in] `threshold` Threshold value
Returns
The value of the sw_op bitfield

◆ sl_si7210_calculate_sw_hyst()

 uint8_t sl_si7210_calculate_sw_hyst ( float `hysteresis, ` bool `scale200mT ` )

Calculate the sw_hyst value from the hysteresis by finding the inverse of the formula: hysteresis = (8 + sw_hyst[2:0]) * 2^sw_hyst[5:3].

Parameters
 [in] `hysteresis` Hysteresis value [in] `scale200mT` scale200mT=false : full-scale equals 20mT scale200mT=true : full-scale equals 200mT
Returns
The value of the sw_hyst bitfield

◆ sl_si7210_calculate_sw_tamper()

 uint8_t sl_si7210_calculate_sw_tamper ( float `tamper, ` bool `scale200mT ` )

Calculate the sw_tamper value from the tamper threshold by finding the inverse of the formula: tamper = (16 + sw_tamper[3:0]) * 2^(sw_tamper[5:4] + 5)

Parameters
 [in] `tamper` Tamper value
• Parameters
 [in] `scale200mT` scale200mT=false : full-scale equals 20mT scale200mT=true : full-scale equals 200mT
Returns
The value of the sw_tamper bitfield

◆ sl_si7210_calculate_sltime()

 uint8_t sl_si7210_calculate_sltime ( uint32_t `samplePeriod, ` uint8_t * `slFast ` )

Calculate the slTime value from the sleep time by finding the inverse of the formula: tsleep = (32 + slTime[4:0]) * 2^(8 + slTime[7:5]) / 12 MHz.

Parameters
 [in] `samplePeriod` The sleep time [out] `slFast` The value of the slFast bit
Returns
The value of the slTime bitfield

Macro Definition Documentation

Hardware revision ID register

The most significant byte of the last conversion result

The least significant byte of the last conversion result

Select the data after filtering

Power control register

Enables auto increment of the I2C register address pointer

Control register 1, output pin configuration

Control register 2, output pin configuration

Sleep time control register

Control register 3, output pin and sleep time configuration

Coefficient A0

Coefficient A1

Coefficient A2

Control register 4, Digital filter configuration

Coefficient A3

Coefficient A4

Coefficient A5

On-chip test coil control

Revision ID mask, Hardware revision ID register

◆ SI7210_REG_HREVID_REVID_SHIFT

 #define SI7210_REG_HREVID_REVID_SHIFT   0

Revision ID shift value, Hardware revision ID register

Chip ID mask, Hardware revision ID register

◆ SI7210_REG_HREVID_CHIPID_SHIFT

 #define SI7210_REG_HREVID_CHIPID_SHIFT   4

Revision ID shift value, Hardware revision ID register

New data available mask, MSB of last conversion result register

◆ SI7210_REG_DSPSIGM_FRESH_SHIFT

 #define SI7210_REG_DSPSIGM_FRESH_SHIFT   7

New data available shift value, MSB of last conversion result register

MSB bits of conversion mask, MSB of last conversion result register

◆ SI7210_REG_DSPSIGM_DSPSIGM_SHIFT

 #define SI7210_REG_DSPSIGM_DSPSIGM_SHIFT   0

MSB bits of conversion shift value, MSB of last conversion result register

Sleep mode bit mask, Power control register

◆ SI7210_REG_POWER_CTRL_SLEEP_SHIFT

 #define SI7210_REG_POWER_CTRL_SLEEP_SHIFT   0

Sleep mode bit shift value, Power control register

Stop bit mask, Power control register

◆ SI7210_REG_POWER_CTRL_STOP_SHIFT

 #define SI7210_REG_POWER_CTRL_STOP_SHIFT   1

Stop bit shift value, Power control register

One burst mesurement bit mask, Power control register

◆ SI7210_REG_POWER_CTRL_ONEBURST_SHIFT

 #define SI7210_REG_POWER_CTRL_ONEBURST_SHIFT   2

One burst mesurement bit shift value, Power control register

Save the current state of OTP regs bit mask, Power control register

◆ SI7210_REG_POWER_CTRL_USESTORE_SHIFT

 #define SI7210_REG_POWER_CTRL_USESTORE_SHIFT   3

Save the current state of OTP regs bit shift value, Power control register

Measurement in progress bit mask, Power control register

◆ SI7210_REG_POWER_CTRL_MEAS_SHIFT

 #define SI7210_REG_POWER_CTRL_MEAS_SHIFT   7

Measurement in progress bit shift value, Power control register

Switching point mask, Control register 1

◆ SI7210_REG_CTRL1_SW_OP_SHIFT

 #define SI7210_REG_CTRL1_SW_OP_SHIFT   0

Switching point shift value, Control register 1

Output polarity setting bit mask, Control register 1

◆ SI7210_REG_CTRL1_SW_LOW4FIELD_SHIFT

 #define SI7210_REG_CTRL1_SW_LOW4FIELD_SHIFT   7

Output polarity setting bit shift value, Control register 1

Switch hysteresis mask, Control register 2

◆ SI7210_REG_CTRL2_SW_HYST_SHIFT

 #define SI7210_REG_CTRL2_SW_HYST_SHIFT   0

Switch hyteresis shift value, Control register 2

Switch polarity mask, Control register 2

◆ SI7210_REG_CTRL2_SW_FIELDPOLSEL_SHIFT

 #define SI7210_REG_CTRL2_SW_FIELDPOLSEL_SHIFT   6

Switchi polarity shift value, Control register 2

Sleep timer enable bit mask, Control register 3

◆ SI7210_REG_CTRL3_SLTIMEENA_SHIFT

 #define SI7210_REG_CTRL3_SLTIMEENA_SHIFT   0

Sleep timer enable bit shift value, Control register 3

Sleep time reduction enable bit mask, Control register 3

◆ SI7210_REG_CTRL3_SLFAST_SHIFT

 #define SI7210_REG_CTRL3_SLFAST_SHIFT   1

Sleep time reduction bit shift value, Control register 3

Tamper switch threshold mask, Control register 3

◆ SI7210_REG_CTRL3_SW_TAMPER_SHIFT

 #define SI7210_REG_CTRL3_SW_TAMPER_SHIFT   2

Tamper switch threshold shift value, Control register 3

IIR filter enable bit mask, Control register 4

◆ SI7210_REG_CTRL4_IIR_SHIFT

 #define SI7210_REG_CTRL4_IIR_SHIFT   0

IIR filter enable bit shift value, Control register 4

Number of samples to average mask, Control register 4

◆ SI7210_REG_CTRL4_DF_BW_SHIFT

 #define SI7210_REG_CTRL4_DF_BW_SHIFT   1

Number of samples to average shift value, Control register 4

Measurement burst size mask, Control register 4

◆ SI7210_REG_CTRL4_DF_BURSTSIZE_SHIFT

 #define SI7210_REG_CTRL4_DF_BURSTSIZE_SHIFT   5

Measurement burst size shift value, Control register 4

◆ SI7210_REG_OTP_CTRL_BUSY_SHIFT

 #define SI7210_REG_OTP_CTRL_BUSY_SHIFT   0

OTP busy indicator bit shift value, OTP read control register

OTP Control register 1, output pin configuration

OTP Control register 2, output pin configuration

OTP Sleep time control register

OTP Control register 3, output pin and sleep time configuration

OTP Coefficient A0

OTP Coefficient A1

OTP Coefficient A2

OTP Control register 4, Digital filter configuration

OTP Coefficient A3

OTP Coefficient A4

OTP Coefficient A5

OTP Base part number

OTP Variant number

OTP Serial number

OTP On-chip field generator calibration value

OTP 20mT scale no magnet temperature compensation value

OTP 200mT scale no magnet temperature compensation value

OTP 20mT scale neodymium magnet temperature compensation value

OTP 200mT scale neodymium temperature compensation value