Macros
#define	_RAC_ANTDIV_EN_DEFAULT 0x00000000UL

#define	_RAC_ANTDIV_EN_LNAMIXEN1 0x00000002UL

#define	_RAC_ANTDIV_EN_LNAMIXEN2 0x00000020UL

#define	_RAC_ANTDIV_EN_LNAMIXRFPKDENRF1 0x00000004UL

#define	_RAC_ANTDIV_EN_LNAMIXRFPKDENRF2 0x00000040UL

#define	_RAC_ANTDIV_EN_MASK 0xFFUL

#define	_RAC_ANTDIV_EN_OFF 0x00000000UL

#define	_RAC_ANTDIV_EN_ON 0x000000FFUL

#define	_RAC_ANTDIV_EN_PAENANT1 0x00000001UL

#define	_RAC_ANTDIV_EN_PAENANT2 0x00000010UL

#define	_RAC_ANTDIV_EN_SHIFT 0

#define	_RAC_ANTDIV_EN_SYLODIVRLO12G4EN 0x00000008UL

#define	_RAC_ANTDIV_EN_SYLODIVRLO22G4EN 0x00000080UL

#define	_RAC_ANTDIV_MASK 0x000003FFUL

#define	_RAC_ANTDIV_RESETVALUE 0x00000000UL

#define	_RAC_ANTDIV_STATUS_ANT1 0x00000001UL

#define	_RAC_ANTDIV_STATUS_ANT2 0x00000002UL

#define	_RAC_ANTDIV_STATUS_BOTH 0x00000003UL

#define	_RAC_ANTDIV_STATUS_DEFAULT 0x00000000UL

#define	_RAC_ANTDIV_STATUS_MASK 0x300UL

#define	_RAC_ANTDIV_STATUS_OFF 0x00000000UL

#define	_RAC_ANTDIV_STATUS_SHIFT 8

#define	_RAC_APC_AMPCONTROLLIMITSW_DEFAULT 0x000000FFUL

#define	_RAC_APC_AMPCONTROLLIMITSW_MASK 0xFF000000UL

#define	_RAC_APC_AMPCONTROLLIMITSW_SHIFT 24

#define	_RAC_APC_ENAPCSW_DEFAULT 0x00000000UL

#define	_RAC_APC_ENAPCSW_DISABLE 0x00000000UL

#define	_RAC_APC_ENAPCSW_ENABLE 0x00000001UL

#define	_RAC_APC_ENAPCSW_MASK 0x4UL

#define	_RAC_APC_ENAPCSW_SHIFT 2

#define	_RAC_APC_MASK 0xFF000004UL

#define	_RAC_APC_RESETVALUE 0xFF000000UL

#define	_RAC_AUXADCCTRL0_CLRCOUNTER_DEFAULT 0x00000000UL

#define	_RAC_AUXADCCTRL0_CLRCOUNTER_MASK 0x1000UL

#define	_RAC_AUXADCCTRL0_CLRCOUNTER_SHIFT 12

#define	_RAC_AUXADCCTRL0_CLRFILTER_DEFAULT 0x00000000UL

#define	_RAC_AUXADCCTRL0_CLRFILTER_MASK 0x2000UL

#define	_RAC_AUXADCCTRL0_CLRFILTER_SHIFT 13

#define	_RAC_AUXADCCTRL0_CYCLES_DEFAULT 0x00000100UL

#define	_RAC_AUXADCCTRL0_CYCLES_MASK 0x3FFUL

#define	_RAC_AUXADCCTRL0_CYCLES_SHIFT 0

#define	_RAC_AUXADCCTRL0_INPUTRESSEL_DEFAULT 0x00000000UL

#define	_RAC_AUXADCCTRL0_INPUTRESSEL_MASK 0x3C000UL

#define	_RAC_AUXADCCTRL0_INPUTRESSEL_SHIFT 14

#define	_RAC_AUXADCCTRL0_MASK 0x0003FFFFUL

#define	_RAC_AUXADCCTRL0_MUXSEL_DEFAULT 0x00000000UL

#define	_RAC_AUXADCCTRL0_MUXSEL_MASK 0xC00UL

#define	_RAC_AUXADCCTRL0_MUXSEL_SHIFT 10

#define	_RAC_AUXADCCTRL0_RESETVALUE 0x00000100UL

#define	_RAC_AUXADCCTRL1_AUXADCINPUTRESSEL_DEFAULT 0x00000000UL

#define	_RAC_AUXADCCTRL1_AUXADCINPUTRESSEL_MASK 0xFUL

#define	_RAC_AUXADCCTRL1_AUXADCINPUTRESSEL_RES0p6kOhm 0x0000000AUL

#define	_RAC_AUXADCCTRL1_AUXADCINPUTRESSEL_RES10kOhm 0x00000006UL

#define	_RAC_AUXADCCTRL1_AUXADCINPUTRESSEL_RES160kOhm 0x00000002UL

#define	_RAC_AUXADCCTRL1_AUXADCINPUTRESSEL_RES1p25kOhm 0x00000009UL

#define	_RAC_AUXADCCTRL1_AUXADCINPUTRESSEL_RES20kOhm 0x00000005UL

#define	_RAC_AUXADCCTRL1_AUXADCINPUTRESSEL_RES2p5kOhm 0x00000008UL

#define	_RAC_AUXADCCTRL1_AUXADCINPUTRESSEL_RES320kOhm 0x00000001UL

#define	_RAC_AUXADCCTRL1_AUXADCINPUTRESSEL_RES40kOhm 0x00000004UL

#define	_RAC_AUXADCCTRL1_AUXADCINPUTRESSEL_RES5kOhm 0x00000007UL

#define	_RAC_AUXADCCTRL1_AUXADCINPUTRESSEL_RES640kOhm 0x00000000UL

#define	_RAC_AUXADCCTRL1_AUXADCINPUTRESSEL_RES80kOhm 0x00000003UL

#define	_RAC_AUXADCCTRL1_AUXADCINPUTRESSEL_RES_switch 0x0000000BUL

#define	_RAC_AUXADCCTRL1_AUXADCINPUTRESSEL_SHIFT 0

#define	_RAC_AUXADCCTRL1_AUXADCINPUTSELECT_DEFAULT 0x00000000UL

#define	_RAC_AUXADCCTRL1_AUXADCINPUTSELECT_MASK 0xF0UL

#define	_RAC_AUXADCCTRL1_AUXADCINPUTSELECT_SEL0 0x00000000UL

#define	_RAC_AUXADCCTRL1_AUXADCINPUTSELECT_SEL1 0x00000001UL

#define	_RAC_AUXADCCTRL1_AUXADCINPUTSELECT_SEL2 0x00000002UL

#define	_RAC_AUXADCCTRL1_AUXADCINPUTSELECT_SEL3 0x00000003UL

#define	_RAC_AUXADCCTRL1_AUXADCINPUTSELECT_SEL4 0x00000004UL

#define	_RAC_AUXADCCTRL1_AUXADCINPUTSELECT_SEL5 0x00000005UL

#define	_RAC_AUXADCCTRL1_AUXADCINPUTSELECT_SEL6 0x00000006UL

#define	_RAC_AUXADCCTRL1_AUXADCINPUTSELECT_SEL7 0x00000007UL

#define	_RAC_AUXADCCTRL1_AUXADCINPUTSELECT_SEL8 0x00000008UL

#define	_RAC_AUXADCCTRL1_AUXADCINPUTSELECT_SEL9 0x00000009UL

#define	_RAC_AUXADCCTRL1_AUXADCINPUTSELECT_SHIFT 4

#define	_RAC_AUXADCCTRL1_AUXADCPMONSELECT_DEFAULT 0x00000000UL

#define	_RAC_AUXADCCTRL1_AUXADCPMONSELECT_MASK 0xF00UL

#define	_RAC_AUXADCCTRL1_AUXADCPMONSELECT_SHIFT 8

#define	_RAC_AUXADCCTRL1_AUXADCRESET_DEFAULT 0x00000000UL

#define	_RAC_AUXADCCTRL1_AUXADCRESET_MASK 0x1000000UL

#define	_RAC_AUXADCCTRL1_AUXADCRESET_Reset_Disabled 0x00000001UL

#define	_RAC_AUXADCCTRL1_AUXADCRESET_Reset_Enabled 0x00000000UL

#define	_RAC_AUXADCCTRL1_AUXADCRESET_SHIFT 24

#define	_RAC_AUXADCCTRL1_AUXADCTSENSESELCURR_DEFAULT 0x00000000UL

#define	_RAC_AUXADCCTRL1_AUXADCTSENSESELCURR_MASK 0x1F0000UL

#define	_RAC_AUXADCCTRL1_AUXADCTSENSESELCURR_SHIFT 16

#define	_RAC_AUXADCCTRL1_AUXADCTSENSESELVBE_DEFAULT 0x00000000UL

#define	_RAC_AUXADCCTRL1_AUXADCTSENSESELVBE_MASK 0x2000000UL

#define	_RAC_AUXADCCTRL1_AUXADCTSENSESELVBE_SHIFT 25

#define	_RAC_AUXADCCTRL1_AUXADCTSENSESELVBE_VBE1 0x00000000UL

#define	_RAC_AUXADCCTRL1_AUXADCTSENSESELVBE_VBE2 0x00000001UL

#define	_RAC_AUXADCCTRL1_MASK 0x031F0FFFUL

#define	_RAC_AUXADCCTRL1_RESETVALUE 0x00000000UL

#define	_RAC_AUXADCEN_AUXADCENAUXADC_DEFAULT 0x00000000UL

#define	_RAC_AUXADCEN_AUXADCENAUXADC_Disabled 0x00000000UL

#define	_RAC_AUXADCEN_AUXADCENAUXADC_Enabled 0x00000001UL

#define	_RAC_AUXADCEN_AUXADCENAUXADC_MASK 0x1UL

#define	_RAC_AUXADCEN_AUXADCENAUXADC_SHIFT 0

#define	_RAC_AUXADCEN_AUXADCENINPUTBUFFER_DEFAULT 0x00000000UL

#define	_RAC_AUXADCEN_AUXADCENINPUTBUFFER_Disabled 0x00000000UL

#define	_RAC_AUXADCEN_AUXADCENINPUTBUFFER_Enabled 0x00000001UL

#define	_RAC_AUXADCEN_AUXADCENINPUTBUFFER_MASK 0x2UL

#define	_RAC_AUXADCEN_AUXADCENINPUTBUFFER_SHIFT 1

#define	_RAC_AUXADCEN_AUXADCENLDO_DEFAULT 0x00000000UL

#define	_RAC_AUXADCEN_AUXADCENLDO_Disabled 0x00000000UL

#define	_RAC_AUXADCEN_AUXADCENLDO_Enabled 0x00000001UL

#define	_RAC_AUXADCEN_AUXADCENLDO_MASK 0x4UL

#define	_RAC_AUXADCEN_AUXADCENLDO_SHIFT 2

#define	_RAC_AUXADCEN_AUXADCENOUTPUTDRV_DEFAULT 0x00000000UL

#define	_RAC_AUXADCEN_AUXADCENOUTPUTDRV_Disabled 0x00000000UL

#define	_RAC_AUXADCEN_AUXADCENOUTPUTDRV_Enabled 0x00000001UL

#define	_RAC_AUXADCEN_AUXADCENOUTPUTDRV_MASK 0x8UL

#define	_RAC_AUXADCEN_AUXADCENOUTPUTDRV_SHIFT 3

#define	_RAC_AUXADCEN_AUXADCENPMON_DEFAULT 0x00000000UL

#define	_RAC_AUXADCEN_AUXADCENPMON_Disabled 0x00000000UL

#define	_RAC_AUXADCEN_AUXADCENPMON_Enabled 0x00000001UL

#define	_RAC_AUXADCEN_AUXADCENPMON_MASK 0x10UL

#define	_RAC_AUXADCEN_AUXADCENPMON_SHIFT 4

#define	_RAC_AUXADCEN_AUXADCENRESONDIAGA_DEFAULT 0x00000000UL

#define	_RAC_AUXADCEN_AUXADCENRESONDIAGA_Disabled 0x00000000UL

#define	_RAC_AUXADCEN_AUXADCENRESONDIAGA_Enabled 0x00000001UL

#define	_RAC_AUXADCEN_AUXADCENRESONDIAGA_MASK 0x20UL

#define	_RAC_AUXADCEN_AUXADCENRESONDIAGA_SHIFT 5

#define	_RAC_AUXADCEN_AUXADCENTSENSE_DEFAULT 0x00000000UL

#define	_RAC_AUXADCEN_AUXADCENTSENSE_Disabled 0x00000000UL

#define	_RAC_AUXADCEN_AUXADCENTSENSE_Enabled 0x00000001UL

#define	_RAC_AUXADCEN_AUXADCENTSENSE_MASK 0x40UL

#define	_RAC_AUXADCEN_AUXADCENTSENSE_SHIFT 6

#define	_RAC_AUXADCEN_AUXADCENTSENSECAL_DEFAULT 0x00000000UL

#define	_RAC_AUXADCEN_AUXADCENTSENSECAL_Disabled 0x00000000UL

#define	_RAC_AUXADCEN_AUXADCENTSENSECAL_Enabled 0x00000001UL

#define	_RAC_AUXADCEN_AUXADCENTSENSECAL_MASK 0x80UL

#define	_RAC_AUXADCEN_AUXADCENTSENSECAL_SHIFT 7

#define	_RAC_AUXADCEN_AUXADCINPUTBUFFERBYPASS_Bypassed 0x00000001UL

#define	_RAC_AUXADCEN_AUXADCINPUTBUFFERBYPASS_DEFAULT 0x00000000UL

#define	_RAC_AUXADCEN_AUXADCINPUTBUFFERBYPASS_MASK 0x100UL

#define	_RAC_AUXADCEN_AUXADCINPUTBUFFERBYPASS_Not_Bypassed 0x00000000UL

#define	_RAC_AUXADCEN_AUXADCINPUTBUFFERBYPASS_SHIFT 8

#define	_RAC_AUXADCEN_MASK 0x000001FFUL

#define	_RAC_AUXADCEN_RESETVALUE 0x00000000UL

#define	_RAC_AUXADCOUT_AUXADCOUT_DEFAULT 0x00000000UL

#define	_RAC_AUXADCOUT_AUXADCOUT_MASK 0xFFFFFFFUL

#define	_RAC_AUXADCOUT_AUXADCOUT_SHIFT 0

#define	_RAC_AUXADCOUT_MASK 0x0FFFFFFFUL

#define	_RAC_AUXADCOUT_RESETVALUE 0x00000000UL

#define	_RAC_AUXADCTRIM_AUXADCCLKINVERT_DEFAULT 0x00000000UL

#define	_RAC_AUXADCTRIM_AUXADCCLKINVERT_Disable_Invert 0x00000000UL

#define	_RAC_AUXADCTRIM_AUXADCCLKINVERT_Enable_Invert 0x00000001UL

#define	_RAC_AUXADCTRIM_AUXADCCLKINVERT_MASK 0x1UL

#define	_RAC_AUXADCTRIM_AUXADCCLKINVERT_SHIFT 0

#define	_RAC_AUXADCTRIM_AUXADCLDOVREFTRIM_DEFAULT 0x00000001UL

#define	_RAC_AUXADCTRIM_AUXADCLDOVREFTRIM_MASK 0x6UL

#define	_RAC_AUXADCTRIM_AUXADCLDOVREFTRIM_SHIFT 1

#define	_RAC_AUXADCTRIM_AUXADCLDOVREFTRIM_TRIM1p27 0x00000000UL

#define	_RAC_AUXADCTRIM_AUXADCLDOVREFTRIM_TRIM1p3 0x00000001UL

#define	_RAC_AUXADCTRIM_AUXADCLDOVREFTRIM_TRIM1p35 0x00000002UL

#define	_RAC_AUXADCTRIM_AUXADCLDOVREFTRIM_TRIM1p4 0x00000003UL

#define	_RAC_AUXADCTRIM_AUXADCOUTPUTINVERT_DEFAULT 0x00000000UL

#define	_RAC_AUXADCTRIM_AUXADCOUTPUTINVERT_Disabled 0x00000000UL

#define	_RAC_AUXADCTRIM_AUXADCOUTPUTINVERT_Enabled 0x00000001UL

#define	_RAC_AUXADCTRIM_AUXADCOUTPUTINVERT_MASK 0x8UL

#define	_RAC_AUXADCTRIM_AUXADCOUTPUTINVERT_SHIFT 3

#define	_RAC_AUXADCTRIM_AUXADCRCTUNE_DEFAULT 0x00000010UL

#define	_RAC_AUXADCTRIM_AUXADCRCTUNE_MASK 0x1F0UL

#define	_RAC_AUXADCTRIM_AUXADCRCTUNE_SHIFT 4

#define	_RAC_AUXADCTRIM_AUXADCTRIMADCINPUTRES_DEFAULT 0x00000002UL

#define	_RAC_AUXADCTRIM_AUXADCTRIMADCINPUTRES_MASK 0x600UL

#define	_RAC_AUXADCTRIM_AUXADCTRIMADCINPUTRES_RES200k 0x00000000UL

#define	_RAC_AUXADCTRIM_AUXADCTRIMADCINPUTRES_RES250k 0x00000001UL

#define	_RAC_AUXADCTRIM_AUXADCTRIMADCINPUTRES_RES300k 0x00000002UL

#define	_RAC_AUXADCTRIM_AUXADCTRIMADCINPUTRES_RES350k 0x00000003UL

#define	_RAC_AUXADCTRIM_AUXADCTRIMADCINPUTRES_SHIFT 9

#define	_RAC_AUXADCTRIM_AUXADCTRIMCURRINPUTBUF_DEFAULT 0x00000002UL

#define	_RAC_AUXADCTRIM_AUXADCTRIMCURRINPUTBUF_MASK 0x1800UL

#define	_RAC_AUXADCTRIM_AUXADCTRIMCURRINPUTBUF_SHIFT 11

#define	_RAC_AUXADCTRIM_AUXADCTRIMCURRINPUTBUF_Typ 0x00000002UL

#define	_RAC_AUXADCTRIM_AUXADCTRIMCURRINPUTBUF_Typ_minus_20pct 0x00000001UL

#define	_RAC_AUXADCTRIM_AUXADCTRIMCURRINPUTBUF_Typ_minus_40pct 0x00000000UL

#define	_RAC_AUXADCTRIM_AUXADCTRIMCURRINPUTBUF_Typ_plus_20pct 0x00000003UL

#define	_RAC_AUXADCTRIM_AUXADCTRIMCURROPA1_DEFAULT 0x00000002UL

#define	_RAC_AUXADCTRIM_AUXADCTRIMCURROPA1_MASK 0x6000UL

#define	_RAC_AUXADCTRIM_AUXADCTRIMCURROPA1_SHIFT 13

#define	_RAC_AUXADCTRIM_AUXADCTRIMCURROPA1_Typ 0x00000002UL

#define	_RAC_AUXADCTRIM_AUXADCTRIMCURROPA1_Typ_minus_20pct 0x00000001UL

#define	_RAC_AUXADCTRIM_AUXADCTRIMCURROPA1_Typ_minus_40pct 0x00000000UL

#define	_RAC_AUXADCTRIM_AUXADCTRIMCURROPA1_Typ_plus_20pct 0x00000003UL

#define	_RAC_AUXADCTRIM_AUXADCTRIMCURROPA2_DEFAULT 0x00000002UL

#define	_RAC_AUXADCTRIM_AUXADCTRIMCURROPA2_MASK 0x18000UL

#define	_RAC_AUXADCTRIM_AUXADCTRIMCURROPA2_SHIFT 15

#define	_RAC_AUXADCTRIM_AUXADCTRIMCURROPA2_Typ 0x00000002UL

#define	_RAC_AUXADCTRIM_AUXADCTRIMCURROPA2_Typ_minus_20pct 0x00000001UL

#define	_RAC_AUXADCTRIM_AUXADCTRIMCURROPA2_Typ_minus_40pct 0x00000000UL

#define	_RAC_AUXADCTRIM_AUXADCTRIMCURROPA2_Typ_plus_20pct 0x00000003UL

#define	_RAC_AUXADCTRIM_AUXADCTRIMCURRREFBUF_DEFAULT 0x00000002UL

#define	_RAC_AUXADCTRIM_AUXADCTRIMCURRREFBUF_MASK 0x60000UL

#define	_RAC_AUXADCTRIM_AUXADCTRIMCURRREFBUF_SHIFT 17

#define	_RAC_AUXADCTRIM_AUXADCTRIMCURRREFBUF_Typ 0x00000002UL

#define	_RAC_AUXADCTRIM_AUXADCTRIMCURRREFBUF_Typ_minus_20pct 0x00000001UL

#define	_RAC_AUXADCTRIM_AUXADCTRIMCURRREFBUF_Typ_minus_40pct 0x00000000UL

#define	_RAC_AUXADCTRIM_AUXADCTRIMCURRREFBUF_Typ_plus_20pct 0x00000003UL

#define	_RAC_AUXADCTRIM_AUXADCTRIMCURRTSENSE_DEFAULT 0x00000002UL

#define	_RAC_AUXADCTRIM_AUXADCTRIMCURRTSENSE_MASK 0x180000UL

#define	_RAC_AUXADCTRIM_AUXADCTRIMCURRTSENSE_SHIFT 19

#define	_RAC_AUXADCTRIM_AUXADCTRIMCURRTSENSE_Typ 0x00000002UL

#define	_RAC_AUXADCTRIM_AUXADCTRIMCURRTSENSE_Typ_minus_20pct 0x00000001UL

#define	_RAC_AUXADCTRIM_AUXADCTRIMCURRTSENSE_Typ_minus_40pct 0x00000000UL

#define	_RAC_AUXADCTRIM_AUXADCTRIMCURRTSENSE_Typ_plus_20pct 0x00000003UL

#define	_RAC_AUXADCTRIM_AUXADCTRIMCURRVCMBUF_DEFAULT 0x00000002UL

#define	_RAC_AUXADCTRIM_AUXADCTRIMCURRVCMBUF_MASK 0x600000UL

#define	_RAC_AUXADCTRIM_AUXADCTRIMCURRVCMBUF_SHIFT 21

#define	_RAC_AUXADCTRIM_AUXADCTRIMCURRVCMBUF_Typ 0x00000002UL

#define	_RAC_AUXADCTRIM_AUXADCTRIMCURRVCMBUF_Typ_minus_20pct 0x00000001UL

#define	_RAC_AUXADCTRIM_AUXADCTRIMCURRVCMBUF_Typ_minus_40pct 0x00000000UL

#define	_RAC_AUXADCTRIM_AUXADCTRIMCURRVCMBUF_Typ_plus_20pct 0x00000003UL

#define	_RAC_AUXADCTRIM_AUXADCTRIMLDOHIGHCURRENT_DEFAULT 0x00000001UL

#define	_RAC_AUXADCTRIM_AUXADCTRIMLDOHIGHCURRENT_HighCurrentMode 0x00000001UL

#define	_RAC_AUXADCTRIM_AUXADCTRIMLDOHIGHCURRENT_LowCurrentMode 0x00000000UL

#define	_RAC_AUXADCTRIM_AUXADCTRIMLDOHIGHCURRENT_MASK 0x800000UL

#define	_RAC_AUXADCTRIM_AUXADCTRIMLDOHIGHCURRENT_SHIFT 23

#define	_RAC_AUXADCTRIM_AUXADCTRIMREFP_DEFAULT 0x00000002UL

#define	_RAC_AUXADCTRIM_AUXADCTRIMREFP_MASK 0x3000000UL

#define	_RAC_AUXADCTRIM_AUXADCTRIMREFP_REF1p05 0x00000000UL

#define	_RAC_AUXADCTRIM_AUXADCTRIMREFP_REF1p16 0x00000001UL

#define	_RAC_AUXADCTRIM_AUXADCTRIMREFP_REF1p2 0x00000002UL

#define	_RAC_AUXADCTRIM_AUXADCTRIMREFP_REF1p25 0x00000003UL

#define	_RAC_AUXADCTRIM_AUXADCTRIMREFP_SHIFT 24

#define	_RAC_AUXADCTRIM_AUXADCTRIMVREFVCM_DEFAULT 0x00000001UL

#define	_RAC_AUXADCTRIM_AUXADCTRIMVREFVCM_MASK 0xC000000UL

#define	_RAC_AUXADCTRIM_AUXADCTRIMVREFVCM_SHIFT 26

#define	_RAC_AUXADCTRIM_AUXADCTRIMVREFVCM_Trim0p6 0x00000000UL

#define	_RAC_AUXADCTRIM_AUXADCTRIMVREFVCM_Trim0p65 0x00000001UL

#define	_RAC_AUXADCTRIM_AUXADCTRIMVREFVCM_Trim0p7 0x00000002UL

#define	_RAC_AUXADCTRIM_AUXADCTRIMVREFVCM_Trim0p75 0x00000003UL

#define	_RAC_AUXADCTRIM_AUXADCTSENSETRIMVBE2_DEFAULT 0x00000000UL

#define	_RAC_AUXADCTRIM_AUXADCTSENSETRIMVBE2_MASK 0x10000000UL

#define	_RAC_AUXADCTRIM_AUXADCTSENSETRIMVBE2_SHIFT 28

#define	_RAC_AUXADCTRIM_AUXADCTSENSETRIMVBE2_VBE_16uA 0x00000000UL

#define	_RAC_AUXADCTRIM_AUXADCTSENSETRIMVBE2_VBE_32uA 0x00000001UL

#define	_RAC_AUXADCTRIM_MASK 0x1FFFFFFFUL

#define	_RAC_AUXADCTRIM_RESETVALUE 0x06D55502UL

#define	_RAC_BREAKPOINT_BKPADDR_DEFAULT 0x00000000UL

#define	_RAC_BREAKPOINT_BKPADDR_MASK 0xFFFFFFFFUL

#define	_RAC_BREAKPOINT_BKPADDR_SHIFT 0

#define	_RAC_BREAKPOINT_MASK 0xFFFFFFFFUL

#define	_RAC_BREAKPOINT_RESETVALUE 0x00000000UL

#define	_RAC_CLKMULTCTRL_CLKMULTDIVN_DEFAULT 0x00000040UL

#define	_RAC_CLKMULTCTRL_CLKMULTDIVN_MASK 0x7FUL

#define	_RAC_CLKMULTCTRL_CLKMULTDIVN_SHIFT 0

#define	_RAC_CLKMULTCTRL_CLKMULTDIVR_DEFAULT 0x00000001UL

#define	_RAC_CLKMULTCTRL_CLKMULTDIVR_MASK 0x380UL

#define	_RAC_CLKMULTCTRL_CLKMULTDIVR_SHIFT 7

#define	_RAC_CLKMULTCTRL_CLKMULTDIVX_DEFAULT 0x00000000UL

#define	_RAC_CLKMULTCTRL_CLKMULTDIVX_div10 0x00000005UL

#define	_RAC_CLKMULTCTRL_CLKMULTDIVX_div12 0x00000006UL

#define	_RAC_CLKMULTCTRL_CLKMULTDIVX_div14 0x00000007UL

#define	_RAC_CLKMULTCTRL_CLKMULTDIVX_div_1 0x00000000UL

#define	_RAC_CLKMULTCTRL_CLKMULTDIVX_div_2 0x00000001UL

#define	_RAC_CLKMULTCTRL_CLKMULTDIVX_div_4 0x00000002UL

#define	_RAC_CLKMULTCTRL_CLKMULTDIVX_div_6 0x00000003UL

#define	_RAC_CLKMULTCTRL_CLKMULTDIVX_div_8 0x00000004UL

#define	_RAC_CLKMULTCTRL_CLKMULTDIVX_MASK 0x1C00UL

#define	_RAC_CLKMULTCTRL_CLKMULTDIVX_SHIFT 10

#define	_RAC_CLKMULTCTRL_CLKMULTENRESYNC_DEFAULT 0x00000000UL

#define	_RAC_CLKMULTCTRL_CLKMULTENRESYNC_disable_sync 0x00000000UL

#define	_RAC_CLKMULTCTRL_CLKMULTENRESYNC_enable_sync 0x00000001UL

#define	_RAC_CLKMULTCTRL_CLKMULTENRESYNC_MASK 0x2000UL

#define	_RAC_CLKMULTCTRL_CLKMULTENRESYNC_SHIFT 13

#define	_RAC_CLKMULTCTRL_CLKMULTVALID_DEFAULT 0x00000000UL

#define	_RAC_CLKMULTCTRL_CLKMULTVALID_invalid 0x00000000UL

#define	_RAC_CLKMULTCTRL_CLKMULTVALID_MASK 0x4000UL

#define	_RAC_CLKMULTCTRL_CLKMULTVALID_SHIFT 14

#define	_RAC_CLKMULTCTRL_CLKMULTVALID_valid 0x00000001UL

#define	_RAC_CLKMULTCTRL_MASK 0x00007FFFUL

#define	_RAC_CLKMULTCTRL_RESETVALUE 0x000000C0UL

#define	_RAC_CLKMULTEN0_CLKMULTBWCAL_bw_1lsb 0x00000000UL

#define	_RAC_CLKMULTEN0_CLKMULTBWCAL_bw_2lsb 0x00000001UL

#define	_RAC_CLKMULTEN0_CLKMULTBWCAL_bw_3lsb 0x00000002UL

#define	_RAC_CLKMULTEN0_CLKMULTBWCAL_bw_4lsb 0x00000003UL

#define	_RAC_CLKMULTEN0_CLKMULTBWCAL_DEFAULT 0x00000001UL

#define	_RAC_CLKMULTEN0_CLKMULTBWCAL_MASK 0x3UL

#define	_RAC_CLKMULTEN0_CLKMULTBWCAL_SHIFT 0

#define	_RAC_CLKMULTEN0_CLKMULTDISICO_DEFAULT 0x00000001UL

#define	_RAC_CLKMULTEN0_CLKMULTDISICO_disable 0x00000001UL

#define	_RAC_CLKMULTEN0_CLKMULTDISICO_enable 0x00000000UL

#define	_RAC_CLKMULTEN0_CLKMULTDISICO_MASK 0x4UL

#define	_RAC_CLKMULTEN0_CLKMULTDISICO_SHIFT 2

#define	_RAC_CLKMULTEN0_CLKMULTENBBDET_DEFAULT 0x00000000UL

#define	_RAC_CLKMULTEN0_CLKMULTENBBDET_disable 0x00000000UL

#define	_RAC_CLKMULTEN0_CLKMULTENBBDET_enable 0x00000001UL

#define	_RAC_CLKMULTEN0_CLKMULTENBBDET_MASK 0x8UL

#define	_RAC_CLKMULTEN0_CLKMULTENBBDET_SHIFT 3

#define	_RAC_CLKMULTEN0_CLKMULTENBBXLDET_DEFAULT 0x00000000UL

#define	_RAC_CLKMULTEN0_CLKMULTENBBXLDET_disable 0x00000000UL

#define	_RAC_CLKMULTEN0_CLKMULTENBBXLDET_enable 0x00000001UL

#define	_RAC_CLKMULTEN0_CLKMULTENBBXLDET_MASK 0x10UL

#define	_RAC_CLKMULTEN0_CLKMULTENBBXLDET_SHIFT 4

#define	_RAC_CLKMULTEN0_CLKMULTENBBXMDET_DEFAULT 0x00000000UL

#define	_RAC_CLKMULTEN0_CLKMULTENBBXMDET_disable 0x00000000UL

#define	_RAC_CLKMULTEN0_CLKMULTENBBXMDET_enable 0x00000001UL

#define	_RAC_CLKMULTEN0_CLKMULTENBBXMDET_MASK 0x20UL

#define	_RAC_CLKMULTEN0_CLKMULTENBBXMDET_SHIFT 5

#define	_RAC_CLKMULTEN0_CLKMULTENCFDET_DEFAULT 0x00000000UL

#define	_RAC_CLKMULTEN0_CLKMULTENCFDET_disable 0x00000000UL

#define	_RAC_CLKMULTEN0_CLKMULTENCFDET_enable 0x00000001UL

#define	_RAC_CLKMULTEN0_CLKMULTENCFDET_MASK 0x40UL

#define	_RAC_CLKMULTEN0_CLKMULTENCFDET_SHIFT 6

#define	_RAC_CLKMULTEN0_CLKMULTENDITHER_DEFAULT 0x00000000UL

#define	_RAC_CLKMULTEN0_CLKMULTENDITHER_disable 0x00000000UL

#define	_RAC_CLKMULTEN0_CLKMULTENDITHER_enable 0x00000001UL

#define	_RAC_CLKMULTEN0_CLKMULTENDITHER_MASK 0x80UL

#define	_RAC_CLKMULTEN0_CLKMULTENDITHER_SHIFT 7

#define	_RAC_CLKMULTEN0_CLKMULTENDRVADC_DEFAULT 0x00000000UL

#define	_RAC_CLKMULTEN0_CLKMULTENDRVADC_disable 0x00000000UL

#define	_RAC_CLKMULTEN0_CLKMULTENDRVADC_enable 0x00000001UL

#define	_RAC_CLKMULTEN0_CLKMULTENDRVADC_MASK 0x100UL

#define	_RAC_CLKMULTEN0_CLKMULTENDRVADC_SHIFT 8

#define	_RAC_CLKMULTEN0_CLKMULTENDRVDIFF_DEFAULT 0x00000000UL

#define	_RAC_CLKMULTEN0_CLKMULTENDRVDIFF_Differential 0x00000001UL

#define	_RAC_CLKMULTEN0_CLKMULTENDRVDIFF_MASK 0x200UL

#define	_RAC_CLKMULTEN0_CLKMULTENDRVDIFF_SHIFT 9

#define	_RAC_CLKMULTEN0_CLKMULTENDRVDIFF_Single_ended 0x00000000UL

#define	_RAC_CLKMULTEN0_CLKMULTENDRVRX2P4G_DEFAULT 0x00000000UL

#define	_RAC_CLKMULTEN0_CLKMULTENDRVRX2P4G_disable 0x00000000UL

#define	_RAC_CLKMULTEN0_CLKMULTENDRVRX2P4G_enable 0x00000001UL

#define	_RAC_CLKMULTEN0_CLKMULTENDRVRX2P4G_MASK 0x400UL

#define	_RAC_CLKMULTEN0_CLKMULTENDRVRX2P4G_SHIFT 10

#define	_RAC_CLKMULTEN0_CLKMULTENFBDIV_DEFAULT 0x00000000UL

#define	_RAC_CLKMULTEN0_CLKMULTENFBDIV_disable 0x00000000UL

#define	_RAC_CLKMULTEN0_CLKMULTENFBDIV_enable 0x00000001UL

#define	_RAC_CLKMULTEN0_CLKMULTENFBDIV_MASK 0x2000UL

#define	_RAC_CLKMULTEN0_CLKMULTENFBDIV_SHIFT 13

#define	_RAC_CLKMULTEN0_CLKMULTENREFDIV_DEFAULT 0x00000000UL

#define	_RAC_CLKMULTEN0_CLKMULTENREFDIV_disable 0x00000000UL

#define	_RAC_CLKMULTEN0_CLKMULTENREFDIV_enable 0x00000001UL

#define	_RAC_CLKMULTEN0_CLKMULTENREFDIV_MASK 0x4000UL

#define	_RAC_CLKMULTEN0_CLKMULTENREFDIV_SHIFT 14

#define	_RAC_CLKMULTEN0_CLKMULTENREG1_DEFAULT 0x00000000UL

#define	_RAC_CLKMULTEN0_CLKMULTENREG1_disable 0x00000000UL

#define	_RAC_CLKMULTEN0_CLKMULTENREG1_enable 0x00000001UL

#define	_RAC_CLKMULTEN0_CLKMULTENREG1_MASK 0x8000UL

#define	_RAC_CLKMULTEN0_CLKMULTENREG1_SHIFT 15

#define	_RAC_CLKMULTEN0_CLKMULTENREG2_DEFAULT 0x00000000UL

#define	_RAC_CLKMULTEN0_CLKMULTENREG2_disable 0x00000000UL

#define	_RAC_CLKMULTEN0_CLKMULTENREG2_enable 0x00000001UL

#define	_RAC_CLKMULTEN0_CLKMULTENREG2_MASK 0x10000UL

#define	_RAC_CLKMULTEN0_CLKMULTENREG2_SHIFT 16

#define	_RAC_CLKMULTEN0_CLKMULTENROTDET_DEFAULT 0x00000000UL

#define	_RAC_CLKMULTEN0_CLKMULTENROTDET_disable 0x00000000UL

#define	_RAC_CLKMULTEN0_CLKMULTENROTDET_enable 0x00000001UL

#define	_RAC_CLKMULTEN0_CLKMULTENROTDET_MASK 0x20000UL

#define	_RAC_CLKMULTEN0_CLKMULTENROTDET_SHIFT 17

#define	_RAC_CLKMULTEN0_CLKMULTFREQCAL_DEFAULT 0x00000001UL

#define	_RAC_CLKMULTEN0_CLKMULTFREQCAL_MASK 0xC0000UL

#define	_RAC_CLKMULTEN0_CLKMULTFREQCAL_pedes_14uA 0x00000000UL

#define	_RAC_CLKMULTEN0_CLKMULTFREQCAL_pedes_22uA 0x00000001UL

#define	_RAC_CLKMULTEN0_CLKMULTFREQCAL_pedes_30uA 0x00000002UL

#define	_RAC_CLKMULTEN0_CLKMULTFREQCAL_pedes_38uA 0x00000003UL

#define	_RAC_CLKMULTEN0_CLKMULTFREQCAL_SHIFT 18

#define	_RAC_CLKMULTEN0_CLKMULTREG1ADJV_DEFAULT 0x00000002UL

#define	_RAC_CLKMULTEN0_CLKMULTREG1ADJV_MASK 0x300000UL

#define	_RAC_CLKMULTEN0_CLKMULTREG1ADJV_SHIFT 20

#define	_RAC_CLKMULTEN0_CLKMULTREG1ADJV_v1p28 0x00000000UL

#define	_RAC_CLKMULTEN0_CLKMULTREG1ADJV_v1p32 0x00000001UL

#define	_RAC_CLKMULTEN0_CLKMULTREG1ADJV_v1p33 0x00000002UL

#define	_RAC_CLKMULTEN0_CLKMULTREG1ADJV_v1p38 0x00000003UL

#define	_RAC_CLKMULTEN0_CLKMULTREG2ADJI_DEFAULT 0x00000002UL

#define	_RAC_CLKMULTEN0_CLKMULTREG2ADJI_I_1040uA 0x00000003UL

#define	_RAC_CLKMULTEN0_CLKMULTREG2ADJI_I_200uA 0x00000000UL

#define	_RAC_CLKMULTEN0_CLKMULTREG2ADJI_I_480uA 0x00000001UL

#define	_RAC_CLKMULTEN0_CLKMULTREG2ADJI_I_760uA 0x00000002UL

#define	_RAC_CLKMULTEN0_CLKMULTREG2ADJI_MASK 0xC00000UL

#define	_RAC_CLKMULTEN0_CLKMULTREG2ADJI_SHIFT 22

#define	_RAC_CLKMULTEN0_CLKMULTREG2ADJV_DEFAULT 0x00000002UL

#define	_RAC_CLKMULTEN0_CLKMULTREG2ADJV_MASK 0x3000000UL

#define	_RAC_CLKMULTEN0_CLKMULTREG2ADJV_SHIFT 24

#define	_RAC_CLKMULTEN0_CLKMULTREG2ADJV_v1p03 0x00000000UL

#define	_RAC_CLKMULTEN0_CLKMULTREG2ADJV_v1p09 0x00000001UL

#define	_RAC_CLKMULTEN0_CLKMULTREG2ADJV_v1p10 0x00000002UL

#define	_RAC_CLKMULTEN0_CLKMULTREG2ADJV_v1p16 0x00000003UL

#define	_RAC_CLKMULTEN0_MASK 0x03FFFFFFUL

#define	_RAC_CLKMULTEN0_RESETVALUE 0x02A40005UL

#define	_RAC_CLKMULTEN1_CLKMULTINNIBBLE_DEFAULT 0x00000008UL

#define	_RAC_CLKMULTEN1_CLKMULTINNIBBLE_MASK 0xFUL

#define	_RAC_CLKMULTEN1_CLKMULTINNIBBLE_SHIFT 0

#define	_RAC_CLKMULTEN1_CLKMULTLDCNIB_DEFAULT 0x00000000UL

#define	_RAC_CLKMULTEN1_CLKMULTLDCNIB_disable 0x00000000UL

#define	_RAC_CLKMULTEN1_CLKMULTLDCNIB_enable 0x00000001UL

#define	_RAC_CLKMULTEN1_CLKMULTLDCNIB_MASK 0x10UL

#define	_RAC_CLKMULTEN1_CLKMULTLDCNIB_SHIFT 4

#define	_RAC_CLKMULTEN1_CLKMULTLDFNIB_DEFAULT 0x00000000UL

#define	_RAC_CLKMULTEN1_CLKMULTLDFNIB_disable 0x00000000UL

#define	_RAC_CLKMULTEN1_CLKMULTLDFNIB_enable 0x00000001UL

#define	_RAC_CLKMULTEN1_CLKMULTLDFNIB_MASK 0x20UL

#define	_RAC_CLKMULTEN1_CLKMULTLDFNIB_SHIFT 5

#define	_RAC_CLKMULTEN1_CLKMULTLDMNIB_DEFAULT 0x00000000UL

#define	_RAC_CLKMULTEN1_CLKMULTLDMNIB_disable 0x00000000UL

#define	_RAC_CLKMULTEN1_CLKMULTLDMNIB_enable 0x00000001UL

#define	_RAC_CLKMULTEN1_CLKMULTLDMNIB_MASK 0x40UL

#define	_RAC_CLKMULTEN1_CLKMULTLDMNIB_SHIFT 6

#define	_RAC_CLKMULTEN1_CLKMULTRDNIBBLE_coarse_nibble 0x00000003UL

#define	_RAC_CLKMULTEN1_CLKMULTRDNIBBLE_DEFAULT 0x00000003UL

#define	_RAC_CLKMULTEN1_CLKMULTRDNIBBLE_fine_nibble 0x00000001UL

#define	_RAC_CLKMULTEN1_CLKMULTRDNIBBLE_MASK 0x180UL

#define	_RAC_CLKMULTEN1_CLKMULTRDNIBBLE_moderate_nibble 0x00000002UL

#define	_RAC_CLKMULTEN1_CLKMULTRDNIBBLE_quarter_nibble 0x00000000UL

#define	_RAC_CLKMULTEN1_CLKMULTRDNIBBLE_SHIFT 7

#define	_RAC_CLKMULTEN1_MASK 0x000001FFUL

#define	_RAC_CLKMULTEN1_RESETVALUE 0x00000188UL

#define	_RAC_CLKMULTSTATUS_CLKMULTACKVALID_DEFAULT 0x00000000UL

#define	_RAC_CLKMULTSTATUS_CLKMULTACKVALID_invalid 0x00000000UL

#define	_RAC_CLKMULTSTATUS_CLKMULTACKVALID_MASK 0x10UL

#define	_RAC_CLKMULTSTATUS_CLKMULTACKVALID_SHIFT 4

#define	_RAC_CLKMULTSTATUS_CLKMULTACKVALID_valid 0x00000001UL

#define	_RAC_CLKMULTSTATUS_CLKMULTOUTNIBBLE_DEFAULT 0x00000000UL

#define	_RAC_CLKMULTSTATUS_CLKMULTOUTNIBBLE_MASK 0xFUL

#define	_RAC_CLKMULTSTATUS_CLKMULTOUTNIBBLE_SHIFT 0

#define	_RAC_CLKMULTSTATUS_MASK 0x0000001FUL

#define	_RAC_CLKMULTSTATUS_RESETVALUE 0x00000000UL

#define	_RAC_CMD_CLEARRXOVERFLOW_DEFAULT 0x00000000UL

#define	_RAC_CMD_CLEARRXOVERFLOW_MASK 0x40UL

#define	_RAC_CMD_CLEARRXOVERFLOW_SHIFT 6

#define	_RAC_CMD_CLEARTXEN_DEFAULT 0x00000000UL

#define	_RAC_CMD_CLEARTXEN_MASK 0x8UL

#define	_RAC_CMD_CLEARTXEN_SHIFT 3

#define	_RAC_CMD_FORCETX_DEFAULT 0x00000000UL

#define	_RAC_CMD_FORCETX_MASK 0x2UL

#define	_RAC_CMD_FORCETX_SHIFT 1

#define	_RAC_CMD_LNAENCLEAR_DEFAULT 0x00000000UL

#define	_RAC_CMD_LNAENCLEAR_MASK 0x8000UL

#define	_RAC_CMD_LNAENCLEAR_SHIFT 15

#define	_RAC_CMD_LNAENSET_DEFAULT 0x00000000UL

#define	_RAC_CMD_LNAENSET_MASK 0x4000UL

#define	_RAC_CMD_LNAENSET_SHIFT 14

#define	_RAC_CMD_MASK 0xC000F1FFUL

#define	_RAC_CMD_PAENCLEAR_DEFAULT 0x00000000UL

#define	_RAC_CMD_PAENCLEAR_MASK 0x2000UL

#define	_RAC_CMD_PAENCLEAR_SHIFT 13

#define	_RAC_CMD_PAENSET_DEFAULT 0x00000000UL

#define	_RAC_CMD_PAENSET_MASK 0x1000UL

#define	_RAC_CMD_PAENSET_SHIFT 12

#define	_RAC_CMD_RESETVALUE 0x00000000UL

#define	_RAC_CMD_RXCAL_DEFAULT 0x00000000UL

#define	_RAC_CMD_RXCAL_MASK 0x80UL

#define	_RAC_CMD_RXCAL_SHIFT 7

#define	_RAC_CMD_RXDIS_DEFAULT 0x00000000UL

#define	_RAC_CMD_RXDIS_MASK 0x100UL

#define	_RAC_CMD_RXDIS_SHIFT 8

#define	_RAC_CMD_TXAFTERFRAME_DEFAULT 0x00000000UL

#define	_RAC_CMD_TXAFTERFRAME_MASK 0x10UL

#define	_RAC_CMD_TXAFTERFRAME_SHIFT 4

#define	_RAC_CMD_TXDIS_DEFAULT 0x00000000UL

#define	_RAC_CMD_TXDIS_MASK 0x20UL

#define	_RAC_CMD_TXDIS_SHIFT 5

#define	_RAC_CMD_TXEN_DEFAULT 0x00000000UL

#define	_RAC_CMD_TXEN_MASK 0x1UL

#define	_RAC_CMD_TXEN_SHIFT 0

#define	_RAC_CMD_TXONCCA_DEFAULT 0x00000000UL

#define	_RAC_CMD_TXONCCA_MASK 0x4UL

#define	_RAC_CMD_TXONCCA_SHIFT 2

#define	_RAC_CTRL_ACTIVEPOL_DEFAULT 0x00000000UL

#define	_RAC_CTRL_ACTIVEPOL_MASK 0x80UL

#define	_RAC_CTRL_ACTIVEPOL_SHIFT 7

#define	_RAC_CTRL_ACTIVEPOL_X0 0x00000000UL

#define	_RAC_CTRL_ACTIVEPOL_X1 0x00000001UL

#define	_RAC_CTRL_FORCEDISABLE_DEFAULT 0x00000000UL

#define	_RAC_CTRL_FORCEDISABLE_MASK 0x1UL

#define	_RAC_CTRL_FORCEDISABLE_SHIFT 0

#define	_RAC_CTRL_LNAENPOL_DEFAULT 0x00000000UL

#define	_RAC_CTRL_LNAENPOL_MASK 0x200UL

#define	_RAC_CTRL_LNAENPOL_SHIFT 9

#define	_RAC_CTRL_LNAENPOL_X0 0x00000000UL

#define	_RAC_CTRL_LNAENPOL_X1 0x00000001UL

#define	_RAC_CTRL_MASK 0x000107EFUL

#define	_RAC_CTRL_PAENPOL_DEFAULT 0x00000000UL

#define	_RAC_CTRL_PAENPOL_MASK 0x100UL

#define	_RAC_CTRL_PAENPOL_SHIFT 8

#define	_RAC_CTRL_PAENPOL_X0 0x00000000UL

#define	_RAC_CTRL_PAENPOL_X1 0x00000001UL

#define	_RAC_CTRL_PRSCLR_DEFAULT 0x00000000UL

#define	_RAC_CTRL_PRSCLR_MASK 0x20UL

#define	_RAC_CTRL_PRSCLR_PRSCH 0x00000001UL

#define	_RAC_CTRL_PRSCLR_RXSEARCH 0x00000000UL

#define	_RAC_CTRL_PRSCLR_SHIFT 5

#define	_RAC_CTRL_PRSFORCETX_DEFAULT 0x00000000UL

#define	_RAC_CTRL_PRSFORCETX_MASK 0x10000UL

#define	_RAC_CTRL_PRSFORCETX_SHIFT 16

#define	_RAC_CTRL_PRSFORCETX_X0 0x00000000UL

#define	_RAC_CTRL_PRSFORCETX_X1 0x00000001UL

#define	_RAC_CTRL_PRSMODE_DEFAULT 0x00000000UL

#define	_RAC_CTRL_PRSMODE_DIRECT 0x00000000UL

#define	_RAC_CTRL_PRSMODE_MASK 0x8UL

#define	_RAC_CTRL_PRSMODE_PULSE 0x00000001UL

#define	_RAC_CTRL_PRSMODE_SHIFT 3

#define	_RAC_CTRL_PRSRXDIS_DEFAULT 0x00000000UL

#define	_RAC_CTRL_PRSRXDIS_MASK 0x400UL

#define	_RAC_CTRL_PRSRXDIS_SHIFT 10

#define	_RAC_CTRL_PRSRXDIS_X0 0x00000000UL

#define	_RAC_CTRL_PRSRXDIS_X1 0x00000001UL

#define	_RAC_CTRL_PRSTXEN_DEFAULT 0x00000000UL

#define	_RAC_CTRL_PRSTXEN_MASK 0x2UL

#define	_RAC_CTRL_PRSTXEN_SHIFT 1

#define	_RAC_CTRL_RESETVALUE 0x00000000UL

#define	_RAC_CTRL_TXAFTERRX_DEFAULT 0x00000000UL

#define	_RAC_CTRL_TXAFTERRX_MASK 0x4UL

#define	_RAC_CTRL_TXAFTERRX_SHIFT 2

#define	_RAC_CTRL_TXAFTERRX_X0 0x00000000UL

#define	_RAC_CTRL_TXAFTERRX_X1 0x00000001UL

#define	_RAC_CTRL_TXPOSTPONE_DEFAULT 0x00000000UL

#define	_RAC_CTRL_TXPOSTPONE_MASK 0x40UL

#define	_RAC_CTRL_TXPOSTPONE_SHIFT 6

#define	_RAC_CTRL_TXPOSTPONE_X0 0x00000000UL

#define	_RAC_CTRL_TXPOSTPONE_X1 0x00000001UL

#define	_RAC_DIGCLKRETIMECTRL_DIGCLKRETIMEDISRETIME_DEFAULT 0x00000000UL

#define	_RAC_DIGCLKRETIMECTRL_DIGCLKRETIMEDISRETIME_disable_retime 0x00000001UL

#define	_RAC_DIGCLKRETIMECTRL_DIGCLKRETIMEDISRETIME_enable_retime 0x00000000UL

#define	_RAC_DIGCLKRETIMECTRL_DIGCLKRETIMEDISRETIME_MASK 0x2UL

#define	_RAC_DIGCLKRETIMECTRL_DIGCLKRETIMEDISRETIME_SHIFT 1

#define	_RAC_DIGCLKRETIMECTRL_DIGCLKRETIMEENRETIME_DEFAULT 0x00000000UL

#define	_RAC_DIGCLKRETIMECTRL_DIGCLKRETIMEENRETIME_disable 0x00000000UL

#define	_RAC_DIGCLKRETIMECTRL_DIGCLKRETIMEENRETIME_enable 0x00000001UL

#define	_RAC_DIGCLKRETIMECTRL_DIGCLKRETIMEENRETIME_MASK 0x1UL

#define	_RAC_DIGCLKRETIMECTRL_DIGCLKRETIMEENRETIME_SHIFT 0

#define	_RAC_DIGCLKRETIMECTRL_DIGCLKRETIMELIMITH_DEFAULT 0x00000000UL

#define	_RAC_DIGCLKRETIMECTRL_DIGCLKRETIMELIMITH_MASK 0x70UL

#define	_RAC_DIGCLKRETIMECTRL_DIGCLKRETIMELIMITH_SHIFT 4

#define	_RAC_DIGCLKRETIMECTRL_DIGCLKRETIMELIMITL_DEFAULT 0x00000000UL

#define	_RAC_DIGCLKRETIMECTRL_DIGCLKRETIMELIMITL_MASK 0x700UL

#define	_RAC_DIGCLKRETIMECTRL_DIGCLKRETIMELIMITL_SHIFT 8

#define	_RAC_DIGCLKRETIMECTRL_DIGCLKRETIMERESETN_DEFAULT 0x00000000UL

#define	_RAC_DIGCLKRETIMECTRL_DIGCLKRETIMERESETN_MASK 0x4UL

#define	_RAC_DIGCLKRETIMECTRL_DIGCLKRETIMERESETN_operate 0x00000000UL

#define	_RAC_DIGCLKRETIMECTRL_DIGCLKRETIMERESETN_reset 0x00000001UL

#define	_RAC_DIGCLKRETIMECTRL_DIGCLKRETIMERESETN_SHIFT 2

#define	_RAC_DIGCLKRETIMECTRL_MASK 0x00000777UL

#define	_RAC_DIGCLKRETIMECTRL_RESETVALUE 0x00000000UL

#define	_RAC_DIGCLKRETIMESTATUS_DIGCLKRETIMECLKSEL_DEFAULT 0x00000000UL

#define	_RAC_DIGCLKRETIMESTATUS_DIGCLKRETIMECLKSEL_MASK 0x1UL

#define	_RAC_DIGCLKRETIMESTATUS_DIGCLKRETIMECLKSEL_SHIFT 0

#define	_RAC_DIGCLKRETIMESTATUS_DIGCLKRETIMECLKSEL_use_raw_clk 0x00000000UL

#define	_RAC_DIGCLKRETIMESTATUS_DIGCLKRETIMECLKSEL_use_retimed_clk 0x00000001UL

#define	_RAC_DIGCLKRETIMESTATUS_DIGCLKRETIMERESETNLO_DEFAULT 0x00000000UL

#define	_RAC_DIGCLKRETIMESTATUS_DIGCLKRETIMERESETNLO_hi 0x00000001UL

#define	_RAC_DIGCLKRETIMESTATUS_DIGCLKRETIMERESETNLO_lo 0x00000000UL

#define	_RAC_DIGCLKRETIMESTATUS_DIGCLKRETIMERESETNLO_MASK 0x2UL

#define	_RAC_DIGCLKRETIMESTATUS_DIGCLKRETIMERESETNLO_SHIFT 1

#define	_RAC_DIGCLKRETIMESTATUS_MASK 0x00000003UL

#define	_RAC_DIGCLKRETIMESTATUS_RESETVALUE 0x00000000UL

#define	_RAC_EN_EN_DEFAULT 0x00000000UL

#define	_RAC_EN_EN_MASK 0x1UL

#define	_RAC_EN_EN_SHIFT 0

#define	_RAC_EN_MASK 0x00000001UL

#define	_RAC_EN_RESETVALUE 0x00000000UL

#define	_RAC_FORCESTATE_FORCESTATE_DEFAULT 0x00000000UL

#define	_RAC_FORCESTATE_FORCESTATE_MASK 0xFUL

#define	_RAC_FORCESTATE_FORCESTATE_SHIFT 0

#define	_RAC_FORCESTATE_MASK 0x0000000FUL

#define	_RAC_FORCESTATE_RESETVALUE 0x00000000UL

#define	_RAC_IEN_BUSERROR_DEFAULT 0x00000000UL

#define	_RAC_IEN_BUSERROR_MASK 0x4UL

#define	_RAC_IEN_BUSERROR_SHIFT 2

#define	_RAC_IEN_MASK 0x00FF0007UL

#define	_RAC_IEN_RESETVALUE 0x00000000UL

#define	_RAC_IEN_SEQ_DEFAULT 0x00000000UL

#define	_RAC_IEN_SEQ_MASK 0xFF0000UL

#define	_RAC_IEN_SEQ_SHIFT 16

#define	_RAC_IEN_STATECHANGE_DEFAULT 0x00000000UL

#define	_RAC_IEN_STATECHANGE_MASK 0x1UL

#define	_RAC_IEN_STATECHANGE_SHIFT 0

#define	_RAC_IEN_STIMCMPEV_DEFAULT 0x00000000UL

#define	_RAC_IEN_STIMCMPEV_MASK 0x2UL

#define	_RAC_IEN_STIMCMPEV_SHIFT 1

#define	_RAC_IF_BUSERROR_DEFAULT 0x00000000UL

#define	_RAC_IF_BUSERROR_MASK 0x4UL

#define	_RAC_IF_BUSERROR_SHIFT 2

#define	_RAC_IF_MASK 0x00FF0007UL

#define	_RAC_IF_RESETVALUE 0x00000000UL

#define	_RAC_IF_SEQ_DEFAULT 0x00000000UL

#define	_RAC_IF_SEQ_MASK 0xFF0000UL

#define	_RAC_IF_SEQ_SHIFT 16

#define	_RAC_IF_STATECHANGE_DEFAULT 0x00000000UL

#define	_RAC_IF_STATECHANGE_MASK 0x1UL

#define	_RAC_IF_STATECHANGE_SHIFT 0

#define	_RAC_IF_STIMCMPEV_DEFAULT 0x00000000UL

#define	_RAC_IF_STIMCMPEV_MASK 0x2UL

#define	_RAC_IF_STIMCMPEV_SHIFT 1

#define	_RAC_IFADCCAL_IFADCENRCCAL_DEFAULT 0x00000000UL

#define	_RAC_IFADCCAL_IFADCENRCCAL_MASK 0x1UL

#define	_RAC_IFADCCAL_IFADCENRCCAL_rccal_disable 0x00000000UL

#define	_RAC_IFADCCAL_IFADCENRCCAL_rccal_enable 0x00000001UL

#define	_RAC_IFADCCAL_IFADCENRCCAL_SHIFT 0

#define	_RAC_IFADCCAL_IFADCTUNERC_DEFAULT 0x00000010UL

#define	_RAC_IFADCCAL_IFADCTUNERC_MASK 0x1F00UL

#define	_RAC_IFADCCAL_IFADCTUNERC_SHIFT 8

#define	_RAC_IFADCCAL_IFADCTUNERCCALMODE_ADCmode 0x00000001UL

#define	_RAC_IFADCCAL_IFADCTUNERCCALMODE_DEFAULT 0x00000000UL

#define	_RAC_IFADCCAL_IFADCTUNERCCALMODE_MASK 0x2UL

#define	_RAC_IFADCCAL_IFADCTUNERCCALMODE_SHIFT 1

#define	_RAC_IFADCCAL_IFADCTUNERCCALMODE_SYmode 0x00000000UL

#define	_RAC_IFADCCAL_MASK 0x00001F03UL

#define	_RAC_IFADCCAL_RESETVALUE 0x00001000UL

#define	_RAC_IFADCSTATUS_IFADCRCCALOUT_DEFAULT 0x00000000UL

#define	_RAC_IFADCSTATUS_IFADCRCCALOUT_hi 0x00000001UL

#define	_RAC_IFADCSTATUS_IFADCRCCALOUT_lo 0x00000000UL

#define	_RAC_IFADCSTATUS_IFADCRCCALOUT_MASK 0x1UL

#define	_RAC_IFADCSTATUS_IFADCRCCALOUT_SHIFT 0

#define	_RAC_IFADCSTATUS_MASK 0x00000001UL

#define	_RAC_IFADCSTATUS_RESETVALUE 0x00000000UL

#define	_RAC_IFADCTRIM_IFADCCLKSEL_clk_2p4g 0x00000000UL

#define	_RAC_IFADCTRIM_IFADCCLKSEL_clk_subg 0x00000001UL

#define	_RAC_IFADCTRIM_IFADCCLKSEL_DEFAULT 0x00000000UL

#define	_RAC_IFADCTRIM_IFADCCLKSEL_MASK 0x1UL

#define	_RAC_IFADCTRIM_IFADCCLKSEL_SHIFT 0

#define	_RAC_IFADCTRIM_IFADCENHALFMODE_DEFAULT 0x00000000UL

#define	_RAC_IFADCTRIM_IFADCENHALFMODE_full_speed_mode 0x00000000UL

#define	_RAC_IFADCTRIM_IFADCENHALFMODE_half_speed_mode 0x00000001UL

#define	_RAC_IFADCTRIM_IFADCENHALFMODE_MASK 0x2UL

#define	_RAC_IFADCTRIM_IFADCENHALFMODE_SHIFT 1

#define	_RAC_IFADCTRIM_IFADCLDOSERIESAMPLVL_DEFAULT 0x00000004UL

#define	_RAC_IFADCTRIM_IFADCLDOSERIESAMPLVL_MASK 0x1CUL

#define	_RAC_IFADCTRIM_IFADCLDOSERIESAMPLVL_SHIFT 2

#define	_RAC_IFADCTRIM_IFADCLDOSERIESAMPLVL_v1p20 0x00000000UL

#define	_RAC_IFADCTRIM_IFADCLDOSERIESAMPLVL_v1p24 0x00000001UL

#define	_RAC_IFADCTRIM_IFADCLDOSERIESAMPLVL_v1p28 0x00000002UL

#define	_RAC_IFADCTRIM_IFADCLDOSERIESAMPLVL_v1p32 0x00000003UL

#define	_RAC_IFADCTRIM_IFADCLDOSERIESAMPLVL_v1p35 0x00000004UL

#define	_RAC_IFADCTRIM_IFADCLDOSERIESAMPLVL_v1p39 0x00000005UL

#define	_RAC_IFADCTRIM_IFADCLDOSERIESAMPLVL_v1p42 0x00000006UL

#define	_RAC_IFADCTRIM_IFADCLDOSERIESAMPLVL_v1p46 0x00000007UL

#define	_RAC_IFADCTRIM_IFADCLDOSHUNTAMPLVL_DEFAULT 0x00000004UL

#define	_RAC_IFADCTRIM_IFADCLDOSHUNTAMPLVL_MASK 0xE0UL

#define	_RAC_IFADCTRIM_IFADCLDOSHUNTAMPLVL_SHIFT 5

#define	_RAC_IFADCTRIM_IFADCLDOSHUNTAMPLVL_v1p20 0x00000000UL

#define	_RAC_IFADCTRIM_IFADCLDOSHUNTAMPLVL_v1p24 0x00000001UL

#define	_RAC_IFADCTRIM_IFADCLDOSHUNTAMPLVL_v1p28 0x00000002UL

#define	_RAC_IFADCTRIM_IFADCLDOSHUNTAMPLVL_v1p32 0x00000003UL

#define	_RAC_IFADCTRIM_IFADCLDOSHUNTAMPLVL_v1p35 0x00000004UL

#define	_RAC_IFADCTRIM_IFADCLDOSHUNTAMPLVL_v1p39 0x00000005UL

#define	_RAC_IFADCTRIM_IFADCLDOSHUNTAMPLVL_v1p42 0x00000006UL

#define	_RAC_IFADCTRIM_IFADCLDOSHUNTAMPLVL_v1p46 0x00000007UL

#define	_RAC_IFADCTRIM_IFADCLDOSHUNTCURLP_DEFAULT 0x00000000UL

#define	_RAC_IFADCTRIM_IFADCLDOSHUNTCURLP_low_power_disabled 0x00000000UL

#define	_RAC_IFADCTRIM_IFADCLDOSHUNTCURLP_low_power_enabled 0x00000001UL

#define	_RAC_IFADCTRIM_IFADCLDOSHUNTCURLP_MASK 0x100UL

#define	_RAC_IFADCTRIM_IFADCLDOSHUNTCURLP_SHIFT 8

#define	_RAC_IFADCTRIM_IFADCLDOSHUNTCURLVL_current_180uA 0x00000000UL

#define	_RAC_IFADCTRIM_IFADCLDOSHUNTCURLVL_current_190uA 0x00000001UL

#define	_RAC_IFADCTRIM_IFADCLDOSHUNTCURLVL_current_200uA 0x00000002UL

#define	_RAC_IFADCTRIM_IFADCLDOSHUNTCURLVL_current_210uA 0x00000003UL

#define	_RAC_IFADCTRIM_IFADCLDOSHUNTCURLVL_DEFAULT 0x00000001UL

#define	_RAC_IFADCTRIM_IFADCLDOSHUNTCURLVL_MASK 0x600UL

#define	_RAC_IFADCTRIM_IFADCLDOSHUNTCURLVL_SHIFT 9

#define	_RAC_IFADCTRIM_IFADCOTAST1CURRENT_DEFAULT 0x00000002UL

#define	_RAC_IFADCTRIM_IFADCOTAST1CURRENT_MASK 0x1800UL

#define	_RAC_IFADCTRIM_IFADCOTAST1CURRENT_negative_11p 0x00000001UL

#define	_RAC_IFADCTRIM_IFADCOTAST1CURRENT_negative_20p 0x00000000UL

#define	_RAC_IFADCTRIM_IFADCOTAST1CURRENT_nominal 0x00000002UL

#define	_RAC_IFADCTRIM_IFADCOTAST1CURRENT_positive_15p 0x00000003UL

#define	_RAC_IFADCTRIM_IFADCOTAST1CURRENT_SHIFT 11

#define	_RAC_IFADCTRIM_IFADCOTAST2CURRENT_DEFAULT 0x00000002UL

#define	_RAC_IFADCTRIM_IFADCOTAST2CURRENT_MASK 0x6000UL

#define	_RAC_IFADCTRIM_IFADCOTAST2CURRENT_negative_11p 0x00000001UL

#define	_RAC_IFADCTRIM_IFADCOTAST2CURRENT_negative_20p 0x00000000UL

#define	_RAC_IFADCTRIM_IFADCOTAST2CURRENT_nominal 0x00000002UL

#define	_RAC_IFADCTRIM_IFADCOTAST2CURRENT_positive_15p 0x00000003UL

#define	_RAC_IFADCTRIM_IFADCOTAST2CURRENT_SHIFT 13

#define	_RAC_IFADCTRIM_IFADCREFBUFAMPLVL_DEFAULT 0x00000004UL

#define	_RAC_IFADCTRIM_IFADCREFBUFAMPLVL_MASK 0x38000UL

#define	_RAC_IFADCTRIM_IFADCREFBUFAMPLVL_SHIFT 15

#define	_RAC_IFADCTRIM_IFADCREFBUFAMPLVL_v0p88 0x00000000UL

#define	_RAC_IFADCTRIM_IFADCREFBUFAMPLVL_v0p91 0x00000001UL

#define	_RAC_IFADCTRIM_IFADCREFBUFAMPLVL_v0p94 0x00000002UL

#define	_RAC_IFADCTRIM_IFADCREFBUFAMPLVL_v0p97 0x00000003UL

#define	_RAC_IFADCTRIM_IFADCREFBUFAMPLVL_v1p00 0x00000004UL

#define	_RAC_IFADCTRIM_IFADCREFBUFAMPLVL_v1p03 0x00000005UL

#define	_RAC_IFADCTRIM_IFADCREFBUFAMPLVL_v1p06 0x00000006UL

#define	_RAC_IFADCTRIM_IFADCREFBUFAMPLVL_v1p09 0x00000007UL

#define	_RAC_IFADCTRIM_IFADCREFBUFCURLVL_current_65uA 0x00000000UL

#define	_RAC_IFADCTRIM_IFADCREFBUFCURLVL_current_75uA 0x00000001UL

#define	_RAC_IFADCTRIM_IFADCREFBUFCURLVL_current_85uA 0x00000002UL

#define	_RAC_IFADCTRIM_IFADCREFBUFCURLVL_current_95uA 0x00000003UL

#define	_RAC_IFADCTRIM_IFADCREFBUFCURLVL_DEFAULT 0x00000001UL

#define	_RAC_IFADCTRIM_IFADCREFBUFCURLVL_MASK 0xC0000UL

#define	_RAC_IFADCTRIM_IFADCREFBUFCURLVL_SHIFT 18

#define	_RAC_IFADCTRIM_IFADCSIDETONEAMP_DEFAULT 0x00000001UL

#define	_RAC_IFADCTRIM_IFADCSIDETONEAMP_diff_pk_100mV 0x00000003UL

#define	_RAC_IFADCTRIM_IFADCSIDETONEAMP_diff_pk_10mV 0x00000000UL

#define	_RAC_IFADCTRIM_IFADCSIDETONEAMP_diff_pk_20mV 0x00000001UL

#define	_RAC_IFADCTRIM_IFADCSIDETONEAMP_diff_pk_50mV 0x00000002UL

#define	_RAC_IFADCTRIM_IFADCSIDETONEAMP_MASK 0x300000UL

#define	_RAC_IFADCTRIM_IFADCSIDETONEAMP_SHIFT 20

#define	_RAC_IFADCTRIM_IFADCSIDETONEFREQ_DEFAULT 0x00000002UL

#define	_RAC_IFADCTRIM_IFADCSIDETONEFREQ_div_128 0x00000001UL

#define	_RAC_IFADCTRIM_IFADCSIDETONEFREQ_div_16 0x00000004UL

#define	_RAC_IFADCTRIM_IFADCSIDETONEFREQ_div_32 0x00000003UL

#define	_RAC_IFADCTRIM_IFADCSIDETONEFREQ_div_4 0x00000006UL

#define	_RAC_IFADCTRIM_IFADCSIDETONEFREQ_div_64 0x00000002UL

#define	_RAC_IFADCTRIM_IFADCSIDETONEFREQ_div_8 0x00000005UL

#define	_RAC_IFADCTRIM_IFADCSIDETONEFREQ_MASK 0x1C00000UL

#define	_RAC_IFADCTRIM_IFADCSIDETONEFREQ_na0 0x00000000UL

#define	_RAC_IFADCTRIM_IFADCSIDETONEFREQ_na7 0x00000007UL

#define	_RAC_IFADCTRIM_IFADCSIDETONEFREQ_SHIFT 22

#define	_RAC_IFADCTRIM_IFADCTUNEZERO_DEFAULT 0x00000000UL

#define	_RAC_IFADCTRIM_IFADCTUNEZERO_half_freq_zero 0x00000001UL

#define	_RAC_IFADCTRIM_IFADCTUNEZERO_MASK 0x2000000UL

#define	_RAC_IFADCTRIM_IFADCTUNEZERO_nominal_zero 0x00000000UL

#define	_RAC_IFADCTRIM_IFADCTUNEZERO_SHIFT 25

#define	_RAC_IFADCTRIM_IFADCVCMLVL_DEFAULT 0x00000002UL

#define	_RAC_IFADCTRIM_IFADCVCMLVL_MASK 0xC000000UL

#define	_RAC_IFADCTRIM_IFADCVCMLVL_ratio_0p48 0x00000000UL

#define	_RAC_IFADCTRIM_IFADCVCMLVL_ratio_0p49 0x00000001UL

#define	_RAC_IFADCTRIM_IFADCVCMLVL_ratio_0p5 0x00000002UL

#define	_RAC_IFADCTRIM_IFADCVCMLVL_ratio_0p52 0x00000003UL

#define	_RAC_IFADCTRIM_IFADCVCMLVL_SHIFT 26

#define	_RAC_IFADCTRIM_MASK 0x0FFFFFFFUL

#define	_RAC_IFADCTRIM_RESETVALUE 0x08965290UL

#define	_RAC_IFPGACTRL_DCCALDCGEAR_DEFAULT 0x00000000UL

#define	_RAC_IFPGACTRL_DCCALDCGEAR_MASK 0xE000000UL

#define	_RAC_IFPGACTRL_DCCALDCGEAR_SHIFT 25

#define	_RAC_IFPGACTRL_DCCALDEC0_DEFAULT 0x00000000UL

#define	_RAC_IFPGACTRL_DCCALDEC0_DF3 0x00000000UL

#define	_RAC_IFPGACTRL_DCCALDEC0_DF4NARROW 0x00000002UL

#define	_RAC_IFPGACTRL_DCCALDEC0_DF4WIDE 0x00000001UL

#define	_RAC_IFPGACTRL_DCCALDEC0_DF8NARROW 0x00000004UL

#define	_RAC_IFPGACTRL_DCCALDEC0_DF8WIDE 0x00000003UL

#define	_RAC_IFPGACTRL_DCCALDEC0_MASK 0x1C00000UL

#define	_RAC_IFPGACTRL_DCCALDEC0_SHIFT 22

#define	_RAC_IFPGACTRL_DCCALON_DEFAULT 0x00000000UL

#define	_RAC_IFPGACTRL_DCCALON_DISABLE 0x00000000UL

#define	_RAC_IFPGACTRL_DCCALON_ENABLE 0x00000001UL

#define	_RAC_IFPGACTRL_DCCALON_MASK 0x80000UL

#define	_RAC_IFPGACTRL_DCCALON_SHIFT 19

#define	_RAC_IFPGACTRL_DCESTIEN_DEFAULT 0x00000000UL

#define	_RAC_IFPGACTRL_DCESTIEN_DISABLE 0x00000000UL

#define	_RAC_IFPGACTRL_DCESTIEN_ENABLE 0x00000001UL

#define	_RAC_IFPGACTRL_DCESTIEN_MASK 0x200000UL

#define	_RAC_IFPGACTRL_DCESTIEN_SHIFT 21

#define	_RAC_IFPGACTRL_DCRSTEN_DEFAULT 0x00000000UL

#define	_RAC_IFPGACTRL_DCRSTEN_DISABLE 0x00000000UL

#define	_RAC_IFPGACTRL_DCRSTEN_ENABLE 0x00000001UL

#define	_RAC_IFPGACTRL_DCRSTEN_MASK 0x100000UL

#define	_RAC_IFPGACTRL_DCRSTEN_SHIFT 20

#define	_RAC_IFPGACTRL_MASK 0x0FF80000UL

#define	_RAC_IFPGACTRL_RESETVALUE 0x00000000UL

#define	_RAC_IPVERSION_IPVERSION_DEFAULT 0x00000000UL

#define	_RAC_IPVERSION_IPVERSION_MASK 0xFFFFFFFFUL

#define	_RAC_IPVERSION_IPVERSION_SHIFT 0

#define	_RAC_IPVERSION_MASK 0xFFFFFFFFUL

#define	_RAC_IPVERSION_RESETVALUE 0x00000000UL

#define	_RAC_LNAMIXCAL_LNAMIXCALEN_cal_disable 0x00000000UL

#define	_RAC_LNAMIXCAL_LNAMIXCALEN_cal_enable 0x00000001UL

#define	_RAC_LNAMIXCAL_LNAMIXCALEN_DEFAULT 0x00000000UL

#define	_RAC_LNAMIXCAL_LNAMIXCALEN_MASK 0x1UL

#define	_RAC_LNAMIXCAL_LNAMIXCALEN_SHIFT 0

#define	_RAC_LNAMIXCAL_LNAMIXCALVMODE_current_mode 0x00000000UL

#define	_RAC_LNAMIXCAL_LNAMIXCALVMODE_DEFAULT 0x00000000UL

#define	_RAC_LNAMIXCAL_LNAMIXCALVMODE_MASK 0x2UL

#define	_RAC_LNAMIXCAL_LNAMIXCALVMODE_SHIFT 1

#define	_RAC_LNAMIXCAL_LNAMIXCALVMODE_voltage_mode 0x00000001UL

#define	_RAC_LNAMIXCAL_LNAMIXENIRCAL1_DEFAULT 0x00000000UL

#define	_RAC_LNAMIXCAL_LNAMIXENIRCAL1_disable 0x00000000UL

#define	_RAC_LNAMIXCAL_LNAMIXENIRCAL1_enable 0x00000001UL

#define	_RAC_LNAMIXCAL_LNAMIXENIRCAL1_MASK 0x4UL

#define	_RAC_LNAMIXCAL_LNAMIXENIRCAL1_SHIFT 2

#define	_RAC_LNAMIXCAL_LNAMIXENIRCAL2_DEFAULT 0x00000000UL

#define	_RAC_LNAMIXCAL_LNAMIXENIRCAL2_disable 0x00000000UL

#define	_RAC_LNAMIXCAL_LNAMIXENIRCAL2_enable 0x00000001UL

#define	_RAC_LNAMIXCAL_LNAMIXENIRCAL2_MASK 0x8UL

#define	_RAC_LNAMIXCAL_LNAMIXENIRCAL2_SHIFT 3

#define	_RAC_LNAMIXCAL_LNAMIXIRCAL1AMP_DEFAULT 0x00000007UL

#define	_RAC_LNAMIXCAL_LNAMIXIRCAL1AMP_MASK 0x70UL

#define	_RAC_LNAMIXCAL_LNAMIXIRCAL1AMP_SHIFT 4

#define	_RAC_LNAMIXCAL_LNAMIXIRCAL2AMP_DEFAULT 0x00000007UL

#define	_RAC_LNAMIXCAL_LNAMIXIRCAL2AMP_MASK 0x380UL

#define	_RAC_LNAMIXCAL_LNAMIXIRCAL2AMP_SHIFT 7

#define	_RAC_LNAMIXCAL_MASK 0x000003FFUL

#define	_RAC_LNAMIXCAL_RESETVALUE 0x000003F0UL

#define	_RAC_LNAMIXEN_LNAMIXENLDO_DEFAULT 0x00000000UL

#define	_RAC_LNAMIXEN_LNAMIXENLDO_disable 0x00000000UL

#define	_RAC_LNAMIXEN_LNAMIXENLDO_enable 0x00000001UL

#define	_RAC_LNAMIXEN_LNAMIXENLDO_MASK 0x1UL

#define	_RAC_LNAMIXEN_LNAMIXENLDO_SHIFT 0

#define	_RAC_LNAMIXEN_MASK 0x00000001UL

#define	_RAC_LNAMIXEN_RESETVALUE 0x00000000UL

#define	_RAC_LNAMIXTRIM0_LNAMIXCURCTRL_DEFAULT 0x0000003DUL

#define	_RAC_LNAMIXTRIM0_LNAMIXCURCTRL_MASK 0x3FUL

#define	_RAC_LNAMIXTRIM0_LNAMIXCURCTRL_SHIFT 0

#define	_RAC_LNAMIXTRIM0_LNAMIXHIGHCUR_current_470uA 0x00000000UL

#define	_RAC_LNAMIXTRIM0_LNAMIXHIGHCUR_current_530uA 0x00000001UL

#define	_RAC_LNAMIXTRIM0_LNAMIXHIGHCUR_current_590uA 0x00000003UL

#define	_RAC_LNAMIXTRIM0_LNAMIXHIGHCUR_DEFAULT 0x00000000UL

#define	_RAC_LNAMIXTRIM0_LNAMIXHIGHCUR_MASK 0xC0UL

#define	_RAC_LNAMIXTRIM0_LNAMIXHIGHCUR_SHIFT 6

#define	_RAC_LNAMIXTRIM0_LNAMIXHIGHCUR_unused 0x00000002UL

#define	_RAC_LNAMIXTRIM0_LNAMIXLOWCUR_current_60percent 0x00000003UL

#define	_RAC_LNAMIXTRIM0_LNAMIXLOWCUR_current_80percent 0x00000002UL

#define	_RAC_LNAMIXTRIM0_LNAMIXLOWCUR_current_nom 0x00000000UL

#define	_RAC_LNAMIXTRIM0_LNAMIXLOWCUR_DEFAULT 0x00000001UL

#define	_RAC_LNAMIXTRIM0_LNAMIXLOWCUR_MASK 0x300UL

#define	_RAC_LNAMIXTRIM0_LNAMIXLOWCUR_SHIFT 8

#define	_RAC_LNAMIXTRIM0_LNAMIXLOWCUR_unused 0x00000001UL

#define	_RAC_LNAMIXTRIM0_LNAMIXRFPKDBWSEL_DEFAULT 0x00000002UL

#define	_RAC_LNAMIXTRIM0_LNAMIXRFPKDBWSEL_MASK 0xC00UL

#define	_RAC_LNAMIXTRIM0_LNAMIXRFPKDBWSEL_SHIFT 10

#define	_RAC_LNAMIXTRIM0_LNAMIXRFPKDCALCM_DEFAULT 0x00000020UL

#define	_RAC_LNAMIXTRIM0_LNAMIXRFPKDCALCM_MASK 0x3F000UL

#define	_RAC_LNAMIXTRIM0_LNAMIXRFPKDCALCM_SHIFT 12

#define	_RAC_LNAMIXTRIM0_LNAMIXRFPKDCALDM_DEFAULT 0x00000010UL

#define	_RAC_LNAMIXTRIM0_LNAMIXRFPKDCALDM_MASK 0x7C0000UL

#define	_RAC_LNAMIXTRIM0_LNAMIXRFPKDCALDM_SHIFT 18

#define	_RAC_LNAMIXTRIM0_LNAMIXTRIMVREG_DEFAULT 0x00000008UL

#define	_RAC_LNAMIXTRIM0_LNAMIXTRIMVREG_MASK 0x7800000UL

#define	_RAC_LNAMIXTRIM0_LNAMIXTRIMVREG_SHIFT 23

#define	_RAC_LNAMIXTRIM0_MASK 0x07FFFFFFUL

#define	_RAC_LNAMIXTRIM0_RESETVALUE 0x0442093DUL

#define	_RAC_LNAMIXTRIM1_LNAMIXIBIAS1ADJ_DEFAULT 0x00000008UL

#define	_RAC_LNAMIXTRIM1_LNAMIXIBIAS1ADJ_MASK 0xFUL

#define	_RAC_LNAMIXTRIM1_LNAMIXIBIAS1ADJ_SHIFT 0

#define	_RAC_LNAMIXTRIM1_LNAMIXLNA1CAPSEL_DEFAULT 0x00000000UL

#define	_RAC_LNAMIXTRIM1_LNAMIXLNA1CAPSEL_MASK 0x70UL

#define	_RAC_LNAMIXTRIM1_LNAMIXLNA1CAPSEL_SHIFT 4

#define	_RAC_LNAMIXTRIM1_LNAMIXMXRBIAS1_bias_1V 0x00000000UL

#define	_RAC_LNAMIXTRIM1_LNAMIXMXRBIAS1_bias_800m 0x00000003UL

#define	_RAC_LNAMIXTRIM1_LNAMIXMXRBIAS1_bias_900m 0x00000002UL

#define	_RAC_LNAMIXTRIM1_LNAMIXMXRBIAS1_DEFAULT 0x00000002UL

#define	_RAC_LNAMIXTRIM1_LNAMIXMXRBIAS1_MASK 0x180UL

#define	_RAC_LNAMIXTRIM1_LNAMIXMXRBIAS1_SHIFT 7

#define	_RAC_LNAMIXTRIM1_LNAMIXMXRBIAS1_unused 0x00000001UL

#define	_RAC_LNAMIXTRIM1_LNAMIXNCAS1ADJ_DEFAULT 0x00000002UL

#define	_RAC_LNAMIXTRIM1_LNAMIXNCAS1ADJ_MASK 0x600UL

#define	_RAC_LNAMIXTRIM1_LNAMIXNCAS1ADJ_ncas_1V 0x00000000UL

#define	_RAC_LNAMIXTRIM1_LNAMIXNCAS1ADJ_ncas_900m 0x00000003UL

#define	_RAC_LNAMIXTRIM1_LNAMIXNCAS1ADJ_ncas_950m 0x00000002UL

#define	_RAC_LNAMIXTRIM1_LNAMIXNCAS1ADJ_SHIFT 9

#define	_RAC_LNAMIXTRIM1_LNAMIXNCAS1ADJ_unused 0x00000001UL

#define	_RAC_LNAMIXTRIM1_LNAMIXPCAS1ADJ_DEFAULT 0x00000002UL

#define	_RAC_LNAMIXTRIM1_LNAMIXPCAS1ADJ_MASK 0x1800UL

#define	_RAC_LNAMIXTRIM1_LNAMIXPCAS1ADJ_pcas_250m 0x00000000UL

#define	_RAC_LNAMIXTRIM1_LNAMIXPCAS1ADJ_pcas_300m 0x00000002UL

#define	_RAC_LNAMIXTRIM1_LNAMIXPCAS1ADJ_pcas_350m 0x00000003UL

#define	_RAC_LNAMIXTRIM1_LNAMIXPCAS1ADJ_SHIFT 11

#define	_RAC_LNAMIXTRIM1_LNAMIXPCAS1ADJ_unused 0x00000001UL

#define	_RAC_LNAMIXTRIM1_LNAMIXVOUT1ADJ_DEFAULT 0x00000008UL

#define	_RAC_LNAMIXTRIM1_LNAMIXVOUT1ADJ_MASK 0x1E000UL

#define	_RAC_LNAMIXTRIM1_LNAMIXVOUT1ADJ_SHIFT 13

#define	_RAC_LNAMIXTRIM1_MASK 0x0001FFFFUL

#define	_RAC_LNAMIXTRIM1_RESETVALUE 0x00011508UL

#define	_RAC_LNAMIXTRIM2_LNAMIXIBIAS2ADJ_DEFAULT 0x00000008UL

#define	_RAC_LNAMIXTRIM2_LNAMIXIBIAS2ADJ_MASK 0xFUL

#define	_RAC_LNAMIXTRIM2_LNAMIXIBIAS2ADJ_SHIFT 0

#define	_RAC_LNAMIXTRIM2_LNAMIXLNA2CAPSEL_DEFAULT 0x00000000UL

#define	_RAC_LNAMIXTRIM2_LNAMIXLNA2CAPSEL_MASK 0x70UL

#define	_RAC_LNAMIXTRIM2_LNAMIXLNA2CAPSEL_SHIFT 4

#define	_RAC_LNAMIXTRIM2_LNAMIXMXRBIAS2_bias_1V 0x00000000UL

#define	_RAC_LNAMIXTRIM2_LNAMIXMXRBIAS2_bias_800m 0x00000003UL

#define	_RAC_LNAMIXTRIM2_LNAMIXMXRBIAS2_bias_900m 0x00000002UL

#define	_RAC_LNAMIXTRIM2_LNAMIXMXRBIAS2_DEFAULT 0x00000002UL

#define	_RAC_LNAMIXTRIM2_LNAMIXMXRBIAS2_MASK 0x180UL

#define	_RAC_LNAMIXTRIM2_LNAMIXMXRBIAS2_SHIFT 7

#define	_RAC_LNAMIXTRIM2_LNAMIXMXRBIAS2_unused 0x00000001UL

#define	_RAC_LNAMIXTRIM2_LNAMIXNCAS2ADJ_DEFAULT 0x00000002UL

#define	_RAC_LNAMIXTRIM2_LNAMIXNCAS2ADJ_MASK 0x600UL

#define	_RAC_LNAMIXTRIM2_LNAMIXNCAS2ADJ_ncas_1V 0x00000000UL

#define	_RAC_LNAMIXTRIM2_LNAMIXNCAS2ADJ_ncas_900m 0x00000003UL

#define	_RAC_LNAMIXTRIM2_LNAMIXNCAS2ADJ_ncas_950m 0x00000002UL

#define	_RAC_LNAMIXTRIM2_LNAMIXNCAS2ADJ_SHIFT 9

#define	_RAC_LNAMIXTRIM2_LNAMIXNCAS2ADJ_unused 0x00000001UL

#define	_RAC_LNAMIXTRIM2_LNAMIXPCAS2ADJ_DEFAULT 0x00000002UL

#define	_RAC_LNAMIXTRIM2_LNAMIXPCAS2ADJ_MASK 0x1800UL

#define	_RAC_LNAMIXTRIM2_LNAMIXPCAS2ADJ_pcas_250m 0x00000000UL

#define	_RAC_LNAMIXTRIM2_LNAMIXPCAS2ADJ_pcas_300m 0x00000002UL

#define	_RAC_LNAMIXTRIM2_LNAMIXPCAS2ADJ_pcas_350m 0x00000003UL

#define	_RAC_LNAMIXTRIM2_LNAMIXPCAS2ADJ_SHIFT 11

#define	_RAC_LNAMIXTRIM2_LNAMIXPCAS2ADJ_unused 0x00000001UL

#define	_RAC_LNAMIXTRIM2_LNAMIXVOUT2ADJ_DEFAULT 0x00000008UL

#define	_RAC_LNAMIXTRIM2_LNAMIXVOUT2ADJ_MASK 0x1E000UL

#define	_RAC_LNAMIXTRIM2_LNAMIXVOUT2ADJ_SHIFT 13

#define	_RAC_LNAMIXTRIM2_MASK 0x0001FFFFUL

#define	_RAC_LNAMIXTRIM2_RESETVALUE 0x00011508UL

#define	_RAC_PACTRL_MASK 0x00FF07FFUL

#define	_RAC_PACTRL_PAEN10DBMVMID_DEFAULT 0x00000000UL

#define	_RAC_PACTRL_PAEN10DBMVMID_disable 0x00000000UL

#define	_RAC_PACTRL_PAEN10DBMVMID_enable 0x00000001UL

#define	_RAC_PACTRL_PAEN10DBMVMID_MASK 0x1UL

#define	_RAC_PACTRL_PAEN10DBMVMID_SHIFT 0

#define	_RAC_PACTRL_PAEN20DBMVMID_DEFAULT 0x00000000UL

#define	_RAC_PACTRL_PAEN20DBMVMID_disable 0x00000000UL

#define	_RAC_PACTRL_PAEN20DBMVMID_enable 0x00000001UL

#define	_RAC_PACTRL_PAEN20DBMVMID_MASK 0x2UL

#define	_RAC_PACTRL_PAEN20DBMVMID_SHIFT 1

#define	_RAC_PACTRL_PAENCAPATT_DEFAULT 0x00000000UL

#define	_RAC_PACTRL_PAENCAPATT_disable 0x00000000UL

#define	_RAC_PACTRL_PAENCAPATT_enable 0x00000001UL

#define	_RAC_PACTRL_PAENCAPATT_MASK 0x4UL

#define	_RAC_PACTRL_PAENCAPATT_SHIFT 2

#define	_RAC_PACTRL_PAENLATCHBYPASS_DEFAULT 0x00000000UL

#define	_RAC_PACTRL_PAENLATCHBYPASS_disable 0x00000000UL

#define	_RAC_PACTRL_PAENLATCHBYPASS_enable 0x00000001UL

#define	_RAC_PACTRL_PAENLATCHBYPASS_MASK 0x8UL

#define	_RAC_PACTRL_PAENLATCHBYPASS_SHIFT 3

#define	_RAC_PACTRL_PAENPOWERRAMPINGCLK_DEFAULT 0x00000000UL

#define	_RAC_PACTRL_PAENPOWERRAMPINGCLK_en_clk 0x00000001UL

#define	_RAC_PACTRL_PAENPOWERRAMPINGCLK_MASK 0x10UL

#define	_RAC_PACTRL_PAENPOWERRAMPINGCLK_SHIFT 4

#define	_RAC_PACTRL_PAENPOWERRAMPINGCLK_silence_clk 0x00000000UL

#define	_RAC_PACTRL_PAPOWER_DEFAULT 0x00000000UL

#define	_RAC_PACTRL_PAPOWER_MASK 0xF0000UL

#define	_RAC_PACTRL_PAPOWER_SHIFT 16

#define	_RAC_PACTRL_PAPOWER_t0stripeon 0x00000000UL

#define	_RAC_PACTRL_PAPOWER_t10stripeon 0x0000000AUL

#define	_RAC_PACTRL_PAPOWER_t11stripeon 0x0000000BUL

#define	_RAC_PACTRL_PAPOWER_t12stripeon 0x0000000CUL

#define	_RAC_PACTRL_PAPOWER_t13stripeon 0x0000000DUL

#define	_RAC_PACTRL_PAPOWER_t14stripeon 0x0000000EUL

#define	_RAC_PACTRL_PAPOWER_t15stripeon 0x0000000FUL

#define	_RAC_PACTRL_PAPOWER_t1stripeon 0x00000001UL

#define	_RAC_PACTRL_PAPOWER_t2stripeon 0x00000002UL

#define	_RAC_PACTRL_PAPOWER_t3stripeon 0x00000003UL

#define	_RAC_PACTRL_PAPOWER_t4stripeon 0x00000004UL

#define	_RAC_PACTRL_PAPOWER_t5stripeon 0x00000005UL

#define	_RAC_PACTRL_PAPOWER_t6stripeon 0x00000006UL

#define	_RAC_PACTRL_PAPOWER_t7stripeon 0x00000007UL

#define	_RAC_PACTRL_PAPOWER_t8stripeon 0x00000008UL

#define	_RAC_PACTRL_PAPOWER_t9stripeon 0x00000009UL

#define	_RAC_PACTRL_PAPULLDOWNVDDPA_DEFAULT 0x00000000UL

#define	_RAC_PACTRL_PAPULLDOWNVDDPA_MASK 0x20UL

#define	_RAC_PACTRL_PAPULLDOWNVDDPA_not_pull_down 0x00000000UL

#define	_RAC_PACTRL_PAPULLDOWNVDDPA_pull_down_vddpa 0x00000001UL

#define	_RAC_PACTRL_PAPULLDOWNVDDPA_SHIFT 5

#define	_RAC_PACTRL_PAREGBYPASSPDRVLDO_bypass 0x00000001UL

#define	_RAC_PACTRL_PAREGBYPASSPDRVLDO_DEFAULT 0x00000000UL

#define	_RAC_PACTRL_PAREGBYPASSPDRVLDO_MASK 0x40UL

#define	_RAC_PACTRL_PAREGBYPASSPDRVLDO_not_bypass 0x00000000UL

#define	_RAC_PACTRL_PAREGBYPASSPDRVLDO_SHIFT 6

#define	_RAC_PACTRL_PAREGBYPASSPREREG_bypass 0x00000001UL

#define	_RAC_PACTRL_PAREGBYPASSPREREG_DEFAULT 0x00000000UL

#define	_RAC_PACTRL_PAREGBYPASSPREREG_MASK 0x80UL

#define	_RAC_PACTRL_PAREGBYPASSPREREG_not_bypass 0x00000000UL

#define	_RAC_PACTRL_PAREGBYPASSPREREG_SHIFT 7

#define	_RAC_PACTRL_PASELLDOVDDPA_DEFAULT 0x00000000UL

#define	_RAC_PACTRL_PASELLDOVDDPA_MASK 0x100UL

#define	_RAC_PACTRL_PASELLDOVDDPA_not_selected 0x00000000UL

#define	_RAC_PACTRL_PASELLDOVDDPA_selected 0x00000001UL

#define	_RAC_PACTRL_PASELLDOVDDPA_SHIFT 8

#define	_RAC_PACTRL_PASELLDOVDDRF_DEFAULT 0x00000000UL

#define	_RAC_PACTRL_PASELLDOVDDRF_MASK 0x200UL

#define	_RAC_PACTRL_PASELLDOVDDRF_not_selected 0x00000000UL

#define	_RAC_PACTRL_PASELLDOVDDRF_selected 0x00000001UL

#define	_RAC_PACTRL_PASELLDOVDDRF_SHIFT 9

#define	_RAC_PACTRL_PASELSLICE_DEFAULT 0x00000000UL

#define	_RAC_PACTRL_PASELSLICE_MASK 0xF00000UL

#define	_RAC_PACTRL_PASELSLICE_SHIFT 20

#define	_RAC_PACTRL_PASLICERST_DEFAULT 0x00000000UL

#define	_RAC_PACTRL_PASLICERST_disable 0x00000000UL

#define	_RAC_PACTRL_PASLICERST_enable 0x00000001UL

#define	_RAC_PACTRL_PASLICERST_MASK 0x400UL

#define	_RAC_PACTRL_PASLICERST_SHIFT 10

#define	_RAC_PACTRL_RESETVALUE 0x00000000UL

#define	_RAC_PAENCTRL_MASK 0x00000100UL

#define	_RAC_PAENCTRL_PARAMP_DEFAULT 0x00000000UL

#define	_RAC_PAENCTRL_PARAMP_MASK 0x100UL

#define	_RAC_PAENCTRL_PARAMP_SHIFT 8

#define	_RAC_PAENCTRL_RESETVALUE 0x00000000UL

#define	_RAC_PATRIM0_MASK 0x3FFFFFFFUL

#define	_RAC_PATRIM0_PATRIMDRVREGIBCORE0DBM_DEFAULT 0x00000003UL

#define	_RAC_PATRIM0_PATRIMDRVREGIBCORE0DBM_i_4u 0x00000000UL

#define	_RAC_PATRIM0_PATRIMDRVREGIBCORE0DBM_i_5u 0x00000001UL

#define	_RAC_PATRIM0_PATRIMDRVREGIBCORE0DBM_i_6u 0x00000002UL

#define	_RAC_PATRIM0_PATRIMDRVREGIBCORE0DBM_i_7u 0x00000003UL

#define	_RAC_PATRIM0_PATRIMDRVREGIBCORE0DBM_MASK 0x3UL

#define	_RAC_PATRIM0_PATRIMDRVREGIBCORE0DBM_SHIFT 0

#define	_RAC_PATRIM0_PATRIMDRVREGIBNDIO0DBM_DEFAULT 0x00000004UL

#define	_RAC_PATRIM0_PATRIMDRVREGIBNDIO0DBM_MASK 0x3CUL

#define	_RAC_PATRIM0_PATRIMDRVREGIBNDIO0DBM_NA_10 0x0000000AUL

#define	_RAC_PATRIM0_PATRIMDRVREGIBNDIO0DBM_NA_11 0x0000000BUL

#define	_RAC_PATRIM0_PATRIMDRVREGIBNDIO0DBM_NA_12 0x0000000CUL

#define	_RAC_PATRIM0_PATRIMDRVREGIBNDIO0DBM_NA_13 0x0000000DUL

#define	_RAC_PATRIM0_PATRIMDRVREGIBNDIO0DBM_NA_14 0x0000000EUL

#define	_RAC_PATRIM0_PATRIMDRVREGIBNDIO0DBM_NA_15 0x0000000FUL

#define	_RAC_PATRIM0_PATRIMDRVREGIBNDIO0DBM_SHIFT 2

#define	_RAC_PATRIM0_PATRIMDRVREGIBNDIO0DBM_vreg_1p09 0x00000000UL

#define	_RAC_PATRIM0_PATRIMDRVREGIBNDIO0DBM_vreg_1p13 0x00000001UL

#define	_RAC_PATRIM0_PATRIMDRVREGIBNDIO0DBM_vreg_1p16 0x00000002UL

#define	_RAC_PATRIM0_PATRIMDRVREGIBNDIO0DBM_vreg_1p20 0x00000003UL

#define	_RAC_PATRIM0_PATRIMDRVREGIBNDIO0DBM_vreg_1p23 0x00000004UL

#define	_RAC_PATRIM0_PATRIMDRVREGIBNDIO0DBM_vreg_1p25 0x00000005UL

#define	_RAC_PATRIM0_PATRIMDRVREGIBNDIO0DBM_vreg_1p28 0x00000006UL

#define	_RAC_PATRIM0_PATRIMDRVREGIBNDIO0DBM_vreg_1p31 0x00000007UL

#define	_RAC_PATRIM0_PATRIMDRVREGIBNDIO0DBM_vreg_1p33 0x00000008UL

#define	_RAC_PATRIM0_PATRIMDRVREGIBNDIO0DBM_vreg_1p36 0x00000009UL

#define	_RAC_PATRIM0_PATRIMDRVREGPSR0DBM_DEFAULT 0x00000000UL

#define	_RAC_PATRIM0_PATRIMDRVREGPSR0DBM_disable 0x00000000UL

#define	_RAC_PATRIM0_PATRIMDRVREGPSR0DBM_enable 0x00000001UL

#define	_RAC_PATRIM0_PATRIMDRVREGPSR0DBM_MASK 0x40UL

#define	_RAC_PATRIM0_PATRIMDRVREGPSR0DBM_SHIFT 6

#define	_RAC_PATRIM0_PATRIMDRVSLICE0DBM_DEFAULT 0x00000003UL

#define	_RAC_PATRIM0_PATRIMDRVSLICE0DBM_MASK 0x180UL

#define	_RAC_PATRIM0_PATRIMDRVSLICE0DBM_on_0_slice 0x00000000UL

#define	_RAC_PATRIM0_PATRIMDRVSLICE0DBM_on_1_slice 0x00000001UL

#define	_RAC_PATRIM0_PATRIMDRVSLICE0DBM_on_2_slice 0x00000002UL

#define	_RAC_PATRIM0_PATRIMDRVSLICE0DBM_on_3_slice 0x00000003UL

#define	_RAC_PATRIM0_PATRIMDRVSLICE0DBM_SHIFT 7

#define	_RAC_PATRIM0_PATRIMFB0DBM_DEFAULT 0x00000006UL

#define	_RAC_PATRIM0_PATRIMFB0DBM_MASK 0x1E00UL

#define	_RAC_PATRIM0_PATRIMFB0DBM_SHIFT 9

#define	_RAC_PATRIM0_PATRIMFB0DBM_vo_vi_0p475 0x00000000UL

#define	_RAC_PATRIM0_PATRIMFB0DBM_vo_vi_0p500 0x00000001UL

#define	_RAC_PATRIM0_PATRIMFB0DBM_vo_vi_0p525 0x00000002UL

#define	_RAC_PATRIM0_PATRIMFB0DBM_vo_vi_0p550 0x00000003UL

#define	_RAC_PATRIM0_PATRIMFB0DBM_vo_vi_0p575 0x00000004UL

#define	_RAC_PATRIM0_PATRIMFB0DBM_vo_vi_0p600 0x00000005UL

#define	_RAC_PATRIM0_PATRIMFB0DBM_vo_vi_0p625 0x00000006UL

#define	_RAC_PATRIM0_PATRIMFB0DBM_vo_vi_0p650 0x00000007UL

#define	_RAC_PATRIM0_PATRIMFB0DBM_vo_vi_0p675 0x00000008UL

#define	_RAC_PATRIM0_PATRIMFB0DBM_vo_vi_0p700 0x00000009UL

#define	_RAC_PATRIM0_PATRIMFB0DBM_vo_vi_0p725 0x0000000AUL

#define	_RAC_PATRIM0_PATRIMFB0DBM_vo_vi_0p750 0x0000000BUL

#define	_RAC_PATRIM0_PATRIMFB0DBM_vo_vi_0p775 0x0000000CUL

#define	_RAC_PATRIM0_PATRIMFB0DBM_vo_vi_0p80 0x0000000DUL

#define	_RAC_PATRIM0_PATRIMFB0DBM_vo_vi_0p825 0x0000000EUL

#define	_RAC_PATRIM0_PATRIMFB0DBM_vo_vi_0p85 0x0000000FUL

#define	_RAC_PATRIM0_PATRIMPABIASN0DBM_DEFAULT 0x00000004UL

#define	_RAC_PATRIM0_PATRIMPABIASN0DBM_MASK 0x1E000UL

#define	_RAC_PATRIM0_PATRIMPABIASN0DBM_SHIFT 13

#define	_RAC_PATRIM0_PATRIMPABIASN0DBM_v_450m 0x00000000UL

#define	_RAC_PATRIM0_PATRIMPABIASN0DBM_v_462p5m 0x00000001UL

#define	_RAC_PATRIM0_PATRIMPABIASN0DBM_v_475m 0x00000002UL

#define	_RAC_PATRIM0_PATRIMPABIASN0DBM_v_487p5m 0x00000003UL

#define	_RAC_PATRIM0_PATRIMPABIASN0DBM_v_500m 0x00000004UL

#define	_RAC_PATRIM0_PATRIMPABIASN0DBM_v_512p5m 0x00000005UL

#define	_RAC_PATRIM0_PATRIMPABIASN0DBM_v_525m 0x00000006UL

#define	_RAC_PATRIM0_PATRIMPABIASN0DBM_v_537p5m 0x00000007UL

#define	_RAC_PATRIM0_PATRIMPABIASN0DBM_v_550m 0x00000008UL

#define	_RAC_PATRIM0_PATRIMPABIASN0DBM_v_562p5m 0x00000009UL

#define	_RAC_PATRIM0_PATRIMPABIASN0DBM_v_575m 0x0000000AUL

#define	_RAC_PATRIM0_PATRIMPABIASN0DBM_v_587p5m 0x0000000BUL

#define	_RAC_PATRIM0_PATRIMPABIASN0DBM_v_600m 0x0000000CUL

#define	_RAC_PATRIM0_PATRIMPABIASN0DBM_v_612p5m 0x0000000DUL

#define	_RAC_PATRIM0_PATRIMPABIASN0DBM_v_625m 0x0000000EUL

#define	_RAC_PATRIM0_PATRIMPABIASN0DBM_v_637p5m 0x0000000FUL

#define	_RAC_PATRIM0_PATRIMPABIASP0DBM_DEFAULT 0x00000004UL

#define	_RAC_PATRIM0_PATRIMPABIASP0DBM_MASK 0x1E0000UL

#define	_RAC_PATRIM0_PATRIMPABIASP0DBM_SHIFT 17

#define	_RAC_PATRIM0_PATRIMPABIASP0DBM_v_450m 0x00000000UL

#define	_RAC_PATRIM0_PATRIMPABIASP0DBM_v_462p5m 0x00000001UL

#define	_RAC_PATRIM0_PATRIMPABIASP0DBM_v_475m 0x00000002UL

#define	_RAC_PATRIM0_PATRIMPABIASP0DBM_v_487p5m 0x00000003UL

#define	_RAC_PATRIM0_PATRIMPABIASP0DBM_v_500m 0x00000004UL

#define	_RAC_PATRIM0_PATRIMPABIASP0DBM_v_512p5m 0x00000005UL

#define	_RAC_PATRIM0_PATRIMPABIASP0DBM_v_525m 0x00000006UL

#define	_RAC_PATRIM0_PATRIMPABIASP0DBM_v_537p5m 0x00000007UL

#define	_RAC_PATRIM0_PATRIMPABIASP0DBM_v_550m 0x00000008UL

#define	_RAC_PATRIM0_PATRIMPABIASP0DBM_v_562p5m 0x00000009UL

#define	_RAC_PATRIM0_PATRIMPABIASP0DBM_v_575m 0x0000000AUL

#define	_RAC_PATRIM0_PATRIMPABIASP0DBM_v_587p5m 0x0000000BUL

#define	_RAC_PATRIM0_PATRIMPABIASP0DBM_v_600m 0x0000000CUL

#define	_RAC_PATRIM0_PATRIMPABIASP0DBM_v_612p5m 0x0000000DUL

#define	_RAC_PATRIM0_PATRIMPABIASP0DBM_v_625m 0x0000000EUL

#define	_RAC_PATRIM0_PATRIMPABIASP0DBM_v_637p5m 0x0000000FUL

#define	_RAC_PATRIM0_PATRIMPASLICE0DBM_DEFAULT 0x00000000UL

#define	_RAC_PATRIM0_PATRIMPASLICE0DBM_MASK 0x7E00000UL

#define	_RAC_PATRIM0_PATRIMPASLICE0DBM_on_slice_0 0x00000000UL

#define	_RAC_PATRIM0_PATRIMPASLICE0DBM_on_slice_63 0x0000003FUL

#define	_RAC_PATRIM0_PATRIMPASLICE0DBM_SHIFT 21

#define	_RAC_PATRIM0_PATRIMVREF0DBM_DEFAULT 0x00000004UL

#define	_RAC_PATRIM0_PATRIMVREF0DBM_MASK 0x38000000UL

#define	_RAC_PATRIM0_PATRIMVREF0DBM_SHIFT 27

#define	_RAC_PATRIM0_PATRIMVREF0DBM_v_900m 0x00000000UL

#define	_RAC_PATRIM0_PATRIMVREF0DBM_v_912p5m 0x00000001UL

#define	_RAC_PATRIM0_PATRIMVREF0DBM_v_925m 0x00000002UL

#define	_RAC_PATRIM0_PATRIMVREF0DBM_v_937p5m 0x00000003UL

#define	_RAC_PATRIM0_PATRIMVREF0DBM_v_950m 0x00000004UL

#define	_RAC_PATRIM0_PATRIMVREF0DBM_v_962p5m 0x00000005UL

#define	_RAC_PATRIM0_PATRIMVREF0DBM_v_975m 0x00000006UL

#define	_RAC_PATRIM0_PATRIMVREF0DBM_v_987p5m 0x00000007UL

#define	_RAC_PATRIM0_RESETVALUE 0x20088D93UL

#define	_RAC_PATRIM1_MASK 0x7FFFFFFFUL

#define	_RAC_PATRIM1_PATRIM10DBMDUTYCYN_DEFAULT 0x00000000UL

#define	_RAC_PATRIM1_PATRIM10DBMDUTYCYN_MASK 0x7UL

#define	_RAC_PATRIM1_PATRIM10DBMDUTYCYN_na 0x00000007UL

#define	_RAC_PATRIM1_PATRIM10DBMDUTYCYN_SHIFT 0

#define	_RAC_PATRIM1_PATRIM10DBMDUTYCYN_up_0pct 0x00000000UL

#define	_RAC_PATRIM1_PATRIM10DBMDUTYCYN_up_1pct 0x00000001UL

#define	_RAC_PATRIM1_PATRIM10DBMDUTYCYN_up_2pct 0x00000002UL

#define	_RAC_PATRIM1_PATRIM10DBMDUTYCYN_up_3pct 0x00000003UL

#define	_RAC_PATRIM1_PATRIM10DBMDUTYCYN_up_4pct 0x00000004UL

#define	_RAC_PATRIM1_PATRIM10DBMDUTYCYN_up_5pct 0x00000005UL

#define	_RAC_PATRIM1_PATRIM10DBMDUTYCYN_up_6pct 0x00000006UL

#define	_RAC_PATRIM1_PATRIM10DBMDUTYCYP_DEFAULT 0x00000000UL

#define	_RAC_PATRIM1_PATRIM10DBMDUTYCYP_dn_0pct 0x00000000UL

#define	_RAC_PATRIM1_PATRIM10DBMDUTYCYP_dn_1pct 0x00000001UL

#define	_RAC_PATRIM1_PATRIM10DBMDUTYCYP_dn_2pct 0x00000002UL

#define	_RAC_PATRIM1_PATRIM10DBMDUTYCYP_dn_3pct 0x00000003UL

#define	_RAC_PATRIM1_PATRIM10DBMDUTYCYP_dn_4pct 0x00000004UL

#define	_RAC_PATRIM1_PATRIM10DBMDUTYCYP_dn_5pct 0x00000005UL

#define	_RAC_PATRIM1_PATRIM10DBMDUTYCYP_dn_6pct 0x00000006UL

#define	_RAC_PATRIM1_PATRIM10DBMDUTYCYP_MASK 0x38UL

#define	_RAC_PATRIM1_PATRIM10DBMDUTYCYP_na 0x00000007UL

#define	_RAC_PATRIM1_PATRIM10DBMDUTYCYP_SHIFT 3

#define	_RAC_PATRIM1_PATRIM20DBMPREDRV_DEFAULT 0x00000006UL

#define	_RAC_PATRIM1_PATRIM20DBMPREDRV_MASK 0x1C0UL

#define	_RAC_PATRIM1_PATRIM20DBMPREDRV_SHIFT 6

#define	_RAC_PATRIM1_PATRIM20DBMPREDRV_trise_110ps 0x00000003UL

#define	_RAC_PATRIM1_PATRIM20DBMPREDRV_trise_117ps 0x00000002UL

#define	_RAC_PATRIM1_PATRIM20DBMPREDRV_trise_127ps 0x00000001UL

#define	_RAC_PATRIM1_PATRIM20DBMPREDRV_trise_137ps 0x00000000UL

#define	_RAC_PATRIM1_PATRIM20DBMPREDRV_trise_70ps 0x00000007UL

#define	_RAC_PATRIM1_PATRIM20DBMPREDRV_trise_71ps 0x00000006UL

#define	_RAC_PATRIM1_PATRIM20DBMPREDRV_trise_73ps 0x00000005UL

#define	_RAC_PATRIM1_PATRIM20DBMPREDRV_trise_75ps 0x00000004UL

#define	_RAC_PATRIM1_PATRIMANTSWBIAS_DEFAULT 0x00000000UL

#define	_RAC_PATRIM1_PATRIMANTSWBIAS_MASK 0x600UL

#define	_RAC_PATRIM1_PATRIMANTSWBIAS_SHIFT 9

#define	_RAC_PATRIM1_PATRIMANTSWBIAS_vb_at_vdd 0x00000000UL

#define	_RAC_PATRIM1_PATRIMANTSWBIAS_vb_at_vdd_m1p2v 0x00000002UL

#define	_RAC_PATRIM1_PATRIMANTSWBIAS_vb_at_vdd_m1p8v 0x00000003UL

#define	_RAC_PATRIM1_PATRIMANTSWBIAS_vb_at_vdd_mp6v 0x00000001UL

#define	_RAC_PATRIM1_PATRIMBLEEDAUTOPREREG_automatic 0x00000001UL

#define	_RAC_PATRIM1_PATRIMBLEEDAUTOPREREG_DEFAULT 0x00000001UL

#define	_RAC_PATRIM1_PATRIMBLEEDAUTOPREREG_MASK 0x800UL

#define	_RAC_PATRIM1_PATRIMBLEEDAUTOPREREG_not_automatic 0x00000000UL

#define	_RAC_PATRIM1_PATRIMBLEEDAUTOPREREG_SHIFT 11

#define	_RAC_PATRIM1_PATRIMCAPPAOUTM_DEFAULT 0x00000000UL

#define	_RAC_PATRIM1_PATRIMCAPPAOUTM_MASK 0xF000UL

#define	_RAC_PATRIM1_PATRIMCAPPAOUTM_SHIFT 12

#define	_RAC_PATRIM1_PATRIMCAPPAOUTP_DEFAULT 0x00000000UL

#define	_RAC_PATRIM1_PATRIMCAPPAOUTP_MASK 0xF0000UL

#define	_RAC_PATRIM1_PATRIMCAPPAOUTP_SHIFT 16

#define	_RAC_PATRIM1_PATRIMCMGAIN_DEFAULT 0x00000000UL

#define	_RAC_PATRIM1_PATRIMCMGAIN_MASK 0x300000UL

#define	_RAC_PATRIM1_PATRIMCMGAIN_SHIFT 20

#define	_RAC_PATRIM1_PATRIMDLY0_DEFAULT 0x00000000UL

#define	_RAC_PATRIM1_PATRIMDLY0_MASK 0x1C00000UL

#define	_RAC_PATRIM1_PATRIMDLY0_SHIFT 22

#define	_RAC_PATRIM1_PATRIMDLY0_tdly_0ps 0x00000000UL

#define	_RAC_PATRIM1_PATRIMDLY0_tdly_64ps 0x00000001UL

#define	_RAC_PATRIM1_PATRIMDLY0_tdly_65ps 0x00000002UL

#define	_RAC_PATRIM1_PATRIMDLY0_tdly_66ps 0x00000003UL

#define	_RAC_PATRIM1_PATRIMDLY0_tdly_68ps 0x00000004UL

#define	_RAC_PATRIM1_PATRIMDLY0_tdly_70ps 0x00000005UL

#define	_RAC_PATRIM1_PATRIMDLY0_tdly_75ps 0x00000006UL

#define	_RAC_PATRIM1_PATRIMDLY0_tdly_83ps 0x00000007UL

#define	_RAC_PATRIM1_PATRIMDLY1_DEFAULT 0x00000000UL

#define	_RAC_PATRIM1_PATRIMDLY1_MASK 0xE000000UL

#define	_RAC_PATRIM1_PATRIMDLY1_SHIFT 25

#define	_RAC_PATRIM1_PATRIMDLY1_tdly_0ps 0x00000000UL

#define	_RAC_PATRIM1_PATRIMDLY1_tdly_64ps 0x00000001UL

#define	_RAC_PATRIM1_PATRIMDLY1_tdly_65ps 0x00000002UL

#define	_RAC_PATRIM1_PATRIMDLY1_tdly_66ps 0x00000003UL

#define	_RAC_PATRIM1_PATRIMDLY1_tdly_68ps 0x00000004UL

#define	_RAC_PATRIM1_PATRIMDLY1_tdly_70ps 0x00000005UL

#define	_RAC_PATRIM1_PATRIMDLY1_tdly_75ps 0x00000006UL

#define	_RAC_PATRIM1_PATRIMDLY1_tdly_83ps 0x00000007UL

#define	_RAC_PATRIM1_PATRIMFBKATTPDRVLDO_DEFAULT 0x00000000UL

#define	_RAC_PATRIM1_PATRIMFBKATTPDRVLDO_less_bw 0x00000000UL

#define	_RAC_PATRIM1_PATRIMFBKATTPDRVLDO_MASK 0x10000000UL

#define	_RAC_PATRIM1_PATRIMFBKATTPDRVLDO_more_bw 0x00000001UL

#define	_RAC_PATRIM1_PATRIMFBKATTPDRVLDO_SHIFT 28

#define	_RAC_PATRIM1_PATRIMIBIASMASTER_DEFAULT 0x00000002UL

#define	_RAC_PATRIM1_PATRIMIBIASMASTER_Ibias_is_45u 0x00000000UL

#define	_RAC_PATRIM1_PATRIMIBIASMASTER_Ibias_is_47p5u 0x00000001UL

#define	_RAC_PATRIM1_PATRIMIBIASMASTER_Ibias_is_50u 0x00000002UL

#define	_RAC_PATRIM1_PATRIMIBIASMASTER_Ibias_is_52p5u 0x00000003UL

#define	_RAC_PATRIM1_PATRIMIBIASMASTER_MASK 0x60000000UL

#define	_RAC_PATRIM1_PATRIMIBIASMASTER_SHIFT 29

#define	_RAC_PATRIM1_RESETVALUE 0x40000980UL

#define	_RAC_PATRIM2_MASK 0x7FFFFFFFUL

#define	_RAC_PATRIM2_PATRIMLDOFBHVPDRVLDO_DEFAULT 0x00000002UL

#define	_RAC_PATRIM2_PATRIMLDOFBHVPDRVLDO_MASK 0x3UL

#define	_RAC_PATRIM2_PATRIMLDOFBHVPDRVLDO_SHIFT 0

#define	_RAC_PATRIM2_PATRIMLDOFBHVPDRVLDO_vreg_1p22 0x00000000UL

#define	_RAC_PATRIM2_PATRIMLDOFBHVPDRVLDO_vreg_1p28 0x00000001UL

#define	_RAC_PATRIM2_PATRIMLDOFBHVPDRVLDO_vreg_1p35 0x00000002UL

#define	_RAC_PATRIM2_PATRIMLDOFBHVPDRVLDO_vreg_1p44 0x00000003UL

#define	_RAC_PATRIM2_PATRIMLDOFBHVPREREG_DEFAULT 0x00000006UL

#define	_RAC_PATRIM2_PATRIMLDOFBHVPREREG_MASK 0x1CUL

#define	_RAC_PATRIM2_PATRIMLDOFBHVPREREG_SHIFT 2

#define	_RAC_PATRIM2_PATRIMLDOFBHVPREREG_vreg_1p678 0x00000000UL

#define	_RAC_PATRIM2_PATRIMLDOFBHVPREREG_vreg_1p735 0x00000001UL

#define	_RAC_PATRIM2_PATRIMLDOFBHVPREREG_vreg_1p801 0x00000002UL

#define	_RAC_PATRIM2_PATRIMLDOFBHVPREREG_vreg_1p875 0x00000003UL

#define	_RAC_PATRIM2_PATRIMLDOFBHVPREREG_vreg_3p00 0x00000004UL

#define	_RAC_PATRIM2_PATRIMLDOFBHVPREREG_vreg_3p14 0x00000005UL

#define	_RAC_PATRIM2_PATRIMLDOFBHVPREREG_vreg_3p3 0x00000006UL

#define	_RAC_PATRIM2_PATRIMLDOFBHVPREREG_vreg_3p477 0x00000007UL

#define	_RAC_PATRIM2_PATRIMLDOHVPDRVLDO_DEFAULT 0x00000003UL

#define	_RAC_PATRIM2_PATRIMLDOHVPDRVLDO_MASK 0xE0UL

#define	_RAC_PATRIM2_PATRIMLDOHVPDRVLDO_SHIFT 5

#define	_RAC_PATRIM2_PATRIMLDOHVPDRVLDO_vref_0p675 0x00000000UL

#define	_RAC_PATRIM2_PATRIMLDOHVPDRVLDO_vref_0p700 0x00000001UL

#define	_RAC_PATRIM2_PATRIMLDOHVPDRVLDO_vref_0p725 0x00000002UL

#define	_RAC_PATRIM2_PATRIMLDOHVPDRVLDO_vref_0p750 0x00000003UL

#define	_RAC_PATRIM2_PATRIMLDOHVPDRVLDO_vref_0p775 0x00000004UL

#define	_RAC_PATRIM2_PATRIMLDOHVPDRVLDO_vref_0p800 0x00000005UL

#define	_RAC_PATRIM2_PATRIMLDOHVPDRVLDO_vref_0p825 0x00000006UL

#define	_RAC_PATRIM2_PATRIMLDOHVPDRVLDO_vref_0p850 0x00000007UL

#define	_RAC_PATRIM2_PATRIMLDOHVPREREG_DEFAULT 0x00000008UL

#define	_RAC_PATRIM2_PATRIMLDOHVPREREG_MASK 0xF00UL

#define	_RAC_PATRIM2_PATRIMLDOHVPREREG_SHIFT 8

#define	_RAC_PATRIM2_PATRIMLDOHVPREREG_vref_0p651 0x00000000UL

#define	_RAC_PATRIM2_PATRIMLDOHVPREREG_vref_0p663 0x00000001UL

#define	_RAC_PATRIM2_PATRIMLDOHVPREREG_vref_0p676 0x00000002UL

#define	_RAC_PATRIM2_PATRIMLDOHVPREREG_vref_0p688 0x00000003UL

#define	_RAC_PATRIM2_PATRIMLDOHVPREREG_vref_0p701 0x00000004UL

#define	_RAC_PATRIM2_PATRIMLDOHVPREREG_vref_0p713 0x00000005UL

#define	_RAC_PATRIM2_PATRIMLDOHVPREREG_vref_0p726 0x00000006UL

#define	_RAC_PATRIM2_PATRIMLDOHVPREREG_vref_0p738 0x00000007UL

#define	_RAC_PATRIM2_PATRIMLDOHVPREREG_vref_0p751 0x00000008UL

#define	_RAC_PATRIM2_PATRIMLDOHVPREREG_vref_0p763 0x00000009UL

#define	_RAC_PATRIM2_PATRIMLDOHVPREREG_vref_0p776 0x0000000AUL

#define	_RAC_PATRIM2_PATRIMLDOHVPREREG_vref_0p788 0x0000000BUL

#define	_RAC_PATRIM2_PATRIMLDOHVPREREG_vref_0p801 0x0000000CUL

#define	_RAC_PATRIM2_PATRIMLDOHVPREREG_vref_0p813 0x0000000DUL

#define	_RAC_PATRIM2_PATRIMLDOHVPREREG_vref_0p826 0x0000000EUL

#define	_RAC_PATRIM2_PATRIMLDOHVPREREG_vref_0p838 0x0000000FUL

#define	_RAC_PATRIM2_PATRIMLDOPSRPDRVLDO_DEFAULT 0x00000001UL

#define	_RAC_PATRIM2_PATRIMLDOPSRPDRVLDO_high_psr 0x00000001UL

#define	_RAC_PATRIM2_PATRIMLDOPSRPDRVLDO_low_psr 0x00000000UL

#define	_RAC_PATRIM2_PATRIMLDOPSRPDRVLDO_MASK 0x1000UL

#define	_RAC_PATRIM2_PATRIMLDOPSRPDRVLDO_SHIFT 12

#define	_RAC_PATRIM2_PATRIMLDOPSRPREREG_DEFAULT 0x00000001UL

#define	_RAC_PATRIM2_PATRIMLDOPSRPREREG_high_psr 0x00000001UL

#define	_RAC_PATRIM2_PATRIMLDOPSRPREREG_low_psr 0x00000000UL

#define	_RAC_PATRIM2_PATRIMLDOPSRPREREG_MASK 0x2000UL

#define	_RAC_PATRIM2_PATRIMLDOPSRPREREG_SHIFT 13

#define	_RAC_PATRIM2_PATRIMLDOSLICESPDRVLDO_DEFAULT 0x00000003UL

#define	_RAC_PATRIM2_PATRIMLDOSLICESPDRVLDO_iload_15mA 0x00000001UL

#define	_RAC_PATRIM2_PATRIMLDOSLICESPDRVLDO_iload_22p5mA 0x00000002UL

#define	_RAC_PATRIM2_PATRIMLDOSLICESPDRVLDO_iload_30mA 0x00000003UL

#define	_RAC_PATRIM2_PATRIMLDOSLICESPDRVLDO_iload_7p5mA 0x00000000UL

#define	_RAC_PATRIM2_PATRIMLDOSLICESPDRVLDO_MASK 0xC000UL

#define	_RAC_PATRIM2_PATRIMLDOSLICESPDRVLDO_SHIFT 14

#define	_RAC_PATRIM2_PATRIMLDOSLICESPREREG_DEFAULT 0x00000000UL

#define	_RAC_PATRIM2_PATRIMLDOSLICESPREREG_MASK 0x30000UL

#define	_RAC_PATRIM2_PATRIMLDOSLICESPREREG_SHIFT 16

#define	_RAC_PATRIM2_PATRIMLDOSLICESPREREG_spare1 0x00000000UL

#define	_RAC_PATRIM2_PATRIMLDOSLICESPREREG_spare2 0x00000001UL

#define	_RAC_PATRIM2_PATRIMLDOSLICESPREREG_spare3 0x00000002UL

#define	_RAC_PATRIM2_PATRIMLDOSLICESPREREG_spare4 0x00000003UL

#define	_RAC_PATRIM2_PATRIMNBIAS_DEFAULT 0x00000008UL

#define	_RAC_PATRIM2_PATRIMNBIAS_MASK 0x780000UL

#define	_RAC_PATRIM2_PATRIMNBIAS_SHIFT 19

#define	_RAC_PATRIM2_PATRIMNBIAS_vnbias_default 0x00000008UL

#define	_RAC_PATRIM2_PATRIMNBIAS_vnbias_dn104mv 0x00000000UL

#define	_RAC_PATRIM2_PATRIMNBIAS_vnbias_dn13mv 0x00000007UL

#define	_RAC_PATRIM2_PATRIMNBIAS_vnbias_dn26mv 0x00000006UL

#define	_RAC_PATRIM2_PATRIMNBIAS_vnbias_dn39mv 0x00000005UL

#define	_RAC_PATRIM2_PATRIMNBIAS_vnbias_dn52mv 0x00000004UL

#define	_RAC_PATRIM2_PATRIMNBIAS_vnbias_dn65mv 0x00000003UL

#define	_RAC_PATRIM2_PATRIMNBIAS_vnbias_dn78mv 0x00000002UL

#define	_RAC_PATRIM2_PATRIMNBIAS_vnbias_dn91mv 0x00000001UL

#define	_RAC_PATRIM2_PATRIMNBIAS_vnbias_up13mv 0x00000009UL

#define	_RAC_PATRIM2_PATRIMNBIAS_vnbias_up26mv 0x0000000AUL

#define	_RAC_PATRIM2_PATRIMNBIAS_vnbias_up39mv 0x0000000BUL

#define	_RAC_PATRIM2_PATRIMNBIAS_vnbias_up52mv 0x0000000CUL

#define	_RAC_PATRIM2_PATRIMNBIAS_vnbias_up65mv 0x0000000DUL

#define	_RAC_PATRIM2_PATRIMNBIAS_vnbias_up78mv 0x0000000EUL

#define	_RAC_PATRIM2_PATRIMNBIAS_vnbias_up91mv 0x0000000FUL

#define	_RAC_PATRIM2_PATRIMNCASC_DEFAULT 0x00000001UL

#define	_RAC_PATRIM2_PATRIMNCASC_MASK 0x1800000UL

#define	_RAC_PATRIM2_PATRIMNCASC_ncbias_default 0x00000001UL

#define	_RAC_PATRIM2_PATRIMNCASC_ncbias_m50mv 0x00000000UL

#define	_RAC_PATRIM2_PATRIMNCASC_ncbias_p100mv 0x00000003UL

#define	_RAC_PATRIM2_PATRIMNCASC_ncbias_p50mv 0x00000002UL

#define	_RAC_PATRIM2_PATRIMNCASC_SHIFT 23

#define	_RAC_PATRIM2_PATRIMPADACGLITCH_DEFAULT 0x00000000UL

#define	_RAC_PATRIM2_PATRIMPADACGLITCH_larger_glitch 0x00000000UL

#define	_RAC_PATRIM2_PATRIMPADACGLITCH_MASK 0x40000UL

#define	_RAC_PATRIM2_PATRIMPADACGLITCH_SHIFT 18

#define	_RAC_PATRIM2_PATRIMPADACGLITCH_smaller_glitch 0x00000001UL

#define	_RAC_PATRIM2_PATRIMPBIAS_DEFAULT 0x00000008UL

#define	_RAC_PATRIM2_PATRIMPBIAS_MASK 0x1E000000UL

#define	_RAC_PATRIM2_PATRIMPBIAS_SHIFT 25

#define	_RAC_PATRIM2_PATRIMPBIAS_vpbias_default 0x00000008UL

#define	_RAC_PATRIM2_PATRIMPBIAS_vpbias_dn13mv 0x00000009UL

#define	_RAC_PATRIM2_PATRIMPBIAS_vpbias_dn26mv 0x0000000AUL

#define	_RAC_PATRIM2_PATRIMPBIAS_vpbias_dn38mv 0x0000000BUL

#define	_RAC_PATRIM2_PATRIMPBIAS_vpbias_dn52mv 0x0000000CUL

#define	_RAC_PATRIM2_PATRIMPBIAS_vpbias_dn65mv 0x0000000DUL

#define	_RAC_PATRIM2_PATRIMPBIAS_vpbias_dn78mv 0x0000000EUL

#define	_RAC_PATRIM2_PATRIMPBIAS_vpbias_dn91mv 0x0000000FUL

#define	_RAC_PATRIM2_PATRIMPBIAS_vpbias_up104mv 0x00000000UL

#define	_RAC_PATRIM2_PATRIMPBIAS_vpbias_up13mv 0x00000007UL

#define	_RAC_PATRIM2_PATRIMPBIAS_vpbias_up26mv 0x00000006UL

#define	_RAC_PATRIM2_PATRIMPBIAS_vpbias_up39mv 0x00000005UL

#define	_RAC_PATRIM2_PATRIMPBIAS_vpbias_up52mv 0x00000004UL

#define	_RAC_PATRIM2_PATRIMPBIAS_vpbias_up65mv 0x00000003UL

#define	_RAC_PATRIM2_PATRIMPBIAS_vpbias_up78mv 0x00000002UL

#define	_RAC_PATRIM2_PATRIMPBIAS_vpbias_up91mv 0x00000001UL

#define	_RAC_PATRIM2_PATRIMPCASC_DEFAULT 0x00000001UL

#define	_RAC_PATRIM2_PATRIMPCASC_MASK 0x60000000UL

#define	_RAC_PATRIM2_PATRIMPCASC_pcbias_default 0x00000001UL

#define	_RAC_PATRIM2_PATRIMPCASC_pcbias_m100mv 0x00000003UL

#define	_RAC_PATRIM2_PATRIMPCASC_pcbias_m50mv 0x00000002UL

#define	_RAC_PATRIM2_PATRIMPCASC_pcbias_p50mv 0x00000000UL

#define	_RAC_PATRIM2_PATRIMPCASC_SHIFT 29

#define	_RAC_PATRIM2_RESETVALUE 0x30C0F87AUL

#define	_RAC_PGACAL_MASK 0x3F3F3F3FUL

#define	_RAC_PGACAL_PGAOFFNCALI_DEFAULT 0x00000020UL

#define	_RAC_PGACAL_PGAOFFNCALI_MASK 0x3FUL

#define	_RAC_PGACAL_PGAOFFNCALI_offset_m_300mv 0x00000000UL

#define	_RAC_PGACAL_PGAOFFNCALI_offset_p_300mv 0x0000003FUL

#define	_RAC_PGACAL_PGAOFFNCALI_SHIFT 0

#define	_RAC_PGACAL_PGAOFFNCALQ_DEFAULT 0x00000020UL

#define	_RAC_PGACAL_PGAOFFNCALQ_MASK 0x3F00UL

#define	_RAC_PGACAL_PGAOFFNCALQ_offset_m_300mv 0x00000000UL

#define	_RAC_PGACAL_PGAOFFNCALQ_offset_p_300mv 0x0000003FUL

#define	_RAC_PGACAL_PGAOFFNCALQ_SHIFT 8

#define	_RAC_PGACAL_PGAOFFPCALI_DEFAULT 0x00000020UL

#define	_RAC_PGACAL_PGAOFFPCALI_MASK 0x3F0000UL

#define	_RAC_PGACAL_PGAOFFPCALI_offset_m_300mv 0x00000000UL

#define	_RAC_PGACAL_PGAOFFPCALI_offset_p_300mv 0x0000003FUL

#define	_RAC_PGACAL_PGAOFFPCALI_SHIFT 16

#define	_RAC_PGACAL_PGAOFFPCALQ_DEFAULT 0x00000020UL

#define	_RAC_PGACAL_PGAOFFPCALQ_MASK 0x3F000000UL

#define	_RAC_PGACAL_PGAOFFPCALQ_offset_m_300mv 0x00000000UL

#define	_RAC_PGACAL_PGAOFFPCALQ_offset_p_300mv 0x0000003FUL

#define	_RAC_PGACAL_PGAOFFPCALQ_SHIFT 24

#define	_RAC_PGACAL_RESETVALUE 0x20202020UL

#define	_RAC_PGACTRL_LNAMIXRFPKDTHRESHSEL_DEFAULT 0x00000004UL

#define	_RAC_PGACTRL_LNAMIXRFPKDTHRESHSEL_MASK 0x7000000UL

#define	_RAC_PGACTRL_LNAMIXRFPKDTHRESHSEL_SHIFT 24

#define	_RAC_PGACTRL_MASK 0x07FFFFFFUL

#define	_RAC_PGACTRL_PGABWMODE_bw_1p25MHz 0x00000003UL

#define	_RAC_PGACTRL_PGABWMODE_bw_1p67MHz 0x00000002UL

#define	_RAC_PGACTRL_PGABWMODE_bw_2p5MHz 0x00000001UL

#define	_RAC_PGACTRL_PGABWMODE_bw_5MHz 0x00000000UL

#define	_RAC_PGACTRL_PGABWMODE_DEFAULT 0x00000000UL

#define	_RAC_PGACTRL_PGABWMODE_MASK 0x3UL

#define	_RAC_PGACTRL_PGABWMODE_SHIFT 0

#define	_RAC_PGACTRL_PGAENBIAS_bias_disable 0x00000000UL

#define	_RAC_PGACTRL_PGAENBIAS_bias_enable 0x00000001UL

#define	_RAC_PGACTRL_PGAENBIAS_DEFAULT 0x00000000UL

#define	_RAC_PGACTRL_PGAENBIAS_MASK 0x4UL

#define	_RAC_PGACTRL_PGAENBIAS_SHIFT 2

#define	_RAC_PGACTRL_PGAENGHZ_DEFAULT 0x00000000UL

#define	_RAC_PGACTRL_PGAENGHZ_ghz_disable 0x00000000UL

#define	_RAC_PGACTRL_PGAENGHZ_ghz_enable 0x00000001UL

#define	_RAC_PGACTRL_PGAENGHZ_MASK 0x8UL

#define	_RAC_PGACTRL_PGAENGHZ_SHIFT 3

#define	_RAC_PGACTRL_PGAENHYST_DEFAULT 0x00000000UL

#define	_RAC_PGACTRL_PGAENHYST_MASK 0x10UL

#define	_RAC_PGACTRL_PGAENHYST_pkd_hyst_disable 0x00000000UL

#define	_RAC_PGACTRL_PGAENHYST_pkd_hyst_enable 0x00000001UL

#define	_RAC_PGACTRL_PGAENHYST_SHIFT 4

#define	_RAC_PGACTRL_PGAENLATCHI_DEFAULT 0x00000000UL

#define	_RAC_PGACTRL_PGAENLATCHI_MASK 0x20UL

#define	_RAC_PGACTRL_PGAENLATCHI_pkd_latch_i_disable 0x00000000UL

#define	_RAC_PGACTRL_PGAENLATCHI_pkd_latch_i_enable 0x00000001UL

#define	_RAC_PGACTRL_PGAENLATCHI_SHIFT 5

#define	_RAC_PGACTRL_PGAENLATCHQ_DEFAULT 0x00000000UL

#define	_RAC_PGACTRL_PGAENLATCHQ_MASK 0x40UL

#define	_RAC_PGACTRL_PGAENLATCHQ_pkd_latch_q_disable 0x00000000UL

#define	_RAC_PGACTRL_PGAENLATCHQ_pkd_latch_q_enable 0x00000001UL

#define	_RAC_PGACTRL_PGAENLATCHQ_SHIFT 6

#define	_RAC_PGACTRL_PGAENLDOLOAD_DEFAULT 0x00000000UL

#define	_RAC_PGACTRL_PGAENLDOLOAD_disable_ldo_load 0x00000000UL

#define	_RAC_PGACTRL_PGAENLDOLOAD_enable_ldo_load 0x00000001UL

#define	_RAC_PGACTRL_PGAENLDOLOAD_MASK 0x80UL

#define	_RAC_PGACTRL_PGAENLDOLOAD_SHIFT 7

#define	_RAC_PGACTRL_PGAENOFFD_DEFAULT 0x00000000UL

#define	_RAC_PGACTRL_PGAENOFFD_MASK 0x100UL

#define	_RAC_PGACTRL_PGAENOFFD_pkd_offd_disable 0x00000000UL

#define	_RAC_PGACTRL_PGAENOFFD_pkd_offd_enable 0x00000001UL

#define	_RAC_PGACTRL_PGAENOFFD_SHIFT 8

#define	_RAC_PGACTRL_PGAENPGAI_DEFAULT 0x00000000UL

#define	_RAC_PGACTRL_PGAENPGAI_MASK 0x200UL

#define	_RAC_PGACTRL_PGAENPGAI_pgai_disable 0x00000000UL

#define	_RAC_PGACTRL_PGAENPGAI_pgai_enable 0x00000001UL

#define	_RAC_PGACTRL_PGAENPGAI_SHIFT 9

#define	_RAC_PGACTRL_PGAENPGAQ_DEFAULT 0x00000000UL

#define	_RAC_PGACTRL_PGAENPGAQ_MASK 0x400UL

#define	_RAC_PGACTRL_PGAENPGAQ_pgaq_disable 0x00000000UL

#define	_RAC_PGACTRL_PGAENPGAQ_pgaq_enable 0x00000001UL

#define	_RAC_PGACTRL_PGAENPGAQ_SHIFT 10

#define	_RAC_PGACTRL_PGAENPKD_DEFAULT 0x00000000UL

#define	_RAC_PGACTRL_PGAENPKD_MASK 0x800UL

#define	_RAC_PGACTRL_PGAENPKD_pkd_disable 0x00000000UL

#define	_RAC_PGACTRL_PGAENPKD_pkd_enable 0x00000001UL

#define	_RAC_PGACTRL_PGAENPKD_SHIFT 11

#define	_RAC_PGACTRL_PGAENRCMOUT_DEFAULT 0x00000000UL

#define	_RAC_PGACTRL_PGAENRCMOUT_MASK 0x1000UL

#define	_RAC_PGACTRL_PGAENRCMOUT_rcm_out_disable 0x00000000UL

#define	_RAC_PGACTRL_PGAENRCMOUT_rcm_out_enable 0x00000001UL

#define	_RAC_PGACTRL_PGAENRCMOUT_SHIFT 12

#define	_RAC_PGACTRL_PGAPOWERMODE_DEFAULT 0x00000000UL

#define	_RAC_PGACTRL_PGAPOWERMODE_MASK 0xC000UL

#define	_RAC_PGACTRL_PGAPOWERMODE_pm_0p5 0x00000003UL

#define	_RAC_PGACTRL_PGAPOWERMODE_pm_0p8 0x00000001UL

#define	_RAC_PGACTRL_PGAPOWERMODE_pm_1p2 0x00000002UL

#define	_RAC_PGACTRL_PGAPOWERMODE_pm_typ 0x00000000UL

#define	_RAC_PGACTRL_PGAPOWERMODE_SHIFT 14

#define	_RAC_PGACTRL_PGATHRPKDHISEL_DEFAULT 0x00000000UL

#define	_RAC_PGACTRL_PGATHRPKDHISEL_MASK 0xF00000UL

#define	_RAC_PGACTRL_PGATHRPKDHISEL_SHIFT 20

#define	_RAC_PGACTRL_PGATHRPKDHISEL_verf150mv 0x00000004UL

#define	_RAC_PGACTRL_PGATHRPKDHISEL_vref100mv 0x00000002UL

#define	_RAC_PGACTRL_PGATHRPKDHISEL_vref125mv 0x00000003UL

#define	_RAC_PGACTRL_PGATHRPKDHISEL_vref175mv 0x00000005UL

#define	_RAC_PGACTRL_PGATHRPKDHISEL_vref200mv 0x00000006UL

#define	_RAC_PGACTRL_PGATHRPKDHISEL_vref225mv 0x00000007UL

#define	_RAC_PGACTRL_PGATHRPKDHISEL_vref250mv 0x00000008UL

#define	_RAC_PGACTRL_PGATHRPKDHISEL_vref275mv 0x00000009UL

#define	_RAC_PGACTRL_PGATHRPKDHISEL_vref300mv 0x0000000AUL

#define	_RAC_PGACTRL_PGATHRPKDHISEL_vref50mv 0x00000000UL

#define	_RAC_PGACTRL_PGATHRPKDHISEL_vref75mv 0x00000001UL

#define	_RAC_PGACTRL_PGATHRPKDLOSEL_DEFAULT 0x00000000UL

#define	_RAC_PGACTRL_PGATHRPKDLOSEL_MASK 0xF0000UL

#define	_RAC_PGACTRL_PGATHRPKDLOSEL_SHIFT 16

#define	_RAC_PGACTRL_PGATHRPKDLOSEL_vref100mv 0x00000002UL

#define	_RAC_PGACTRL_PGATHRPKDLOSEL_vref125mv 0x00000003UL

#define	_RAC_PGACTRL_PGATHRPKDLOSEL_vref150mv 0x00000004UL

#define	_RAC_PGACTRL_PGATHRPKDLOSEL_vref175mv 0x00000005UL

#define	_RAC_PGACTRL_PGATHRPKDLOSEL_vref200mv 0x00000006UL

#define	_RAC_PGACTRL_PGATHRPKDLOSEL_vref225mv 0x00000007UL

#define	_RAC_PGACTRL_PGATHRPKDLOSEL_vref250mv 0x00000008UL

#define	_RAC_PGACTRL_PGATHRPKDLOSEL_vref275mv 0x00000009UL

#define	_RAC_PGACTRL_PGATHRPKDLOSEL_vref300mv 0x0000000AUL

#define	_RAC_PGACTRL_PGATHRPKDLOSEL_vref50mv 0x00000000UL

#define	_RAC_PGACTRL_PGATHRPKDLOSEL_vref75mv 0x00000001UL

#define	_RAC_PGACTRL_RESETVALUE 0x04000000UL

#define	_RAC_PGATRIM_MASK 0x000007FFUL

#define	_RAC_PGATRIM_PGACTUNE_cfb_0p7 0x00000000UL

#define	_RAC_PGATRIM_PGACTUNE_cfb_1p32 0x0000000FUL

#define	_RAC_PGATRIM_PGACTUNE_cfb_nominal 0x00000007UL

#define	_RAC_PGATRIM_PGACTUNE_DEFAULT 0x00000007UL

#define	_RAC_PGATRIM_PGACTUNE_MASK 0xFUL

#define	_RAC_PGATRIM_PGACTUNE_SHIFT 0

#define	_RAC_PGATRIM_PGADISANTILOCK_antilock_disable 0x00000001UL

#define	_RAC_PGATRIM_PGADISANTILOCK_antilock_enable 0x00000000UL

#define	_RAC_PGATRIM_PGADISANTILOCK_DEFAULT 0x00000000UL

#define	_RAC_PGATRIM_PGADISANTILOCK_MASK 0x10UL

#define	_RAC_PGATRIM_PGADISANTILOCK_SHIFT 4

#define	_RAC_PGATRIM_PGAVCMOUTTRIM_DEFAULT 0x00000002UL

#define	_RAC_PGATRIM_PGAVCMOUTTRIM_MASK 0xE0UL

#define	_RAC_PGATRIM_PGAVCMOUTTRIM_SHIFT 5

#define	_RAC_PGATRIM_PGAVCMOUTTRIM_vcm_out_0p4 0x00000000UL

#define	_RAC_PGATRIM_PGAVCMOUTTRIM_vcm_out_0p45 0x00000001UL

#define	_RAC_PGATRIM_PGAVCMOUTTRIM_vcm_out_0p5 0x00000002UL

#define	_RAC_PGATRIM_PGAVCMOUTTRIM_vcm_out_0p55 0x00000003UL

#define	_RAC_PGATRIM_PGAVCMOUTTRIM_vcm_out_0p6 0x00000004UL

#define	_RAC_PGATRIM_PGAVCMOUTTRIM_vcm_out_0p65 0x00000005UL

#define	_RAC_PGATRIM_PGAVCMOUTTRIM_vcm_out_0p7 0x00000006UL

#define	_RAC_PGATRIM_PGAVCMOUTTRIM_vcm_out_0p75 0x00000007UL

#define	_RAC_PGATRIM_PGAVLDOTRIM_DEFAULT 0x00000005UL

#define	_RAC_PGATRIM_PGAVLDOTRIM_MASK 0x700UL

#define	_RAC_PGATRIM_PGAVLDOTRIM_SHIFT 8

#define	_RAC_PGATRIM_PGAVLDOTRIM_vdda_1p15 0x00000000UL

#define	_RAC_PGATRIM_PGAVLDOTRIM_vdda_1p2 0x00000001UL

#define	_RAC_PGATRIM_PGAVLDOTRIM_vdda_1p25 0x00000002UL

#define	_RAC_PGATRIM_PGAVLDOTRIM_vdda_1p3 0x00000003UL

#define	_RAC_PGATRIM_PGAVLDOTRIM_vdda_1p35 0x00000004UL

#define	_RAC_PGATRIM_PGAVLDOTRIM_vdda_1p4 0x00000005UL

#define	_RAC_PGATRIM_PGAVLDOTRIM_vdda_1p5 0x00000006UL

#define	_RAC_PGATRIM_PGAVLDOTRIM_vdda_1p55 0x00000007UL

#define	_RAC_PGATRIM_RESETVALUE 0x00000547UL

#define	_RAC_PRECTRL_MASK 0x0000003FUL

#define	_RAC_PRECTRL_PREBYPFORCE_DEFAULT 0x00000000UL

#define	_RAC_PRECTRL_PREBYPFORCE_forced 0x00000001UL

#define	_RAC_PRECTRL_PREBYPFORCE_MASK 0x1UL

#define	_RAC_PRECTRL_PREBYPFORCE_not_forced 0x00000000UL

#define	_RAC_PRECTRL_PREBYPFORCE_SHIFT 0

#define	_RAC_PRECTRL_PREREGTRIM_DEFAULT 0x00000003UL

#define	_RAC_PRECTRL_PREREGTRIM_MASK 0xEUL

#define	_RAC_PRECTRL_PREREGTRIM_SHIFT 1

#define	_RAC_PRECTRL_PREREGTRIM_v1p61 0x00000000UL

#define	_RAC_PRECTRL_PREREGTRIM_v1p68 0x00000001UL

#define	_RAC_PRECTRL_PREREGTRIM_v1p74 0x00000002UL

#define	_RAC_PRECTRL_PREREGTRIM_v1p80 0x00000003UL

#define	_RAC_PRECTRL_PREREGTRIM_v1p86 0x00000004UL

#define	_RAC_PRECTRL_PREREGTRIM_v1p91 0x00000005UL

#define	_RAC_PRECTRL_PREREGTRIM_v1p96 0x00000006UL

#define	_RAC_PRECTRL_PREREGTRIM_v2p00 0x00000007UL

#define	_RAC_PRECTRL_PREVREFTRIM_DEFAULT 0x00000002UL

#define	_RAC_PRECTRL_PREVREFTRIM_MASK 0x30UL

#define	_RAC_PRECTRL_PREVREFTRIM_SHIFT 4

#define	_RAC_PRECTRL_PREVREFTRIM_v0p675 0x00000000UL

#define	_RAC_PRECTRL_PREVREFTRIM_v0p688 0x00000001UL

#define	_RAC_PRECTRL_PREVREFTRIM_v0p700 0x00000002UL

#define	_RAC_PRECTRL_PREVREFTRIM_v0p713 0x00000003UL

#define	_RAC_PRECTRL_RESETVALUE 0x00000026UL

#define	_RAC_PRESC_MASK 0x0000007FUL

#define	_RAC_PRESC_RESETVALUE 0x00000007UL

#define	_RAC_PRESC_STIMER_DEFAULT 0x00000007UL

#define	_RAC_PRESC_STIMER_MASK 0x7FUL

#define	_RAC_PRESC_STIMER_SHIFT 0

#define	_RAC_R0_MASK 0xFFFFFFFFUL

#define	_RAC_R0_R0_DEFAULT 0x00000000UL

#define	_RAC_R0_R0_MASK 0xFFFFFFFFUL

#define	_RAC_R0_R0_SHIFT 0

#define	_RAC_R0_RESETVALUE 0x00000000UL

#define	_RAC_R1_MASK 0xFFFFFFFFUL

#define	_RAC_R1_R1_DEFAULT 0x00000000UL

#define	_RAC_R1_R1_MASK 0xFFFFFFFFUL

#define	_RAC_R1_R1_SHIFT 0

#define	_RAC_R1_RESETVALUE 0x00000000UL

#define	_RAC_R2_MASK 0xFFFFFFFFUL

#define	_RAC_R2_R2_DEFAULT 0x00000000UL

#define	_RAC_R2_R2_MASK 0xFFFFFFFFUL

#define	_RAC_R2_R2_SHIFT 0

#define	_RAC_R2_RESETVALUE 0x00000000UL

#define	_RAC_R3_MASK 0xFFFFFFFFUL

#define	_RAC_R3_R3_DEFAULT 0x00000000UL

#define	_RAC_R3_R3_MASK 0xFFFFFFFFUL

#define	_RAC_R3_R3_SHIFT 0

#define	_RAC_R3_RESETVALUE 0x00000000UL

#define	_RAC_R4_MASK 0xFFFFFFFFUL

#define	_RAC_R4_R4_DEFAULT 0x00000000UL

#define	_RAC_R4_R4_MASK 0xFFFFFFFFUL

#define	_RAC_R4_R4_SHIFT 0

#define	_RAC_R4_RESETVALUE 0x00000000UL

#define	_RAC_R5_MASK 0xFFFFFFFFUL

#define	_RAC_R5_R5_DEFAULT 0x00000000UL

#define	_RAC_R5_R5_MASK 0xFFFFFFFFUL

#define	_RAC_R5_R5_SHIFT 0

#define	_RAC_R5_RESETVALUE 0x00000000UL

#define	_RAC_R6_MASK 0xFFFFFFFFUL

#define	_RAC_R6_R6_DEFAULT 0x00000000UL

#define	_RAC_R6_R6_MASK 0xFFFFFFFFUL

#define	_RAC_R6_R6_SHIFT 0

#define	_RAC_R6_RESETVALUE 0x00000000UL

#define	_RAC_R7_MASK 0xFFFFFFFFUL

#define	_RAC_R7_R7_DEFAULT 0x00000000UL

#define	_RAC_R7_R7_MASK 0xFFFFFFFFUL

#define	_RAC_R7_R7_SHIFT 0

#define	_RAC_R7_RESETVALUE 0x00000000UL

#define	_RAC_RADIOEN_MASK 0x00000007UL

#define	_RAC_RADIOEN_PREEN_DEFAULT 0x00000000UL

#define	_RAC_RADIOEN_PREEN_MASK 0x1UL

#define	_RAC_RADIOEN_PREEN_powered_off 0x00000000UL

#define	_RAC_RADIOEN_PREEN_powered_on 0x00000001UL

#define	_RAC_RADIOEN_PREEN_SHIFT 0

#define	_RAC_RADIOEN_PRESTB100UDIS_DEFAULT 0x00000000UL

#define	_RAC_RADIOEN_PRESTB100UDIS_i100ua_disabled 0x00000001UL

#define	_RAC_RADIOEN_PRESTB100UDIS_i100ua_enabled 0x00000000UL

#define	_RAC_RADIOEN_PRESTB100UDIS_MASK 0x2UL

#define	_RAC_RADIOEN_PRESTB100UDIS_SHIFT 1

#define	_RAC_RADIOEN_RESETVALUE 0x00000000UL

#define	_RAC_RADIOEN_RFBIASEN_DEFAULT 0x00000000UL

#define	_RAC_RADIOEN_RFBIASEN_disable_dualbis_vtr 0x00000000UL

#define	_RAC_RADIOEN_RFBIASEN_enable_dualbis_vtr 0x00000001UL

#define	_RAC_RADIOEN_RFBIASEN_MASK 0x4UL

#define	_RAC_RADIOEN_RFBIASEN_SHIFT 2

#define	_RAC_RFBIASCAL_MASK 0x3F3F3F3FUL

#define	_RAC_RFBIASCAL_RESETVALUE 0x30202020UL

#define	_RAC_RFBIASCAL_RFBIASCALBIAS_DEFAULT 0x00000020UL

#define	_RAC_RFBIASCAL_RFBIASCALBIAS_MASK 0x3FUL

#define	_RAC_RFBIASCAL_RFBIASCALBIAS_SHIFT 0

#define	_RAC_RFBIASCAL_RFBIASCALTC_DEFAULT 0x00000020UL

#define	_RAC_RFBIASCAL_RFBIASCALTC_MASK 0x3F00UL

#define	_RAC_RFBIASCAL_RFBIASCALTC_SHIFT 8

#define	_RAC_RFBIASCAL_RFBIASCALVREF_DEFAULT 0x00000020UL

#define	_RAC_RFBIASCAL_RFBIASCALVREF_MASK 0x3F0000UL

#define	_RAC_RFBIASCAL_RFBIASCALVREF_SHIFT 16

#define	_RAC_RFBIASCAL_RFBIASCALVREFSTARTUP_DEFAULT 0x00000030UL

#define	_RAC_RFBIASCAL_RFBIASCALVREFSTARTUP_MASK 0x3F000000UL

#define	_RAC_RFBIASCAL_RFBIASCALVREFSTARTUP_SHIFT 24

#define	_RAC_RFBIASCTRL_MASK 0x000F001FUL

#define	_RAC_RFBIASCTRL_RESETVALUE 0x00040000UL

#define	_RAC_RFBIASCTRL_RFBIASDISABLEBOOTSTRAP_DEFAULT 0x00000000UL

#define	_RAC_RFBIASCTRL_RFBIASDISABLEBOOTSTRAP_disable_startup 0x00000001UL

#define	_RAC_RFBIASCTRL_RFBIASDISABLEBOOTSTRAP_enable_startup 0x00000000UL

#define	_RAC_RFBIASCTRL_RFBIASDISABLEBOOTSTRAP_MASK 0x1UL

#define	_RAC_RFBIASCTRL_RFBIASDISABLEBOOTSTRAP_SHIFT 0

#define	_RAC_RFBIASCTRL_RFBIASLDOHIGHCURRENT_DEFAULT 0x00000000UL

#define	_RAC_RFBIASCTRL_RFBIASLDOHIGHCURRENT_high_current 0x00000001UL

#define	_RAC_RFBIASCTRL_RFBIASLDOHIGHCURRENT_low_current 0x00000000UL

#define	_RAC_RFBIASCTRL_RFBIASLDOHIGHCURRENT_MASK 0x2UL

#define	_RAC_RFBIASCTRL_RFBIASLDOHIGHCURRENT_SHIFT 1

#define	_RAC_RFBIASCTRL_RFBIASLDOVREFTRIM_DEFAULT 0x00000004UL

#define	_RAC_RFBIASCTRL_RFBIASLDOVREFTRIM_MASK 0xF0000UL

#define	_RAC_RFBIASCTRL_RFBIASLDOVREFTRIM_SHIFT 16

#define	_RAC_RFBIASCTRL_RFBIASLDOVREFTRIM_vref_v0p800 0x00000000UL

#define	_RAC_RFBIASCTRL_RFBIASLDOVREFTRIM_vref_v0p813 0x00000001UL

#define	_RAC_RFBIASCTRL_RFBIASLDOVREFTRIM_vref_v0p825 0x00000002UL

#define	_RAC_RFBIASCTRL_RFBIASLDOVREFTRIM_vref_v0p837 0x00000003UL

#define	_RAC_RFBIASCTRL_RFBIASLDOVREFTRIM_vref_v0p850 0x00000004UL

#define	_RAC_RFBIASCTRL_RFBIASLDOVREFTRIM_vref_v0p863 0x00000005UL

#define	_RAC_RFBIASCTRL_RFBIASLDOVREFTRIM_vref_v0p875 0x00000006UL

#define	_RAC_RFBIASCTRL_RFBIASLDOVREFTRIM_vref_v0p887 0x00000007UL

#define	_RAC_RFBIASCTRL_RFBIASLDOVREFTRIM_vref_v0p900 0x00000008UL

#define	_RAC_RFBIASCTRL_RFBIASLDOVREFTRIM_vref_v0p913 0x00000009UL

#define	_RAC_RFBIASCTRL_RFBIASLDOVREFTRIM_vref_v0p925 0x0000000AUL

#define	_RAC_RFBIASCTRL_RFBIASLDOVREFTRIM_vref_v0p938 0x0000000BUL

#define	_RAC_RFBIASCTRL_RFBIASLDOVREFTRIM_vref_v0p950 0x0000000CUL

#define	_RAC_RFBIASCTRL_RFBIASLDOVREFTRIM_vref_v0p963 0x0000000DUL

#define	_RAC_RFBIASCTRL_RFBIASLDOVREFTRIM_vref_v0p975 0x0000000EUL

#define	_RAC_RFBIASCTRL_RFBIASLDOVREFTRIM_vref_v0p988 0x0000000FUL

#define	_RAC_RFBIASCTRL_RFBIASNONFLASHMODE_DEFAULT 0x00000000UL

#define	_RAC_RFBIASCTRL_RFBIASNONFLASHMODE_flash_process 0x00000000UL

#define	_RAC_RFBIASCTRL_RFBIASNONFLASHMODE_MASK 0x4UL

#define	_RAC_RFBIASCTRL_RFBIASNONFLASHMODE_non_flash_process 0x00000001UL

#define	_RAC_RFBIASCTRL_RFBIASNONFLASHMODE_SHIFT 2

#define	_RAC_RFBIASCTRL_RFBIASSTARTUPCORE_DEFAULT 0x00000000UL

#define	_RAC_RFBIASCTRL_RFBIASSTARTUPCORE_default 0x00000000UL

#define	_RAC_RFBIASCTRL_RFBIASSTARTUPCORE_force_start 0x00000001UL

#define	_RAC_RFBIASCTRL_RFBIASSTARTUPCORE_MASK 0x8UL

#define	_RAC_RFBIASCTRL_RFBIASSTARTUPCORE_SHIFT 3

#define	_RAC_RFBIASCTRL_RFBIASSTARTUPSUPPLY_DEFAULT 0x00000000UL

#define	_RAC_RFBIASCTRL_RFBIASSTARTUPSUPPLY_default 0x00000000UL

#define	_RAC_RFBIASCTRL_RFBIASSTARTUPSUPPLY_forc_start 0x00000001UL

#define	_RAC_RFBIASCTRL_RFBIASSTARTUPSUPPLY_MASK 0x10UL

#define	_RAC_RFBIASCTRL_RFBIASSTARTUPSUPPLY_SHIFT 4

#define	_RAC_RFPATHEN1_LNAMIXEN0DBMPA1_DEFAULT 0x00000000UL

#define	_RAC_RFPATHEN1_LNAMIXEN0DBMPA1_disable 0x00000000UL

#define	_RAC_RFPATHEN1_LNAMIXEN0DBMPA1_enable 0x00000001UL

#define	_RAC_RFPATHEN1_LNAMIXEN0DBMPA1_MASK 0x1UL

#define	_RAC_RFPATHEN1_LNAMIXEN0DBMPA1_SHIFT 0

#define	_RAC_RFPATHEN1_LNAMIXEN1_DEFAULT 0x00000000UL

#define	_RAC_RFPATHEN1_LNAMIXEN1_disable 0x00000000UL

#define	_RAC_RFPATHEN1_LNAMIXEN1_enable 0x00000001UL

#define	_RAC_RFPATHEN1_LNAMIXEN1_MASK 0x2UL

#define	_RAC_RFPATHEN1_LNAMIXEN1_SHIFT 1

#define	_RAC_RFPATHEN1_LNAMIXRFATTDCEN1_DEFAULT 0x00000001UL

#define	_RAC_RFPATHEN1_LNAMIXRFATTDCEN1_disable_dc 0x00000000UL

#define	_RAC_RFPATHEN1_LNAMIXRFATTDCEN1_enable_dc 0x00000001UL

#define	_RAC_RFPATHEN1_LNAMIXRFATTDCEN1_MASK 0x4UL

#define	_RAC_RFPATHEN1_LNAMIXRFATTDCEN1_SHIFT 2

#define	_RAC_RFPATHEN1_LNAMIXRFPKDENRF1_DEFAULT 0x00000000UL

#define	_RAC_RFPATHEN1_LNAMIXRFPKDENRF1_disable 0x00000000UL

#define	_RAC_RFPATHEN1_LNAMIXRFPKDENRF1_enable_path1 0x00000001UL

#define	_RAC_RFPATHEN1_LNAMIXRFPKDENRF1_MASK 0x8UL

#define	_RAC_RFPATHEN1_LNAMIXRFPKDENRF1_SHIFT 3

#define	_RAC_RFPATHEN1_LNAMIXTRSW1_DEFAULT 0x00000000UL

#define	_RAC_RFPATHEN1_LNAMIXTRSW1_disabled 0x00000000UL

#define	_RAC_RFPATHEN1_LNAMIXTRSW1_enabled 0x00000001UL

#define	_RAC_RFPATHEN1_LNAMIXTRSW1_MASK 0x10UL

#define	_RAC_RFPATHEN1_LNAMIXTRSW1_SHIFT 4

#define	_RAC_RFPATHEN1_MASK 0x000000FFUL

#define	_RAC_RFPATHEN1_PAENANT1_DEFAULT 0x00000000UL

#define	_RAC_RFPATHEN1_PAENANT1_disable 0x00000000UL

#define	_RAC_RFPATHEN1_PAENANT1_enable 0x00000001UL

#define	_RAC_RFPATHEN1_PAENANT1_MASK 0x20UL

#define	_RAC_RFPATHEN1_PAENANT1_SHIFT 5

#define	_RAC_RFPATHEN1_PAENPA10DBM_DEFAULT 0x00000000UL

#define	_RAC_RFPATHEN1_PAENPA10DBM_disable 0x00000000UL

#define	_RAC_RFPATHEN1_PAENPA10DBM_enable 0x00000001UL

#define	_RAC_RFPATHEN1_PAENPA10DBM_MASK 0x40UL

#define	_RAC_RFPATHEN1_PAENPA10DBM_SHIFT 6

#define	_RAC_RFPATHEN1_PAENPAPREDRV10DBM_DEFAULT 0x00000000UL

#define	_RAC_RFPATHEN1_PAENPAPREDRV10DBM_disable 0x00000000UL

#define	_RAC_RFPATHEN1_PAENPAPREDRV10DBM_enable 0x00000001UL

#define	_RAC_RFPATHEN1_PAENPAPREDRV10DBM_MASK 0x80UL

#define	_RAC_RFPATHEN1_PAENPAPREDRV10DBM_SHIFT 7

#define	_RAC_RFPATHEN1_RESETVALUE 0x00000004UL

#define	_RAC_RFPATHEN2_LNAMIXEN0DBMPA2_DEFAULT 0x00000000UL

#define	_RAC_RFPATHEN2_LNAMIXEN0DBMPA2_disable 0x00000000UL

#define	_RAC_RFPATHEN2_LNAMIXEN0DBMPA2_enable 0x00000001UL

#define	_RAC_RFPATHEN2_LNAMIXEN0DBMPA2_MASK 0x1UL

#define	_RAC_RFPATHEN2_LNAMIXEN0DBMPA2_SHIFT 0

#define	_RAC_RFPATHEN2_LNAMIXEN2_DEFAULT 0x00000000UL

#define	_RAC_RFPATHEN2_LNAMIXEN2_disable 0x00000000UL

#define	_RAC_RFPATHEN2_LNAMIXEN2_enable 0x00000001UL

#define	_RAC_RFPATHEN2_LNAMIXEN2_MASK 0x2UL

#define	_RAC_RFPATHEN2_LNAMIXEN2_SHIFT 1

#define	_RAC_RFPATHEN2_LNAMIXRFATTDCEN2_DEFAULT 0x00000001UL

#define	_RAC_RFPATHEN2_LNAMIXRFATTDCEN2_disable 0x00000000UL

#define	_RAC_RFPATHEN2_LNAMIXRFATTDCEN2_enable 0x00000001UL

#define	_RAC_RFPATHEN2_LNAMIXRFATTDCEN2_MASK 0x4UL

#define	_RAC_RFPATHEN2_LNAMIXRFATTDCEN2_SHIFT 2

#define	_RAC_RFPATHEN2_LNAMIXRFPKDENRF2_DEFAULT 0x00000000UL

#define	_RAC_RFPATHEN2_LNAMIXRFPKDENRF2_disable 0x00000000UL

#define	_RAC_RFPATHEN2_LNAMIXRFPKDENRF2_enable_path2 0x00000001UL

#define	_RAC_RFPATHEN2_LNAMIXRFPKDENRF2_MASK 0x8UL

#define	_RAC_RFPATHEN2_LNAMIXRFPKDENRF2_SHIFT 3

#define	_RAC_RFPATHEN2_LNAMIXTRSW2_DEFAULT 0x00000000UL

#define	_RAC_RFPATHEN2_LNAMIXTRSW2_disable 0x00000000UL

#define	_RAC_RFPATHEN2_LNAMIXTRSW2_enable 0x00000001UL

#define	_RAC_RFPATHEN2_LNAMIXTRSW2_MASK 0x10UL

#define	_RAC_RFPATHEN2_LNAMIXTRSW2_SHIFT 4

#define	_RAC_RFPATHEN2_MASK 0x000000FFUL

#define	_RAC_RFPATHEN2_PAENANT2_DEFAULT 0x00000000UL

#define	_RAC_RFPATHEN2_PAENANT2_disable 0x00000000UL

#define	_RAC_RFPATHEN2_PAENANT2_enable 0x00000001UL

#define	_RAC_RFPATHEN2_PAENANT2_MASK 0x20UL

#define	_RAC_RFPATHEN2_PAENANT2_SHIFT 5

#define	_RAC_RFPATHEN2_PAENPA20DBM_DEFAULT 0x00000000UL

#define	_RAC_RFPATHEN2_PAENPA20DBM_disable 0x00000000UL

#define	_RAC_RFPATHEN2_PAENPA20DBM_enable 0x00000001UL

#define	_RAC_RFPATHEN2_PAENPA20DBM_MASK 0x40UL

#define	_RAC_RFPATHEN2_PAENPA20DBM_SHIFT 6

#define	_RAC_RFPATHEN2_PAENPAPREDRV20DBM_DEFAULT 0x00000000UL

#define	_RAC_RFPATHEN2_PAENPAPREDRV20DBM_disable 0x00000000UL

#define	_RAC_RFPATHEN2_PAENPAPREDRV20DBM_enable 0x00000001UL

#define	_RAC_RFPATHEN2_PAENPAPREDRV20DBM_MASK 0x80UL

#define	_RAC_RFPATHEN2_PAENPAPREDRV20DBM_SHIFT 7

#define	_RAC_RFPATHEN2_RESETVALUE 0x00000004UL

#define	_RAC_RX_IFADCCAPRESET_cap_reset_disable 0x00000000UL

#define	_RAC_RX_IFADCCAPRESET_cap_reset_enable 0x00000001UL

#define	_RAC_RX_IFADCCAPRESET_DEFAULT 0x00000000UL

#define	_RAC_RX_IFADCCAPRESET_MASK 0x1UL

#define	_RAC_RX_IFADCCAPRESET_SHIFT 0

#define	_RAC_RX_IFADCENLDOSERIES_DEFAULT 0x00000000UL

#define	_RAC_RX_IFADCENLDOSERIES_MASK 0x2UL

#define	_RAC_RX_IFADCENLDOSERIES_series_ldo_disable 0x00000000UL

#define	_RAC_RX_IFADCENLDOSERIES_series_ldo_enable 0x00000001UL

#define	_RAC_RX_IFADCENLDOSERIES_SHIFT 1

#define	_RAC_RX_IFADCENLDOSHUNT_DEFAULT 0x00000000UL

#define	_RAC_RX_IFADCENLDOSHUNT_MASK 0x4UL

#define	_RAC_RX_IFADCENLDOSHUNT_SHIFT 2

#define	_RAC_RX_IFADCENLDOSHUNT_shunt_ldo_disable 0x00000000UL

#define	_RAC_RX_IFADCENLDOSHUNT_shunt_ldo_enable 0x00000001UL

#define	_RAC_RX_LNAMIXENRFPKD_DEFAULT 0x00000000UL

#define	_RAC_RX_LNAMIXENRFPKD_disable 0x00000000UL

#define	_RAC_RX_LNAMIXENRFPKD_enable 0x00000001UL

#define	_RAC_RX_LNAMIXENRFPKD_MASK 0x8UL

#define	_RAC_RX_LNAMIXENRFPKD_SHIFT 3

#define	_RAC_RX_LNAMIXLDOLOWCUR_DEFAULT 0x00000001UL

#define	_RAC_RX_LNAMIXLDOLOWCUR_low_current_mode 0x00000001UL

#define	_RAC_RX_LNAMIXLDOLOWCUR_MASK 0x10UL

#define	_RAC_RX_LNAMIXLDOLOWCUR_regular_mode 0x00000000UL

#define	_RAC_RX_LNAMIXLDOLOWCUR_SHIFT 4

#define	_RAC_RX_LNAMIXREGLOADEN_DEFAULT 0x00000000UL

#define	_RAC_RX_LNAMIXREGLOADEN_disable_resistor 0x00000000UL

#define	_RAC_RX_LNAMIXREGLOADEN_enable_resistor 0x00000001UL

#define	_RAC_RX_LNAMIXREGLOADEN_MASK 0x20UL

#define	_RAC_RX_LNAMIXREGLOADEN_SHIFT 5

#define	_RAC_RX_MASK 0x00003FFFUL

#define	_RAC_RX_PGAENLDO_DEFAULT 0x00000000UL

#define	_RAC_RX_PGAENLDO_disable_ldo 0x00000000UL

#define	_RAC_RX_PGAENLDO_enable_ldo 0x00000001UL

#define	_RAC_RX_PGAENLDO_MASK 0x40UL

#define	_RAC_RX_PGAENLDO_SHIFT 6

#define	_RAC_RX_RESETVALUE 0x00000410UL

#define	_RAC_RX_SYCHPBIASTRIMBUF_DEFAULT 0x00000000UL

#define	_RAC_RX_SYCHPBIASTRIMBUF_i_tail_10u 0x00000000UL

#define	_RAC_RX_SYCHPBIASTRIMBUF_i_tail_20u 0x00000001UL

#define	_RAC_RX_SYCHPBIASTRIMBUF_MASK 0x80UL

#define	_RAC_RX_SYCHPBIASTRIMBUF_SHIFT 7

#define	_RAC_RX_SYCHPQNC3EN_DEFAULT 0x00000000UL

#define	_RAC_RX_SYCHPQNC3EN_MASK 0x100UL

#define	_RAC_RX_SYCHPQNC3EN_qnc_2 0x00000000UL

#define	_RAC_RX_SYCHPQNC3EN_qnc_3 0x00000001UL

#define	_RAC_RX_SYCHPQNC3EN_SHIFT 8

#define	_RAC_RX_SYMMDMODE_DEFAULT 0x00000002UL

#define	_RAC_RX_SYMMDMODE_MASK 0xE00UL

#define	_RAC_RX_SYMMDMODE_notuse_5 0x00000005UL

#define	_RAC_RX_SYMMDMODE_notuse_6 0x00000006UL

#define	_RAC_RX_SYMMDMODE_notuse_7 0x00000007UL

#define	_RAC_RX_SYMMDMODE_qnc_dsm2 0x00000002UL

#define	_RAC_RX_SYMMDMODE_qnc_dsm3 0x00000003UL

#define	_RAC_RX_SYMMDMODE_rx_w_swctrl 0x00000000UL

#define	_RAC_RX_SYMMDMODE_rx_wo_swctrl 0x00000001UL

#define	_RAC_RX_SYMMDMODE_rxlp_wo_swctrl 0x00000004UL

#define	_RAC_RX_SYMMDMODE_SHIFT 9

#define	_RAC_RX_SYPFDCHPLPEN_DEFAULT 0x00000000UL

#define	_RAC_RX_SYPFDCHPLPEN_disable 0x00000000UL

#define	_RAC_RX_SYPFDCHPLPEN_enable 0x00000001UL

#define	_RAC_RX_SYPFDCHPLPEN_MASK 0x1000UL

#define	_RAC_RX_SYPFDCHPLPEN_SHIFT 12

#define	_RAC_RX_SYPFDFPWEN_DEFAULT 0x00000000UL

#define	_RAC_RX_SYPFDFPWEN_disable 0x00000000UL

#define	_RAC_RX_SYPFDFPWEN_enable 0x00000001UL

#define	_RAC_RX_SYPFDFPWEN_MASK 0x2000UL

#define	_RAC_RX_SYPFDFPWEN_SHIFT 13

#define	_RAC_RXENSRCEN_CHANNELBUSYEN_DEFAULT 0x00000000UL

#define	_RAC_RXENSRCEN_CHANNELBUSYEN_MASK 0x100UL

#define	_RAC_RXENSRCEN_CHANNELBUSYEN_SHIFT 8

#define	_RAC_RXENSRCEN_DEMODRXREQEN_DEFAULT 0x00000000UL

#define	_RAC_RXENSRCEN_DEMODRXREQEN_MASK 0x1000UL

#define	_RAC_RXENSRCEN_DEMODRXREQEN_SHIFT 12

#define	_RAC_RXENSRCEN_FRAMEDETEN_DEFAULT 0x00000000UL

#define	_RAC_RXENSRCEN_FRAMEDETEN_MASK 0x800UL

#define	_RAC_RXENSRCEN_FRAMEDETEN_SHIFT 11

#define	_RAC_RXENSRCEN_MASK 0x00003FFFUL

#define	_RAC_RXENSRCEN_PREDETEN_DEFAULT 0x00000000UL

#define	_RAC_RXENSRCEN_PREDETEN_MASK 0x400UL

#define	_RAC_RXENSRCEN_PREDETEN_SHIFT 10

#define	_RAC_RXENSRCEN_PRSRXEN_DEFAULT 0x00000000UL

#define	_RAC_RXENSRCEN_PRSRXEN_MASK 0x2000UL

#define	_RAC_RXENSRCEN_PRSRXEN_SHIFT 13

#define	_RAC_RXENSRCEN_RESETVALUE 0x00000000UL

#define	_RAC_RXENSRCEN_SWRXEN_DEFAULT 0x00000000UL

#define	_RAC_RXENSRCEN_SWRXEN_MASK 0xFFUL

#define	_RAC_RXENSRCEN_SWRXEN_SHIFT 0

#define	_RAC_RXENSRCEN_TIMDETEN_DEFAULT 0x00000000UL

#define	_RAC_RXENSRCEN_TIMDETEN_MASK 0x200UL

#define	_RAC_RXENSRCEN_TIMDETEN_SHIFT 9

#define	_RAC_SCRATCH0_MASK 0xFFFFFFFFUL

#define	_RAC_SCRATCH0_RESETVALUE 0x00000000UL

#define	_RAC_SCRATCH0_SCRATCH0_DEFAULT 0x00000000UL

#define	_RAC_SCRATCH0_SCRATCH0_MASK 0xFFFFFFFFUL

#define	_RAC_SCRATCH0_SCRATCH0_SHIFT 0

#define	_RAC_SCRATCH1_MASK 0xFFFFFFFFUL

#define	_RAC_SCRATCH1_RESETVALUE 0x00000000UL

#define	_RAC_SCRATCH1_SCRATCH1_DEFAULT 0x00000000UL

#define	_RAC_SCRATCH1_SCRATCH1_MASK 0xFFFFFFFFUL

#define	_RAC_SCRATCH1_SCRATCH1_SHIFT 0

#define	_RAC_SCRATCH2_MASK 0xFFFFFFFFUL

#define	_RAC_SCRATCH2_RESETVALUE 0x00000000UL

#define	_RAC_SCRATCH2_SCRATCH2_DEFAULT 0x00000000UL

#define	_RAC_SCRATCH2_SCRATCH2_MASK 0xFFFFFFFFUL

#define	_RAC_SCRATCH2_SCRATCH2_SHIFT 0

#define	_RAC_SCRATCH3_MASK 0xFFFFFFFFUL

#define	_RAC_SCRATCH3_RESETVALUE 0x00000000UL

#define	_RAC_SCRATCH3_SCRATCH3_DEFAULT 0x00000000UL

#define	_RAC_SCRATCH3_SCRATCH3_MASK 0xFFFFFFFFUL

#define	_RAC_SCRATCH3_SCRATCH3_SHIFT 0

#define	_RAC_SCRATCH4_MASK 0xFFFFFFFFUL

#define	_RAC_SCRATCH4_RESETVALUE 0x00000000UL

#define	_RAC_SCRATCH4_SCRATCH4_DEFAULT 0x00000000UL

#define	_RAC_SCRATCH4_SCRATCH4_MASK 0xFFFFFFFFUL

#define	_RAC_SCRATCH4_SCRATCH4_SHIFT 0

#define	_RAC_SCRATCH5_MASK 0xFFFFFFFFUL

#define	_RAC_SCRATCH5_RESETVALUE 0x00000000UL

#define	_RAC_SCRATCH5_SCRATCH5_DEFAULT 0x00000000UL

#define	_RAC_SCRATCH5_SCRATCH5_MASK 0xFFFFFFFFUL

#define	_RAC_SCRATCH5_SCRATCH5_SHIFT 0

#define	_RAC_SCRATCH6_MASK 0xFFFFFFFFUL

#define	_RAC_SCRATCH6_RESETVALUE 0x00000000UL

#define	_RAC_SCRATCH6_SCRATCH6_DEFAULT 0x00000000UL

#define	_RAC_SCRATCH6_SCRATCH6_MASK 0xFFFFFFFFUL

#define	_RAC_SCRATCH6_SCRATCH6_SHIFT 0

#define	_RAC_SCRATCH7_MASK 0xFFFFFFFFUL

#define	_RAC_SCRATCH7_RESETVALUE 0x00000000UL

#define	_RAC_SCRATCH7_SCRATCH7_DEFAULT 0x00000000UL

#define	_RAC_SCRATCH7_SCRATCH7_MASK 0xFFFFFFFFUL

#define	_RAC_SCRATCH7_SCRATCH7_SHIFT 0

#define	_RAC_SEQCMD_ABORT_DEFAULT 0x00000000UL

#define	_RAC_SEQCMD_ABORT_MASK 0x20UL

#define	_RAC_SEQCMD_ABORT_SHIFT 5

#define	_RAC_SEQCMD_ABORTENCLEAR_DEFAULT 0x00000000UL

#define	_RAC_SEQCMD_ABORTENCLEAR_MASK 0x80UL

#define	_RAC_SEQCMD_ABORTENCLEAR_SHIFT 7

#define	_RAC_SEQCMD_ABORTENSET_DEFAULT 0x00000000UL

#define	_RAC_SEQCMD_ABORTENSET_MASK 0x40UL

#define	_RAC_SEQCMD_ABORTENSET_SHIFT 6

#define	_RAC_SEQCMD_BKPTDIS_DEFAULT 0x00000000UL

#define	_RAC_SEQCMD_BKPTDIS_MASK 0x10UL

#define	_RAC_SEQCMD_BKPTDIS_SHIFT 4

#define	_RAC_SEQCMD_BKPTEN_DEFAULT 0x00000000UL

#define	_RAC_SEQCMD_BKPTEN_MASK 0x8UL

#define	_RAC_SEQCMD_BKPTEN_SHIFT 3

#define	_RAC_SEQCMD_HALT_DEFAULT 0x00000000UL

#define	_RAC_SEQCMD_HALT_MASK 0x1UL

#define	_RAC_SEQCMD_HALT_SHIFT 0

#define	_RAC_SEQCMD_MASK 0x000000FFUL

#define	_RAC_SEQCMD_RESETVALUE 0x00000000UL

#define	_RAC_SEQCMD_RESUME_DEFAULT 0x00000000UL

#define	_RAC_SEQCMD_RESUME_MASK 0x4UL

#define	_RAC_SEQCMD_RESUME_SHIFT 2

#define	_RAC_SEQCMD_STEP_DEFAULT 0x00000000UL

#define	_RAC_SEQCMD_STEP_MASK 0x2UL

#define	_RAC_SEQCMD_STEP_SHIFT 1

#define	_RAC_SEQCTRL_COMPACT_CONTINUE 0x00000001UL

#define	_RAC_SEQCTRL_COMPACT_DEFAULT 0x00000000UL

#define	_RAC_SEQCTRL_COMPACT_MASK 0x1UL

#define	_RAC_SEQCTRL_COMPACT_SHIFT 0

#define	_RAC_SEQCTRL_COMPACT_WRAP 0x00000000UL

#define	_RAC_SEQCTRL_COMPINVALMODE_COMPEVENT 0x00000002UL

#define	_RAC_SEQCTRL_COMPINVALMODE_DEFAULT 0x00000000UL

#define	_RAC_SEQCTRL_COMPINVALMODE_MASK 0x6UL

#define	_RAC_SEQCTRL_COMPINVALMODE_NEVER 0x00000000UL

#define	_RAC_SEQCTRL_COMPINVALMODE_SHIFT 1

#define	_RAC_SEQCTRL_COMPINVALMODE_STATECHANGE 0x00000001UL

#define	_RAC_SEQCTRL_COMPINVALMODE_STATECOMP 0x00000003UL

#define	_RAC_SEQCTRL_CPUHALTREQEN_DEFAULT 0x00000000UL

#define	_RAC_SEQCTRL_CPUHALTREQEN_MASK 0x800UL

#define	_RAC_SEQCTRL_CPUHALTREQEN_SHIFT 11

#define	_RAC_SEQCTRL_CPUHALTREQEN_X0 0x00000000UL

#define	_RAC_SEQCTRL_CPUHALTREQEN_X1 0x00000001UL

#define	_RAC_SEQCTRL_MASK 0x00001C07UL

#define	_RAC_SEQCTRL_RESETVALUE 0x00000000UL

#define	_RAC_SEQCTRL_SEQHALTUPONCPUHALTEN_DEFAULT 0x00000000UL

#define	_RAC_SEQCTRL_SEQHALTUPONCPUHALTEN_MASK 0x1000UL

#define	_RAC_SEQCTRL_SEQHALTUPONCPUHALTEN_SHIFT 12

#define	_RAC_SEQCTRL_SEQHALTUPONCPUHALTEN_X0 0x00000000UL

#define	_RAC_SEQCTRL_SEQHALTUPONCPUHALTEN_X1 0x00000001UL

#define	_RAC_SEQCTRL_STIMERDEBUGRUN_DEFAULT 0x00000000UL

#define	_RAC_SEQCTRL_STIMERDEBUGRUN_MASK 0x400UL

#define	_RAC_SEQCTRL_STIMERDEBUGRUN_SHIFT 10

#define	_RAC_SEQCTRL_STIMERDEBUGRUN_X0 0x00000000UL

#define	_RAC_SEQCTRL_STIMERDEBUGRUN_X1 0x00000001UL

#define	_RAC_SEQSTATUS_ABORTEN_DEFAULT 0x00000000UL

#define	_RAC_SEQSTATUS_ABORTEN_MASK 0x400UL

#define	_RAC_SEQSTATUS_ABORTEN_SHIFT 10

#define	_RAC_SEQSTATUS_ABORTEN_X0 0x00000000UL

#define	_RAC_SEQSTATUS_ABORTEN_X1 0x00000001UL

#define	_RAC_SEQSTATUS_BKPT_DEFAULT 0x00000000UL

#define	_RAC_SEQSTATUS_BKPT_MASK 0x2UL

#define	_RAC_SEQSTATUS_BKPT_SHIFT 1

#define	_RAC_SEQSTATUS_CARRY_DEFAULT 0x00000000UL

#define	_RAC_SEQSTATUS_CARRY_MASK 0x100UL

#define	_RAC_SEQSTATUS_CARRY_SHIFT 8

#define	_RAC_SEQSTATUS_DONE_DEFAULT 0x00000001UL

#define	_RAC_SEQSTATUS_DONE_MASK 0x10UL

#define	_RAC_SEQSTATUS_DONE_SHIFT 4

#define	_RAC_SEQSTATUS_MASK 0x000005FFUL

#define	_RAC_SEQSTATUS_NEG_DEFAULT 0x00000000UL

#define	_RAC_SEQSTATUS_NEG_MASK 0x20UL

#define	_RAC_SEQSTATUS_NEG_SHIFT 5

#define	_RAC_SEQSTATUS_POS_DEFAULT 0x00000000UL

#define	_RAC_SEQSTATUS_POS_MASK 0x40UL

#define	_RAC_SEQSTATUS_POS_SHIFT 6

#define	_RAC_SEQSTATUS_RESETVALUE 0x00000010UL

#define	_RAC_SEQSTATUS_STOPPED_DEFAULT 0x00000000UL

#define	_RAC_SEQSTATUS_STOPPED_MASK 0x1UL

#define	_RAC_SEQSTATUS_STOPPED_SHIFT 0

#define	_RAC_SEQSTATUS_WAITING_DEFAULT 0x00000000UL

#define	_RAC_SEQSTATUS_WAITING_MASK 0x4UL

#define	_RAC_SEQSTATUS_WAITING_SHIFT 2

#define	_RAC_SEQSTATUS_WAITMODE_ALL 0x00000001UL

#define	_RAC_SEQSTATUS_WAITMODE_ANY 0x00000000UL

#define	_RAC_SEQSTATUS_WAITMODE_DEFAULT 0x00000000UL

#define	_RAC_SEQSTATUS_WAITMODE_MASK 0x8UL

#define	_RAC_SEQSTATUS_WAITMODE_SHIFT 3

#define	_RAC_SEQSTATUS_ZERO_DEFAULT 0x00000000UL

#define	_RAC_SEQSTATUS_ZERO_MASK 0x80UL

#define	_RAC_SEQSTATUS_ZERO_SHIFT 7

#define	_RAC_SR0_MASK 0xFFFFFFFFUL

#define	_RAC_SR0_RESETVALUE 0x00000000UL

#define	_RAC_SR0_SR0_DEFAULT 0x00000000UL

#define	_RAC_SR0_SR0_MASK 0xFFFFFFFFUL

#define	_RAC_SR0_SR0_SHIFT 0

#define	_RAC_SR1_MASK 0xFFFFFFFFUL

#define	_RAC_SR1_RESETVALUE 0x00000000UL

#define	_RAC_SR1_SR1_DEFAULT 0x00000000UL

#define	_RAC_SR1_SR1_MASK 0xFFFFFFFFUL

#define	_RAC_SR1_SR1_SHIFT 0

#define	_RAC_SR2_MASK 0xFFFFFFFFUL

#define	_RAC_SR2_RESETVALUE 0x00000000UL

#define	_RAC_SR2_SR2_DEFAULT 0x00000000UL

#define	_RAC_SR2_SR2_MASK 0xFFFFFFFFUL

#define	_RAC_SR2_SR2_SHIFT 0

#define	_RAC_SR3_MASK 0xFFFFFFFFUL

#define	_RAC_SR3_RESETVALUE 0x00000000UL

#define	_RAC_SR3_SR3_DEFAULT 0x00000000UL

#define	_RAC_SR3_SR3_MASK 0xFFFFFFFFUL

#define	_RAC_SR3_SR3_SHIFT 0

#define	_RAC_STATUS2_MASK 0x00000FFFUL

#define	_RAC_STATUS2_PREVSTATE1_DEFAULT 0x00000000UL

#define	_RAC_STATUS2_PREVSTATE1_MASK 0xFUL

#define	_RAC_STATUS2_PREVSTATE1_OFF 0x00000000UL

#define	_RAC_STATUS2_PREVSTATE1_RX2RX 0x00000005UL

#define	_RAC_STATUS2_PREVSTATE1_RX2TX 0x00000007UL

#define	_RAC_STATUS2_PREVSTATE1_RXFRAME 0x00000003UL

#define	_RAC_STATUS2_PREVSTATE1_RXOVERFLOW 0x00000006UL

#define	_RAC_STATUS2_PREVSTATE1_RXPD 0x00000004UL

#define	_RAC_STATUS2_PREVSTATE1_RXSEARCH 0x00000002UL

#define	_RAC_STATUS2_PREVSTATE1_RXWARM 0x00000001UL

#define	_RAC_STATUS2_PREVSTATE1_SHIFT 0

#define	_RAC_STATUS2_PREVSTATE1_SHUTDOWN 0x0000000DUL

#define	_RAC_STATUS2_PREVSTATE1_TX 0x00000009UL

#define	_RAC_STATUS2_PREVSTATE1_TX2RX 0x0000000BUL

#define	_RAC_STATUS2_PREVSTATE1_TX2TX 0x0000000CUL

#define	_RAC_STATUS2_PREVSTATE1_TXPD 0x0000000AUL

#define	_RAC_STATUS2_PREVSTATE1_TXWARM 0x00000008UL

#define	_RAC_STATUS2_PREVSTATE2_DEFAULT 0x00000000UL

#define	_RAC_STATUS2_PREVSTATE2_MASK 0xF0UL

#define	_RAC_STATUS2_PREVSTATE2_OFF 0x00000000UL

#define	_RAC_STATUS2_PREVSTATE2_RX2RX 0x00000005UL

#define	_RAC_STATUS2_PREVSTATE2_RX2TX 0x00000007UL

#define	_RAC_STATUS2_PREVSTATE2_RXFRAME 0x00000003UL

#define	_RAC_STATUS2_PREVSTATE2_RXOVERFLOW 0x00000006UL

#define	_RAC_STATUS2_PREVSTATE2_RXPD 0x00000004UL

#define	_RAC_STATUS2_PREVSTATE2_RXSEARCH 0x00000002UL

#define	_RAC_STATUS2_PREVSTATE2_RXWARM 0x00000001UL

#define	_RAC_STATUS2_PREVSTATE2_SHIFT 4

#define	_RAC_STATUS2_PREVSTATE2_SHUTDOWN 0x0000000DUL

#define	_RAC_STATUS2_PREVSTATE2_TX 0x00000009UL

#define	_RAC_STATUS2_PREVSTATE2_TX2RX 0x0000000BUL

#define	_RAC_STATUS2_PREVSTATE2_TX2TX 0x0000000CUL

#define	_RAC_STATUS2_PREVSTATE2_TXPD 0x0000000AUL

#define	_RAC_STATUS2_PREVSTATE2_TXWARM 0x00000008UL

#define	_RAC_STATUS2_PREVSTATE3_DEFAULT 0x00000000UL

#define	_RAC_STATUS2_PREVSTATE3_MASK 0xF00UL

#define	_RAC_STATUS2_PREVSTATE3_OFF 0x00000000UL

#define	_RAC_STATUS2_PREVSTATE3_RX2RX 0x00000005UL

#define	_RAC_STATUS2_PREVSTATE3_RX2TX 0x00000007UL

#define	_RAC_STATUS2_PREVSTATE3_RXFRAME 0x00000003UL

#define	_RAC_STATUS2_PREVSTATE3_RXOVERFLOW 0x00000006UL

#define	_RAC_STATUS2_PREVSTATE3_RXPD 0x00000004UL

#define	_RAC_STATUS2_PREVSTATE3_RXSEARCH 0x00000002UL

#define	_RAC_STATUS2_PREVSTATE3_RXWARM 0x00000001UL

#define	_RAC_STATUS2_PREVSTATE3_SHIFT 8

#define	_RAC_STATUS2_PREVSTATE3_SHUTDOWN 0x0000000DUL

#define	_RAC_STATUS2_PREVSTATE3_TX 0x00000009UL

#define	_RAC_STATUS2_PREVSTATE3_TX2RX 0x0000000BUL

#define	_RAC_STATUS2_PREVSTATE3_TX2TX 0x0000000CUL

#define	_RAC_STATUS2_PREVSTATE3_TXPD 0x0000000AUL

#define	_RAC_STATUS2_PREVSTATE3_TXWARM 0x00000008UL

#define	_RAC_STATUS2_RESETVALUE 0x00000000UL

#define	_RAC_STATUS_FORCESTATEACTIVE_DEFAULT 0x00000000UL

#define	_RAC_STATUS_FORCESTATEACTIVE_MASK 0x80000UL

#define	_RAC_STATUS_FORCESTATEACTIVE_SHIFT 19

#define	_RAC_STATUS_FORCESTATEACTIVE_X0 0x00000000UL

#define	_RAC_STATUS_FORCESTATEACTIVE_X1 0x00000001UL

#define	_RAC_STATUS_MASK 0xEF38FFFFUL

#define	_RAC_STATUS_RESETVALUE 0x00000000UL

#define	_RAC_STATUS_RXENS_DEFAULT 0x00000000UL

#define	_RAC_STATUS_RXENS_MASK 0x80000000UL

#define	_RAC_STATUS_RXENS_SHIFT 31

#define	_RAC_STATUS_RXENS_X0 0x00000000UL

#define	_RAC_STATUS_RXENS_X1 0x00000001UL

#define	_RAC_STATUS_RXMASK_DEFAULT 0x00000000UL

#define	_RAC_STATUS_RXMASK_MASK 0xFFFFUL

#define	_RAC_STATUS_RXMASK_SHIFT 0

#define	_RAC_STATUS_STATE_DEFAULT 0x00000000UL

#define	_RAC_STATUS_STATE_MASK 0xF000000UL

#define	_RAC_STATUS_STATE_OFF 0x00000000UL

#define	_RAC_STATUS_STATE_RX2RX 0x00000005UL

#define	_RAC_STATUS_STATE_RX2TX 0x00000007UL

#define	_RAC_STATUS_STATE_RXFRAME 0x00000003UL

#define	_RAC_STATUS_STATE_RXOVERFLOW 0x00000006UL

#define	_RAC_STATUS_STATE_RXPD 0x00000004UL

#define	_RAC_STATUS_STATE_RXSEARCH 0x00000002UL

#define	_RAC_STATUS_STATE_RXWARM 0x00000001UL

#define	_RAC_STATUS_STATE_SHIFT 24

#define	_RAC_STATUS_STATE_SHUTDOWN 0x0000000DUL

#define	_RAC_STATUS_STATE_TX 0x00000009UL

#define	_RAC_STATUS_STATE_TX2RX 0x0000000BUL

#define	_RAC_STATUS_STATE_TX2TX 0x0000000CUL

#define	_RAC_STATUS_STATE_TXPD 0x0000000AUL

#define	_RAC_STATUS_STATE_TXWARM 0x00000008UL

#define	_RAC_STATUS_TXAFTERFRAMEACTIVE_DEFAULT 0x00000000UL

#define	_RAC_STATUS_TXAFTERFRAMEACTIVE_MASK 0x200000UL

#define	_RAC_STATUS_TXAFTERFRAMEACTIVE_SHIFT 21

#define	_RAC_STATUS_TXAFTERFRAMEACTIVE_X0 0x00000000UL

#define	_RAC_STATUS_TXAFTERFRAMEACTIVE_X1 0x00000001UL

#define	_RAC_STATUS_TXAFTERFRAMEPEND_DEFAULT 0x00000000UL

#define	_RAC_STATUS_TXAFTERFRAMEPEND_MASK 0x100000UL

#define	_RAC_STATUS_TXAFTERFRAMEPEND_SHIFT 20

#define	_RAC_STATUS_TXAFTERFRAMEPEND_X0 0x00000000UL

#define	_RAC_STATUS_TXAFTERFRAMEPEND_X1 0x00000001UL

#define	_RAC_STATUS_TXENS_DEFAULT 0x00000000UL

#define	_RAC_STATUS_TXENS_MASK 0x40000000UL

#define	_RAC_STATUS_TXENS_SHIFT 30

#define	_RAC_STATUS_TXENS_X0 0x00000000UL

#define	_RAC_STATUS_TXENS_X1 0x00000001UL

#define	_RAC_STIMER_MASK 0x0000FFFFUL

#define	_RAC_STIMER_RESETVALUE 0x00000000UL

#define	_RAC_STIMER_STIMER_DEFAULT 0x00000000UL

#define	_RAC_STIMER_STIMER_MASK 0xFFFFUL

#define	_RAC_STIMER_STIMER_SHIFT 0

#define	_RAC_STIMERCOMP_MASK 0x0000FFFFUL

#define	_RAC_STIMERCOMP_RESETVALUE 0x00000000UL

#define	_RAC_STIMERCOMP_STIMERCOMP_DEFAULT 0x00000000UL

#define	_RAC_STIMERCOMP_STIMERCOMP_MASK 0xFFFFUL

#define	_RAC_STIMERCOMP_STIMERCOMP_SHIFT 0

#define	_RAC_SYCAL_MASK 0x03018700UL

#define	_RAC_SYCAL_RESETVALUE 0x01008100UL

#define	_RAC_SYCAL_SYHILOADCHPREG_DEFAULT 0x00000001UL

#define	_RAC_SYCAL_SYHILOADCHPREG_i_350uA 0x00000000UL

#define	_RAC_SYCAL_SYHILOADCHPREG_i_500uA 0x00000001UL

#define	_RAC_SYCAL_SYHILOADCHPREG_i_550uA 0x00000002UL

#define	_RAC_SYCAL_SYHILOADCHPREG_i_700uA 0x00000003UL

#define	_RAC_SYCAL_SYHILOADCHPREG_MASK 0x3000000UL

#define	_RAC_SYCAL_SYHILOADCHPREG_SHIFT 24

#define	_RAC_SYCAL_SYVCOMODEPKD_DEFAULT 0x00000001UL

#define	_RAC_SYCAL_SYVCOMODEPKD_MASK 0x100UL

#define	_RAC_SYCAL_SYVCOMODEPKD_SHIFT 8

#define	_RAC_SYCAL_SYVCOMODEPKD_t_openloop_0 0x00000000UL

#define	_RAC_SYCAL_SYVCOMODEPKD_t_pkdetect_1 0x00000001UL

#define	_RAC_SYCAL_SYVCOMORECURRENT_DEFAULT 0x00000000UL

#define	_RAC_SYCAL_SYVCOMORECURRENT_MASK 0x200UL

#define	_RAC_SYCAL_SYVCOMORECURRENT_more_current_0 0x00000000UL

#define	_RAC_SYCAL_SYVCOMORECURRENT_more_current_1 0x00000001UL

#define	_RAC_SYCAL_SYVCOMORECURRENT_SHIFT 9

#define	_RAC_SYCAL_SYVCOSLOWNOISEFILTER_DEFAULT 0x00000000UL

#define	_RAC_SYCAL_SYVCOSLOWNOISEFILTER_MASK 0x400UL

#define	_RAC_SYCAL_SYVCOSLOWNOISEFILTER_SHIFT 10

#define	_RAC_SYCAL_SYVCOSLOWNOISEFILTER_slow_noise_filter_0 0x00000000UL

#define	_RAC_SYCAL_SYVCOSLOWNOISEFILTER_slow_noise_filter_1 0x00000001UL

#define	_RAC_SYCAL_SYVCOVCAPVCM_DEFAULT 0x00000001UL

#define	_RAC_SYCAL_SYVCOVCAPVCM_MASK 0x18000UL

#define	_RAC_SYCAL_SYVCOVCAPVCM_SHIFT 15

#define	_RAC_SYEN_MASK 0x00007FFFUL

#define	_RAC_SYEN_RESETVALUE 0x00000000UL

#define	_RAC_SYEN_SYCHPEN_DEFAULT 0x00000000UL

#define	_RAC_SYEN_SYCHPEN_disable 0x00000000UL

#define	_RAC_SYEN_SYCHPEN_enable 0x00000001UL

#define	_RAC_SYEN_SYCHPEN_MASK 0x1UL

#define	_RAC_SYEN_SYCHPEN_SHIFT 0

#define	_RAC_SYEN_SYCHPLPEN_DEFAULT 0x00000000UL

#define	_RAC_SYEN_SYCHPLPEN_disable 0x00000000UL

#define	_RAC_SYEN_SYCHPLPEN_enable 0x00000001UL

#define	_RAC_SYEN_SYCHPLPEN_MASK 0x2UL

#define	_RAC_SYEN_SYCHPLPEN_SHIFT 1

#define	_RAC_SYEN_SYENCHPREG_DEFAULT 0x00000000UL

#define	_RAC_SYEN_SYENCHPREG_Disable 0x00000000UL

#define	_RAC_SYEN_SYENCHPREG_Enable 0x00000001UL

#define	_RAC_SYEN_SYENCHPREG_MASK 0x4UL

#define	_RAC_SYEN_SYENCHPREG_SHIFT 2

#define	_RAC_SYEN_SYENCHPREPLICA_DEFAULT 0x00000000UL

#define	_RAC_SYEN_SYENCHPREPLICA_disable 0x00000000UL

#define	_RAC_SYEN_SYENCHPREPLICA_enable 0x00000001UL

#define	_RAC_SYEN_SYENCHPREPLICA_MASK 0x8UL

#define	_RAC_SYEN_SYENCHPREPLICA_SHIFT 3

#define	_RAC_SYEN_SYENMMDREG_DEFAULT 0x00000000UL

#define	_RAC_SYEN_SYENMMDREG_Disable 0x00000000UL

#define	_RAC_SYEN_SYENMMDREG_Enable 0x00000001UL

#define	_RAC_SYEN_SYENMMDREG_MASK 0x10UL

#define	_RAC_SYEN_SYENMMDREG_SHIFT 4

#define	_RAC_SYEN_SYENMMDREPLICA1_DEFAULT 0x00000000UL

#define	_RAC_SYEN_SYENMMDREPLICA1_disable 0x00000000UL

#define	_RAC_SYEN_SYENMMDREPLICA1_enable 0x00000001UL

#define	_RAC_SYEN_SYENMMDREPLICA1_MASK 0x20UL

#define	_RAC_SYEN_SYENMMDREPLICA1_SHIFT 5

#define	_RAC_SYEN_SYENMMDREPLICA2_DEFAULT 0x00000000UL

#define	_RAC_SYEN_SYENMMDREPLICA2_Disable 0x00000000UL

#define	_RAC_SYEN_SYENMMDREPLICA2_Enable 0x00000001UL

#define	_RAC_SYEN_SYENMMDREPLICA2_MASK 0x40UL

#define	_RAC_SYEN_SYENMMDREPLICA2_SHIFT 6

#define	_RAC_SYEN_SYENVCOBIAS_DEFAULT 0x00000000UL

#define	_RAC_SYEN_SYENVCOBIAS_en_vco_bias_0 0x00000000UL

#define	_RAC_SYEN_SYENVCOBIAS_en_vco_bias_1 0x00000001UL

#define	_RAC_SYEN_SYENVCOBIAS_MASK 0x80UL

#define	_RAC_SYEN_SYENVCOBIAS_SHIFT 7

#define	_RAC_SYEN_SYENVCOPFET_DEFAULT 0x00000000UL

#define	_RAC_SYEN_SYENVCOPFET_en_vco_pfet_0 0x00000000UL

#define	_RAC_SYEN_SYENVCOPFET_en_vco_pfet_1 0x00000001UL

#define	_RAC_SYEN_SYENVCOPFET_MASK 0x100UL

#define	_RAC_SYEN_SYENVCOPFET_SHIFT 8

#define	_RAC_SYEN_SYENVCOREG_DEFAULT 0x00000000UL

#define	_RAC_SYEN_SYENVCOREG_en_vco_reg_0 0x00000000UL

#define	_RAC_SYEN_SYENVCOREG_en_vco_reg_1 0x00000001UL

#define	_RAC_SYEN_SYENVCOREG_MASK 0x200UL

#define	_RAC_SYEN_SYENVCOREG_SHIFT 9

#define	_RAC_SYEN_SYLODIVEN_DEFAULT 0x00000000UL

#define	_RAC_SYEN_SYLODIVEN_disable 0x00000000UL

#define	_RAC_SYEN_SYLODIVEN_enable 0x00000001UL

#define	_RAC_SYEN_SYLODIVEN_MASK 0x400UL

#define	_RAC_SYEN_SYLODIVEN_SHIFT 10

#define	_RAC_SYEN_SYLODIVLDOBIASEN_DEFAULT 0x00000000UL

#define	_RAC_SYEN_SYLODIVLDOBIASEN_disable 0x00000000UL

#define	_RAC_SYEN_SYLODIVLDOBIASEN_enable 0x00000001UL

#define	_RAC_SYEN_SYLODIVLDOBIASEN_MASK 0x800UL

#define	_RAC_SYEN_SYLODIVLDOBIASEN_SHIFT 11

#define	_RAC_SYEN_SYLODIVLDOEN_DEFAULT 0x00000000UL

#define	_RAC_SYEN_SYLODIVLDOEN_disable 0x00000000UL

#define	_RAC_SYEN_SYLODIVLDOEN_enable 0x00000001UL

#define	_RAC_SYEN_SYLODIVLDOEN_MASK 0x1000UL

#define	_RAC_SYEN_SYLODIVLDOEN_SHIFT 12

#define	_RAC_SYEN_SYSTARTCHPREG_DEFAULT 0x00000000UL

#define	_RAC_SYEN_SYSTARTCHPREG_fast_startup 0x00000001UL

#define	_RAC_SYEN_SYSTARTCHPREG_MASK 0x2000UL

#define	_RAC_SYEN_SYSTARTCHPREG_no_fast_startup 0x00000000UL

#define	_RAC_SYEN_SYSTARTCHPREG_SHIFT 13

#define	_RAC_SYEN_SYSTARTMMDREG_DEFAULT 0x00000000UL

#define	_RAC_SYEN_SYSTARTMMDREG_fast_startup 0x00000001UL

#define	_RAC_SYEN_SYSTARTMMDREG_MASK 0x4000UL

#define	_RAC_SYEN_SYSTARTMMDREG_no_fast_startup 0x00000000UL

#define	_RAC_SYEN_SYSTARTMMDREG_SHIFT 14

#define	_RAC_SYLOEN_MASK 0x00001FFFUL

#define	_RAC_SYLOEN_RESETVALUE 0x00000000UL

#define	_RAC_SYLOEN_SYLODIVRLO12G4EN_DEFAULT 0x00000000UL

#define	_RAC_SYLOEN_SYLODIVRLO12G4EN_disable 0x00000000UL

#define	_RAC_SYLOEN_SYLODIVRLO12G4EN_enable 0x00000001UL

#define	_RAC_SYLOEN_SYLODIVRLO12G4EN_MASK 0x2UL

#define	_RAC_SYLOEN_SYLODIVRLO12G4EN_SHIFT 1

#define	_RAC_SYLOEN_SYLODIVRLO22G4EN_DEFAULT 0x00000000UL

#define	_RAC_SYLOEN_SYLODIVRLO22G4EN_disable 0x00000000UL

#define	_RAC_SYLOEN_SYLODIVRLO22G4EN_enable 0x00000001UL

#define	_RAC_SYLOEN_SYLODIVRLO22G4EN_MASK 0x8UL

#define	_RAC_SYLOEN_SYLODIVRLO22G4EN_SHIFT 3

#define	_RAC_SYLOEN_SYLODIVRLOADCCLK2G4EN_DEFAULT 0x00000000UL

#define	_RAC_SYLOEN_SYLODIVRLOADCCLK2G4EN_disable 0x00000000UL

#define	_RAC_SYLOEN_SYLODIVRLOADCCLK2G4EN_enable 0x00000001UL

#define	_RAC_SYLOEN_SYLODIVRLOADCCLK2G4EN_MASK 0x1UL

#define	_RAC_SYLOEN_SYLODIVRLOADCCLK2G4EN_SHIFT 0

#define	_RAC_SYLOEN_SYLODIVTLO0DBM2G4AUXEN_DEFAULT 0x00000000UL

#define	_RAC_SYLOEN_SYLODIVTLO0DBM2G4AUXEN_disable 0x00000000UL

#define	_RAC_SYLOEN_SYLODIVTLO0DBM2G4AUXEN_enable 0x00000001UL

#define	_RAC_SYLOEN_SYLODIVTLO0DBM2G4AUXEN_MASK 0x20UL

#define	_RAC_SYLOEN_SYLODIVTLO0DBM2G4AUXEN_SHIFT 5

#define	_RAC_SYLOEN_SYLODIVTLO0DBM2G4EN_DEFAULT 0x00000000UL

#define	_RAC_SYLOEN_SYLODIVTLO0DBM2G4EN_disable 0x00000000UL

#define	_RAC_SYLOEN_SYLODIVTLO0DBM2G4EN_enable 0x00000001UL

#define	_RAC_SYLOEN_SYLODIVTLO0DBM2G4EN_MASK 0x40UL

#define	_RAC_SYLOEN_SYLODIVTLO0DBM2G4EN_SHIFT 6

#define	_RAC_SYLOEN_SYLODIVTLO20DBM2G4AUXEN_DEFAULT 0x00000000UL

#define	_RAC_SYLOEN_SYLODIVTLO20DBM2G4AUXEN_disable 0x00000000UL

#define	_RAC_SYLOEN_SYLODIVTLO20DBM2G4AUXEN_enable 0x00000001UL

#define	_RAC_SYLOEN_SYLODIVTLO20DBM2G4AUXEN_MASK 0x200UL

#define	_RAC_SYLOEN_SYLODIVTLO20DBM2G4AUXEN_SHIFT 9

#define	_RAC_SYLOEN_SYLODIVTLO20DBM2G4EN_DEFAULT 0x00000000UL

#define	_RAC_SYLOEN_SYLODIVTLO20DBM2G4EN_disable 0x00000000UL

#define	_RAC_SYLOEN_SYLODIVTLO20DBM2G4EN_enable 0x00000001UL

#define	_RAC_SYLOEN_SYLODIVTLO20DBM2G4EN_MASK 0x400UL

#define	_RAC_SYLOEN_SYLODIVTLO20DBM2G4EN_SHIFT 10

#define	_RAC_SYMMDCTRL_MASK 0x00000007UL

#define	_RAC_SYMMDCTRL_RESETVALUE 0x00000000UL

#define	_RAC_SYMMDCTRL_SYMMDDIVRSDIG_DEFAULT 0x00000000UL

#define	_RAC_SYMMDCTRL_SYMMDDIVRSDIG_Divideby1 0x00000000UL

#define	_RAC_SYMMDCTRL_SYMMDDIVRSDIG_Divideby2 0x00000001UL

#define	_RAC_SYMMDCTRL_SYMMDDIVRSDIG_Divideby4 0x00000002UL

#define	_RAC_SYMMDCTRL_SYMMDDIVRSDIG_Divideby8 0x00000003UL

#define	_RAC_SYMMDCTRL_SYMMDDIVRSDIG_MASK 0x6UL

#define	_RAC_SYMMDCTRL_SYMMDDIVRSDIG_SHIFT 1

#define	_RAC_SYMMDCTRL_SYMMDENRSDIG_DEFAULT 0x00000000UL

#define	_RAC_SYMMDCTRL_SYMMDENRSDIG_disable 0x00000000UL

#define	_RAC_SYMMDCTRL_SYMMDENRSDIG_enable 0x00000001UL

#define	_RAC_SYMMDCTRL_SYMMDENRSDIG_MASK 0x1UL

#define	_RAC_SYMMDCTRL_SYMMDENRSDIG_SHIFT 0

#define	_RAC_SYNTHCTRL_MASK 0x00000400UL

#define	_RAC_SYNTHCTRL_MMDPOWERBALANCEDISABLE_DEFAULT 0x00000000UL

#define	_RAC_SYNTHCTRL_MMDPOWERBALANCEDISABLE_DisablePowerBleed 0x00000001UL

#define	_RAC_SYNTHCTRL_MMDPOWERBALANCEDISABLE_EnablePowerbleed 0x00000000UL

#define	_RAC_SYNTHCTRL_MMDPOWERBALANCEDISABLE_MASK 0x400UL

#define	_RAC_SYNTHCTRL_MMDPOWERBALANCEDISABLE_SHIFT 10

#define	_RAC_SYNTHCTRL_RESETVALUE 0x00000000UL

#define	_RAC_SYNTHENCTRL_LPFBWSEL_DEFAULT 0x00000000UL

#define	_RAC_SYNTHENCTRL_LPFBWSEL_LPFBWRX 0x00000000UL

#define	_RAC_SYNTHENCTRL_LPFBWSEL_LPFBWTX 0x00000001UL

#define	_RAC_SYNTHENCTRL_LPFBWSEL_MASK 0x100000UL

#define	_RAC_SYNTHENCTRL_LPFBWSEL_SHIFT 20

#define	_RAC_SYNTHENCTRL_MASK 0x00100282UL

#define	_RAC_SYNTHENCTRL_RESETVALUE 0x00000000UL

#define	_RAC_SYNTHENCTRL_VCBUFEN_DEFAULT 0x00000000UL

#define	_RAC_SYNTHENCTRL_VCBUFEN_Disabled 0x00000000UL

#define	_RAC_SYNTHENCTRL_VCBUFEN_Enabled 0x00000001UL

#define	_RAC_SYNTHENCTRL_VCBUFEN_MASK 0x80UL

#define	_RAC_SYNTHENCTRL_VCBUFEN_SHIFT 7

#define	_RAC_SYNTHENCTRL_VCOSTARTUP_DEFAULT 0x00000000UL

#define	_RAC_SYNTHENCTRL_VCOSTARTUP_fast_start_up_0 0x00000000UL

#define	_RAC_SYNTHENCTRL_VCOSTARTUP_fast_start_up_1 0x00000001UL

#define	_RAC_SYNTHENCTRL_VCOSTARTUP_MASK 0x2UL

#define	_RAC_SYNTHENCTRL_VCOSTARTUP_SHIFT 1

#define	_RAC_SYNTHREGCTRL_CHPLDOVREFTRIM_DEFAULT 0x00000004UL

#define	_RAC_SYNTHREGCTRL_CHPLDOVREFTRIM_MASK 0x7000000UL

#define	_RAC_SYNTHREGCTRL_CHPLDOVREFTRIM_SHIFT 24

#define	_RAC_SYNTHREGCTRL_CHPLDOVREFTRIM_vref0p6000 0x00000000UL

#define	_RAC_SYNTHREGCTRL_CHPLDOVREFTRIM_vref0p6125 0x00000001UL

#define	_RAC_SYNTHREGCTRL_CHPLDOVREFTRIM_vref0p6250 0x00000002UL

#define	_RAC_SYNTHREGCTRL_CHPLDOVREFTRIM_vref0p6375 0x00000003UL

#define	_RAC_SYNTHREGCTRL_CHPLDOVREFTRIM_vref0p6500 0x00000004UL

#define	_RAC_SYNTHREGCTRL_CHPLDOVREFTRIM_vref0p6625 0x00000005UL

#define	_RAC_SYNTHREGCTRL_CHPLDOVREFTRIM_vref0p6750 0x00000006UL

#define	_RAC_SYNTHREGCTRL_CHPLDOVREFTRIM_vref0p6875 0x00000007UL

#define	_RAC_SYNTHREGCTRL_MASK 0x07001C00UL

#define	_RAC_SYNTHREGCTRL_MMDLDOVREFTRIM_DEFAULT 0x00000000UL

#define	_RAC_SYNTHREGCTRL_MMDLDOVREFTRIM_MASK 0x1C00UL

#define	_RAC_SYNTHREGCTRL_MMDLDOVREFTRIM_SHIFT 10

#define	_RAC_SYNTHREGCTRL_MMDLDOVREFTRIM_vref0p6000 0x00000000UL

#define	_RAC_SYNTHREGCTRL_MMDLDOVREFTRIM_vref0p6125 0x00000001UL

#define	_RAC_SYNTHREGCTRL_MMDLDOVREFTRIM_vref0p6250 0x00000002UL

#define	_RAC_SYNTHREGCTRL_MMDLDOVREFTRIM_vref0p6375 0x00000003UL

#define	_RAC_SYNTHREGCTRL_MMDLDOVREFTRIM_vref0p6500 0x00000004UL

#define	_RAC_SYNTHREGCTRL_MMDLDOVREFTRIM_vref0p6625 0x00000005UL

#define	_RAC_SYNTHREGCTRL_MMDLDOVREFTRIM_vref0p6750 0x00000006UL

#define	_RAC_SYNTHREGCTRL_MMDLDOVREFTRIM_vref0p6875 0x00000007UL

#define	_RAC_SYNTHREGCTRL_RESETVALUE 0x04000000UL

#define	_RAC_SYTRIM0_MASK 0x003FEFFFUL

#define	_RAC_SYTRIM0_RESETVALUE 0x00062E29UL

#define	_RAC_SYTRIM0_SYCHPBIAS_bias_0 0x00000000UL

#define	_RAC_SYTRIM0_SYCHPBIAS_bias_1 0x00000001UL

#define	_RAC_SYTRIM0_SYCHPBIAS_bias_2 0x00000003UL

#define	_RAC_SYTRIM0_SYCHPBIAS_bias_3 0x00000007UL

#define	_RAC_SYTRIM0_SYCHPBIAS_DEFAULT 0x00000001UL

#define	_RAC_SYTRIM0_SYCHPBIAS_MASK 0x7UL

#define	_RAC_SYTRIM0_SYCHPBIAS_SHIFT 0

#define	_RAC_SYTRIM0_SYCHPCURR_curr_1p5uA 0x00000000UL

#define	_RAC_SYTRIM0_SYCHPCURR_curr_2p0uA 0x00000001UL

#define	_RAC_SYTRIM0_SYCHPCURR_curr_2p5uA 0x00000002UL

#define	_RAC_SYTRIM0_SYCHPCURR_curr_3p0uA 0x00000003UL

#define	_RAC_SYTRIM0_SYCHPCURR_curr_3p5uA 0x00000004UL

#define	_RAC_SYTRIM0_SYCHPCURR_curr_4p0uA 0x00000005UL

#define	_RAC_SYTRIM0_SYCHPCURR_curr_4p5uA 0x00000006UL

#define	_RAC_SYTRIM0_SYCHPCURR_curr_5p0uA 0x00000007UL

#define	_RAC_SYTRIM0_SYCHPCURR_DEFAULT 0x00000005UL

#define	_RAC_SYTRIM0_SYCHPCURR_MASK 0x38UL

#define	_RAC_SYTRIM0_SYCHPCURR_SHIFT 3

#define	_RAC_SYTRIM0_SYCHPLEVNSRC_DEFAULT 0x00000000UL

#define	_RAC_SYTRIM0_SYCHPLEVNSRC_MASK 0x1C0UL

#define	_RAC_SYTRIM0_SYCHPLEVNSRC_SHIFT 6

#define	_RAC_SYTRIM0_SYCHPLEVPSRC_DEFAULT 0x00000007UL

#define	_RAC_SYTRIM0_SYCHPLEVPSRC_MASK 0xE00UL

#define	_RAC_SYTRIM0_SYCHPLEVPSRC_SHIFT 9

#define	_RAC_SYTRIM0_SYCHPLEVPSRC_vsrcp_n0m 0x00000007UL

#define	_RAC_SYTRIM0_SYCHPLEVPSRC_vsrcp_n105m 0x00000000UL

#define	_RAC_SYTRIM0_SYCHPLEVPSRC_vsrcp_n15m 0x00000006UL

#define	_RAC_SYTRIM0_SYCHPLEVPSRC_vsrcp_n30m 0x00000005UL

#define	_RAC_SYTRIM0_SYCHPLEVPSRC_vsrcp_n45m 0x00000004UL

#define	_RAC_SYTRIM0_SYCHPLEVPSRC_vsrcp_n60m 0x00000003UL

#define	_RAC_SYTRIM0_SYCHPLEVPSRC_vsrcp_n75m 0x00000002UL

#define	_RAC_SYTRIM0_SYCHPLEVPSRC_vsrcp_n90m 0x00000001UL

#define	_RAC_SYTRIM0_SYCHPREPLICACURRADJ_DEFAULT 0x00000000UL

#define	_RAC_SYTRIM0_SYCHPREPLICACURRADJ_load_16ua 0x00000001UL

#define	_RAC_SYTRIM0_SYCHPREPLICACURRADJ_load_20ua 0x00000002UL

#define	_RAC_SYTRIM0_SYCHPREPLICACURRADJ_load_24ua 0x00000004UL

#define	_RAC_SYTRIM0_SYCHPREPLICACURRADJ_load_28ua 0x00000003UL

#define	_RAC_SYTRIM0_SYCHPREPLICACURRADJ_load_32ua 0x00000005UL

#define	_RAC_SYTRIM0_SYCHPREPLICACURRADJ_load_36ua 0x00000006UL

#define	_RAC_SYTRIM0_SYCHPREPLICACURRADJ_load_44ua 0x00000007UL

#define	_RAC_SYTRIM0_SYCHPREPLICACURRADJ_load_8ua 0x00000000UL

#define	_RAC_SYTRIM0_SYCHPREPLICACURRADJ_MASK 0x1C000UL

#define	_RAC_SYTRIM0_SYCHPREPLICACURRADJ_SHIFT 14

#define	_RAC_SYTRIM0_SYCHPSRCEN_DEFAULT 0x00000001UL

#define	_RAC_SYTRIM0_SYCHPSRCEN_disable 0x00000000UL

#define	_RAC_SYTRIM0_SYCHPSRCEN_enable 0x00000001UL

#define	_RAC_SYTRIM0_SYCHPSRCEN_MASK 0x2000UL

#define	_RAC_SYTRIM0_SYCHPSRCEN_SHIFT 13

#define	_RAC_SYTRIM0_SYTRIMCHPREGAMPBIAS_bias_14uA 0x00000000UL

#define	_RAC_SYTRIM0_SYTRIMCHPREGAMPBIAS_bias_20uA 0x00000001UL

#define	_RAC_SYTRIM0_SYTRIMCHPREGAMPBIAS_bias_26uA 0x00000002UL

#define	_RAC_SYTRIM0_SYTRIMCHPREGAMPBIAS_bias_32uA 0x00000003UL

#define	_RAC_SYTRIM0_SYTRIMCHPREGAMPBIAS_bias_38uA 0x00000004UL

#define	_RAC_SYTRIM0_SYTRIMCHPREGAMPBIAS_bias_44uA 0x00000005UL

#define	_RAC_SYTRIM0_SYTRIMCHPREGAMPBIAS_bias_50uA 0x00000006UL

#define	_RAC_SYTRIM0_SYTRIMCHPREGAMPBIAS_bias_56uA 0x00000007UL

#define	_RAC_SYTRIM0_SYTRIMCHPREGAMPBIAS_DEFAULT 0x00000003UL

#define	_RAC_SYTRIM0_SYTRIMCHPREGAMPBIAS_MASK 0xE0000UL

#define	_RAC_SYTRIM0_SYTRIMCHPREGAMPBIAS_SHIFT 17

#define	_RAC_SYTRIM0_SYTRIMCHPREGAMPBW_C_000f 0x00000000UL

#define	_RAC_SYTRIM0_SYTRIMCHPREGAMPBW_C_300f 0x00000001UL

#define	_RAC_SYTRIM0_SYTRIMCHPREGAMPBW_C_600f 0x00000002UL

#define	_RAC_SYTRIM0_SYTRIMCHPREGAMPBW_C_900f 0x00000003UL

#define	_RAC_SYTRIM0_SYTRIMCHPREGAMPBW_DEFAULT 0x00000000UL

#define	_RAC_SYTRIM0_SYTRIMCHPREGAMPBW_MASK 0x300000UL

#define	_RAC_SYTRIM0_SYTRIMCHPREGAMPBW_SHIFT 20

#define	_RAC_SYTRIM1_MASK 0x0001FFFFUL

#define	_RAC_SYTRIM1_RESETVALUE 0x00003FD0UL

#define	_RAC_SYTRIM1_SYLODIVLDOTRIMCORE_DEFAULT 0x00000000UL

#define	_RAC_SYTRIM1_SYLODIVLDOTRIMCORE_MASK 0x3UL

#define	_RAC_SYTRIM1_SYLODIVLDOTRIMCORE_RXLO 0x00000000UL

#define	_RAC_SYTRIM1_SYLODIVLDOTRIMCORE_SHIFT 0

#define	_RAC_SYTRIM1_SYLODIVLDOTRIMCORE_TXLO 0x00000003UL

#define	_RAC_SYTRIM1_SYLODIVLDOTRIMNDIO_DEFAULT 0x00000004UL

#define	_RAC_SYTRIM1_SYLODIVLDOTRIMNDIO_MASK 0x3CUL

#define	_RAC_SYTRIM1_SYLODIVLDOTRIMNDIO_SHIFT 2

#define	_RAC_SYTRIM1_SYLODIVLDOTRIMNDIO_vreg_1p08 0x00000000UL

#define	_RAC_SYTRIM1_SYLODIVLDOTRIMNDIO_vreg_1p11 0x00000001UL

#define	_RAC_SYTRIM1_SYLODIVLDOTRIMNDIO_vreg_1p15 0x00000002UL

#define	_RAC_SYTRIM1_SYLODIVLDOTRIMNDIO_vreg_1p18 0x00000003UL

#define	_RAC_SYTRIM1_SYLODIVLDOTRIMNDIO_vreg_1p21 0x00000004UL

#define	_RAC_SYTRIM1_SYLODIVLDOTRIMNDIO_vreg_1p24 0x00000005UL

#define	_RAC_SYTRIM1_SYLODIVLDOTRIMNDIO_vreg_1p27 0x00000006UL

#define	_RAC_SYTRIM1_SYLODIVLDOTRIMNDIO_vreg_1p29 0x00000007UL

#define	_RAC_SYTRIM1_SYLODIVLDOTRIMNDIO_vreg_1p32 0x00000008UL

#define	_RAC_SYTRIM1_SYLODIVLDOTRIMNDIO_vreg_1p34 0x00000009UL

#define	_RAC_SYTRIM1_SYMMDREPLICA1CURRADJ_DEFAULT 0x00000007UL

#define	_RAC_SYTRIM1_SYMMDREPLICA1CURRADJ_load_16u 0x00000001UL

#define	_RAC_SYTRIM1_SYMMDREPLICA1CURRADJ_load_20ua 0x00000002UL

#define	_RAC_SYTRIM1_SYMMDREPLICA1CURRADJ_load_24ua 0x00000004UL

#define	_RAC_SYTRIM1_SYMMDREPLICA1CURRADJ_load_28ua 0x00000003UL

#define	_RAC_SYTRIM1_SYMMDREPLICA1CURRADJ_load_32ua 0x00000005UL

#define	_RAC_SYTRIM1_SYMMDREPLICA1CURRADJ_load_36ua 0x00000006UL

#define	_RAC_SYTRIM1_SYMMDREPLICA1CURRADJ_load_44ua 0x00000007UL

#define	_RAC_SYTRIM1_SYMMDREPLICA1CURRADJ_load_8ua 0x00000000UL

#define	_RAC_SYTRIM1_SYMMDREPLICA1CURRADJ_MASK 0x1C0UL

#define	_RAC_SYTRIM1_SYMMDREPLICA1CURRADJ_SHIFT 6

#define	_RAC_SYTRIM1_SYMMDREPLICA2CURRADJ_DEFAULT 0x00000007UL

#define	_RAC_SYTRIM1_SYMMDREPLICA2CURRADJ_load_128u 0x00000003UL

#define	_RAC_SYTRIM1_SYMMDREPLICA2CURRADJ_load_160u 0x00000004UL

#define	_RAC_SYTRIM1_SYMMDREPLICA2CURRADJ_load_192u 0x00000005UL

#define	_RAC_SYTRIM1_SYMMDREPLICA2CURRADJ_load_224u 0x00000006UL

#define	_RAC_SYTRIM1_SYMMDREPLICA2CURRADJ_load_256u 0x00000007UL

#define	_RAC_SYTRIM1_SYMMDREPLICA2CURRADJ_load_32u 0x00000000UL

#define	_RAC_SYTRIM1_SYMMDREPLICA2CURRADJ_load_64u 0x00000001UL

#define	_RAC_SYTRIM1_SYMMDREPLICA2CURRADJ_load_96u 0x00000002UL

#define	_RAC_SYTRIM1_SYMMDREPLICA2CURRADJ_MASK 0xE00UL

#define	_RAC_SYTRIM1_SYMMDREPLICA2CURRADJ_SHIFT 9

#define	_RAC_SYTRIM1_SYTRIMMMDREGAMPBIAS_bias_14uA 0x00000000UL

#define	_RAC_SYTRIM1_SYTRIMMMDREGAMPBIAS_bias_20uA 0x00000001UL

#define	_RAC_SYTRIM1_SYTRIMMMDREGAMPBIAS_bias_26uA 0x00000002UL

#define	_RAC_SYTRIM1_SYTRIMMMDREGAMPBIAS_bias_32uA 0x00000003UL

#define	_RAC_SYTRIM1_SYTRIMMMDREGAMPBIAS_bias_38uA 0x00000004UL

#define	_RAC_SYTRIM1_SYTRIMMMDREGAMPBIAS_bias_44uA 0x00000005UL

#define	_RAC_SYTRIM1_SYTRIMMMDREGAMPBIAS_bias_50uA 0x00000006UL

#define	_RAC_SYTRIM1_SYTRIMMMDREGAMPBIAS_bias_56uA 0x00000007UL

#define	_RAC_SYTRIM1_SYTRIMMMDREGAMPBIAS_DEFAULT 0x00000003UL

#define	_RAC_SYTRIM1_SYTRIMMMDREGAMPBIAS_MASK 0x7000UL

#define	_RAC_SYTRIM1_SYTRIMMMDREGAMPBIAS_SHIFT 12

#define	_RAC_SYTRIM1_SYTRIMMMDREGAMPBW_C_000f 0x00000000UL

#define	_RAC_SYTRIM1_SYTRIMMMDREGAMPBW_C_300f 0x00000001UL

#define	_RAC_SYTRIM1_SYTRIMMMDREGAMPBW_C_600f 0x00000002UL

#define	_RAC_SYTRIM1_SYTRIMMMDREGAMPBW_C_900f 0x00000003UL

#define	_RAC_SYTRIM1_SYTRIMMMDREGAMPBW_DEFAULT 0x00000000UL

#define	_RAC_SYTRIM1_SYTRIMMMDREGAMPBW_MASK 0x18000UL

#define	_RAC_SYTRIM1_SYTRIMMMDREGAMPBW_SHIFT 15

#define	_RAC_TESTCTRL_AUX2RFSENSE_DEFAULT 0x00000000UL

#define	_RAC_TESTCTRL_AUX2RFSENSE_MASK 0x4UL

#define	_RAC_TESTCTRL_AUX2RFSENSE_SHIFT 2

#define	_RAC_TESTCTRL_AUX2RFSENSE_X0 0x00000000UL

#define	_RAC_TESTCTRL_AUX2RFSENSE_X1 0x00000001UL

#define	_RAC_TESTCTRL_DEMODEN_DEFAULT 0x00000000UL

#define	_RAC_TESTCTRL_DEMODEN_MASK 0x2UL

#define	_RAC_TESTCTRL_DEMODEN_SHIFT 1

#define	_RAC_TESTCTRL_LOOPBACK2LNAINPUT_DEFAULT 0x00000000UL

#define	_RAC_TESTCTRL_LOOPBACK2LNAINPUT_MASK 0x8UL

#define	_RAC_TESTCTRL_LOOPBACK2LNAINPUT_SHIFT 3

#define	_RAC_TESTCTRL_LOOPBACK2LNAOUTPUT_DEFAULT 0x00000000UL

#define	_RAC_TESTCTRL_LOOPBACK2LNAOUTPUT_MASK 0x10UL

#define	_RAC_TESTCTRL_LOOPBACK2LNAOUTPUT_SHIFT 4

#define	_RAC_TESTCTRL_MASK 0x0000001FUL

#define	_RAC_TESTCTRL_MODEN_DEFAULT 0x00000000UL

#define	_RAC_TESTCTRL_MODEN_MASK 0x1UL

#define	_RAC_TESTCTRL_MODEN_SHIFT 0

#define	_RAC_TESTCTRL_RESETVALUE 0x00000000UL

#define	_RAC_TX_ENPAPOWER_DEFAULT 0x00000000UL

#define	_RAC_TX_ENPAPOWER_MASK 0x40000000UL

#define	_RAC_TX_ENPAPOWER_SHIFT 30

#define	_RAC_TX_ENPASELSLICE_DEFAULT 0x00000000UL

#define	_RAC_TX_ENPASELSLICE_MASK 0x80000000UL

#define	_RAC_TX_ENPASELSLICE_SHIFT 31

#define	_RAC_TX_ENPATRIMPASLICE0DBM_DEFAULT 0x00000000UL

#define	_RAC_TX_ENPATRIMPASLICE0DBM_MASK 0x400UL

#define	_RAC_TX_ENPATRIMPASLICE0DBM_SHIFT 10

#define	_RAC_TX_ENXOSQBUFFILT_DEFAULT 0x00000000UL

#define	_RAC_TX_ENXOSQBUFFILT_MASK 0x20000000UL

#define	_RAC_TX_ENXOSQBUFFILT_SHIFT 29

#define	_RAC_TX_MASK 0xFF3707FFUL

#define	_RAC_TX_PABLEEDDRVREG0DBM_DEFAULT 0x00000000UL

#define	_RAC_TX_PABLEEDDRVREG0DBM_disable 0x00000000UL

#define	_RAC_TX_PABLEEDDRVREG0DBM_enable 0x00000001UL

#define	_RAC_TX_PABLEEDDRVREG0DBM_MASK 0x1UL

#define	_RAC_TX_PABLEEDDRVREG0DBM_SHIFT 0

#define	_RAC_TX_PABLEEDREG0DBM_DEFAULT 0x00000000UL

#define	_RAC_TX_PABLEEDREG0DBM_disable 0x00000000UL

#define	_RAC_TX_PABLEEDREG0DBM_enable 0x00000001UL

#define	_RAC_TX_PABLEEDREG0DBM_MASK 0x2UL

#define	_RAC_TX_PABLEEDREG0DBM_SHIFT 1

#define	_RAC_TX_PAEN10DBMM_DEFAULT 0x00000000UL

#define	_RAC_TX_PAEN10DBMM_disable 0x00000000UL

#define	_RAC_TX_PAEN10DBMM_enable 0x00000001UL

#define	_RAC_TX_PAEN10DBMM_MASK 0x10000UL

#define	_RAC_TX_PAEN10DBMM_SHIFT 16

#define	_RAC_TX_PAEN10DBMP_DEFAULT 0x00000000UL

#define	_RAC_TX_PAEN10DBMP_disable 0x00000000UL

#define	_RAC_TX_PAEN10DBMP_enable 0x00000001UL

#define	_RAC_TX_PAEN10DBMP_MASK 0x20000UL

#define	_RAC_TX_PAEN10DBMP_SHIFT 17

#define	_RAC_TX_PAEN10DBMPDRV_DEFAULT 0x00000000UL

#define	_RAC_TX_PAEN10DBMPDRV_disable 0x00000000UL

#define	_RAC_TX_PAEN10DBMPDRV_enable 0x00000001UL

#define	_RAC_TX_PAEN10DBMPDRV_MASK 0x40000UL

#define	_RAC_TX_PAEN10DBMPDRV_SHIFT 18

#define	_RAC_TX_PAEN20DBM_DEFAULT 0x00000000UL

#define	_RAC_TX_PAEN20DBM_disable 0x00000000UL

#define	_RAC_TX_PAEN20DBM_enable 0x00000001UL

#define	_RAC_TX_PAEN20DBM_MASK 0x100000UL

#define	_RAC_TX_PAEN20DBM_SHIFT 20

#define	_RAC_TX_PAEN20DBMPDRV_DEFAULT 0x00000000UL

#define	_RAC_TX_PAEN20DBMPDRV_disable 0x00000000UL

#define	_RAC_TX_PAEN20DBMPDRV_enable 0x00000001UL

#define	_RAC_TX_PAEN20DBMPDRV_MASK 0x200000UL

#define	_RAC_TX_PAEN20DBMPDRV_SHIFT 21

#define	_RAC_TX_PAENBIAS0DBM_DEFAULT 0x00000000UL

#define	_RAC_TX_PAENBIAS0DBM_disable 0x00000000UL

#define	_RAC_TX_PAENBIAS0DBM_enable 0x00000001UL

#define	_RAC_TX_PAENBIAS0DBM_MASK 0x4UL

#define	_RAC_TX_PAENBIAS0DBM_SHIFT 2

#define	_RAC_TX_PAENBLEEDPDRVLDO_DEFAULT 0x00000000UL

#define	_RAC_TX_PAENBLEEDPDRVLDO_disable 0x00000000UL

#define	_RAC_TX_PAENBLEEDPDRVLDO_enable 0x00000001UL

#define	_RAC_TX_PAENBLEEDPDRVLDO_MASK 0x1000000UL

#define	_RAC_TX_PAENBLEEDPDRVLDO_SHIFT 24

#define	_RAC_TX_PAENBLEEDPREREG_DEFAULT 0x00000000UL

#define	_RAC_TX_PAENBLEEDPREREG_disable 0x00000000UL

#define	_RAC_TX_PAENBLEEDPREREG_enable 0x00000001UL

#define	_RAC_TX_PAENBLEEDPREREG_MASK 0x2000000UL

#define	_RAC_TX_PAENBLEEDPREREG_SHIFT 25

#define	_RAC_TX_PAENDRVREG0DBM_DEFAULT 0x00000000UL

#define	_RAC_TX_PAENDRVREG0DBM_disable 0x00000000UL

#define	_RAC_TX_PAENDRVREG0DBM_enable 0x00000001UL

#define	_RAC_TX_PAENDRVREG0DBM_MASK 0x8UL

#define	_RAC_TX_PAENDRVREG0DBM_SHIFT 3

#define	_RAC_TX_PAENDRVREGBIAS0DBM_DEFAULT 0x00000000UL

#define	_RAC_TX_PAENDRVREGBIAS0DBM_disable 0x00000000UL

#define	_RAC_TX_PAENDRVREGBIAS0DBM_enable 0x00000001UL

#define	_RAC_TX_PAENDRVREGBIAS0DBM_MASK 0x10UL

#define	_RAC_TX_PAENDRVREGBIAS0DBM_SHIFT 4

#define	_RAC_TX_PAENLDOHVPDRVLDO_DEFAULT 0x00000000UL

#define	_RAC_TX_PAENLDOHVPDRVLDO_disable 0x00000000UL

#define	_RAC_TX_PAENLDOHVPDRVLDO_enable 0x00000001UL

#define	_RAC_TX_PAENLDOHVPDRVLDO_MASK 0x4000000UL

#define	_RAC_TX_PAENLDOHVPDRVLDO_SHIFT 26

#define	_RAC_TX_PAENLDOHVPREREG_DEFAULT 0x00000000UL

#define	_RAC_TX_PAENLDOHVPREREG_disable 0x00000000UL

#define	_RAC_TX_PAENLDOHVPREREG_enable 0x00000001UL

#define	_RAC_TX_PAENLDOHVPREREG_MASK 0x8000000UL

#define	_RAC_TX_PAENLDOHVPREREG_SHIFT 27

#define	_RAC_TX_PAENLO0DBM_DEFAULT 0x00000000UL

#define	_RAC_TX_PAENLO0DBM_disable 0x00000000UL

#define	_RAC_TX_PAENLO0DBM_enable 0x00000001UL

#define	_RAC_TX_PAENLO0DBM_MASK 0x20UL

#define	_RAC_TX_PAENLO0DBM_SHIFT 5

#define	_RAC_TX_PAENPAOUT_DEFAULT 0x00000000UL

#define	_RAC_TX_PAENPAOUT_disable 0x00000000UL

#define	_RAC_TX_PAENPAOUT_enable 0x00000001UL

#define	_RAC_TX_PAENPAOUT_MASK 0x10000000UL

#define	_RAC_TX_PAENPAOUT_SHIFT 28

#define	_RAC_TX_PAENREG0DBM_DEFAULT 0x00000000UL

#define	_RAC_TX_PAENREG0DBM_disable 0x00000000UL

#define	_RAC_TX_PAENREG0DBM_enable 0x00000001UL

#define	_RAC_TX_PAENREG0DBM_MASK 0x40UL

#define	_RAC_TX_PAENREG0DBM_SHIFT 6

#define	_RAC_TX_PAENTAPCAP0DBM_cap_0f 0x00000000UL

#define	_RAC_TX_PAENTAPCAP0DBM_cap_0p35pF 0x00000001UL

#define	_RAC_TX_PAENTAPCAP0DBM_cap_0p7pF 0x00000002UL

#define	_RAC_TX_PAENTAPCAP0DBM_cap_1p05pF 0x00000003UL

#define	_RAC_TX_PAENTAPCAP0DBM_cap_1p4pF 0x00000004UL

#define	_RAC_TX_PAENTAPCAP0DBM_cap_1p75pF 0x00000005UL

#define	_RAC_TX_PAENTAPCAP0DBM_cap_2p1pF 0x00000006UL

#define	_RAC_TX_PAENTAPCAP0DBM_cap_2p45pF 0x00000007UL

#define	_RAC_TX_PAENTAPCAP0DBM_DEFAULT 0x00000000UL

#define	_RAC_TX_PAENTAPCAP0DBM_MASK 0x380UL

#define	_RAC_TX_PAENTAPCAP0DBM_SHIFT 7

#define	_RAC_TX_RESETVALUE 0x00000000UL

#define	_RAC_VCOCTRL_MASK 0x000000FFUL

#define	_RAC_VCOCTRL_RESETVALUE 0x0000004CUL

#define	_RAC_VCOCTRL_VCOAMPLITUDE_DEFAULT 0x0000000CUL

#define	_RAC_VCOCTRL_VCOAMPLITUDE_MASK 0xFUL

#define	_RAC_VCOCTRL_VCOAMPLITUDE_SHIFT 0

#define	_RAC_VCOCTRL_VCODETAMPLITUDE_DEFAULT 0x00000004UL

#define	_RAC_VCOCTRL_VCODETAMPLITUDE_MASK 0xF0UL

#define	_RAC_VCOCTRL_VCODETAMPLITUDE_SHIFT 4

#define	_RAC_VECTADDR_MASK 0xFFFFFFFFUL

#define	_RAC_VECTADDR_RESETVALUE 0x00000000UL

#define	_RAC_VECTADDR_VECTADDR_DEFAULT 0x00000000UL

#define	_RAC_VECTADDR_VECTADDR_MASK 0xFFFFFFFFUL

#define	_RAC_VECTADDR_VECTADDR_SHIFT 0

#define	_RAC_WAITMASK_ANTSWITCH_DEFAULT 0x00000000UL

#define	_RAC_WAITMASK_ANTSWITCH_MASK 0x100UL

#define	_RAC_WAITMASK_ANTSWITCH_SHIFT 8

#define	_RAC_WAITMASK_DEMODRXREQCLR_DEFAULT 0x00000000UL

#define	_RAC_WAITMASK_DEMODRXREQCLR_MASK 0x10UL

#define	_RAC_WAITMASK_DEMODRXREQCLR_SHIFT 4

#define	_RAC_WAITMASK_FRCPAUSED_DEFAULT 0x00000000UL

#define	_RAC_WAITMASK_FRCPAUSED_MASK 0x80UL

#define	_RAC_WAITMASK_FRCPAUSED_SHIFT 7

#define	_RAC_WAITMASK_FRCRX_DEFAULT 0x00000000UL

#define	_RAC_WAITMASK_FRCRX_MASK 0x2UL

#define	_RAC_WAITMASK_FRCRX_SHIFT 1

#define	_RAC_WAITMASK_FRCTX_DEFAULT 0x00000000UL

#define	_RAC_WAITMASK_FRCTX_MASK 0x4UL

#define	_RAC_WAITMASK_FRCTX_SHIFT 2

#define	_RAC_WAITMASK_MASK 0x000001FFUL

#define	_RAC_WAITMASK_PRSEVENT_DEFAULT 0x00000000UL

#define	_RAC_WAITMASK_PRSEVENT_MASK 0x8UL

#define	_RAC_WAITMASK_PRSEVENT_SHIFT 3

#define	_RAC_WAITMASK_RAMPDONE_DEFAULT 0x00000000UL

#define	_RAC_WAITMASK_RAMPDONE_MASK 0x40UL

#define	_RAC_WAITMASK_RAMPDONE_SHIFT 6

#define	_RAC_WAITMASK_RESETVALUE 0x00000000UL

#define	_RAC_WAITMASK_STCMP_DEFAULT 0x00000000UL

#define	_RAC_WAITMASK_STCMP_MASK 0x1UL

#define	_RAC_WAITMASK_STCMP_SHIFT 0

#define	_RAC_WAITMASK_SYNTHRDY_DEFAULT 0x00000000UL

#define	_RAC_WAITMASK_SYNTHRDY_MASK 0x20UL

#define	_RAC_WAITMASK_SYNTHRDY_SHIFT 5

#define	_RAC_WAITSNSH_MASK 0x000003FFUL

#define	_RAC_WAITSNSH_RESETVALUE 0x00000000UL

#define	_RAC_WAITSNSH_WAITSNSH_DEFAULT 0x00000000UL

#define	_RAC_WAITSNSH_WAITSNSH_MASK 0x3FFUL

#define	_RAC_WAITSNSH_WAITSNSH_SHIFT 0

#define	_RAC_XORETIMECTRL_MASK 0x00000777UL

#define	_RAC_XORETIMECTRL_RESETVALUE 0x00000000UL

#define	_RAC_XORETIMECTRL_XORETIMEDISRETIME_DEFAULT 0x00000000UL

#define	_RAC_XORETIMECTRL_XORETIMEDISRETIME_disable_retime 0x00000001UL

#define	_RAC_XORETIMECTRL_XORETIMEDISRETIME_enable_retime 0x00000000UL

#define	_RAC_XORETIMECTRL_XORETIMEDISRETIME_MASK 0x2UL

#define	_RAC_XORETIMECTRL_XORETIMEDISRETIME_SHIFT 1

#define	_RAC_XORETIMECTRL_XORETIMEENRETIME_DEFAULT 0x00000000UL

#define	_RAC_XORETIMECTRL_XORETIMEENRETIME_disable 0x00000000UL

#define	_RAC_XORETIMECTRL_XORETIMEENRETIME_enable 0x00000001UL

#define	_RAC_XORETIMECTRL_XORETIMEENRETIME_MASK 0x1UL

#define	_RAC_XORETIMECTRL_XORETIMEENRETIME_SHIFT 0

#define	_RAC_XORETIMECTRL_XORETIMELIMITH_DEFAULT 0x00000000UL

#define	_RAC_XORETIMECTRL_XORETIMELIMITH_MASK 0x70UL

#define	_RAC_XORETIMECTRL_XORETIMELIMITH_SHIFT 4

#define	_RAC_XORETIMECTRL_XORETIMELIMITL_DEFAULT 0x00000000UL

#define	_RAC_XORETIMECTRL_XORETIMELIMITL_MASK 0x700UL

#define	_RAC_XORETIMECTRL_XORETIMELIMITL_SHIFT 8

#define	_RAC_XORETIMECTRL_XORETIMERESETN_DEFAULT 0x00000000UL

#define	_RAC_XORETIMECTRL_XORETIMERESETN_MASK 0x4UL

#define	_RAC_XORETIMECTRL_XORETIMERESETN_operate 0x00000000UL

#define	_RAC_XORETIMECTRL_XORETIMERESETN_reset 0x00000001UL

#define	_RAC_XORETIMECTRL_XORETIMERESETN_SHIFT 2

#define	_RAC_XORETIMESTATUS_MASK 0x00000003UL

#define	_RAC_XORETIMESTATUS_RESETVALUE 0x00000000UL

#define	_RAC_XORETIMESTATUS_XORETIMECLKSEL_DEFAULT 0x00000000UL

#define	_RAC_XORETIMESTATUS_XORETIMECLKSEL_MASK 0x1UL

#define	_RAC_XORETIMESTATUS_XORETIMECLKSEL_SHIFT 0

#define	_RAC_XORETIMESTATUS_XORETIMECLKSEL_use_raw_clk 0x00000000UL

#define	_RAC_XORETIMESTATUS_XORETIMECLKSEL_use_retimed_clk 0x00000001UL

#define	_RAC_XORETIMESTATUS_XORETIMERESETNLO_DEFAULT 0x00000000UL

#define	_RAC_XORETIMESTATUS_XORETIMERESETNLO_hi 0x00000001UL

#define	_RAC_XORETIMESTATUS_XORETIMERESETNLO_lo 0x00000000UL

#define	_RAC_XORETIMESTATUS_XORETIMERESETNLO_MASK 0x2UL

#define	_RAC_XORETIMESTATUS_XORETIMERESETNLO_SHIFT 1

#define	_RAC_XOSQBUFFILT_MASK 0x00000003UL

#define	_RAC_XOSQBUFFILT_RESETVALUE 0x00000000UL

#define	_RAC_XOSQBUFFILT_XOSQBUFFILT_bypass 0x00000000UL

#define	_RAC_XOSQBUFFILT_XOSQBUFFILT_DEFAULT 0x00000000UL

#define	_RAC_XOSQBUFFILT_XOSQBUFFILT_filter_1 0x00000001UL

#define	_RAC_XOSQBUFFILT_XOSQBUFFILT_filter_2 0x00000002UL

#define	_RAC_XOSQBUFFILT_XOSQBUFFILT_filter_3 0x00000003UL

#define	_RAC_XOSQBUFFILT_XOSQBUFFILT_MASK 0x3UL

#define	_RAC_XOSQBUFFILT_XOSQBUFFILT_SHIFT 0

#define	RAC_ANTDIV_EN_DEFAULT ( _RAC_ANTDIV_EN_DEFAULT << 0)

#define	RAC_ANTDIV_EN_LNAMIXEN1 ( _RAC_ANTDIV_EN_LNAMIXEN1 << 0)

#define	RAC_ANTDIV_EN_LNAMIXEN2 ( _RAC_ANTDIV_EN_LNAMIXEN2 << 0)

#define	RAC_ANTDIV_EN_LNAMIXRFPKDENRF1 ( _RAC_ANTDIV_EN_LNAMIXRFPKDENRF1 << 0)

#define	RAC_ANTDIV_EN_LNAMIXRFPKDENRF2 ( _RAC_ANTDIV_EN_LNAMIXRFPKDENRF2 << 0)

#define	RAC_ANTDIV_EN_OFF ( _RAC_ANTDIV_EN_OFF << 0)

#define	RAC_ANTDIV_EN_ON ( _RAC_ANTDIV_EN_ON << 0)

#define	RAC_ANTDIV_EN_PAENANT1 ( _RAC_ANTDIV_EN_PAENANT1 << 0)

#define	RAC_ANTDIV_EN_PAENANT2 ( _RAC_ANTDIV_EN_PAENANT2 << 0)

#define	RAC_ANTDIV_EN_SYLODIVRLO12G4EN ( _RAC_ANTDIV_EN_SYLODIVRLO12G4EN << 0)

#define	RAC_ANTDIV_EN_SYLODIVRLO22G4EN ( _RAC_ANTDIV_EN_SYLODIVRLO22G4EN << 0)

#define	RAC_ANTDIV_STATUS_ANT1 ( _RAC_ANTDIV_STATUS_ANT1 << 8)

#define	RAC_ANTDIV_STATUS_ANT2 ( _RAC_ANTDIV_STATUS_ANT2 << 8)

#define	RAC_ANTDIV_STATUS_BOTH ( _RAC_ANTDIV_STATUS_BOTH << 8)

#define	RAC_ANTDIV_STATUS_DEFAULT ( _RAC_ANTDIV_STATUS_DEFAULT << 8)

#define	RAC_ANTDIV_STATUS_OFF ( _RAC_ANTDIV_STATUS_OFF << 8)

#define	RAC_APC_AMPCONTROLLIMITSW_DEFAULT ( _RAC_APC_AMPCONTROLLIMITSW_DEFAULT << 24)

#define	RAC_APC_ENAPCSW (0x1UL << 2)

#define	RAC_APC_ENAPCSW_DEFAULT ( _RAC_APC_ENAPCSW_DEFAULT << 2)

#define	RAC_APC_ENAPCSW_DISABLE ( _RAC_APC_ENAPCSW_DISABLE << 2)

#define	RAC_APC_ENAPCSW_ENABLE ( _RAC_APC_ENAPCSW_ENABLE << 2)

#define	RAC_AUXADCCTRL0_CLRCOUNTER (0x1UL << 12)

#define	RAC_AUXADCCTRL0_CLRCOUNTER_DEFAULT ( _RAC_AUXADCCTRL0_CLRCOUNTER_DEFAULT << 12)

#define	RAC_AUXADCCTRL0_CLRFILTER (0x1UL << 13)

#define	RAC_AUXADCCTRL0_CLRFILTER_DEFAULT ( _RAC_AUXADCCTRL0_CLRFILTER_DEFAULT << 13)

#define	RAC_AUXADCCTRL0_CYCLES_DEFAULT ( _RAC_AUXADCCTRL0_CYCLES_DEFAULT << 0)

#define	RAC_AUXADCCTRL0_INPUTRESSEL_DEFAULT ( _RAC_AUXADCCTRL0_INPUTRESSEL_DEFAULT << 14)

#define	RAC_AUXADCCTRL0_MUXSEL_DEFAULT ( _RAC_AUXADCCTRL0_MUXSEL_DEFAULT << 10)

#define	RAC_AUXADCCTRL1_AUXADCINPUTRESSEL_DEFAULT ( _RAC_AUXADCCTRL1_AUXADCINPUTRESSEL_DEFAULT << 0)

#define	RAC_AUXADCCTRL1_AUXADCINPUTRESSEL_RES0p6kOhm ( _RAC_AUXADCCTRL1_AUXADCINPUTRESSEL_RES0p6kOhm << 0)

#define	RAC_AUXADCCTRL1_AUXADCINPUTRESSEL_RES10kOhm ( _RAC_AUXADCCTRL1_AUXADCINPUTRESSEL_RES10kOhm << 0)

#define	RAC_AUXADCCTRL1_AUXADCINPUTRESSEL_RES160kOhm ( _RAC_AUXADCCTRL1_AUXADCINPUTRESSEL_RES160kOhm << 0)

#define	RAC_AUXADCCTRL1_AUXADCINPUTRESSEL_RES1p25kOhm ( _RAC_AUXADCCTRL1_AUXADCINPUTRESSEL_RES1p25kOhm << 0)

#define	RAC_AUXADCCTRL1_AUXADCINPUTRESSEL_RES20kOhm ( _RAC_AUXADCCTRL1_AUXADCINPUTRESSEL_RES20kOhm << 0)

#define	RAC_AUXADCCTRL1_AUXADCINPUTRESSEL_RES2p5kOhm ( _RAC_AUXADCCTRL1_AUXADCINPUTRESSEL_RES2p5kOhm << 0)

#define	RAC_AUXADCCTRL1_AUXADCINPUTRESSEL_RES320kOhm ( _RAC_AUXADCCTRL1_AUXADCINPUTRESSEL_RES320kOhm << 0)

#define	RAC_AUXADCCTRL1_AUXADCINPUTRESSEL_RES40kOhm ( _RAC_AUXADCCTRL1_AUXADCINPUTRESSEL_RES40kOhm << 0)

#define	RAC_AUXADCCTRL1_AUXADCINPUTRESSEL_RES5kOhm ( _RAC_AUXADCCTRL1_AUXADCINPUTRESSEL_RES5kOhm << 0)

#define	RAC_AUXADCCTRL1_AUXADCINPUTRESSEL_RES640kOhm ( _RAC_AUXADCCTRL1_AUXADCINPUTRESSEL_RES640kOhm << 0)

#define	RAC_AUXADCCTRL1_AUXADCINPUTRESSEL_RES80kOhm ( _RAC_AUXADCCTRL1_AUXADCINPUTRESSEL_RES80kOhm << 0)

#define	RAC_AUXADCCTRL1_AUXADCINPUTRESSEL_RES_switch ( _RAC_AUXADCCTRL1_AUXADCINPUTRESSEL_RES_switch << 0)

#define	RAC_AUXADCCTRL1_AUXADCINPUTSELECT_DEFAULT ( _RAC_AUXADCCTRL1_AUXADCINPUTSELECT_DEFAULT << 4)

#define	RAC_AUXADCCTRL1_AUXADCINPUTSELECT_SEL0 ( _RAC_AUXADCCTRL1_AUXADCINPUTSELECT_SEL0 << 4)

#define	RAC_AUXADCCTRL1_AUXADCINPUTSELECT_SEL1 ( _RAC_AUXADCCTRL1_AUXADCINPUTSELECT_SEL1 << 4)

#define	RAC_AUXADCCTRL1_AUXADCINPUTSELECT_SEL2 ( _RAC_AUXADCCTRL1_AUXADCINPUTSELECT_SEL2 << 4)

#define	RAC_AUXADCCTRL1_AUXADCINPUTSELECT_SEL3 ( _RAC_AUXADCCTRL1_AUXADCINPUTSELECT_SEL3 << 4)

#define	RAC_AUXADCCTRL1_AUXADCINPUTSELECT_SEL4 ( _RAC_AUXADCCTRL1_AUXADCINPUTSELECT_SEL4 << 4)

#define	RAC_AUXADCCTRL1_AUXADCINPUTSELECT_SEL5 ( _RAC_AUXADCCTRL1_AUXADCINPUTSELECT_SEL5 << 4)

#define	RAC_AUXADCCTRL1_AUXADCINPUTSELECT_SEL6 ( _RAC_AUXADCCTRL1_AUXADCINPUTSELECT_SEL6 << 4)

#define	RAC_AUXADCCTRL1_AUXADCINPUTSELECT_SEL7 ( _RAC_AUXADCCTRL1_AUXADCINPUTSELECT_SEL7 << 4)

#define	RAC_AUXADCCTRL1_AUXADCINPUTSELECT_SEL8 ( _RAC_AUXADCCTRL1_AUXADCINPUTSELECT_SEL8 << 4)

#define	RAC_AUXADCCTRL1_AUXADCINPUTSELECT_SEL9 ( _RAC_AUXADCCTRL1_AUXADCINPUTSELECT_SEL9 << 4)

#define	RAC_AUXADCCTRL1_AUXADCPMONSELECT_DEFAULT ( _RAC_AUXADCCTRL1_AUXADCPMONSELECT_DEFAULT << 8)

#define	RAC_AUXADCCTRL1_AUXADCRESET (0x1UL << 24)

#define	RAC_AUXADCCTRL1_AUXADCRESET_DEFAULT ( _RAC_AUXADCCTRL1_AUXADCRESET_DEFAULT << 24)

#define	RAC_AUXADCCTRL1_AUXADCRESET_Reset_Disabled ( _RAC_AUXADCCTRL1_AUXADCRESET_Reset_Disabled << 24)

#define	RAC_AUXADCCTRL1_AUXADCRESET_Reset_Enabled ( _RAC_AUXADCCTRL1_AUXADCRESET_Reset_Enabled << 24)

#define	RAC_AUXADCCTRL1_AUXADCTSENSESELCURR_DEFAULT ( _RAC_AUXADCCTRL1_AUXADCTSENSESELCURR_DEFAULT << 16)

#define	RAC_AUXADCCTRL1_AUXADCTSENSESELVBE (0x1UL << 25)

#define	RAC_AUXADCCTRL1_AUXADCTSENSESELVBE_DEFAULT ( _RAC_AUXADCCTRL1_AUXADCTSENSESELVBE_DEFAULT << 25)

#define	RAC_AUXADCCTRL1_AUXADCTSENSESELVBE_VBE1 ( _RAC_AUXADCCTRL1_AUXADCTSENSESELVBE_VBE1 << 25)

#define	RAC_AUXADCCTRL1_AUXADCTSENSESELVBE_VBE2 ( _RAC_AUXADCCTRL1_AUXADCTSENSESELVBE_VBE2 << 25)

#define	RAC_AUXADCEN_AUXADCENAUXADC (0x1UL << 0)

#define	RAC_AUXADCEN_AUXADCENAUXADC_DEFAULT ( _RAC_AUXADCEN_AUXADCENAUXADC_DEFAULT << 0)

#define	RAC_AUXADCEN_AUXADCENAUXADC_Disabled ( _RAC_AUXADCEN_AUXADCENAUXADC_Disabled << 0)

#define	RAC_AUXADCEN_AUXADCENAUXADC_Enabled ( _RAC_AUXADCEN_AUXADCENAUXADC_Enabled << 0)

#define	RAC_AUXADCEN_AUXADCENINPUTBUFFER (0x1UL << 1)

#define	RAC_AUXADCEN_AUXADCENINPUTBUFFER_DEFAULT ( _RAC_AUXADCEN_AUXADCENINPUTBUFFER_DEFAULT << 1)

#define	RAC_AUXADCEN_AUXADCENINPUTBUFFER_Disabled ( _RAC_AUXADCEN_AUXADCENINPUTBUFFER_Disabled << 1)

#define	RAC_AUXADCEN_AUXADCENINPUTBUFFER_Enabled ( _RAC_AUXADCEN_AUXADCENINPUTBUFFER_Enabled << 1)

#define	RAC_AUXADCEN_AUXADCENLDO (0x1UL << 2)

#define	RAC_AUXADCEN_AUXADCENLDO_DEFAULT ( _RAC_AUXADCEN_AUXADCENLDO_DEFAULT << 2)

#define	RAC_AUXADCEN_AUXADCENLDO_Disabled ( _RAC_AUXADCEN_AUXADCENLDO_Disabled << 2)

#define	RAC_AUXADCEN_AUXADCENLDO_Enabled ( _RAC_AUXADCEN_AUXADCENLDO_Enabled << 2)

#define	RAC_AUXADCEN_AUXADCENOUTPUTDRV (0x1UL << 3)

#define	RAC_AUXADCEN_AUXADCENOUTPUTDRV_DEFAULT ( _RAC_AUXADCEN_AUXADCENOUTPUTDRV_DEFAULT << 3)

#define	RAC_AUXADCEN_AUXADCENOUTPUTDRV_Disabled ( _RAC_AUXADCEN_AUXADCENOUTPUTDRV_Disabled << 3)

#define	RAC_AUXADCEN_AUXADCENOUTPUTDRV_Enabled ( _RAC_AUXADCEN_AUXADCENOUTPUTDRV_Enabled << 3)

#define	RAC_AUXADCEN_AUXADCENPMON (0x1UL << 4)

#define	RAC_AUXADCEN_AUXADCENPMON_DEFAULT ( _RAC_AUXADCEN_AUXADCENPMON_DEFAULT << 4)

#define	RAC_AUXADCEN_AUXADCENPMON_Disabled ( _RAC_AUXADCEN_AUXADCENPMON_Disabled << 4)

#define	RAC_AUXADCEN_AUXADCENPMON_Enabled ( _RAC_AUXADCEN_AUXADCENPMON_Enabled << 4)

#define	RAC_AUXADCEN_AUXADCENRESONDIAGA (0x1UL << 5)

#define	RAC_AUXADCEN_AUXADCENRESONDIAGA_DEFAULT ( _RAC_AUXADCEN_AUXADCENRESONDIAGA_DEFAULT << 5)

#define	RAC_AUXADCEN_AUXADCENRESONDIAGA_Disabled ( _RAC_AUXADCEN_AUXADCENRESONDIAGA_Disabled << 5)

#define	RAC_AUXADCEN_AUXADCENRESONDIAGA_Enabled ( _RAC_AUXADCEN_AUXADCENRESONDIAGA_Enabled << 5)

#define	RAC_AUXADCEN_AUXADCENTSENSE (0x1UL << 6)

#define	RAC_AUXADCEN_AUXADCENTSENSE_DEFAULT ( _RAC_AUXADCEN_AUXADCENTSENSE_DEFAULT << 6)

#define	RAC_AUXADCEN_AUXADCENTSENSE_Disabled ( _RAC_AUXADCEN_AUXADCENTSENSE_Disabled << 6)

#define	RAC_AUXADCEN_AUXADCENTSENSE_Enabled ( _RAC_AUXADCEN_AUXADCENTSENSE_Enabled << 6)

#define	RAC_AUXADCEN_AUXADCENTSENSECAL (0x1UL << 7)

#define	RAC_AUXADCEN_AUXADCENTSENSECAL_DEFAULT ( _RAC_AUXADCEN_AUXADCENTSENSECAL_DEFAULT << 7)

#define	RAC_AUXADCEN_AUXADCENTSENSECAL_Disabled ( _RAC_AUXADCEN_AUXADCENTSENSECAL_Disabled << 7)

#define	RAC_AUXADCEN_AUXADCENTSENSECAL_Enabled ( _RAC_AUXADCEN_AUXADCENTSENSECAL_Enabled << 7)

#define	RAC_AUXADCEN_AUXADCINPUTBUFFERBYPASS (0x1UL << 8)

#define	RAC_AUXADCEN_AUXADCINPUTBUFFERBYPASS_Bypassed ( _RAC_AUXADCEN_AUXADCINPUTBUFFERBYPASS_Bypassed << 8)

#define	RAC_AUXADCEN_AUXADCINPUTBUFFERBYPASS_DEFAULT ( _RAC_AUXADCEN_AUXADCINPUTBUFFERBYPASS_DEFAULT << 8)

#define	RAC_AUXADCEN_AUXADCINPUTBUFFERBYPASS_Not_Bypassed ( _RAC_AUXADCEN_AUXADCINPUTBUFFERBYPASS_Not_Bypassed << 8)

#define	RAC_AUXADCOUT_AUXADCOUT_DEFAULT ( _RAC_AUXADCOUT_AUXADCOUT_DEFAULT << 0)

#define	RAC_AUXADCTRIM_AUXADCCLKINVERT (0x1UL << 0)

#define	RAC_AUXADCTRIM_AUXADCCLKINVERT_DEFAULT ( _RAC_AUXADCTRIM_AUXADCCLKINVERT_DEFAULT << 0)

#define	RAC_AUXADCTRIM_AUXADCCLKINVERT_Disable_Invert ( _RAC_AUXADCTRIM_AUXADCCLKINVERT_Disable_Invert << 0)

#define	RAC_AUXADCTRIM_AUXADCCLKINVERT_Enable_Invert ( _RAC_AUXADCTRIM_AUXADCCLKINVERT_Enable_Invert << 0)

#define	RAC_AUXADCTRIM_AUXADCLDOVREFTRIM_DEFAULT ( _RAC_AUXADCTRIM_AUXADCLDOVREFTRIM_DEFAULT << 1)

#define	RAC_AUXADCTRIM_AUXADCLDOVREFTRIM_TRIM1p27 ( _RAC_AUXADCTRIM_AUXADCLDOVREFTRIM_TRIM1p27 << 1)

#define	RAC_AUXADCTRIM_AUXADCLDOVREFTRIM_TRIM1p3 ( _RAC_AUXADCTRIM_AUXADCLDOVREFTRIM_TRIM1p3 << 1)

#define	RAC_AUXADCTRIM_AUXADCLDOVREFTRIM_TRIM1p35 ( _RAC_AUXADCTRIM_AUXADCLDOVREFTRIM_TRIM1p35 << 1)

#define	RAC_AUXADCTRIM_AUXADCLDOVREFTRIM_TRIM1p4 ( _RAC_AUXADCTRIM_AUXADCLDOVREFTRIM_TRIM1p4 << 1)

#define	RAC_AUXADCTRIM_AUXADCOUTPUTINVERT (0x1UL << 3)

#define	RAC_AUXADCTRIM_AUXADCOUTPUTINVERT_DEFAULT ( _RAC_AUXADCTRIM_AUXADCOUTPUTINVERT_DEFAULT << 3)

#define	RAC_AUXADCTRIM_AUXADCOUTPUTINVERT_Disabled ( _RAC_AUXADCTRIM_AUXADCOUTPUTINVERT_Disabled << 3)

#define	RAC_AUXADCTRIM_AUXADCOUTPUTINVERT_Enabled ( _RAC_AUXADCTRIM_AUXADCOUTPUTINVERT_Enabled << 3)

#define	RAC_AUXADCTRIM_AUXADCRCTUNE_DEFAULT ( _RAC_AUXADCTRIM_AUXADCRCTUNE_DEFAULT << 4)

#define	RAC_AUXADCTRIM_AUXADCTRIMADCINPUTRES_DEFAULT ( _RAC_AUXADCTRIM_AUXADCTRIMADCINPUTRES_DEFAULT << 9)

#define	RAC_AUXADCTRIM_AUXADCTRIMADCINPUTRES_RES200k ( _RAC_AUXADCTRIM_AUXADCTRIMADCINPUTRES_RES200k << 9)

#define	RAC_AUXADCTRIM_AUXADCTRIMADCINPUTRES_RES250k ( _RAC_AUXADCTRIM_AUXADCTRIMADCINPUTRES_RES250k << 9)

#define	RAC_AUXADCTRIM_AUXADCTRIMADCINPUTRES_RES300k ( _RAC_AUXADCTRIM_AUXADCTRIMADCINPUTRES_RES300k << 9)

#define	RAC_AUXADCTRIM_AUXADCTRIMADCINPUTRES_RES350k ( _RAC_AUXADCTRIM_AUXADCTRIMADCINPUTRES_RES350k << 9)

#define	RAC_AUXADCTRIM_AUXADCTRIMCURRINPUTBUF_DEFAULT ( _RAC_AUXADCTRIM_AUXADCTRIMCURRINPUTBUF_DEFAULT << 11)

#define	RAC_AUXADCTRIM_AUXADCTRIMCURRINPUTBUF_Typ ( _RAC_AUXADCTRIM_AUXADCTRIMCURRINPUTBUF_Typ << 11)

#define	RAC_AUXADCTRIM_AUXADCTRIMCURRINPUTBUF_Typ_minus_20pct ( _RAC_AUXADCTRIM_AUXADCTRIMCURRINPUTBUF_Typ_minus_20pct << 11)

#define	RAC_AUXADCTRIM_AUXADCTRIMCURRINPUTBUF_Typ_minus_40pct ( _RAC_AUXADCTRIM_AUXADCTRIMCURRINPUTBUF_Typ_minus_40pct << 11)

#define	RAC_AUXADCTRIM_AUXADCTRIMCURRINPUTBUF_Typ_plus_20pct ( _RAC_AUXADCTRIM_AUXADCTRIMCURRINPUTBUF_Typ_plus_20pct << 11)

#define	RAC_AUXADCTRIM_AUXADCTRIMCURROPA1_DEFAULT ( _RAC_AUXADCTRIM_AUXADCTRIMCURROPA1_DEFAULT << 13)

#define	RAC_AUXADCTRIM_AUXADCTRIMCURROPA1_Typ ( _RAC_AUXADCTRIM_AUXADCTRIMCURROPA1_Typ << 13)

#define	RAC_AUXADCTRIM_AUXADCTRIMCURROPA1_Typ_minus_20pct ( _RAC_AUXADCTRIM_AUXADCTRIMCURROPA1_Typ_minus_20pct << 13)

#define	RAC_AUXADCTRIM_AUXADCTRIMCURROPA1_Typ_minus_40pct ( _RAC_AUXADCTRIM_AUXADCTRIMCURROPA1_Typ_minus_40pct << 13)

#define	RAC_AUXADCTRIM_AUXADCTRIMCURROPA1_Typ_plus_20pct ( _RAC_AUXADCTRIM_AUXADCTRIMCURROPA1_Typ_plus_20pct << 13)

#define	RAC_AUXADCTRIM_AUXADCTRIMCURROPA2_DEFAULT ( _RAC_AUXADCTRIM_AUXADCTRIMCURROPA2_DEFAULT << 15)

#define	RAC_AUXADCTRIM_AUXADCTRIMCURROPA2_Typ ( _RAC_AUXADCTRIM_AUXADCTRIMCURROPA2_Typ << 15)

#define	RAC_AUXADCTRIM_AUXADCTRIMCURROPA2_Typ_minus_20pct ( _RAC_AUXADCTRIM_AUXADCTRIMCURROPA2_Typ_minus_20pct << 15)

#define	RAC_AUXADCTRIM_AUXADCTRIMCURROPA2_Typ_minus_40pct ( _RAC_AUXADCTRIM_AUXADCTRIMCURROPA2_Typ_minus_40pct << 15)

#define	RAC_AUXADCTRIM_AUXADCTRIMCURROPA2_Typ_plus_20pct ( _RAC_AUXADCTRIM_AUXADCTRIMCURROPA2_Typ_plus_20pct << 15)

#define	RAC_AUXADCTRIM_AUXADCTRIMCURRREFBUF_DEFAULT ( _RAC_AUXADCTRIM_AUXADCTRIMCURRREFBUF_DEFAULT << 17)

#define	RAC_AUXADCTRIM_AUXADCTRIMCURRREFBUF_Typ ( _RAC_AUXADCTRIM_AUXADCTRIMCURRREFBUF_Typ << 17)

#define	RAC_AUXADCTRIM_AUXADCTRIMCURRREFBUF_Typ_minus_20pct ( _RAC_AUXADCTRIM_AUXADCTRIMCURRREFBUF_Typ_minus_20pct << 17)

#define	RAC_AUXADCTRIM_AUXADCTRIMCURRREFBUF_Typ_minus_40pct ( _RAC_AUXADCTRIM_AUXADCTRIMCURRREFBUF_Typ_minus_40pct << 17)

#define	RAC_AUXADCTRIM_AUXADCTRIMCURRREFBUF_Typ_plus_20pct ( _RAC_AUXADCTRIM_AUXADCTRIMCURRREFBUF_Typ_plus_20pct << 17)

#define	RAC_AUXADCTRIM_AUXADCTRIMCURRTSENSE_DEFAULT ( _RAC_AUXADCTRIM_AUXADCTRIMCURRTSENSE_DEFAULT << 19)

#define	RAC_AUXADCTRIM_AUXADCTRIMCURRTSENSE_Typ ( _RAC_AUXADCTRIM_AUXADCTRIMCURRTSENSE_Typ << 19)

#define	RAC_AUXADCTRIM_AUXADCTRIMCURRTSENSE_Typ_minus_20pct ( _RAC_AUXADCTRIM_AUXADCTRIMCURRTSENSE_Typ_minus_20pct << 19)

#define	RAC_AUXADCTRIM_AUXADCTRIMCURRTSENSE_Typ_minus_40pct ( _RAC_AUXADCTRIM_AUXADCTRIMCURRTSENSE_Typ_minus_40pct << 19)

#define	RAC_AUXADCTRIM_AUXADCTRIMCURRTSENSE_Typ_plus_20pct ( _RAC_AUXADCTRIM_AUXADCTRIMCURRTSENSE_Typ_plus_20pct << 19)

#define	RAC_AUXADCTRIM_AUXADCTRIMCURRVCMBUF_DEFAULT ( _RAC_AUXADCTRIM_AUXADCTRIMCURRVCMBUF_DEFAULT << 21)

#define	RAC_AUXADCTRIM_AUXADCTRIMCURRVCMBUF_Typ ( _RAC_AUXADCTRIM_AUXADCTRIMCURRVCMBUF_Typ << 21)

#define	RAC_AUXADCTRIM_AUXADCTRIMCURRVCMBUF_Typ_minus_20pct ( _RAC_AUXADCTRIM_AUXADCTRIMCURRVCMBUF_Typ_minus_20pct << 21)

#define	RAC_AUXADCTRIM_AUXADCTRIMCURRVCMBUF_Typ_minus_40pct ( _RAC_AUXADCTRIM_AUXADCTRIMCURRVCMBUF_Typ_minus_40pct << 21)

#define	RAC_AUXADCTRIM_AUXADCTRIMCURRVCMBUF_Typ_plus_20pct ( _RAC_AUXADCTRIM_AUXADCTRIMCURRVCMBUF_Typ_plus_20pct << 21)

#define	RAC_AUXADCTRIM_AUXADCTRIMLDOHIGHCURRENT (0x1UL << 23)

#define	RAC_AUXADCTRIM_AUXADCTRIMLDOHIGHCURRENT_DEFAULT ( _RAC_AUXADCTRIM_AUXADCTRIMLDOHIGHCURRENT_DEFAULT << 23)

#define	RAC_AUXADCTRIM_AUXADCTRIMLDOHIGHCURRENT_HighCurrentMode ( _RAC_AUXADCTRIM_AUXADCTRIMLDOHIGHCURRENT_HighCurrentMode << 23)

#define	RAC_AUXADCTRIM_AUXADCTRIMLDOHIGHCURRENT_LowCurrentMode ( _RAC_AUXADCTRIM_AUXADCTRIMLDOHIGHCURRENT_LowCurrentMode << 23)

#define	RAC_AUXADCTRIM_AUXADCTRIMREFP_DEFAULT ( _RAC_AUXADCTRIM_AUXADCTRIMREFP_DEFAULT << 24)

#define	RAC_AUXADCTRIM_AUXADCTRIMREFP_REF1p05 ( _RAC_AUXADCTRIM_AUXADCTRIMREFP_REF1p05 << 24)

#define	RAC_AUXADCTRIM_AUXADCTRIMREFP_REF1p16 ( _RAC_AUXADCTRIM_AUXADCTRIMREFP_REF1p16 << 24)

#define	RAC_AUXADCTRIM_AUXADCTRIMREFP_REF1p2 ( _RAC_AUXADCTRIM_AUXADCTRIMREFP_REF1p2 << 24)

#define	RAC_AUXADCTRIM_AUXADCTRIMREFP_REF1p25 ( _RAC_AUXADCTRIM_AUXADCTRIMREFP_REF1p25 << 24)

#define	RAC_AUXADCTRIM_AUXADCTRIMVREFVCM_DEFAULT ( _RAC_AUXADCTRIM_AUXADCTRIMVREFVCM_DEFAULT << 26)

#define	RAC_AUXADCTRIM_AUXADCTRIMVREFVCM_Trim0p6 ( _RAC_AUXADCTRIM_AUXADCTRIMVREFVCM_Trim0p6 << 26)

#define	RAC_AUXADCTRIM_AUXADCTRIMVREFVCM_Trim0p65 ( _RAC_AUXADCTRIM_AUXADCTRIMVREFVCM_Trim0p65 << 26)

#define	RAC_AUXADCTRIM_AUXADCTRIMVREFVCM_Trim0p7 ( _RAC_AUXADCTRIM_AUXADCTRIMVREFVCM_Trim0p7 << 26)

#define	RAC_AUXADCTRIM_AUXADCTRIMVREFVCM_Trim0p75 ( _RAC_AUXADCTRIM_AUXADCTRIMVREFVCM_Trim0p75 << 26)

#define	RAC_AUXADCTRIM_AUXADCTSENSETRIMVBE2 (0x1UL << 28)

#define	RAC_AUXADCTRIM_AUXADCTSENSETRIMVBE2_DEFAULT ( _RAC_AUXADCTRIM_AUXADCTSENSETRIMVBE2_DEFAULT << 28)

#define	RAC_AUXADCTRIM_AUXADCTSENSETRIMVBE2_VBE_16uA ( _RAC_AUXADCTRIM_AUXADCTSENSETRIMVBE2_VBE_16uA << 28)

#define	RAC_AUXADCTRIM_AUXADCTSENSETRIMVBE2_VBE_32uA ( _RAC_AUXADCTRIM_AUXADCTSENSETRIMVBE2_VBE_32uA << 28)

#define	RAC_BREAKPOINT_BKPADDR_DEFAULT ( _RAC_BREAKPOINT_BKPADDR_DEFAULT << 0)

#define	RAC_CLKMULTCTRL_CLKMULTDIVN_DEFAULT ( _RAC_CLKMULTCTRL_CLKMULTDIVN_DEFAULT << 0)

#define	RAC_CLKMULTCTRL_CLKMULTDIVR_DEFAULT ( _RAC_CLKMULTCTRL_CLKMULTDIVR_DEFAULT << 7)

#define	RAC_CLKMULTCTRL_CLKMULTDIVX_DEFAULT ( _RAC_CLKMULTCTRL_CLKMULTDIVX_DEFAULT << 10)

#define	RAC_CLKMULTCTRL_CLKMULTDIVX_div10 ( _RAC_CLKMULTCTRL_CLKMULTDIVX_div10 << 10)

#define	RAC_CLKMULTCTRL_CLKMULTDIVX_div12 ( _RAC_CLKMULTCTRL_CLKMULTDIVX_div12 << 10)

#define	RAC_CLKMULTCTRL_CLKMULTDIVX_div14 ( _RAC_CLKMULTCTRL_CLKMULTDIVX_div14 << 10)

#define	RAC_CLKMULTCTRL_CLKMULTDIVX_div_1 ( _RAC_CLKMULTCTRL_CLKMULTDIVX_div_1 << 10)

#define	RAC_CLKMULTCTRL_CLKMULTDIVX_div_2 ( _RAC_CLKMULTCTRL_CLKMULTDIVX_div_2 << 10)

#define	RAC_CLKMULTCTRL_CLKMULTDIVX_div_4 ( _RAC_CLKMULTCTRL_CLKMULTDIVX_div_4 << 10)

#define	RAC_CLKMULTCTRL_CLKMULTDIVX_div_6 ( _RAC_CLKMULTCTRL_CLKMULTDIVX_div_6 << 10)

#define	RAC_CLKMULTCTRL_CLKMULTDIVX_div_8 ( _RAC_CLKMULTCTRL_CLKMULTDIVX_div_8 << 10)

#define	RAC_CLKMULTCTRL_CLKMULTENRESYNC (0x1UL << 13)

#define	RAC_CLKMULTCTRL_CLKMULTENRESYNC_DEFAULT ( _RAC_CLKMULTCTRL_CLKMULTENRESYNC_DEFAULT << 13)

#define	RAC_CLKMULTCTRL_CLKMULTENRESYNC_disable_sync ( _RAC_CLKMULTCTRL_CLKMULTENRESYNC_disable_sync << 13)

#define	RAC_CLKMULTCTRL_CLKMULTENRESYNC_enable_sync ( _RAC_CLKMULTCTRL_CLKMULTENRESYNC_enable_sync << 13)

#define	RAC_CLKMULTCTRL_CLKMULTVALID (0x1UL << 14)

#define	RAC_CLKMULTCTRL_CLKMULTVALID_DEFAULT ( _RAC_CLKMULTCTRL_CLKMULTVALID_DEFAULT << 14)

#define	RAC_CLKMULTCTRL_CLKMULTVALID_invalid ( _RAC_CLKMULTCTRL_CLKMULTVALID_invalid << 14)

#define	RAC_CLKMULTCTRL_CLKMULTVALID_valid ( _RAC_CLKMULTCTRL_CLKMULTVALID_valid << 14)

#define	RAC_CLKMULTEN0_CLKMULTBWCAL_bw_1lsb ( _RAC_CLKMULTEN0_CLKMULTBWCAL_bw_1lsb << 0)

#define	RAC_CLKMULTEN0_CLKMULTBWCAL_bw_2lsb ( _RAC_CLKMULTEN0_CLKMULTBWCAL_bw_2lsb << 0)

#define	RAC_CLKMULTEN0_CLKMULTBWCAL_bw_3lsb ( _RAC_CLKMULTEN0_CLKMULTBWCAL_bw_3lsb << 0)

#define	RAC_CLKMULTEN0_CLKMULTBWCAL_bw_4lsb ( _RAC_CLKMULTEN0_CLKMULTBWCAL_bw_4lsb << 0)

#define	RAC_CLKMULTEN0_CLKMULTBWCAL_DEFAULT ( _RAC_CLKMULTEN0_CLKMULTBWCAL_DEFAULT << 0)

#define	RAC_CLKMULTEN0_CLKMULTDISICO (0x1UL << 2)

#define	RAC_CLKMULTEN0_CLKMULTDISICO_DEFAULT ( _RAC_CLKMULTEN0_CLKMULTDISICO_DEFAULT << 2)

#define	RAC_CLKMULTEN0_CLKMULTDISICO_disable ( _RAC_CLKMULTEN0_CLKMULTDISICO_disable << 2)

#define	RAC_CLKMULTEN0_CLKMULTDISICO_enable ( _RAC_CLKMULTEN0_CLKMULTDISICO_enable << 2)

#define	RAC_CLKMULTEN0_CLKMULTENBBDET (0x1UL << 3)

#define	RAC_CLKMULTEN0_CLKMULTENBBDET_DEFAULT ( _RAC_CLKMULTEN0_CLKMULTENBBDET_DEFAULT << 3)

#define	RAC_CLKMULTEN0_CLKMULTENBBDET_disable ( _RAC_CLKMULTEN0_CLKMULTENBBDET_disable << 3)

#define	RAC_CLKMULTEN0_CLKMULTENBBDET_enable ( _RAC_CLKMULTEN0_CLKMULTENBBDET_enable << 3)

#define	RAC_CLKMULTEN0_CLKMULTENBBXLDET (0x1UL << 4)

#define	RAC_CLKMULTEN0_CLKMULTENBBXLDET_DEFAULT ( _RAC_CLKMULTEN0_CLKMULTENBBXLDET_DEFAULT << 4)

#define	RAC_CLKMULTEN0_CLKMULTENBBXLDET_disable ( _RAC_CLKMULTEN0_CLKMULTENBBXLDET_disable << 4)

#define	RAC_CLKMULTEN0_CLKMULTENBBXLDET_enable ( _RAC_CLKMULTEN0_CLKMULTENBBXLDET_enable << 4)

#define	RAC_CLKMULTEN0_CLKMULTENBBXMDET (0x1UL << 5)

#define	RAC_CLKMULTEN0_CLKMULTENBBXMDET_DEFAULT ( _RAC_CLKMULTEN0_CLKMULTENBBXMDET_DEFAULT << 5)

#define	RAC_CLKMULTEN0_CLKMULTENBBXMDET_disable ( _RAC_CLKMULTEN0_CLKMULTENBBXMDET_disable << 5)

#define	RAC_CLKMULTEN0_CLKMULTENBBXMDET_enable ( _RAC_CLKMULTEN0_CLKMULTENBBXMDET_enable << 5)

#define	RAC_CLKMULTEN0_CLKMULTENCFDET (0x1UL << 6)

#define	RAC_CLKMULTEN0_CLKMULTENCFDET_DEFAULT ( _RAC_CLKMULTEN0_CLKMULTENCFDET_DEFAULT << 6)

#define	RAC_CLKMULTEN0_CLKMULTENCFDET_disable ( _RAC_CLKMULTEN0_CLKMULTENCFDET_disable << 6)

#define	RAC_CLKMULTEN0_CLKMULTENCFDET_enable ( _RAC_CLKMULTEN0_CLKMULTENCFDET_enable << 6)

#define	RAC_CLKMULTEN0_CLKMULTENDITHER (0x1UL << 7)

#define	RAC_CLKMULTEN0_CLKMULTENDITHER_DEFAULT ( _RAC_CLKMULTEN0_CLKMULTENDITHER_DEFAULT << 7)

#define	RAC_CLKMULTEN0_CLKMULTENDITHER_disable ( _RAC_CLKMULTEN0_CLKMULTENDITHER_disable << 7)

#define	RAC_CLKMULTEN0_CLKMULTENDITHER_enable ( _RAC_CLKMULTEN0_CLKMULTENDITHER_enable << 7)

#define	RAC_CLKMULTEN0_CLKMULTENDRVADC (0x1UL << 8)

#define	RAC_CLKMULTEN0_CLKMULTENDRVADC_DEFAULT ( _RAC_CLKMULTEN0_CLKMULTENDRVADC_DEFAULT << 8)

#define	RAC_CLKMULTEN0_CLKMULTENDRVADC_disable ( _RAC_CLKMULTEN0_CLKMULTENDRVADC_disable << 8)

#define	RAC_CLKMULTEN0_CLKMULTENDRVADC_enable ( _RAC_CLKMULTEN0_CLKMULTENDRVADC_enable << 8)

#define	RAC_CLKMULTEN0_CLKMULTENDRVDIFF (0x1UL << 9)

#define	RAC_CLKMULTEN0_CLKMULTENDRVDIFF_DEFAULT ( _RAC_CLKMULTEN0_CLKMULTENDRVDIFF_DEFAULT << 9)

#define	RAC_CLKMULTEN0_CLKMULTENDRVDIFF_Differential ( _RAC_CLKMULTEN0_CLKMULTENDRVDIFF_Differential << 9)

#define	RAC_CLKMULTEN0_CLKMULTENDRVDIFF_Single_ended ( _RAC_CLKMULTEN0_CLKMULTENDRVDIFF_Single_ended << 9)

#define	RAC_CLKMULTEN0_CLKMULTENDRVRX2P4G (0x1UL << 10)

#define	RAC_CLKMULTEN0_CLKMULTENDRVRX2P4G_DEFAULT ( _RAC_CLKMULTEN0_CLKMULTENDRVRX2P4G_DEFAULT << 10)

#define	RAC_CLKMULTEN0_CLKMULTENDRVRX2P4G_disable ( _RAC_CLKMULTEN0_CLKMULTENDRVRX2P4G_disable << 10)

#define	RAC_CLKMULTEN0_CLKMULTENDRVRX2P4G_enable ( _RAC_CLKMULTEN0_CLKMULTENDRVRX2P4G_enable << 10)

#define	RAC_CLKMULTEN0_CLKMULTENFBDIV (0x1UL << 13)

#define	RAC_CLKMULTEN0_CLKMULTENFBDIV_DEFAULT ( _RAC_CLKMULTEN0_CLKMULTENFBDIV_DEFAULT << 13)

#define	RAC_CLKMULTEN0_CLKMULTENFBDIV_disable ( _RAC_CLKMULTEN0_CLKMULTENFBDIV_disable << 13)

#define	RAC_CLKMULTEN0_CLKMULTENFBDIV_enable ( _RAC_CLKMULTEN0_CLKMULTENFBDIV_enable << 13)

#define	RAC_CLKMULTEN0_CLKMULTENREFDIV (0x1UL << 14)

#define	RAC_CLKMULTEN0_CLKMULTENREFDIV_DEFAULT ( _RAC_CLKMULTEN0_CLKMULTENREFDIV_DEFAULT << 14)

#define	RAC_CLKMULTEN0_CLKMULTENREFDIV_disable ( _RAC_CLKMULTEN0_CLKMULTENREFDIV_disable << 14)

#define	RAC_CLKMULTEN0_CLKMULTENREFDIV_enable ( _RAC_CLKMULTEN0_CLKMULTENREFDIV_enable << 14)

#define	RAC_CLKMULTEN0_CLKMULTENREG1 (0x1UL << 15)

#define	RAC_CLKMULTEN0_CLKMULTENREG1_DEFAULT ( _RAC_CLKMULTEN0_CLKMULTENREG1_DEFAULT << 15)

#define	RAC_CLKMULTEN0_CLKMULTENREG1_disable ( _RAC_CLKMULTEN0_CLKMULTENREG1_disable << 15)

#define	RAC_CLKMULTEN0_CLKMULTENREG1_enable ( _RAC_CLKMULTEN0_CLKMULTENREG1_enable << 15)

#define	RAC_CLKMULTEN0_CLKMULTENREG2 (0x1UL << 16)

#define	RAC_CLKMULTEN0_CLKMULTENREG2_DEFAULT ( _RAC_CLKMULTEN0_CLKMULTENREG2_DEFAULT << 16)

#define	RAC_CLKMULTEN0_CLKMULTENREG2_disable ( _RAC_CLKMULTEN0_CLKMULTENREG2_disable << 16)

#define	RAC_CLKMULTEN0_CLKMULTENREG2_enable ( _RAC_CLKMULTEN0_CLKMULTENREG2_enable << 16)

#define	RAC_CLKMULTEN0_CLKMULTENROTDET (0x1UL << 17)

#define	RAC_CLKMULTEN0_CLKMULTENROTDET_DEFAULT ( _RAC_CLKMULTEN0_CLKMULTENROTDET_DEFAULT << 17)

#define	RAC_CLKMULTEN0_CLKMULTENROTDET_disable ( _RAC_CLKMULTEN0_CLKMULTENROTDET_disable << 17)

#define	RAC_CLKMULTEN0_CLKMULTENROTDET_enable ( _RAC_CLKMULTEN0_CLKMULTENROTDET_enable << 17)

#define	RAC_CLKMULTEN0_CLKMULTFREQCAL_DEFAULT ( _RAC_CLKMULTEN0_CLKMULTFREQCAL_DEFAULT << 18)

#define	RAC_CLKMULTEN0_CLKMULTFREQCAL_pedes_14uA ( _RAC_CLKMULTEN0_CLKMULTFREQCAL_pedes_14uA << 18)

#define	RAC_CLKMULTEN0_CLKMULTFREQCAL_pedes_22uA ( _RAC_CLKMULTEN0_CLKMULTFREQCAL_pedes_22uA << 18)

#define	RAC_CLKMULTEN0_CLKMULTFREQCAL_pedes_30uA ( _RAC_CLKMULTEN0_CLKMULTFREQCAL_pedes_30uA << 18)

#define	RAC_CLKMULTEN0_CLKMULTFREQCAL_pedes_38uA ( _RAC_CLKMULTEN0_CLKMULTFREQCAL_pedes_38uA << 18)

#define	RAC_CLKMULTEN0_CLKMULTREG1ADJV_DEFAULT ( _RAC_CLKMULTEN0_CLKMULTREG1ADJV_DEFAULT << 20)

#define	RAC_CLKMULTEN0_CLKMULTREG1ADJV_v1p28 ( _RAC_CLKMULTEN0_CLKMULTREG1ADJV_v1p28 << 20)

#define	RAC_CLKMULTEN0_CLKMULTREG1ADJV_v1p32 ( _RAC_CLKMULTEN0_CLKMULTREG1ADJV_v1p32 << 20)

#define	RAC_CLKMULTEN0_CLKMULTREG1ADJV_v1p33 ( _RAC_CLKMULTEN0_CLKMULTREG1ADJV_v1p33 << 20)

#define	RAC_CLKMULTEN0_CLKMULTREG1ADJV_v1p38 ( _RAC_CLKMULTEN0_CLKMULTREG1ADJV_v1p38 << 20)

#define	RAC_CLKMULTEN0_CLKMULTREG2ADJI_DEFAULT ( _RAC_CLKMULTEN0_CLKMULTREG2ADJI_DEFAULT << 22)

#define	RAC_CLKMULTEN0_CLKMULTREG2ADJI_I_1040uA ( _RAC_CLKMULTEN0_CLKMULTREG2ADJI_I_1040uA << 22)

#define	RAC_CLKMULTEN0_CLKMULTREG2ADJI_I_200uA ( _RAC_CLKMULTEN0_CLKMULTREG2ADJI_I_200uA << 22)

#define	RAC_CLKMULTEN0_CLKMULTREG2ADJI_I_480uA ( _RAC_CLKMULTEN0_CLKMULTREG2ADJI_I_480uA << 22)

#define	RAC_CLKMULTEN0_CLKMULTREG2ADJI_I_760uA ( _RAC_CLKMULTEN0_CLKMULTREG2ADJI_I_760uA << 22)

#define	RAC_CLKMULTEN0_CLKMULTREG2ADJV_DEFAULT ( _RAC_CLKMULTEN0_CLKMULTREG2ADJV_DEFAULT << 24)

#define	RAC_CLKMULTEN0_CLKMULTREG2ADJV_v1p03 ( _RAC_CLKMULTEN0_CLKMULTREG2ADJV_v1p03 << 24)

#define	RAC_CLKMULTEN0_CLKMULTREG2ADJV_v1p09 ( _RAC_CLKMULTEN0_CLKMULTREG2ADJV_v1p09 << 24)

#define	RAC_CLKMULTEN0_CLKMULTREG2ADJV_v1p10 ( _RAC_CLKMULTEN0_CLKMULTREG2ADJV_v1p10 << 24)

#define	RAC_CLKMULTEN0_CLKMULTREG2ADJV_v1p16 ( _RAC_CLKMULTEN0_CLKMULTREG2ADJV_v1p16 << 24)

#define	RAC_CLKMULTEN1_CLKMULTINNIBBLE_DEFAULT ( _RAC_CLKMULTEN1_CLKMULTINNIBBLE_DEFAULT << 0)

#define	RAC_CLKMULTEN1_CLKMULTLDCNIB (0x1UL << 4)

#define	RAC_CLKMULTEN1_CLKMULTLDCNIB_DEFAULT ( _RAC_CLKMULTEN1_CLKMULTLDCNIB_DEFAULT << 4)

#define	RAC_CLKMULTEN1_CLKMULTLDCNIB_disable ( _RAC_CLKMULTEN1_CLKMULTLDCNIB_disable << 4)

#define	RAC_CLKMULTEN1_CLKMULTLDCNIB_enable ( _RAC_CLKMULTEN1_CLKMULTLDCNIB_enable << 4)

#define	RAC_CLKMULTEN1_CLKMULTLDFNIB (0x1UL << 5)

#define	RAC_CLKMULTEN1_CLKMULTLDFNIB_DEFAULT ( _RAC_CLKMULTEN1_CLKMULTLDFNIB_DEFAULT << 5)

#define	RAC_CLKMULTEN1_CLKMULTLDFNIB_disable ( _RAC_CLKMULTEN1_CLKMULTLDFNIB_disable << 5)

#define	RAC_CLKMULTEN1_CLKMULTLDFNIB_enable ( _RAC_CLKMULTEN1_CLKMULTLDFNIB_enable << 5)

#define	RAC_CLKMULTEN1_CLKMULTLDMNIB (0x1UL << 6)

#define	RAC_CLKMULTEN1_CLKMULTLDMNIB_DEFAULT ( _RAC_CLKMULTEN1_CLKMULTLDMNIB_DEFAULT << 6)

#define	RAC_CLKMULTEN1_CLKMULTLDMNIB_disable ( _RAC_CLKMULTEN1_CLKMULTLDMNIB_disable << 6)

#define	RAC_CLKMULTEN1_CLKMULTLDMNIB_enable ( _RAC_CLKMULTEN1_CLKMULTLDMNIB_enable << 6)

#define	RAC_CLKMULTEN1_CLKMULTRDNIBBLE_coarse_nibble ( _RAC_CLKMULTEN1_CLKMULTRDNIBBLE_coarse_nibble << 7)

#define	RAC_CLKMULTEN1_CLKMULTRDNIBBLE_DEFAULT ( _RAC_CLKMULTEN1_CLKMULTRDNIBBLE_DEFAULT << 7)

#define	RAC_CLKMULTEN1_CLKMULTRDNIBBLE_fine_nibble ( _RAC_CLKMULTEN1_CLKMULTRDNIBBLE_fine_nibble << 7)

#define	RAC_CLKMULTEN1_CLKMULTRDNIBBLE_moderate_nibble ( _RAC_CLKMULTEN1_CLKMULTRDNIBBLE_moderate_nibble << 7)

#define	RAC_CLKMULTEN1_CLKMULTRDNIBBLE_quarter_nibble ( _RAC_CLKMULTEN1_CLKMULTRDNIBBLE_quarter_nibble << 7)

#define	RAC_CLKMULTSTATUS_CLKMULTACKVALID (0x1UL << 4)

#define	RAC_CLKMULTSTATUS_CLKMULTACKVALID_DEFAULT ( _RAC_CLKMULTSTATUS_CLKMULTACKVALID_DEFAULT << 4)

#define	RAC_CLKMULTSTATUS_CLKMULTACKVALID_invalid ( _RAC_CLKMULTSTATUS_CLKMULTACKVALID_invalid << 4)

#define	RAC_CLKMULTSTATUS_CLKMULTACKVALID_valid ( _RAC_CLKMULTSTATUS_CLKMULTACKVALID_valid << 4)

#define	RAC_CLKMULTSTATUS_CLKMULTOUTNIBBLE_DEFAULT ( _RAC_CLKMULTSTATUS_CLKMULTOUTNIBBLE_DEFAULT << 0)

#define	RAC_CMD_CLEARRXOVERFLOW (0x1UL << 6)

#define	RAC_CMD_CLEARRXOVERFLOW_DEFAULT ( _RAC_CMD_CLEARRXOVERFLOW_DEFAULT << 6)

#define	RAC_CMD_CLEARTXEN (0x1UL << 3)

#define	RAC_CMD_CLEARTXEN_DEFAULT ( _RAC_CMD_CLEARTXEN_DEFAULT << 3)

#define	RAC_CMD_FORCETX (0x1UL << 1)

#define	RAC_CMD_FORCETX_DEFAULT ( _RAC_CMD_FORCETX_DEFAULT << 1)

#define	RAC_CMD_LNAENCLEAR (0x1UL << 15)

#define	RAC_CMD_LNAENCLEAR_DEFAULT ( _RAC_CMD_LNAENCLEAR_DEFAULT << 15)

#define	RAC_CMD_LNAENSET (0x1UL << 14)

#define	RAC_CMD_LNAENSET_DEFAULT ( _RAC_CMD_LNAENSET_DEFAULT << 14)

#define	RAC_CMD_PAENCLEAR (0x1UL << 13)

#define	RAC_CMD_PAENCLEAR_DEFAULT ( _RAC_CMD_PAENCLEAR_DEFAULT << 13)

#define	RAC_CMD_PAENSET (0x1UL << 12)

#define	RAC_CMD_PAENSET_DEFAULT ( _RAC_CMD_PAENSET_DEFAULT << 12)

#define	RAC_CMD_RXCAL (0x1UL << 7)

#define	RAC_CMD_RXCAL_DEFAULT ( _RAC_CMD_RXCAL_DEFAULT << 7)

#define	RAC_CMD_RXDIS (0x1UL << 8)

#define	RAC_CMD_RXDIS_DEFAULT ( _RAC_CMD_RXDIS_DEFAULT << 8)

#define	RAC_CMD_TXAFTERFRAME (0x1UL << 4)

#define	RAC_CMD_TXAFTERFRAME_DEFAULT ( _RAC_CMD_TXAFTERFRAME_DEFAULT << 4)

#define	RAC_CMD_TXDIS (0x1UL << 5)

#define	RAC_CMD_TXDIS_DEFAULT ( _RAC_CMD_TXDIS_DEFAULT << 5)

#define	RAC_CMD_TXEN (0x1UL << 0)

#define	RAC_CMD_TXEN_DEFAULT ( _RAC_CMD_TXEN_DEFAULT << 0)

#define	RAC_CMD_TXONCCA (0x1UL << 2)

#define	RAC_CMD_TXONCCA_DEFAULT ( _RAC_CMD_TXONCCA_DEFAULT << 2)

#define	RAC_CTRL_ACTIVEPOL (0x1UL << 7)

#define	RAC_CTRL_ACTIVEPOL_DEFAULT ( _RAC_CTRL_ACTIVEPOL_DEFAULT << 7)

#define	RAC_CTRL_ACTIVEPOL_X0 ( _RAC_CTRL_ACTIVEPOL_X0 << 7)

#define	RAC_CTRL_ACTIVEPOL_X1 ( _RAC_CTRL_ACTIVEPOL_X1 << 7)

#define	RAC_CTRL_FORCEDISABLE (0x1UL << 0)

#define	RAC_CTRL_FORCEDISABLE_DEFAULT ( _RAC_CTRL_FORCEDISABLE_DEFAULT << 0)

#define	RAC_CTRL_LNAENPOL (0x1UL << 9)

#define	RAC_CTRL_LNAENPOL_DEFAULT ( _RAC_CTRL_LNAENPOL_DEFAULT << 9)

#define	RAC_CTRL_LNAENPOL_X0 ( _RAC_CTRL_LNAENPOL_X0 << 9)

#define	RAC_CTRL_LNAENPOL_X1 ( _RAC_CTRL_LNAENPOL_X1 << 9)

#define	RAC_CTRL_PAENPOL (0x1UL << 8)

#define	RAC_CTRL_PAENPOL_DEFAULT ( _RAC_CTRL_PAENPOL_DEFAULT << 8)

#define	RAC_CTRL_PAENPOL_X0 ( _RAC_CTRL_PAENPOL_X0 << 8)

#define	RAC_CTRL_PAENPOL_X1 ( _RAC_CTRL_PAENPOL_X1 << 8)

#define	RAC_CTRL_PRSCLR (0x1UL << 5)

#define	RAC_CTRL_PRSCLR_DEFAULT ( _RAC_CTRL_PRSCLR_DEFAULT << 5)

#define	RAC_CTRL_PRSCLR_PRSCH ( _RAC_CTRL_PRSCLR_PRSCH << 5)

#define	RAC_CTRL_PRSCLR_RXSEARCH ( _RAC_CTRL_PRSCLR_RXSEARCH << 5)

#define	RAC_CTRL_PRSFORCETX (0x1UL << 16)

#define	RAC_CTRL_PRSFORCETX_DEFAULT ( _RAC_CTRL_PRSFORCETX_DEFAULT << 16)

#define	RAC_CTRL_PRSFORCETX_X0 ( _RAC_CTRL_PRSFORCETX_X0 << 16)

#define	RAC_CTRL_PRSFORCETX_X1 ( _RAC_CTRL_PRSFORCETX_X1 << 16)

#define	RAC_CTRL_PRSMODE (0x1UL << 3)

#define	RAC_CTRL_PRSMODE_DEFAULT ( _RAC_CTRL_PRSMODE_DEFAULT << 3)

#define	RAC_CTRL_PRSMODE_DIRECT ( _RAC_CTRL_PRSMODE_DIRECT << 3)

#define	RAC_CTRL_PRSMODE_PULSE ( _RAC_CTRL_PRSMODE_PULSE << 3)

#define	RAC_CTRL_PRSRXDIS (0x1UL << 10)

#define	RAC_CTRL_PRSRXDIS_DEFAULT ( _RAC_CTRL_PRSRXDIS_DEFAULT << 10)

#define	RAC_CTRL_PRSRXDIS_X0 ( _RAC_CTRL_PRSRXDIS_X0 << 10)

#define	RAC_CTRL_PRSRXDIS_X1 ( _RAC_CTRL_PRSRXDIS_X1 << 10)

#define	RAC_CTRL_PRSTXEN (0x1UL << 1)

#define	RAC_CTRL_PRSTXEN_DEFAULT ( _RAC_CTRL_PRSTXEN_DEFAULT << 1)

#define	RAC_CTRL_TXAFTERRX (0x1UL << 2)

#define	RAC_CTRL_TXAFTERRX_DEFAULT ( _RAC_CTRL_TXAFTERRX_DEFAULT << 2)

#define	RAC_CTRL_TXAFTERRX_X0 ( _RAC_CTRL_TXAFTERRX_X0 << 2)

#define	RAC_CTRL_TXAFTERRX_X1 ( _RAC_CTRL_TXAFTERRX_X1 << 2)

#define	RAC_CTRL_TXPOSTPONE (0x1UL << 6)

#define	RAC_CTRL_TXPOSTPONE_DEFAULT ( _RAC_CTRL_TXPOSTPONE_DEFAULT << 6)

#define	RAC_CTRL_TXPOSTPONE_X0 ( _RAC_CTRL_TXPOSTPONE_X0 << 6)

#define	RAC_CTRL_TXPOSTPONE_X1 ( _RAC_CTRL_TXPOSTPONE_X1 << 6)

#define	RAC_DIGCLKRETIMECTRL_DIGCLKRETIMEDISRETIME (0x1UL << 1)

#define	RAC_DIGCLKRETIMECTRL_DIGCLKRETIMEDISRETIME_DEFAULT ( _RAC_DIGCLKRETIMECTRL_DIGCLKRETIMEDISRETIME_DEFAULT << 1)

#define	RAC_DIGCLKRETIMECTRL_DIGCLKRETIMEDISRETIME_disable_retime ( _RAC_DIGCLKRETIMECTRL_DIGCLKRETIMEDISRETIME_disable_retime << 1)

#define	RAC_DIGCLKRETIMECTRL_DIGCLKRETIMEDISRETIME_enable_retime ( _RAC_DIGCLKRETIMECTRL_DIGCLKRETIMEDISRETIME_enable_retime << 1)

#define	RAC_DIGCLKRETIMECTRL_DIGCLKRETIMEENRETIME (0x1UL << 0)

#define	RAC_DIGCLKRETIMECTRL_DIGCLKRETIMEENRETIME_DEFAULT ( _RAC_DIGCLKRETIMECTRL_DIGCLKRETIMEENRETIME_DEFAULT << 0)

#define	RAC_DIGCLKRETIMECTRL_DIGCLKRETIMEENRETIME_disable ( _RAC_DIGCLKRETIMECTRL_DIGCLKRETIMEENRETIME_disable << 0)

#define	RAC_DIGCLKRETIMECTRL_DIGCLKRETIMEENRETIME_enable ( _RAC_DIGCLKRETIMECTRL_DIGCLKRETIMEENRETIME_enable << 0)

#define	RAC_DIGCLKRETIMECTRL_DIGCLKRETIMELIMITH_DEFAULT ( _RAC_DIGCLKRETIMECTRL_DIGCLKRETIMELIMITH_DEFAULT << 4)

#define	RAC_DIGCLKRETIMECTRL_DIGCLKRETIMELIMITL_DEFAULT ( _RAC_DIGCLKRETIMECTRL_DIGCLKRETIMELIMITL_DEFAULT << 8)

#define	RAC_DIGCLKRETIMECTRL_DIGCLKRETIMERESETN (0x1UL << 2)

#define	RAC_DIGCLKRETIMECTRL_DIGCLKRETIMERESETN_DEFAULT ( _RAC_DIGCLKRETIMECTRL_DIGCLKRETIMERESETN_DEFAULT << 2)

#define	RAC_DIGCLKRETIMECTRL_DIGCLKRETIMERESETN_operate ( _RAC_DIGCLKRETIMECTRL_DIGCLKRETIMERESETN_operate << 2)

#define	RAC_DIGCLKRETIMECTRL_DIGCLKRETIMERESETN_reset ( _RAC_DIGCLKRETIMECTRL_DIGCLKRETIMERESETN_reset << 2)

#define	RAC_DIGCLKRETIMESTATUS_DIGCLKRETIMECLKSEL (0x1UL << 0)

#define	RAC_DIGCLKRETIMESTATUS_DIGCLKRETIMECLKSEL_DEFAULT ( _RAC_DIGCLKRETIMESTATUS_DIGCLKRETIMECLKSEL_DEFAULT << 0)

#define	RAC_DIGCLKRETIMESTATUS_DIGCLKRETIMECLKSEL_use_raw_clk ( _RAC_DIGCLKRETIMESTATUS_DIGCLKRETIMECLKSEL_use_raw_clk << 0)

#define	RAC_DIGCLKRETIMESTATUS_DIGCLKRETIMECLKSEL_use_retimed_clk ( _RAC_DIGCLKRETIMESTATUS_DIGCLKRETIMECLKSEL_use_retimed_clk << 0)

#define	RAC_DIGCLKRETIMESTATUS_DIGCLKRETIMERESETNLO (0x1UL << 1)

#define	RAC_DIGCLKRETIMESTATUS_DIGCLKRETIMERESETNLO_DEFAULT ( _RAC_DIGCLKRETIMESTATUS_DIGCLKRETIMERESETNLO_DEFAULT << 1)

#define	RAC_DIGCLKRETIMESTATUS_DIGCLKRETIMERESETNLO_hi ( _RAC_DIGCLKRETIMESTATUS_DIGCLKRETIMERESETNLO_hi << 1)

#define	RAC_DIGCLKRETIMESTATUS_DIGCLKRETIMERESETNLO_lo ( _RAC_DIGCLKRETIMESTATUS_DIGCLKRETIMERESETNLO_lo << 1)

#define	RAC_EN_EN (0x1UL << 0)

#define	RAC_EN_EN_DEFAULT ( _RAC_EN_EN_DEFAULT << 0)

#define	RAC_FORCESTATE_FORCESTATE_DEFAULT ( _RAC_FORCESTATE_FORCESTATE_DEFAULT << 0)

#define	RAC_IEN_BUSERROR (0x1UL << 2)

#define	RAC_IEN_BUSERROR_DEFAULT ( _RAC_IEN_BUSERROR_DEFAULT << 2)

#define	RAC_IEN_SEQ_DEFAULT ( _RAC_IEN_SEQ_DEFAULT << 16)

#define	RAC_IEN_STATECHANGE (0x1UL << 0)

#define	RAC_IEN_STATECHANGE_DEFAULT ( _RAC_IEN_STATECHANGE_DEFAULT << 0)

#define	RAC_IEN_STIMCMPEV (0x1UL << 1)

#define	RAC_IEN_STIMCMPEV_DEFAULT ( _RAC_IEN_STIMCMPEV_DEFAULT << 1)

#define	RAC_IF_BUSERROR (0x1UL << 2)

#define	RAC_IF_BUSERROR_DEFAULT ( _RAC_IF_BUSERROR_DEFAULT << 2)

#define	RAC_IF_SEQ_DEFAULT ( _RAC_IF_SEQ_DEFAULT << 16)

#define	RAC_IF_STATECHANGE (0x1UL << 0)

#define	RAC_IF_STATECHANGE_DEFAULT ( _RAC_IF_STATECHANGE_DEFAULT << 0)

#define	RAC_IF_STIMCMPEV (0x1UL << 1)

#define	RAC_IF_STIMCMPEV_DEFAULT ( _RAC_IF_STIMCMPEV_DEFAULT << 1)

#define	RAC_IFADCCAL_IFADCENRCCAL (0x1UL << 0)

#define	RAC_IFADCCAL_IFADCENRCCAL_DEFAULT ( _RAC_IFADCCAL_IFADCENRCCAL_DEFAULT << 0)

#define	RAC_IFADCCAL_IFADCENRCCAL_rccal_disable ( _RAC_IFADCCAL_IFADCENRCCAL_rccal_disable << 0)

#define	RAC_IFADCCAL_IFADCENRCCAL_rccal_enable ( _RAC_IFADCCAL_IFADCENRCCAL_rccal_enable << 0)

#define	RAC_IFADCCAL_IFADCTUNERC_DEFAULT ( _RAC_IFADCCAL_IFADCTUNERC_DEFAULT << 8)

#define	RAC_IFADCCAL_IFADCTUNERCCALMODE (0x1UL << 1)

#define	RAC_IFADCCAL_IFADCTUNERCCALMODE_ADCmode ( _RAC_IFADCCAL_IFADCTUNERCCALMODE_ADCmode << 1)

#define	RAC_IFADCCAL_IFADCTUNERCCALMODE_DEFAULT ( _RAC_IFADCCAL_IFADCTUNERCCALMODE_DEFAULT << 1)

#define	RAC_IFADCCAL_IFADCTUNERCCALMODE_SYmode ( _RAC_IFADCCAL_IFADCTUNERCCALMODE_SYmode << 1)

#define	RAC_IFADCSTATUS_IFADCRCCALOUT (0x1UL << 0)

#define	RAC_IFADCSTATUS_IFADCRCCALOUT_DEFAULT ( _RAC_IFADCSTATUS_IFADCRCCALOUT_DEFAULT << 0)

#define	RAC_IFADCSTATUS_IFADCRCCALOUT_hi ( _RAC_IFADCSTATUS_IFADCRCCALOUT_hi << 0)

#define	RAC_IFADCSTATUS_IFADCRCCALOUT_lo ( _RAC_IFADCSTATUS_IFADCRCCALOUT_lo << 0)

#define	RAC_IFADCTRIM_IFADCCLKSEL (0x1UL << 0)

#define	RAC_IFADCTRIM_IFADCCLKSEL_clk_2p4g ( _RAC_IFADCTRIM_IFADCCLKSEL_clk_2p4g << 0)

#define	RAC_IFADCTRIM_IFADCCLKSEL_clk_subg ( _RAC_IFADCTRIM_IFADCCLKSEL_clk_subg << 0)

#define	RAC_IFADCTRIM_IFADCCLKSEL_DEFAULT ( _RAC_IFADCTRIM_IFADCCLKSEL_DEFAULT << 0)

#define	RAC_IFADCTRIM_IFADCENHALFMODE (0x1UL << 1)

#define	RAC_IFADCTRIM_IFADCENHALFMODE_DEFAULT ( _RAC_IFADCTRIM_IFADCENHALFMODE_DEFAULT << 1)

#define	RAC_IFADCTRIM_IFADCENHALFMODE_full_speed_mode ( _RAC_IFADCTRIM_IFADCENHALFMODE_full_speed_mode << 1)

#define	RAC_IFADCTRIM_IFADCENHALFMODE_half_speed_mode ( _RAC_IFADCTRIM_IFADCENHALFMODE_half_speed_mode << 1)

#define	RAC_IFADCTRIM_IFADCLDOSERIESAMPLVL_DEFAULT ( _RAC_IFADCTRIM_IFADCLDOSERIESAMPLVL_DEFAULT << 2)

#define	RAC_IFADCTRIM_IFADCLDOSERIESAMPLVL_v1p20 ( _RAC_IFADCTRIM_IFADCLDOSERIESAMPLVL_v1p20 << 2)

#define	RAC_IFADCTRIM_IFADCLDOSERIESAMPLVL_v1p24 ( _RAC_IFADCTRIM_IFADCLDOSERIESAMPLVL_v1p24 << 2)

#define	RAC_IFADCTRIM_IFADCLDOSERIESAMPLVL_v1p28 ( _RAC_IFADCTRIM_IFADCLDOSERIESAMPLVL_v1p28 << 2)

#define	RAC_IFADCTRIM_IFADCLDOSERIESAMPLVL_v1p32 ( _RAC_IFADCTRIM_IFADCLDOSERIESAMPLVL_v1p32 << 2)

#define	RAC_IFADCTRIM_IFADCLDOSERIESAMPLVL_v1p35 ( _RAC_IFADCTRIM_IFADCLDOSERIESAMPLVL_v1p35 << 2)

#define	RAC_IFADCTRIM_IFADCLDOSERIESAMPLVL_v1p39 ( _RAC_IFADCTRIM_IFADCLDOSERIESAMPLVL_v1p39 << 2)

#define	RAC_IFADCTRIM_IFADCLDOSERIESAMPLVL_v1p42 ( _RAC_IFADCTRIM_IFADCLDOSERIESAMPLVL_v1p42 << 2)

#define	RAC_IFADCTRIM_IFADCLDOSERIESAMPLVL_v1p46 ( _RAC_IFADCTRIM_IFADCLDOSERIESAMPLVL_v1p46 << 2)

#define	RAC_IFADCTRIM_IFADCLDOSHUNTAMPLVL_DEFAULT ( _RAC_IFADCTRIM_IFADCLDOSHUNTAMPLVL_DEFAULT << 5)

#define	RAC_IFADCTRIM_IFADCLDOSHUNTAMPLVL_v1p20 ( _RAC_IFADCTRIM_IFADCLDOSHUNTAMPLVL_v1p20 << 5)

#define	RAC_IFADCTRIM_IFADCLDOSHUNTAMPLVL_v1p24 ( _RAC_IFADCTRIM_IFADCLDOSHUNTAMPLVL_v1p24 << 5)

#define	RAC_IFADCTRIM_IFADCLDOSHUNTAMPLVL_v1p28 ( _RAC_IFADCTRIM_IFADCLDOSHUNTAMPLVL_v1p28 << 5)

#define	RAC_IFADCTRIM_IFADCLDOSHUNTAMPLVL_v1p32 ( _RAC_IFADCTRIM_IFADCLDOSHUNTAMPLVL_v1p32 << 5)

#define	RAC_IFADCTRIM_IFADCLDOSHUNTAMPLVL_v1p35 ( _RAC_IFADCTRIM_IFADCLDOSHUNTAMPLVL_v1p35 << 5)

#define	RAC_IFADCTRIM_IFADCLDOSHUNTAMPLVL_v1p39 ( _RAC_IFADCTRIM_IFADCLDOSHUNTAMPLVL_v1p39 << 5)

#define	RAC_IFADCTRIM_IFADCLDOSHUNTAMPLVL_v1p42 ( _RAC_IFADCTRIM_IFADCLDOSHUNTAMPLVL_v1p42 << 5)

#define	RAC_IFADCTRIM_IFADCLDOSHUNTAMPLVL_v1p46 ( _RAC_IFADCTRIM_IFADCLDOSHUNTAMPLVL_v1p46 << 5)

#define	RAC_IFADCTRIM_IFADCLDOSHUNTCURLP (0x1UL << 8)

#define	RAC_IFADCTRIM_IFADCLDOSHUNTCURLP_DEFAULT ( _RAC_IFADCTRIM_IFADCLDOSHUNTCURLP_DEFAULT << 8)

#define	RAC_IFADCTRIM_IFADCLDOSHUNTCURLP_low_power_disabled ( _RAC_IFADCTRIM_IFADCLDOSHUNTCURLP_low_power_disabled << 8)

#define	RAC_IFADCTRIM_IFADCLDOSHUNTCURLP_low_power_enabled ( _RAC_IFADCTRIM_IFADCLDOSHUNTCURLP_low_power_enabled << 8)

#define	RAC_IFADCTRIM_IFADCLDOSHUNTCURLVL_current_180uA ( _RAC_IFADCTRIM_IFADCLDOSHUNTCURLVL_current_180uA << 9)

#define	RAC_IFADCTRIM_IFADCLDOSHUNTCURLVL_current_190uA ( _RAC_IFADCTRIM_IFADCLDOSHUNTCURLVL_current_190uA << 9)

#define	RAC_IFADCTRIM_IFADCLDOSHUNTCURLVL_current_200uA ( _RAC_IFADCTRIM_IFADCLDOSHUNTCURLVL_current_200uA << 9)

#define	RAC_IFADCTRIM_IFADCLDOSHUNTCURLVL_current_210uA ( _RAC_IFADCTRIM_IFADCLDOSHUNTCURLVL_current_210uA << 9)

#define	RAC_IFADCTRIM_IFADCLDOSHUNTCURLVL_DEFAULT ( _RAC_IFADCTRIM_IFADCLDOSHUNTCURLVL_DEFAULT << 9)

#define	RAC_IFADCTRIM_IFADCOTAST1CURRENT_DEFAULT ( _RAC_IFADCTRIM_IFADCOTAST1CURRENT_DEFAULT << 11)

#define	RAC_IFADCTRIM_IFADCOTAST1CURRENT_negative_11p ( _RAC_IFADCTRIM_IFADCOTAST1CURRENT_negative_11p << 11)

#define	RAC_IFADCTRIM_IFADCOTAST1CURRENT_negative_20p ( _RAC_IFADCTRIM_IFADCOTAST1CURRENT_negative_20p << 11)

#define	RAC_IFADCTRIM_IFADCOTAST1CURRENT_nominal ( _RAC_IFADCTRIM_IFADCOTAST1CURRENT_nominal << 11)

#define	RAC_IFADCTRIM_IFADCOTAST1CURRENT_positive_15p ( _RAC_IFADCTRIM_IFADCOTAST1CURRENT_positive_15p << 11)

#define	RAC_IFADCTRIM_IFADCOTAST2CURRENT_DEFAULT ( _RAC_IFADCTRIM_IFADCOTAST2CURRENT_DEFAULT << 13)

#define	RAC_IFADCTRIM_IFADCOTAST2CURRENT_negative_11p ( _RAC_IFADCTRIM_IFADCOTAST2CURRENT_negative_11p << 13)

#define	RAC_IFADCTRIM_IFADCOTAST2CURRENT_negative_20p ( _RAC_IFADCTRIM_IFADCOTAST2CURRENT_negative_20p << 13)

#define	RAC_IFADCTRIM_IFADCOTAST2CURRENT_nominal ( _RAC_IFADCTRIM_IFADCOTAST2CURRENT_nominal << 13)

#define	RAC_IFADCTRIM_IFADCOTAST2CURRENT_positive_15p ( _RAC_IFADCTRIM_IFADCOTAST2CURRENT_positive_15p << 13)

#define	RAC_IFADCTRIM_IFADCREFBUFAMPLVL_DEFAULT ( _RAC_IFADCTRIM_IFADCREFBUFAMPLVL_DEFAULT << 15)

#define	RAC_IFADCTRIM_IFADCREFBUFAMPLVL_v0p88 ( _RAC_IFADCTRIM_IFADCREFBUFAMPLVL_v0p88 << 15)

#define	RAC_IFADCTRIM_IFADCREFBUFAMPLVL_v0p91 ( _RAC_IFADCTRIM_IFADCREFBUFAMPLVL_v0p91 << 15)

#define	RAC_IFADCTRIM_IFADCREFBUFAMPLVL_v0p94 ( _RAC_IFADCTRIM_IFADCREFBUFAMPLVL_v0p94 << 15)

#define	RAC_IFADCTRIM_IFADCREFBUFAMPLVL_v0p97 ( _RAC_IFADCTRIM_IFADCREFBUFAMPLVL_v0p97 << 15)

#define	RAC_IFADCTRIM_IFADCREFBUFAMPLVL_v1p00 ( _RAC_IFADCTRIM_IFADCREFBUFAMPLVL_v1p00 << 15)

#define	RAC_IFADCTRIM_IFADCREFBUFAMPLVL_v1p03 ( _RAC_IFADCTRIM_IFADCREFBUFAMPLVL_v1p03 << 15)

#define	RAC_IFADCTRIM_IFADCREFBUFAMPLVL_v1p06 ( _RAC_IFADCTRIM_IFADCREFBUFAMPLVL_v1p06 << 15)

#define	RAC_IFADCTRIM_IFADCREFBUFAMPLVL_v1p09 ( _RAC_IFADCTRIM_IFADCREFBUFAMPLVL_v1p09 << 15)

#define	RAC_IFADCTRIM_IFADCREFBUFCURLVL_current_65uA ( _RAC_IFADCTRIM_IFADCREFBUFCURLVL_current_65uA << 18)

#define	RAC_IFADCTRIM_IFADCREFBUFCURLVL_current_75uA ( _RAC_IFADCTRIM_IFADCREFBUFCURLVL_current_75uA << 18)

#define	RAC_IFADCTRIM_IFADCREFBUFCURLVL_current_85uA ( _RAC_IFADCTRIM_IFADCREFBUFCURLVL_current_85uA << 18)

#define	RAC_IFADCTRIM_IFADCREFBUFCURLVL_current_95uA ( _RAC_IFADCTRIM_IFADCREFBUFCURLVL_current_95uA << 18)

#define	RAC_IFADCTRIM_IFADCREFBUFCURLVL_DEFAULT ( _RAC_IFADCTRIM_IFADCREFBUFCURLVL_DEFAULT << 18)

#define	RAC_IFADCTRIM_IFADCSIDETONEAMP_DEFAULT ( _RAC_IFADCTRIM_IFADCSIDETONEAMP_DEFAULT << 20)

#define	RAC_IFADCTRIM_IFADCSIDETONEAMP_diff_pk_100mV ( _RAC_IFADCTRIM_IFADCSIDETONEAMP_diff_pk_100mV << 20)

#define	RAC_IFADCTRIM_IFADCSIDETONEAMP_diff_pk_10mV ( _RAC_IFADCTRIM_IFADCSIDETONEAMP_diff_pk_10mV << 20)

#define	RAC_IFADCTRIM_IFADCSIDETONEAMP_diff_pk_20mV ( _RAC_IFADCTRIM_IFADCSIDETONEAMP_diff_pk_20mV << 20)

#define	RAC_IFADCTRIM_IFADCSIDETONEAMP_diff_pk_50mV ( _RAC_IFADCTRIM_IFADCSIDETONEAMP_diff_pk_50mV << 20)

#define	RAC_IFADCTRIM_IFADCSIDETONEFREQ_DEFAULT ( _RAC_IFADCTRIM_IFADCSIDETONEFREQ_DEFAULT << 22)

#define	RAC_IFADCTRIM_IFADCSIDETONEFREQ_div_128 ( _RAC_IFADCTRIM_IFADCSIDETONEFREQ_div_128 << 22)

#define	RAC_IFADCTRIM_IFADCSIDETONEFREQ_div_16 ( _RAC_IFADCTRIM_IFADCSIDETONEFREQ_div_16 << 22)

#define	RAC_IFADCTRIM_IFADCSIDETONEFREQ_div_32 ( _RAC_IFADCTRIM_IFADCSIDETONEFREQ_div_32 << 22)

#define	RAC_IFADCTRIM_IFADCSIDETONEFREQ_div_4 ( _RAC_IFADCTRIM_IFADCSIDETONEFREQ_div_4 << 22)

#define	RAC_IFADCTRIM_IFADCSIDETONEFREQ_div_64 ( _RAC_IFADCTRIM_IFADCSIDETONEFREQ_div_64 << 22)

#define	RAC_IFADCTRIM_IFADCSIDETONEFREQ_div_8 ( _RAC_IFADCTRIM_IFADCSIDETONEFREQ_div_8 << 22)

#define	RAC_IFADCTRIM_IFADCSIDETONEFREQ_na0 ( _RAC_IFADCTRIM_IFADCSIDETONEFREQ_na0 << 22)

#define	RAC_IFADCTRIM_IFADCSIDETONEFREQ_na7 ( _RAC_IFADCTRIM_IFADCSIDETONEFREQ_na7 << 22)

#define	RAC_IFADCTRIM_IFADCTUNEZERO (0x1UL << 25)

#define	RAC_IFADCTRIM_IFADCTUNEZERO_DEFAULT ( _RAC_IFADCTRIM_IFADCTUNEZERO_DEFAULT << 25)

#define	RAC_IFADCTRIM_IFADCTUNEZERO_half_freq_zero ( _RAC_IFADCTRIM_IFADCTUNEZERO_half_freq_zero << 25)

#define	RAC_IFADCTRIM_IFADCTUNEZERO_nominal_zero ( _RAC_IFADCTRIM_IFADCTUNEZERO_nominal_zero << 25)

#define	RAC_IFADCTRIM_IFADCVCMLVL_DEFAULT ( _RAC_IFADCTRIM_IFADCVCMLVL_DEFAULT << 26)

#define	RAC_IFADCTRIM_IFADCVCMLVL_ratio_0p48 ( _RAC_IFADCTRIM_IFADCVCMLVL_ratio_0p48 << 26)

#define	RAC_IFADCTRIM_IFADCVCMLVL_ratio_0p49 ( _RAC_IFADCTRIM_IFADCVCMLVL_ratio_0p49 << 26)

#define	RAC_IFADCTRIM_IFADCVCMLVL_ratio_0p5 ( _RAC_IFADCTRIM_IFADCVCMLVL_ratio_0p5 << 26)

#define	RAC_IFADCTRIM_IFADCVCMLVL_ratio_0p52 ( _RAC_IFADCTRIM_IFADCVCMLVL_ratio_0p52 << 26)

#define	RAC_IFPGACTRL_DCCALDCGEAR_DEFAULT ( _RAC_IFPGACTRL_DCCALDCGEAR_DEFAULT << 25)

#define	RAC_IFPGACTRL_DCCALDEC0_DEFAULT ( _RAC_IFPGACTRL_DCCALDEC0_DEFAULT << 22)

#define	RAC_IFPGACTRL_DCCALDEC0_DF3 ( _RAC_IFPGACTRL_DCCALDEC0_DF3 << 22)

#define	RAC_IFPGACTRL_DCCALDEC0_DF4NARROW ( _RAC_IFPGACTRL_DCCALDEC0_DF4NARROW << 22)

#define	RAC_IFPGACTRL_DCCALDEC0_DF4WIDE ( _RAC_IFPGACTRL_DCCALDEC0_DF4WIDE << 22)

#define	RAC_IFPGACTRL_DCCALDEC0_DF8NARROW ( _RAC_IFPGACTRL_DCCALDEC0_DF8NARROW << 22)

#define	RAC_IFPGACTRL_DCCALDEC0_DF8WIDE ( _RAC_IFPGACTRL_DCCALDEC0_DF8WIDE << 22)

#define	RAC_IFPGACTRL_DCCALON (0x1UL << 19)

#define	RAC_IFPGACTRL_DCCALON_DEFAULT ( _RAC_IFPGACTRL_DCCALON_DEFAULT << 19)

#define	RAC_IFPGACTRL_DCCALON_DISABLE ( _RAC_IFPGACTRL_DCCALON_DISABLE << 19)

#define	RAC_IFPGACTRL_DCCALON_ENABLE ( _RAC_IFPGACTRL_DCCALON_ENABLE << 19)

#define	RAC_IFPGACTRL_DCESTIEN (0x1UL << 21)

#define	RAC_IFPGACTRL_DCESTIEN_DEFAULT ( _RAC_IFPGACTRL_DCESTIEN_DEFAULT << 21)

#define	RAC_IFPGACTRL_DCESTIEN_DISABLE ( _RAC_IFPGACTRL_DCESTIEN_DISABLE << 21)

#define	RAC_IFPGACTRL_DCESTIEN_ENABLE ( _RAC_IFPGACTRL_DCESTIEN_ENABLE << 21)

#define	RAC_IFPGACTRL_DCRSTEN (0x1UL << 20)

#define	RAC_IFPGACTRL_DCRSTEN_DEFAULT ( _RAC_IFPGACTRL_DCRSTEN_DEFAULT << 20)

#define	RAC_IFPGACTRL_DCRSTEN_DISABLE ( _RAC_IFPGACTRL_DCRSTEN_DISABLE << 20)

#define	RAC_IFPGACTRL_DCRSTEN_ENABLE ( _RAC_IFPGACTRL_DCRSTEN_ENABLE << 20)

#define	RAC_IPVERSION_IPVERSION_DEFAULT ( _RAC_IPVERSION_IPVERSION_DEFAULT << 0)

#define	RAC_LNAMIXCAL_LNAMIXCALEN (0x1UL << 0)

#define	RAC_LNAMIXCAL_LNAMIXCALEN_cal_disable ( _RAC_LNAMIXCAL_LNAMIXCALEN_cal_disable << 0)

#define	RAC_LNAMIXCAL_LNAMIXCALEN_cal_enable ( _RAC_LNAMIXCAL_LNAMIXCALEN_cal_enable << 0)

#define	RAC_LNAMIXCAL_LNAMIXCALEN_DEFAULT ( _RAC_LNAMIXCAL_LNAMIXCALEN_DEFAULT << 0)

#define	RAC_LNAMIXCAL_LNAMIXCALVMODE (0x1UL << 1)

#define	RAC_LNAMIXCAL_LNAMIXCALVMODE_current_mode ( _RAC_LNAMIXCAL_LNAMIXCALVMODE_current_mode << 1)

#define	RAC_LNAMIXCAL_LNAMIXCALVMODE_DEFAULT ( _RAC_LNAMIXCAL_LNAMIXCALVMODE_DEFAULT << 1)

#define	RAC_LNAMIXCAL_LNAMIXCALVMODE_voltage_mode ( _RAC_LNAMIXCAL_LNAMIXCALVMODE_voltage_mode << 1)

#define	RAC_LNAMIXCAL_LNAMIXENIRCAL1 (0x1UL << 2)

#define	RAC_LNAMIXCAL_LNAMIXENIRCAL1_DEFAULT ( _RAC_LNAMIXCAL_LNAMIXENIRCAL1_DEFAULT << 2)

#define	RAC_LNAMIXCAL_LNAMIXENIRCAL1_disable ( _RAC_LNAMIXCAL_LNAMIXENIRCAL1_disable << 2)

#define	RAC_LNAMIXCAL_LNAMIXENIRCAL1_enable ( _RAC_LNAMIXCAL_LNAMIXENIRCAL1_enable << 2)

#define	RAC_LNAMIXCAL_LNAMIXENIRCAL2 (0x1UL << 3)

#define	RAC_LNAMIXCAL_LNAMIXENIRCAL2_DEFAULT ( _RAC_LNAMIXCAL_LNAMIXENIRCAL2_DEFAULT << 3)

#define	RAC_LNAMIXCAL_LNAMIXENIRCAL2_disable ( _RAC_LNAMIXCAL_LNAMIXENIRCAL2_disable << 3)

#define	RAC_LNAMIXCAL_LNAMIXENIRCAL2_enable ( _RAC_LNAMIXCAL_LNAMIXENIRCAL2_enable << 3)

#define	RAC_LNAMIXCAL_LNAMIXIRCAL1AMP_DEFAULT ( _RAC_LNAMIXCAL_LNAMIXIRCAL1AMP_DEFAULT << 4)

#define	RAC_LNAMIXCAL_LNAMIXIRCAL2AMP_DEFAULT ( _RAC_LNAMIXCAL_LNAMIXIRCAL2AMP_DEFAULT << 7)

#define	RAC_LNAMIXEN_LNAMIXENLDO (0x1UL << 0)

#define	RAC_LNAMIXEN_LNAMIXENLDO_DEFAULT ( _RAC_LNAMIXEN_LNAMIXENLDO_DEFAULT << 0)

#define	RAC_LNAMIXEN_LNAMIXENLDO_disable ( _RAC_LNAMIXEN_LNAMIXENLDO_disable << 0)

#define	RAC_LNAMIXEN_LNAMIXENLDO_enable ( _RAC_LNAMIXEN_LNAMIXENLDO_enable << 0)

#define	RAC_LNAMIXTRIM0_LNAMIXCURCTRL_DEFAULT ( _RAC_LNAMIXTRIM0_LNAMIXCURCTRL_DEFAULT << 0)

#define	RAC_LNAMIXTRIM0_LNAMIXHIGHCUR_current_470uA ( _RAC_LNAMIXTRIM0_LNAMIXHIGHCUR_current_470uA << 6)

#define	RAC_LNAMIXTRIM0_LNAMIXHIGHCUR_current_530uA ( _RAC_LNAMIXTRIM0_LNAMIXHIGHCUR_current_530uA << 6)

#define	RAC_LNAMIXTRIM0_LNAMIXHIGHCUR_current_590uA ( _RAC_LNAMIXTRIM0_LNAMIXHIGHCUR_current_590uA << 6)

#define	RAC_LNAMIXTRIM0_LNAMIXHIGHCUR_DEFAULT ( _RAC_LNAMIXTRIM0_LNAMIXHIGHCUR_DEFAULT << 6)

#define	RAC_LNAMIXTRIM0_LNAMIXHIGHCUR_unused ( _RAC_LNAMIXTRIM0_LNAMIXHIGHCUR_unused << 6)

#define	RAC_LNAMIXTRIM0_LNAMIXLOWCUR_current_60percent ( _RAC_LNAMIXTRIM0_LNAMIXLOWCUR_current_60percent << 8)

#define	RAC_LNAMIXTRIM0_LNAMIXLOWCUR_current_80percent ( _RAC_LNAMIXTRIM0_LNAMIXLOWCUR_current_80percent << 8)

#define	RAC_LNAMIXTRIM0_LNAMIXLOWCUR_current_nom ( _RAC_LNAMIXTRIM0_LNAMIXLOWCUR_current_nom << 8)

#define	RAC_LNAMIXTRIM0_LNAMIXLOWCUR_DEFAULT ( _RAC_LNAMIXTRIM0_LNAMIXLOWCUR_DEFAULT << 8)

#define	RAC_LNAMIXTRIM0_LNAMIXLOWCUR_unused ( _RAC_LNAMIXTRIM0_LNAMIXLOWCUR_unused << 8)

#define	RAC_LNAMIXTRIM0_LNAMIXRFPKDBWSEL_DEFAULT ( _RAC_LNAMIXTRIM0_LNAMIXRFPKDBWSEL_DEFAULT << 10)

#define	RAC_LNAMIXTRIM0_LNAMIXRFPKDCALCM_DEFAULT ( _RAC_LNAMIXTRIM0_LNAMIXRFPKDCALCM_DEFAULT << 12)

#define	RAC_LNAMIXTRIM0_LNAMIXRFPKDCALDM_DEFAULT ( _RAC_LNAMIXTRIM0_LNAMIXRFPKDCALDM_DEFAULT << 18)

#define	RAC_LNAMIXTRIM0_LNAMIXTRIMVREG_DEFAULT ( _RAC_LNAMIXTRIM0_LNAMIXTRIMVREG_DEFAULT << 23)

#define	RAC_LNAMIXTRIM1_LNAMIXIBIAS1ADJ_DEFAULT ( _RAC_LNAMIXTRIM1_LNAMIXIBIAS1ADJ_DEFAULT << 0)

#define	RAC_LNAMIXTRIM1_LNAMIXLNA1CAPSEL_DEFAULT ( _RAC_LNAMIXTRIM1_LNAMIXLNA1CAPSEL_DEFAULT << 4)

#define	RAC_LNAMIXTRIM1_LNAMIXMXRBIAS1_bias_1V ( _RAC_LNAMIXTRIM1_LNAMIXMXRBIAS1_bias_1V << 7)

#define	RAC_LNAMIXTRIM1_LNAMIXMXRBIAS1_bias_800m ( _RAC_LNAMIXTRIM1_LNAMIXMXRBIAS1_bias_800m << 7)

#define	RAC_LNAMIXTRIM1_LNAMIXMXRBIAS1_bias_900m ( _RAC_LNAMIXTRIM1_LNAMIXMXRBIAS1_bias_900m << 7)

#define	RAC_LNAMIXTRIM1_LNAMIXMXRBIAS1_DEFAULT ( _RAC_LNAMIXTRIM1_LNAMIXMXRBIAS1_DEFAULT << 7)

#define	RAC_LNAMIXTRIM1_LNAMIXMXRBIAS1_unused ( _RAC_LNAMIXTRIM1_LNAMIXMXRBIAS1_unused << 7)

#define	RAC_LNAMIXTRIM1_LNAMIXNCAS1ADJ_DEFAULT ( _RAC_LNAMIXTRIM1_LNAMIXNCAS1ADJ_DEFAULT << 9)

#define	RAC_LNAMIXTRIM1_LNAMIXNCAS1ADJ_ncas_1V ( _RAC_LNAMIXTRIM1_LNAMIXNCAS1ADJ_ncas_1V << 9)

#define	RAC_LNAMIXTRIM1_LNAMIXNCAS1ADJ_ncas_900m ( _RAC_LNAMIXTRIM1_LNAMIXNCAS1ADJ_ncas_900m << 9)

#define	RAC_LNAMIXTRIM1_LNAMIXNCAS1ADJ_ncas_950m ( _RAC_LNAMIXTRIM1_LNAMIXNCAS1ADJ_ncas_950m << 9)

#define	RAC_LNAMIXTRIM1_LNAMIXNCAS1ADJ_unused ( _RAC_LNAMIXTRIM1_LNAMIXNCAS1ADJ_unused << 9)

#define	RAC_LNAMIXTRIM1_LNAMIXPCAS1ADJ_DEFAULT ( _RAC_LNAMIXTRIM1_LNAMIXPCAS1ADJ_DEFAULT << 11)

#define	RAC_LNAMIXTRIM1_LNAMIXPCAS1ADJ_pcas_250m ( _RAC_LNAMIXTRIM1_LNAMIXPCAS1ADJ_pcas_250m << 11)

#define	RAC_LNAMIXTRIM1_LNAMIXPCAS1ADJ_pcas_300m ( _RAC_LNAMIXTRIM1_LNAMIXPCAS1ADJ_pcas_300m << 11)

#define	RAC_LNAMIXTRIM1_LNAMIXPCAS1ADJ_pcas_350m ( _RAC_LNAMIXTRIM1_LNAMIXPCAS1ADJ_pcas_350m << 11)

#define	RAC_LNAMIXTRIM1_LNAMIXPCAS1ADJ_unused ( _RAC_LNAMIXTRIM1_LNAMIXPCAS1ADJ_unused << 11)

#define	RAC_LNAMIXTRIM1_LNAMIXVOUT1ADJ_DEFAULT ( _RAC_LNAMIXTRIM1_LNAMIXVOUT1ADJ_DEFAULT << 13)

#define	RAC_LNAMIXTRIM2_LNAMIXIBIAS2ADJ_DEFAULT ( _RAC_LNAMIXTRIM2_LNAMIXIBIAS2ADJ_DEFAULT << 0)

#define	RAC_LNAMIXTRIM2_LNAMIXLNA2CAPSEL_DEFAULT ( _RAC_LNAMIXTRIM2_LNAMIXLNA2CAPSEL_DEFAULT << 4)

#define	RAC_LNAMIXTRIM2_LNAMIXMXRBIAS2_bias_1V ( _RAC_LNAMIXTRIM2_LNAMIXMXRBIAS2_bias_1V << 7)

#define	RAC_LNAMIXTRIM2_LNAMIXMXRBIAS2_bias_800m ( _RAC_LNAMIXTRIM2_LNAMIXMXRBIAS2_bias_800m << 7)

#define	RAC_LNAMIXTRIM2_LNAMIXMXRBIAS2_bias_900m ( _RAC_LNAMIXTRIM2_LNAMIXMXRBIAS2_bias_900m << 7)

#define	RAC_LNAMIXTRIM2_LNAMIXMXRBIAS2_DEFAULT ( _RAC_LNAMIXTRIM2_LNAMIXMXRBIAS2_DEFAULT << 7)

#define	RAC_LNAMIXTRIM2_LNAMIXMXRBIAS2_unused ( _RAC_LNAMIXTRIM2_LNAMIXMXRBIAS2_unused << 7)

#define	RAC_LNAMIXTRIM2_LNAMIXNCAS2ADJ_DEFAULT ( _RAC_LNAMIXTRIM2_LNAMIXNCAS2ADJ_DEFAULT << 9)

#define	RAC_LNAMIXTRIM2_LNAMIXNCAS2ADJ_ncas_1V ( _RAC_LNAMIXTRIM2_LNAMIXNCAS2ADJ_ncas_1V << 9)

#define	RAC_LNAMIXTRIM2_LNAMIXNCAS2ADJ_ncas_900m ( _RAC_LNAMIXTRIM2_LNAMIXNCAS2ADJ_ncas_900m << 9)

#define	RAC_LNAMIXTRIM2_LNAMIXNCAS2ADJ_ncas_950m ( _RAC_LNAMIXTRIM2_LNAMIXNCAS2ADJ_ncas_950m << 9)

#define	RAC_LNAMIXTRIM2_LNAMIXNCAS2ADJ_unused ( _RAC_LNAMIXTRIM2_LNAMIXNCAS2ADJ_unused << 9)

#define	RAC_LNAMIXTRIM2_LNAMIXPCAS2ADJ_DEFAULT ( _RAC_LNAMIXTRIM2_LNAMIXPCAS2ADJ_DEFAULT << 11)

#define	RAC_LNAMIXTRIM2_LNAMIXPCAS2ADJ_pcas_250m ( _RAC_LNAMIXTRIM2_LNAMIXPCAS2ADJ_pcas_250m << 11)

#define	RAC_LNAMIXTRIM2_LNAMIXPCAS2ADJ_pcas_300m ( _RAC_LNAMIXTRIM2_LNAMIXPCAS2ADJ_pcas_300m << 11)

#define	RAC_LNAMIXTRIM2_LNAMIXPCAS2ADJ_pcas_350m ( _RAC_LNAMIXTRIM2_LNAMIXPCAS2ADJ_pcas_350m << 11)

#define	RAC_LNAMIXTRIM2_LNAMIXPCAS2ADJ_unused ( _RAC_LNAMIXTRIM2_LNAMIXPCAS2ADJ_unused << 11)

#define	RAC_LNAMIXTRIM2_LNAMIXVOUT2ADJ_DEFAULT ( _RAC_LNAMIXTRIM2_LNAMIXVOUT2ADJ_DEFAULT << 13)

#define	RAC_PACTRL_PAEN10DBMVMID (0x1UL << 0)

#define	RAC_PACTRL_PAEN10DBMVMID_DEFAULT ( _RAC_PACTRL_PAEN10DBMVMID_DEFAULT << 0)

#define	RAC_PACTRL_PAEN10DBMVMID_disable ( _RAC_PACTRL_PAEN10DBMVMID_disable << 0)

#define	RAC_PACTRL_PAEN10DBMVMID_enable ( _RAC_PACTRL_PAEN10DBMVMID_enable << 0)

#define	RAC_PACTRL_PAEN20DBMVMID (0x1UL << 1)

#define	RAC_PACTRL_PAEN20DBMVMID_DEFAULT ( _RAC_PACTRL_PAEN20DBMVMID_DEFAULT << 1)

#define	RAC_PACTRL_PAEN20DBMVMID_disable ( _RAC_PACTRL_PAEN20DBMVMID_disable << 1)

#define	RAC_PACTRL_PAEN20DBMVMID_enable ( _RAC_PACTRL_PAEN20DBMVMID_enable << 1)

#define	RAC_PACTRL_PAENCAPATT (0x1UL << 2)

#define	RAC_PACTRL_PAENCAPATT_DEFAULT ( _RAC_PACTRL_PAENCAPATT_DEFAULT << 2)

#define	RAC_PACTRL_PAENCAPATT_disable ( _RAC_PACTRL_PAENCAPATT_disable << 2)

#define	RAC_PACTRL_PAENCAPATT_enable ( _RAC_PACTRL_PAENCAPATT_enable << 2)

#define	RAC_PACTRL_PAENLATCHBYPASS (0x1UL << 3)

#define	RAC_PACTRL_PAENLATCHBYPASS_DEFAULT ( _RAC_PACTRL_PAENLATCHBYPASS_DEFAULT << 3)

#define	RAC_PACTRL_PAENLATCHBYPASS_disable ( _RAC_PACTRL_PAENLATCHBYPASS_disable << 3)

#define	RAC_PACTRL_PAENLATCHBYPASS_enable ( _RAC_PACTRL_PAENLATCHBYPASS_enable << 3)

#define	RAC_PACTRL_PAENPOWERRAMPINGCLK (0x1UL << 4)

#define	RAC_PACTRL_PAENPOWERRAMPINGCLK_DEFAULT ( _RAC_PACTRL_PAENPOWERRAMPINGCLK_DEFAULT << 4)

#define	RAC_PACTRL_PAENPOWERRAMPINGCLK_en_clk ( _RAC_PACTRL_PAENPOWERRAMPINGCLK_en_clk << 4)

#define	RAC_PACTRL_PAENPOWERRAMPINGCLK_silence_clk ( _RAC_PACTRL_PAENPOWERRAMPINGCLK_silence_clk << 4)

#define	RAC_PACTRL_PAPOWER_DEFAULT ( _RAC_PACTRL_PAPOWER_DEFAULT << 16)

#define	RAC_PACTRL_PAPOWER_t0stripeon ( _RAC_PACTRL_PAPOWER_t0stripeon << 16)

#define	RAC_PACTRL_PAPOWER_t10stripeon ( _RAC_PACTRL_PAPOWER_t10stripeon << 16)

#define	RAC_PACTRL_PAPOWER_t11stripeon ( _RAC_PACTRL_PAPOWER_t11stripeon << 16)

#define	RAC_PACTRL_PAPOWER_t12stripeon ( _RAC_PACTRL_PAPOWER_t12stripeon << 16)

#define	RAC_PACTRL_PAPOWER_t13stripeon ( _RAC_PACTRL_PAPOWER_t13stripeon << 16)

#define	RAC_PACTRL_PAPOWER_t14stripeon ( _RAC_PACTRL_PAPOWER_t14stripeon << 16)

#define	RAC_PACTRL_PAPOWER_t15stripeon ( _RAC_PACTRL_PAPOWER_t15stripeon << 16)

#define	RAC_PACTRL_PAPOWER_t1stripeon ( _RAC_PACTRL_PAPOWER_t1stripeon << 16)

#define	RAC_PACTRL_PAPOWER_t2stripeon ( _RAC_PACTRL_PAPOWER_t2stripeon << 16)

#define	RAC_PACTRL_PAPOWER_t3stripeon ( _RAC_PACTRL_PAPOWER_t3stripeon << 16)

#define	RAC_PACTRL_PAPOWER_t4stripeon ( _RAC_PACTRL_PAPOWER_t4stripeon << 16)

#define	RAC_PACTRL_PAPOWER_t5stripeon ( _RAC_PACTRL_PAPOWER_t5stripeon << 16)

#define	RAC_PACTRL_PAPOWER_t6stripeon ( _RAC_PACTRL_PAPOWER_t6stripeon << 16)

#define	RAC_PACTRL_PAPOWER_t7stripeon ( _RAC_PACTRL_PAPOWER_t7stripeon << 16)

#define	RAC_PACTRL_PAPOWER_t8stripeon ( _RAC_PACTRL_PAPOWER_t8stripeon << 16)

#define	RAC_PACTRL_PAPOWER_t9stripeon ( _RAC_PACTRL_PAPOWER_t9stripeon << 16)

#define	RAC_PACTRL_PAPULLDOWNVDDPA (0x1UL << 5)

#define	RAC_PACTRL_PAPULLDOWNVDDPA_DEFAULT ( _RAC_PACTRL_PAPULLDOWNVDDPA_DEFAULT << 5)

#define	RAC_PACTRL_PAPULLDOWNVDDPA_not_pull_down ( _RAC_PACTRL_PAPULLDOWNVDDPA_not_pull_down << 5)

#define	RAC_PACTRL_PAPULLDOWNVDDPA_pull_down_vddpa ( _RAC_PACTRL_PAPULLDOWNVDDPA_pull_down_vddpa << 5)

#define	RAC_PACTRL_PAREGBYPASSPDRVLDO (0x1UL << 6)

#define	RAC_PACTRL_PAREGBYPASSPDRVLDO_bypass ( _RAC_PACTRL_PAREGBYPASSPDRVLDO_bypass << 6)

#define	RAC_PACTRL_PAREGBYPASSPDRVLDO_DEFAULT ( _RAC_PACTRL_PAREGBYPASSPDRVLDO_DEFAULT << 6)

#define	RAC_PACTRL_PAREGBYPASSPDRVLDO_not_bypass ( _RAC_PACTRL_PAREGBYPASSPDRVLDO_not_bypass << 6)

#define	RAC_PACTRL_PAREGBYPASSPREREG (0x1UL << 7)

#define	RAC_PACTRL_PAREGBYPASSPREREG_bypass ( _RAC_PACTRL_PAREGBYPASSPREREG_bypass << 7)

#define	RAC_PACTRL_PAREGBYPASSPREREG_DEFAULT ( _RAC_PACTRL_PAREGBYPASSPREREG_DEFAULT << 7)

#define	RAC_PACTRL_PAREGBYPASSPREREG_not_bypass ( _RAC_PACTRL_PAREGBYPASSPREREG_not_bypass << 7)

#define	RAC_PACTRL_PASELLDOVDDPA (0x1UL << 8)

#define	RAC_PACTRL_PASELLDOVDDPA_DEFAULT ( _RAC_PACTRL_PASELLDOVDDPA_DEFAULT << 8)

#define	RAC_PACTRL_PASELLDOVDDPA_not_selected ( _RAC_PACTRL_PASELLDOVDDPA_not_selected << 8)

#define	RAC_PACTRL_PASELLDOVDDPA_selected ( _RAC_PACTRL_PASELLDOVDDPA_selected << 8)

#define	RAC_PACTRL_PASELLDOVDDRF (0x1UL << 9)

#define	RAC_PACTRL_PASELLDOVDDRF_DEFAULT ( _RAC_PACTRL_PASELLDOVDDRF_DEFAULT << 9)

#define	RAC_PACTRL_PASELLDOVDDRF_not_selected ( _RAC_PACTRL_PASELLDOVDDRF_not_selected << 9)

#define	RAC_PACTRL_PASELLDOVDDRF_selected ( _RAC_PACTRL_PASELLDOVDDRF_selected << 9)

#define	RAC_PACTRL_PASELSLICE_DEFAULT ( _RAC_PACTRL_PASELSLICE_DEFAULT << 20)

#define	RAC_PACTRL_PASLICERST (0x1UL << 10)

#define	RAC_PACTRL_PASLICERST_DEFAULT ( _RAC_PACTRL_PASLICERST_DEFAULT << 10)

#define	RAC_PACTRL_PASLICERST_disable ( _RAC_PACTRL_PASLICERST_disable << 10)

#define	RAC_PACTRL_PASLICERST_enable ( _RAC_PACTRL_PASLICERST_enable << 10)

#define	RAC_PAENCTRL_PARAMP (0x1UL << 8)

#define	RAC_PAENCTRL_PARAMP_DEFAULT ( _RAC_PAENCTRL_PARAMP_DEFAULT << 8)

#define	RAC_PATRIM0_PATRIMDRVREGIBCORE0DBM_DEFAULT ( _RAC_PATRIM0_PATRIMDRVREGIBCORE0DBM_DEFAULT << 0)

#define	RAC_PATRIM0_PATRIMDRVREGIBCORE0DBM_i_4u ( _RAC_PATRIM0_PATRIMDRVREGIBCORE0DBM_i_4u << 0)

#define	RAC_PATRIM0_PATRIMDRVREGIBCORE0DBM_i_5u ( _RAC_PATRIM0_PATRIMDRVREGIBCORE0DBM_i_5u << 0)

#define	RAC_PATRIM0_PATRIMDRVREGIBCORE0DBM_i_6u ( _RAC_PATRIM0_PATRIMDRVREGIBCORE0DBM_i_6u << 0)

#define	RAC_PATRIM0_PATRIMDRVREGIBCORE0DBM_i_7u ( _RAC_PATRIM0_PATRIMDRVREGIBCORE0DBM_i_7u << 0)

#define	RAC_PATRIM0_PATRIMDRVREGIBNDIO0DBM_DEFAULT ( _RAC_PATRIM0_PATRIMDRVREGIBNDIO0DBM_DEFAULT << 2)

#define	RAC_PATRIM0_PATRIMDRVREGIBNDIO0DBM_NA_10 ( _RAC_PATRIM0_PATRIMDRVREGIBNDIO0DBM_NA_10 << 2)

#define	RAC_PATRIM0_PATRIMDRVREGIBNDIO0DBM_NA_11 ( _RAC_PATRIM0_PATRIMDRVREGIBNDIO0DBM_NA_11 << 2)

#define	RAC_PATRIM0_PATRIMDRVREGIBNDIO0DBM_NA_12 ( _RAC_PATRIM0_PATRIMDRVREGIBNDIO0DBM_NA_12 << 2)

#define	RAC_PATRIM0_PATRIMDRVREGIBNDIO0DBM_NA_13 ( _RAC_PATRIM0_PATRIMDRVREGIBNDIO0DBM_NA_13 << 2)

#define	RAC_PATRIM0_PATRIMDRVREGIBNDIO0DBM_NA_14 ( _RAC_PATRIM0_PATRIMDRVREGIBNDIO0DBM_NA_14 << 2)

#define	RAC_PATRIM0_PATRIMDRVREGIBNDIO0DBM_NA_15 ( _RAC_PATRIM0_PATRIMDRVREGIBNDIO0DBM_NA_15 << 2)

#define	RAC_PATRIM0_PATRIMDRVREGIBNDIO0DBM_vreg_1p09 ( _RAC_PATRIM0_PATRIMDRVREGIBNDIO0DBM_vreg_1p09 << 2)

#define	RAC_PATRIM0_PATRIMDRVREGIBNDIO0DBM_vreg_1p13 ( _RAC_PATRIM0_PATRIMDRVREGIBNDIO0DBM_vreg_1p13 << 2)

#define	RAC_PATRIM0_PATRIMDRVREGIBNDIO0DBM_vreg_1p16 ( _RAC_PATRIM0_PATRIMDRVREGIBNDIO0DBM_vreg_1p16 << 2)

#define	RAC_PATRIM0_PATRIMDRVREGIBNDIO0DBM_vreg_1p20 ( _RAC_PATRIM0_PATRIMDRVREGIBNDIO0DBM_vreg_1p20 << 2)

#define	RAC_PATRIM0_PATRIMDRVREGIBNDIO0DBM_vreg_1p23 ( _RAC_PATRIM0_PATRIMDRVREGIBNDIO0DBM_vreg_1p23 << 2)

#define	RAC_PATRIM0_PATRIMDRVREGIBNDIO0DBM_vreg_1p25 ( _RAC_PATRIM0_PATRIMDRVREGIBNDIO0DBM_vreg_1p25 << 2)

#define	RAC_PATRIM0_PATRIMDRVREGIBNDIO0DBM_vreg_1p28 ( _RAC_PATRIM0_PATRIMDRVREGIBNDIO0DBM_vreg_1p28 << 2)

#define	RAC_PATRIM0_PATRIMDRVREGIBNDIO0DBM_vreg_1p31 ( _RAC_PATRIM0_PATRIMDRVREGIBNDIO0DBM_vreg_1p31 << 2)

#define	RAC_PATRIM0_PATRIMDRVREGIBNDIO0DBM_vreg_1p33 ( _RAC_PATRIM0_PATRIMDRVREGIBNDIO0DBM_vreg_1p33 << 2)

#define	RAC_PATRIM0_PATRIMDRVREGIBNDIO0DBM_vreg_1p36 ( _RAC_PATRIM0_PATRIMDRVREGIBNDIO0DBM_vreg_1p36 << 2)

#define	RAC_PATRIM0_PATRIMDRVREGPSR0DBM (0x1UL << 6)

#define	RAC_PATRIM0_PATRIMDRVREGPSR0DBM_DEFAULT ( _RAC_PATRIM0_PATRIMDRVREGPSR0DBM_DEFAULT << 6)

#define	RAC_PATRIM0_PATRIMDRVREGPSR0DBM_disable ( _RAC_PATRIM0_PATRIMDRVREGPSR0DBM_disable << 6)

#define	RAC_PATRIM0_PATRIMDRVREGPSR0DBM_enable ( _RAC_PATRIM0_PATRIMDRVREGPSR0DBM_enable << 6)

#define	RAC_PATRIM0_PATRIMDRVSLICE0DBM_DEFAULT ( _RAC_PATRIM0_PATRIMDRVSLICE0DBM_DEFAULT << 7)

#define	RAC_PATRIM0_PATRIMDRVSLICE0DBM_on_0_slice ( _RAC_PATRIM0_PATRIMDRVSLICE0DBM_on_0_slice << 7)

#define	RAC_PATRIM0_PATRIMDRVSLICE0DBM_on_1_slice ( _RAC_PATRIM0_PATRIMDRVSLICE0DBM_on_1_slice << 7)

#define	RAC_PATRIM0_PATRIMDRVSLICE0DBM_on_2_slice ( _RAC_PATRIM0_PATRIMDRVSLICE0DBM_on_2_slice << 7)

#define	RAC_PATRIM0_PATRIMDRVSLICE0DBM_on_3_slice ( _RAC_PATRIM0_PATRIMDRVSLICE0DBM_on_3_slice << 7)

#define	RAC_PATRIM0_PATRIMFB0DBM_DEFAULT ( _RAC_PATRIM0_PATRIMFB0DBM_DEFAULT << 9)

#define	RAC_PATRIM0_PATRIMFB0DBM_vo_vi_0p475 ( _RAC_PATRIM0_PATRIMFB0DBM_vo_vi_0p475 << 9)

#define	RAC_PATRIM0_PATRIMFB0DBM_vo_vi_0p500 ( _RAC_PATRIM0_PATRIMFB0DBM_vo_vi_0p500 << 9)

#define	RAC_PATRIM0_PATRIMFB0DBM_vo_vi_0p525 ( _RAC_PATRIM0_PATRIMFB0DBM_vo_vi_0p525 << 9)

#define	RAC_PATRIM0_PATRIMFB0DBM_vo_vi_0p550 ( _RAC_PATRIM0_PATRIMFB0DBM_vo_vi_0p550 << 9)

#define	RAC_PATRIM0_PATRIMFB0DBM_vo_vi_0p575 ( _RAC_PATRIM0_PATRIMFB0DBM_vo_vi_0p575 << 9)

#define	RAC_PATRIM0_PATRIMFB0DBM_vo_vi_0p600 ( _RAC_PATRIM0_PATRIMFB0DBM_vo_vi_0p600 << 9)

#define	RAC_PATRIM0_PATRIMFB0DBM_vo_vi_0p625 ( _RAC_PATRIM0_PATRIMFB0DBM_vo_vi_0p625 << 9)

#define	RAC_PATRIM0_PATRIMFB0DBM_vo_vi_0p650 ( _RAC_PATRIM0_PATRIMFB0DBM_vo_vi_0p650 << 9)

#define	RAC_PATRIM0_PATRIMFB0DBM_vo_vi_0p675 ( _RAC_PATRIM0_PATRIMFB0DBM_vo_vi_0p675 << 9)

#define	RAC_PATRIM0_PATRIMFB0DBM_vo_vi_0p700 ( _RAC_PATRIM0_PATRIMFB0DBM_vo_vi_0p700 << 9)

#define	RAC_PATRIM0_PATRIMFB0DBM_vo_vi_0p725 ( _RAC_PATRIM0_PATRIMFB0DBM_vo_vi_0p725 << 9)

#define	RAC_PATRIM0_PATRIMFB0DBM_vo_vi_0p750 ( _RAC_PATRIM0_PATRIMFB0DBM_vo_vi_0p750 << 9)

#define	RAC_PATRIM0_PATRIMFB0DBM_vo_vi_0p775 ( _RAC_PATRIM0_PATRIMFB0DBM_vo_vi_0p775 << 9)

#define	RAC_PATRIM0_PATRIMFB0DBM_vo_vi_0p80 ( _RAC_PATRIM0_PATRIMFB0DBM_vo_vi_0p80 << 9)

#define	RAC_PATRIM0_PATRIMFB0DBM_vo_vi_0p825 ( _RAC_PATRIM0_PATRIMFB0DBM_vo_vi_0p825 << 9)

#define	RAC_PATRIM0_PATRIMFB0DBM_vo_vi_0p85 ( _RAC_PATRIM0_PATRIMFB0DBM_vo_vi_0p85 << 9)

#define	RAC_PATRIM0_PATRIMPABIASN0DBM_DEFAULT ( _RAC_PATRIM0_PATRIMPABIASN0DBM_DEFAULT << 13)

#define	RAC_PATRIM0_PATRIMPABIASN0DBM_v_450m ( _RAC_PATRIM0_PATRIMPABIASN0DBM_v_450m << 13)

#define	RAC_PATRIM0_PATRIMPABIASN0DBM_v_462p5m ( _RAC_PATRIM0_PATRIMPABIASN0DBM_v_462p5m << 13)

#define	RAC_PATRIM0_PATRIMPABIASN0DBM_v_475m ( _RAC_PATRIM0_PATRIMPABIASN0DBM_v_475m << 13)

#define	RAC_PATRIM0_PATRIMPABIASN0DBM_v_487p5m ( _RAC_PATRIM0_PATRIMPABIASN0DBM_v_487p5m << 13)

#define	RAC_PATRIM0_PATRIMPABIASN0DBM_v_500m ( _RAC_PATRIM0_PATRIMPABIASN0DBM_v_500m << 13)

#define	RAC_PATRIM0_PATRIMPABIASN0DBM_v_512p5m ( _RAC_PATRIM0_PATRIMPABIASN0DBM_v_512p5m << 13)

#define	RAC_PATRIM0_PATRIMPABIASN0DBM_v_525m ( _RAC_PATRIM0_PATRIMPABIASN0DBM_v_525m << 13)

#define	RAC_PATRIM0_PATRIMPABIASN0DBM_v_537p5m ( _RAC_PATRIM0_PATRIMPABIASN0DBM_v_537p5m << 13)

#define	RAC_PATRIM0_PATRIMPABIASN0DBM_v_550m ( _RAC_PATRIM0_PATRIMPABIASN0DBM_v_550m << 13)

#define	RAC_PATRIM0_PATRIMPABIASN0DBM_v_562p5m ( _RAC_PATRIM0_PATRIMPABIASN0DBM_v_562p5m << 13)

#define	RAC_PATRIM0_PATRIMPABIASN0DBM_v_575m ( _RAC_PATRIM0_PATRIMPABIASN0DBM_v_575m << 13)

#define	RAC_PATRIM0_PATRIMPABIASN0DBM_v_587p5m ( _RAC_PATRIM0_PATRIMPABIASN0DBM_v_587p5m << 13)

#define	RAC_PATRIM0_PATRIMPABIASN0DBM_v_600m ( _RAC_PATRIM0_PATRIMPABIASN0DBM_v_600m << 13)

#define	RAC_PATRIM0_PATRIMPABIASN0DBM_v_612p5m ( _RAC_PATRIM0_PATRIMPABIASN0DBM_v_612p5m << 13)

#define	RAC_PATRIM0_PATRIMPABIASN0DBM_v_625m ( _RAC_PATRIM0_PATRIMPABIASN0DBM_v_625m << 13)

#define	RAC_PATRIM0_PATRIMPABIASN0DBM_v_637p5m ( _RAC_PATRIM0_PATRIMPABIASN0DBM_v_637p5m << 13)

#define	RAC_PATRIM0_PATRIMPABIASP0DBM_DEFAULT ( _RAC_PATRIM0_PATRIMPABIASP0DBM_DEFAULT << 17)

#define	RAC_PATRIM0_PATRIMPABIASP0DBM_v_450m ( _RAC_PATRIM0_PATRIMPABIASP0DBM_v_450m << 17)

#define	RAC_PATRIM0_PATRIMPABIASP0DBM_v_462p5m ( _RAC_PATRIM0_PATRIMPABIASP0DBM_v_462p5m << 17)

#define	RAC_PATRIM0_PATRIMPABIASP0DBM_v_475m ( _RAC_PATRIM0_PATRIMPABIASP0DBM_v_475m << 17)

#define	RAC_PATRIM0_PATRIMPABIASP0DBM_v_487p5m ( _RAC_PATRIM0_PATRIMPABIASP0DBM_v_487p5m << 17)

#define	RAC_PATRIM0_PATRIMPABIASP0DBM_v_500m ( _RAC_PATRIM0_PATRIMPABIASP0DBM_v_500m << 17)

#define	RAC_PATRIM0_PATRIMPABIASP0DBM_v_512p5m ( _RAC_PATRIM0_PATRIMPABIASP0DBM_v_512p5m << 17)

#define	RAC_PATRIM0_PATRIMPABIASP0DBM_v_525m ( _RAC_PATRIM0_PATRIMPABIASP0DBM_v_525m << 17)

#define	RAC_PATRIM0_PATRIMPABIASP0DBM_v_537p5m ( _RAC_PATRIM0_PATRIMPABIASP0DBM_v_537p5m << 17)

#define	RAC_PATRIM0_PATRIMPABIASP0DBM_v_550m ( _RAC_PATRIM0_PATRIMPABIASP0DBM_v_550m << 17)

#define	RAC_PATRIM0_PATRIMPABIASP0DBM_v_562p5m ( _RAC_PATRIM0_PATRIMPABIASP0DBM_v_562p5m << 17)

#define	RAC_PATRIM0_PATRIMPABIASP0DBM_v_575m ( _RAC_PATRIM0_PATRIMPABIASP0DBM_v_575m << 17)

#define	RAC_PATRIM0_PATRIMPABIASP0DBM_v_587p5m ( _RAC_PATRIM0_PATRIMPABIASP0DBM_v_587p5m << 17)

#define	RAC_PATRIM0_PATRIMPABIASP0DBM_v_600m ( _RAC_PATRIM0_PATRIMPABIASP0DBM_v_600m << 17)

#define	RAC_PATRIM0_PATRIMPABIASP0DBM_v_612p5m ( _RAC_PATRIM0_PATRIMPABIASP0DBM_v_612p5m << 17)

#define	RAC_PATRIM0_PATRIMPABIASP0DBM_v_625m ( _RAC_PATRIM0_PATRIMPABIASP0DBM_v_625m << 17)

#define	RAC_PATRIM0_PATRIMPABIASP0DBM_v_637p5m ( _RAC_PATRIM0_PATRIMPABIASP0DBM_v_637p5m << 17)

#define	RAC_PATRIM0_PATRIMPASLICE0DBM_DEFAULT ( _RAC_PATRIM0_PATRIMPASLICE0DBM_DEFAULT << 21)

#define	RAC_PATRIM0_PATRIMPASLICE0DBM_on_slice_0 ( _RAC_PATRIM0_PATRIMPASLICE0DBM_on_slice_0 << 21)

#define	RAC_PATRIM0_PATRIMPASLICE0DBM_on_slice_63 ( _RAC_PATRIM0_PATRIMPASLICE0DBM_on_slice_63 << 21)

#define	RAC_PATRIM0_PATRIMVREF0DBM_DEFAULT ( _RAC_PATRIM0_PATRIMVREF0DBM_DEFAULT << 27)

#define	RAC_PATRIM0_PATRIMVREF0DBM_v_900m ( _RAC_PATRIM0_PATRIMVREF0DBM_v_900m << 27)

#define	RAC_PATRIM0_PATRIMVREF0DBM_v_912p5m ( _RAC_PATRIM0_PATRIMVREF0DBM_v_912p5m << 27)

#define	RAC_PATRIM0_PATRIMVREF0DBM_v_925m ( _RAC_PATRIM0_PATRIMVREF0DBM_v_925m << 27)

#define	RAC_PATRIM0_PATRIMVREF0DBM_v_937p5m ( _RAC_PATRIM0_PATRIMVREF0DBM_v_937p5m << 27)

#define	RAC_PATRIM0_PATRIMVREF0DBM_v_950m ( _RAC_PATRIM0_PATRIMVREF0DBM_v_950m << 27)

#define	RAC_PATRIM0_PATRIMVREF0DBM_v_962p5m ( _RAC_PATRIM0_PATRIMVREF0DBM_v_962p5m << 27)

#define	RAC_PATRIM0_PATRIMVREF0DBM_v_975m ( _RAC_PATRIM0_PATRIMVREF0DBM_v_975m << 27)

#define	RAC_PATRIM0_PATRIMVREF0DBM_v_987p5m ( _RAC_PATRIM0_PATRIMVREF0DBM_v_987p5m << 27)

#define	RAC_PATRIM1_PATRIM10DBMDUTYCYN_DEFAULT ( _RAC_PATRIM1_PATRIM10DBMDUTYCYN_DEFAULT << 0)

#define	RAC_PATRIM1_PATRIM10DBMDUTYCYN_na ( _RAC_PATRIM1_PATRIM10DBMDUTYCYN_na << 0)

#define	RAC_PATRIM1_PATRIM10DBMDUTYCYN_up_0pct ( _RAC_PATRIM1_PATRIM10DBMDUTYCYN_up_0pct << 0)

#define	RAC_PATRIM1_PATRIM10DBMDUTYCYN_up_1pct ( _RAC_PATRIM1_PATRIM10DBMDUTYCYN_up_1pct << 0)

#define	RAC_PATRIM1_PATRIM10DBMDUTYCYN_up_2pct ( _RAC_PATRIM1_PATRIM10DBMDUTYCYN_up_2pct << 0)

#define	RAC_PATRIM1_PATRIM10DBMDUTYCYN_up_3pct ( _RAC_PATRIM1_PATRIM10DBMDUTYCYN_up_3pct << 0)

#define	RAC_PATRIM1_PATRIM10DBMDUTYCYN_up_4pct ( _RAC_PATRIM1_PATRIM10DBMDUTYCYN_up_4pct << 0)

#define	RAC_PATRIM1_PATRIM10DBMDUTYCYN_up_5pct ( _RAC_PATRIM1_PATRIM10DBMDUTYCYN_up_5pct << 0)

#define	RAC_PATRIM1_PATRIM10DBMDUTYCYN_up_6pct ( _RAC_PATRIM1_PATRIM10DBMDUTYCYN_up_6pct << 0)

#define	RAC_PATRIM1_PATRIM10DBMDUTYCYP_DEFAULT ( _RAC_PATRIM1_PATRIM10DBMDUTYCYP_DEFAULT << 3)

#define	RAC_PATRIM1_PATRIM10DBMDUTYCYP_dn_0pct ( _RAC_PATRIM1_PATRIM10DBMDUTYCYP_dn_0pct << 3)

#define	RAC_PATRIM1_PATRIM10DBMDUTYCYP_dn_1pct ( _RAC_PATRIM1_PATRIM10DBMDUTYCYP_dn_1pct << 3)

#define	RAC_PATRIM1_PATRIM10DBMDUTYCYP_dn_2pct ( _RAC_PATRIM1_PATRIM10DBMDUTYCYP_dn_2pct << 3)

#define	RAC_PATRIM1_PATRIM10DBMDUTYCYP_dn_3pct ( _RAC_PATRIM1_PATRIM10DBMDUTYCYP_dn_3pct << 3)

#define	RAC_PATRIM1_PATRIM10DBMDUTYCYP_dn_4pct ( _RAC_PATRIM1_PATRIM10DBMDUTYCYP_dn_4pct << 3)

#define	RAC_PATRIM1_PATRIM10DBMDUTYCYP_dn_5pct ( _RAC_PATRIM1_PATRIM10DBMDUTYCYP_dn_5pct << 3)

#define	RAC_PATRIM1_PATRIM10DBMDUTYCYP_dn_6pct ( _RAC_PATRIM1_PATRIM10DBMDUTYCYP_dn_6pct << 3)

#define	RAC_PATRIM1_PATRIM10DBMDUTYCYP_na ( _RAC_PATRIM1_PATRIM10DBMDUTYCYP_na << 3)

#define	RAC_PATRIM1_PATRIM20DBMPREDRV_DEFAULT ( _RAC_PATRIM1_PATRIM20DBMPREDRV_DEFAULT << 6)

#define	RAC_PATRIM1_PATRIM20DBMPREDRV_trise_110ps ( _RAC_PATRIM1_PATRIM20DBMPREDRV_trise_110ps << 6)

#define	RAC_PATRIM1_PATRIM20DBMPREDRV_trise_117ps ( _RAC_PATRIM1_PATRIM20DBMPREDRV_trise_117ps << 6)

#define	RAC_PATRIM1_PATRIM20DBMPREDRV_trise_127ps ( _RAC_PATRIM1_PATRIM20DBMPREDRV_trise_127ps << 6)

#define	RAC_PATRIM1_PATRIM20DBMPREDRV_trise_137ps ( _RAC_PATRIM1_PATRIM20DBMPREDRV_trise_137ps << 6)

#define	RAC_PATRIM1_PATRIM20DBMPREDRV_trise_70ps ( _RAC_PATRIM1_PATRIM20DBMPREDRV_trise_70ps << 6)

#define	RAC_PATRIM1_PATRIM20DBMPREDRV_trise_71ps ( _RAC_PATRIM1_PATRIM20DBMPREDRV_trise_71ps << 6)

#define	RAC_PATRIM1_PATRIM20DBMPREDRV_trise_73ps ( _RAC_PATRIM1_PATRIM20DBMPREDRV_trise_73ps << 6)

#define	RAC_PATRIM1_PATRIM20DBMPREDRV_trise_75ps ( _RAC_PATRIM1_PATRIM20DBMPREDRV_trise_75ps << 6)

#define	RAC_PATRIM1_PATRIMANTSWBIAS_DEFAULT ( _RAC_PATRIM1_PATRIMANTSWBIAS_DEFAULT << 9)

#define	RAC_PATRIM1_PATRIMANTSWBIAS_vb_at_vdd ( _RAC_PATRIM1_PATRIMANTSWBIAS_vb_at_vdd << 9)

#define	RAC_PATRIM1_PATRIMANTSWBIAS_vb_at_vdd_m1p2v ( _RAC_PATRIM1_PATRIMANTSWBIAS_vb_at_vdd_m1p2v << 9)

#define	RAC_PATRIM1_PATRIMANTSWBIAS_vb_at_vdd_m1p8v ( _RAC_PATRIM1_PATRIMANTSWBIAS_vb_at_vdd_m1p8v << 9)

#define	RAC_PATRIM1_PATRIMANTSWBIAS_vb_at_vdd_mp6v ( _RAC_PATRIM1_PATRIMANTSWBIAS_vb_at_vdd_mp6v << 9)

#define	RAC_PATRIM1_PATRIMBLEEDAUTOPREREG (0x1UL << 11)

#define	RAC_PATRIM1_PATRIMBLEEDAUTOPREREG_automatic ( _RAC_PATRIM1_PATRIMBLEEDAUTOPREREG_automatic << 11)

#define	RAC_PATRIM1_PATRIMBLEEDAUTOPREREG_DEFAULT ( _RAC_PATRIM1_PATRIMBLEEDAUTOPREREG_DEFAULT << 11)

#define	RAC_PATRIM1_PATRIMBLEEDAUTOPREREG_not_automatic ( _RAC_PATRIM1_PATRIMBLEEDAUTOPREREG_not_automatic << 11)

#define	RAC_PATRIM1_PATRIMCAPPAOUTM_DEFAULT ( _RAC_PATRIM1_PATRIMCAPPAOUTM_DEFAULT << 12)

#define	RAC_PATRIM1_PATRIMCAPPAOUTP_DEFAULT ( _RAC_PATRIM1_PATRIMCAPPAOUTP_DEFAULT << 16)

#define	RAC_PATRIM1_PATRIMCMGAIN_DEFAULT ( _RAC_PATRIM1_PATRIMCMGAIN_DEFAULT << 20)

#define	RAC_PATRIM1_PATRIMDLY0_DEFAULT ( _RAC_PATRIM1_PATRIMDLY0_DEFAULT << 22)

#define	RAC_PATRIM1_PATRIMDLY0_tdly_0ps ( _RAC_PATRIM1_PATRIMDLY0_tdly_0ps << 22)

#define	RAC_PATRIM1_PATRIMDLY0_tdly_64ps ( _RAC_PATRIM1_PATRIMDLY0_tdly_64ps << 22)

#define	RAC_PATRIM1_PATRIMDLY0_tdly_65ps ( _RAC_PATRIM1_PATRIMDLY0_tdly_65ps << 22)

#define	RAC_PATRIM1_PATRIMDLY0_tdly_66ps ( _RAC_PATRIM1_PATRIMDLY0_tdly_66ps << 22)

#define	RAC_PATRIM1_PATRIMDLY0_tdly_68ps ( _RAC_PATRIM1_PATRIMDLY0_tdly_68ps << 22)

#define	RAC_PATRIM1_PATRIMDLY0_tdly_70ps ( _RAC_PATRIM1_PATRIMDLY0_tdly_70ps << 22)

#define	RAC_PATRIM1_PATRIMDLY0_tdly_75ps ( _RAC_PATRIM1_PATRIMDLY0_tdly_75ps << 22)

#define	RAC_PATRIM1_PATRIMDLY0_tdly_83ps ( _RAC_PATRIM1_PATRIMDLY0_tdly_83ps << 22)

#define	RAC_PATRIM1_PATRIMDLY1_DEFAULT ( _RAC_PATRIM1_PATRIMDLY1_DEFAULT << 25)

#define	RAC_PATRIM1_PATRIMDLY1_tdly_0ps ( _RAC_PATRIM1_PATRIMDLY1_tdly_0ps << 25)

#define	RAC_PATRIM1_PATRIMDLY1_tdly_64ps ( _RAC_PATRIM1_PATRIMDLY1_tdly_64ps << 25)

#define	RAC_PATRIM1_PATRIMDLY1_tdly_65ps ( _RAC_PATRIM1_PATRIMDLY1_tdly_65ps << 25)

#define	RAC_PATRIM1_PATRIMDLY1_tdly_66ps ( _RAC_PATRIM1_PATRIMDLY1_tdly_66ps << 25)

#define	RAC_PATRIM1_PATRIMDLY1_tdly_68ps ( _RAC_PATRIM1_PATRIMDLY1_tdly_68ps << 25)

#define	RAC_PATRIM1_PATRIMDLY1_tdly_70ps ( _RAC_PATRIM1_PATRIMDLY1_tdly_70ps << 25)

#define	RAC_PATRIM1_PATRIMDLY1_tdly_75ps ( _RAC_PATRIM1_PATRIMDLY1_tdly_75ps << 25)

#define	RAC_PATRIM1_PATRIMDLY1_tdly_83ps ( _RAC_PATRIM1_PATRIMDLY1_tdly_83ps << 25)

#define	RAC_PATRIM1_PATRIMFBKATTPDRVLDO (0x1UL << 28)

#define	RAC_PATRIM1_PATRIMFBKATTPDRVLDO_DEFAULT ( _RAC_PATRIM1_PATRIMFBKATTPDRVLDO_DEFAULT << 28)

#define	RAC_PATRIM1_PATRIMFBKATTPDRVLDO_less_bw ( _RAC_PATRIM1_PATRIMFBKATTPDRVLDO_less_bw << 28)

#define	RAC_PATRIM1_PATRIMFBKATTPDRVLDO_more_bw ( _RAC_PATRIM1_PATRIMFBKATTPDRVLDO_more_bw << 28)

#define	RAC_PATRIM1_PATRIMIBIASMASTER_DEFAULT ( _RAC_PATRIM1_PATRIMIBIASMASTER_DEFAULT << 29)

#define	RAC_PATRIM1_PATRIMIBIASMASTER_Ibias_is_45u ( _RAC_PATRIM1_PATRIMIBIASMASTER_Ibias_is_45u << 29)

#define	RAC_PATRIM1_PATRIMIBIASMASTER_Ibias_is_47p5u ( _RAC_PATRIM1_PATRIMIBIASMASTER_Ibias_is_47p5u << 29)

#define	RAC_PATRIM1_PATRIMIBIASMASTER_Ibias_is_50u ( _RAC_PATRIM1_PATRIMIBIASMASTER_Ibias_is_50u << 29)

#define	RAC_PATRIM1_PATRIMIBIASMASTER_Ibias_is_52p5u ( _RAC_PATRIM1_PATRIMIBIASMASTER_Ibias_is_52p5u << 29)

#define	RAC_PATRIM2_PATRIMLDOFBHVPDRVLDO_DEFAULT ( _RAC_PATRIM2_PATRIMLDOFBHVPDRVLDO_DEFAULT << 0)

#define	RAC_PATRIM2_PATRIMLDOFBHVPDRVLDO_vreg_1p22 ( _RAC_PATRIM2_PATRIMLDOFBHVPDRVLDO_vreg_1p22 << 0)

#define	RAC_PATRIM2_PATRIMLDOFBHVPDRVLDO_vreg_1p28 ( _RAC_PATRIM2_PATRIMLDOFBHVPDRVLDO_vreg_1p28 << 0)

#define	RAC_PATRIM2_PATRIMLDOFBHVPDRVLDO_vreg_1p35 ( _RAC_PATRIM2_PATRIMLDOFBHVPDRVLDO_vreg_1p35 << 0)

#define	RAC_PATRIM2_PATRIMLDOFBHVPDRVLDO_vreg_1p44 ( _RAC_PATRIM2_PATRIMLDOFBHVPDRVLDO_vreg_1p44 << 0)

#define	RAC_PATRIM2_PATRIMLDOFBHVPREREG_DEFAULT ( _RAC_PATRIM2_PATRIMLDOFBHVPREREG_DEFAULT << 2)

#define	RAC_PATRIM2_PATRIMLDOFBHVPREREG_vreg_1p678 ( _RAC_PATRIM2_PATRIMLDOFBHVPREREG_vreg_1p678 << 2)

#define	RAC_PATRIM2_PATRIMLDOFBHVPREREG_vreg_1p735 ( _RAC_PATRIM2_PATRIMLDOFBHVPREREG_vreg_1p735 << 2)

#define	RAC_PATRIM2_PATRIMLDOFBHVPREREG_vreg_1p801 ( _RAC_PATRIM2_PATRIMLDOFBHVPREREG_vreg_1p801 << 2)

#define	RAC_PATRIM2_PATRIMLDOFBHVPREREG_vreg_1p875 ( _RAC_PATRIM2_PATRIMLDOFBHVPREREG_vreg_1p875 << 2)

#define	RAC_PATRIM2_PATRIMLDOFBHVPREREG_vreg_3p00 ( _RAC_PATRIM2_PATRIMLDOFBHVPREREG_vreg_3p00 << 2)

#define	RAC_PATRIM2_PATRIMLDOFBHVPREREG_vreg_3p14 ( _RAC_PATRIM2_PATRIMLDOFBHVPREREG_vreg_3p14 << 2)

#define	RAC_PATRIM2_PATRIMLDOFBHVPREREG_vreg_3p3 ( _RAC_PATRIM2_PATRIMLDOFBHVPREREG_vreg_3p3 << 2)

#define	RAC_PATRIM2_PATRIMLDOFBHVPREREG_vreg_3p477 ( _RAC_PATRIM2_PATRIMLDOFBHVPREREG_vreg_3p477 << 2)

#define	RAC_PATRIM2_PATRIMLDOHVPDRVLDO_DEFAULT ( _RAC_PATRIM2_PATRIMLDOHVPDRVLDO_DEFAULT << 5)

#define	RAC_PATRIM2_PATRIMLDOHVPDRVLDO_vref_0p675 ( _RAC_PATRIM2_PATRIMLDOHVPDRVLDO_vref_0p675 << 5)

#define	RAC_PATRIM2_PATRIMLDOHVPDRVLDO_vref_0p700 ( _RAC_PATRIM2_PATRIMLDOHVPDRVLDO_vref_0p700 << 5)

#define	RAC_PATRIM2_PATRIMLDOHVPDRVLDO_vref_0p725 ( _RAC_PATRIM2_PATRIMLDOHVPDRVLDO_vref_0p725 << 5)

#define	RAC_PATRIM2_PATRIMLDOHVPDRVLDO_vref_0p750 ( _RAC_PATRIM2_PATRIMLDOHVPDRVLDO_vref_0p750 << 5)

#define	RAC_PATRIM2_PATRIMLDOHVPDRVLDO_vref_0p775 ( _RAC_PATRIM2_PATRIMLDOHVPDRVLDO_vref_0p775 << 5)

#define	RAC_PATRIM2_PATRIMLDOHVPDRVLDO_vref_0p800 ( _RAC_PATRIM2_PATRIMLDOHVPDRVLDO_vref_0p800 << 5)

#define	RAC_PATRIM2_PATRIMLDOHVPDRVLDO_vref_0p825 ( _RAC_PATRIM2_PATRIMLDOHVPDRVLDO_vref_0p825 << 5)

#define	RAC_PATRIM2_PATRIMLDOHVPDRVLDO_vref_0p850 ( _RAC_PATRIM2_PATRIMLDOHVPDRVLDO_vref_0p850 << 5)

#define	RAC_PATRIM2_PATRIMLDOHVPREREG_DEFAULT ( _RAC_PATRIM2_PATRIMLDOHVPREREG_DEFAULT << 8)

#define	RAC_PATRIM2_PATRIMLDOHVPREREG_vref_0p651 ( _RAC_PATRIM2_PATRIMLDOHVPREREG_vref_0p651 << 8)

#define	RAC_PATRIM2_PATRIMLDOHVPREREG_vref_0p663 ( _RAC_PATRIM2_PATRIMLDOHVPREREG_vref_0p663 << 8)

#define	RAC_PATRIM2_PATRIMLDOHVPREREG_vref_0p676 ( _RAC_PATRIM2_PATRIMLDOHVPREREG_vref_0p676 << 8)

#define	RAC_PATRIM2_PATRIMLDOHVPREREG_vref_0p688 ( _RAC_PATRIM2_PATRIMLDOHVPREREG_vref_0p688 << 8)

#define	RAC_PATRIM2_PATRIMLDOHVPREREG_vref_0p701 ( _RAC_PATRIM2_PATRIMLDOHVPREREG_vref_0p701 << 8)

#define	RAC_PATRIM2_PATRIMLDOHVPREREG_vref_0p713 ( _RAC_PATRIM2_PATRIMLDOHVPREREG_vref_0p713 << 8)

#define	RAC_PATRIM2_PATRIMLDOHVPREREG_vref_0p726 ( _RAC_PATRIM2_PATRIMLDOHVPREREG_vref_0p726 << 8)

#define	RAC_PATRIM2_PATRIMLDOHVPREREG_vref_0p738 ( _RAC_PATRIM2_PATRIMLDOHVPREREG_vref_0p738 << 8)

#define	RAC_PATRIM2_PATRIMLDOHVPREREG_vref_0p751 ( _RAC_PATRIM2_PATRIMLDOHVPREREG_vref_0p751 << 8)

#define	RAC_PATRIM2_PATRIMLDOHVPREREG_vref_0p763 ( _RAC_PATRIM2_PATRIMLDOHVPREREG_vref_0p763 << 8)

#define	RAC_PATRIM2_PATRIMLDOHVPREREG_vref_0p776 ( _RAC_PATRIM2_PATRIMLDOHVPREREG_vref_0p776 << 8)

#define	RAC_PATRIM2_PATRIMLDOHVPREREG_vref_0p788 ( _RAC_PATRIM2_PATRIMLDOHVPREREG_vref_0p788 << 8)

#define	RAC_PATRIM2_PATRIMLDOHVPREREG_vref_0p801 ( _RAC_PATRIM2_PATRIMLDOHVPREREG_vref_0p801 << 8)

#define	RAC_PATRIM2_PATRIMLDOHVPREREG_vref_0p813 ( _RAC_PATRIM2_PATRIMLDOHVPREREG_vref_0p813 << 8)

#define	RAC_PATRIM2_PATRIMLDOHVPREREG_vref_0p826 ( _RAC_PATRIM2_PATRIMLDOHVPREREG_vref_0p826 << 8)

#define	RAC_PATRIM2_PATRIMLDOHVPREREG_vref_0p838 ( _RAC_PATRIM2_PATRIMLDOHVPREREG_vref_0p838 << 8)

#define	RAC_PATRIM2_PATRIMLDOPSRPDRVLDO (0x1UL << 12)

#define	RAC_PATRIM2_PATRIMLDOPSRPDRVLDO_DEFAULT ( _RAC_PATRIM2_PATRIMLDOPSRPDRVLDO_DEFAULT << 12)

#define	RAC_PATRIM2_PATRIMLDOPSRPDRVLDO_high_psr ( _RAC_PATRIM2_PATRIMLDOPSRPDRVLDO_high_psr << 12)

#define	RAC_PATRIM2_PATRIMLDOPSRPDRVLDO_low_psr ( _RAC_PATRIM2_PATRIMLDOPSRPDRVLDO_low_psr << 12)

#define	RAC_PATRIM2_PATRIMLDOPSRPREREG (0x1UL << 13)

#define	RAC_PATRIM2_PATRIMLDOPSRPREREG_DEFAULT ( _RAC_PATRIM2_PATRIMLDOPSRPREREG_DEFAULT << 13)

#define	RAC_PATRIM2_PATRIMLDOPSRPREREG_high_psr ( _RAC_PATRIM2_PATRIMLDOPSRPREREG_high_psr << 13)

#define	RAC_PATRIM2_PATRIMLDOPSRPREREG_low_psr ( _RAC_PATRIM2_PATRIMLDOPSRPREREG_low_psr << 13)

#define	RAC_PATRIM2_PATRIMLDOSLICESPDRVLDO_DEFAULT ( _RAC_PATRIM2_PATRIMLDOSLICESPDRVLDO_DEFAULT << 14)

#define	RAC_PATRIM2_PATRIMLDOSLICESPDRVLDO_iload_15mA ( _RAC_PATRIM2_PATRIMLDOSLICESPDRVLDO_iload_15mA << 14)

#define	RAC_PATRIM2_PATRIMLDOSLICESPDRVLDO_iload_22p5mA ( _RAC_PATRIM2_PATRIMLDOSLICESPDRVLDO_iload_22p5mA << 14)

#define	RAC_PATRIM2_PATRIMLDOSLICESPDRVLDO_iload_30mA ( _RAC_PATRIM2_PATRIMLDOSLICESPDRVLDO_iload_30mA << 14)

#define	RAC_PATRIM2_PATRIMLDOSLICESPDRVLDO_iload_7p5mA ( _RAC_PATRIM2_PATRIMLDOSLICESPDRVLDO_iload_7p5mA << 14)

#define	RAC_PATRIM2_PATRIMLDOSLICESPREREG_DEFAULT ( _RAC_PATRIM2_PATRIMLDOSLICESPREREG_DEFAULT << 16)

#define	RAC_PATRIM2_PATRIMLDOSLICESPREREG_spare1 ( _RAC_PATRIM2_PATRIMLDOSLICESPREREG_spare1 << 16)

#define	RAC_PATRIM2_PATRIMLDOSLICESPREREG_spare2 ( _RAC_PATRIM2_PATRIMLDOSLICESPREREG_spare2 << 16)

#define	RAC_PATRIM2_PATRIMLDOSLICESPREREG_spare3 ( _RAC_PATRIM2_PATRIMLDOSLICESPREREG_spare3 << 16)

#define	RAC_PATRIM2_PATRIMLDOSLICESPREREG_spare4 ( _RAC_PATRIM2_PATRIMLDOSLICESPREREG_spare4 << 16)

#define	RAC_PATRIM2_PATRIMNBIAS_DEFAULT ( _RAC_PATRIM2_PATRIMNBIAS_DEFAULT << 19)

#define	RAC_PATRIM2_PATRIMNBIAS_vnbias_default ( _RAC_PATRIM2_PATRIMNBIAS_vnbias_default << 19)

#define	RAC_PATRIM2_PATRIMNBIAS_vnbias_dn104mv ( _RAC_PATRIM2_PATRIMNBIAS_vnbias_dn104mv << 19)

#define	RAC_PATRIM2_PATRIMNBIAS_vnbias_dn13mv ( _RAC_PATRIM2_PATRIMNBIAS_vnbias_dn13mv << 19)

#define	RAC_PATRIM2_PATRIMNBIAS_vnbias_dn26mv ( _RAC_PATRIM2_PATRIMNBIAS_vnbias_dn26mv << 19)

#define	RAC_PATRIM2_PATRIMNBIAS_vnbias_dn39mv ( _RAC_PATRIM2_PATRIMNBIAS_vnbias_dn39mv << 19)

#define	RAC_PATRIM2_PATRIMNBIAS_vnbias_dn52mv ( _RAC_PATRIM2_PATRIMNBIAS_vnbias_dn52mv << 19)

#define	RAC_PATRIM2_PATRIMNBIAS_vnbias_dn65mv ( _RAC_PATRIM2_PATRIMNBIAS_vnbias_dn65mv << 19)

#define	RAC_PATRIM2_PATRIMNBIAS_vnbias_dn78mv ( _RAC_PATRIM2_PATRIMNBIAS_vnbias_dn78mv << 19)

#define	RAC_PATRIM2_PATRIMNBIAS_vnbias_dn91mv ( _RAC_PATRIM2_PATRIMNBIAS_vnbias_dn91mv << 19)

#define	RAC_PATRIM2_PATRIMNBIAS_vnbias_up13mv ( _RAC_PATRIM2_PATRIMNBIAS_vnbias_up13mv << 19)

#define	RAC_PATRIM2_PATRIMNBIAS_vnbias_up26mv ( _RAC_PATRIM2_PATRIMNBIAS_vnbias_up26mv << 19)

#define	RAC_PATRIM2_PATRIMNBIAS_vnbias_up39mv ( _RAC_PATRIM2_PATRIMNBIAS_vnbias_up39mv << 19)

#define	RAC_PATRIM2_PATRIMNBIAS_vnbias_up52mv ( _RAC_PATRIM2_PATRIMNBIAS_vnbias_up52mv << 19)

#define	RAC_PATRIM2_PATRIMNBIAS_vnbias_up65mv ( _RAC_PATRIM2_PATRIMNBIAS_vnbias_up65mv << 19)

#define	RAC_PATRIM2_PATRIMNBIAS_vnbias_up78mv ( _RAC_PATRIM2_PATRIMNBIAS_vnbias_up78mv << 19)

#define	RAC_PATRIM2_PATRIMNBIAS_vnbias_up91mv ( _RAC_PATRIM2_PATRIMNBIAS_vnbias_up91mv << 19)

#define	RAC_PATRIM2_PATRIMNCASC_DEFAULT ( _RAC_PATRIM2_PATRIMNCASC_DEFAULT << 23)

#define	RAC_PATRIM2_PATRIMNCASC_ncbias_default ( _RAC_PATRIM2_PATRIMNCASC_ncbias_default << 23)

#define	RAC_PATRIM2_PATRIMNCASC_ncbias_m50mv ( _RAC_PATRIM2_PATRIMNCASC_ncbias_m50mv << 23)

#define	RAC_PATRIM2_PATRIMNCASC_ncbias_p100mv ( _RAC_PATRIM2_PATRIMNCASC_ncbias_p100mv << 23)

#define	RAC_PATRIM2_PATRIMNCASC_ncbias_p50mv ( _RAC_PATRIM2_PATRIMNCASC_ncbias_p50mv << 23)

#define	RAC_PATRIM2_PATRIMPADACGLITCH (0x1UL << 18)

#define	RAC_PATRIM2_PATRIMPADACGLITCH_DEFAULT ( _RAC_PATRIM2_PATRIMPADACGLITCH_DEFAULT << 18)

#define	RAC_PATRIM2_PATRIMPADACGLITCH_larger_glitch ( _RAC_PATRIM2_PATRIMPADACGLITCH_larger_glitch << 18)

#define	RAC_PATRIM2_PATRIMPADACGLITCH_smaller_glitch ( _RAC_PATRIM2_PATRIMPADACGLITCH_smaller_glitch << 18)

#define	RAC_PATRIM2_PATRIMPBIAS_DEFAULT ( _RAC_PATRIM2_PATRIMPBIAS_DEFAULT << 25)

#define	RAC_PATRIM2_PATRIMPBIAS_vpbias_default ( _RAC_PATRIM2_PATRIMPBIAS_vpbias_default << 25)

#define	RAC_PATRIM2_PATRIMPBIAS_vpbias_dn13mv ( _RAC_PATRIM2_PATRIMPBIAS_vpbias_dn13mv << 25)

#define	RAC_PATRIM2_PATRIMPBIAS_vpbias_dn26mv ( _RAC_PATRIM2_PATRIMPBIAS_vpbias_dn26mv << 25)

#define	RAC_PATRIM2_PATRIMPBIAS_vpbias_dn38mv ( _RAC_PATRIM2_PATRIMPBIAS_vpbias_dn38mv << 25)

#define	RAC_PATRIM2_PATRIMPBIAS_vpbias_dn52mv ( _RAC_PATRIM2_PATRIMPBIAS_vpbias_dn52mv << 25)

#define	RAC_PATRIM2_PATRIMPBIAS_vpbias_dn65mv ( _RAC_PATRIM2_PATRIMPBIAS_vpbias_dn65mv << 25)

#define	RAC_PATRIM2_PATRIMPBIAS_vpbias_dn78mv ( _RAC_PATRIM2_PATRIMPBIAS_vpbias_dn78mv << 25)

#define	RAC_PATRIM2_PATRIMPBIAS_vpbias_dn91mv ( _RAC_PATRIM2_PATRIMPBIAS_vpbias_dn91mv << 25)

#define	RAC_PATRIM2_PATRIMPBIAS_vpbias_up104mv ( _RAC_PATRIM2_PATRIMPBIAS_vpbias_up104mv << 25)

#define	RAC_PATRIM2_PATRIMPBIAS_vpbias_up13mv ( _RAC_PATRIM2_PATRIMPBIAS_vpbias_up13mv << 25)

#define	RAC_PATRIM2_PATRIMPBIAS_vpbias_up26mv ( _RAC_PATRIM2_PATRIMPBIAS_vpbias_up26mv << 25)

#define	RAC_PATRIM2_PATRIMPBIAS_vpbias_up39mv ( _RAC_PATRIM2_PATRIMPBIAS_vpbias_up39mv << 25)

#define	RAC_PATRIM2_PATRIMPBIAS_vpbias_up52mv ( _RAC_PATRIM2_PATRIMPBIAS_vpbias_up52mv << 25)

#define	RAC_PATRIM2_PATRIMPBIAS_vpbias_up65mv ( _RAC_PATRIM2_PATRIMPBIAS_vpbias_up65mv << 25)

#define	RAC_PATRIM2_PATRIMPBIAS_vpbias_up78mv ( _RAC_PATRIM2_PATRIMPBIAS_vpbias_up78mv << 25)

#define	RAC_PATRIM2_PATRIMPBIAS_vpbias_up91mv ( _RAC_PATRIM2_PATRIMPBIAS_vpbias_up91mv << 25)

#define	RAC_PATRIM2_PATRIMPCASC_DEFAULT ( _RAC_PATRIM2_PATRIMPCASC_DEFAULT << 29)

#define	RAC_PATRIM2_PATRIMPCASC_pcbias_default ( _RAC_PATRIM2_PATRIMPCASC_pcbias_default << 29)

#define	RAC_PATRIM2_PATRIMPCASC_pcbias_m100mv ( _RAC_PATRIM2_PATRIMPCASC_pcbias_m100mv << 29)

#define	RAC_PATRIM2_PATRIMPCASC_pcbias_m50mv ( _RAC_PATRIM2_PATRIMPCASC_pcbias_m50mv << 29)

#define	RAC_PATRIM2_PATRIMPCASC_pcbias_p50mv ( _RAC_PATRIM2_PATRIMPCASC_pcbias_p50mv << 29)

#define	RAC_PGACAL_PGAOFFNCALI_DEFAULT ( _RAC_PGACAL_PGAOFFNCALI_DEFAULT << 0)

#define	RAC_PGACAL_PGAOFFNCALI_offset_m_300mv ( _RAC_PGACAL_PGAOFFNCALI_offset_m_300mv << 0)

#define	RAC_PGACAL_PGAOFFNCALI_offset_p_300mv ( _RAC_PGACAL_PGAOFFNCALI_offset_p_300mv << 0)

#define	RAC_PGACAL_PGAOFFNCALQ_DEFAULT ( _RAC_PGACAL_PGAOFFNCALQ_DEFAULT << 8)

#define	RAC_PGACAL_PGAOFFNCALQ_offset_m_300mv ( _RAC_PGACAL_PGAOFFNCALQ_offset_m_300mv << 8)

#define	RAC_PGACAL_PGAOFFNCALQ_offset_p_300mv ( _RAC_PGACAL_PGAOFFNCALQ_offset_p_300mv << 8)

#define	RAC_PGACAL_PGAOFFPCALI_DEFAULT ( _RAC_PGACAL_PGAOFFPCALI_DEFAULT << 16)

#define	RAC_PGACAL_PGAOFFPCALI_offset_m_300mv ( _RAC_PGACAL_PGAOFFPCALI_offset_m_300mv << 16)

#define	RAC_PGACAL_PGAOFFPCALI_offset_p_300mv ( _RAC_PGACAL_PGAOFFPCALI_offset_p_300mv << 16)

#define	RAC_PGACAL_PGAOFFPCALQ_DEFAULT ( _RAC_PGACAL_PGAOFFPCALQ_DEFAULT << 24)

#define	RAC_PGACAL_PGAOFFPCALQ_offset_m_300mv ( _RAC_PGACAL_PGAOFFPCALQ_offset_m_300mv << 24)

#define	RAC_PGACAL_PGAOFFPCALQ_offset_p_300mv ( _RAC_PGACAL_PGAOFFPCALQ_offset_p_300mv << 24)

#define	RAC_PGACTRL_LNAMIXRFPKDTHRESHSEL_DEFAULT ( _RAC_PGACTRL_LNAMIXRFPKDTHRESHSEL_DEFAULT << 24)

#define	RAC_PGACTRL_PGABWMODE_bw_1p25MHz ( _RAC_PGACTRL_PGABWMODE_bw_1p25MHz << 0)

#define	RAC_PGACTRL_PGABWMODE_bw_1p67MHz ( _RAC_PGACTRL_PGABWMODE_bw_1p67MHz << 0)

#define	RAC_PGACTRL_PGABWMODE_bw_2p5MHz ( _RAC_PGACTRL_PGABWMODE_bw_2p5MHz << 0)

#define	RAC_PGACTRL_PGABWMODE_bw_5MHz ( _RAC_PGACTRL_PGABWMODE_bw_5MHz << 0)

#define	RAC_PGACTRL_PGABWMODE_DEFAULT ( _RAC_PGACTRL_PGABWMODE_DEFAULT << 0)

#define	RAC_PGACTRL_PGAENBIAS (0x1UL << 2)

#define	RAC_PGACTRL_PGAENBIAS_bias_disable ( _RAC_PGACTRL_PGAENBIAS_bias_disable << 2)

#define	RAC_PGACTRL_PGAENBIAS_bias_enable ( _RAC_PGACTRL_PGAENBIAS_bias_enable << 2)

#define	RAC_PGACTRL_PGAENBIAS_DEFAULT ( _RAC_PGACTRL_PGAENBIAS_DEFAULT << 2)

#define	RAC_PGACTRL_PGAENGHZ (0x1UL << 3)

#define	RAC_PGACTRL_PGAENGHZ_DEFAULT ( _RAC_PGACTRL_PGAENGHZ_DEFAULT << 3)

#define	RAC_PGACTRL_PGAENGHZ_ghz_disable ( _RAC_PGACTRL_PGAENGHZ_ghz_disable << 3)

#define	RAC_PGACTRL_PGAENGHZ_ghz_enable ( _RAC_PGACTRL_PGAENGHZ_ghz_enable << 3)

#define	RAC_PGACTRL_PGAENHYST (0x1UL << 4)

#define	RAC_PGACTRL_PGAENHYST_DEFAULT ( _RAC_PGACTRL_PGAENHYST_DEFAULT << 4)

#define	RAC_PGACTRL_PGAENHYST_pkd_hyst_disable ( _RAC_PGACTRL_PGAENHYST_pkd_hyst_disable << 4)

#define	RAC_PGACTRL_PGAENHYST_pkd_hyst_enable ( _RAC_PGACTRL_PGAENHYST_pkd_hyst_enable << 4)

#define	RAC_PGACTRL_PGAENLATCHI (0x1UL << 5)

#define	RAC_PGACTRL_PGAENLATCHI_DEFAULT ( _RAC_PGACTRL_PGAENLATCHI_DEFAULT << 5)

#define	RAC_PGACTRL_PGAENLATCHI_pkd_latch_i_disable ( _RAC_PGACTRL_PGAENLATCHI_pkd_latch_i_disable << 5)

#define	RAC_PGACTRL_PGAENLATCHI_pkd_latch_i_enable ( _RAC_PGACTRL_PGAENLATCHI_pkd_latch_i_enable << 5)

#define	RAC_PGACTRL_PGAENLATCHQ (0x1UL << 6)

#define	RAC_PGACTRL_PGAENLATCHQ_DEFAULT ( _RAC_PGACTRL_PGAENLATCHQ_DEFAULT << 6)

#define	RAC_PGACTRL_PGAENLATCHQ_pkd_latch_q_disable ( _RAC_PGACTRL_PGAENLATCHQ_pkd_latch_q_disable << 6)

#define	RAC_PGACTRL_PGAENLATCHQ_pkd_latch_q_enable ( _RAC_PGACTRL_PGAENLATCHQ_pkd_latch_q_enable << 6)

#define	RAC_PGACTRL_PGAENLDOLOAD (0x1UL << 7)

#define	RAC_PGACTRL_PGAENLDOLOAD_DEFAULT ( _RAC_PGACTRL_PGAENLDOLOAD_DEFAULT << 7)

#define	RAC_PGACTRL_PGAENLDOLOAD_disable_ldo_load ( _RAC_PGACTRL_PGAENLDOLOAD_disable_ldo_load << 7)

#define	RAC_PGACTRL_PGAENLDOLOAD_enable_ldo_load ( _RAC_PGACTRL_PGAENLDOLOAD_enable_ldo_load << 7)

#define	RAC_PGACTRL_PGAENOFFD (0x1UL << 8)

#define	RAC_PGACTRL_PGAENOFFD_DEFAULT ( _RAC_PGACTRL_PGAENOFFD_DEFAULT << 8)

#define	RAC_PGACTRL_PGAENOFFD_pkd_offd_disable ( _RAC_PGACTRL_PGAENOFFD_pkd_offd_disable << 8)

#define	RAC_PGACTRL_PGAENOFFD_pkd_offd_enable ( _RAC_PGACTRL_PGAENOFFD_pkd_offd_enable << 8)

#define	RAC_PGACTRL_PGAENPGAI (0x1UL << 9)

#define	RAC_PGACTRL_PGAENPGAI_DEFAULT ( _RAC_PGACTRL_PGAENPGAI_DEFAULT << 9)

#define	RAC_PGACTRL_PGAENPGAI_pgai_disable ( _RAC_PGACTRL_PGAENPGAI_pgai_disable << 9)

#define	RAC_PGACTRL_PGAENPGAI_pgai_enable ( _RAC_PGACTRL_PGAENPGAI_pgai_enable << 9)

#define	RAC_PGACTRL_PGAENPGAQ (0x1UL << 10)

#define	RAC_PGACTRL_PGAENPGAQ_DEFAULT ( _RAC_PGACTRL_PGAENPGAQ_DEFAULT << 10)

#define	RAC_PGACTRL_PGAENPGAQ_pgaq_disable ( _RAC_PGACTRL_PGAENPGAQ_pgaq_disable << 10)

#define	RAC_PGACTRL_PGAENPGAQ_pgaq_enable ( _RAC_PGACTRL_PGAENPGAQ_pgaq_enable << 10)

#define	RAC_PGACTRL_PGAENPKD (0x1UL << 11)

#define	RAC_PGACTRL_PGAENPKD_DEFAULT ( _RAC_PGACTRL_PGAENPKD_DEFAULT << 11)

#define	RAC_PGACTRL_PGAENPKD_pkd_disable ( _RAC_PGACTRL_PGAENPKD_pkd_disable << 11)

#define	RAC_PGACTRL_PGAENPKD_pkd_enable ( _RAC_PGACTRL_PGAENPKD_pkd_enable << 11)

#define	RAC_PGACTRL_PGAENRCMOUT (0x1UL << 12)

#define	RAC_PGACTRL_PGAENRCMOUT_DEFAULT ( _RAC_PGACTRL_PGAENRCMOUT_DEFAULT << 12)

#define	RAC_PGACTRL_PGAENRCMOUT_rcm_out_disable ( _RAC_PGACTRL_PGAENRCMOUT_rcm_out_disable << 12)

#define	RAC_PGACTRL_PGAENRCMOUT_rcm_out_enable ( _RAC_PGACTRL_PGAENRCMOUT_rcm_out_enable << 12)

#define	RAC_PGACTRL_PGAPOWERMODE_DEFAULT ( _RAC_PGACTRL_PGAPOWERMODE_DEFAULT << 14)

#define	RAC_PGACTRL_PGAPOWERMODE_pm_0p5 ( _RAC_PGACTRL_PGAPOWERMODE_pm_0p5 << 14)

#define	RAC_PGACTRL_PGAPOWERMODE_pm_0p8 ( _RAC_PGACTRL_PGAPOWERMODE_pm_0p8 << 14)

#define	RAC_PGACTRL_PGAPOWERMODE_pm_1p2 ( _RAC_PGACTRL_PGAPOWERMODE_pm_1p2 << 14)

#define	RAC_PGACTRL_PGAPOWERMODE_pm_typ ( _RAC_PGACTRL_PGAPOWERMODE_pm_typ << 14)

#define	RAC_PGACTRL_PGATHRPKDHISEL_DEFAULT ( _RAC_PGACTRL_PGATHRPKDHISEL_DEFAULT << 20)

#define	RAC_PGACTRL_PGATHRPKDHISEL_verf150mv ( _RAC_PGACTRL_PGATHRPKDHISEL_verf150mv << 20)

#define	RAC_PGACTRL_PGATHRPKDHISEL_vref100mv ( _RAC_PGACTRL_PGATHRPKDHISEL_vref100mv << 20)

#define	RAC_PGACTRL_PGATHRPKDHISEL_vref125mv ( _RAC_PGACTRL_PGATHRPKDHISEL_vref125mv << 20)

#define	RAC_PGACTRL_PGATHRPKDHISEL_vref175mv ( _RAC_PGACTRL_PGATHRPKDHISEL_vref175mv << 20)

#define	RAC_PGACTRL_PGATHRPKDHISEL_vref200mv ( _RAC_PGACTRL_PGATHRPKDHISEL_vref200mv << 20)

#define	RAC_PGACTRL_PGATHRPKDHISEL_vref225mv ( _RAC_PGACTRL_PGATHRPKDHISEL_vref225mv << 20)

#define	RAC_PGACTRL_PGATHRPKDHISEL_vref250mv ( _RAC_PGACTRL_PGATHRPKDHISEL_vref250mv << 20)

#define	RAC_PGACTRL_PGATHRPKDHISEL_vref275mv ( _RAC_PGACTRL_PGATHRPKDHISEL_vref275mv << 20)

#define	RAC_PGACTRL_PGATHRPKDHISEL_vref300mv ( _RAC_PGACTRL_PGATHRPKDHISEL_vref300mv << 20)

#define	RAC_PGACTRL_PGATHRPKDHISEL_vref50mv ( _RAC_PGACTRL_PGATHRPKDHISEL_vref50mv << 20)

#define	RAC_PGACTRL_PGATHRPKDHISEL_vref75mv ( _RAC_PGACTRL_PGATHRPKDHISEL_vref75mv << 20)

#define	RAC_PGACTRL_PGATHRPKDLOSEL_DEFAULT ( _RAC_PGACTRL_PGATHRPKDLOSEL_DEFAULT << 16)

#define	RAC_PGACTRL_PGATHRPKDLOSEL_vref100mv ( _RAC_PGACTRL_PGATHRPKDLOSEL_vref100mv << 16)

#define	RAC_PGACTRL_PGATHRPKDLOSEL_vref125mv ( _RAC_PGACTRL_PGATHRPKDLOSEL_vref125mv << 16)

#define	RAC_PGACTRL_PGATHRPKDLOSEL_vref150mv ( _RAC_PGACTRL_PGATHRPKDLOSEL_vref150mv << 16)

#define	RAC_PGACTRL_PGATHRPKDLOSEL_vref175mv ( _RAC_PGACTRL_PGATHRPKDLOSEL_vref175mv << 16)

#define	RAC_PGACTRL_PGATHRPKDLOSEL_vref200mv ( _RAC_PGACTRL_PGATHRPKDLOSEL_vref200mv << 16)

#define	RAC_PGACTRL_PGATHRPKDLOSEL_vref225mv ( _RAC_PGACTRL_PGATHRPKDLOSEL_vref225mv << 16)

#define	RAC_PGACTRL_PGATHRPKDLOSEL_vref250mv ( _RAC_PGACTRL_PGATHRPKDLOSEL_vref250mv << 16)

#define	RAC_PGACTRL_PGATHRPKDLOSEL_vref275mv ( _RAC_PGACTRL_PGATHRPKDLOSEL_vref275mv << 16)

#define	RAC_PGACTRL_PGATHRPKDLOSEL_vref300mv ( _RAC_PGACTRL_PGATHRPKDLOSEL_vref300mv << 16)

#define	RAC_PGACTRL_PGATHRPKDLOSEL_vref50mv ( _RAC_PGACTRL_PGATHRPKDLOSEL_vref50mv << 16)

#define	RAC_PGACTRL_PGATHRPKDLOSEL_vref75mv ( _RAC_PGACTRL_PGATHRPKDLOSEL_vref75mv << 16)

#define	RAC_PGATRIM_PGACTUNE_cfb_0p7 ( _RAC_PGATRIM_PGACTUNE_cfb_0p7 << 0)

#define	RAC_PGATRIM_PGACTUNE_cfb_1p32 ( _RAC_PGATRIM_PGACTUNE_cfb_1p32 << 0)

#define	RAC_PGATRIM_PGACTUNE_cfb_nominal ( _RAC_PGATRIM_PGACTUNE_cfb_nominal << 0)

#define	RAC_PGATRIM_PGACTUNE_DEFAULT ( _RAC_PGATRIM_PGACTUNE_DEFAULT << 0)

#define	RAC_PGATRIM_PGADISANTILOCK (0x1UL << 4)

#define	RAC_PGATRIM_PGADISANTILOCK_antilock_disable ( _RAC_PGATRIM_PGADISANTILOCK_antilock_disable << 4)

#define	RAC_PGATRIM_PGADISANTILOCK_antilock_enable ( _RAC_PGATRIM_PGADISANTILOCK_antilock_enable << 4)

#define	RAC_PGATRIM_PGADISANTILOCK_DEFAULT ( _RAC_PGATRIM_PGADISANTILOCK_DEFAULT << 4)

#define	RAC_PGATRIM_PGAVCMOUTTRIM_DEFAULT ( _RAC_PGATRIM_PGAVCMOUTTRIM_DEFAULT << 5)

#define	RAC_PGATRIM_PGAVCMOUTTRIM_vcm_out_0p4 ( _RAC_PGATRIM_PGAVCMOUTTRIM_vcm_out_0p4 << 5)

#define	RAC_PGATRIM_PGAVCMOUTTRIM_vcm_out_0p45 ( _RAC_PGATRIM_PGAVCMOUTTRIM_vcm_out_0p45 << 5)

#define	RAC_PGATRIM_PGAVCMOUTTRIM_vcm_out_0p5 ( _RAC_PGATRIM_PGAVCMOUTTRIM_vcm_out_0p5 << 5)

#define	RAC_PGATRIM_PGAVCMOUTTRIM_vcm_out_0p55 ( _RAC_PGATRIM_PGAVCMOUTTRIM_vcm_out_0p55 << 5)

#define	RAC_PGATRIM_PGAVCMOUTTRIM_vcm_out_0p6 ( _RAC_PGATRIM_PGAVCMOUTTRIM_vcm_out_0p6 << 5)

#define	RAC_PGATRIM_PGAVCMOUTTRIM_vcm_out_0p65 ( _RAC_PGATRIM_PGAVCMOUTTRIM_vcm_out_0p65 << 5)

#define	RAC_PGATRIM_PGAVCMOUTTRIM_vcm_out_0p7 ( _RAC_PGATRIM_PGAVCMOUTTRIM_vcm_out_0p7 << 5)

#define	RAC_PGATRIM_PGAVCMOUTTRIM_vcm_out_0p75 ( _RAC_PGATRIM_PGAVCMOUTTRIM_vcm_out_0p75 << 5)

#define	RAC_PGATRIM_PGAVLDOTRIM_DEFAULT ( _RAC_PGATRIM_PGAVLDOTRIM_DEFAULT << 8)

#define	RAC_PGATRIM_PGAVLDOTRIM_vdda_1p15 ( _RAC_PGATRIM_PGAVLDOTRIM_vdda_1p15 << 8)

#define	RAC_PGATRIM_PGAVLDOTRIM_vdda_1p2 ( _RAC_PGATRIM_PGAVLDOTRIM_vdda_1p2 << 8)

#define	RAC_PGATRIM_PGAVLDOTRIM_vdda_1p25 ( _RAC_PGATRIM_PGAVLDOTRIM_vdda_1p25 << 8)

#define	RAC_PGATRIM_PGAVLDOTRIM_vdda_1p3 ( _RAC_PGATRIM_PGAVLDOTRIM_vdda_1p3 << 8)

#define	RAC_PGATRIM_PGAVLDOTRIM_vdda_1p35 ( _RAC_PGATRIM_PGAVLDOTRIM_vdda_1p35 << 8)

#define	RAC_PGATRIM_PGAVLDOTRIM_vdda_1p4 ( _RAC_PGATRIM_PGAVLDOTRIM_vdda_1p4 << 8)

#define	RAC_PGATRIM_PGAVLDOTRIM_vdda_1p5 ( _RAC_PGATRIM_PGAVLDOTRIM_vdda_1p5 << 8)

#define	RAC_PGATRIM_PGAVLDOTRIM_vdda_1p55 ( _RAC_PGATRIM_PGAVLDOTRIM_vdda_1p55 << 8)

#define	RAC_PRECTRL_PREBYPFORCE (0x1UL << 0)

#define	RAC_PRECTRL_PREBYPFORCE_DEFAULT ( _RAC_PRECTRL_PREBYPFORCE_DEFAULT << 0)

#define	RAC_PRECTRL_PREBYPFORCE_forced ( _RAC_PRECTRL_PREBYPFORCE_forced << 0)

#define	RAC_PRECTRL_PREBYPFORCE_not_forced ( _RAC_PRECTRL_PREBYPFORCE_not_forced << 0)

#define	RAC_PRECTRL_PREREGTRIM_DEFAULT ( _RAC_PRECTRL_PREREGTRIM_DEFAULT << 1)

#define	RAC_PRECTRL_PREREGTRIM_v1p61 ( _RAC_PRECTRL_PREREGTRIM_v1p61 << 1)

#define	RAC_PRECTRL_PREREGTRIM_v1p68 ( _RAC_PRECTRL_PREREGTRIM_v1p68 << 1)

#define	RAC_PRECTRL_PREREGTRIM_v1p74 ( _RAC_PRECTRL_PREREGTRIM_v1p74 << 1)

#define	RAC_PRECTRL_PREREGTRIM_v1p80 ( _RAC_PRECTRL_PREREGTRIM_v1p80 << 1)

#define	RAC_PRECTRL_PREREGTRIM_v1p86 ( _RAC_PRECTRL_PREREGTRIM_v1p86 << 1)

#define	RAC_PRECTRL_PREREGTRIM_v1p91 ( _RAC_PRECTRL_PREREGTRIM_v1p91 << 1)

#define	RAC_PRECTRL_PREREGTRIM_v1p96 ( _RAC_PRECTRL_PREREGTRIM_v1p96 << 1)

#define	RAC_PRECTRL_PREREGTRIM_v2p00 ( _RAC_PRECTRL_PREREGTRIM_v2p00 << 1)

#define	RAC_PRECTRL_PREVREFTRIM_DEFAULT ( _RAC_PRECTRL_PREVREFTRIM_DEFAULT << 4)

#define	RAC_PRECTRL_PREVREFTRIM_v0p675 ( _RAC_PRECTRL_PREVREFTRIM_v0p675 << 4)

#define	RAC_PRECTRL_PREVREFTRIM_v0p688 ( _RAC_PRECTRL_PREVREFTRIM_v0p688 << 4)

#define	RAC_PRECTRL_PREVREFTRIM_v0p700 ( _RAC_PRECTRL_PREVREFTRIM_v0p700 << 4)

#define	RAC_PRECTRL_PREVREFTRIM_v0p713 ( _RAC_PRECTRL_PREVREFTRIM_v0p713 << 4)

#define	RAC_PRESC_STIMER_DEFAULT ( _RAC_PRESC_STIMER_DEFAULT << 0)

#define	RAC_R0_R0_DEFAULT ( _RAC_R0_R0_DEFAULT << 0)

#define	RAC_R1_R1_DEFAULT ( _RAC_R1_R1_DEFAULT << 0)

#define	RAC_R2_R2_DEFAULT ( _RAC_R2_R2_DEFAULT << 0)

#define	RAC_R3_R3_DEFAULT ( _RAC_R3_R3_DEFAULT << 0)

#define	RAC_R4_R4_DEFAULT ( _RAC_R4_R4_DEFAULT << 0)

#define	RAC_R5_R5_DEFAULT ( _RAC_R5_R5_DEFAULT << 0)

#define	RAC_R6_R6_DEFAULT ( _RAC_R6_R6_DEFAULT << 0)

#define	RAC_R7_R7_DEFAULT ( _RAC_R7_R7_DEFAULT << 0)

#define	RAC_RADIOEN_PREEN (0x1UL << 0)

#define	RAC_RADIOEN_PREEN_DEFAULT ( _RAC_RADIOEN_PREEN_DEFAULT << 0)

#define	RAC_RADIOEN_PREEN_powered_off ( _RAC_RADIOEN_PREEN_powered_off << 0)

#define	RAC_RADIOEN_PREEN_powered_on ( _RAC_RADIOEN_PREEN_powered_on << 0)

#define	RAC_RADIOEN_PRESTB100UDIS (0x1UL << 1)

#define	RAC_RADIOEN_PRESTB100UDIS_DEFAULT ( _RAC_RADIOEN_PRESTB100UDIS_DEFAULT << 1)

#define	RAC_RADIOEN_PRESTB100UDIS_i100ua_disabled ( _RAC_RADIOEN_PRESTB100UDIS_i100ua_disabled << 1)

#define	RAC_RADIOEN_PRESTB100UDIS_i100ua_enabled ( _RAC_RADIOEN_PRESTB100UDIS_i100ua_enabled << 1)

#define	RAC_RADIOEN_RFBIASEN (0x1UL << 2)

#define	RAC_RADIOEN_RFBIASEN_DEFAULT ( _RAC_RADIOEN_RFBIASEN_DEFAULT << 2)

#define	RAC_RADIOEN_RFBIASEN_disable_dualbis_vtr ( _RAC_RADIOEN_RFBIASEN_disable_dualbis_vtr << 2)

#define	RAC_RADIOEN_RFBIASEN_enable_dualbis_vtr ( _RAC_RADIOEN_RFBIASEN_enable_dualbis_vtr << 2)

#define	RAC_RFBIASCAL_RFBIASCALBIAS_DEFAULT ( _RAC_RFBIASCAL_RFBIASCALBIAS_DEFAULT << 0)

#define	RAC_RFBIASCAL_RFBIASCALTC_DEFAULT ( _RAC_RFBIASCAL_RFBIASCALTC_DEFAULT << 8)

#define	RAC_RFBIASCAL_RFBIASCALVREF_DEFAULT ( _RAC_RFBIASCAL_RFBIASCALVREF_DEFAULT << 16)

#define	RAC_RFBIASCAL_RFBIASCALVREFSTARTUP_DEFAULT ( _RAC_RFBIASCAL_RFBIASCALVREFSTARTUP_DEFAULT << 24)

#define	RAC_RFBIASCTRL_RFBIASDISABLEBOOTSTRAP (0x1UL << 0)

#define	RAC_RFBIASCTRL_RFBIASDISABLEBOOTSTRAP_DEFAULT ( _RAC_RFBIASCTRL_RFBIASDISABLEBOOTSTRAP_DEFAULT << 0)

#define	RAC_RFBIASCTRL_RFBIASDISABLEBOOTSTRAP_disable_startup ( _RAC_RFBIASCTRL_RFBIASDISABLEBOOTSTRAP_disable_startup << 0)

#define	RAC_RFBIASCTRL_RFBIASDISABLEBOOTSTRAP_enable_startup ( _RAC_RFBIASCTRL_RFBIASDISABLEBOOTSTRAP_enable_startup << 0)

#define	RAC_RFBIASCTRL_RFBIASLDOHIGHCURRENT (0x1UL << 1)

#define	RAC_RFBIASCTRL_RFBIASLDOHIGHCURRENT_DEFAULT ( _RAC_RFBIASCTRL_RFBIASLDOHIGHCURRENT_DEFAULT << 1)

#define	RAC_RFBIASCTRL_RFBIASLDOHIGHCURRENT_high_current ( _RAC_RFBIASCTRL_RFBIASLDOHIGHCURRENT_high_current << 1)

#define	RAC_RFBIASCTRL_RFBIASLDOHIGHCURRENT_low_current ( _RAC_RFBIASCTRL_RFBIASLDOHIGHCURRENT_low_current << 1)

#define	RAC_RFBIASCTRL_RFBIASLDOVREFTRIM_DEFAULT ( _RAC_RFBIASCTRL_RFBIASLDOVREFTRIM_DEFAULT << 16)

#define	RAC_RFBIASCTRL_RFBIASLDOVREFTRIM_vref_v0p800 ( _RAC_RFBIASCTRL_RFBIASLDOVREFTRIM_vref_v0p800 << 16)

#define	RAC_RFBIASCTRL_RFBIASLDOVREFTRIM_vref_v0p813 ( _RAC_RFBIASCTRL_RFBIASLDOVREFTRIM_vref_v0p813 << 16)

#define	RAC_RFBIASCTRL_RFBIASLDOVREFTRIM_vref_v0p825 ( _RAC_RFBIASCTRL_RFBIASLDOVREFTRIM_vref_v0p825 << 16)

#define	RAC_RFBIASCTRL_RFBIASLDOVREFTRIM_vref_v0p837 ( _RAC_RFBIASCTRL_RFBIASLDOVREFTRIM_vref_v0p837 << 16)

#define	RAC_RFBIASCTRL_RFBIASLDOVREFTRIM_vref_v0p850 ( _RAC_RFBIASCTRL_RFBIASLDOVREFTRIM_vref_v0p850 << 16)

#define	RAC_RFBIASCTRL_RFBIASLDOVREFTRIM_vref_v0p863 ( _RAC_RFBIASCTRL_RFBIASLDOVREFTRIM_vref_v0p863 << 16)

#define	RAC_RFBIASCTRL_RFBIASLDOVREFTRIM_vref_v0p875 ( _RAC_RFBIASCTRL_RFBIASLDOVREFTRIM_vref_v0p875 << 16)

#define	RAC_RFBIASCTRL_RFBIASLDOVREFTRIM_vref_v0p887 ( _RAC_RFBIASCTRL_RFBIASLDOVREFTRIM_vref_v0p887 << 16)

#define	RAC_RFBIASCTRL_RFBIASLDOVREFTRIM_vref_v0p900 ( _RAC_RFBIASCTRL_RFBIASLDOVREFTRIM_vref_v0p900 << 16)

#define	RAC_RFBIASCTRL_RFBIASLDOVREFTRIM_vref_v0p913 ( _RAC_RFBIASCTRL_RFBIASLDOVREFTRIM_vref_v0p913 << 16)

#define	RAC_RFBIASCTRL_RFBIASLDOVREFTRIM_vref_v0p925 ( _RAC_RFBIASCTRL_RFBIASLDOVREFTRIM_vref_v0p925 << 16)

#define	RAC_RFBIASCTRL_RFBIASLDOVREFTRIM_vref_v0p938 ( _RAC_RFBIASCTRL_RFBIASLDOVREFTRIM_vref_v0p938 << 16)

#define	RAC_RFBIASCTRL_RFBIASLDOVREFTRIM_vref_v0p950 ( _RAC_RFBIASCTRL_RFBIASLDOVREFTRIM_vref_v0p950 << 16)

#define	RAC_RFBIASCTRL_RFBIASLDOVREFTRIM_vref_v0p963 ( _RAC_RFBIASCTRL_RFBIASLDOVREFTRIM_vref_v0p963 << 16)

#define	RAC_RFBIASCTRL_RFBIASLDOVREFTRIM_vref_v0p975 ( _RAC_RFBIASCTRL_RFBIASLDOVREFTRIM_vref_v0p975 << 16)

#define	RAC_RFBIASCTRL_RFBIASLDOVREFTRIM_vref_v0p988 ( _RAC_RFBIASCTRL_RFBIASLDOVREFTRIM_vref_v0p988 << 16)

#define	RAC_RFBIASCTRL_RFBIASNONFLASHMODE (0x1UL << 2)

#define	RAC_RFBIASCTRL_RFBIASNONFLASHMODE_DEFAULT ( _RAC_RFBIASCTRL_RFBIASNONFLASHMODE_DEFAULT << 2)

#define	RAC_RFBIASCTRL_RFBIASNONFLASHMODE_flash_process ( _RAC_RFBIASCTRL_RFBIASNONFLASHMODE_flash_process << 2)

#define	RAC_RFBIASCTRL_RFBIASNONFLASHMODE_non_flash_process ( _RAC_RFBIASCTRL_RFBIASNONFLASHMODE_non_flash_process << 2)

#define	RAC_RFBIASCTRL_RFBIASSTARTUPCORE (0x1UL << 3)

#define	RAC_RFBIASCTRL_RFBIASSTARTUPCORE_DEFAULT ( _RAC_RFBIASCTRL_RFBIASSTARTUPCORE_DEFAULT << 3)

#define	RAC_RFBIASCTRL_RFBIASSTARTUPCORE_default ( _RAC_RFBIASCTRL_RFBIASSTARTUPCORE_default << 3)

#define	RAC_RFBIASCTRL_RFBIASSTARTUPCORE_force_start ( _RAC_RFBIASCTRL_RFBIASSTARTUPCORE_force_start << 3)

#define	RAC_RFBIASCTRL_RFBIASSTARTUPSUPPLY (0x1UL << 4)

#define	RAC_RFBIASCTRL_RFBIASSTARTUPSUPPLY_DEFAULT ( _RAC_RFBIASCTRL_RFBIASSTARTUPSUPPLY_DEFAULT << 4)

#define	RAC_RFBIASCTRL_RFBIASSTARTUPSUPPLY_default ( _RAC_RFBIASCTRL_RFBIASSTARTUPSUPPLY_default << 4)

#define	RAC_RFBIASCTRL_RFBIASSTARTUPSUPPLY_forc_start ( _RAC_RFBIASCTRL_RFBIASSTARTUPSUPPLY_forc_start << 4)

#define	RAC_RFPATHEN1_LNAMIXEN0DBMPA1 (0x1UL << 0)

#define	RAC_RFPATHEN1_LNAMIXEN0DBMPA1_DEFAULT ( _RAC_RFPATHEN1_LNAMIXEN0DBMPA1_DEFAULT << 0)

#define	RAC_RFPATHEN1_LNAMIXEN0DBMPA1_disable ( _RAC_RFPATHEN1_LNAMIXEN0DBMPA1_disable << 0)

#define	RAC_RFPATHEN1_LNAMIXEN0DBMPA1_enable ( _RAC_RFPATHEN1_LNAMIXEN0DBMPA1_enable << 0)

#define	RAC_RFPATHEN1_LNAMIXEN1 (0x1UL << 1)

#define	RAC_RFPATHEN1_LNAMIXEN1_DEFAULT ( _RAC_RFPATHEN1_LNAMIXEN1_DEFAULT << 1)

#define	RAC_RFPATHEN1_LNAMIXEN1_disable ( _RAC_RFPATHEN1_LNAMIXEN1_disable << 1)

#define	RAC_RFPATHEN1_LNAMIXEN1_enable ( _RAC_RFPATHEN1_LNAMIXEN1_enable << 1)

#define	RAC_RFPATHEN1_LNAMIXRFATTDCEN1 (0x1UL << 2)

#define	RAC_RFPATHEN1_LNAMIXRFATTDCEN1_DEFAULT ( _RAC_RFPATHEN1_LNAMIXRFATTDCEN1_DEFAULT << 2)

#define	RAC_RFPATHEN1_LNAMIXRFATTDCEN1_disable_dc ( _RAC_RFPATHEN1_LNAMIXRFATTDCEN1_disable_dc << 2)

#define	RAC_RFPATHEN1_LNAMIXRFATTDCEN1_enable_dc ( _RAC_RFPATHEN1_LNAMIXRFATTDCEN1_enable_dc << 2)

#define	RAC_RFPATHEN1_LNAMIXRFPKDENRF1 (0x1UL << 3)

#define	RAC_RFPATHEN1_LNAMIXRFPKDENRF1_DEFAULT ( _RAC_RFPATHEN1_LNAMIXRFPKDENRF1_DEFAULT << 3)

#define	RAC_RFPATHEN1_LNAMIXRFPKDENRF1_disable ( _RAC_RFPATHEN1_LNAMIXRFPKDENRF1_disable << 3)

#define	RAC_RFPATHEN1_LNAMIXRFPKDENRF1_enable_path1 ( _RAC_RFPATHEN1_LNAMIXRFPKDENRF1_enable_path1 << 3)

#define	RAC_RFPATHEN1_LNAMIXTRSW1 (0x1UL << 4)

#define	RAC_RFPATHEN1_LNAMIXTRSW1_DEFAULT ( _RAC_RFPATHEN1_LNAMIXTRSW1_DEFAULT << 4)

#define	RAC_RFPATHEN1_LNAMIXTRSW1_disabled ( _RAC_RFPATHEN1_LNAMIXTRSW1_disabled << 4)

#define	RAC_RFPATHEN1_LNAMIXTRSW1_enabled ( _RAC_RFPATHEN1_LNAMIXTRSW1_enabled << 4)

#define	RAC_RFPATHEN1_PAENANT1 (0x1UL << 5)

#define	RAC_RFPATHEN1_PAENANT1_DEFAULT ( _RAC_RFPATHEN1_PAENANT1_DEFAULT << 5)

#define	RAC_RFPATHEN1_PAENANT1_disable ( _RAC_RFPATHEN1_PAENANT1_disable << 5)

#define	RAC_RFPATHEN1_PAENANT1_enable ( _RAC_RFPATHEN1_PAENANT1_enable << 5)

#define	RAC_RFPATHEN1_PAENPA10DBM (0x1UL << 6)

#define	RAC_RFPATHEN1_PAENPA10DBM_DEFAULT ( _RAC_RFPATHEN1_PAENPA10DBM_DEFAULT << 6)

#define	RAC_RFPATHEN1_PAENPA10DBM_disable ( _RAC_RFPATHEN1_PAENPA10DBM_disable << 6)

#define	RAC_RFPATHEN1_PAENPA10DBM_enable ( _RAC_RFPATHEN1_PAENPA10DBM_enable << 6)

#define	RAC_RFPATHEN1_PAENPAPREDRV10DBM (0x1UL << 7)

#define	RAC_RFPATHEN1_PAENPAPREDRV10DBM_DEFAULT ( _RAC_RFPATHEN1_PAENPAPREDRV10DBM_DEFAULT << 7)

#define	RAC_RFPATHEN1_PAENPAPREDRV10DBM_disable ( _RAC_RFPATHEN1_PAENPAPREDRV10DBM_disable << 7)

#define	RAC_RFPATHEN1_PAENPAPREDRV10DBM_enable ( _RAC_RFPATHEN1_PAENPAPREDRV10DBM_enable << 7)

#define	RAC_RFPATHEN2_LNAMIXEN0DBMPA2 (0x1UL << 0)

#define	RAC_RFPATHEN2_LNAMIXEN0DBMPA2_DEFAULT ( _RAC_RFPATHEN2_LNAMIXEN0DBMPA2_DEFAULT << 0)

#define	RAC_RFPATHEN2_LNAMIXEN0DBMPA2_disable ( _RAC_RFPATHEN2_LNAMIXEN0DBMPA2_disable << 0)

#define	RAC_RFPATHEN2_LNAMIXEN0DBMPA2_enable ( _RAC_RFPATHEN2_LNAMIXEN0DBMPA2_enable << 0)

#define	RAC_RFPATHEN2_LNAMIXEN2 (0x1UL << 1)

#define	RAC_RFPATHEN2_LNAMIXEN2_DEFAULT ( _RAC_RFPATHEN2_LNAMIXEN2_DEFAULT << 1)

#define	RAC_RFPATHEN2_LNAMIXEN2_disable ( _RAC_RFPATHEN2_LNAMIXEN2_disable << 1)

#define	RAC_RFPATHEN2_LNAMIXEN2_enable ( _RAC_RFPATHEN2_LNAMIXEN2_enable << 1)

#define	RAC_RFPATHEN2_LNAMIXRFATTDCEN2 (0x1UL << 2)

#define	RAC_RFPATHEN2_LNAMIXRFATTDCEN2_DEFAULT ( _RAC_RFPATHEN2_LNAMIXRFATTDCEN2_DEFAULT << 2)

#define	RAC_RFPATHEN2_LNAMIXRFATTDCEN2_disable ( _RAC_RFPATHEN2_LNAMIXRFATTDCEN2_disable << 2)

#define	RAC_RFPATHEN2_LNAMIXRFATTDCEN2_enable ( _RAC_RFPATHEN2_LNAMIXRFATTDCEN2_enable << 2)

#define	RAC_RFPATHEN2_LNAMIXRFPKDENRF2 (0x1UL << 3)

#define	RAC_RFPATHEN2_LNAMIXRFPKDENRF2_DEFAULT ( _RAC_RFPATHEN2_LNAMIXRFPKDENRF2_DEFAULT << 3)

#define	RAC_RFPATHEN2_LNAMIXRFPKDENRF2_disable ( _RAC_RFPATHEN2_LNAMIXRFPKDENRF2_disable << 3)

#define	RAC_RFPATHEN2_LNAMIXRFPKDENRF2_enable_path2 ( _RAC_RFPATHEN2_LNAMIXRFPKDENRF2_enable_path2 << 3)

#define	RAC_RFPATHEN2_LNAMIXTRSW2 (0x1UL << 4)

#define	RAC_RFPATHEN2_LNAMIXTRSW2_DEFAULT ( _RAC_RFPATHEN2_LNAMIXTRSW2_DEFAULT << 4)

#define	RAC_RFPATHEN2_LNAMIXTRSW2_disable ( _RAC_RFPATHEN2_LNAMIXTRSW2_disable << 4)

#define	RAC_RFPATHEN2_LNAMIXTRSW2_enable ( _RAC_RFPATHEN2_LNAMIXTRSW2_enable << 4)

#define	RAC_RFPATHEN2_PAENANT2 (0x1UL << 5)

#define	RAC_RFPATHEN2_PAENANT2_DEFAULT ( _RAC_RFPATHEN2_PAENANT2_DEFAULT << 5)

#define	RAC_RFPATHEN2_PAENANT2_disable ( _RAC_RFPATHEN2_PAENANT2_disable << 5)

#define	RAC_RFPATHEN2_PAENANT2_enable ( _RAC_RFPATHEN2_PAENANT2_enable << 5)

#define	RAC_RFPATHEN2_PAENPA20DBM (0x1UL << 6)

#define	RAC_RFPATHEN2_PAENPA20DBM_DEFAULT ( _RAC_RFPATHEN2_PAENPA20DBM_DEFAULT << 6)

#define	RAC_RFPATHEN2_PAENPA20DBM_disable ( _RAC_RFPATHEN2_PAENPA20DBM_disable << 6)

#define	RAC_RFPATHEN2_PAENPA20DBM_enable ( _RAC_RFPATHEN2_PAENPA20DBM_enable << 6)

#define	RAC_RFPATHEN2_PAENPAPREDRV20DBM (0x1UL << 7)

#define	RAC_RFPATHEN2_PAENPAPREDRV20DBM_DEFAULT ( _RAC_RFPATHEN2_PAENPAPREDRV20DBM_DEFAULT << 7)

#define	RAC_RFPATHEN2_PAENPAPREDRV20DBM_disable ( _RAC_RFPATHEN2_PAENPAPREDRV20DBM_disable << 7)

#define	RAC_RFPATHEN2_PAENPAPREDRV20DBM_enable ( _RAC_RFPATHEN2_PAENPAPREDRV20DBM_enable << 7)

#define	RAC_RX_IFADCCAPRESET (0x1UL << 0)

#define	RAC_RX_IFADCCAPRESET_cap_reset_disable ( _RAC_RX_IFADCCAPRESET_cap_reset_disable << 0)

#define	RAC_RX_IFADCCAPRESET_cap_reset_enable ( _RAC_RX_IFADCCAPRESET_cap_reset_enable << 0)

#define	RAC_RX_IFADCCAPRESET_DEFAULT ( _RAC_RX_IFADCCAPRESET_DEFAULT << 0)

#define	RAC_RX_IFADCENLDOSERIES (0x1UL << 1)

#define	RAC_RX_IFADCENLDOSERIES_DEFAULT ( _RAC_RX_IFADCENLDOSERIES_DEFAULT << 1)

#define	RAC_RX_IFADCENLDOSERIES_series_ldo_disable ( _RAC_RX_IFADCENLDOSERIES_series_ldo_disable << 1)

#define	RAC_RX_IFADCENLDOSERIES_series_ldo_enable ( _RAC_RX_IFADCENLDOSERIES_series_ldo_enable << 1)

#define	RAC_RX_IFADCENLDOSHUNT (0x1UL << 2)

#define	RAC_RX_IFADCENLDOSHUNT_DEFAULT ( _RAC_RX_IFADCENLDOSHUNT_DEFAULT << 2)

#define	RAC_RX_IFADCENLDOSHUNT_shunt_ldo_disable ( _RAC_RX_IFADCENLDOSHUNT_shunt_ldo_disable << 2)

#define	RAC_RX_IFADCENLDOSHUNT_shunt_ldo_enable ( _RAC_RX_IFADCENLDOSHUNT_shunt_ldo_enable << 2)

#define	RAC_RX_LNAMIXENRFPKD (0x1UL << 3)

#define	RAC_RX_LNAMIXENRFPKD_DEFAULT ( _RAC_RX_LNAMIXENRFPKD_DEFAULT << 3)

#define	RAC_RX_LNAMIXENRFPKD_disable ( _RAC_RX_LNAMIXENRFPKD_disable << 3)

#define	RAC_RX_LNAMIXENRFPKD_enable ( _RAC_RX_LNAMIXENRFPKD_enable << 3)

#define	RAC_RX_LNAMIXLDOLOWCUR (0x1UL << 4)

#define	RAC_RX_LNAMIXLDOLOWCUR_DEFAULT ( _RAC_RX_LNAMIXLDOLOWCUR_DEFAULT << 4)

#define	RAC_RX_LNAMIXLDOLOWCUR_low_current_mode ( _RAC_RX_LNAMIXLDOLOWCUR_low_current_mode << 4)

#define	RAC_RX_LNAMIXLDOLOWCUR_regular_mode ( _RAC_RX_LNAMIXLDOLOWCUR_regular_mode << 4)

#define	RAC_RX_LNAMIXREGLOADEN (0x1UL << 5)

#define	RAC_RX_LNAMIXREGLOADEN_DEFAULT ( _RAC_RX_LNAMIXREGLOADEN_DEFAULT << 5)

#define	RAC_RX_LNAMIXREGLOADEN_disable_resistor ( _RAC_RX_LNAMIXREGLOADEN_disable_resistor << 5)

#define	RAC_RX_LNAMIXREGLOADEN_enable_resistor ( _RAC_RX_LNAMIXREGLOADEN_enable_resistor << 5)

#define	RAC_RX_PGAENLDO (0x1UL << 6)

#define	RAC_RX_PGAENLDO_DEFAULT ( _RAC_RX_PGAENLDO_DEFAULT << 6)

#define	RAC_RX_PGAENLDO_disable_ldo ( _RAC_RX_PGAENLDO_disable_ldo << 6)

#define	RAC_RX_PGAENLDO_enable_ldo ( _RAC_RX_PGAENLDO_enable_ldo << 6)

#define	RAC_RX_SYCHPBIASTRIMBUF (0x1UL << 7)

#define	RAC_RX_SYCHPBIASTRIMBUF_DEFAULT ( _RAC_RX_SYCHPBIASTRIMBUF_DEFAULT << 7)

#define	RAC_RX_SYCHPBIASTRIMBUF_i_tail_10u ( _RAC_RX_SYCHPBIASTRIMBUF_i_tail_10u << 7)

#define	RAC_RX_SYCHPBIASTRIMBUF_i_tail_20u ( _RAC_RX_SYCHPBIASTRIMBUF_i_tail_20u << 7)

#define	RAC_RX_SYCHPQNC3EN (0x1UL << 8)

#define	RAC_RX_SYCHPQNC3EN_DEFAULT ( _RAC_RX_SYCHPQNC3EN_DEFAULT << 8)

#define	RAC_RX_SYCHPQNC3EN_qnc_2 ( _RAC_RX_SYCHPQNC3EN_qnc_2 << 8)

#define	RAC_RX_SYCHPQNC3EN_qnc_3 ( _RAC_RX_SYCHPQNC3EN_qnc_3 << 8)

#define	RAC_RX_SYMMDMODE_DEFAULT ( _RAC_RX_SYMMDMODE_DEFAULT << 9)

#define	RAC_RX_SYMMDMODE_notuse_5 ( _RAC_RX_SYMMDMODE_notuse_5 << 9)

#define	RAC_RX_SYMMDMODE_notuse_6 ( _RAC_RX_SYMMDMODE_notuse_6 << 9)

#define	RAC_RX_SYMMDMODE_notuse_7 ( _RAC_RX_SYMMDMODE_notuse_7 << 9)

#define	RAC_RX_SYMMDMODE_qnc_dsm2 ( _RAC_RX_SYMMDMODE_qnc_dsm2 << 9)

#define	RAC_RX_SYMMDMODE_qnc_dsm3 ( _RAC_RX_SYMMDMODE_qnc_dsm3 << 9)

#define	RAC_RX_SYMMDMODE_rx_w_swctrl ( _RAC_RX_SYMMDMODE_rx_w_swctrl << 9)

#define	RAC_RX_SYMMDMODE_rx_wo_swctrl ( _RAC_RX_SYMMDMODE_rx_wo_swctrl << 9)

#define	RAC_RX_SYMMDMODE_rxlp_wo_swctrl ( _RAC_RX_SYMMDMODE_rxlp_wo_swctrl << 9)

#define	RAC_RX_SYPFDCHPLPEN (0x1UL << 12)

#define	RAC_RX_SYPFDCHPLPEN_DEFAULT ( _RAC_RX_SYPFDCHPLPEN_DEFAULT << 12)

#define	RAC_RX_SYPFDCHPLPEN_disable ( _RAC_RX_SYPFDCHPLPEN_disable << 12)

#define	RAC_RX_SYPFDCHPLPEN_enable ( _RAC_RX_SYPFDCHPLPEN_enable << 12)

#define	RAC_RX_SYPFDFPWEN (0x1UL << 13)

#define	RAC_RX_SYPFDFPWEN_DEFAULT ( _RAC_RX_SYPFDFPWEN_DEFAULT << 13)

#define	RAC_RX_SYPFDFPWEN_disable ( _RAC_RX_SYPFDFPWEN_disable << 13)

#define	RAC_RX_SYPFDFPWEN_enable ( _RAC_RX_SYPFDFPWEN_enable << 13)

#define	RAC_RXENSRCEN_CHANNELBUSYEN (0x1UL << 8)

#define	RAC_RXENSRCEN_CHANNELBUSYEN_DEFAULT ( _RAC_RXENSRCEN_CHANNELBUSYEN_DEFAULT << 8)

#define	RAC_RXENSRCEN_DEMODRXREQEN (0x1UL << 12)

#define	RAC_RXENSRCEN_DEMODRXREQEN_DEFAULT ( _RAC_RXENSRCEN_DEMODRXREQEN_DEFAULT << 12)

#define	RAC_RXENSRCEN_FRAMEDETEN (0x1UL << 11)

#define	RAC_RXENSRCEN_FRAMEDETEN_DEFAULT ( _RAC_RXENSRCEN_FRAMEDETEN_DEFAULT << 11)

#define	RAC_RXENSRCEN_PREDETEN (0x1UL << 10)

#define	RAC_RXENSRCEN_PREDETEN_DEFAULT ( _RAC_RXENSRCEN_PREDETEN_DEFAULT << 10)

#define	RAC_RXENSRCEN_PRSRXEN (0x1UL << 13)

#define	RAC_RXENSRCEN_PRSRXEN_DEFAULT ( _RAC_RXENSRCEN_PRSRXEN_DEFAULT << 13)

#define	RAC_RXENSRCEN_SWRXEN_DEFAULT ( _RAC_RXENSRCEN_SWRXEN_DEFAULT << 0)

#define	RAC_RXENSRCEN_TIMDETEN (0x1UL << 9)

#define	RAC_RXENSRCEN_TIMDETEN_DEFAULT ( _RAC_RXENSRCEN_TIMDETEN_DEFAULT << 9)

#define	RAC_SCRATCH0_SCRATCH0_DEFAULT ( _RAC_SCRATCH0_SCRATCH0_DEFAULT << 0)

#define	RAC_SCRATCH1_SCRATCH1_DEFAULT ( _RAC_SCRATCH1_SCRATCH1_DEFAULT << 0)

#define	RAC_SCRATCH2_SCRATCH2_DEFAULT ( _RAC_SCRATCH2_SCRATCH2_DEFAULT << 0)

#define	RAC_SCRATCH3_SCRATCH3_DEFAULT ( _RAC_SCRATCH3_SCRATCH3_DEFAULT << 0)

#define	RAC_SCRATCH4_SCRATCH4_DEFAULT ( _RAC_SCRATCH4_SCRATCH4_DEFAULT << 0)

#define	RAC_SCRATCH5_SCRATCH5_DEFAULT ( _RAC_SCRATCH5_SCRATCH5_DEFAULT << 0)

#define	RAC_SCRATCH6_SCRATCH6_DEFAULT ( _RAC_SCRATCH6_SCRATCH6_DEFAULT << 0)

#define	RAC_SCRATCH7_SCRATCH7_DEFAULT ( _RAC_SCRATCH7_SCRATCH7_DEFAULT << 0)

#define	RAC_SEQCMD_ABORT (0x1UL << 5)

#define	RAC_SEQCMD_ABORT_DEFAULT ( _RAC_SEQCMD_ABORT_DEFAULT << 5)

#define	RAC_SEQCMD_ABORTENCLEAR (0x1UL << 7)

#define	RAC_SEQCMD_ABORTENCLEAR_DEFAULT ( _RAC_SEQCMD_ABORTENCLEAR_DEFAULT << 7)

#define	RAC_SEQCMD_ABORTENSET (0x1UL << 6)

#define	RAC_SEQCMD_ABORTENSET_DEFAULT ( _RAC_SEQCMD_ABORTENSET_DEFAULT << 6)

#define	RAC_SEQCMD_BKPTDIS (0x1UL << 4)

#define	RAC_SEQCMD_BKPTDIS_DEFAULT ( _RAC_SEQCMD_BKPTDIS_DEFAULT << 4)

#define	RAC_SEQCMD_BKPTEN (0x1UL << 3)

#define	RAC_SEQCMD_BKPTEN_DEFAULT ( _RAC_SEQCMD_BKPTEN_DEFAULT << 3)

#define	RAC_SEQCMD_HALT (0x1UL << 0)

#define	RAC_SEQCMD_HALT_DEFAULT ( _RAC_SEQCMD_HALT_DEFAULT << 0)

#define	RAC_SEQCMD_RESUME (0x1UL << 2)

#define	RAC_SEQCMD_RESUME_DEFAULT ( _RAC_SEQCMD_RESUME_DEFAULT << 2)

#define	RAC_SEQCMD_STEP (0x1UL << 1)

#define	RAC_SEQCMD_STEP_DEFAULT ( _RAC_SEQCMD_STEP_DEFAULT << 1)

#define	RAC_SEQCTRL_COMPACT (0x1UL << 0)

#define	RAC_SEQCTRL_COMPACT_CONTINUE ( _RAC_SEQCTRL_COMPACT_CONTINUE << 0)

#define	RAC_SEQCTRL_COMPACT_DEFAULT ( _RAC_SEQCTRL_COMPACT_DEFAULT << 0)

#define	RAC_SEQCTRL_COMPACT_WRAP ( _RAC_SEQCTRL_COMPACT_WRAP << 0)

#define	RAC_SEQCTRL_COMPINVALMODE_COMPEVENT ( _RAC_SEQCTRL_COMPINVALMODE_COMPEVENT << 1)

#define	RAC_SEQCTRL_COMPINVALMODE_DEFAULT ( _RAC_SEQCTRL_COMPINVALMODE_DEFAULT << 1)

#define	RAC_SEQCTRL_COMPINVALMODE_NEVER ( _RAC_SEQCTRL_COMPINVALMODE_NEVER << 1)

#define	RAC_SEQCTRL_COMPINVALMODE_STATECHANGE ( _RAC_SEQCTRL_COMPINVALMODE_STATECHANGE << 1)

#define	RAC_SEQCTRL_COMPINVALMODE_STATECOMP ( _RAC_SEQCTRL_COMPINVALMODE_STATECOMP << 1)

#define	RAC_SEQCTRL_CPUHALTREQEN (0x1UL << 11)

#define	RAC_SEQCTRL_CPUHALTREQEN_DEFAULT ( _RAC_SEQCTRL_CPUHALTREQEN_DEFAULT << 11)

#define	RAC_SEQCTRL_CPUHALTREQEN_X0 ( _RAC_SEQCTRL_CPUHALTREQEN_X0 << 11)

#define	RAC_SEQCTRL_CPUHALTREQEN_X1 ( _RAC_SEQCTRL_CPUHALTREQEN_X1 << 11)

#define	RAC_SEQCTRL_SEQHALTUPONCPUHALTEN (0x1UL << 12)

#define	RAC_SEQCTRL_SEQHALTUPONCPUHALTEN_DEFAULT ( _RAC_SEQCTRL_SEQHALTUPONCPUHALTEN_DEFAULT << 12)

#define	RAC_SEQCTRL_SEQHALTUPONCPUHALTEN_X0 ( _RAC_SEQCTRL_SEQHALTUPONCPUHALTEN_X0 << 12)

#define	RAC_SEQCTRL_SEQHALTUPONCPUHALTEN_X1 ( _RAC_SEQCTRL_SEQHALTUPONCPUHALTEN_X1 << 12)

#define	RAC_SEQCTRL_STIMERDEBUGRUN (0x1UL << 10)

#define	RAC_SEQCTRL_STIMERDEBUGRUN_DEFAULT ( _RAC_SEQCTRL_STIMERDEBUGRUN_DEFAULT << 10)

#define	RAC_SEQCTRL_STIMERDEBUGRUN_X0 ( _RAC_SEQCTRL_STIMERDEBUGRUN_X0 << 10)

#define	RAC_SEQCTRL_STIMERDEBUGRUN_X1 ( _RAC_SEQCTRL_STIMERDEBUGRUN_X1 << 10)

#define	RAC_SEQSTATUS_ABORTEN (0x1UL << 10)

#define	RAC_SEQSTATUS_ABORTEN_DEFAULT ( _RAC_SEQSTATUS_ABORTEN_DEFAULT << 10)

#define	RAC_SEQSTATUS_ABORTEN_X0 ( _RAC_SEQSTATUS_ABORTEN_X0 << 10)

#define	RAC_SEQSTATUS_ABORTEN_X1 ( _RAC_SEQSTATUS_ABORTEN_X1 << 10)

#define	RAC_SEQSTATUS_BKPT (0x1UL << 1)

#define	RAC_SEQSTATUS_BKPT_DEFAULT ( _RAC_SEQSTATUS_BKPT_DEFAULT << 1)

#define	RAC_SEQSTATUS_CARRY (0x1UL << 8)

#define	RAC_SEQSTATUS_CARRY_DEFAULT ( _RAC_SEQSTATUS_CARRY_DEFAULT << 8)

#define	RAC_SEQSTATUS_DONE (0x1UL << 4)

#define	RAC_SEQSTATUS_DONE_DEFAULT ( _RAC_SEQSTATUS_DONE_DEFAULT << 4)

#define	RAC_SEQSTATUS_NEG (0x1UL << 5)

#define	RAC_SEQSTATUS_NEG_DEFAULT ( _RAC_SEQSTATUS_NEG_DEFAULT << 5)

#define	RAC_SEQSTATUS_POS (0x1UL << 6)

#define	RAC_SEQSTATUS_POS_DEFAULT ( _RAC_SEQSTATUS_POS_DEFAULT << 6)

#define	RAC_SEQSTATUS_STOPPED (0x1UL << 0)

#define	RAC_SEQSTATUS_STOPPED_DEFAULT ( _RAC_SEQSTATUS_STOPPED_DEFAULT << 0)

#define	RAC_SEQSTATUS_WAITING (0x1UL << 2)

#define	RAC_SEQSTATUS_WAITING_DEFAULT ( _RAC_SEQSTATUS_WAITING_DEFAULT << 2)

#define	RAC_SEQSTATUS_WAITMODE (0x1UL << 3)

#define	RAC_SEQSTATUS_WAITMODE_ALL ( _RAC_SEQSTATUS_WAITMODE_ALL << 3)

#define	RAC_SEQSTATUS_WAITMODE_ANY ( _RAC_SEQSTATUS_WAITMODE_ANY << 3)

#define	RAC_SEQSTATUS_WAITMODE_DEFAULT ( _RAC_SEQSTATUS_WAITMODE_DEFAULT << 3)

#define	RAC_SEQSTATUS_ZERO (0x1UL << 7)

#define	RAC_SEQSTATUS_ZERO_DEFAULT ( _RAC_SEQSTATUS_ZERO_DEFAULT << 7)

#define	RAC_SR0_SR0_DEFAULT ( _RAC_SR0_SR0_DEFAULT << 0)

#define	RAC_SR1_SR1_DEFAULT ( _RAC_SR1_SR1_DEFAULT << 0)

#define	RAC_SR2_SR2_DEFAULT ( _RAC_SR2_SR2_DEFAULT << 0)

#define	RAC_SR3_SR3_DEFAULT ( _RAC_SR3_SR3_DEFAULT << 0)

#define	RAC_STATUS2_PREVSTATE1_DEFAULT ( _RAC_STATUS2_PREVSTATE1_DEFAULT << 0)

#define	RAC_STATUS2_PREVSTATE1_OFF ( _RAC_STATUS2_PREVSTATE1_OFF << 0)

#define	RAC_STATUS2_PREVSTATE1_RX2RX ( _RAC_STATUS2_PREVSTATE1_RX2RX << 0)

#define	RAC_STATUS2_PREVSTATE1_RX2TX ( _RAC_STATUS2_PREVSTATE1_RX2TX << 0)

#define	RAC_STATUS2_PREVSTATE1_RXFRAME ( _RAC_STATUS2_PREVSTATE1_RXFRAME << 0)

#define	RAC_STATUS2_PREVSTATE1_RXOVERFLOW ( _RAC_STATUS2_PREVSTATE1_RXOVERFLOW << 0)

#define	RAC_STATUS2_PREVSTATE1_RXPD ( _RAC_STATUS2_PREVSTATE1_RXPD << 0)

#define	RAC_STATUS2_PREVSTATE1_RXSEARCH ( _RAC_STATUS2_PREVSTATE1_RXSEARCH << 0)

#define	RAC_STATUS2_PREVSTATE1_RXWARM ( _RAC_STATUS2_PREVSTATE1_RXWARM << 0)

#define	RAC_STATUS2_PREVSTATE1_SHUTDOWN ( _RAC_STATUS2_PREVSTATE1_SHUTDOWN << 0)

#define	RAC_STATUS2_PREVSTATE1_TX ( _RAC_STATUS2_PREVSTATE1_TX << 0)

#define	RAC_STATUS2_PREVSTATE1_TX2RX ( _RAC_STATUS2_PREVSTATE1_TX2RX << 0)

#define	RAC_STATUS2_PREVSTATE1_TX2TX ( _RAC_STATUS2_PREVSTATE1_TX2TX << 0)

#define	RAC_STATUS2_PREVSTATE1_TXPD ( _RAC_STATUS2_PREVSTATE1_TXPD << 0)

#define	RAC_STATUS2_PREVSTATE1_TXWARM ( _RAC_STATUS2_PREVSTATE1_TXWARM << 0)

#define	RAC_STATUS2_PREVSTATE2_DEFAULT ( _RAC_STATUS2_PREVSTATE2_DEFAULT << 4)

#define	RAC_STATUS2_PREVSTATE2_OFF ( _RAC_STATUS2_PREVSTATE2_OFF << 4)

#define	RAC_STATUS2_PREVSTATE2_RX2RX ( _RAC_STATUS2_PREVSTATE2_RX2RX << 4)

#define	RAC_STATUS2_PREVSTATE2_RX2TX ( _RAC_STATUS2_PREVSTATE2_RX2TX << 4)

#define	RAC_STATUS2_PREVSTATE2_RXFRAME ( _RAC_STATUS2_PREVSTATE2_RXFRAME << 4)

#define	RAC_STATUS2_PREVSTATE2_RXOVERFLOW ( _RAC_STATUS2_PREVSTATE2_RXOVERFLOW << 4)

#define	RAC_STATUS2_PREVSTATE2_RXPD ( _RAC_STATUS2_PREVSTATE2_RXPD << 4)

#define	RAC_STATUS2_PREVSTATE2_RXSEARCH ( _RAC_STATUS2_PREVSTATE2_RXSEARCH << 4)

#define	RAC_STATUS2_PREVSTATE2_RXWARM ( _RAC_STATUS2_PREVSTATE2_RXWARM << 4)

#define	RAC_STATUS2_PREVSTATE2_SHUTDOWN ( _RAC_STATUS2_PREVSTATE2_SHUTDOWN << 4)

#define	RAC_STATUS2_PREVSTATE2_TX ( _RAC_STATUS2_PREVSTATE2_TX << 4)

#define	RAC_STATUS2_PREVSTATE2_TX2RX ( _RAC_STATUS2_PREVSTATE2_TX2RX << 4)

#define	RAC_STATUS2_PREVSTATE2_TX2TX ( _RAC_STATUS2_PREVSTATE2_TX2TX << 4)

#define	RAC_STATUS2_PREVSTATE2_TXPD ( _RAC_STATUS2_PREVSTATE2_TXPD << 4)

#define	RAC_STATUS2_PREVSTATE2_TXWARM ( _RAC_STATUS2_PREVSTATE2_TXWARM << 4)

#define	RAC_STATUS2_PREVSTATE3_DEFAULT ( _RAC_STATUS2_PREVSTATE3_DEFAULT << 8)

#define	RAC_STATUS2_PREVSTATE3_OFF ( _RAC_STATUS2_PREVSTATE3_OFF << 8)

#define	RAC_STATUS2_PREVSTATE3_RX2RX ( _RAC_STATUS2_PREVSTATE3_RX2RX << 8)

#define	RAC_STATUS2_PREVSTATE3_RX2TX ( _RAC_STATUS2_PREVSTATE3_RX2TX << 8)

#define	RAC_STATUS2_PREVSTATE3_RXFRAME ( _RAC_STATUS2_PREVSTATE3_RXFRAME << 8)

#define	RAC_STATUS2_PREVSTATE3_RXOVERFLOW ( _RAC_STATUS2_PREVSTATE3_RXOVERFLOW << 8)

#define	RAC_STATUS2_PREVSTATE3_RXPD ( _RAC_STATUS2_PREVSTATE3_RXPD << 8)

#define	RAC_STATUS2_PREVSTATE3_RXSEARCH ( _RAC_STATUS2_PREVSTATE3_RXSEARCH << 8)

#define	RAC_STATUS2_PREVSTATE3_RXWARM ( _RAC_STATUS2_PREVSTATE3_RXWARM << 8)

#define	RAC_STATUS2_PREVSTATE3_SHUTDOWN ( _RAC_STATUS2_PREVSTATE3_SHUTDOWN << 8)

#define	RAC_STATUS2_PREVSTATE3_TX ( _RAC_STATUS2_PREVSTATE3_TX << 8)

#define	RAC_STATUS2_PREVSTATE3_TX2RX ( _RAC_STATUS2_PREVSTATE3_TX2RX << 8)

#define	RAC_STATUS2_PREVSTATE3_TX2TX ( _RAC_STATUS2_PREVSTATE3_TX2TX << 8)

#define	RAC_STATUS2_PREVSTATE3_TXPD ( _RAC_STATUS2_PREVSTATE3_TXPD << 8)

#define	RAC_STATUS2_PREVSTATE3_TXWARM ( _RAC_STATUS2_PREVSTATE3_TXWARM << 8)

#define	RAC_STATUS_FORCESTATEACTIVE (0x1UL << 19)

#define	RAC_STATUS_FORCESTATEACTIVE_DEFAULT ( _RAC_STATUS_FORCESTATEACTIVE_DEFAULT << 19)

#define	RAC_STATUS_FORCESTATEACTIVE_X0 ( _RAC_STATUS_FORCESTATEACTIVE_X0 << 19)

#define	RAC_STATUS_FORCESTATEACTIVE_X1 ( _RAC_STATUS_FORCESTATEACTIVE_X1 << 19)

#define	RAC_STATUS_RXENS (0x1UL << 31)

#define	RAC_STATUS_RXENS_DEFAULT ( _RAC_STATUS_RXENS_DEFAULT << 31)

#define	RAC_STATUS_RXENS_X0 ( _RAC_STATUS_RXENS_X0 << 31)

#define	RAC_STATUS_RXENS_X1 ( _RAC_STATUS_RXENS_X1 << 31)

#define	RAC_STATUS_RXMASK_DEFAULT ( _RAC_STATUS_RXMASK_DEFAULT << 0)

#define	RAC_STATUS_STATE_DEFAULT ( _RAC_STATUS_STATE_DEFAULT << 24)

#define	RAC_STATUS_STATE_OFF ( _RAC_STATUS_STATE_OFF << 24)

#define	RAC_STATUS_STATE_RX2RX ( _RAC_STATUS_STATE_RX2RX << 24)

#define	RAC_STATUS_STATE_RX2TX ( _RAC_STATUS_STATE_RX2TX << 24)

#define	RAC_STATUS_STATE_RXFRAME ( _RAC_STATUS_STATE_RXFRAME << 24)

#define	RAC_STATUS_STATE_RXOVERFLOW ( _RAC_STATUS_STATE_RXOVERFLOW << 24)

#define	RAC_STATUS_STATE_RXPD ( _RAC_STATUS_STATE_RXPD << 24)

#define	RAC_STATUS_STATE_RXSEARCH ( _RAC_STATUS_STATE_RXSEARCH << 24)

#define	RAC_STATUS_STATE_RXWARM ( _RAC_STATUS_STATE_RXWARM << 24)

#define	RAC_STATUS_STATE_SHUTDOWN ( _RAC_STATUS_STATE_SHUTDOWN << 24)

#define	RAC_STATUS_STATE_TX ( _RAC_STATUS_STATE_TX << 24)

#define	RAC_STATUS_STATE_TX2RX ( _RAC_STATUS_STATE_TX2RX << 24)

#define	RAC_STATUS_STATE_TX2TX ( _RAC_STATUS_STATE_TX2TX << 24)

#define	RAC_STATUS_STATE_TXPD ( _RAC_STATUS_STATE_TXPD << 24)

#define	RAC_STATUS_STATE_TXWARM ( _RAC_STATUS_STATE_TXWARM << 24)

#define	RAC_STATUS_TXAFTERFRAMEACTIVE (0x1UL << 21)

#define	RAC_STATUS_TXAFTERFRAMEACTIVE_DEFAULT ( _RAC_STATUS_TXAFTERFRAMEACTIVE_DEFAULT << 21)

#define	RAC_STATUS_TXAFTERFRAMEACTIVE_X0 ( _RAC_STATUS_TXAFTERFRAMEACTIVE_X0 << 21)

#define	RAC_STATUS_TXAFTERFRAMEACTIVE_X1 ( _RAC_STATUS_TXAFTERFRAMEACTIVE_X1 << 21)

#define	RAC_STATUS_TXAFTERFRAMEPEND (0x1UL << 20)

#define	RAC_STATUS_TXAFTERFRAMEPEND_DEFAULT ( _RAC_STATUS_TXAFTERFRAMEPEND_DEFAULT << 20)

#define	RAC_STATUS_TXAFTERFRAMEPEND_X0 ( _RAC_STATUS_TXAFTERFRAMEPEND_X0 << 20)

#define	RAC_STATUS_TXAFTERFRAMEPEND_X1 ( _RAC_STATUS_TXAFTERFRAMEPEND_X1 << 20)

#define	RAC_STATUS_TXENS (0x1UL << 30)

#define	RAC_STATUS_TXENS_DEFAULT ( _RAC_STATUS_TXENS_DEFAULT << 30)

#define	RAC_STATUS_TXENS_X0 ( _RAC_STATUS_TXENS_X0 << 30)

#define	RAC_STATUS_TXENS_X1 ( _RAC_STATUS_TXENS_X1 << 30)

#define	RAC_STIMER_STIMER_DEFAULT ( _RAC_STIMER_STIMER_DEFAULT << 0)

#define	RAC_STIMERCOMP_STIMERCOMP_DEFAULT ( _RAC_STIMERCOMP_STIMERCOMP_DEFAULT << 0)

#define	RAC_SYCAL_SYHILOADCHPREG_DEFAULT ( _RAC_SYCAL_SYHILOADCHPREG_DEFAULT << 24)

#define	RAC_SYCAL_SYHILOADCHPREG_i_350uA ( _RAC_SYCAL_SYHILOADCHPREG_i_350uA << 24)

#define	RAC_SYCAL_SYHILOADCHPREG_i_500uA ( _RAC_SYCAL_SYHILOADCHPREG_i_500uA << 24)

#define	RAC_SYCAL_SYHILOADCHPREG_i_550uA ( _RAC_SYCAL_SYHILOADCHPREG_i_550uA << 24)

#define	RAC_SYCAL_SYHILOADCHPREG_i_700uA ( _RAC_SYCAL_SYHILOADCHPREG_i_700uA << 24)

#define	RAC_SYCAL_SYVCOMODEPKD (0x1UL << 8)

#define	RAC_SYCAL_SYVCOMODEPKD_DEFAULT ( _RAC_SYCAL_SYVCOMODEPKD_DEFAULT << 8)

#define	RAC_SYCAL_SYVCOMODEPKD_t_openloop_0 ( _RAC_SYCAL_SYVCOMODEPKD_t_openloop_0 << 8)

#define	RAC_SYCAL_SYVCOMODEPKD_t_pkdetect_1 ( _RAC_SYCAL_SYVCOMODEPKD_t_pkdetect_1 << 8)

#define	RAC_SYCAL_SYVCOMORECURRENT (0x1UL << 9)

#define	RAC_SYCAL_SYVCOMORECURRENT_DEFAULT ( _RAC_SYCAL_SYVCOMORECURRENT_DEFAULT << 9)

#define	RAC_SYCAL_SYVCOMORECURRENT_more_current_0 ( _RAC_SYCAL_SYVCOMORECURRENT_more_current_0 << 9)

#define	RAC_SYCAL_SYVCOMORECURRENT_more_current_1 ( _RAC_SYCAL_SYVCOMORECURRENT_more_current_1 << 9)

#define	RAC_SYCAL_SYVCOSLOWNOISEFILTER (0x1UL << 10)

#define	RAC_SYCAL_SYVCOSLOWNOISEFILTER_DEFAULT ( _RAC_SYCAL_SYVCOSLOWNOISEFILTER_DEFAULT << 10)

#define	RAC_SYCAL_SYVCOSLOWNOISEFILTER_slow_noise_filter_0 ( _RAC_SYCAL_SYVCOSLOWNOISEFILTER_slow_noise_filter_0 << 10)

#define	RAC_SYCAL_SYVCOSLOWNOISEFILTER_slow_noise_filter_1 ( _RAC_SYCAL_SYVCOSLOWNOISEFILTER_slow_noise_filter_1 << 10)

#define	RAC_SYCAL_SYVCOVCAPVCM_DEFAULT ( _RAC_SYCAL_SYVCOVCAPVCM_DEFAULT << 15)

#define	RAC_SYEN_SYCHPEN (0x1UL << 0)

#define	RAC_SYEN_SYCHPEN_DEFAULT ( _RAC_SYEN_SYCHPEN_DEFAULT << 0)

#define	RAC_SYEN_SYCHPEN_disable ( _RAC_SYEN_SYCHPEN_disable << 0)

#define	RAC_SYEN_SYCHPEN_enable ( _RAC_SYEN_SYCHPEN_enable << 0)

#define	RAC_SYEN_SYCHPLPEN (0x1UL << 1)

#define	RAC_SYEN_SYCHPLPEN_DEFAULT ( _RAC_SYEN_SYCHPLPEN_DEFAULT << 1)

#define	RAC_SYEN_SYCHPLPEN_disable ( _RAC_SYEN_SYCHPLPEN_disable << 1)

#define	RAC_SYEN_SYCHPLPEN_enable ( _RAC_SYEN_SYCHPLPEN_enable << 1)

#define	RAC_SYEN_SYENCHPREG (0x1UL << 2)

#define	RAC_SYEN_SYENCHPREG_DEFAULT ( _RAC_SYEN_SYENCHPREG_DEFAULT << 2)

#define	RAC_SYEN_SYENCHPREG_Disable ( _RAC_SYEN_SYENCHPREG_Disable << 2)

#define	RAC_SYEN_SYENCHPREG_Enable ( _RAC_SYEN_SYENCHPREG_Enable << 2)

#define	RAC_SYEN_SYENCHPREPLICA (0x1UL << 3)

#define	RAC_SYEN_SYENCHPREPLICA_DEFAULT ( _RAC_SYEN_SYENCHPREPLICA_DEFAULT << 3)

#define	RAC_SYEN_SYENCHPREPLICA_disable ( _RAC_SYEN_SYENCHPREPLICA_disable << 3)

#define	RAC_SYEN_SYENCHPREPLICA_enable ( _RAC_SYEN_SYENCHPREPLICA_enable << 3)

#define	RAC_SYEN_SYENMMDREG (0x1UL << 4)

#define	RAC_SYEN_SYENMMDREG_DEFAULT ( _RAC_SYEN_SYENMMDREG_DEFAULT << 4)

#define	RAC_SYEN_SYENMMDREG_Disable ( _RAC_SYEN_SYENMMDREG_Disable << 4)

#define	RAC_SYEN_SYENMMDREG_Enable ( _RAC_SYEN_SYENMMDREG_Enable << 4)

#define	RAC_SYEN_SYENMMDREPLICA1 (0x1UL << 5)

#define	RAC_SYEN_SYENMMDREPLICA1_DEFAULT ( _RAC_SYEN_SYENMMDREPLICA1_DEFAULT << 5)

#define	RAC_SYEN_SYENMMDREPLICA1_disable ( _RAC_SYEN_SYENMMDREPLICA1_disable << 5)

#define	RAC_SYEN_SYENMMDREPLICA1_enable ( _RAC_SYEN_SYENMMDREPLICA1_enable << 5)

#define	RAC_SYEN_SYENMMDREPLICA2 (0x1UL << 6)

#define	RAC_SYEN_SYENMMDREPLICA2_DEFAULT ( _RAC_SYEN_SYENMMDREPLICA2_DEFAULT << 6)

#define	RAC_SYEN_SYENMMDREPLICA2_Disable ( _RAC_SYEN_SYENMMDREPLICA2_Disable << 6)

#define	RAC_SYEN_SYENMMDREPLICA2_Enable ( _RAC_SYEN_SYENMMDREPLICA2_Enable << 6)

#define	RAC_SYEN_SYENVCOBIAS (0x1UL << 7)

#define	RAC_SYEN_SYENVCOBIAS_DEFAULT ( _RAC_SYEN_SYENVCOBIAS_DEFAULT << 7)

#define	RAC_SYEN_SYENVCOBIAS_en_vco_bias_0 ( _RAC_SYEN_SYENVCOBIAS_en_vco_bias_0 << 7)

#define	RAC_SYEN_SYENVCOBIAS_en_vco_bias_1 ( _RAC_SYEN_SYENVCOBIAS_en_vco_bias_1 << 7)

#define	RAC_SYEN_SYENVCOPFET (0x1UL << 8)

#define	RAC_SYEN_SYENVCOPFET_DEFAULT ( _RAC_SYEN_SYENVCOPFET_DEFAULT << 8)

#define	RAC_SYEN_SYENVCOPFET_en_vco_pfet_0 ( _RAC_SYEN_SYENVCOPFET_en_vco_pfet_0 << 8)

#define	RAC_SYEN_SYENVCOPFET_en_vco_pfet_1 ( _RAC_SYEN_SYENVCOPFET_en_vco_pfet_1 << 8)

#define	RAC_SYEN_SYENVCOREG (0x1UL << 9)

#define	RAC_SYEN_SYENVCOREG_DEFAULT ( _RAC_SYEN_SYENVCOREG_DEFAULT << 9)

#define	RAC_SYEN_SYENVCOREG_en_vco_reg_0 ( _RAC_SYEN_SYENVCOREG_en_vco_reg_0 << 9)

#define	RAC_SYEN_SYENVCOREG_en_vco_reg_1 ( _RAC_SYEN_SYENVCOREG_en_vco_reg_1 << 9)

#define	RAC_SYEN_SYLODIVEN (0x1UL << 10)

#define	RAC_SYEN_SYLODIVEN_DEFAULT ( _RAC_SYEN_SYLODIVEN_DEFAULT << 10)

#define	RAC_SYEN_SYLODIVEN_disable ( _RAC_SYEN_SYLODIVEN_disable << 10)

#define	RAC_SYEN_SYLODIVEN_enable ( _RAC_SYEN_SYLODIVEN_enable << 10)

#define	RAC_SYEN_SYLODIVLDOBIASEN (0x1UL << 11)

#define	RAC_SYEN_SYLODIVLDOBIASEN_DEFAULT ( _RAC_SYEN_SYLODIVLDOBIASEN_DEFAULT << 11)

#define	RAC_SYEN_SYLODIVLDOBIASEN_disable ( _RAC_SYEN_SYLODIVLDOBIASEN_disable << 11)

#define	RAC_SYEN_SYLODIVLDOBIASEN_enable ( _RAC_SYEN_SYLODIVLDOBIASEN_enable << 11)

#define	RAC_SYEN_SYLODIVLDOEN (0x1UL << 12)

#define	RAC_SYEN_SYLODIVLDOEN_DEFAULT ( _RAC_SYEN_SYLODIVLDOEN_DEFAULT << 12)

#define	RAC_SYEN_SYLODIVLDOEN_disable ( _RAC_SYEN_SYLODIVLDOEN_disable << 12)

#define	RAC_SYEN_SYLODIVLDOEN_enable ( _RAC_SYEN_SYLODIVLDOEN_enable << 12)

#define	RAC_SYEN_SYSTARTCHPREG (0x1UL << 13)

#define	RAC_SYEN_SYSTARTCHPREG_DEFAULT ( _RAC_SYEN_SYSTARTCHPREG_DEFAULT << 13)

#define	RAC_SYEN_SYSTARTCHPREG_fast_startup ( _RAC_SYEN_SYSTARTCHPREG_fast_startup << 13)

#define	RAC_SYEN_SYSTARTCHPREG_no_fast_startup ( _RAC_SYEN_SYSTARTCHPREG_no_fast_startup << 13)

#define	RAC_SYEN_SYSTARTMMDREG (0x1UL << 14)

#define	RAC_SYEN_SYSTARTMMDREG_DEFAULT ( _RAC_SYEN_SYSTARTMMDREG_DEFAULT << 14)

#define	RAC_SYEN_SYSTARTMMDREG_fast_startup ( _RAC_SYEN_SYSTARTMMDREG_fast_startup << 14)

#define	RAC_SYEN_SYSTARTMMDREG_no_fast_startup ( _RAC_SYEN_SYSTARTMMDREG_no_fast_startup << 14)

#define	RAC_SYLOEN_SYLODIVRLO12G4EN (0x1UL << 1)

#define	RAC_SYLOEN_SYLODIVRLO12G4EN_DEFAULT ( _RAC_SYLOEN_SYLODIVRLO12G4EN_DEFAULT << 1)

#define	RAC_SYLOEN_SYLODIVRLO12G4EN_disable ( _RAC_SYLOEN_SYLODIVRLO12G4EN_disable << 1)

#define	RAC_SYLOEN_SYLODIVRLO12G4EN_enable ( _RAC_SYLOEN_SYLODIVRLO12G4EN_enable << 1)

#define	RAC_SYLOEN_SYLODIVRLO22G4EN (0x1UL << 3)

#define	RAC_SYLOEN_SYLODIVRLO22G4EN_DEFAULT ( _RAC_SYLOEN_SYLODIVRLO22G4EN_DEFAULT << 3)

#define	RAC_SYLOEN_SYLODIVRLO22G4EN_disable ( _RAC_SYLOEN_SYLODIVRLO22G4EN_disable << 3)

#define	RAC_SYLOEN_SYLODIVRLO22G4EN_enable ( _RAC_SYLOEN_SYLODIVRLO22G4EN_enable << 3)

#define	RAC_SYLOEN_SYLODIVRLOADCCLK2G4EN (0x1UL << 0)

#define	RAC_SYLOEN_SYLODIVRLOADCCLK2G4EN_DEFAULT ( _RAC_SYLOEN_SYLODIVRLOADCCLK2G4EN_DEFAULT << 0)

#define	RAC_SYLOEN_SYLODIVRLOADCCLK2G4EN_disable ( _RAC_SYLOEN_SYLODIVRLOADCCLK2G4EN_disable << 0)

#define	RAC_SYLOEN_SYLODIVRLOADCCLK2G4EN_enable ( _RAC_SYLOEN_SYLODIVRLOADCCLK2G4EN_enable << 0)

#define	RAC_SYLOEN_SYLODIVTLO0DBM2G4AUXEN (0x1UL << 5)

#define	RAC_SYLOEN_SYLODIVTLO0DBM2G4AUXEN_DEFAULT ( _RAC_SYLOEN_SYLODIVTLO0DBM2G4AUXEN_DEFAULT << 5)

#define	RAC_SYLOEN_SYLODIVTLO0DBM2G4AUXEN_disable ( _RAC_SYLOEN_SYLODIVTLO0DBM2G4AUXEN_disable << 5)

#define	RAC_SYLOEN_SYLODIVTLO0DBM2G4AUXEN_enable ( _RAC_SYLOEN_SYLODIVTLO0DBM2G4AUXEN_enable << 5)

#define	RAC_SYLOEN_SYLODIVTLO0DBM2G4EN (0x1UL << 6)

#define	RAC_SYLOEN_SYLODIVTLO0DBM2G4EN_DEFAULT ( _RAC_SYLOEN_SYLODIVTLO0DBM2G4EN_DEFAULT << 6)

#define	RAC_SYLOEN_SYLODIVTLO0DBM2G4EN_disable ( _RAC_SYLOEN_SYLODIVTLO0DBM2G4EN_disable << 6)

#define	RAC_SYLOEN_SYLODIVTLO0DBM2G4EN_enable ( _RAC_SYLOEN_SYLODIVTLO0DBM2G4EN_enable << 6)

#define	RAC_SYLOEN_SYLODIVTLO20DBM2G4AUXEN (0x1UL << 9)

#define	RAC_SYLOEN_SYLODIVTLO20DBM2G4AUXEN_DEFAULT ( _RAC_SYLOEN_SYLODIVTLO20DBM2G4AUXEN_DEFAULT << 9)

#define	RAC_SYLOEN_SYLODIVTLO20DBM2G4AUXEN_disable ( _RAC_SYLOEN_SYLODIVTLO20DBM2G4AUXEN_disable << 9)

#define	RAC_SYLOEN_SYLODIVTLO20DBM2G4AUXEN_enable ( _RAC_SYLOEN_SYLODIVTLO20DBM2G4AUXEN_enable << 9)

#define	RAC_SYLOEN_SYLODIVTLO20DBM2G4EN (0x1UL << 10)

#define	RAC_SYLOEN_SYLODIVTLO20DBM2G4EN_DEFAULT ( _RAC_SYLOEN_SYLODIVTLO20DBM2G4EN_DEFAULT << 10)

#define	RAC_SYLOEN_SYLODIVTLO20DBM2G4EN_disable ( _RAC_SYLOEN_SYLODIVTLO20DBM2G4EN_disable << 10)

#define	RAC_SYLOEN_SYLODIVTLO20DBM2G4EN_enable ( _RAC_SYLOEN_SYLODIVTLO20DBM2G4EN_enable << 10)

#define	RAC_SYMMDCTRL_SYMMDDIVRSDIG_DEFAULT ( _RAC_SYMMDCTRL_SYMMDDIVRSDIG_DEFAULT << 1)

#define	RAC_SYMMDCTRL_SYMMDDIVRSDIG_Divideby1 ( _RAC_SYMMDCTRL_SYMMDDIVRSDIG_Divideby1 << 1)

#define	RAC_SYMMDCTRL_SYMMDDIVRSDIG_Divideby2 ( _RAC_SYMMDCTRL_SYMMDDIVRSDIG_Divideby2 << 1)

#define	RAC_SYMMDCTRL_SYMMDDIVRSDIG_Divideby4 ( _RAC_SYMMDCTRL_SYMMDDIVRSDIG_Divideby4 << 1)

#define	RAC_SYMMDCTRL_SYMMDDIVRSDIG_Divideby8 ( _RAC_SYMMDCTRL_SYMMDDIVRSDIG_Divideby8 << 1)

#define	RAC_SYMMDCTRL_SYMMDENRSDIG (0x1UL << 0)

#define	RAC_SYMMDCTRL_SYMMDENRSDIG_DEFAULT ( _RAC_SYMMDCTRL_SYMMDENRSDIG_DEFAULT << 0)

#define	RAC_SYMMDCTRL_SYMMDENRSDIG_disable ( _RAC_SYMMDCTRL_SYMMDENRSDIG_disable << 0)

#define	RAC_SYMMDCTRL_SYMMDENRSDIG_enable ( _RAC_SYMMDCTRL_SYMMDENRSDIG_enable << 0)

#define	RAC_SYNTHCTRL_MMDPOWERBALANCEDISABLE (0x1UL << 10)

#define	RAC_SYNTHCTRL_MMDPOWERBALANCEDISABLE_DEFAULT ( _RAC_SYNTHCTRL_MMDPOWERBALANCEDISABLE_DEFAULT << 10)

#define	RAC_SYNTHCTRL_MMDPOWERBALANCEDISABLE_DisablePowerBleed ( _RAC_SYNTHCTRL_MMDPOWERBALANCEDISABLE_DisablePowerBleed << 10)

#define	RAC_SYNTHCTRL_MMDPOWERBALANCEDISABLE_EnablePowerbleed ( _RAC_SYNTHCTRL_MMDPOWERBALANCEDISABLE_EnablePowerbleed << 10)

#define	RAC_SYNTHENCTRL_LPFBWSEL (0x1UL << 20)

#define	RAC_SYNTHENCTRL_LPFBWSEL_DEFAULT ( _RAC_SYNTHENCTRL_LPFBWSEL_DEFAULT << 20)

#define	RAC_SYNTHENCTRL_LPFBWSEL_LPFBWRX ( _RAC_SYNTHENCTRL_LPFBWSEL_LPFBWRX << 20)

#define	RAC_SYNTHENCTRL_LPFBWSEL_LPFBWTX ( _RAC_SYNTHENCTRL_LPFBWSEL_LPFBWTX << 20)

#define	RAC_SYNTHENCTRL_VCBUFEN (0x1UL << 7)

#define	RAC_SYNTHENCTRL_VCBUFEN_DEFAULT ( _RAC_SYNTHENCTRL_VCBUFEN_DEFAULT << 7)

#define	RAC_SYNTHENCTRL_VCBUFEN_Disabled ( _RAC_SYNTHENCTRL_VCBUFEN_Disabled << 7)

#define	RAC_SYNTHENCTRL_VCBUFEN_Enabled ( _RAC_SYNTHENCTRL_VCBUFEN_Enabled << 7)

#define	RAC_SYNTHENCTRL_VCOSTARTUP (0x1UL << 1)

#define	RAC_SYNTHENCTRL_VCOSTARTUP_DEFAULT ( _RAC_SYNTHENCTRL_VCOSTARTUP_DEFAULT << 1)

#define	RAC_SYNTHENCTRL_VCOSTARTUP_fast_start_up_0 ( _RAC_SYNTHENCTRL_VCOSTARTUP_fast_start_up_0 << 1)

#define	RAC_SYNTHENCTRL_VCOSTARTUP_fast_start_up_1 ( _RAC_SYNTHENCTRL_VCOSTARTUP_fast_start_up_1 << 1)

#define	RAC_SYNTHREGCTRL_CHPLDOVREFTRIM_DEFAULT ( _RAC_SYNTHREGCTRL_CHPLDOVREFTRIM_DEFAULT << 24)

#define	RAC_SYNTHREGCTRL_CHPLDOVREFTRIM_vref0p6000 ( _RAC_SYNTHREGCTRL_CHPLDOVREFTRIM_vref0p6000 << 24)

#define	RAC_SYNTHREGCTRL_CHPLDOVREFTRIM_vref0p6125 ( _RAC_SYNTHREGCTRL_CHPLDOVREFTRIM_vref0p6125 << 24)

#define	RAC_SYNTHREGCTRL_CHPLDOVREFTRIM_vref0p6250 ( _RAC_SYNTHREGCTRL_CHPLDOVREFTRIM_vref0p6250 << 24)

#define	RAC_SYNTHREGCTRL_CHPLDOVREFTRIM_vref0p6375 ( _RAC_SYNTHREGCTRL_CHPLDOVREFTRIM_vref0p6375 << 24)

#define	RAC_SYNTHREGCTRL_CHPLDOVREFTRIM_vref0p6500 ( _RAC_SYNTHREGCTRL_CHPLDOVREFTRIM_vref0p6500 << 24)

#define	RAC_SYNTHREGCTRL_CHPLDOVREFTRIM_vref0p6625 ( _RAC_SYNTHREGCTRL_CHPLDOVREFTRIM_vref0p6625 << 24)

#define	RAC_SYNTHREGCTRL_CHPLDOVREFTRIM_vref0p6750 ( _RAC_SYNTHREGCTRL_CHPLDOVREFTRIM_vref0p6750 << 24)

#define	RAC_SYNTHREGCTRL_CHPLDOVREFTRIM_vref0p6875 ( _RAC_SYNTHREGCTRL_CHPLDOVREFTRIM_vref0p6875 << 24)

#define	RAC_SYNTHREGCTRL_MMDLDOVREFTRIM_DEFAULT ( _RAC_SYNTHREGCTRL_MMDLDOVREFTRIM_DEFAULT << 10)

#define	RAC_SYNTHREGCTRL_MMDLDOVREFTRIM_vref0p6000 ( _RAC_SYNTHREGCTRL_MMDLDOVREFTRIM_vref0p6000 << 10)

#define	RAC_SYNTHREGCTRL_MMDLDOVREFTRIM_vref0p6125 ( _RAC_SYNTHREGCTRL_MMDLDOVREFTRIM_vref0p6125 << 10)

#define	RAC_SYNTHREGCTRL_MMDLDOVREFTRIM_vref0p6250 ( _RAC_SYNTHREGCTRL_MMDLDOVREFTRIM_vref0p6250 << 10)

#define	RAC_SYNTHREGCTRL_MMDLDOVREFTRIM_vref0p6375 ( _RAC_SYNTHREGCTRL_MMDLDOVREFTRIM_vref0p6375 << 10)

#define	RAC_SYNTHREGCTRL_MMDLDOVREFTRIM_vref0p6500 ( _RAC_SYNTHREGCTRL_MMDLDOVREFTRIM_vref0p6500 << 10)

#define	RAC_SYNTHREGCTRL_MMDLDOVREFTRIM_vref0p6625 ( _RAC_SYNTHREGCTRL_MMDLDOVREFTRIM_vref0p6625 << 10)

#define	RAC_SYNTHREGCTRL_MMDLDOVREFTRIM_vref0p6750 ( _RAC_SYNTHREGCTRL_MMDLDOVREFTRIM_vref0p6750 << 10)

#define	RAC_SYNTHREGCTRL_MMDLDOVREFTRIM_vref0p6875 ( _RAC_SYNTHREGCTRL_MMDLDOVREFTRIM_vref0p6875 << 10)

#define	RAC_SYTRIM0_SYCHPBIAS_bias_0 ( _RAC_SYTRIM0_SYCHPBIAS_bias_0 << 0)

#define	RAC_SYTRIM0_SYCHPBIAS_bias_1 ( _RAC_SYTRIM0_SYCHPBIAS_bias_1 << 0)

#define	RAC_SYTRIM0_SYCHPBIAS_bias_2 ( _RAC_SYTRIM0_SYCHPBIAS_bias_2 << 0)

#define	RAC_SYTRIM0_SYCHPBIAS_bias_3 ( _RAC_SYTRIM0_SYCHPBIAS_bias_3 << 0)

#define	RAC_SYTRIM0_SYCHPBIAS_DEFAULT ( _RAC_SYTRIM0_SYCHPBIAS_DEFAULT << 0)

#define	RAC_SYTRIM0_SYCHPCURR_curr_1p5uA ( _RAC_SYTRIM0_SYCHPCURR_curr_1p5uA << 3)

#define	RAC_SYTRIM0_SYCHPCURR_curr_2p0uA ( _RAC_SYTRIM0_SYCHPCURR_curr_2p0uA << 3)

#define	RAC_SYTRIM0_SYCHPCURR_curr_2p5uA ( _RAC_SYTRIM0_SYCHPCURR_curr_2p5uA << 3)

#define	RAC_SYTRIM0_SYCHPCURR_curr_3p0uA ( _RAC_SYTRIM0_SYCHPCURR_curr_3p0uA << 3)

#define	RAC_SYTRIM0_SYCHPCURR_curr_3p5uA ( _RAC_SYTRIM0_SYCHPCURR_curr_3p5uA << 3)

#define	RAC_SYTRIM0_SYCHPCURR_curr_4p0uA ( _RAC_SYTRIM0_SYCHPCURR_curr_4p0uA << 3)

#define	RAC_SYTRIM0_SYCHPCURR_curr_4p5uA ( _RAC_SYTRIM0_SYCHPCURR_curr_4p5uA << 3)

#define	RAC_SYTRIM0_SYCHPCURR_curr_5p0uA ( _RAC_SYTRIM0_SYCHPCURR_curr_5p0uA << 3)

#define	RAC_SYTRIM0_SYCHPCURR_DEFAULT ( _RAC_SYTRIM0_SYCHPCURR_DEFAULT << 3)

#define	RAC_SYTRIM0_SYCHPLEVNSRC_DEFAULT ( _RAC_SYTRIM0_SYCHPLEVNSRC_DEFAULT << 6)

#define	RAC_SYTRIM0_SYCHPLEVPSRC_DEFAULT ( _RAC_SYTRIM0_SYCHPLEVPSRC_DEFAULT << 9)

#define	RAC_SYTRIM0_SYCHPLEVPSRC_vsrcp_n0m ( _RAC_SYTRIM0_SYCHPLEVPSRC_vsrcp_n0m << 9)

#define	RAC_SYTRIM0_SYCHPLEVPSRC_vsrcp_n105m ( _RAC_SYTRIM0_SYCHPLEVPSRC_vsrcp_n105m << 9)

#define	RAC_SYTRIM0_SYCHPLEVPSRC_vsrcp_n15m ( _RAC_SYTRIM0_SYCHPLEVPSRC_vsrcp_n15m << 9)

#define	RAC_SYTRIM0_SYCHPLEVPSRC_vsrcp_n30m ( _RAC_SYTRIM0_SYCHPLEVPSRC_vsrcp_n30m << 9)

#define	RAC_SYTRIM0_SYCHPLEVPSRC_vsrcp_n45m ( _RAC_SYTRIM0_SYCHPLEVPSRC_vsrcp_n45m << 9)

#define	RAC_SYTRIM0_SYCHPLEVPSRC_vsrcp_n60m ( _RAC_SYTRIM0_SYCHPLEVPSRC_vsrcp_n60m << 9)

#define	RAC_SYTRIM0_SYCHPLEVPSRC_vsrcp_n75m ( _RAC_SYTRIM0_SYCHPLEVPSRC_vsrcp_n75m << 9)

#define	RAC_SYTRIM0_SYCHPLEVPSRC_vsrcp_n90m ( _RAC_SYTRIM0_SYCHPLEVPSRC_vsrcp_n90m << 9)

#define	RAC_SYTRIM0_SYCHPREPLICACURRADJ_DEFAULT ( _RAC_SYTRIM0_SYCHPREPLICACURRADJ_DEFAULT << 14)

#define	RAC_SYTRIM0_SYCHPREPLICACURRADJ_load_16ua ( _RAC_SYTRIM0_SYCHPREPLICACURRADJ_load_16ua << 14)

#define	RAC_SYTRIM0_SYCHPREPLICACURRADJ_load_20ua ( _RAC_SYTRIM0_SYCHPREPLICACURRADJ_load_20ua << 14)

#define	RAC_SYTRIM0_SYCHPREPLICACURRADJ_load_24ua ( _RAC_SYTRIM0_SYCHPREPLICACURRADJ_load_24ua << 14)

#define	RAC_SYTRIM0_SYCHPREPLICACURRADJ_load_28ua ( _RAC_SYTRIM0_SYCHPREPLICACURRADJ_load_28ua << 14)

#define	RAC_SYTRIM0_SYCHPREPLICACURRADJ_load_32ua ( _RAC_SYTRIM0_SYCHPREPLICACURRADJ_load_32ua << 14)

#define	RAC_SYTRIM0_SYCHPREPLICACURRADJ_load_36ua ( _RAC_SYTRIM0_SYCHPREPLICACURRADJ_load_36ua << 14)

#define	RAC_SYTRIM0_SYCHPREPLICACURRADJ_load_44ua ( _RAC_SYTRIM0_SYCHPREPLICACURRADJ_load_44ua << 14)

#define	RAC_SYTRIM0_SYCHPREPLICACURRADJ_load_8ua ( _RAC_SYTRIM0_SYCHPREPLICACURRADJ_load_8ua << 14)

#define	RAC_SYTRIM0_SYCHPSRCEN (0x1UL << 13)

#define	RAC_SYTRIM0_SYCHPSRCEN_DEFAULT ( _RAC_SYTRIM0_SYCHPSRCEN_DEFAULT << 13)

#define	RAC_SYTRIM0_SYCHPSRCEN_disable ( _RAC_SYTRIM0_SYCHPSRCEN_disable << 13)

#define	RAC_SYTRIM0_SYCHPSRCEN_enable ( _RAC_SYTRIM0_SYCHPSRCEN_enable << 13)

#define	RAC_SYTRIM0_SYTRIMCHPREGAMPBIAS_bias_14uA ( _RAC_SYTRIM0_SYTRIMCHPREGAMPBIAS_bias_14uA << 17)

#define	RAC_SYTRIM0_SYTRIMCHPREGAMPBIAS_bias_20uA ( _RAC_SYTRIM0_SYTRIMCHPREGAMPBIAS_bias_20uA << 17)

#define	RAC_SYTRIM0_SYTRIMCHPREGAMPBIAS_bias_26uA ( _RAC_SYTRIM0_SYTRIMCHPREGAMPBIAS_bias_26uA << 17)

#define	RAC_SYTRIM0_SYTRIMCHPREGAMPBIAS_bias_32uA ( _RAC_SYTRIM0_SYTRIMCHPREGAMPBIAS_bias_32uA << 17)

#define	RAC_SYTRIM0_SYTRIMCHPREGAMPBIAS_bias_38uA ( _RAC_SYTRIM0_SYTRIMCHPREGAMPBIAS_bias_38uA << 17)

#define	RAC_SYTRIM0_SYTRIMCHPREGAMPBIAS_bias_44uA ( _RAC_SYTRIM0_SYTRIMCHPREGAMPBIAS_bias_44uA << 17)

#define	RAC_SYTRIM0_SYTRIMCHPREGAMPBIAS_bias_50uA ( _RAC_SYTRIM0_SYTRIMCHPREGAMPBIAS_bias_50uA << 17)

#define	RAC_SYTRIM0_SYTRIMCHPREGAMPBIAS_bias_56uA ( _RAC_SYTRIM0_SYTRIMCHPREGAMPBIAS_bias_56uA << 17)

#define	RAC_SYTRIM0_SYTRIMCHPREGAMPBIAS_DEFAULT ( _RAC_SYTRIM0_SYTRIMCHPREGAMPBIAS_DEFAULT << 17)

#define	RAC_SYTRIM0_SYTRIMCHPREGAMPBW_C_000f ( _RAC_SYTRIM0_SYTRIMCHPREGAMPBW_C_000f << 20)

#define	RAC_SYTRIM0_SYTRIMCHPREGAMPBW_C_300f ( _RAC_SYTRIM0_SYTRIMCHPREGAMPBW_C_300f << 20)

#define	RAC_SYTRIM0_SYTRIMCHPREGAMPBW_C_600f ( _RAC_SYTRIM0_SYTRIMCHPREGAMPBW_C_600f << 20)

#define	RAC_SYTRIM0_SYTRIMCHPREGAMPBW_C_900f ( _RAC_SYTRIM0_SYTRIMCHPREGAMPBW_C_900f << 20)

#define	RAC_SYTRIM0_SYTRIMCHPREGAMPBW_DEFAULT ( _RAC_SYTRIM0_SYTRIMCHPREGAMPBW_DEFAULT << 20)

#define	RAC_SYTRIM1_SYLODIVLDOTRIMCORE_DEFAULT ( _RAC_SYTRIM1_SYLODIVLDOTRIMCORE_DEFAULT << 0)

#define	RAC_SYTRIM1_SYLODIVLDOTRIMCORE_RXLO ( _RAC_SYTRIM1_SYLODIVLDOTRIMCORE_RXLO << 0)

#define	RAC_SYTRIM1_SYLODIVLDOTRIMCORE_TXLO ( _RAC_SYTRIM1_SYLODIVLDOTRIMCORE_TXLO << 0)

#define	RAC_SYTRIM1_SYLODIVLDOTRIMNDIO_DEFAULT ( _RAC_SYTRIM1_SYLODIVLDOTRIMNDIO_DEFAULT << 2)

#define	RAC_SYTRIM1_SYLODIVLDOTRIMNDIO_vreg_1p08 ( _RAC_SYTRIM1_SYLODIVLDOTRIMNDIO_vreg_1p08 << 2)

#define	RAC_SYTRIM1_SYLODIVLDOTRIMNDIO_vreg_1p11 ( _RAC_SYTRIM1_SYLODIVLDOTRIMNDIO_vreg_1p11 << 2)

#define	RAC_SYTRIM1_SYLODIVLDOTRIMNDIO_vreg_1p15 ( _RAC_SYTRIM1_SYLODIVLDOTRIMNDIO_vreg_1p15 << 2)

#define	RAC_SYTRIM1_SYLODIVLDOTRIMNDIO_vreg_1p18 ( _RAC_SYTRIM1_SYLODIVLDOTRIMNDIO_vreg_1p18 << 2)

#define	RAC_SYTRIM1_SYLODIVLDOTRIMNDIO_vreg_1p21 ( _RAC_SYTRIM1_SYLODIVLDOTRIMNDIO_vreg_1p21 << 2)

#define	RAC_SYTRIM1_SYLODIVLDOTRIMNDIO_vreg_1p24 ( _RAC_SYTRIM1_SYLODIVLDOTRIMNDIO_vreg_1p24 << 2)

#define	RAC_SYTRIM1_SYLODIVLDOTRIMNDIO_vreg_1p27 ( _RAC_SYTRIM1_SYLODIVLDOTRIMNDIO_vreg_1p27 << 2)

#define	RAC_SYTRIM1_SYLODIVLDOTRIMNDIO_vreg_1p29 ( _RAC_SYTRIM1_SYLODIVLDOTRIMNDIO_vreg_1p29 << 2)

#define	RAC_SYTRIM1_SYLODIVLDOTRIMNDIO_vreg_1p32 ( _RAC_SYTRIM1_SYLODIVLDOTRIMNDIO_vreg_1p32 << 2)

#define	RAC_SYTRIM1_SYLODIVLDOTRIMNDIO_vreg_1p34 ( _RAC_SYTRIM1_SYLODIVLDOTRIMNDIO_vreg_1p34 << 2)

#define	RAC_SYTRIM1_SYMMDREPLICA1CURRADJ_DEFAULT ( _RAC_SYTRIM1_SYMMDREPLICA1CURRADJ_DEFAULT << 6)

#define	RAC_SYTRIM1_SYMMDREPLICA1CURRADJ_load_16u ( _RAC_SYTRIM1_SYMMDREPLICA1CURRADJ_load_16u << 6)

#define	RAC_SYTRIM1_SYMMDREPLICA1CURRADJ_load_20ua ( _RAC_SYTRIM1_SYMMDREPLICA1CURRADJ_load_20ua << 6)

#define	RAC_SYTRIM1_SYMMDREPLICA1CURRADJ_load_24ua ( _RAC_SYTRIM1_SYMMDREPLICA1CURRADJ_load_24ua << 6)

#define	RAC_SYTRIM1_SYMMDREPLICA1CURRADJ_load_28ua ( _RAC_SYTRIM1_SYMMDREPLICA1CURRADJ_load_28ua << 6)

#define	RAC_SYTRIM1_SYMMDREPLICA1CURRADJ_load_32ua ( _RAC_SYTRIM1_SYMMDREPLICA1CURRADJ_load_32ua << 6)

#define	RAC_SYTRIM1_SYMMDREPLICA1CURRADJ_load_36ua ( _RAC_SYTRIM1_SYMMDREPLICA1CURRADJ_load_36ua << 6)

#define	RAC_SYTRIM1_SYMMDREPLICA1CURRADJ_load_44ua ( _RAC_SYTRIM1_SYMMDREPLICA1CURRADJ_load_44ua << 6)

#define	RAC_SYTRIM1_SYMMDREPLICA1CURRADJ_load_8ua ( _RAC_SYTRIM1_SYMMDREPLICA1CURRADJ_load_8ua << 6)

#define	RAC_SYTRIM1_SYMMDREPLICA2CURRADJ_DEFAULT ( _RAC_SYTRIM1_SYMMDREPLICA2CURRADJ_DEFAULT << 9)

#define	RAC_SYTRIM1_SYMMDREPLICA2CURRADJ_load_128u ( _RAC_SYTRIM1_SYMMDREPLICA2CURRADJ_load_128u << 9)

#define	RAC_SYTRIM1_SYMMDREPLICA2CURRADJ_load_160u ( _RAC_SYTRIM1_SYMMDREPLICA2CURRADJ_load_160u << 9)

#define	RAC_SYTRIM1_SYMMDREPLICA2CURRADJ_load_192u ( _RAC_SYTRIM1_SYMMDREPLICA2CURRADJ_load_192u << 9)

#define	RAC_SYTRIM1_SYMMDREPLICA2CURRADJ_load_224u ( _RAC_SYTRIM1_SYMMDREPLICA2CURRADJ_load_224u << 9)

#define	RAC_SYTRIM1_SYMMDREPLICA2CURRADJ_load_256u ( _RAC_SYTRIM1_SYMMDREPLICA2CURRADJ_load_256u << 9)

#define	RAC_SYTRIM1_SYMMDREPLICA2CURRADJ_load_32u ( _RAC_SYTRIM1_SYMMDREPLICA2CURRADJ_load_32u << 9)

#define	RAC_SYTRIM1_SYMMDREPLICA2CURRADJ_load_64u ( _RAC_SYTRIM1_SYMMDREPLICA2CURRADJ_load_64u << 9)

#define	RAC_SYTRIM1_SYMMDREPLICA2CURRADJ_load_96u ( _RAC_SYTRIM1_SYMMDREPLICA2CURRADJ_load_96u << 9)

#define	RAC_SYTRIM1_SYTRIMMMDREGAMPBIAS_bias_14uA ( _RAC_SYTRIM1_SYTRIMMMDREGAMPBIAS_bias_14uA << 12)

#define	RAC_SYTRIM1_SYTRIMMMDREGAMPBIAS_bias_20uA ( _RAC_SYTRIM1_SYTRIMMMDREGAMPBIAS_bias_20uA << 12)

#define	RAC_SYTRIM1_SYTRIMMMDREGAMPBIAS_bias_26uA ( _RAC_SYTRIM1_SYTRIMMMDREGAMPBIAS_bias_26uA << 12)

#define	RAC_SYTRIM1_SYTRIMMMDREGAMPBIAS_bias_32uA ( _RAC_SYTRIM1_SYTRIMMMDREGAMPBIAS_bias_32uA << 12)

#define	RAC_SYTRIM1_SYTRIMMMDREGAMPBIAS_bias_38uA ( _RAC_SYTRIM1_SYTRIMMMDREGAMPBIAS_bias_38uA << 12)

#define	RAC_SYTRIM1_SYTRIMMMDREGAMPBIAS_bias_44uA ( _RAC_SYTRIM1_SYTRIMMMDREGAMPBIAS_bias_44uA << 12)

#define	RAC_SYTRIM1_SYTRIMMMDREGAMPBIAS_bias_50uA ( _RAC_SYTRIM1_SYTRIMMMDREGAMPBIAS_bias_50uA << 12)

#define	RAC_SYTRIM1_SYTRIMMMDREGAMPBIAS_bias_56uA ( _RAC_SYTRIM1_SYTRIMMMDREGAMPBIAS_bias_56uA << 12)

#define	RAC_SYTRIM1_SYTRIMMMDREGAMPBIAS_DEFAULT ( _RAC_SYTRIM1_SYTRIMMMDREGAMPBIAS_DEFAULT << 12)

#define	RAC_SYTRIM1_SYTRIMMMDREGAMPBW_C_000f ( _RAC_SYTRIM1_SYTRIMMMDREGAMPBW_C_000f << 15)

#define	RAC_SYTRIM1_SYTRIMMMDREGAMPBW_C_300f ( _RAC_SYTRIM1_SYTRIMMMDREGAMPBW_C_300f << 15)

#define	RAC_SYTRIM1_SYTRIMMMDREGAMPBW_C_600f ( _RAC_SYTRIM1_SYTRIMMMDREGAMPBW_C_600f << 15)

#define	RAC_SYTRIM1_SYTRIMMMDREGAMPBW_C_900f ( _RAC_SYTRIM1_SYTRIMMMDREGAMPBW_C_900f << 15)

#define	RAC_SYTRIM1_SYTRIMMMDREGAMPBW_DEFAULT ( _RAC_SYTRIM1_SYTRIMMMDREGAMPBW_DEFAULT << 15)

#define	RAC_TESTCTRL_AUX2RFSENSE (0x1UL << 2)

#define	RAC_TESTCTRL_AUX2RFSENSE_DEFAULT ( _RAC_TESTCTRL_AUX2RFSENSE_DEFAULT << 2)

#define	RAC_TESTCTRL_AUX2RFSENSE_X0 ( _RAC_TESTCTRL_AUX2RFSENSE_X0 << 2)

#define	RAC_TESTCTRL_AUX2RFSENSE_X1 ( _RAC_TESTCTRL_AUX2RFSENSE_X1 << 2)

#define	RAC_TESTCTRL_DEMODEN (0x1UL << 1)

#define	RAC_TESTCTRL_DEMODEN_DEFAULT ( _RAC_TESTCTRL_DEMODEN_DEFAULT << 1)

#define	RAC_TESTCTRL_LOOPBACK2LNAINPUT (0x1UL << 3)

#define	RAC_TESTCTRL_LOOPBACK2LNAINPUT_DEFAULT ( _RAC_TESTCTRL_LOOPBACK2LNAINPUT_DEFAULT << 3)

#define	RAC_TESTCTRL_LOOPBACK2LNAOUTPUT (0x1UL << 4)

#define	RAC_TESTCTRL_LOOPBACK2LNAOUTPUT_DEFAULT ( _RAC_TESTCTRL_LOOPBACK2LNAOUTPUT_DEFAULT << 4)

#define	RAC_TESTCTRL_MODEN (0x1UL << 0)

#define	RAC_TESTCTRL_MODEN_DEFAULT ( _RAC_TESTCTRL_MODEN_DEFAULT << 0)

#define	RAC_TX_ENPAPOWER (0x1UL << 30)

#define	RAC_TX_ENPAPOWER_DEFAULT ( _RAC_TX_ENPAPOWER_DEFAULT << 30)

#define	RAC_TX_ENPASELSLICE (0x1UL << 31)

#define	RAC_TX_ENPASELSLICE_DEFAULT ( _RAC_TX_ENPASELSLICE_DEFAULT << 31)

#define	RAC_TX_ENPATRIMPASLICE0DBM (0x1UL << 10)

#define	RAC_TX_ENPATRIMPASLICE0DBM_DEFAULT ( _RAC_TX_ENPATRIMPASLICE0DBM_DEFAULT << 10)

#define	RAC_TX_ENXOSQBUFFILT (0x1UL << 29)

#define	RAC_TX_ENXOSQBUFFILT_DEFAULT ( _RAC_TX_ENXOSQBUFFILT_DEFAULT << 29)

#define	RAC_TX_PABLEEDDRVREG0DBM (0x1UL << 0)

#define	RAC_TX_PABLEEDDRVREG0DBM_DEFAULT ( _RAC_TX_PABLEEDDRVREG0DBM_DEFAULT << 0)

#define	RAC_TX_PABLEEDDRVREG0DBM_disable ( _RAC_TX_PABLEEDDRVREG0DBM_disable << 0)

#define	RAC_TX_PABLEEDDRVREG0DBM_enable ( _RAC_TX_PABLEEDDRVREG0DBM_enable << 0)

#define	RAC_TX_PABLEEDREG0DBM (0x1UL << 1)

#define	RAC_TX_PABLEEDREG0DBM_DEFAULT ( _RAC_TX_PABLEEDREG0DBM_DEFAULT << 1)

#define	RAC_TX_PABLEEDREG0DBM_disable ( _RAC_TX_PABLEEDREG0DBM_disable << 1)

#define	RAC_TX_PABLEEDREG0DBM_enable ( _RAC_TX_PABLEEDREG0DBM_enable << 1)

#define	RAC_TX_PAEN10DBMM (0x1UL << 16)

#define	RAC_TX_PAEN10DBMM_DEFAULT ( _RAC_TX_PAEN10DBMM_DEFAULT << 16)

#define	RAC_TX_PAEN10DBMM_disable ( _RAC_TX_PAEN10DBMM_disable << 16)

#define	RAC_TX_PAEN10DBMM_enable ( _RAC_TX_PAEN10DBMM_enable << 16)

#define	RAC_TX_PAEN10DBMP (0x1UL << 17)

#define	RAC_TX_PAEN10DBMP_DEFAULT ( _RAC_TX_PAEN10DBMP_DEFAULT << 17)

#define	RAC_TX_PAEN10DBMP_disable ( _RAC_TX_PAEN10DBMP_disable << 17)

#define	RAC_TX_PAEN10DBMP_enable ( _RAC_TX_PAEN10DBMP_enable << 17)

#define	RAC_TX_PAEN10DBMPDRV (0x1UL << 18)

#define	RAC_TX_PAEN10DBMPDRV_DEFAULT ( _RAC_TX_PAEN10DBMPDRV_DEFAULT << 18)

#define	RAC_TX_PAEN10DBMPDRV_disable ( _RAC_TX_PAEN10DBMPDRV_disable << 18)

#define	RAC_TX_PAEN10DBMPDRV_enable ( _RAC_TX_PAEN10DBMPDRV_enable << 18)

#define	RAC_TX_PAEN20DBM (0x1UL << 20)

#define	RAC_TX_PAEN20DBM_DEFAULT ( _RAC_TX_PAEN20DBM_DEFAULT << 20)

#define	RAC_TX_PAEN20DBM_disable ( _RAC_TX_PAEN20DBM_disable << 20)

#define	RAC_TX_PAEN20DBM_enable ( _RAC_TX_PAEN20DBM_enable << 20)

#define	RAC_TX_PAEN20DBMPDRV (0x1UL << 21)

#define	RAC_TX_PAEN20DBMPDRV_DEFAULT ( _RAC_TX_PAEN20DBMPDRV_DEFAULT << 21)

#define	RAC_TX_PAEN20DBMPDRV_disable ( _RAC_TX_PAEN20DBMPDRV_disable << 21)

#define	RAC_TX_PAEN20DBMPDRV_enable ( _RAC_TX_PAEN20DBMPDRV_enable << 21)

#define	RAC_TX_PAENBIAS0DBM (0x1UL << 2)

#define	RAC_TX_PAENBIAS0DBM_DEFAULT ( _RAC_TX_PAENBIAS0DBM_DEFAULT << 2)

#define	RAC_TX_PAENBIAS0DBM_disable ( _RAC_TX_PAENBIAS0DBM_disable << 2)

#define	RAC_TX_PAENBIAS0DBM_enable ( _RAC_TX_PAENBIAS0DBM_enable << 2)

#define	RAC_TX_PAENBLEEDPDRVLDO (0x1UL << 24)

#define	RAC_TX_PAENBLEEDPDRVLDO_DEFAULT ( _RAC_TX_PAENBLEEDPDRVLDO_DEFAULT << 24)

#define	RAC_TX_PAENBLEEDPDRVLDO_disable ( _RAC_TX_PAENBLEEDPDRVLDO_disable << 24)

#define	RAC_TX_PAENBLEEDPDRVLDO_enable ( _RAC_TX_PAENBLEEDPDRVLDO_enable << 24)

#define	RAC_TX_PAENBLEEDPREREG (0x1UL << 25)

#define	RAC_TX_PAENBLEEDPREREG_DEFAULT ( _RAC_TX_PAENBLEEDPREREG_DEFAULT << 25)

#define	RAC_TX_PAENBLEEDPREREG_disable ( _RAC_TX_PAENBLEEDPREREG_disable << 25)

#define	RAC_TX_PAENBLEEDPREREG_enable ( _RAC_TX_PAENBLEEDPREREG_enable << 25)

#define	RAC_TX_PAENDRVREG0DBM (0x1UL << 3)

#define	RAC_TX_PAENDRVREG0DBM_DEFAULT ( _RAC_TX_PAENDRVREG0DBM_DEFAULT << 3)

#define	RAC_TX_PAENDRVREG0DBM_disable ( _RAC_TX_PAENDRVREG0DBM_disable << 3)

#define	RAC_TX_PAENDRVREG0DBM_enable ( _RAC_TX_PAENDRVREG0DBM_enable << 3)

#define	RAC_TX_PAENDRVREGBIAS0DBM (0x1UL << 4)

#define	RAC_TX_PAENDRVREGBIAS0DBM_DEFAULT ( _RAC_TX_PAENDRVREGBIAS0DBM_DEFAULT << 4)

#define	RAC_TX_PAENDRVREGBIAS0DBM_disable ( _RAC_TX_PAENDRVREGBIAS0DBM_disable << 4)

#define	RAC_TX_PAENDRVREGBIAS0DBM_enable ( _RAC_TX_PAENDRVREGBIAS0DBM_enable << 4)

#define	RAC_TX_PAENLDOHVPDRVLDO (0x1UL << 26)

#define	RAC_TX_PAENLDOHVPDRVLDO_DEFAULT ( _RAC_TX_PAENLDOHVPDRVLDO_DEFAULT << 26)

#define	RAC_TX_PAENLDOHVPDRVLDO_disable ( _RAC_TX_PAENLDOHVPDRVLDO_disable << 26)

#define	RAC_TX_PAENLDOHVPDRVLDO_enable ( _RAC_TX_PAENLDOHVPDRVLDO_enable << 26)

#define	RAC_TX_PAENLDOHVPREREG (0x1UL << 27)

#define	RAC_TX_PAENLDOHVPREREG_DEFAULT ( _RAC_TX_PAENLDOHVPREREG_DEFAULT << 27)

#define	RAC_TX_PAENLDOHVPREREG_disable ( _RAC_TX_PAENLDOHVPREREG_disable << 27)

#define	RAC_TX_PAENLDOHVPREREG_enable ( _RAC_TX_PAENLDOHVPREREG_enable << 27)

#define	RAC_TX_PAENLO0DBM (0x1UL << 5)

#define	RAC_TX_PAENLO0DBM_DEFAULT ( _RAC_TX_PAENLO0DBM_DEFAULT << 5)

#define	RAC_TX_PAENLO0DBM_disable ( _RAC_TX_PAENLO0DBM_disable << 5)

#define	RAC_TX_PAENLO0DBM_enable ( _RAC_TX_PAENLO0DBM_enable << 5)

#define	RAC_TX_PAENPAOUT (0x1UL << 28)

#define	RAC_TX_PAENPAOUT_DEFAULT ( _RAC_TX_PAENPAOUT_DEFAULT << 28)

#define	RAC_TX_PAENPAOUT_disable ( _RAC_TX_PAENPAOUT_disable << 28)

#define	RAC_TX_PAENPAOUT_enable ( _RAC_TX_PAENPAOUT_enable << 28)

#define	RAC_TX_PAENREG0DBM (0x1UL << 6)

#define	RAC_TX_PAENREG0DBM_DEFAULT ( _RAC_TX_PAENREG0DBM_DEFAULT << 6)

#define	RAC_TX_PAENREG0DBM_disable ( _RAC_TX_PAENREG0DBM_disable << 6)

#define	RAC_TX_PAENREG0DBM_enable ( _RAC_TX_PAENREG0DBM_enable << 6)

#define	RAC_TX_PAENTAPCAP0DBM_cap_0f ( _RAC_TX_PAENTAPCAP0DBM_cap_0f << 7)

#define	RAC_TX_PAENTAPCAP0DBM_cap_0p35pF ( _RAC_TX_PAENTAPCAP0DBM_cap_0p35pF << 7)

#define	RAC_TX_PAENTAPCAP0DBM_cap_0p7pF ( _RAC_TX_PAENTAPCAP0DBM_cap_0p7pF << 7)

#define	RAC_TX_PAENTAPCAP0DBM_cap_1p05pF ( _RAC_TX_PAENTAPCAP0DBM_cap_1p05pF << 7)

#define	RAC_TX_PAENTAPCAP0DBM_cap_1p4pF ( _RAC_TX_PAENTAPCAP0DBM_cap_1p4pF << 7)

#define	RAC_TX_PAENTAPCAP0DBM_cap_1p75pF ( _RAC_TX_PAENTAPCAP0DBM_cap_1p75pF << 7)

#define	RAC_TX_PAENTAPCAP0DBM_cap_2p1pF ( _RAC_TX_PAENTAPCAP0DBM_cap_2p1pF << 7)

#define	RAC_TX_PAENTAPCAP0DBM_cap_2p45pF ( _RAC_TX_PAENTAPCAP0DBM_cap_2p45pF << 7)

#define	RAC_TX_PAENTAPCAP0DBM_DEFAULT ( _RAC_TX_PAENTAPCAP0DBM_DEFAULT << 7)

#define	RAC_VCOCTRL_VCOAMPLITUDE_DEFAULT ( _RAC_VCOCTRL_VCOAMPLITUDE_DEFAULT << 0)

#define	RAC_VCOCTRL_VCODETAMPLITUDE_DEFAULT ( _RAC_VCOCTRL_VCODETAMPLITUDE_DEFAULT << 4)

#define	RAC_VECTADDR_VECTADDR_DEFAULT ( _RAC_VECTADDR_VECTADDR_DEFAULT << 0)

#define	RAC_WAITMASK_ANTSWITCH (0x1UL << 8)

#define	RAC_WAITMASK_ANTSWITCH_DEFAULT ( _RAC_WAITMASK_ANTSWITCH_DEFAULT << 8)

#define	RAC_WAITMASK_DEMODRXREQCLR (0x1UL << 4)

#define	RAC_WAITMASK_DEMODRXREQCLR_DEFAULT ( _RAC_WAITMASK_DEMODRXREQCLR_DEFAULT << 4)

#define	RAC_WAITMASK_FRCPAUSED (0x1UL << 7)

#define	RAC_WAITMASK_FRCPAUSED_DEFAULT ( _RAC_WAITMASK_FRCPAUSED_DEFAULT << 7)

#define	RAC_WAITMASK_FRCRX (0x1UL << 1)

#define	RAC_WAITMASK_FRCRX_DEFAULT ( _RAC_WAITMASK_FRCRX_DEFAULT << 1)

#define	RAC_WAITMASK_FRCTX (0x1UL << 2)

#define	RAC_WAITMASK_FRCTX_DEFAULT ( _RAC_WAITMASK_FRCTX_DEFAULT << 2)

#define	RAC_WAITMASK_PRSEVENT (0x1UL << 3)

#define	RAC_WAITMASK_PRSEVENT_DEFAULT ( _RAC_WAITMASK_PRSEVENT_DEFAULT << 3)

#define	RAC_WAITMASK_RAMPDONE (0x1UL << 6)

#define	RAC_WAITMASK_RAMPDONE_DEFAULT ( _RAC_WAITMASK_RAMPDONE_DEFAULT << 6)

#define	RAC_WAITMASK_STCMP (0x1UL << 0)

#define	RAC_WAITMASK_STCMP_DEFAULT ( _RAC_WAITMASK_STCMP_DEFAULT << 0)

#define	RAC_WAITMASK_SYNTHRDY (0x1UL << 5)

#define	RAC_WAITMASK_SYNTHRDY_DEFAULT ( _RAC_WAITMASK_SYNTHRDY_DEFAULT << 5)

#define	RAC_WAITSNSH_WAITSNSH_DEFAULT ( _RAC_WAITSNSH_WAITSNSH_DEFAULT << 0)

#define	RAC_XORETIMECTRL_XORETIMEDISRETIME (0x1UL << 1)

#define	RAC_XORETIMECTRL_XORETIMEDISRETIME_DEFAULT ( _RAC_XORETIMECTRL_XORETIMEDISRETIME_DEFAULT << 1)

#define	RAC_XORETIMECTRL_XORETIMEDISRETIME_disable_retime ( _RAC_XORETIMECTRL_XORETIMEDISRETIME_disable_retime << 1)

#define	RAC_XORETIMECTRL_XORETIMEDISRETIME_enable_retime ( _RAC_XORETIMECTRL_XORETIMEDISRETIME_enable_retime << 1)

#define	RAC_XORETIMECTRL_XORETIMEENRETIME (0x1UL << 0)

#define	RAC_XORETIMECTRL_XORETIMEENRETIME_DEFAULT ( _RAC_XORETIMECTRL_XORETIMEENRETIME_DEFAULT << 0)

#define	RAC_XORETIMECTRL_XORETIMEENRETIME_disable ( _RAC_XORETIMECTRL_XORETIMEENRETIME_disable << 0)

#define	RAC_XORETIMECTRL_XORETIMEENRETIME_enable ( _RAC_XORETIMECTRL_XORETIMEENRETIME_enable << 0)

#define	RAC_XORETIMECTRL_XORETIMELIMITH_DEFAULT ( _RAC_XORETIMECTRL_XORETIMELIMITH_DEFAULT << 4)

#define	RAC_XORETIMECTRL_XORETIMELIMITL_DEFAULT ( _RAC_XORETIMECTRL_XORETIMELIMITL_DEFAULT << 8)

#define	RAC_XORETIMECTRL_XORETIMERESETN (0x1UL << 2)

#define	RAC_XORETIMECTRL_XORETIMERESETN_DEFAULT ( _RAC_XORETIMECTRL_XORETIMERESETN_DEFAULT << 2)

#define	RAC_XORETIMECTRL_XORETIMERESETN_operate ( _RAC_XORETIMECTRL_XORETIMERESETN_operate << 2)

#define	RAC_XORETIMECTRL_XORETIMERESETN_reset ( _RAC_XORETIMECTRL_XORETIMERESETN_reset << 2)

#define	RAC_XORETIMESTATUS_XORETIMECLKSEL (0x1UL << 0)

#define	RAC_XORETIMESTATUS_XORETIMECLKSEL_DEFAULT ( _RAC_XORETIMESTATUS_XORETIMECLKSEL_DEFAULT << 0)

#define	RAC_XORETIMESTATUS_XORETIMECLKSEL_use_raw_clk ( _RAC_XORETIMESTATUS_XORETIMECLKSEL_use_raw_clk << 0)

#define	RAC_XORETIMESTATUS_XORETIMECLKSEL_use_retimed_clk ( _RAC_XORETIMESTATUS_XORETIMECLKSEL_use_retimed_clk << 0)

#define	RAC_XORETIMESTATUS_XORETIMERESETNLO (0x1UL << 1)

#define	RAC_XORETIMESTATUS_XORETIMERESETNLO_DEFAULT ( _RAC_XORETIMESTATUS_XORETIMERESETNLO_DEFAULT << 1)

#define	RAC_XORETIMESTATUS_XORETIMERESETNLO_hi ( _RAC_XORETIMESTATUS_XORETIMERESETNLO_hi << 1)

#define	RAC_XORETIMESTATUS_XORETIMERESETNLO_lo ( _RAC_XORETIMESTATUS_XORETIMERESETNLO_lo << 1)

#define	RAC_XOSQBUFFILT_XOSQBUFFILT_bypass ( _RAC_XOSQBUFFILT_XOSQBUFFILT_bypass << 0)

#define	RAC_XOSQBUFFILT_XOSQBUFFILT_DEFAULT ( _RAC_XOSQBUFFILT_XOSQBUFFILT_DEFAULT << 0)

#define	RAC_XOSQBUFFILT_XOSQBUFFILT_filter_1 ( _RAC_XOSQBUFFILT_XOSQBUFFILT_filter_1 << 0)

#define	RAC_XOSQBUFFILT_XOSQBUFFILT_filter_2 ( _RAC_XOSQBUFFILT_XOSQBUFFILT_filter_2 << 0)

#define	RAC_XOSQBUFFILT_XOSQBUFFILT_filter_3 ( _RAC_XOSQBUFFILT_XOSQBUFFILT_filter_3 << 0)

Macro Definition Documentation

#define _RAC_ANTDIV_EN_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_ANTDIV

Definition at line 4942 of file efr32bg21_rac.h .

#define _RAC_ANTDIV_EN_LNAMIXEN1 0x00000002UL

Mode LNAMIXEN1 for RAC_ANTDIV

Definition at line 4945 of file efr32bg21_rac.h .

#define _RAC_ANTDIV_EN_LNAMIXEN2 0x00000020UL

Mode LNAMIXEN2 for RAC_ANTDIV

Definition at line 4949 of file efr32bg21_rac.h .

#define _RAC_ANTDIV_EN_LNAMIXRFPKDENRF1 0x00000004UL

Mode LNAMIXRFPKDENRF1 for RAC_ANTDIV

Definition at line 4946 of file efr32bg21_rac.h .

#define _RAC_ANTDIV_EN_LNAMIXRFPKDENRF2 0x00000040UL

Mode LNAMIXRFPKDENRF2 for RAC_ANTDIV

Definition at line 4950 of file efr32bg21_rac.h .

#define _RAC_ANTDIV_EN_MASK 0xFFUL

Bit mask for RAC_EN

Definition at line 4941 of file efr32bg21_rac.h .

#define _RAC_ANTDIV_EN_OFF 0x00000000UL

Mode OFF for RAC_ANTDIV

Definition at line 4943 of file efr32bg21_rac.h .

#define _RAC_ANTDIV_EN_ON 0x000000FFUL

Mode ON for RAC_ANTDIV

Definition at line 4952 of file efr32bg21_rac.h .

#define _RAC_ANTDIV_EN_PAENANT1 0x00000001UL

Mode PAENANT1 for RAC_ANTDIV

Definition at line 4944 of file efr32bg21_rac.h .

#define _RAC_ANTDIV_EN_PAENANT2 0x00000010UL

Mode PAENANT2 for RAC_ANTDIV

Definition at line 4948 of file efr32bg21_rac.h .

#define _RAC_ANTDIV_EN_SHIFT 0

Shift value for RAC_EN

Definition at line 4940 of file efr32bg21_rac.h .

#define _RAC_ANTDIV_EN_SYLODIVRLO12G4EN 0x00000008UL

Mode SYLODIVRLO12G4EN for RAC_ANTDIV

Definition at line 4947 of file efr32bg21_rac.h .

#define _RAC_ANTDIV_EN_SYLODIVRLO22G4EN 0x00000080UL

Mode SYLODIVRLO22G4EN for RAC_ANTDIV

Definition at line 4951 of file efr32bg21_rac.h .

#define _RAC_ANTDIV_MASK 0x000003FFUL

Mask for RAC_ANTDIV

Definition at line 4939 of file efr32bg21_rac.h .

#define _RAC_ANTDIV_RESETVALUE 0x00000000UL

Default value for RAC_ANTDIV

Definition at line 4938 of file efr32bg21_rac.h .

#define _RAC_ANTDIV_STATUS_ANT1 0x00000001UL

Mode ANT1 for RAC_ANTDIV

Definition at line 4968 of file efr32bg21_rac.h .

#define _RAC_ANTDIV_STATUS_ANT2 0x00000002UL

Mode ANT2 for RAC_ANTDIV

Definition at line 4969 of file efr32bg21_rac.h .

#define _RAC_ANTDIV_STATUS_BOTH 0x00000003UL

Mode BOTH for RAC_ANTDIV

Definition at line 4970 of file efr32bg21_rac.h .

#define _RAC_ANTDIV_STATUS_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_ANTDIV

Definition at line 4966 of file efr32bg21_rac.h .

#define _RAC_ANTDIV_STATUS_MASK 0x300UL

Bit mask for RAC_STATUS

Definition at line 4965 of file efr32bg21_rac.h .

#define _RAC_ANTDIV_STATUS_OFF 0x00000000UL

Mode OFF for RAC_ANTDIV

Definition at line 4967 of file efr32bg21_rac.h .

#define _RAC_ANTDIV_STATUS_SHIFT 8

Shift value for RAC_STATUS

Definition at line 4964 of file efr32bg21_rac.h .

#define _RAC_APC_AMPCONTROLLIMITSW_DEFAULT 0x000000FFUL

Mode DEFAULT for RAC_APC

Definition at line 1492 of file efr32bg21_rac.h .

#define _RAC_APC_AMPCONTROLLIMITSW_MASK 0xFF000000UL

Bit mask for RAC_AMPCONTROLLIMITSW

Definition at line 1491 of file efr32bg21_rac.h .

#define _RAC_APC_AMPCONTROLLIMITSW_SHIFT 24

Shift value for RAC_AMPCONTROLLIMITSW

Definition at line 1490 of file efr32bg21_rac.h .

#define _RAC_APC_ENAPCSW_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_APC

Definition at line 1484 of file efr32bg21_rac.h .

#define _RAC_APC_ENAPCSW_DISABLE 0x00000000UL

Mode DISABLE for RAC_APC

Definition at line 1485 of file efr32bg21_rac.h .

#define _RAC_APC_ENAPCSW_ENABLE 0x00000001UL

Mode ENABLE for RAC_APC

Definition at line 1486 of file efr32bg21_rac.h .

#define _RAC_APC_ENAPCSW_MASK 0x4UL

Bit mask for RAC_ENAPCSW

Definition at line 1483 of file efr32bg21_rac.h .

#define _RAC_APC_ENAPCSW_SHIFT 2

Shift value for RAC_ENAPCSW

Definition at line 1482 of file efr32bg21_rac.h .

#define _RAC_APC_MASK 0xFF000004UL

Mask for RAC_APC

Definition at line 1480 of file efr32bg21_rac.h .

#define _RAC_APC_RESETVALUE 0xFF000000UL

Default value for RAC_APC

Definition at line 1479 of file efr32bg21_rac.h .

#define _RAC_AUXADCCTRL0_CLRCOUNTER_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_AUXADCCTRL0

Definition at line 1758 of file efr32bg21_rac.h .

#define _RAC_AUXADCCTRL0_CLRCOUNTER_MASK 0x1000UL

Bit mask for RAC_CLRCOUNTER

Definition at line 1757 of file efr32bg21_rac.h .

#define _RAC_AUXADCCTRL0_CLRCOUNTER_SHIFT 12

Shift value for RAC_CLRCOUNTER

Definition at line 1756 of file efr32bg21_rac.h .

#define _RAC_AUXADCCTRL0_CLRFILTER_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_AUXADCCTRL0

Definition at line 1763 of file efr32bg21_rac.h .

#define _RAC_AUXADCCTRL0_CLRFILTER_MASK 0x2000UL

Bit mask for RAC_CLRFILTER

Definition at line 1762 of file efr32bg21_rac.h .

#define _RAC_AUXADCCTRL0_CLRFILTER_SHIFT 13

Shift value for RAC_CLRFILTER

Definition at line 1761 of file efr32bg21_rac.h .

#define _RAC_AUXADCCTRL0_CYCLES_DEFAULT 0x00000100UL

Mode DEFAULT for RAC_AUXADCCTRL0

Definition at line 1749 of file efr32bg21_rac.h .

#define _RAC_AUXADCCTRL0_CYCLES_MASK 0x3FFUL

Bit mask for RAC_CYCLES

Definition at line 1748 of file efr32bg21_rac.h .

#define _RAC_AUXADCCTRL0_CYCLES_SHIFT 0

Shift value for RAC_CYCLES

Definition at line 1747 of file efr32bg21_rac.h .

#define _RAC_AUXADCCTRL0_INPUTRESSEL_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_AUXADCCTRL0

Definition at line 1767 of file efr32bg21_rac.h .

#define _RAC_AUXADCCTRL0_INPUTRESSEL_MASK 0x3C000UL

Bit mask for RAC_INPUTRESSEL

Definition at line 1766 of file efr32bg21_rac.h .

#define _RAC_AUXADCCTRL0_INPUTRESSEL_SHIFT 14

Shift value for RAC_INPUTRESSEL

Definition at line 1765 of file efr32bg21_rac.h .

#define _RAC_AUXADCCTRL0_MASK 0x0003FFFFUL

Mask for RAC_AUXADCCTRL0

Definition at line 1746 of file efr32bg21_rac.h .

#define _RAC_AUXADCCTRL0_MUXSEL_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_AUXADCCTRL0

Definition at line 1753 of file efr32bg21_rac.h .

#define _RAC_AUXADCCTRL0_MUXSEL_MASK 0xC00UL

Bit mask for RAC_MUXSEL

Definition at line 1752 of file efr32bg21_rac.h .

#define _RAC_AUXADCCTRL0_MUXSEL_SHIFT 10

Shift value for RAC_MUXSEL

Definition at line 1751 of file efr32bg21_rac.h .

#define _RAC_AUXADCCTRL0_RESETVALUE 0x00000100UL

Default value for RAC_AUXADCCTRL0

Definition at line 1745 of file efr32bg21_rac.h .

#define _RAC_AUXADCCTRL1_AUXADCINPUTRESSEL_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_AUXADCCTRL1

Definition at line 1775 of file efr32bg21_rac.h .

#define _RAC_AUXADCCTRL1_AUXADCINPUTRESSEL_MASK 0xFUL

Bit mask for RAC_AUXADCINPUTRESSEL

Definition at line 1774 of file efr32bg21_rac.h .

#define _RAC_AUXADCCTRL1_AUXADCINPUTRESSEL_RES0p6kOhm 0x0000000AUL

Mode RES0p6kOhm for RAC_AUXADCCTRL1

Definition at line 1786 of file efr32bg21_rac.h .

#define _RAC_AUXADCCTRL1_AUXADCINPUTRESSEL_RES10kOhm 0x00000006UL

Mode RES10kOhm for RAC_AUXADCCTRL1

Definition at line 1782 of file efr32bg21_rac.h .

#define _RAC_AUXADCCTRL1_AUXADCINPUTRESSEL_RES160kOhm 0x00000002UL

Mode RES160kOhm for RAC_AUXADCCTRL1

Definition at line 1778 of file efr32bg21_rac.h .

#define _RAC_AUXADCCTRL1_AUXADCINPUTRESSEL_RES1p25kOhm 0x00000009UL

Mode RES1p25kOhm for RAC_AUXADCCTRL1

Definition at line 1785 of file efr32bg21_rac.h .

#define _RAC_AUXADCCTRL1_AUXADCINPUTRESSEL_RES20kOhm 0x00000005UL

Mode RES20kOhm for RAC_AUXADCCTRL1

Definition at line 1781 of file efr32bg21_rac.h .

#define _RAC_AUXADCCTRL1_AUXADCINPUTRESSEL_RES2p5kOhm 0x00000008UL

Mode RES2p5kOhm for RAC_AUXADCCTRL1

Definition at line 1784 of file efr32bg21_rac.h .

#define _RAC_AUXADCCTRL1_AUXADCINPUTRESSEL_RES320kOhm 0x00000001UL

Mode RES320kOhm for RAC_AUXADCCTRL1

Definition at line 1777 of file efr32bg21_rac.h .

#define _RAC_AUXADCCTRL1_AUXADCINPUTRESSEL_RES40kOhm 0x00000004UL

Mode RES40kOhm for RAC_AUXADCCTRL1

Definition at line 1780 of file efr32bg21_rac.h .

#define _RAC_AUXADCCTRL1_AUXADCINPUTRESSEL_RES5kOhm 0x00000007UL

Mode RES5kOhm for RAC_AUXADCCTRL1

Definition at line 1783 of file efr32bg21_rac.h .

#define _RAC_AUXADCCTRL1_AUXADCINPUTRESSEL_RES640kOhm 0x00000000UL

Mode RES640kOhm for RAC_AUXADCCTRL1

Definition at line 1776 of file efr32bg21_rac.h .

#define _RAC_AUXADCCTRL1_AUXADCINPUTRESSEL_RES80kOhm 0x00000003UL

Mode RES80kOhm for RAC_AUXADCCTRL1

Definition at line 1779 of file efr32bg21_rac.h .

#define _RAC_AUXADCCTRL1_AUXADCINPUTRESSEL_RES_switch 0x0000000BUL

Mode RES_switch for RAC_AUXADCCTRL1

Definition at line 1787 of file efr32bg21_rac.h .

#define _RAC_AUXADCCTRL1_AUXADCINPUTRESSEL_SHIFT 0

Shift value for RAC_AUXADCINPUTRESSEL

Definition at line 1773 of file efr32bg21_rac.h .

#define _RAC_AUXADCCTRL1_AUXADCINPUTSELECT_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_AUXADCCTRL1

Definition at line 1803 of file efr32bg21_rac.h .

#define _RAC_AUXADCCTRL1_AUXADCINPUTSELECT_MASK 0xF0UL

Bit mask for RAC_AUXADCINPUTSELECT

Definition at line 1802 of file efr32bg21_rac.h .

#define _RAC_AUXADCCTRL1_AUXADCINPUTSELECT_SEL0 0x00000000UL

Mode SEL0 for RAC_AUXADCCTRL1

Definition at line 1804 of file efr32bg21_rac.h .

#define _RAC_AUXADCCTRL1_AUXADCINPUTSELECT_SEL1 0x00000001UL

Mode SEL1 for RAC_AUXADCCTRL1

Definition at line 1805 of file efr32bg21_rac.h .

#define _RAC_AUXADCCTRL1_AUXADCINPUTSELECT_SEL2 0x00000002UL

Mode SEL2 for RAC_AUXADCCTRL1

Definition at line 1806 of file efr32bg21_rac.h .

#define _RAC_AUXADCCTRL1_AUXADCINPUTSELECT_SEL3 0x00000003UL

Mode SEL3 for RAC_AUXADCCTRL1

Definition at line 1807 of file efr32bg21_rac.h .

#define _RAC_AUXADCCTRL1_AUXADCINPUTSELECT_SEL4 0x00000004UL

Mode SEL4 for RAC_AUXADCCTRL1

Definition at line 1808 of file efr32bg21_rac.h .

#define _RAC_AUXADCCTRL1_AUXADCINPUTSELECT_SEL5 0x00000005UL

Mode SEL5 for RAC_AUXADCCTRL1

Definition at line 1809 of file efr32bg21_rac.h .

#define _RAC_AUXADCCTRL1_AUXADCINPUTSELECT_SEL6 0x00000006UL

Mode SEL6 for RAC_AUXADCCTRL1

Definition at line 1810 of file efr32bg21_rac.h .

#define _RAC_AUXADCCTRL1_AUXADCINPUTSELECT_SEL7 0x00000007UL

Mode SEL7 for RAC_AUXADCCTRL1

Definition at line 1811 of file efr32bg21_rac.h .

#define _RAC_AUXADCCTRL1_AUXADCINPUTSELECT_SEL8 0x00000008UL

Mode SEL8 for RAC_AUXADCCTRL1

Definition at line 1812 of file efr32bg21_rac.h .

#define _RAC_AUXADCCTRL1_AUXADCINPUTSELECT_SEL9 0x00000009UL

Mode SEL9 for RAC_AUXADCCTRL1

Definition at line 1813 of file efr32bg21_rac.h .

#define _RAC_AUXADCCTRL1_AUXADCINPUTSELECT_SHIFT 4

Shift value for RAC_AUXADCINPUTSELECT

Definition at line 1801 of file efr32bg21_rac.h .

#define _RAC_AUXADCCTRL1_AUXADCPMONSELECT_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_AUXADCCTRL1

Definition at line 1827 of file efr32bg21_rac.h .

#define _RAC_AUXADCCTRL1_AUXADCPMONSELECT_MASK 0xF00UL

Bit mask for RAC_AUXADCPMONSELECT

Definition at line 1826 of file efr32bg21_rac.h .

#define _RAC_AUXADCCTRL1_AUXADCPMONSELECT_SHIFT 8

Shift value for RAC_AUXADCPMONSELECT

Definition at line 1825 of file efr32bg21_rac.h .

#define _RAC_AUXADCCTRL1_AUXADCRESET_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_AUXADCCTRL1

Definition at line 1836 of file efr32bg21_rac.h .

#define _RAC_AUXADCCTRL1_AUXADCRESET_MASK 0x1000000UL

Bit mask for RAC_AUXADCRESET

Definition at line 1835 of file efr32bg21_rac.h .

#define _RAC_AUXADCCTRL1_AUXADCRESET_Reset_Disabled 0x00000001UL

Mode Reset_Disabled for RAC_AUXADCCTRL1

Definition at line 1838 of file efr32bg21_rac.h .

#define _RAC_AUXADCCTRL1_AUXADCRESET_Reset_Enabled 0x00000000UL

Mode Reset_Enabled for RAC_AUXADCCTRL1

Definition at line 1837 of file efr32bg21_rac.h .

#define _RAC_AUXADCCTRL1_AUXADCRESET_SHIFT 24

Shift value for RAC_AUXADCRESET

Definition at line 1834 of file efr32bg21_rac.h .

#define _RAC_AUXADCCTRL1_AUXADCTSENSESELCURR_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_AUXADCCTRL1

Definition at line 1831 of file efr32bg21_rac.h .

#define _RAC_AUXADCCTRL1_AUXADCTSENSESELCURR_MASK 0x1F0000UL

Bit mask for RAC_AUXADCTSENSESELCURR

Definition at line 1830 of file efr32bg21_rac.h .

#define _RAC_AUXADCCTRL1_AUXADCTSENSESELCURR_SHIFT 16

Shift value for RAC_AUXADCTSENSESELCURR

Definition at line 1829 of file efr32bg21_rac.h .

#define _RAC_AUXADCCTRL1_AUXADCTSENSESELVBE_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_AUXADCCTRL1

Definition at line 1845 of file efr32bg21_rac.h .

#define _RAC_AUXADCCTRL1_AUXADCTSENSESELVBE_MASK 0x2000000UL

Bit mask for RAC_AUXADCTSENSESELVBE

Definition at line 1844 of file efr32bg21_rac.h .

#define _RAC_AUXADCCTRL1_AUXADCTSENSESELVBE_SHIFT 25

Shift value for RAC_AUXADCTSENSESELVBE

Definition at line 1843 of file efr32bg21_rac.h .

#define _RAC_AUXADCCTRL1_AUXADCTSENSESELVBE_VBE1 0x00000000UL

Mode VBE1 for RAC_AUXADCCTRL1

Definition at line 1846 of file efr32bg21_rac.h .

#define _RAC_AUXADCCTRL1_AUXADCTSENSESELVBE_VBE2 0x00000001UL

Mode VBE2 for RAC_AUXADCCTRL1

Definition at line 1847 of file efr32bg21_rac.h .

#define _RAC_AUXADCCTRL1_MASK 0x031F0FFFUL

Mask for RAC_AUXADCCTRL1

Definition at line 1772 of file efr32bg21_rac.h .

#define _RAC_AUXADCCTRL1_RESETVALUE 0x00000000UL

Default value for RAC_AUXADCCTRL1

Definition at line 1771 of file efr32bg21_rac.h .

#define _RAC_AUXADCEN_AUXADCENAUXADC_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_AUXADCEN

Definition at line 1665 of file efr32bg21_rac.h .

#define _RAC_AUXADCEN_AUXADCENAUXADC_Disabled 0x00000000UL

Mode Disabled for RAC_AUXADCEN

Definition at line 1666 of file efr32bg21_rac.h .

#define _RAC_AUXADCEN_AUXADCENAUXADC_Enabled 0x00000001UL

Mode Enabled for RAC_AUXADCEN

Definition at line 1667 of file efr32bg21_rac.h .

#define _RAC_AUXADCEN_AUXADCENAUXADC_MASK 0x1UL

Bit mask for RAC_AUXADCENAUXADC

Definition at line 1664 of file efr32bg21_rac.h .

#define _RAC_AUXADCEN_AUXADCENAUXADC_SHIFT 0

Shift value for RAC_AUXADCENAUXADC

Definition at line 1663 of file efr32bg21_rac.h .

#define _RAC_AUXADCEN_AUXADCENINPUTBUFFER_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_AUXADCEN

Definition at line 1674 of file efr32bg21_rac.h .

#define _RAC_AUXADCEN_AUXADCENINPUTBUFFER_Disabled 0x00000000UL

Mode Disabled for RAC_AUXADCEN

Definition at line 1675 of file efr32bg21_rac.h .

#define _RAC_AUXADCEN_AUXADCENINPUTBUFFER_Enabled 0x00000001UL

Mode Enabled for RAC_AUXADCEN

Definition at line 1676 of file efr32bg21_rac.h .

#define _RAC_AUXADCEN_AUXADCENINPUTBUFFER_MASK 0x2UL

Bit mask for RAC_AUXADCENINPUTBUFFER

Definition at line 1673 of file efr32bg21_rac.h .

#define _RAC_AUXADCEN_AUXADCENINPUTBUFFER_SHIFT 1

Shift value for RAC_AUXADCENINPUTBUFFER

Definition at line 1672 of file efr32bg21_rac.h .

#define _RAC_AUXADCEN_AUXADCENLDO_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_AUXADCEN

Definition at line 1683 of file efr32bg21_rac.h .

#define _RAC_AUXADCEN_AUXADCENLDO_Disabled 0x00000000UL

Mode Disabled for RAC_AUXADCEN

Definition at line 1684 of file efr32bg21_rac.h .

#define _RAC_AUXADCEN_AUXADCENLDO_Enabled 0x00000001UL

Mode Enabled for RAC_AUXADCEN

Definition at line 1685 of file efr32bg21_rac.h .

#define _RAC_AUXADCEN_AUXADCENLDO_MASK 0x4UL

Bit mask for RAC_AUXADCENLDO

Definition at line 1682 of file efr32bg21_rac.h .

#define _RAC_AUXADCEN_AUXADCENLDO_SHIFT 2

Shift value for RAC_AUXADCENLDO

Definition at line 1681 of file efr32bg21_rac.h .

#define _RAC_AUXADCEN_AUXADCENOUTPUTDRV_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_AUXADCEN

Definition at line 1692 of file efr32bg21_rac.h .

#define _RAC_AUXADCEN_AUXADCENOUTPUTDRV_Disabled 0x00000000UL

Mode Disabled for RAC_AUXADCEN

Definition at line 1693 of file efr32bg21_rac.h .

#define _RAC_AUXADCEN_AUXADCENOUTPUTDRV_Enabled 0x00000001UL

Mode Enabled for RAC_AUXADCEN

Definition at line 1694 of file efr32bg21_rac.h .

#define _RAC_AUXADCEN_AUXADCENOUTPUTDRV_MASK 0x8UL

Bit mask for RAC_AUXADCENOUTPUTDRV

Definition at line 1691 of file efr32bg21_rac.h .

#define _RAC_AUXADCEN_AUXADCENOUTPUTDRV_SHIFT 3

Shift value for RAC_AUXADCENOUTPUTDRV

Definition at line 1690 of file efr32bg21_rac.h .

#define _RAC_AUXADCEN_AUXADCENPMON_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_AUXADCEN

Definition at line 1701 of file efr32bg21_rac.h .

#define _RAC_AUXADCEN_AUXADCENPMON_Disabled 0x00000000UL

Mode Disabled for RAC_AUXADCEN

Definition at line 1702 of file efr32bg21_rac.h .

#define _RAC_AUXADCEN_AUXADCENPMON_Enabled 0x00000001UL

Mode Enabled for RAC_AUXADCEN

Definition at line 1703 of file efr32bg21_rac.h .

#define _RAC_AUXADCEN_AUXADCENPMON_MASK 0x10UL

Bit mask for RAC_AUXADCENPMON

Definition at line 1700 of file efr32bg21_rac.h .

#define _RAC_AUXADCEN_AUXADCENPMON_SHIFT 4

Shift value for RAC_AUXADCENPMON

Definition at line 1699 of file efr32bg21_rac.h .

#define _RAC_AUXADCEN_AUXADCENRESONDIAGA_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_AUXADCEN

Definition at line 1710 of file efr32bg21_rac.h .

#define _RAC_AUXADCEN_AUXADCENRESONDIAGA_Disabled 0x00000000UL

Mode Disabled for RAC_AUXADCEN

Definition at line 1711 of file efr32bg21_rac.h .

#define _RAC_AUXADCEN_AUXADCENRESONDIAGA_Enabled 0x00000001UL

Mode Enabled for RAC_AUXADCEN

Definition at line 1712 of file efr32bg21_rac.h .

#define _RAC_AUXADCEN_AUXADCENRESONDIAGA_MASK 0x20UL

Bit mask for RAC_AUXADCENRESONDIAGA

Definition at line 1709 of file efr32bg21_rac.h .

#define _RAC_AUXADCEN_AUXADCENRESONDIAGA_SHIFT 5

Shift value for RAC_AUXADCENRESONDIAGA

Definition at line 1708 of file efr32bg21_rac.h .

#define _RAC_AUXADCEN_AUXADCENTSENSE_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_AUXADCEN

Definition at line 1719 of file efr32bg21_rac.h .

#define _RAC_AUXADCEN_AUXADCENTSENSE_Disabled 0x00000000UL

Mode Disabled for RAC_AUXADCEN

Definition at line 1720 of file efr32bg21_rac.h .

#define _RAC_AUXADCEN_AUXADCENTSENSE_Enabled 0x00000001UL

Mode Enabled for RAC_AUXADCEN

Definition at line 1721 of file efr32bg21_rac.h .

#define _RAC_AUXADCEN_AUXADCENTSENSE_MASK 0x40UL

Bit mask for RAC_AUXADCENTSENSE

Definition at line 1718 of file efr32bg21_rac.h .

#define _RAC_AUXADCEN_AUXADCENTSENSE_SHIFT 6

Shift value for RAC_AUXADCENTSENSE

Definition at line 1717 of file efr32bg21_rac.h .

#define _RAC_AUXADCEN_AUXADCENTSENSECAL_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_AUXADCEN

Definition at line 1728 of file efr32bg21_rac.h .

#define _RAC_AUXADCEN_AUXADCENTSENSECAL_Disabled 0x00000000UL

Mode Disabled for RAC_AUXADCEN

Definition at line 1729 of file efr32bg21_rac.h .

#define _RAC_AUXADCEN_AUXADCENTSENSECAL_Enabled 0x00000001UL

Mode Enabled for RAC_AUXADCEN

Definition at line 1730 of file efr32bg21_rac.h .

#define _RAC_AUXADCEN_AUXADCENTSENSECAL_MASK 0x80UL

Bit mask for RAC_AUXADCENTSENSECAL

Definition at line 1727 of file efr32bg21_rac.h .

#define _RAC_AUXADCEN_AUXADCENTSENSECAL_SHIFT 7

Shift value for RAC_AUXADCENTSENSECAL

Definition at line 1726 of file efr32bg21_rac.h .

#define _RAC_AUXADCEN_AUXADCINPUTBUFFERBYPASS_Bypassed 0x00000001UL

Mode Bypassed for RAC_AUXADCEN

Definition at line 1739 of file efr32bg21_rac.h .

#define _RAC_AUXADCEN_AUXADCINPUTBUFFERBYPASS_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_AUXADCEN

Definition at line 1737 of file efr32bg21_rac.h .

#define _RAC_AUXADCEN_AUXADCINPUTBUFFERBYPASS_MASK 0x100UL

Bit mask for RAC_AUXADCINPUTBUFFERBYPASS

Definition at line 1736 of file efr32bg21_rac.h .

#define _RAC_AUXADCEN_AUXADCINPUTBUFFERBYPASS_Not_Bypassed 0x00000000UL

Mode Not_Bypassed for RAC_AUXADCEN

Definition at line 1738 of file efr32bg21_rac.h .

#define _RAC_AUXADCEN_AUXADCINPUTBUFFERBYPASS_SHIFT 8

Shift value for RAC_AUXADCINPUTBUFFERBYPASS

Definition at line 1735 of file efr32bg21_rac.h .

#define _RAC_AUXADCEN_MASK 0x000001FFUL

Mask for RAC_AUXADCEN

Definition at line 1661 of file efr32bg21_rac.h .

#define _RAC_AUXADCEN_RESETVALUE 0x00000000UL

Default value for RAC_AUXADCEN

Definition at line 1660 of file efr32bg21_rac.h .

#define _RAC_AUXADCOUT_AUXADCOUT_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_AUXADCOUT

Definition at line 1857 of file efr32bg21_rac.h .

#define _RAC_AUXADCOUT_AUXADCOUT_MASK 0xFFFFFFFUL

Bit mask for RAC_AUXADCOUT

Definition at line 1856 of file efr32bg21_rac.h .

#define _RAC_AUXADCOUT_AUXADCOUT_SHIFT 0

Shift value for RAC_AUXADCOUT

Definition at line 1855 of file efr32bg21_rac.h .

#define _RAC_AUXADCOUT_MASK 0x0FFFFFFFUL

Mask for RAC_AUXADCOUT

Definition at line 1854 of file efr32bg21_rac.h .

#define _RAC_AUXADCOUT_RESETVALUE 0x00000000UL

Default value for RAC_AUXADCOUT

Definition at line 1853 of file efr32bg21_rac.h .

#define _RAC_AUXADCTRIM_AUXADCCLKINVERT_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_AUXADCTRIM

Definition at line 1501 of file efr32bg21_rac.h .

#define _RAC_AUXADCTRIM_AUXADCCLKINVERT_Disable_Invert 0x00000000UL

Mode Disable_Invert for RAC_AUXADCTRIM

Definition at line 1502 of file efr32bg21_rac.h .

#define _RAC_AUXADCTRIM_AUXADCCLKINVERT_Enable_Invert 0x00000001UL

Mode Enable_Invert for RAC_AUXADCTRIM

Definition at line 1503 of file efr32bg21_rac.h .

#define _RAC_AUXADCTRIM_AUXADCCLKINVERT_MASK 0x1UL

Bit mask for RAC_AUXADCCLKINVERT

Definition at line 1500 of file efr32bg21_rac.h .

#define _RAC_AUXADCTRIM_AUXADCCLKINVERT_SHIFT 0

Shift value for RAC_AUXADCCLKINVERT

Definition at line 1499 of file efr32bg21_rac.h .

#define _RAC_AUXADCTRIM_AUXADCLDOVREFTRIM_DEFAULT 0x00000001UL

Mode DEFAULT for RAC_AUXADCTRIM

Definition at line 1509 of file efr32bg21_rac.h .

#define _RAC_AUXADCTRIM_AUXADCLDOVREFTRIM_MASK 0x6UL

Bit mask for RAC_AUXADCLDOVREFTRIM

Definition at line 1508 of file efr32bg21_rac.h .

#define _RAC_AUXADCTRIM_AUXADCLDOVREFTRIM_SHIFT 1

Shift value for RAC_AUXADCLDOVREFTRIM

Definition at line 1507 of file efr32bg21_rac.h .

#define _RAC_AUXADCTRIM_AUXADCLDOVREFTRIM_TRIM1p27 0x00000000UL

Mode TRIM1p27 for RAC_AUXADCTRIM

Definition at line 1510 of file efr32bg21_rac.h .

#define _RAC_AUXADCTRIM_AUXADCLDOVREFTRIM_TRIM1p3 0x00000001UL

Mode TRIM1p3 for RAC_AUXADCTRIM

Definition at line 1511 of file efr32bg21_rac.h .

#define _RAC_AUXADCTRIM_AUXADCLDOVREFTRIM_TRIM1p35 0x00000002UL

Mode TRIM1p35 for RAC_AUXADCTRIM

Definition at line 1512 of file efr32bg21_rac.h .

#define _RAC_AUXADCTRIM_AUXADCLDOVREFTRIM_TRIM1p4 0x00000003UL

Mode TRIM1p4 for RAC_AUXADCTRIM

Definition at line 1513 of file efr32bg21_rac.h .

#define _RAC_AUXADCTRIM_AUXADCOUTPUTINVERT_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_AUXADCTRIM

Definition at line 1522 of file efr32bg21_rac.h .

#define _RAC_AUXADCTRIM_AUXADCOUTPUTINVERT_Disabled 0x00000000UL

Mode Disabled for RAC_AUXADCTRIM

Definition at line 1523 of file efr32bg21_rac.h .

#define _RAC_AUXADCTRIM_AUXADCOUTPUTINVERT_Enabled 0x00000001UL

Mode Enabled for RAC_AUXADCTRIM

Definition at line 1524 of file efr32bg21_rac.h .

#define _RAC_AUXADCTRIM_AUXADCOUTPUTINVERT_MASK 0x8UL

Bit mask for RAC_AUXADCOUTPUTINVERT

Definition at line 1521 of file efr32bg21_rac.h .

#define _RAC_AUXADCTRIM_AUXADCOUTPUTINVERT_SHIFT 3

Shift value for RAC_AUXADCOUTPUTINVERT

Definition at line 1520 of file efr32bg21_rac.h .

#define _RAC_AUXADCTRIM_AUXADCRCTUNE_DEFAULT 0x00000010UL

Mode DEFAULT for RAC_AUXADCTRIM

Definition at line 1530 of file efr32bg21_rac.h .

#define _RAC_AUXADCTRIM_AUXADCRCTUNE_MASK 0x1F0UL

Bit mask for RAC_AUXADCRCTUNE

Definition at line 1529 of file efr32bg21_rac.h .

#define _RAC_AUXADCTRIM_AUXADCRCTUNE_SHIFT 4

Shift value for RAC_AUXADCRCTUNE

Definition at line 1528 of file efr32bg21_rac.h .

#define _RAC_AUXADCTRIM_AUXADCTRIMADCINPUTRES_DEFAULT 0x00000002UL

Mode DEFAULT for RAC_AUXADCTRIM

Definition at line 1534 of file efr32bg21_rac.h .

#define _RAC_AUXADCTRIM_AUXADCTRIMADCINPUTRES_MASK 0x600UL

Bit mask for RAC_AUXADCTRIMADCINPUTRES

Definition at line 1533 of file efr32bg21_rac.h .

#define _RAC_AUXADCTRIM_AUXADCTRIMADCINPUTRES_RES200k 0x00000000UL

Mode RES200k for RAC_AUXADCTRIM

Definition at line 1535 of file efr32bg21_rac.h .

#define _RAC_AUXADCTRIM_AUXADCTRIMADCINPUTRES_RES250k 0x00000001UL

Mode RES250k for RAC_AUXADCTRIM

Definition at line 1536 of file efr32bg21_rac.h .

#define _RAC_AUXADCTRIM_AUXADCTRIMADCINPUTRES_RES300k 0x00000002UL

Mode RES300k for RAC_AUXADCTRIM

Definition at line 1537 of file efr32bg21_rac.h .

#define _RAC_AUXADCTRIM_AUXADCTRIMADCINPUTRES_RES350k 0x00000003UL

Mode RES350k for RAC_AUXADCTRIM

Definition at line 1538 of file efr32bg21_rac.h .

#define _RAC_AUXADCTRIM_AUXADCTRIMADCINPUTRES_SHIFT 9

Shift value for RAC_AUXADCTRIMADCINPUTRES

Definition at line 1532 of file efr32bg21_rac.h .

#define _RAC_AUXADCTRIM_AUXADCTRIMCURRINPUTBUF_DEFAULT 0x00000002UL

Mode DEFAULT for RAC_AUXADCTRIM

Definition at line 1546 of file efr32bg21_rac.h .

#define _RAC_AUXADCTRIM_AUXADCTRIMCURRINPUTBUF_MASK 0x1800UL

Bit mask for RAC_AUXADCTRIMCURRINPUTBUF

Definition at line 1545 of file efr32bg21_rac.h .

#define _RAC_AUXADCTRIM_AUXADCTRIMCURRINPUTBUF_SHIFT 11

Shift value for RAC_AUXADCTRIMCURRINPUTBUF

Definition at line 1544 of file efr32bg21_rac.h .

#define _RAC_AUXADCTRIM_AUXADCTRIMCURRINPUTBUF_Typ 0x00000002UL

Mode Typ for RAC_AUXADCTRIM

Definition at line 1549 of file efr32bg21_rac.h .

#define _RAC_AUXADCTRIM_AUXADCTRIMCURRINPUTBUF_Typ_minus_20pct 0x00000001UL

Mode Typ_minus_20pct for RAC_AUXADCTRIM

Definition at line 1548 of file efr32bg21_rac.h .

#define _RAC_AUXADCTRIM_AUXADCTRIMCURRINPUTBUF_Typ_minus_40pct 0x00000000UL

Mode Typ_minus_40pct for RAC_AUXADCTRIM

Definition at line 1547 of file efr32bg21_rac.h .

#define _RAC_AUXADCTRIM_AUXADCTRIMCURRINPUTBUF_Typ_plus_20pct 0x00000003UL

Mode Typ_plus_20pct for RAC_AUXADCTRIM

Definition at line 1550 of file efr32bg21_rac.h .

#define _RAC_AUXADCTRIM_AUXADCTRIMCURROPA1_DEFAULT 0x00000002UL

Mode DEFAULT for RAC_AUXADCTRIM

Definition at line 1558 of file efr32bg21_rac.h .

#define _RAC_AUXADCTRIM_AUXADCTRIMCURROPA1_MASK 0x6000UL

Bit mask for RAC_AUXADCTRIMCURROPA1

Definition at line 1557 of file efr32bg21_rac.h .

#define _RAC_AUXADCTRIM_AUXADCTRIMCURROPA1_SHIFT 13

Shift value for RAC_AUXADCTRIMCURROPA1

Definition at line 1556 of file efr32bg21_rac.h .

#define _RAC_AUXADCTRIM_AUXADCTRIMCURROPA1_Typ 0x00000002UL

Mode Typ for RAC_AUXADCTRIM

Definition at line 1561 of file efr32bg21_rac.h .

#define _RAC_AUXADCTRIM_AUXADCTRIMCURROPA1_Typ_minus_20pct 0x00000001UL

Mode Typ_minus_20pct for RAC_AUXADCTRIM

Definition at line 1560 of file efr32bg21_rac.h .

#define _RAC_AUXADCTRIM_AUXADCTRIMCURROPA1_Typ_minus_40pct 0x00000000UL

Mode Typ_minus_40pct for RAC_AUXADCTRIM

Definition at line 1559 of file efr32bg21_rac.h .

#define _RAC_AUXADCTRIM_AUXADCTRIMCURROPA1_Typ_plus_20pct 0x00000003UL

Mode Typ_plus_20pct for RAC_AUXADCTRIM

Definition at line 1562 of file efr32bg21_rac.h .

#define _RAC_AUXADCTRIM_AUXADCTRIMCURROPA2_DEFAULT 0x00000002UL

Mode DEFAULT for RAC_AUXADCTRIM

Definition at line 1570 of file efr32bg21_rac.h .

#define _RAC_AUXADCTRIM_AUXADCTRIMCURROPA2_MASK 0x18000UL

Bit mask for RAC_AUXADCTRIMCURROPA2

Definition at line 1569 of file efr32bg21_rac.h .

#define _RAC_AUXADCTRIM_AUXADCTRIMCURROPA2_SHIFT 15

Shift value for RAC_AUXADCTRIMCURROPA2

Definition at line 1568 of file efr32bg21_rac.h .

#define _RAC_AUXADCTRIM_AUXADCTRIMCURROPA2_Typ 0x00000002UL

Mode Typ for RAC_AUXADCTRIM

Definition at line 1573 of file efr32bg21_rac.h .

#define _RAC_AUXADCTRIM_AUXADCTRIMCURROPA2_Typ_minus_20pct 0x00000001UL

Mode Typ_minus_20pct for RAC_AUXADCTRIM

Definition at line 1572 of file efr32bg21_rac.h .

#define _RAC_AUXADCTRIM_AUXADCTRIMCURROPA2_Typ_minus_40pct 0x00000000UL

Mode Typ_minus_40pct for RAC_AUXADCTRIM

Definition at line 1571 of file efr32bg21_rac.h .

#define _RAC_AUXADCTRIM_AUXADCTRIMCURROPA2_Typ_plus_20pct 0x00000003UL

Mode Typ_plus_20pct for RAC_AUXADCTRIM

Definition at line 1574 of file efr32bg21_rac.h .

#define _RAC_AUXADCTRIM_AUXADCTRIMCURRREFBUF_DEFAULT 0x00000002UL

Mode DEFAULT for RAC_AUXADCTRIM

Definition at line 1582 of file efr32bg21_rac.h .

#define _RAC_AUXADCTRIM_AUXADCTRIMCURRREFBUF_MASK 0x60000UL

Bit mask for RAC_AUXADCTRIMCURRREFBUF

Definition at line 1581 of file efr32bg21_rac.h .

#define _RAC_AUXADCTRIM_AUXADCTRIMCURRREFBUF_SHIFT 17

Shift value for RAC_AUXADCTRIMCURRREFBUF

Definition at line 1580 of file efr32bg21_rac.h .

#define _RAC_AUXADCTRIM_AUXADCTRIMCURRREFBUF_Typ 0x00000002UL

Mode Typ for RAC_AUXADCTRIM

Definition at line 1585 of file efr32bg21_rac.h .

#define _RAC_AUXADCTRIM_AUXADCTRIMCURRREFBUF_Typ_minus_20pct 0x00000001UL

Mode Typ_minus_20pct for RAC_AUXADCTRIM

Definition at line 1584 of file efr32bg21_rac.h .

#define _RAC_AUXADCTRIM_AUXADCTRIMCURRREFBUF_Typ_minus_40pct 0x00000000UL

Mode Typ_minus_40pct for RAC_AUXADCTRIM

Definition at line 1583 of file efr32bg21_rac.h .

#define _RAC_AUXADCTRIM_AUXADCTRIMCURRREFBUF_Typ_plus_20pct 0x00000003UL

Mode Typ_plus_20pct for RAC_AUXADCTRIM

Definition at line 1586 of file efr32bg21_rac.h .

#define _RAC_AUXADCTRIM_AUXADCTRIMCURRTSENSE_DEFAULT 0x00000002UL

Mode DEFAULT for RAC_AUXADCTRIM

Definition at line 1594 of file efr32bg21_rac.h .

#define _RAC_AUXADCTRIM_AUXADCTRIMCURRTSENSE_MASK 0x180000UL

Bit mask for RAC_AUXADCTRIMCURRTSENSE

Definition at line 1593 of file efr32bg21_rac.h .

#define _RAC_AUXADCTRIM_AUXADCTRIMCURRTSENSE_SHIFT 19

Shift value for RAC_AUXADCTRIMCURRTSENSE

Definition at line 1592 of file efr32bg21_rac.h .

#define _RAC_AUXADCTRIM_AUXADCTRIMCURRTSENSE_Typ 0x00000002UL

Mode Typ for RAC_AUXADCTRIM

Definition at line 1597 of file efr32bg21_rac.h .

#define _RAC_AUXADCTRIM_AUXADCTRIMCURRTSENSE_Typ_minus_20pct 0x00000001UL

Mode Typ_minus_20pct for RAC_AUXADCTRIM

Definition at line 1596 of file efr32bg21_rac.h .

#define _RAC_AUXADCTRIM_AUXADCTRIMCURRTSENSE_Typ_minus_40pct 0x00000000UL

Mode Typ_minus_40pct for RAC_AUXADCTRIM

Definition at line 1595 of file efr32bg21_rac.h .

#define _RAC_AUXADCTRIM_AUXADCTRIMCURRTSENSE_Typ_plus_20pct 0x00000003UL

Mode Typ_plus_20pct for RAC_AUXADCTRIM

Definition at line 1598 of file efr32bg21_rac.h .

#define _RAC_AUXADCTRIM_AUXADCTRIMCURRVCMBUF_DEFAULT 0x00000002UL

Mode DEFAULT for RAC_AUXADCTRIM

Definition at line 1606 of file efr32bg21_rac.h .

#define _RAC_AUXADCTRIM_AUXADCTRIMCURRVCMBUF_MASK 0x600000UL

Bit mask for RAC_AUXADCTRIMCURRVCMBUF

Definition at line 1605 of file efr32bg21_rac.h .

#define _RAC_AUXADCTRIM_AUXADCTRIMCURRVCMBUF_SHIFT 21

Shift value for RAC_AUXADCTRIMCURRVCMBUF

Definition at line 1604 of file efr32bg21_rac.h .

#define _RAC_AUXADCTRIM_AUXADCTRIMCURRVCMBUF_Typ 0x00000002UL

Mode Typ for RAC_AUXADCTRIM

Definition at line 1609 of file efr32bg21_rac.h .

#define _RAC_AUXADCTRIM_AUXADCTRIMCURRVCMBUF_Typ_minus_20pct 0x00000001UL

Mode Typ_minus_20pct for RAC_AUXADCTRIM

Definition at line 1608 of file efr32bg21_rac.h .

#define _RAC_AUXADCTRIM_AUXADCTRIMCURRVCMBUF_Typ_minus_40pct 0x00000000UL

Mode Typ_minus_40pct for RAC_AUXADCTRIM

Definition at line 1607 of file efr32bg21_rac.h .

#define _RAC_AUXADCTRIM_AUXADCTRIMCURRVCMBUF_Typ_plus_20pct 0x00000003UL

Mode Typ_plus_20pct for RAC_AUXADCTRIM

Definition at line 1610 of file efr32bg21_rac.h .

#define _RAC_AUXADCTRIM_AUXADCTRIMLDOHIGHCURRENT_DEFAULT 0x00000001UL

Mode DEFAULT for RAC_AUXADCTRIM

Definition at line 1619 of file efr32bg21_rac.h .

#define _RAC_AUXADCTRIM_AUXADCTRIMLDOHIGHCURRENT_HighCurrentMode 0x00000001UL

Mode HighCurrentMode for RAC_AUXADCTRIM

Definition at line 1621 of file efr32bg21_rac.h .

#define _RAC_AUXADCTRIM_AUXADCTRIMLDOHIGHCURRENT_LowCurrentMode 0x00000000UL

Mode LowCurrentMode for RAC_AUXADCTRIM

Definition at line 1620 of file efr32bg21_rac.h .

#define _RAC_AUXADCTRIM_AUXADCTRIMLDOHIGHCURRENT_MASK 0x800000UL

Bit mask for RAC_AUXADCTRIMLDOHIGHCURRENT

Definition at line 1618 of file efr32bg21_rac.h .

#define _RAC_AUXADCTRIM_AUXADCTRIMLDOHIGHCURRENT_SHIFT 23

Shift value for RAC_AUXADCTRIMLDOHIGHCURRENT

Definition at line 1617 of file efr32bg21_rac.h .

#define _RAC_AUXADCTRIM_AUXADCTRIMREFP_DEFAULT 0x00000002UL

Mode DEFAULT for RAC_AUXADCTRIM

Definition at line 1627 of file efr32bg21_rac.h .

#define _RAC_AUXADCTRIM_AUXADCTRIMREFP_MASK 0x3000000UL

Bit mask for RAC_AUXADCTRIMREFP

Definition at line 1626 of file efr32bg21_rac.h .

#define _RAC_AUXADCTRIM_AUXADCTRIMREFP_REF1p05 0x00000000UL

Mode REF1p05 for RAC_AUXADCTRIM

Definition at line 1628 of file efr32bg21_rac.h .

#define _RAC_AUXADCTRIM_AUXADCTRIMREFP_REF1p16 0x00000001UL

Mode REF1p16 for RAC_AUXADCTRIM

Definition at line 1629 of file efr32bg21_rac.h .

#define _RAC_AUXADCTRIM_AUXADCTRIMREFP_REF1p2 0x00000002UL

Mode REF1p2 for RAC_AUXADCTRIM

Definition at line 1630 of file efr32bg21_rac.h .

#define _RAC_AUXADCTRIM_AUXADCTRIMREFP_REF1p25 0x00000003UL

Mode REF1p25 for RAC_AUXADCTRIM

Definition at line 1631 of file efr32bg21_rac.h .

#define _RAC_AUXADCTRIM_AUXADCTRIMREFP_SHIFT 24

Shift value for RAC_AUXADCTRIMREFP

Definition at line 1625 of file efr32bg21_rac.h .

#define _RAC_AUXADCTRIM_AUXADCTRIMVREFVCM_DEFAULT 0x00000001UL

Mode DEFAULT for RAC_AUXADCTRIM

Definition at line 1639 of file efr32bg21_rac.h .

#define _RAC_AUXADCTRIM_AUXADCTRIMVREFVCM_MASK 0xC000000UL

Bit mask for RAC_AUXADCTRIMVREFVCM

Definition at line 1638 of file efr32bg21_rac.h .

#define _RAC_AUXADCTRIM_AUXADCTRIMVREFVCM_SHIFT 26

Shift value for RAC_AUXADCTRIMVREFVCM

Definition at line 1637 of file efr32bg21_rac.h .

#define _RAC_AUXADCTRIM_AUXADCTRIMVREFVCM_Trim0p6 0x00000000UL

Mode Trim0p6 for RAC_AUXADCTRIM

Definition at line 1640 of file efr32bg21_rac.h .

#define _RAC_AUXADCTRIM_AUXADCTRIMVREFVCM_Trim0p65 0x00000001UL

Mode Trim0p65 for RAC_AUXADCTRIM

Definition at line 1641 of file efr32bg21_rac.h .

#define _RAC_AUXADCTRIM_AUXADCTRIMVREFVCM_Trim0p7 0x00000002UL

Mode Trim0p7 for RAC_AUXADCTRIM

Definition at line 1642 of file efr32bg21_rac.h .

#define _RAC_AUXADCTRIM_AUXADCTRIMVREFVCM_Trim0p75 0x00000003UL

Mode Trim0p75 for RAC_AUXADCTRIM

Definition at line 1643 of file efr32bg21_rac.h .

#define _RAC_AUXADCTRIM_AUXADCTSENSETRIMVBE2_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_AUXADCTRIM

Definition at line 1652 of file efr32bg21_rac.h .

#define _RAC_AUXADCTRIM_AUXADCTSENSETRIMVBE2_MASK 0x10000000UL

Bit mask for RAC_AUXADCTSENSETRIMVBE2

Definition at line 1651 of file efr32bg21_rac.h .

#define _RAC_AUXADCTRIM_AUXADCTSENSETRIMVBE2_SHIFT 28

Shift value for RAC_AUXADCTSENSETRIMVBE2

Definition at line 1650 of file efr32bg21_rac.h .

#define _RAC_AUXADCTRIM_AUXADCTSENSETRIMVBE2_VBE_16uA 0x00000000UL

Mode VBE_16uA for RAC_AUXADCTRIM

Definition at line 1653 of file efr32bg21_rac.h .

#define _RAC_AUXADCTRIM_AUXADCTSENSETRIMVBE2_VBE_32uA 0x00000001UL

Mode VBE_32uA for RAC_AUXADCTRIM

Definition at line 1654 of file efr32bg21_rac.h .

#define _RAC_AUXADCTRIM_MASK 0x1FFFFFFFUL

Mask for RAC_AUXADCTRIM

Definition at line 1497 of file efr32bg21_rac.h .

#define _RAC_AUXADCTRIM_RESETVALUE 0x06D55502UL

Default value for RAC_AUXADCTRIM

Definition at line 1496 of file efr32bg21_rac.h .

#define _RAC_BREAKPOINT_BKPADDR_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_BREAKPOINT

Definition at line 980 of file efr32bg21_rac.h .

#define _RAC_BREAKPOINT_BKPADDR_MASK 0xFFFFFFFFUL

Bit mask for RAC_BKPADDR

Definition at line 979 of file efr32bg21_rac.h .

#define _RAC_BREAKPOINT_BKPADDR_SHIFT 0

Shift value for RAC_BKPADDR

Definition at line 978 of file efr32bg21_rac.h .

#define _RAC_BREAKPOINT_MASK 0xFFFFFFFFUL

Mask for RAC_BREAKPOINT

Definition at line 977 of file efr32bg21_rac.h .

#define _RAC_BREAKPOINT_RESETVALUE 0x00000000UL

Default value for RAC_BREAKPOINT

Definition at line 976 of file efr32bg21_rac.h .

#define _RAC_CLKMULTCTRL_CLKMULTDIVN_DEFAULT 0x00000040UL

Mode DEFAULT for RAC_CLKMULTCTRL

Definition at line 2102 of file efr32bg21_rac.h .

#define _RAC_CLKMULTCTRL_CLKMULTDIVN_MASK 0x7FUL

Bit mask for RAC_CLKMULTDIVN

Definition at line 2101 of file efr32bg21_rac.h .

#define _RAC_CLKMULTCTRL_CLKMULTDIVN_SHIFT 0

Shift value for RAC_CLKMULTDIVN

Definition at line 2100 of file efr32bg21_rac.h .

#define _RAC_CLKMULTCTRL_CLKMULTDIVR_DEFAULT 0x00000001UL

Mode DEFAULT for RAC_CLKMULTCTRL

Definition at line 2106 of file efr32bg21_rac.h .

#define _RAC_CLKMULTCTRL_CLKMULTDIVR_MASK 0x380UL

Bit mask for RAC_CLKMULTDIVR

Definition at line 2105 of file efr32bg21_rac.h .

#define _RAC_CLKMULTCTRL_CLKMULTDIVR_SHIFT 7

Shift value for RAC_CLKMULTDIVR

Definition at line 2104 of file efr32bg21_rac.h .

#define _RAC_CLKMULTCTRL_CLKMULTDIVX_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_CLKMULTCTRL

Definition at line 2110 of file efr32bg21_rac.h .

#define _RAC_CLKMULTCTRL_CLKMULTDIVX_div10 0x00000005UL

Mode div10 for RAC_CLKMULTCTRL

Definition at line 2116 of file efr32bg21_rac.h .

#define _RAC_CLKMULTCTRL_CLKMULTDIVX_div12 0x00000006UL

Mode div12 for RAC_CLKMULTCTRL

Definition at line 2117 of file efr32bg21_rac.h .

#define _RAC_CLKMULTCTRL_CLKMULTDIVX_div14 0x00000007UL

Mode div14 for RAC_CLKMULTCTRL

Definition at line 2118 of file efr32bg21_rac.h .

#define _RAC_CLKMULTCTRL_CLKMULTDIVX_div_1 0x00000000UL

Mode div_1 for RAC_CLKMULTCTRL

Definition at line 2111 of file efr32bg21_rac.h .

#define _RAC_CLKMULTCTRL_CLKMULTDIVX_div_2 0x00000001UL

Mode div_2 for RAC_CLKMULTCTRL

Definition at line 2112 of file efr32bg21_rac.h .

#define _RAC_CLKMULTCTRL_CLKMULTDIVX_div_4 0x00000002UL

Mode div_4 for RAC_CLKMULTCTRL

Definition at line 2113 of file efr32bg21_rac.h .

#define _RAC_CLKMULTCTRL_CLKMULTDIVX_div_6 0x00000003UL

Mode div_6 for RAC_CLKMULTCTRL

Definition at line 2114 of file efr32bg21_rac.h .

#define _RAC_CLKMULTCTRL_CLKMULTDIVX_div_8 0x00000004UL

Mode div_8 for RAC_CLKMULTCTRL

Definition at line 2115 of file efr32bg21_rac.h .

#define _RAC_CLKMULTCTRL_CLKMULTDIVX_MASK 0x1C00UL

Bit mask for RAC_CLKMULTDIVX

Definition at line 2109 of file efr32bg21_rac.h .

#define _RAC_CLKMULTCTRL_CLKMULTDIVX_SHIFT 10

Shift value for RAC_CLKMULTDIVX

Definition at line 2108 of file efr32bg21_rac.h .

#define _RAC_CLKMULTCTRL_CLKMULTENRESYNC_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_CLKMULTCTRL

Definition at line 2131 of file efr32bg21_rac.h .

#define _RAC_CLKMULTCTRL_CLKMULTENRESYNC_disable_sync 0x00000000UL

Mode disable_sync for RAC_CLKMULTCTRL

Definition at line 2132 of file efr32bg21_rac.h .

#define _RAC_CLKMULTCTRL_CLKMULTENRESYNC_enable_sync 0x00000001UL

Mode enable_sync for RAC_CLKMULTCTRL

Definition at line 2133 of file efr32bg21_rac.h .

#define _RAC_CLKMULTCTRL_CLKMULTENRESYNC_MASK 0x2000UL

Bit mask for RAC_CLKMULTENRESYNC

Definition at line 2130 of file efr32bg21_rac.h .

#define _RAC_CLKMULTCTRL_CLKMULTENRESYNC_SHIFT 13

Shift value for RAC_CLKMULTENRESYNC

Definition at line 2129 of file efr32bg21_rac.h .

#define _RAC_CLKMULTCTRL_CLKMULTVALID_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_CLKMULTCTRL

Definition at line 2140 of file efr32bg21_rac.h .

#define _RAC_CLKMULTCTRL_CLKMULTVALID_invalid 0x00000000UL

Mode invalid for RAC_CLKMULTCTRL

Definition at line 2141 of file efr32bg21_rac.h .

#define _RAC_CLKMULTCTRL_CLKMULTVALID_MASK 0x4000UL

Bit mask for RAC_CLKMULTVALID

Definition at line 2139 of file efr32bg21_rac.h .

#define _RAC_CLKMULTCTRL_CLKMULTVALID_SHIFT 14

Shift value for RAC_CLKMULTVALID

Definition at line 2138 of file efr32bg21_rac.h .

#define _RAC_CLKMULTCTRL_CLKMULTVALID_valid 0x00000001UL

Mode valid for RAC_CLKMULTCTRL

Definition at line 2142 of file efr32bg21_rac.h .

#define _RAC_CLKMULTCTRL_MASK 0x00007FFFUL

Mask for RAC_CLKMULTCTRL

Definition at line 2099 of file efr32bg21_rac.h .

#define _RAC_CLKMULTCTRL_RESETVALUE 0x000000C0UL

Default value for RAC_CLKMULTCTRL

Definition at line 2098 of file efr32bg21_rac.h .

#define _RAC_CLKMULTEN0_CLKMULTBWCAL_bw_1lsb 0x00000000UL

Mode bw_1lsb for RAC_CLKMULTEN0

Definition at line 1866 of file efr32bg21_rac.h .

#define _RAC_CLKMULTEN0_CLKMULTBWCAL_bw_2lsb 0x00000001UL

Mode bw_2lsb for RAC_CLKMULTEN0

Definition at line 1867 of file efr32bg21_rac.h .

#define _RAC_CLKMULTEN0_CLKMULTBWCAL_bw_3lsb 0x00000002UL

Mode bw_3lsb for RAC_CLKMULTEN0

Definition at line 1868 of file efr32bg21_rac.h .

#define _RAC_CLKMULTEN0_CLKMULTBWCAL_bw_4lsb 0x00000003UL

Mode bw_4lsb for RAC_CLKMULTEN0

Definition at line 1869 of file efr32bg21_rac.h .

#define _RAC_CLKMULTEN0_CLKMULTBWCAL_DEFAULT 0x00000001UL

Mode DEFAULT for RAC_CLKMULTEN0

Definition at line 1865 of file efr32bg21_rac.h .

#define _RAC_CLKMULTEN0_CLKMULTBWCAL_MASK 0x3UL

Bit mask for RAC_CLKMULTBWCAL

Definition at line 1864 of file efr32bg21_rac.h .

#define _RAC_CLKMULTEN0_CLKMULTBWCAL_SHIFT 0

Shift value for RAC_CLKMULTBWCAL

Definition at line 1863 of file efr32bg21_rac.h .

#define _RAC_CLKMULTEN0_CLKMULTDISICO_DEFAULT 0x00000001UL

Mode DEFAULT for RAC_CLKMULTEN0

Definition at line 1878 of file efr32bg21_rac.h .

#define _RAC_CLKMULTEN0_CLKMULTDISICO_disable 0x00000001UL

Mode disable for RAC_CLKMULTEN0

Definition at line 1880 of file efr32bg21_rac.h .

#define _RAC_CLKMULTEN0_CLKMULTDISICO_enable 0x00000000UL

Mode enable for RAC_CLKMULTEN0

Definition at line 1879 of file efr32bg21_rac.h .

#define _RAC_CLKMULTEN0_CLKMULTDISICO_MASK 0x4UL

Bit mask for RAC_CLKMULTDISICO

Definition at line 1877 of file efr32bg21_rac.h .

#define _RAC_CLKMULTEN0_CLKMULTDISICO_SHIFT 2

Shift value for RAC_CLKMULTDISICO

Definition at line 1876 of file efr32bg21_rac.h .

#define _RAC_CLKMULTEN0_CLKMULTENBBDET_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_CLKMULTEN0

Definition at line 1887 of file efr32bg21_rac.h .

#define _RAC_CLKMULTEN0_CLKMULTENBBDET_disable 0x00000000UL

Mode disable for RAC_CLKMULTEN0

Definition at line 1888 of file efr32bg21_rac.h .

#define _RAC_CLKMULTEN0_CLKMULTENBBDET_enable 0x00000001UL

Mode enable for RAC_CLKMULTEN0

Definition at line 1889 of file efr32bg21_rac.h .

#define _RAC_CLKMULTEN0_CLKMULTENBBDET_MASK 0x8UL

Bit mask for RAC_CLKMULTENBBDET

Definition at line 1886 of file efr32bg21_rac.h .

#define _RAC_CLKMULTEN0_CLKMULTENBBDET_SHIFT 3

Shift value for RAC_CLKMULTENBBDET

Definition at line 1885 of file efr32bg21_rac.h .

#define _RAC_CLKMULTEN0_CLKMULTENBBXLDET_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_CLKMULTEN0

Definition at line 1896 of file efr32bg21_rac.h .

#define _RAC_CLKMULTEN0_CLKMULTENBBXLDET_disable 0x00000000UL

Mode disable for RAC_CLKMULTEN0

Definition at line 1897 of file efr32bg21_rac.h .

#define _RAC_CLKMULTEN0_CLKMULTENBBXLDET_enable 0x00000001UL

Mode enable for RAC_CLKMULTEN0

Definition at line 1898 of file efr32bg21_rac.h .

#define _RAC_CLKMULTEN0_CLKMULTENBBXLDET_MASK 0x10UL

Bit mask for RAC_CLKMULTENBBXLDET

Definition at line 1895 of file efr32bg21_rac.h .

#define _RAC_CLKMULTEN0_CLKMULTENBBXLDET_SHIFT 4

Shift value for RAC_CLKMULTENBBXLDET

Definition at line 1894 of file efr32bg21_rac.h .

#define _RAC_CLKMULTEN0_CLKMULTENBBXMDET_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_CLKMULTEN0

Definition at line 1905 of file efr32bg21_rac.h .

#define _RAC_CLKMULTEN0_CLKMULTENBBXMDET_disable 0x00000000UL

Mode disable for RAC_CLKMULTEN0

Definition at line 1906 of file efr32bg21_rac.h .

#define _RAC_CLKMULTEN0_CLKMULTENBBXMDET_enable 0x00000001UL

Mode enable for RAC_CLKMULTEN0

Definition at line 1907 of file efr32bg21_rac.h .

#define _RAC_CLKMULTEN0_CLKMULTENBBXMDET_MASK 0x20UL

Bit mask for RAC_CLKMULTENBBXMDET

Definition at line 1904 of file efr32bg21_rac.h .

#define _RAC_CLKMULTEN0_CLKMULTENBBXMDET_SHIFT 5

Shift value for RAC_CLKMULTENBBXMDET

Definition at line 1903 of file efr32bg21_rac.h .

#define _RAC_CLKMULTEN0_CLKMULTENCFDET_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_CLKMULTEN0

Definition at line 1914 of file efr32bg21_rac.h .

#define _RAC_CLKMULTEN0_CLKMULTENCFDET_disable 0x00000000UL

Mode disable for RAC_CLKMULTEN0

Definition at line 1915 of file efr32bg21_rac.h .

#define _RAC_CLKMULTEN0_CLKMULTENCFDET_enable 0x00000001UL

Mode enable for RAC_CLKMULTEN0

Definition at line 1916 of file efr32bg21_rac.h .

#define _RAC_CLKMULTEN0_CLKMULTENCFDET_MASK 0x40UL

Bit mask for RAC_CLKMULTENCFDET

Definition at line 1913 of file efr32bg21_rac.h .

#define _RAC_CLKMULTEN0_CLKMULTENCFDET_SHIFT 6

Shift value for RAC_CLKMULTENCFDET

Definition at line 1912 of file efr32bg21_rac.h .

#define _RAC_CLKMULTEN0_CLKMULTENDITHER_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_CLKMULTEN0

Definition at line 1923 of file efr32bg21_rac.h .

#define _RAC_CLKMULTEN0_CLKMULTENDITHER_disable 0x00000000UL

Mode disable for RAC_CLKMULTEN0

Definition at line 1924 of file efr32bg21_rac.h .

#define _RAC_CLKMULTEN0_CLKMULTENDITHER_enable 0x00000001UL

Mode enable for RAC_CLKMULTEN0

Definition at line 1925 of file efr32bg21_rac.h .

#define _RAC_CLKMULTEN0_CLKMULTENDITHER_MASK 0x80UL

Bit mask for RAC_CLKMULTENDITHER

Definition at line 1922 of file efr32bg21_rac.h .

#define _RAC_CLKMULTEN0_CLKMULTENDITHER_SHIFT 7

Shift value for RAC_CLKMULTENDITHER

Definition at line 1921 of file efr32bg21_rac.h .

#define _RAC_CLKMULTEN0_CLKMULTENDRVADC_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_CLKMULTEN0

Definition at line 1932 of file efr32bg21_rac.h .

#define _RAC_CLKMULTEN0_CLKMULTENDRVADC_disable 0x00000000UL

Mode disable for RAC_CLKMULTEN0

Definition at line 1933 of file efr32bg21_rac.h .

#define _RAC_CLKMULTEN0_CLKMULTENDRVADC_enable 0x00000001UL

Mode enable for RAC_CLKMULTEN0

Definition at line 1934 of file efr32bg21_rac.h .

#define _RAC_CLKMULTEN0_CLKMULTENDRVADC_MASK 0x100UL

Bit mask for RAC_CLKMULTENDRVADC

Definition at line 1931 of file efr32bg21_rac.h .

#define _RAC_CLKMULTEN0_CLKMULTENDRVADC_SHIFT 8

Shift value for RAC_CLKMULTENDRVADC

Definition at line 1930 of file efr32bg21_rac.h .

#define _RAC_CLKMULTEN0_CLKMULTENDRVDIFF_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_CLKMULTEN0

Definition at line 1941 of file efr32bg21_rac.h .

#define _RAC_CLKMULTEN0_CLKMULTENDRVDIFF_Differential 0x00000001UL

Mode Differential for RAC_CLKMULTEN0

Definition at line 1943 of file efr32bg21_rac.h .

#define _RAC_CLKMULTEN0_CLKMULTENDRVDIFF_MASK 0x200UL

Bit mask for RAC_CLKMULTENDRVDIFF

Definition at line 1940 of file efr32bg21_rac.h .

#define _RAC_CLKMULTEN0_CLKMULTENDRVDIFF_SHIFT 9

Shift value for RAC_CLKMULTENDRVDIFF

Definition at line 1939 of file efr32bg21_rac.h .

#define _RAC_CLKMULTEN0_CLKMULTENDRVDIFF_Single_ended 0x00000000UL

Mode Single_ended for RAC_CLKMULTEN0

Definition at line 1942 of file efr32bg21_rac.h .

#define _RAC_CLKMULTEN0_CLKMULTENDRVRX2P4G_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_CLKMULTEN0

Definition at line 1950 of file efr32bg21_rac.h .

#define _RAC_CLKMULTEN0_CLKMULTENDRVRX2P4G_disable 0x00000000UL

Mode disable for RAC_CLKMULTEN0

Definition at line 1951 of file efr32bg21_rac.h .

#define _RAC_CLKMULTEN0_CLKMULTENDRVRX2P4G_enable 0x00000001UL

Mode enable for RAC_CLKMULTEN0

Definition at line 1952 of file efr32bg21_rac.h .

#define _RAC_CLKMULTEN0_CLKMULTENDRVRX2P4G_MASK 0x400UL

Bit mask for RAC_CLKMULTENDRVRX2P4G

Definition at line 1949 of file efr32bg21_rac.h .

#define _RAC_CLKMULTEN0_CLKMULTENDRVRX2P4G_SHIFT 10

Shift value for RAC_CLKMULTENDRVRX2P4G

Definition at line 1948 of file efr32bg21_rac.h .

#define _RAC_CLKMULTEN0_CLKMULTENFBDIV_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_CLKMULTEN0

Definition at line 1959 of file efr32bg21_rac.h .

#define _RAC_CLKMULTEN0_CLKMULTENFBDIV_disable 0x00000000UL

Mode disable for RAC_CLKMULTEN0

Definition at line 1960 of file efr32bg21_rac.h .

#define _RAC_CLKMULTEN0_CLKMULTENFBDIV_enable 0x00000001UL

Mode enable for RAC_CLKMULTEN0

Definition at line 1961 of file efr32bg21_rac.h .

#define _RAC_CLKMULTEN0_CLKMULTENFBDIV_MASK 0x2000UL

Bit mask for RAC_CLKMULTENFBDIV

Definition at line 1958 of file efr32bg21_rac.h .

#define _RAC_CLKMULTEN0_CLKMULTENFBDIV_SHIFT 13

Shift value for RAC_CLKMULTENFBDIV

Definition at line 1957 of file efr32bg21_rac.h .

#define _RAC_CLKMULTEN0_CLKMULTENREFDIV_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_CLKMULTEN0

Definition at line 1968 of file efr32bg21_rac.h .

#define _RAC_CLKMULTEN0_CLKMULTENREFDIV_disable 0x00000000UL

Mode disable for RAC_CLKMULTEN0

Definition at line 1969 of file efr32bg21_rac.h .

#define _RAC_CLKMULTEN0_CLKMULTENREFDIV_enable 0x00000001UL

Mode enable for RAC_CLKMULTEN0

Definition at line 1970 of file efr32bg21_rac.h .

#define _RAC_CLKMULTEN0_CLKMULTENREFDIV_MASK 0x4000UL

Bit mask for RAC_CLKMULTENREFDIV

Definition at line 1967 of file efr32bg21_rac.h .

#define _RAC_CLKMULTEN0_CLKMULTENREFDIV_SHIFT 14

Shift value for RAC_CLKMULTENREFDIV

Definition at line 1966 of file efr32bg21_rac.h .

#define _RAC_CLKMULTEN0_CLKMULTENREG1_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_CLKMULTEN0

Definition at line 1977 of file efr32bg21_rac.h .

#define _RAC_CLKMULTEN0_CLKMULTENREG1_disable 0x00000000UL

Mode disable for RAC_CLKMULTEN0

Definition at line 1978 of file efr32bg21_rac.h .

#define _RAC_CLKMULTEN0_CLKMULTENREG1_enable 0x00000001UL

Mode enable for RAC_CLKMULTEN0

Definition at line 1979 of file efr32bg21_rac.h .

#define _RAC_CLKMULTEN0_CLKMULTENREG1_MASK 0x8000UL

Bit mask for RAC_CLKMULTENREG1

Definition at line 1976 of file efr32bg21_rac.h .

#define _RAC_CLKMULTEN0_CLKMULTENREG1_SHIFT 15

Shift value for RAC_CLKMULTENREG1

Definition at line 1975 of file efr32bg21_rac.h .

#define _RAC_CLKMULTEN0_CLKMULTENREG2_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_CLKMULTEN0

Definition at line 1986 of file efr32bg21_rac.h .

#define _RAC_CLKMULTEN0_CLKMULTENREG2_disable 0x00000000UL

Mode disable for RAC_CLKMULTEN0

Definition at line 1987 of file efr32bg21_rac.h .

#define _RAC_CLKMULTEN0_CLKMULTENREG2_enable 0x00000001UL

Mode enable for RAC_CLKMULTEN0

Definition at line 1988 of file efr32bg21_rac.h .

#define _RAC_CLKMULTEN0_CLKMULTENREG2_MASK 0x10000UL

Bit mask for RAC_CLKMULTENREG2

Definition at line 1985 of file efr32bg21_rac.h .

#define _RAC_CLKMULTEN0_CLKMULTENREG2_SHIFT 16

Shift value for RAC_CLKMULTENREG2

Definition at line 1984 of file efr32bg21_rac.h .

#define _RAC_CLKMULTEN0_CLKMULTENROTDET_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_CLKMULTEN0

Definition at line 1995 of file efr32bg21_rac.h .

#define _RAC_CLKMULTEN0_CLKMULTENROTDET_disable 0x00000000UL

Mode disable for RAC_CLKMULTEN0

Definition at line 1996 of file efr32bg21_rac.h .

#define _RAC_CLKMULTEN0_CLKMULTENROTDET_enable 0x00000001UL

Mode enable for RAC_CLKMULTEN0

Definition at line 1997 of file efr32bg21_rac.h .

#define _RAC_CLKMULTEN0_CLKMULTENROTDET_MASK 0x20000UL

Bit mask for RAC_CLKMULTENROTDET

Definition at line 1994 of file efr32bg21_rac.h .

#define _RAC_CLKMULTEN0_CLKMULTENROTDET_SHIFT 17

Shift value for RAC_CLKMULTENROTDET

Definition at line 1993 of file efr32bg21_rac.h .

#define _RAC_CLKMULTEN0_CLKMULTFREQCAL_DEFAULT 0x00000001UL

Mode DEFAULT for RAC_CLKMULTEN0

Definition at line 2003 of file efr32bg21_rac.h .

#define _RAC_CLKMULTEN0_CLKMULTFREQCAL_MASK 0xC0000UL

Bit mask for RAC_CLKMULTFREQCAL

Definition at line 2002 of file efr32bg21_rac.h .

#define _RAC_CLKMULTEN0_CLKMULTFREQCAL_pedes_14uA 0x00000000UL

Mode pedes_14uA for RAC_CLKMULTEN0

Definition at line 2004 of file efr32bg21_rac.h .

#define _RAC_CLKMULTEN0_CLKMULTFREQCAL_pedes_22uA 0x00000001UL

Mode pedes_22uA for RAC_CLKMULTEN0

Definition at line 2005 of file efr32bg21_rac.h .

#define _RAC_CLKMULTEN0_CLKMULTFREQCAL_pedes_30uA 0x00000002UL

Mode pedes_30uA for RAC_CLKMULTEN0

Definition at line 2006 of file efr32bg21_rac.h .

#define _RAC_CLKMULTEN0_CLKMULTFREQCAL_pedes_38uA 0x00000003UL

Mode pedes_38uA for RAC_CLKMULTEN0

Definition at line 2007 of file efr32bg21_rac.h .

#define _RAC_CLKMULTEN0_CLKMULTFREQCAL_SHIFT 18

Shift value for RAC_CLKMULTFREQCAL

Definition at line 2001 of file efr32bg21_rac.h .

#define _RAC_CLKMULTEN0_CLKMULTREG1ADJV_DEFAULT 0x00000002UL

Mode DEFAULT for RAC_CLKMULTEN0

Definition at line 2015 of file efr32bg21_rac.h .

#define _RAC_CLKMULTEN0_CLKMULTREG1ADJV_MASK 0x300000UL

Bit mask for RAC_CLKMULTREG1ADJV

Definition at line 2014 of file efr32bg21_rac.h .

#define _RAC_CLKMULTEN0_CLKMULTREG1ADJV_SHIFT 20

Shift value for RAC_CLKMULTREG1ADJV

Definition at line 2013 of file efr32bg21_rac.h .

#define _RAC_CLKMULTEN0_CLKMULTREG1ADJV_v1p28 0x00000000UL

Mode v1p28 for RAC_CLKMULTEN0

Definition at line 2016 of file efr32bg21_rac.h .

#define _RAC_CLKMULTEN0_CLKMULTREG1ADJV_v1p32 0x00000001UL

Mode v1p32 for RAC_CLKMULTEN0

Definition at line 2017 of file efr32bg21_rac.h .

#define _RAC_CLKMULTEN0_CLKMULTREG1ADJV_v1p33 0x00000002UL

Mode v1p33 for RAC_CLKMULTEN0

Definition at line 2018 of file efr32bg21_rac.h .

#define _RAC_CLKMULTEN0_CLKMULTREG1ADJV_v1p38 0x00000003UL

Mode v1p38 for RAC_CLKMULTEN0

Definition at line 2019 of file efr32bg21_rac.h .

#define _RAC_CLKMULTEN0_CLKMULTREG2ADJI_DEFAULT 0x00000002UL

Mode DEFAULT for RAC_CLKMULTEN0

Definition at line 2027 of file efr32bg21_rac.h .

#define _RAC_CLKMULTEN0_CLKMULTREG2ADJI_I_1040uA 0x00000003UL

Mode I_1040uA for RAC_CLKMULTEN0

Definition at line 2031 of file efr32bg21_rac.h .

#define _RAC_CLKMULTEN0_CLKMULTREG2ADJI_I_200uA 0x00000000UL

Mode I_200uA for RAC_CLKMULTEN0

Definition at line 2028 of file efr32bg21_rac.h .

#define _RAC_CLKMULTEN0_CLKMULTREG2ADJI_I_480uA 0x00000001UL

Mode I_480uA for RAC_CLKMULTEN0

Definition at line 2029 of file efr32bg21_rac.h .

#define _RAC_CLKMULTEN0_CLKMULTREG2ADJI_I_760uA 0x00000002UL

Mode I_760uA for RAC_CLKMULTEN0

Definition at line 2030 of file efr32bg21_rac.h .

#define _RAC_CLKMULTEN0_CLKMULTREG2ADJI_MASK 0xC00000UL

Bit mask for RAC_CLKMULTREG2ADJI

Definition at line 2026 of file efr32bg21_rac.h .

#define _RAC_CLKMULTEN0_CLKMULTREG2ADJI_SHIFT 22

Shift value for RAC_CLKMULTREG2ADJI

Definition at line 2025 of file efr32bg21_rac.h .

#define _RAC_CLKMULTEN0_CLKMULTREG2ADJV_DEFAULT 0x00000002UL

Mode DEFAULT for RAC_CLKMULTEN0

Definition at line 2039 of file efr32bg21_rac.h .

#define _RAC_CLKMULTEN0_CLKMULTREG2ADJV_MASK 0x3000000UL

Bit mask for RAC_CLKMULTREG2ADJV

Definition at line 2038 of file efr32bg21_rac.h .

#define _RAC_CLKMULTEN0_CLKMULTREG2ADJV_SHIFT 24

Shift value for RAC_CLKMULTREG2ADJV

Definition at line 2037 of file efr32bg21_rac.h .

#define _RAC_CLKMULTEN0_CLKMULTREG2ADJV_v1p03 0x00000000UL

Mode v1p03 for RAC_CLKMULTEN0

Definition at line 2040 of file efr32bg21_rac.h .

#define _RAC_CLKMULTEN0_CLKMULTREG2ADJV_v1p09 0x00000001UL

Mode v1p09 for RAC_CLKMULTEN0

Definition at line 2041 of file efr32bg21_rac.h .

#define _RAC_CLKMULTEN0_CLKMULTREG2ADJV_v1p10 0x00000002UL

Mode v1p10 for RAC_CLKMULTEN0

Definition at line 2042 of file efr32bg21_rac.h .

#define _RAC_CLKMULTEN0_CLKMULTREG2ADJV_v1p16 0x00000003UL

Mode v1p16 for RAC_CLKMULTEN0

Definition at line 2043 of file efr32bg21_rac.h .

#define _RAC_CLKMULTEN0_MASK 0x03FFFFFFUL

Mask for RAC_CLKMULTEN0

Definition at line 1862 of file efr32bg21_rac.h .

#define _RAC_CLKMULTEN0_RESETVALUE 0x02A40005UL

Default value for RAC_CLKMULTEN0

Definition at line 1861 of file efr32bg21_rac.h .

#define _RAC_CLKMULTEN1_CLKMULTINNIBBLE_DEFAULT 0x00000008UL

Mode DEFAULT for RAC_CLKMULTEN1

Definition at line 2055 of file efr32bg21_rac.h .

#define _RAC_CLKMULTEN1_CLKMULTINNIBBLE_MASK 0xFUL

Bit mask for RAC_CLKMULTINNIBBLE

Definition at line 2054 of file efr32bg21_rac.h .

#define _RAC_CLKMULTEN1_CLKMULTINNIBBLE_SHIFT 0

Shift value for RAC_CLKMULTINNIBBLE

Definition at line 2053 of file efr32bg21_rac.h .

#define _RAC_CLKMULTEN1_CLKMULTLDCNIB_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_CLKMULTEN1

Definition at line 2060 of file efr32bg21_rac.h .

#define _RAC_CLKMULTEN1_CLKMULTLDCNIB_disable 0x00000000UL

Mode disable for RAC_CLKMULTEN1

Definition at line 2061 of file efr32bg21_rac.h .

#define _RAC_CLKMULTEN1_CLKMULTLDCNIB_enable 0x00000001UL

Mode enable for RAC_CLKMULTEN1

Definition at line 2062 of file efr32bg21_rac.h .

#define _RAC_CLKMULTEN1_CLKMULTLDCNIB_MASK 0x10UL

Bit mask for RAC_CLKMULTLDCNIB

Definition at line 2059 of file efr32bg21_rac.h .

#define _RAC_CLKMULTEN1_CLKMULTLDCNIB_SHIFT 4

Shift value for RAC_CLKMULTLDCNIB

Definition at line 2058 of file efr32bg21_rac.h .

#define _RAC_CLKMULTEN1_CLKMULTLDFNIB_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_CLKMULTEN1

Definition at line 2069 of file efr32bg21_rac.h .

#define _RAC_CLKMULTEN1_CLKMULTLDFNIB_disable 0x00000000UL

Mode disable for RAC_CLKMULTEN1

Definition at line 2070 of file efr32bg21_rac.h .

#define _RAC_CLKMULTEN1_CLKMULTLDFNIB_enable 0x00000001UL

Mode enable for RAC_CLKMULTEN1

Definition at line 2071 of file efr32bg21_rac.h .

#define _RAC_CLKMULTEN1_CLKMULTLDFNIB_MASK 0x20UL

Bit mask for RAC_CLKMULTLDFNIB

Definition at line 2068 of file efr32bg21_rac.h .

#define _RAC_CLKMULTEN1_CLKMULTLDFNIB_SHIFT 5

Shift value for RAC_CLKMULTLDFNIB

Definition at line 2067 of file efr32bg21_rac.h .

#define _RAC_CLKMULTEN1_CLKMULTLDMNIB_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_CLKMULTEN1

Definition at line 2078 of file efr32bg21_rac.h .

#define _RAC_CLKMULTEN1_CLKMULTLDMNIB_disable 0x00000000UL

Mode disable for RAC_CLKMULTEN1

Definition at line 2079 of file efr32bg21_rac.h .

#define _RAC_CLKMULTEN1_CLKMULTLDMNIB_enable 0x00000001UL

Mode enable for RAC_CLKMULTEN1

Definition at line 2080 of file efr32bg21_rac.h .

#define _RAC_CLKMULTEN1_CLKMULTLDMNIB_MASK 0x40UL

Bit mask for RAC_CLKMULTLDMNIB

Definition at line 2077 of file efr32bg21_rac.h .

#define _RAC_CLKMULTEN1_CLKMULTLDMNIB_SHIFT 6

Shift value for RAC_CLKMULTLDMNIB

Definition at line 2076 of file efr32bg21_rac.h .

#define _RAC_CLKMULTEN1_CLKMULTRDNIBBLE_coarse_nibble 0x00000003UL

Mode coarse_nibble for RAC_CLKMULTEN1

Definition at line 2090 of file efr32bg21_rac.h .

#define _RAC_CLKMULTEN1_CLKMULTRDNIBBLE_DEFAULT 0x00000003UL

Mode DEFAULT for RAC_CLKMULTEN1

Definition at line 2086 of file efr32bg21_rac.h .

#define _RAC_CLKMULTEN1_CLKMULTRDNIBBLE_fine_nibble 0x00000001UL

Mode fine_nibble for RAC_CLKMULTEN1

Definition at line 2088 of file efr32bg21_rac.h .

#define _RAC_CLKMULTEN1_CLKMULTRDNIBBLE_MASK 0x180UL

Bit mask for RAC_CLKMULTRDNIBBLE

Definition at line 2085 of file efr32bg21_rac.h .

#define _RAC_CLKMULTEN1_CLKMULTRDNIBBLE_moderate_nibble 0x00000002UL

Mode moderate_nibble for RAC_CLKMULTEN1

Definition at line 2089 of file efr32bg21_rac.h .

#define _RAC_CLKMULTEN1_CLKMULTRDNIBBLE_quarter_nibble 0x00000000UL

Mode quarter_nibble for RAC_CLKMULTEN1

Definition at line 2087 of file efr32bg21_rac.h .

#define _RAC_CLKMULTEN1_CLKMULTRDNIBBLE_SHIFT 7

Shift value for RAC_CLKMULTRDNIBBLE

Definition at line 2084 of file efr32bg21_rac.h .

#define _RAC_CLKMULTEN1_MASK 0x000001FFUL

Mask for RAC_CLKMULTEN1

Definition at line 2052 of file efr32bg21_rac.h .

#define _RAC_CLKMULTEN1_RESETVALUE 0x00000188UL

Default value for RAC_CLKMULTEN1

Definition at line 2051 of file efr32bg21_rac.h .

#define _RAC_CLKMULTSTATUS_CLKMULTACKVALID_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_CLKMULTSTATUS

Definition at line 2157 of file efr32bg21_rac.h .

#define _RAC_CLKMULTSTATUS_CLKMULTACKVALID_invalid 0x00000000UL

Mode invalid for RAC_CLKMULTSTATUS

Definition at line 2158 of file efr32bg21_rac.h .

#define _RAC_CLKMULTSTATUS_CLKMULTACKVALID_MASK 0x10UL

Bit mask for RAC_CLKMULTACKVALID

Definition at line 2156 of file efr32bg21_rac.h .

#define _RAC_CLKMULTSTATUS_CLKMULTACKVALID_SHIFT 4

Shift value for RAC_CLKMULTACKVALID

Definition at line 2155 of file efr32bg21_rac.h .

#define _RAC_CLKMULTSTATUS_CLKMULTACKVALID_valid 0x00000001UL

Mode valid for RAC_CLKMULTSTATUS

Definition at line 2159 of file efr32bg21_rac.h .

#define _RAC_CLKMULTSTATUS_CLKMULTOUTNIBBLE_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_CLKMULTSTATUS

Definition at line 2152 of file efr32bg21_rac.h .

#define _RAC_CLKMULTSTATUS_CLKMULTOUTNIBBLE_MASK 0xFUL

Bit mask for RAC_CLKMULTOUTNIBBLE

Definition at line 2151 of file efr32bg21_rac.h .

#define _RAC_CLKMULTSTATUS_CLKMULTOUTNIBBLE_SHIFT 0

Shift value for RAC_CLKMULTOUTNIBBLE

Definition at line 2150 of file efr32bg21_rac.h .

#define _RAC_CLKMULTSTATUS_MASK 0x0000001FUL

Mask for RAC_CLKMULTSTATUS

Definition at line 2149 of file efr32bg21_rac.h .

#define _RAC_CLKMULTSTATUS_RESETVALUE 0x00000000UL

Default value for RAC_CLKMULTSTATUS

Definition at line 2148 of file efr32bg21_rac.h .

#define _RAC_CMD_CLEARRXOVERFLOW_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_CMD

Definition at line 654 of file efr32bg21_rac.h .

#define _RAC_CMD_CLEARRXOVERFLOW_MASK 0x40UL

Bit mask for RAC_CLEARRXOVERFLOW

Definition at line 653 of file efr32bg21_rac.h .

#define _RAC_CMD_CLEARRXOVERFLOW_SHIFT 6

Shift value for RAC_CLEARRXOVERFLOW

Definition at line 652 of file efr32bg21_rac.h .

#define _RAC_CMD_CLEARTXEN_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_CMD

Definition at line 639 of file efr32bg21_rac.h .

#define _RAC_CMD_CLEARTXEN_MASK 0x8UL

Bit mask for RAC_CLEARTXEN

Definition at line 638 of file efr32bg21_rac.h .

#define _RAC_CMD_CLEARTXEN_SHIFT 3

Shift value for RAC_CLEARTXEN

Definition at line 637 of file efr32bg21_rac.h .

#define _RAC_CMD_FORCETX_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_CMD

Definition at line 629 of file efr32bg21_rac.h .

#define _RAC_CMD_FORCETX_MASK 0x2UL

Bit mask for RAC_FORCETX

Definition at line 628 of file efr32bg21_rac.h .

#define _RAC_CMD_FORCETX_SHIFT 1

Shift value for RAC_FORCETX

Definition at line 627 of file efr32bg21_rac.h .

#define _RAC_CMD_LNAENCLEAR_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_CMD

Definition at line 684 of file efr32bg21_rac.h .

#define _RAC_CMD_LNAENCLEAR_MASK 0x8000UL

Bit mask for RAC_LNAENCLEAR

Definition at line 683 of file efr32bg21_rac.h .

#define _RAC_CMD_LNAENCLEAR_SHIFT 15

Shift value for RAC_LNAENCLEAR

Definition at line 682 of file efr32bg21_rac.h .

#define _RAC_CMD_LNAENSET_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_CMD

Definition at line 679 of file efr32bg21_rac.h .

#define _RAC_CMD_LNAENSET_MASK 0x4000UL

Bit mask for RAC_LNAENSET

Definition at line 678 of file efr32bg21_rac.h .

#define _RAC_CMD_LNAENSET_SHIFT 14

Shift value for RAC_LNAENSET

Definition at line 677 of file efr32bg21_rac.h .

#define _RAC_CMD_MASK 0xC000F1FFUL

Mask for RAC_CMD

Definition at line 620 of file efr32bg21_rac.h .

#define _RAC_CMD_PAENCLEAR_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_CMD

Definition at line 674 of file efr32bg21_rac.h .

#define _RAC_CMD_PAENCLEAR_MASK 0x2000UL

Bit mask for RAC_PAENCLEAR

Definition at line 673 of file efr32bg21_rac.h .

#define _RAC_CMD_PAENCLEAR_SHIFT 13

Shift value for RAC_PAENCLEAR

Definition at line 672 of file efr32bg21_rac.h .

#define _RAC_CMD_PAENSET_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_CMD

Definition at line 669 of file efr32bg21_rac.h .

#define _RAC_CMD_PAENSET_MASK 0x1000UL

Bit mask for RAC_PAENSET

Definition at line 668 of file efr32bg21_rac.h .

#define _RAC_CMD_PAENSET_SHIFT 12

Shift value for RAC_PAENSET

Definition at line 667 of file efr32bg21_rac.h .

#define _RAC_CMD_RESETVALUE 0x00000000UL

Default value for RAC_CMD

Definition at line 619 of file efr32bg21_rac.h .

#define _RAC_CMD_RXCAL_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_CMD

Definition at line 659 of file efr32bg21_rac.h .

#define _RAC_CMD_RXCAL_MASK 0x80UL

Bit mask for RAC_RXCAL

Definition at line 658 of file efr32bg21_rac.h .

#define _RAC_CMD_RXCAL_SHIFT 7

Shift value for RAC_RXCAL

Definition at line 657 of file efr32bg21_rac.h .

#define _RAC_CMD_RXDIS_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_CMD

Definition at line 664 of file efr32bg21_rac.h .

#define _RAC_CMD_RXDIS_MASK 0x100UL

Bit mask for RAC_RXDIS

Definition at line 663 of file efr32bg21_rac.h .

#define _RAC_CMD_RXDIS_SHIFT 8

Shift value for RAC_RXDIS

Definition at line 662 of file efr32bg21_rac.h .

#define _RAC_CMD_TXAFTERFRAME_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_CMD

Definition at line 644 of file efr32bg21_rac.h .

#define _RAC_CMD_TXAFTERFRAME_MASK 0x10UL

Bit mask for RAC_TXAFTERFRAME

Definition at line 643 of file efr32bg21_rac.h .

#define _RAC_CMD_TXAFTERFRAME_SHIFT 4

Shift value for RAC_TXAFTERFRAME

Definition at line 642 of file efr32bg21_rac.h .

#define _RAC_CMD_TXDIS_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_CMD

Definition at line 649 of file efr32bg21_rac.h .

#define _RAC_CMD_TXDIS_MASK 0x20UL

Bit mask for RAC_TXDIS

Definition at line 648 of file efr32bg21_rac.h .

#define _RAC_CMD_TXDIS_SHIFT 5

Shift value for RAC_TXDIS

Definition at line 647 of file efr32bg21_rac.h .

#define _RAC_CMD_TXEN_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_CMD

Definition at line 624 of file efr32bg21_rac.h .

#define _RAC_CMD_TXEN_MASK 0x1UL

Bit mask for RAC_TXEN

Definition at line 623 of file efr32bg21_rac.h .

#define _RAC_CMD_TXEN_SHIFT 0

Shift value for RAC_TXEN

Definition at line 622 of file efr32bg21_rac.h .

#define _RAC_CMD_TXONCCA_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_CMD

Definition at line 634 of file efr32bg21_rac.h .

#define _RAC_CMD_TXONCCA_MASK 0x4UL

Bit mask for RAC_TXONCCA

Definition at line 633 of file efr32bg21_rac.h .

#define _RAC_CMD_TXONCCA_SHIFT 2

Shift value for RAC_TXONCCA

Definition at line 632 of file efr32bg21_rac.h .

#define _RAC_CTRL_ACTIVEPOL_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_CTRL

Definition at line 739 of file efr32bg21_rac.h .

#define _RAC_CTRL_ACTIVEPOL_MASK 0x80UL

Bit mask for RAC_ACTIVEPOL

Definition at line 738 of file efr32bg21_rac.h .

#define _RAC_CTRL_ACTIVEPOL_SHIFT 7

Shift value for RAC_ACTIVEPOL

Definition at line 737 of file efr32bg21_rac.h .

#define _RAC_CTRL_ACTIVEPOL_X0 0x00000000UL

Mode X0 for RAC_CTRL

Definition at line 740 of file efr32bg21_rac.h .

#define _RAC_CTRL_ACTIVEPOL_X1 0x00000001UL

Mode X1 for RAC_CTRL

Definition at line 741 of file efr32bg21_rac.h .

#define _RAC_CTRL_FORCEDISABLE_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_CTRL

Definition at line 693 of file efr32bg21_rac.h .

#define _RAC_CTRL_FORCEDISABLE_MASK 0x1UL

Bit mask for RAC_FORCEDISABLE

Definition at line 692 of file efr32bg21_rac.h .

#define _RAC_CTRL_FORCEDISABLE_SHIFT 0

Shift value for RAC_FORCEDISABLE

Definition at line 691 of file efr32bg21_rac.h .

#define _RAC_CTRL_LNAENPOL_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_CTRL

Definition at line 757 of file efr32bg21_rac.h .

#define _RAC_CTRL_LNAENPOL_MASK 0x200UL

Bit mask for RAC_LNAENPOL

Definition at line 756 of file efr32bg21_rac.h .

#define _RAC_CTRL_LNAENPOL_SHIFT 9

Shift value for RAC_LNAENPOL

Definition at line 755 of file efr32bg21_rac.h .

#define _RAC_CTRL_LNAENPOL_X0 0x00000000UL

Mode X0 for RAC_CTRL

Definition at line 758 of file efr32bg21_rac.h .

#define _RAC_CTRL_LNAENPOL_X1 0x00000001UL

Mode X1 for RAC_CTRL

Definition at line 759 of file efr32bg21_rac.h .

#define _RAC_CTRL_MASK 0x000107EFUL

Mask for RAC_CTRL

Definition at line 689 of file efr32bg21_rac.h .

#define _RAC_CTRL_PAENPOL_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_CTRL

Definition at line 748 of file efr32bg21_rac.h .

#define _RAC_CTRL_PAENPOL_MASK 0x100UL

Bit mask for RAC_PAENPOL

Definition at line 747 of file efr32bg21_rac.h .

#define _RAC_CTRL_PAENPOL_SHIFT 8

Shift value for RAC_PAENPOL

Definition at line 746 of file efr32bg21_rac.h .

#define _RAC_CTRL_PAENPOL_X0 0x00000000UL

Mode X0 for RAC_CTRL

Definition at line 749 of file efr32bg21_rac.h .

#define _RAC_CTRL_PAENPOL_X1 0x00000001UL

Mode X1 for RAC_CTRL

Definition at line 750 of file efr32bg21_rac.h .

#define _RAC_CTRL_PRSCLR_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_CTRL

Definition at line 721 of file efr32bg21_rac.h .

#define _RAC_CTRL_PRSCLR_MASK 0x20UL

Bit mask for RAC_PRSCLR

Definition at line 720 of file efr32bg21_rac.h .

#define _RAC_CTRL_PRSCLR_PRSCH 0x00000001UL

Mode PRSCH for RAC_CTRL

Definition at line 723 of file efr32bg21_rac.h .

#define _RAC_CTRL_PRSCLR_RXSEARCH 0x00000000UL

Mode RXSEARCH for RAC_CTRL

Definition at line 722 of file efr32bg21_rac.h .

#define _RAC_CTRL_PRSCLR_SHIFT 5

Shift value for RAC_PRSCLR

Definition at line 719 of file efr32bg21_rac.h .

#define _RAC_CTRL_PRSFORCETX_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_CTRL

Definition at line 775 of file efr32bg21_rac.h .

#define _RAC_CTRL_PRSFORCETX_MASK 0x10000UL

Bit mask for RAC_PRSFORCETX

Definition at line 774 of file efr32bg21_rac.h .

#define _RAC_CTRL_PRSFORCETX_SHIFT 16

Shift value for RAC_PRSFORCETX

Definition at line 773 of file efr32bg21_rac.h .

#define _RAC_CTRL_PRSFORCETX_X0 0x00000000UL

Mode X0 for RAC_CTRL

Definition at line 776 of file efr32bg21_rac.h .

#define _RAC_CTRL_PRSFORCETX_X1 0x00000001UL

Mode X1 for RAC_CTRL

Definition at line 777 of file efr32bg21_rac.h .

#define _RAC_CTRL_PRSMODE_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_CTRL

Definition at line 712 of file efr32bg21_rac.h .

#define _RAC_CTRL_PRSMODE_DIRECT 0x00000000UL

Mode DIRECT for RAC_CTRL

Definition at line 713 of file efr32bg21_rac.h .

#define _RAC_CTRL_PRSMODE_MASK 0x8UL

Bit mask for RAC_PRSMODE

Definition at line 711 of file efr32bg21_rac.h .

#define _RAC_CTRL_PRSMODE_PULSE 0x00000001UL

Mode PULSE for RAC_CTRL

Definition at line 714 of file efr32bg21_rac.h .

#define _RAC_CTRL_PRSMODE_SHIFT 3

Shift value for RAC_PRSMODE

Definition at line 710 of file efr32bg21_rac.h .

#define _RAC_CTRL_PRSRXDIS_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_CTRL

Definition at line 766 of file efr32bg21_rac.h .

#define _RAC_CTRL_PRSRXDIS_MASK 0x400UL

Bit mask for RAC_PRSRXDIS

Definition at line 765 of file efr32bg21_rac.h .

#define _RAC_CTRL_PRSRXDIS_SHIFT 10

Shift value for RAC_PRSRXDIS

Definition at line 764 of file efr32bg21_rac.h .

#define _RAC_CTRL_PRSRXDIS_X0 0x00000000UL

Mode X0 for RAC_CTRL

Definition at line 767 of file efr32bg21_rac.h .

#define _RAC_CTRL_PRSRXDIS_X1 0x00000001UL

Mode X1 for RAC_CTRL

Definition at line 768 of file efr32bg21_rac.h .

#define _RAC_CTRL_PRSTXEN_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_CTRL

Definition at line 698 of file efr32bg21_rac.h .

#define _RAC_CTRL_PRSTXEN_MASK 0x2UL

Bit mask for RAC_PRSTXEN

Definition at line 697 of file efr32bg21_rac.h .

#define _RAC_CTRL_PRSTXEN_SHIFT 1

Shift value for RAC_PRSTXEN

Definition at line 696 of file efr32bg21_rac.h .

#define _RAC_CTRL_RESETVALUE 0x00000000UL

Default value for RAC_CTRL

Definition at line 688 of file efr32bg21_rac.h .

#define _RAC_CTRL_TXAFTERRX_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_CTRL

Definition at line 703 of file efr32bg21_rac.h .

#define _RAC_CTRL_TXAFTERRX_MASK 0x4UL

Bit mask for RAC_TXAFTERRX

Definition at line 702 of file efr32bg21_rac.h .

#define _RAC_CTRL_TXAFTERRX_SHIFT 2

Shift value for RAC_TXAFTERRX

Definition at line 701 of file efr32bg21_rac.h .

#define _RAC_CTRL_TXAFTERRX_X0 0x00000000UL

Mode X0 for RAC_CTRL

Definition at line 704 of file efr32bg21_rac.h .

#define _RAC_CTRL_TXAFTERRX_X1 0x00000001UL

Mode X1 for RAC_CTRL

Definition at line 705 of file efr32bg21_rac.h .

#define _RAC_CTRL_TXPOSTPONE_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_CTRL

Definition at line 730 of file efr32bg21_rac.h .

#define _RAC_CTRL_TXPOSTPONE_MASK 0x40UL

Bit mask for RAC_TXPOSTPONE

Definition at line 729 of file efr32bg21_rac.h .

#define _RAC_CTRL_TXPOSTPONE_SHIFT 6

Shift value for RAC_TXPOSTPONE

Definition at line 728 of file efr32bg21_rac.h .

#define _RAC_CTRL_TXPOSTPONE_X0 0x00000000UL

Mode X0 for RAC_CTRL

Definition at line 731 of file efr32bg21_rac.h .

#define _RAC_CTRL_TXPOSTPONE_X1 0x00000001UL

Mode X1 for RAC_CTRL

Definition at line 732 of file efr32bg21_rac.h .

#define _RAC_DIGCLKRETIMECTRL_DIGCLKRETIMEDISRETIME_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_DIGCLKRETIMECTRL

Definition at line 4814 of file efr32bg21_rac.h .

#define _RAC_DIGCLKRETIMECTRL_DIGCLKRETIMEDISRETIME_disable_retime 0x00000001UL

Mode disable_retime for RAC_DIGCLKRETIMECTRL

Definition at line 4816 of file efr32bg21_rac.h .

#define _RAC_DIGCLKRETIMECTRL_DIGCLKRETIMEDISRETIME_enable_retime 0x00000000UL

Mode enable_retime for RAC_DIGCLKRETIMECTRL

Definition at line 4815 of file efr32bg21_rac.h .

#define _RAC_DIGCLKRETIMECTRL_DIGCLKRETIMEDISRETIME_MASK 0x2UL

Bit mask for RAC_DIGCLKRETIMEDISRETIME

Definition at line 4813 of file efr32bg21_rac.h .

#define _RAC_DIGCLKRETIMECTRL_DIGCLKRETIMEDISRETIME_SHIFT 1

Shift value for RAC_DIGCLKRETIMEDISRETIME

Definition at line 4812 of file efr32bg21_rac.h .

#define _RAC_DIGCLKRETIMECTRL_DIGCLKRETIMEENRETIME_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_DIGCLKRETIMECTRL

Definition at line 4805 of file efr32bg21_rac.h .

#define _RAC_DIGCLKRETIMECTRL_DIGCLKRETIMEENRETIME_disable 0x00000000UL

Mode disable for RAC_DIGCLKRETIMECTRL

Definition at line 4806 of file efr32bg21_rac.h .

#define _RAC_DIGCLKRETIMECTRL_DIGCLKRETIMEENRETIME_enable 0x00000001UL

Mode enable for RAC_DIGCLKRETIMECTRL

Definition at line 4807 of file efr32bg21_rac.h .

#define _RAC_DIGCLKRETIMECTRL_DIGCLKRETIMEENRETIME_MASK 0x1UL

Bit mask for RAC_DIGCLKRETIMEENRETIME

Definition at line 4804 of file efr32bg21_rac.h .

#define _RAC_DIGCLKRETIMECTRL_DIGCLKRETIMEENRETIME_SHIFT 0

Shift value for RAC_DIGCLKRETIMEENRETIME

Definition at line 4803 of file efr32bg21_rac.h .

#define _RAC_DIGCLKRETIMECTRL_DIGCLKRETIMELIMITH_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_DIGCLKRETIMECTRL

Definition at line 4831 of file efr32bg21_rac.h .

#define _RAC_DIGCLKRETIMECTRL_DIGCLKRETIMELIMITH_MASK 0x70UL

Bit mask for RAC_DIGCLKRETIMELIMITH

Definition at line 4830 of file efr32bg21_rac.h .

#define _RAC_DIGCLKRETIMECTRL_DIGCLKRETIMELIMITH_SHIFT 4

Shift value for RAC_DIGCLKRETIMELIMITH

Definition at line 4829 of file efr32bg21_rac.h .

#define _RAC_DIGCLKRETIMECTRL_DIGCLKRETIMELIMITL_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_DIGCLKRETIMECTRL

Definition at line 4835 of file efr32bg21_rac.h .

#define _RAC_DIGCLKRETIMECTRL_DIGCLKRETIMELIMITL_MASK 0x700UL

Bit mask for RAC_DIGCLKRETIMELIMITL

Definition at line 4834 of file efr32bg21_rac.h .

#define _RAC_DIGCLKRETIMECTRL_DIGCLKRETIMELIMITL_SHIFT 8

Shift value for RAC_DIGCLKRETIMELIMITL

Definition at line 4833 of file efr32bg21_rac.h .

#define _RAC_DIGCLKRETIMECTRL_DIGCLKRETIMERESETN_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_DIGCLKRETIMECTRL

Definition at line 4823 of file efr32bg21_rac.h .

#define _RAC_DIGCLKRETIMECTRL_DIGCLKRETIMERESETN_MASK 0x4UL

Bit mask for RAC_DIGCLKRETIMERESETN

Definition at line 4822 of file efr32bg21_rac.h .

#define _RAC_DIGCLKRETIMECTRL_DIGCLKRETIMERESETN_operate 0x00000000UL

Mode operate for RAC_DIGCLKRETIMECTRL

Definition at line 4824 of file efr32bg21_rac.h .

#define _RAC_DIGCLKRETIMECTRL_DIGCLKRETIMERESETN_reset 0x00000001UL

Mode reset for RAC_DIGCLKRETIMECTRL

Definition at line 4825 of file efr32bg21_rac.h .

#define _RAC_DIGCLKRETIMECTRL_DIGCLKRETIMERESETN_SHIFT 2

Shift value for RAC_DIGCLKRETIMERESETN

Definition at line 4821 of file efr32bg21_rac.h .

#define _RAC_DIGCLKRETIMECTRL_MASK 0x00000777UL

Mask for RAC_DIGCLKRETIMECTRL

Definition at line 4801 of file efr32bg21_rac.h .

#define _RAC_DIGCLKRETIMECTRL_RESETVALUE 0x00000000UL

Default value for RAC_DIGCLKRETIMECTRL

Definition at line 4800 of file efr32bg21_rac.h .

#define _RAC_DIGCLKRETIMESTATUS_DIGCLKRETIMECLKSEL_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_DIGCLKRETIMESTATUS

Definition at line 4844 of file efr32bg21_rac.h .

#define _RAC_DIGCLKRETIMESTATUS_DIGCLKRETIMECLKSEL_MASK 0x1UL

Bit mask for RAC_DIGCLKRETIMECLKSEL

Definition at line 4843 of file efr32bg21_rac.h .

#define _RAC_DIGCLKRETIMESTATUS_DIGCLKRETIMECLKSEL_SHIFT 0

Shift value for RAC_DIGCLKRETIMECLKSEL

Definition at line 4842 of file efr32bg21_rac.h .

#define _RAC_DIGCLKRETIMESTATUS_DIGCLKRETIMECLKSEL_use_raw_clk 0x00000000UL

Mode use_raw_clk for RAC_DIGCLKRETIMESTATUS

Definition at line 4845 of file efr32bg21_rac.h .

#define _RAC_DIGCLKRETIMESTATUS_DIGCLKRETIMECLKSEL_use_retimed_clk 0x00000001UL

Mode use_retimed_clk for RAC_DIGCLKRETIMESTATUS

Definition at line 4846 of file efr32bg21_rac.h .

#define _RAC_DIGCLKRETIMESTATUS_DIGCLKRETIMERESETNLO_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_DIGCLKRETIMESTATUS

Definition at line 4853 of file efr32bg21_rac.h .

#define _RAC_DIGCLKRETIMESTATUS_DIGCLKRETIMERESETNLO_hi 0x00000001UL

Mode hi for RAC_DIGCLKRETIMESTATUS

Definition at line 4855 of file efr32bg21_rac.h .

#define _RAC_DIGCLKRETIMESTATUS_DIGCLKRETIMERESETNLO_lo 0x00000000UL

Mode lo for RAC_DIGCLKRETIMESTATUS

Definition at line 4854 of file efr32bg21_rac.h .

#define _RAC_DIGCLKRETIMESTATUS_DIGCLKRETIMERESETNLO_MASK 0x2UL

Bit mask for RAC_DIGCLKRETIMERESETNLO

Definition at line 4852 of file efr32bg21_rac.h .

#define _RAC_DIGCLKRETIMESTATUS_DIGCLKRETIMERESETNLO_SHIFT 1

Shift value for RAC_DIGCLKRETIMERESETNLO

Definition at line 4851 of file efr32bg21_rac.h .

#define _RAC_DIGCLKRETIMESTATUS_MASK 0x00000003UL

Mask for RAC_DIGCLKRETIMESTATUS

Definition at line 4840 of file efr32bg21_rac.h .

#define _RAC_DIGCLKRETIMESTATUS_RESETVALUE 0x00000000UL

Default value for RAC_DIGCLKRETIMESTATUS

Definition at line 4839 of file efr32bg21_rac.h .

#define _RAC_EN_EN_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_EN

Definition at line 492 of file efr32bg21_rac.h .

#define _RAC_EN_EN_MASK 0x1UL

Bit mask for RAC_EN

Definition at line 491 of file efr32bg21_rac.h .

#define _RAC_EN_EN_SHIFT 0

Shift value for RAC_EN

Definition at line 490 of file efr32bg21_rac.h .

#define _RAC_EN_MASK 0x00000001UL

Mask for RAC_EN

Definition at line 488 of file efr32bg21_rac.h .

#define _RAC_EN_RESETVALUE 0x00000000UL

Default value for RAC_EN

Definition at line 487 of file efr32bg21_rac.h .

#define _RAC_FORCESTATE_FORCESTATE_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_FORCESTATE

Definition at line 787 of file efr32bg21_rac.h .

#define _RAC_FORCESTATE_FORCESTATE_MASK 0xFUL

Bit mask for RAC_FORCESTATE

Definition at line 786 of file efr32bg21_rac.h .

#define _RAC_FORCESTATE_FORCESTATE_SHIFT 0

Shift value for RAC_FORCESTATE

Definition at line 785 of file efr32bg21_rac.h .

#define _RAC_FORCESTATE_MASK 0x0000000FUL

Mask for RAC_FORCESTATE

Definition at line 784 of file efr32bg21_rac.h .

#define _RAC_FORCESTATE_RESETVALUE 0x00000000UL

Default value for RAC_FORCESTATE

Definition at line 783 of file efr32bg21_rac.h .

#define _RAC_IEN_BUSERROR_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_IEN

Definition at line 829 of file efr32bg21_rac.h .

#define _RAC_IEN_BUSERROR_MASK 0x4UL

Bit mask for RAC_BUSERROR

Definition at line 828 of file efr32bg21_rac.h .

#define _RAC_IEN_BUSERROR_SHIFT 2

Shift value for RAC_BUSERROR

Definition at line 827 of file efr32bg21_rac.h .

#define _RAC_IEN_MASK 0x00FF0007UL

Mask for RAC_IEN

Definition at line 815 of file efr32bg21_rac.h .

#define _RAC_IEN_RESETVALUE 0x00000000UL

Default value for RAC_IEN

Definition at line 814 of file efr32bg21_rac.h .

#define _RAC_IEN_SEQ_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_IEN

Definition at line 833 of file efr32bg21_rac.h .

#define _RAC_IEN_SEQ_MASK 0xFF0000UL

Bit mask for RAC_SEQ

Definition at line 832 of file efr32bg21_rac.h .

#define _RAC_IEN_SEQ_SHIFT 16

Shift value for RAC_SEQ

Definition at line 831 of file efr32bg21_rac.h .

#define _RAC_IEN_STATECHANGE_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_IEN

Definition at line 819 of file efr32bg21_rac.h .

#define _RAC_IEN_STATECHANGE_MASK 0x1UL

Bit mask for RAC_STATECHANGE

Definition at line 818 of file efr32bg21_rac.h .

#define _RAC_IEN_STATECHANGE_SHIFT 0

Shift value for RAC_STATECHANGE

Definition at line 817 of file efr32bg21_rac.h .

#define _RAC_IEN_STIMCMPEV_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_IEN

Definition at line 824 of file efr32bg21_rac.h .

#define _RAC_IEN_STIMCMPEV_MASK 0x2UL

Bit mask for RAC_STIMCMPEV

Definition at line 823 of file efr32bg21_rac.h .

#define _RAC_IEN_STIMCMPEV_SHIFT 1

Shift value for RAC_STIMCMPEV

Definition at line 822 of file efr32bg21_rac.h .

#define _RAC_IF_BUSERROR_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_IF

Definition at line 806 of file efr32bg21_rac.h .

#define _RAC_IF_BUSERROR_MASK 0x4UL

Bit mask for RAC_BUSERROR

Definition at line 805 of file efr32bg21_rac.h .

#define _RAC_IF_BUSERROR_SHIFT 2

Shift value for RAC_BUSERROR

Definition at line 804 of file efr32bg21_rac.h .

#define _RAC_IF_MASK 0x00FF0007UL

Mask for RAC_IF

Definition at line 792 of file efr32bg21_rac.h .

#define _RAC_IF_RESETVALUE 0x00000000UL

Default value for RAC_IF

Definition at line 791 of file efr32bg21_rac.h .

#define _RAC_IF_SEQ_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_IF

Definition at line 810 of file efr32bg21_rac.h .

#define _RAC_IF_SEQ_MASK 0xFF0000UL

Bit mask for RAC_SEQ

Definition at line 809 of file efr32bg21_rac.h .

#define _RAC_IF_SEQ_SHIFT 16

Shift value for RAC_SEQ

Definition at line 808 of file efr32bg21_rac.h .

#define _RAC_IF_STATECHANGE_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_IF

Definition at line 796 of file efr32bg21_rac.h .

#define _RAC_IF_STATECHANGE_MASK 0x1UL

Bit mask for RAC_STATECHANGE

Definition at line 795 of file efr32bg21_rac.h .

#define _RAC_IF_STATECHANGE_SHIFT 0

Shift value for RAC_STATECHANGE

Definition at line 794 of file efr32bg21_rac.h .

#define _RAC_IF_STIMCMPEV_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_IF

Definition at line 801 of file efr32bg21_rac.h .

#define _RAC_IF_STIMCMPEV_MASK 0x2UL

Bit mask for RAC_STIMCMPEV

Definition at line 800 of file efr32bg21_rac.h .

#define _RAC_IF_STIMCMPEV_SHIFT 1

Shift value for RAC_STIMCMPEV

Definition at line 799 of file efr32bg21_rac.h .

#define _RAC_IFADCCAL_IFADCENRCCAL_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_IFADCCAL

Definition at line 2362 of file efr32bg21_rac.h .

#define _RAC_IFADCCAL_IFADCENRCCAL_MASK 0x1UL

Bit mask for RAC_IFADCENRCCAL

Definition at line 2361 of file efr32bg21_rac.h .

#define _RAC_IFADCCAL_IFADCENRCCAL_rccal_disable 0x00000000UL

Mode rccal_disable for RAC_IFADCCAL

Definition at line 2363 of file efr32bg21_rac.h .

#define _RAC_IFADCCAL_IFADCENRCCAL_rccal_enable 0x00000001UL

Mode rccal_enable for RAC_IFADCCAL

Definition at line 2364 of file efr32bg21_rac.h .

#define _RAC_IFADCCAL_IFADCENRCCAL_SHIFT 0

Shift value for RAC_IFADCENRCCAL

Definition at line 2360 of file efr32bg21_rac.h .

#define _RAC_IFADCCAL_IFADCTUNERC_DEFAULT 0x00000010UL

Mode DEFAULT for RAC_IFADCCAL

Definition at line 2379 of file efr32bg21_rac.h .

#define _RAC_IFADCCAL_IFADCTUNERC_MASK 0x1F00UL

Bit mask for RAC_IFADCTUNERC

Definition at line 2378 of file efr32bg21_rac.h .

#define _RAC_IFADCCAL_IFADCTUNERC_SHIFT 8

Shift value for RAC_IFADCTUNERC

Definition at line 2377 of file efr32bg21_rac.h .

#define _RAC_IFADCCAL_IFADCTUNERCCALMODE_ADCmode 0x00000001UL

Mode ADCmode for RAC_IFADCCAL

Definition at line 2373 of file efr32bg21_rac.h .

#define _RAC_IFADCCAL_IFADCTUNERCCALMODE_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_IFADCCAL

Definition at line 2371 of file efr32bg21_rac.h .

#define _RAC_IFADCCAL_IFADCTUNERCCALMODE_MASK 0x2UL

Bit mask for RAC_IFADCTUNERCCALMODE

Definition at line 2370 of file efr32bg21_rac.h .

#define _RAC_IFADCCAL_IFADCTUNERCCALMODE_SHIFT 1

Shift value for RAC_IFADCTUNERCCALMODE

Definition at line 2369 of file efr32bg21_rac.h .

#define _RAC_IFADCCAL_IFADCTUNERCCALMODE_SYmode 0x00000000UL

Mode SYmode for RAC_IFADCCAL

Definition at line 2372 of file efr32bg21_rac.h .

#define _RAC_IFADCCAL_MASK 0x00001F03UL

Mask for RAC_IFADCCAL

Definition at line 2358 of file efr32bg21_rac.h .

#define _RAC_IFADCCAL_RESETVALUE 0x00001000UL

Default value for RAC_IFADCCAL

Definition at line 2357 of file efr32bg21_rac.h .

#define _RAC_IFADCSTATUS_IFADCRCCALOUT_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_IFADCSTATUS

Definition at line 2388 of file efr32bg21_rac.h .

#define _RAC_IFADCSTATUS_IFADCRCCALOUT_hi 0x00000001UL

Mode hi for RAC_IFADCSTATUS

Definition at line 2390 of file efr32bg21_rac.h .

#define _RAC_IFADCSTATUS_IFADCRCCALOUT_lo 0x00000000UL

Mode lo for RAC_IFADCSTATUS

Definition at line 2389 of file efr32bg21_rac.h .

#define _RAC_IFADCSTATUS_IFADCRCCALOUT_MASK 0x1UL

Bit mask for RAC_IFADCRCCALOUT

Definition at line 2387 of file efr32bg21_rac.h .

#define _RAC_IFADCSTATUS_IFADCRCCALOUT_SHIFT 0

Shift value for RAC_IFADCRCCALOUT

Definition at line 2386 of file efr32bg21_rac.h .

#define _RAC_IFADCSTATUS_MASK 0x00000001UL

Mask for RAC_IFADCSTATUS

Definition at line 2384 of file efr32bg21_rac.h .

#define _RAC_IFADCSTATUS_RESETVALUE 0x00000000UL

Default value for RAC_IFADCSTATUS

Definition at line 2383 of file efr32bg21_rac.h .

#define _RAC_IFADCTRIM_IFADCCLKSEL_clk_2p4g 0x00000000UL

Mode clk_2p4g for RAC_IFADCTRIM

Definition at line 2171 of file efr32bg21_rac.h .

#define _RAC_IFADCTRIM_IFADCCLKSEL_clk_subg 0x00000001UL

Mode clk_subg for RAC_IFADCTRIM

Definition at line 2172 of file efr32bg21_rac.h .

#define _RAC_IFADCTRIM_IFADCCLKSEL_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_IFADCTRIM

Definition at line 2170 of file efr32bg21_rac.h .

#define _RAC_IFADCTRIM_IFADCCLKSEL_MASK 0x1UL

Bit mask for RAC_IFADCCLKSEL

Definition at line 2169 of file efr32bg21_rac.h .

#define _RAC_IFADCTRIM_IFADCCLKSEL_SHIFT 0

Shift value for RAC_IFADCCLKSEL

Definition at line 2168 of file efr32bg21_rac.h .

#define _RAC_IFADCTRIM_IFADCENHALFMODE_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_IFADCTRIM

Definition at line 2179 of file efr32bg21_rac.h .

#define _RAC_IFADCTRIM_IFADCENHALFMODE_full_speed_mode 0x00000000UL

Mode full_speed_mode for RAC_IFADCTRIM

Definition at line 2180 of file efr32bg21_rac.h .

#define _RAC_IFADCTRIM_IFADCENHALFMODE_half_speed_mode 0x00000001UL

Mode half_speed_mode for RAC_IFADCTRIM

Definition at line 2181 of file efr32bg21_rac.h .

#define _RAC_IFADCTRIM_IFADCENHALFMODE_MASK 0x2UL

Bit mask for RAC_IFADCENHALFMODE

Definition at line 2178 of file efr32bg21_rac.h .

#define _RAC_IFADCTRIM_IFADCENHALFMODE_SHIFT 1

Shift value for RAC_IFADCENHALFMODE

Definition at line 2177 of file efr32bg21_rac.h .

#define _RAC_IFADCTRIM_IFADCLDOSERIESAMPLVL_DEFAULT 0x00000004UL

Mode DEFAULT for RAC_IFADCTRIM

Definition at line 2187 of file efr32bg21_rac.h .

#define _RAC_IFADCTRIM_IFADCLDOSERIESAMPLVL_MASK 0x1CUL

Bit mask for RAC_IFADCLDOSERIESAMPLVL

Definition at line 2186 of file efr32bg21_rac.h .

#define _RAC_IFADCTRIM_IFADCLDOSERIESAMPLVL_SHIFT 2

Shift value for RAC_IFADCLDOSERIESAMPLVL

Definition at line 2185 of file efr32bg21_rac.h .

#define _RAC_IFADCTRIM_IFADCLDOSERIESAMPLVL_v1p20 0x00000000UL

Mode v1p20 for RAC_IFADCTRIM

Definition at line 2188 of file efr32bg21_rac.h .

#define _RAC_IFADCTRIM_IFADCLDOSERIESAMPLVL_v1p24 0x00000001UL

Mode v1p24 for RAC_IFADCTRIM

Definition at line 2189 of file efr32bg21_rac.h .

#define _RAC_IFADCTRIM_IFADCLDOSERIESAMPLVL_v1p28 0x00000002UL

Mode v1p28 for RAC_IFADCTRIM

Definition at line 2190 of file efr32bg21_rac.h .

#define _RAC_IFADCTRIM_IFADCLDOSERIESAMPLVL_v1p32 0x00000003UL

Mode v1p32 for RAC_IFADCTRIM

Definition at line 2191 of file efr32bg21_rac.h .

#define _RAC_IFADCTRIM_IFADCLDOSERIESAMPLVL_v1p35 0x00000004UL

Mode v1p35 for RAC_IFADCTRIM

Definition at line 2192 of file efr32bg21_rac.h .

#define _RAC_IFADCTRIM_IFADCLDOSERIESAMPLVL_v1p39 0x00000005UL

Mode v1p39 for RAC_IFADCTRIM

Definition at line 2193 of file efr32bg21_rac.h .

#define _RAC_IFADCTRIM_IFADCLDOSERIESAMPLVL_v1p42 0x00000006UL

Mode v1p42 for RAC_IFADCTRIM

Definition at line 2194 of file efr32bg21_rac.h .

#define _RAC_IFADCTRIM_IFADCLDOSERIESAMPLVL_v1p46 0x00000007UL

Mode v1p46 for RAC_IFADCTRIM

Definition at line 2195 of file efr32bg21_rac.h .

#define _RAC_IFADCTRIM_IFADCLDOSHUNTAMPLVL_DEFAULT 0x00000004UL

Mode DEFAULT for RAC_IFADCTRIM

Definition at line 2207 of file efr32bg21_rac.h .

#define _RAC_IFADCTRIM_IFADCLDOSHUNTAMPLVL_MASK 0xE0UL

Bit mask for RAC_IFADCLDOSHUNTAMPLVL

Definition at line 2206 of file efr32bg21_rac.h .

#define _RAC_IFADCTRIM_IFADCLDOSHUNTAMPLVL_SHIFT 5

Shift value for RAC_IFADCLDOSHUNTAMPLVL

Definition at line 2205 of file efr32bg21_rac.h .

#define _RAC_IFADCTRIM_IFADCLDOSHUNTAMPLVL_v1p20 0x00000000UL

Mode v1p20 for RAC_IFADCTRIM

Definition at line 2208 of file efr32bg21_rac.h .

#define _RAC_IFADCTRIM_IFADCLDOSHUNTAMPLVL_v1p24 0x00000001UL

Mode v1p24 for RAC_IFADCTRIM

Definition at line 2209 of file efr32bg21_rac.h .

#define _RAC_IFADCTRIM_IFADCLDOSHUNTAMPLVL_v1p28 0x00000002UL

Mode v1p28 for RAC_IFADCTRIM

Definition at line 2210 of file efr32bg21_rac.h .

#define _RAC_IFADCTRIM_IFADCLDOSHUNTAMPLVL_v1p32 0x00000003UL

Mode v1p32 for RAC_IFADCTRIM

Definition at line 2211 of file efr32bg21_rac.h .

#define _RAC_IFADCTRIM_IFADCLDOSHUNTAMPLVL_v1p35 0x00000004UL

Mode v1p35 for RAC_IFADCTRIM

Definition at line 2212 of file efr32bg21_rac.h .

#define _RAC_IFADCTRIM_IFADCLDOSHUNTAMPLVL_v1p39 0x00000005UL

Mode v1p39 for RAC_IFADCTRIM

Definition at line 2213 of file efr32bg21_rac.h .

#define _RAC_IFADCTRIM_IFADCLDOSHUNTAMPLVL_v1p42 0x00000006UL

Mode v1p42 for RAC_IFADCTRIM

Definition at line 2214 of file efr32bg21_rac.h .

#define _RAC_IFADCTRIM_IFADCLDOSHUNTAMPLVL_v1p46 0x00000007UL

Mode v1p46 for RAC_IFADCTRIM

Definition at line 2215 of file efr32bg21_rac.h .

#define _RAC_IFADCTRIM_IFADCLDOSHUNTCURLP_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_IFADCTRIM

Definition at line 2228 of file efr32bg21_rac.h .

#define _RAC_IFADCTRIM_IFADCLDOSHUNTCURLP_low_power_disabled 0x00000000UL

Mode low_power_disabled for RAC_IFADCTRIM

Definition at line 2229 of file efr32bg21_rac.h .

#define _RAC_IFADCTRIM_IFADCLDOSHUNTCURLP_low_power_enabled 0x00000001UL

Mode low_power_enabled for RAC_IFADCTRIM

Definition at line 2230 of file efr32bg21_rac.h .

#define _RAC_IFADCTRIM_IFADCLDOSHUNTCURLP_MASK 0x100UL

Bit mask for RAC_IFADCLDOSHUNTCURLP

Definition at line 2227 of file efr32bg21_rac.h .

#define _RAC_IFADCTRIM_IFADCLDOSHUNTCURLP_SHIFT 8

Shift value for RAC_IFADCLDOSHUNTCURLP

Definition at line 2226 of file efr32bg21_rac.h .

#define _RAC_IFADCTRIM_IFADCLDOSHUNTCURLVL_current_180uA 0x00000000UL

Mode current_180uA for RAC_IFADCTRIM

Definition at line 2237 of file efr32bg21_rac.h .

#define _RAC_IFADCTRIM_IFADCLDOSHUNTCURLVL_current_190uA 0x00000001UL

Mode current_190uA for RAC_IFADCTRIM

Definition at line 2238 of file efr32bg21_rac.h .

#define _RAC_IFADCTRIM_IFADCLDOSHUNTCURLVL_current_200uA 0x00000002UL

Mode current_200uA for RAC_IFADCTRIM

Definition at line 2239 of file efr32bg21_rac.h .

#define _RAC_IFADCTRIM_IFADCLDOSHUNTCURLVL_current_210uA 0x00000003UL

Mode current_210uA for RAC_IFADCTRIM

Definition at line 2240 of file efr32bg21_rac.h .

#define _RAC_IFADCTRIM_IFADCLDOSHUNTCURLVL_DEFAULT 0x00000001UL

Mode DEFAULT for RAC_IFADCTRIM

Definition at line 2236 of file efr32bg21_rac.h .

#define _RAC_IFADCTRIM_IFADCLDOSHUNTCURLVL_MASK 0x600UL

Bit mask for RAC_IFADCLDOSHUNTCURLVL

Definition at line 2235 of file efr32bg21_rac.h .

#define _RAC_IFADCTRIM_IFADCLDOSHUNTCURLVL_SHIFT 9

Shift value for RAC_IFADCLDOSHUNTCURLVL

Definition at line 2234 of file efr32bg21_rac.h .

#define _RAC_IFADCTRIM_IFADCOTAST1CURRENT_DEFAULT 0x00000002UL

Mode DEFAULT for RAC_IFADCTRIM

Definition at line 2248 of file efr32bg21_rac.h .

#define _RAC_IFADCTRIM_IFADCOTAST1CURRENT_MASK 0x1800UL

Bit mask for RAC_IFADCOTAST1CURRENT

Definition at line 2247 of file efr32bg21_rac.h .

#define _RAC_IFADCTRIM_IFADCOTAST1CURRENT_negative_11p 0x00000001UL

Mode negative_11p for RAC_IFADCTRIM

Definition at line 2250 of file efr32bg21_rac.h .

#define _RAC_IFADCTRIM_IFADCOTAST1CURRENT_negative_20p 0x00000000UL

Mode negative_20p for RAC_IFADCTRIM

Definition at line 2249 of file efr32bg21_rac.h .

#define _RAC_IFADCTRIM_IFADCOTAST1CURRENT_nominal 0x00000002UL

Mode nominal for RAC_IFADCTRIM

Definition at line 2251 of file efr32bg21_rac.h .

#define _RAC_IFADCTRIM_IFADCOTAST1CURRENT_positive_15p 0x00000003UL

Mode positive_15p for RAC_IFADCTRIM

Definition at line 2252 of file efr32bg21_rac.h .

#define _RAC_IFADCTRIM_IFADCOTAST1CURRENT_SHIFT 11

Shift value for RAC_IFADCOTAST1CURRENT

Definition at line 2246 of file efr32bg21_rac.h .

#define _RAC_IFADCTRIM_IFADCOTAST2CURRENT_DEFAULT 0x00000002UL

Mode DEFAULT for RAC_IFADCTRIM

Definition at line 2260 of file efr32bg21_rac.h .

#define _RAC_IFADCTRIM_IFADCOTAST2CURRENT_MASK 0x6000UL

Bit mask for RAC_IFADCOTAST2CURRENT

Definition at line 2259 of file efr32bg21_rac.h .

#define _RAC_IFADCTRIM_IFADCOTAST2CURRENT_negative_11p 0x00000001UL

Mode negative_11p for RAC_IFADCTRIM

Definition at line 2262 of file efr32bg21_rac.h .

#define _RAC_IFADCTRIM_IFADCOTAST2CURRENT_negative_20p 0x00000000UL

Mode negative_20p for RAC_IFADCTRIM

Definition at line 2261 of file efr32bg21_rac.h .

#define _RAC_IFADCTRIM_IFADCOTAST2CURRENT_nominal 0x00000002UL

Mode nominal for RAC_IFADCTRIM

Definition at line 2263 of file efr32bg21_rac.h .

#define _RAC_IFADCTRIM_IFADCOTAST2CURRENT_positive_15p 0x00000003UL

Mode positive_15p for RAC_IFADCTRIM

Definition at line 2264 of file efr32bg21_rac.h .

#define _RAC_IFADCTRIM_IFADCOTAST2CURRENT_SHIFT 13

Shift value for RAC_IFADCOTAST2CURRENT

Definition at line 2258 of file efr32bg21_rac.h .

#define _RAC_IFADCTRIM_IFADCREFBUFAMPLVL_DEFAULT 0x00000004UL

Mode DEFAULT for RAC_IFADCTRIM

Definition at line 2272 of file efr32bg21_rac.h .

#define _RAC_IFADCTRIM_IFADCREFBUFAMPLVL_MASK 0x38000UL

Bit mask for RAC_IFADCREFBUFAMPLVL

Definition at line 2271 of file efr32bg21_rac.h .

#define _RAC_IFADCTRIM_IFADCREFBUFAMPLVL_SHIFT 15

Shift value for RAC_IFADCREFBUFAMPLVL

Definition at line 2270 of file efr32bg21_rac.h .

#define _RAC_IFADCTRIM_IFADCREFBUFAMPLVL_v0p88 0x00000000UL

Mode v0p88 for RAC_IFADCTRIM

Definition at line 2273 of file efr32bg21_rac.h .

#define _RAC_IFADCTRIM_IFADCREFBUFAMPLVL_v0p91 0x00000001UL

Mode v0p91 for RAC_IFADCTRIM

Definition at line 2274 of file efr32bg21_rac.h .

#define _RAC_IFADCTRIM_IFADCREFBUFAMPLVL_v0p94 0x00000002UL

Mode v0p94 for RAC_IFADCTRIM

Definition at line 2275 of file efr32bg21_rac.h .

#define _RAC_IFADCTRIM_IFADCREFBUFAMPLVL_v0p97 0x00000003UL

Mode v0p97 for RAC_IFADCTRIM

Definition at line 2276 of file efr32bg21_rac.h .

#define _RAC_IFADCTRIM_IFADCREFBUFAMPLVL_v1p00 0x00000004UL

Mode v1p00 for RAC_IFADCTRIM

Definition at line 2277 of file efr32bg21_rac.h .

#define _RAC_IFADCTRIM_IFADCREFBUFAMPLVL_v1p03 0x00000005UL

Mode v1p03 for RAC_IFADCTRIM

Definition at line 2278 of file efr32bg21_rac.h .

#define _RAC_IFADCTRIM_IFADCREFBUFAMPLVL_v1p06 0x00000006UL

Mode v1p06 for RAC_IFADCTRIM

Definition at line 2279 of file efr32bg21_rac.h .

#define _RAC_IFADCTRIM_IFADCREFBUFAMPLVL_v1p09 0x00000007UL

Mode v1p09 for RAC_IFADCTRIM

Definition at line 2280 of file efr32bg21_rac.h .

#define _RAC_IFADCTRIM_IFADCREFBUFCURLVL_current_65uA 0x00000000UL

Mode current_65uA for RAC_IFADCTRIM

Definition at line 2293 of file efr32bg21_rac.h .

#define _RAC_IFADCTRIM_IFADCREFBUFCURLVL_current_75uA 0x00000001UL

Mode current_75uA for RAC_IFADCTRIM

Definition at line 2294 of file efr32bg21_rac.h .

#define _RAC_IFADCTRIM_IFADCREFBUFCURLVL_current_85uA 0x00000002UL

Mode current_85uA for RAC_IFADCTRIM

Definition at line 2295 of file efr32bg21_rac.h .

#define _RAC_IFADCTRIM_IFADCREFBUFCURLVL_current_95uA 0x00000003UL

Mode current_95uA for RAC_IFADCTRIM

Definition at line 2296 of file efr32bg21_rac.h .

#define _RAC_IFADCTRIM_IFADCREFBUFCURLVL_DEFAULT 0x00000001UL

Mode DEFAULT for RAC_IFADCTRIM

Definition at line 2292 of file efr32bg21_rac.h .

#define _RAC_IFADCTRIM_IFADCREFBUFCURLVL_MASK 0xC0000UL

Bit mask for RAC_IFADCREFBUFCURLVL

Definition at line 2291 of file efr32bg21_rac.h .

#define _RAC_IFADCTRIM_IFADCREFBUFCURLVL_SHIFT 18

Shift value for RAC_IFADCREFBUFCURLVL

Definition at line 2290 of file efr32bg21_rac.h .

#define _RAC_IFADCTRIM_IFADCSIDETONEAMP_DEFAULT 0x00000001UL

Mode DEFAULT for RAC_IFADCTRIM

Definition at line 2304 of file efr32bg21_rac.h .

#define _RAC_IFADCTRIM_IFADCSIDETONEAMP_diff_pk_100mV 0x00000003UL

Mode diff_pk_100mV for RAC_IFADCTRIM

Definition at line 2308 of file efr32bg21_rac.h .

#define _RAC_IFADCTRIM_IFADCSIDETONEAMP_diff_pk_10mV 0x00000000UL

Mode diff_pk_10mV for RAC_IFADCTRIM

Definition at line 2305 of file efr32bg21_rac.h .

#define _RAC_IFADCTRIM_IFADCSIDETONEAMP_diff_pk_20mV 0x00000001UL

Mode diff_pk_20mV for RAC_IFADCTRIM

Definition at line 2306 of file efr32bg21_rac.h .

#define _RAC_IFADCTRIM_IFADCSIDETONEAMP_diff_pk_50mV 0x00000002UL

Mode diff_pk_50mV for RAC_IFADCTRIM

Definition at line 2307 of file efr32bg21_rac.h .

#define _RAC_IFADCTRIM_IFADCSIDETONEAMP_MASK 0x300000UL

Bit mask for RAC_IFADCSIDETONEAMP

Definition at line 2303 of file efr32bg21_rac.h .

#define _RAC_IFADCTRIM_IFADCSIDETONEAMP_SHIFT 20

Shift value for RAC_IFADCSIDETONEAMP

Definition at line 2302 of file efr32bg21_rac.h .

#define _RAC_IFADCTRIM_IFADCSIDETONEFREQ_DEFAULT 0x00000002UL

Mode DEFAULT for RAC_IFADCTRIM

Definition at line 2316 of file efr32bg21_rac.h .

#define _RAC_IFADCTRIM_IFADCSIDETONEFREQ_div_128 0x00000001UL

Mode div_128 for RAC_IFADCTRIM

Definition at line 2318 of file efr32bg21_rac.h .

#define _RAC_IFADCTRIM_IFADCSIDETONEFREQ_div_16 0x00000004UL

Mode div_16 for RAC_IFADCTRIM

Definition at line 2321 of file efr32bg21_rac.h .

#define _RAC_IFADCTRIM_IFADCSIDETONEFREQ_div_32 0x00000003UL

Mode div_32 for RAC_IFADCTRIM

Definition at line 2320 of file efr32bg21_rac.h .

#define _RAC_IFADCTRIM_IFADCSIDETONEFREQ_div_4 0x00000006UL

Mode div_4 for RAC_IFADCTRIM

Definition at line 2323 of file efr32bg21_rac.h .

#define _RAC_IFADCTRIM_IFADCSIDETONEFREQ_div_64 0x00000002UL

Mode div_64 for RAC_IFADCTRIM

Definition at line 2319 of file efr32bg21_rac.h .

#define _RAC_IFADCTRIM_IFADCSIDETONEFREQ_div_8 0x00000005UL

Mode div_8 for RAC_IFADCTRIM

Definition at line 2322 of file efr32bg21_rac.h .

#define _RAC_IFADCTRIM_IFADCSIDETONEFREQ_MASK 0x1C00000UL

Bit mask for RAC_IFADCSIDETONEFREQ

Definition at line 2315 of file efr32bg21_rac.h .

#define _RAC_IFADCTRIM_IFADCSIDETONEFREQ_na0 0x00000000UL

Mode na0 for RAC_IFADCTRIM

Definition at line 2317 of file efr32bg21_rac.h .

#define _RAC_IFADCTRIM_IFADCSIDETONEFREQ_na7 0x00000007UL

Mode na7 for RAC_IFADCTRIM

Definition at line 2324 of file efr32bg21_rac.h .

#define _RAC_IFADCTRIM_IFADCSIDETONEFREQ_SHIFT 22

Shift value for RAC_IFADCSIDETONEFREQ

Definition at line 2314 of file efr32bg21_rac.h .

#define _RAC_IFADCTRIM_IFADCTUNEZERO_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_IFADCTRIM

Definition at line 2337 of file efr32bg21_rac.h .

#define _RAC_IFADCTRIM_IFADCTUNEZERO_half_freq_zero 0x00000001UL

Mode half_freq_zero for RAC_IFADCTRIM

Definition at line 2339 of file efr32bg21_rac.h .

#define _RAC_IFADCTRIM_IFADCTUNEZERO_MASK 0x2000000UL

Bit mask for RAC_IFADCTUNEZERO

Definition at line 2336 of file efr32bg21_rac.h .

#define _RAC_IFADCTRIM_IFADCTUNEZERO_nominal_zero 0x00000000UL

Mode nominal_zero for RAC_IFADCTRIM

Definition at line 2338 of file efr32bg21_rac.h .

#define _RAC_IFADCTRIM_IFADCTUNEZERO_SHIFT 25

Shift value for RAC_IFADCTUNEZERO

Definition at line 2335 of file efr32bg21_rac.h .

#define _RAC_IFADCTRIM_IFADCVCMLVL_DEFAULT 0x00000002UL

Mode DEFAULT for RAC_IFADCTRIM

Definition at line 2345 of file efr32bg21_rac.h .

#define _RAC_IFADCTRIM_IFADCVCMLVL_MASK 0xC000000UL

Bit mask for RAC_IFADCVCMLVL

Definition at line 2344 of file efr32bg21_rac.h .

#define _RAC_IFADCTRIM_IFADCVCMLVL_ratio_0p48 0x00000000UL

Mode ratio_0p48 for RAC_IFADCTRIM

Definition at line 2346 of file efr32bg21_rac.h .

#define _RAC_IFADCTRIM_IFADCVCMLVL_ratio_0p49 0x00000001UL

Mode ratio_0p49 for RAC_IFADCTRIM

Definition at line 2347 of file efr32bg21_rac.h .

#define _RAC_IFADCTRIM_IFADCVCMLVL_ratio_0p5 0x00000002UL

Mode ratio_0p5 for RAC_IFADCTRIM

Definition at line 2348 of file efr32bg21_rac.h .

#define _RAC_IFADCTRIM_IFADCVCMLVL_ratio_0p52 0x00000003UL

Mode ratio_0p52 for RAC_IFADCTRIM

Definition at line 2349 of file efr32bg21_rac.h .

#define _RAC_IFADCTRIM_IFADCVCMLVL_SHIFT 26

Shift value for RAC_IFADCVCMLVL

Definition at line 2343 of file efr32bg21_rac.h .

#define _RAC_IFADCTRIM_MASK 0x0FFFFFFFUL

Mask for RAC_IFADCTRIM

Definition at line 2166 of file efr32bg21_rac.h .

#define _RAC_IFADCTRIM_RESETVALUE 0x08965290UL

Default value for RAC_IFADCTRIM

Definition at line 2165 of file efr32bg21_rac.h .

#define _RAC_IFPGACTRL_DCCALDCGEAR_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_IFPGACTRL

Definition at line 1466 of file efr32bg21_rac.h .

#define _RAC_IFPGACTRL_DCCALDCGEAR_MASK 0xE000000UL

Bit mask for RAC_DCCALDCGEAR

Definition at line 1465 of file efr32bg21_rac.h .

#define _RAC_IFPGACTRL_DCCALDCGEAR_SHIFT 25

Shift value for RAC_DCCALDCGEAR

Definition at line 1464 of file efr32bg21_rac.h .

#define _RAC_IFPGACTRL_DCCALDEC0_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_IFPGACTRL

Definition at line 1452 of file efr32bg21_rac.h .

#define _RAC_IFPGACTRL_DCCALDEC0_DF3 0x00000000UL

Mode DF3 for RAC_IFPGACTRL

Definition at line 1453 of file efr32bg21_rac.h .

#define _RAC_IFPGACTRL_DCCALDEC0_DF4NARROW 0x00000002UL

Mode DF4NARROW for RAC_IFPGACTRL

Definition at line 1455 of file efr32bg21_rac.h .

#define _RAC_IFPGACTRL_DCCALDEC0_DF4WIDE 0x00000001UL

Mode DF4WIDE for RAC_IFPGACTRL

Definition at line 1454 of file efr32bg21_rac.h .

#define _RAC_IFPGACTRL_DCCALDEC0_DF8NARROW 0x00000004UL

Mode DF8NARROW for RAC_IFPGACTRL

Definition at line 1457 of file efr32bg21_rac.h .

#define _RAC_IFPGACTRL_DCCALDEC0_DF8WIDE 0x00000003UL

Mode DF8WIDE for RAC_IFPGACTRL

Definition at line 1456 of file efr32bg21_rac.h .

#define _RAC_IFPGACTRL_DCCALDEC0_MASK 0x1C00000UL

Bit mask for RAC_DCCALDEC0

Definition at line 1451 of file efr32bg21_rac.h .

#define _RAC_IFPGACTRL_DCCALDEC0_SHIFT 22

Shift value for RAC_DCCALDEC0

Definition at line 1450 of file efr32bg21_rac.h .

#define _RAC_IFPGACTRL_DCCALON_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_IFPGACTRL

Definition at line 1426 of file efr32bg21_rac.h .

#define _RAC_IFPGACTRL_DCCALON_DISABLE 0x00000000UL

Mode DISABLE for RAC_IFPGACTRL

Definition at line 1427 of file efr32bg21_rac.h .

#define _RAC_IFPGACTRL_DCCALON_ENABLE 0x00000001UL

Mode ENABLE for RAC_IFPGACTRL

Definition at line 1428 of file efr32bg21_rac.h .

#define _RAC_IFPGACTRL_DCCALON_MASK 0x80000UL

Bit mask for RAC_DCCALON

Definition at line 1425 of file efr32bg21_rac.h .

#define _RAC_IFPGACTRL_DCCALON_SHIFT 19

Shift value for RAC_DCCALON

Definition at line 1424 of file efr32bg21_rac.h .

#define _RAC_IFPGACTRL_DCESTIEN_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_IFPGACTRL

Definition at line 1444 of file efr32bg21_rac.h .

#define _RAC_IFPGACTRL_DCESTIEN_DISABLE 0x00000000UL

Mode DISABLE for RAC_IFPGACTRL

Definition at line 1445 of file efr32bg21_rac.h .

#define _RAC_IFPGACTRL_DCESTIEN_ENABLE 0x00000001UL

Mode ENABLE for RAC_IFPGACTRL

Definition at line 1446 of file efr32bg21_rac.h .

#define _RAC_IFPGACTRL_DCESTIEN_MASK 0x200000UL

Bit mask for RAC_DCESTIEN

Definition at line 1443 of file efr32bg21_rac.h .

#define _RAC_IFPGACTRL_DCESTIEN_SHIFT 21

Shift value for RAC_DCESTIEN

Definition at line 1442 of file efr32bg21_rac.h .

#define _RAC_IFPGACTRL_DCRSTEN_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_IFPGACTRL

Definition at line 1435 of file efr32bg21_rac.h .

#define _RAC_IFPGACTRL_DCRSTEN_DISABLE 0x00000000UL

Mode DISABLE for RAC_IFPGACTRL

Definition at line 1436 of file efr32bg21_rac.h .

#define _RAC_IFPGACTRL_DCRSTEN_ENABLE 0x00000001UL

Mode ENABLE for RAC_IFPGACTRL

Definition at line 1437 of file efr32bg21_rac.h .

#define _RAC_IFPGACTRL_DCRSTEN_MASK 0x100000UL

Bit mask for RAC_DCRSTEN

Definition at line 1434 of file efr32bg21_rac.h .

#define _RAC_IFPGACTRL_DCRSTEN_SHIFT 20

Shift value for RAC_DCRSTEN

Definition at line 1433 of file efr32bg21_rac.h .

#define _RAC_IFPGACTRL_MASK 0x0FF80000UL

Mask for RAC_IFPGACTRL

Definition at line 1422 of file efr32bg21_rac.h .

#define _RAC_IFPGACTRL_RESETVALUE 0x00000000UL

Default value for RAC_IFPGACTRL

Definition at line 1421 of file efr32bg21_rac.h .

#define _RAC_IPVERSION_IPVERSION_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_IPVERSION

Definition at line 483 of file efr32bg21_rac.h .

#define _RAC_IPVERSION_IPVERSION_MASK 0xFFFFFFFFUL

Bit mask for RAC_IPVERSION

Definition at line 482 of file efr32bg21_rac.h .

#define _RAC_IPVERSION_IPVERSION_SHIFT 0

Shift value for RAC_IPVERSION

Definition at line 481 of file efr32bg21_rac.h .

#define _RAC_IPVERSION_MASK 0xFFFFFFFFUL

Mask for RAC_IPVERSION

Definition at line 480 of file efr32bg21_rac.h .

#define _RAC_IPVERSION_RESETVALUE 0x00000000UL

Default value for RAC_IPVERSION

Definition at line 479 of file efr32bg21_rac.h .

#define _RAC_LNAMIXCAL_LNAMIXCALEN_cal_disable 0x00000000UL

Mode cal_disable for RAC_LNAMIXCAL

Definition at line 2554 of file efr32bg21_rac.h .

#define _RAC_LNAMIXCAL_LNAMIXCALEN_cal_enable 0x00000001UL

Mode cal_enable for RAC_LNAMIXCAL

Definition at line 2555 of file efr32bg21_rac.h .

#define _RAC_LNAMIXCAL_LNAMIXCALEN_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_LNAMIXCAL

Definition at line 2553 of file efr32bg21_rac.h .

#define _RAC_LNAMIXCAL_LNAMIXCALEN_MASK 0x1UL

Bit mask for RAC_LNAMIXCALEN

Definition at line 2552 of file efr32bg21_rac.h .

#define _RAC_LNAMIXCAL_LNAMIXCALEN_SHIFT 0

Shift value for RAC_LNAMIXCALEN

Definition at line 2551 of file efr32bg21_rac.h .

#define _RAC_LNAMIXCAL_LNAMIXCALVMODE_current_mode 0x00000000UL

Mode current_mode for RAC_LNAMIXCAL

Definition at line 2563 of file efr32bg21_rac.h .

#define _RAC_LNAMIXCAL_LNAMIXCALVMODE_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_LNAMIXCAL

Definition at line 2562 of file efr32bg21_rac.h .

#define _RAC_LNAMIXCAL_LNAMIXCALVMODE_MASK 0x2UL

Bit mask for RAC_LNAMIXCALVMODE

Definition at line 2561 of file efr32bg21_rac.h .

#define _RAC_LNAMIXCAL_LNAMIXCALVMODE_SHIFT 1

Shift value for RAC_LNAMIXCALVMODE

Definition at line 2560 of file efr32bg21_rac.h .

#define _RAC_LNAMIXCAL_LNAMIXCALVMODE_voltage_mode 0x00000001UL

Mode voltage_mode for RAC_LNAMIXCAL

Definition at line 2564 of file efr32bg21_rac.h .

#define _RAC_LNAMIXCAL_LNAMIXENIRCAL1_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_LNAMIXCAL

Definition at line 2571 of file efr32bg21_rac.h .

#define _RAC_LNAMIXCAL_LNAMIXENIRCAL1_disable 0x00000000UL

Mode disable for RAC_LNAMIXCAL

Definition at line 2572 of file efr32bg21_rac.h .

#define _RAC_LNAMIXCAL_LNAMIXENIRCAL1_enable 0x00000001UL

Mode enable for RAC_LNAMIXCAL

Definition at line 2573 of file efr32bg21_rac.h .

#define _RAC_LNAMIXCAL_LNAMIXENIRCAL1_MASK 0x4UL

Bit mask for RAC_LNAMIXENIRCAL1

Definition at line 2570 of file efr32bg21_rac.h .

#define _RAC_LNAMIXCAL_LNAMIXENIRCAL1_SHIFT 2

Shift value for RAC_LNAMIXENIRCAL1

Definition at line 2569 of file efr32bg21_rac.h .

#define _RAC_LNAMIXCAL_LNAMIXENIRCAL2_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_LNAMIXCAL

Definition at line 2580 of file efr32bg21_rac.h .

#define _RAC_LNAMIXCAL_LNAMIXENIRCAL2_disable 0x00000000UL

Mode disable for RAC_LNAMIXCAL

Definition at line 2581 of file efr32bg21_rac.h .

#define _RAC_LNAMIXCAL_LNAMIXENIRCAL2_enable 0x00000001UL

Mode enable for RAC_LNAMIXCAL

Definition at line 2582 of file efr32bg21_rac.h .

#define _RAC_LNAMIXCAL_LNAMIXENIRCAL2_MASK 0x8UL

Bit mask for RAC_LNAMIXENIRCAL2

Definition at line 2579 of file efr32bg21_rac.h .

#define _RAC_LNAMIXCAL_LNAMIXENIRCAL2_SHIFT 3

Shift value for RAC_LNAMIXENIRCAL2

Definition at line 2578 of file efr32bg21_rac.h .

#define _RAC_LNAMIXCAL_LNAMIXIRCAL1AMP_DEFAULT 0x00000007UL

Mode DEFAULT for RAC_LNAMIXCAL

Definition at line 2588 of file efr32bg21_rac.h .

#define _RAC_LNAMIXCAL_LNAMIXIRCAL1AMP_MASK 0x70UL

Bit mask for RAC_LNAMIXIRCAL1AMP

Definition at line 2587 of file efr32bg21_rac.h .

#define _RAC_LNAMIXCAL_LNAMIXIRCAL1AMP_SHIFT 4

Shift value for RAC_LNAMIXIRCAL1AMP

Definition at line 2586 of file efr32bg21_rac.h .

#define _RAC_LNAMIXCAL_LNAMIXIRCAL2AMP_DEFAULT 0x00000007UL

Mode DEFAULT for RAC_LNAMIXCAL

Definition at line 2592 of file efr32bg21_rac.h .

#define _RAC_LNAMIXCAL_LNAMIXIRCAL2AMP_MASK 0x380UL

Bit mask for RAC_LNAMIXIRCAL2AMP

Definition at line 2591 of file efr32bg21_rac.h .

#define _RAC_LNAMIXCAL_LNAMIXIRCAL2AMP_SHIFT 7

Shift value for RAC_LNAMIXIRCAL2AMP

Definition at line 2590 of file efr32bg21_rac.h .

#define _RAC_LNAMIXCAL_MASK 0x000003FFUL

Mask for RAC_LNAMIXCAL

Definition at line 2549 of file efr32bg21_rac.h .

#define _RAC_LNAMIXCAL_RESETVALUE 0x000003F0UL

Default value for RAC_LNAMIXCAL

Definition at line 2548 of file efr32bg21_rac.h .

#define _RAC_LNAMIXEN_LNAMIXENLDO_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_LNAMIXEN

Definition at line 2601 of file efr32bg21_rac.h .

#define _RAC_LNAMIXEN_LNAMIXENLDO_disable 0x00000000UL

Mode disable for RAC_LNAMIXEN

Definition at line 2602 of file efr32bg21_rac.h .

#define _RAC_LNAMIXEN_LNAMIXENLDO_enable 0x00000001UL

Mode enable for RAC_LNAMIXEN

Definition at line 2603 of file efr32bg21_rac.h .

#define _RAC_LNAMIXEN_LNAMIXENLDO_MASK 0x1UL

Bit mask for RAC_LNAMIXENLDO

Definition at line 2600 of file efr32bg21_rac.h .

#define _RAC_LNAMIXEN_LNAMIXENLDO_SHIFT 0

Shift value for RAC_LNAMIXENLDO

Definition at line 2599 of file efr32bg21_rac.h .

#define _RAC_LNAMIXEN_MASK 0x00000001UL

Mask for RAC_LNAMIXEN

Definition at line 2597 of file efr32bg21_rac.h .

#define _RAC_LNAMIXEN_RESETVALUE 0x00000000UL

Default value for RAC_LNAMIXEN

Definition at line 2596 of file efr32bg21_rac.h .

#define _RAC_LNAMIXTRIM0_LNAMIXCURCTRL_DEFAULT 0x0000003DUL

Mode DEFAULT for RAC_LNAMIXTRIM0

Definition at line 2400 of file efr32bg21_rac.h .

#define _RAC_LNAMIXTRIM0_LNAMIXCURCTRL_MASK 0x3FUL

Bit mask for RAC_LNAMIXCURCTRL

Definition at line 2399 of file efr32bg21_rac.h .

#define _RAC_LNAMIXTRIM0_LNAMIXCURCTRL_SHIFT 0

Shift value for RAC_LNAMIXCURCTRL

Definition at line 2398 of file efr32bg21_rac.h .

#define _RAC_LNAMIXTRIM0_LNAMIXHIGHCUR_current_470uA 0x00000000UL

Mode current_470uA for RAC_LNAMIXTRIM0

Definition at line 2405 of file efr32bg21_rac.h .

#define _RAC_LNAMIXTRIM0_LNAMIXHIGHCUR_current_530uA 0x00000001UL

Mode current_530uA for RAC_LNAMIXTRIM0

Definition at line 2406 of file efr32bg21_rac.h .

#define _RAC_LNAMIXTRIM0_LNAMIXHIGHCUR_current_590uA 0x00000003UL

Mode current_590uA for RAC_LNAMIXTRIM0

Definition at line 2408 of file efr32bg21_rac.h .

#define _RAC_LNAMIXTRIM0_LNAMIXHIGHCUR_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_LNAMIXTRIM0

Definition at line 2404 of file efr32bg21_rac.h .

#define _RAC_LNAMIXTRIM0_LNAMIXHIGHCUR_MASK 0xC0UL

Bit mask for RAC_LNAMIXHIGHCUR

Definition at line 2403 of file efr32bg21_rac.h .

#define _RAC_LNAMIXTRIM0_LNAMIXHIGHCUR_SHIFT 6

Shift value for RAC_LNAMIXHIGHCUR

Definition at line 2402 of file efr32bg21_rac.h .

#define _RAC_LNAMIXTRIM0_LNAMIXHIGHCUR_unused 0x00000002UL

Mode unused for RAC_LNAMIXTRIM0

Definition at line 2407 of file efr32bg21_rac.h .

#define _RAC_LNAMIXTRIM0_LNAMIXLOWCUR_current_60percent 0x00000003UL

Mode current_60percent for RAC_LNAMIXTRIM0

Definition at line 2420 of file efr32bg21_rac.h .

#define _RAC_LNAMIXTRIM0_LNAMIXLOWCUR_current_80percent 0x00000002UL

Mode current_80percent for RAC_LNAMIXTRIM0

Definition at line 2419 of file efr32bg21_rac.h .

#define _RAC_LNAMIXTRIM0_LNAMIXLOWCUR_current_nom 0x00000000UL

Mode current_nom for RAC_LNAMIXTRIM0

Definition at line 2417 of file efr32bg21_rac.h .

#define _RAC_LNAMIXTRIM0_LNAMIXLOWCUR_DEFAULT 0x00000001UL

Mode DEFAULT for RAC_LNAMIXTRIM0

Definition at line 2416 of file efr32bg21_rac.h .

#define _RAC_LNAMIXTRIM0_LNAMIXLOWCUR_MASK 0x300UL

Bit mask for RAC_LNAMIXLOWCUR

Definition at line 2415 of file efr32bg21_rac.h .

#define _RAC_LNAMIXTRIM0_LNAMIXLOWCUR_SHIFT 8

Shift value for RAC_LNAMIXLOWCUR

Definition at line 2414 of file efr32bg21_rac.h .

#define _RAC_LNAMIXTRIM0_LNAMIXLOWCUR_unused 0x00000001UL

Mode unused for RAC_LNAMIXTRIM0

Definition at line 2418 of file efr32bg21_rac.h .

#define _RAC_LNAMIXTRIM0_LNAMIXRFPKDBWSEL_DEFAULT 0x00000002UL

Mode DEFAULT for RAC_LNAMIXTRIM0

Definition at line 2428 of file efr32bg21_rac.h .

#define _RAC_LNAMIXTRIM0_LNAMIXRFPKDBWSEL_MASK 0xC00UL

Bit mask for RAC_LNAMIXRFPKDBWSEL

Definition at line 2427 of file efr32bg21_rac.h .

#define _RAC_LNAMIXTRIM0_LNAMIXRFPKDBWSEL_SHIFT 10

Shift value for RAC_LNAMIXRFPKDBWSEL

Definition at line 2426 of file efr32bg21_rac.h .

#define _RAC_LNAMIXTRIM0_LNAMIXRFPKDCALCM_DEFAULT 0x00000020UL

Mode DEFAULT for RAC_LNAMIXTRIM0

Definition at line 2432 of file efr32bg21_rac.h .

#define _RAC_LNAMIXTRIM0_LNAMIXRFPKDCALCM_MASK 0x3F000UL

Bit mask for RAC_LNAMIXRFPKDCALCM

Definition at line 2431 of file efr32bg21_rac.h .

#define _RAC_LNAMIXTRIM0_LNAMIXRFPKDCALCM_SHIFT 12

Shift value for RAC_LNAMIXRFPKDCALCM

Definition at line 2430 of file efr32bg21_rac.h .

#define _RAC_LNAMIXTRIM0_LNAMIXRFPKDCALDM_DEFAULT 0x00000010UL

Mode DEFAULT for RAC_LNAMIXTRIM0

Definition at line 2436 of file efr32bg21_rac.h .

#define _RAC_LNAMIXTRIM0_LNAMIXRFPKDCALDM_MASK 0x7C0000UL

Bit mask for RAC_LNAMIXRFPKDCALDM

Definition at line 2435 of file efr32bg21_rac.h .

#define _RAC_LNAMIXTRIM0_LNAMIXRFPKDCALDM_SHIFT 18

Shift value for RAC_LNAMIXRFPKDCALDM

Definition at line 2434 of file efr32bg21_rac.h .

#define _RAC_LNAMIXTRIM0_LNAMIXTRIMVREG_DEFAULT 0x00000008UL

Mode DEFAULT for RAC_LNAMIXTRIM0

Definition at line 2440 of file efr32bg21_rac.h .

#define _RAC_LNAMIXTRIM0_LNAMIXTRIMVREG_MASK 0x7800000UL

Bit mask for RAC_LNAMIXTRIMVREG

Definition at line 2439 of file efr32bg21_rac.h .

#define _RAC_LNAMIXTRIM0_LNAMIXTRIMVREG_SHIFT 23

Shift value for RAC_LNAMIXTRIMVREG

Definition at line 2438 of file efr32bg21_rac.h .

#define _RAC_LNAMIXTRIM0_MASK 0x07FFFFFFUL

Mask for RAC_LNAMIXTRIM0

Definition at line 2397 of file efr32bg21_rac.h .

#define _RAC_LNAMIXTRIM0_RESETVALUE 0x0442093DUL

Default value for RAC_LNAMIXTRIM0

Definition at line 2396 of file efr32bg21_rac.h .

#define _RAC_LNAMIXTRIM1_LNAMIXIBIAS1ADJ_DEFAULT 0x00000008UL

Mode DEFAULT for RAC_LNAMIXTRIM1

Definition at line 2448 of file efr32bg21_rac.h .

#define _RAC_LNAMIXTRIM1_LNAMIXIBIAS1ADJ_MASK 0xFUL

Bit mask for RAC_LNAMIXIBIAS1ADJ

Definition at line 2447 of file efr32bg21_rac.h .

#define _RAC_LNAMIXTRIM1_LNAMIXIBIAS1ADJ_SHIFT 0

Shift value for RAC_LNAMIXIBIAS1ADJ

Definition at line 2446 of file efr32bg21_rac.h .

#define _RAC_LNAMIXTRIM1_LNAMIXLNA1CAPSEL_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_LNAMIXTRIM1

Definition at line 2452 of file efr32bg21_rac.h .

#define _RAC_LNAMIXTRIM1_LNAMIXLNA1CAPSEL_MASK 0x70UL

Bit mask for RAC_LNAMIXLNA1CAPSEL

Definition at line 2451 of file efr32bg21_rac.h .

#define _RAC_LNAMIXTRIM1_LNAMIXLNA1CAPSEL_SHIFT 4

Shift value for RAC_LNAMIXLNA1CAPSEL

Definition at line 2450 of file efr32bg21_rac.h .

#define _RAC_LNAMIXTRIM1_LNAMIXMXRBIAS1_bias_1V 0x00000000UL

Mode bias_1V for RAC_LNAMIXTRIM1

Definition at line 2457 of file efr32bg21_rac.h .

#define _RAC_LNAMIXTRIM1_LNAMIXMXRBIAS1_bias_800m 0x00000003UL

Mode bias_800m for RAC_LNAMIXTRIM1

Definition at line 2460 of file efr32bg21_rac.h .

#define _RAC_LNAMIXTRIM1_LNAMIXMXRBIAS1_bias_900m 0x00000002UL

Mode bias_900m for RAC_LNAMIXTRIM1

Definition at line 2459 of file efr32bg21_rac.h .

#define _RAC_LNAMIXTRIM1_LNAMIXMXRBIAS1_DEFAULT 0x00000002UL

Mode DEFAULT for RAC_LNAMIXTRIM1

Definition at line 2456 of file efr32bg21_rac.h .

#define _RAC_LNAMIXTRIM1_LNAMIXMXRBIAS1_MASK 0x180UL

Bit mask for RAC_LNAMIXMXRBIAS1

Definition at line 2455 of file efr32bg21_rac.h .

#define _RAC_LNAMIXTRIM1_LNAMIXMXRBIAS1_SHIFT 7

Shift value for RAC_LNAMIXMXRBIAS1

Definition at line 2454 of file efr32bg21_rac.h .

#define _RAC_LNAMIXTRIM1_LNAMIXMXRBIAS1_unused 0x00000001UL

Mode unused for RAC_LNAMIXTRIM1

Definition at line 2458 of file efr32bg21_rac.h .

#define _RAC_LNAMIXTRIM1_LNAMIXNCAS1ADJ_DEFAULT 0x00000002UL

Mode DEFAULT for RAC_LNAMIXTRIM1

Definition at line 2468 of file efr32bg21_rac.h .

#define _RAC_LNAMIXTRIM1_LNAMIXNCAS1ADJ_MASK 0x600UL

Bit mask for RAC_LNAMIXNCAS1ADJ

Definition at line 2467 of file efr32bg21_rac.h .

#define _RAC_LNAMIXTRIM1_LNAMIXNCAS1ADJ_ncas_1V 0x00000000UL

Mode ncas_1V for RAC_LNAMIXTRIM1

Definition at line 2469 of file efr32bg21_rac.h .

#define _RAC_LNAMIXTRIM1_LNAMIXNCAS1ADJ_ncas_900m 0x00000003UL

Mode ncas_900m for RAC_LNAMIXTRIM1

Definition at line 2472 of file efr32bg21_rac.h .

#define _RAC_LNAMIXTRIM1_LNAMIXNCAS1ADJ_ncas_950m 0x00000002UL

Mode ncas_950m for RAC_LNAMIXTRIM1

Definition at line 2471 of file efr32bg21_rac.h .

#define _RAC_LNAMIXTRIM1_LNAMIXNCAS1ADJ_SHIFT 9

Shift value for RAC_LNAMIXNCAS1ADJ

Definition at line 2466 of file efr32bg21_rac.h .

#define _RAC_LNAMIXTRIM1_LNAMIXNCAS1ADJ_unused 0x00000001UL

Mode unused for RAC_LNAMIXTRIM1

Definition at line 2470 of file efr32bg21_rac.h .

#define _RAC_LNAMIXTRIM1_LNAMIXPCAS1ADJ_DEFAULT 0x00000002UL

Mode DEFAULT for RAC_LNAMIXTRIM1

Definition at line 2480 of file efr32bg21_rac.h .

#define _RAC_LNAMIXTRIM1_LNAMIXPCAS1ADJ_MASK 0x1800UL

Bit mask for RAC_LNAMIXPCAS1ADJ

Definition at line 2479 of file efr32bg21_rac.h .

#define _RAC_LNAMIXTRIM1_LNAMIXPCAS1ADJ_pcas_250m 0x00000000UL

Mode pcas_250m for RAC_LNAMIXTRIM1

Definition at line 2481 of file efr32bg21_rac.h .

#define _RAC_LNAMIXTRIM1_LNAMIXPCAS1ADJ_pcas_300m 0x00000002UL

Mode pcas_300m for RAC_LNAMIXTRIM1

Definition at line 2483 of file efr32bg21_rac.h .

#define _RAC_LNAMIXTRIM1_LNAMIXPCAS1ADJ_pcas_350m 0x00000003UL

Mode pcas_350m for RAC_LNAMIXTRIM1

Definition at line 2484 of file efr32bg21_rac.h .

#define _RAC_LNAMIXTRIM1_LNAMIXPCAS1ADJ_SHIFT 11

Shift value for RAC_LNAMIXPCAS1ADJ

Definition at line 2478 of file efr32bg21_rac.h .

#define _RAC_LNAMIXTRIM1_LNAMIXPCAS1ADJ_unused 0x00000001UL

Mode unused for RAC_LNAMIXTRIM1

Definition at line 2482 of file efr32bg21_rac.h .

#define _RAC_LNAMIXTRIM1_LNAMIXVOUT1ADJ_DEFAULT 0x00000008UL

Mode DEFAULT for RAC_LNAMIXTRIM1

Definition at line 2492 of file efr32bg21_rac.h .

#define _RAC_LNAMIXTRIM1_LNAMIXVOUT1ADJ_MASK 0x1E000UL

Bit mask for RAC_LNAMIXVOUT1ADJ

Definition at line 2491 of file efr32bg21_rac.h .

#define _RAC_LNAMIXTRIM1_LNAMIXVOUT1ADJ_SHIFT 13

Shift value for RAC_LNAMIXVOUT1ADJ

Definition at line 2490 of file efr32bg21_rac.h .

#define _RAC_LNAMIXTRIM1_MASK 0x0001FFFFUL

Mask for RAC_LNAMIXTRIM1

Definition at line 2445 of file efr32bg21_rac.h .

#define _RAC_LNAMIXTRIM1_RESETVALUE 0x00011508UL

Default value for RAC_LNAMIXTRIM1

Definition at line 2444 of file efr32bg21_rac.h .

#define _RAC_LNAMIXTRIM2_LNAMIXIBIAS2ADJ_DEFAULT 0x00000008UL

Mode DEFAULT for RAC_LNAMIXTRIM2

Definition at line 2500 of file efr32bg21_rac.h .

#define _RAC_LNAMIXTRIM2_LNAMIXIBIAS2ADJ_MASK 0xFUL

Bit mask for RAC_LNAMIXIBIAS2ADJ

Definition at line 2499 of file efr32bg21_rac.h .

#define _RAC_LNAMIXTRIM2_LNAMIXIBIAS2ADJ_SHIFT 0

Shift value for RAC_LNAMIXIBIAS2ADJ

Definition at line 2498 of file efr32bg21_rac.h .

#define _RAC_LNAMIXTRIM2_LNAMIXLNA2CAPSEL_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_LNAMIXTRIM2

Definition at line 2504 of file efr32bg21_rac.h .

#define _RAC_LNAMIXTRIM2_LNAMIXLNA2CAPSEL_MASK 0x70UL

Bit mask for RAC_LNAMIXLNA2CAPSEL

Definition at line 2503 of file efr32bg21_rac.h .

#define _RAC_LNAMIXTRIM2_LNAMIXLNA2CAPSEL_SHIFT 4

Shift value for RAC_LNAMIXLNA2CAPSEL

Definition at line 2502 of file efr32bg21_rac.h .

#define _RAC_LNAMIXTRIM2_LNAMIXMXRBIAS2_bias_1V 0x00000000UL

Mode bias_1V for RAC_LNAMIXTRIM2

Definition at line 2509 of file efr32bg21_rac.h .

#define _RAC_LNAMIXTRIM2_LNAMIXMXRBIAS2_bias_800m 0x00000003UL

Mode bias_800m for RAC_LNAMIXTRIM2

Definition at line 2512 of file efr32bg21_rac.h .

#define _RAC_LNAMIXTRIM2_LNAMIXMXRBIAS2_bias_900m 0x00000002UL

Mode bias_900m for RAC_LNAMIXTRIM2

Definition at line 2511 of file efr32bg21_rac.h .

#define _RAC_LNAMIXTRIM2_LNAMIXMXRBIAS2_DEFAULT 0x00000002UL

Mode DEFAULT for RAC_LNAMIXTRIM2

Definition at line 2508 of file efr32bg21_rac.h .

#define _RAC_LNAMIXTRIM2_LNAMIXMXRBIAS2_MASK 0x180UL

Bit mask for RAC_LNAMIXMXRBIAS2

Definition at line 2507 of file efr32bg21_rac.h .

#define _RAC_LNAMIXTRIM2_LNAMIXMXRBIAS2_SHIFT 7

Shift value for RAC_LNAMIXMXRBIAS2

Definition at line 2506 of file efr32bg21_rac.h .

#define _RAC_LNAMIXTRIM2_LNAMIXMXRBIAS2_unused 0x00000001UL

Mode unused for RAC_LNAMIXTRIM2

Definition at line 2510 of file efr32bg21_rac.h .

#define _RAC_LNAMIXTRIM2_LNAMIXNCAS2ADJ_DEFAULT 0x00000002UL

Mode DEFAULT for RAC_LNAMIXTRIM2

Definition at line 2520 of file efr32bg21_rac.h .

#define _RAC_LNAMIXTRIM2_LNAMIXNCAS2ADJ_MASK 0x600UL

Bit mask for RAC_LNAMIXNCAS2ADJ

Definition at line 2519 of file efr32bg21_rac.h .

#define _RAC_LNAMIXTRIM2_LNAMIXNCAS2ADJ_ncas_1V 0x00000000UL

Mode ncas_1V for RAC_LNAMIXTRIM2

Definition at line 2521 of file efr32bg21_rac.h .

#define _RAC_LNAMIXTRIM2_LNAMIXNCAS2ADJ_ncas_900m 0x00000003UL

Mode ncas_900m for RAC_LNAMIXTRIM2

Definition at line 2524 of file efr32bg21_rac.h .

#define _RAC_LNAMIXTRIM2_LNAMIXNCAS2ADJ_ncas_950m 0x00000002UL

Mode ncas_950m for RAC_LNAMIXTRIM2

Definition at line 2523 of file efr32bg21_rac.h .

#define _RAC_LNAMIXTRIM2_LNAMIXNCAS2ADJ_SHIFT 9

Shift value for RAC_LNAMIXNCAS2ADJ

Definition at line 2518 of file efr32bg21_rac.h .

#define _RAC_LNAMIXTRIM2_LNAMIXNCAS2ADJ_unused 0x00000001UL

Mode unused for RAC_LNAMIXTRIM2

Definition at line 2522 of file efr32bg21_rac.h .

#define _RAC_LNAMIXTRIM2_LNAMIXPCAS2ADJ_DEFAULT 0x00000002UL

Mode DEFAULT for RAC_LNAMIXTRIM2

Definition at line 2532 of file efr32bg21_rac.h .

#define _RAC_LNAMIXTRIM2_LNAMIXPCAS2ADJ_MASK 0x1800UL

Bit mask for RAC_LNAMIXPCAS2ADJ

Definition at line 2531 of file efr32bg21_rac.h .

#define _RAC_LNAMIXTRIM2_LNAMIXPCAS2ADJ_pcas_250m 0x00000000UL

Mode pcas_250m for RAC_LNAMIXTRIM2

Definition at line 2533 of file efr32bg21_rac.h .

#define _RAC_LNAMIXTRIM2_LNAMIXPCAS2ADJ_pcas_300m 0x00000002UL

Mode pcas_300m for RAC_LNAMIXTRIM2

Definition at line 2535 of file efr32bg21_rac.h .

#define _RAC_LNAMIXTRIM2_LNAMIXPCAS2ADJ_pcas_350m 0x00000003UL

Mode pcas_350m for RAC_LNAMIXTRIM2

Definition at line 2536 of file efr32bg21_rac.h .

#define _RAC_LNAMIXTRIM2_LNAMIXPCAS2ADJ_SHIFT 11

Shift value for RAC_LNAMIXPCAS2ADJ

Definition at line 2530 of file efr32bg21_rac.h .

#define _RAC_LNAMIXTRIM2_LNAMIXPCAS2ADJ_unused 0x00000001UL

Mode unused for RAC_LNAMIXTRIM2

Definition at line 2534 of file efr32bg21_rac.h .

#define _RAC_LNAMIXTRIM2_LNAMIXVOUT2ADJ_DEFAULT 0x00000008UL

Mode DEFAULT for RAC_LNAMIXTRIM2

Definition at line 2544 of file efr32bg21_rac.h .

#define _RAC_LNAMIXTRIM2_LNAMIXVOUT2ADJ_MASK 0x1E000UL

Bit mask for RAC_LNAMIXVOUT2ADJ

Definition at line 2543 of file efr32bg21_rac.h .

#define _RAC_LNAMIXTRIM2_LNAMIXVOUT2ADJ_SHIFT 13

Shift value for RAC_LNAMIXVOUT2ADJ

Definition at line 2542 of file efr32bg21_rac.h .

#define _RAC_LNAMIXTRIM2_MASK 0x0001FFFFUL

Mask for RAC_LNAMIXTRIM2

Definition at line 2497 of file efr32bg21_rac.h .

#define _RAC_LNAMIXTRIM2_RESETVALUE 0x00011508UL

Default value for RAC_LNAMIXTRIM2

Definition at line 2496 of file efr32bg21_rac.h .

#define _RAC_PACTRL_MASK 0x00FF07FFUL

Mask for RAC_PACTRL

Definition at line 3261 of file efr32bg21_rac.h .

#define _RAC_PACTRL_PAEN10DBMVMID_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_PACTRL

Definition at line 3265 of file efr32bg21_rac.h .

#define _RAC_PACTRL_PAEN10DBMVMID_disable 0x00000000UL

Mode disable for RAC_PACTRL

Definition at line 3266 of file efr32bg21_rac.h .

#define _RAC_PACTRL_PAEN10DBMVMID_enable 0x00000001UL

Mode enable for RAC_PACTRL

Definition at line 3267 of file efr32bg21_rac.h .

#define _RAC_PACTRL_PAEN10DBMVMID_MASK 0x1UL

Bit mask for RAC_PAEN10DBMVMID

Definition at line 3264 of file efr32bg21_rac.h .

#define _RAC_PACTRL_PAEN10DBMVMID_SHIFT 0

Shift value for RAC_PAEN10DBMVMID

Definition at line 3263 of file efr32bg21_rac.h .

#define _RAC_PACTRL_PAEN20DBMVMID_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_PACTRL

Definition at line 3274 of file efr32bg21_rac.h .

#define _RAC_PACTRL_PAEN20DBMVMID_disable 0x00000000UL

Mode disable for RAC_PACTRL

Definition at line 3275 of file efr32bg21_rac.h .

#define _RAC_PACTRL_PAEN20DBMVMID_enable 0x00000001UL

Mode enable for RAC_PACTRL

Definition at line 3276 of file efr32bg21_rac.h .

#define _RAC_PACTRL_PAEN20DBMVMID_MASK 0x2UL

Bit mask for RAC_PAEN20DBMVMID

Definition at line 3273 of file efr32bg21_rac.h .

#define _RAC_PACTRL_PAEN20DBMVMID_SHIFT 1

Shift value for RAC_PAEN20DBMVMID

Definition at line 3272 of file efr32bg21_rac.h .

#define _RAC_PACTRL_PAENCAPATT_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_PACTRL

Definition at line 3283 of file efr32bg21_rac.h .

#define _RAC_PACTRL_PAENCAPATT_disable 0x00000000UL

Mode disable for RAC_PACTRL

Definition at line 3284 of file efr32bg21_rac.h .

#define _RAC_PACTRL_PAENCAPATT_enable 0x00000001UL

Mode enable for RAC_PACTRL

Definition at line 3285 of file efr32bg21_rac.h .

#define _RAC_PACTRL_PAENCAPATT_MASK 0x4UL

Bit mask for RAC_PAENCAPATT

Definition at line 3282 of file efr32bg21_rac.h .

#define _RAC_PACTRL_PAENCAPATT_SHIFT 2

Shift value for RAC_PAENCAPATT

Definition at line 3281 of file efr32bg21_rac.h .

#define _RAC_PACTRL_PAENLATCHBYPASS_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_PACTRL

Definition at line 3292 of file efr32bg21_rac.h .

#define _RAC_PACTRL_PAENLATCHBYPASS_disable 0x00000000UL

Mode disable for RAC_PACTRL

Definition at line 3293 of file efr32bg21_rac.h .

#define _RAC_PACTRL_PAENLATCHBYPASS_enable 0x00000001UL

Mode enable for RAC_PACTRL

Definition at line 3294 of file efr32bg21_rac.h .

#define _RAC_PACTRL_PAENLATCHBYPASS_MASK 0x8UL

Bit mask for RAC_PAENLATCHBYPASS

Definition at line 3291 of file efr32bg21_rac.h .

#define _RAC_PACTRL_PAENLATCHBYPASS_SHIFT 3

Shift value for RAC_PAENLATCHBYPASS

Definition at line 3290 of file efr32bg21_rac.h .

#define _RAC_PACTRL_PAENPOWERRAMPINGCLK_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_PACTRL

Definition at line 3301 of file efr32bg21_rac.h .

#define _RAC_PACTRL_PAENPOWERRAMPINGCLK_en_clk 0x00000001UL

Mode en_clk for RAC_PACTRL

Definition at line 3303 of file efr32bg21_rac.h .

#define _RAC_PACTRL_PAENPOWERRAMPINGCLK_MASK 0x10UL

Bit mask for RAC_PAENPOWERRAMPINGCLK

Definition at line 3300 of file efr32bg21_rac.h .

#define _RAC_PACTRL_PAENPOWERRAMPINGCLK_SHIFT 4

Shift value for RAC_PAENPOWERRAMPINGCLK

Definition at line 3299 of file efr32bg21_rac.h .

#define _RAC_PACTRL_PAENPOWERRAMPINGCLK_silence_clk 0x00000000UL

Mode silence_clk for RAC_PACTRL

Definition at line 3302 of file efr32bg21_rac.h .

#define _RAC_PACTRL_PAPOWER_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_PACTRL

Definition at line 3363 of file efr32bg21_rac.h .

#define _RAC_PACTRL_PAPOWER_MASK 0xF0000UL

Bit mask for RAC_PAPOWER

Definition at line 3362 of file efr32bg21_rac.h .

#define _RAC_PACTRL_PAPOWER_SHIFT 16

Shift value for RAC_PAPOWER

Definition at line 3361 of file efr32bg21_rac.h .

#define _RAC_PACTRL_PAPOWER_t0stripeon 0x00000000UL

Mode t0stripeon for RAC_PACTRL

Definition at line 3364 of file efr32bg21_rac.h .

#define _RAC_PACTRL_PAPOWER_t10stripeon 0x0000000AUL

Mode t10stripeon for RAC_PACTRL

Definition at line 3374 of file efr32bg21_rac.h .

#define _RAC_PACTRL_PAPOWER_t11stripeon 0x0000000BUL

Mode t11stripeon for RAC_PACTRL

Definition at line 3375 of file efr32bg21_rac.h .

#define _RAC_PACTRL_PAPOWER_t12stripeon 0x0000000CUL

Mode t12stripeon for RAC_PACTRL

Definition at line 3376 of file efr32bg21_rac.h .

#define _RAC_PACTRL_PAPOWER_t13stripeon 0x0000000DUL

Mode t13stripeon for RAC_PACTRL

Definition at line 3377 of file efr32bg21_rac.h .

#define _RAC_PACTRL_PAPOWER_t14stripeon 0x0000000EUL

Mode t14stripeon for RAC_PACTRL

Definition at line 3378 of file efr32bg21_rac.h .

#define _RAC_PACTRL_PAPOWER_t15stripeon 0x0000000FUL

Mode t15stripeon for RAC_PACTRL

Definition at line 3379 of file efr32bg21_rac.h .

#define _RAC_PACTRL_PAPOWER_t1stripeon 0x00000001UL

Mode t1stripeon for RAC_PACTRL

Definition at line 3365 of file efr32bg21_rac.h .

#define _RAC_PACTRL_PAPOWER_t2stripeon 0x00000002UL

Mode t2stripeon for RAC_PACTRL

Definition at line 3366 of file efr32bg21_rac.h .

#define _RAC_PACTRL_PAPOWER_t3stripeon 0x00000003UL

Mode t3stripeon for RAC_PACTRL

Definition at line 3367 of file efr32bg21_rac.h .

#define _RAC_PACTRL_PAPOWER_t4stripeon 0x00000004UL

Mode t4stripeon for RAC_PACTRL

Definition at line 3368 of file efr32bg21_rac.h .

#define _RAC_PACTRL_PAPOWER_t5stripeon 0x00000005UL

Mode t5stripeon for RAC_PACTRL

Definition at line 3369 of file efr32bg21_rac.h .

#define _RAC_PACTRL_PAPOWER_t6stripeon 0x00000006UL

Mode t6stripeon for RAC_PACTRL

Definition at line 3370 of file efr32bg21_rac.h .

#define _RAC_PACTRL_PAPOWER_t7stripeon 0x00000007UL

Mode t7stripeon for RAC_PACTRL

Definition at line 3371 of file efr32bg21_rac.h .

#define _RAC_PACTRL_PAPOWER_t8stripeon 0x00000008UL

Mode t8stripeon for RAC_PACTRL

Definition at line 3372 of file efr32bg21_rac.h .

#define _RAC_PACTRL_PAPOWER_t9stripeon 0x00000009UL

Mode t9stripeon for RAC_PACTRL

Definition at line 3373 of file efr32bg21_rac.h .

#define _RAC_PACTRL_PAPULLDOWNVDDPA_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_PACTRL

Definition at line 3310 of file efr32bg21_rac.h .

#define _RAC_PACTRL_PAPULLDOWNVDDPA_MASK 0x20UL

Bit mask for RAC_PAPULLDOWNVDDPA

Definition at line 3309 of file efr32bg21_rac.h .

#define _RAC_PACTRL_PAPULLDOWNVDDPA_not_pull_down 0x00000000UL

Mode not_pull_down for RAC_PACTRL

Definition at line 3311 of file efr32bg21_rac.h .

#define _RAC_PACTRL_PAPULLDOWNVDDPA_pull_down_vddpa 0x00000001UL

Mode pull_down_vddpa for RAC_PACTRL

Definition at line 3312 of file efr32bg21_rac.h .

#define _RAC_PACTRL_PAPULLDOWNVDDPA_SHIFT 5

Shift value for RAC_PAPULLDOWNVDDPA

Definition at line 3308 of file efr32bg21_rac.h .

#define _RAC_PACTRL_PAREGBYPASSPDRVLDO_bypass 0x00000001UL

Mode bypass for RAC_PACTRL

Definition at line 3321 of file efr32bg21_rac.h .

#define _RAC_PACTRL_PAREGBYPASSPDRVLDO_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_PACTRL

Definition at line 3319 of file efr32bg21_rac.h .

#define _RAC_PACTRL_PAREGBYPASSPDRVLDO_MASK 0x40UL

Bit mask for RAC_PAREGBYPASSPDRVLDO

Definition at line 3318 of file efr32bg21_rac.h .

#define _RAC_PACTRL_PAREGBYPASSPDRVLDO_not_bypass 0x00000000UL

Mode not_bypass for RAC_PACTRL

Definition at line 3320 of file efr32bg21_rac.h .

#define _RAC_PACTRL_PAREGBYPASSPDRVLDO_SHIFT 6

Shift value for RAC_PAREGBYPASSPDRVLDO

Definition at line 3317 of file efr32bg21_rac.h .

#define _RAC_PACTRL_PAREGBYPASSPREREG_bypass 0x00000001UL

Mode bypass for RAC_PACTRL

Definition at line 3330 of file efr32bg21_rac.h .

#define _RAC_PACTRL_PAREGBYPASSPREREG_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_PACTRL

Definition at line 3328 of file efr32bg21_rac.h .

#define _RAC_PACTRL_PAREGBYPASSPREREG_MASK 0x80UL

Bit mask for RAC_PAREGBYPASSPREREG

Definition at line 3327 of file efr32bg21_rac.h .

#define _RAC_PACTRL_PAREGBYPASSPREREG_not_bypass 0x00000000UL

Mode not_bypass for RAC_PACTRL

Definition at line 3329 of file efr32bg21_rac.h .

#define _RAC_PACTRL_PAREGBYPASSPREREG_SHIFT 7

Shift value for RAC_PAREGBYPASSPREREG

Definition at line 3326 of file efr32bg21_rac.h .

#define _RAC_PACTRL_PASELLDOVDDPA_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_PACTRL

Definition at line 3337 of file efr32bg21_rac.h .

#define _RAC_PACTRL_PASELLDOVDDPA_MASK 0x100UL

Bit mask for RAC_PASELLDOVDDPA

Definition at line 3336 of file efr32bg21_rac.h .

#define _RAC_PACTRL_PASELLDOVDDPA_not_selected 0x00000000UL

Mode not_selected for RAC_PACTRL

Definition at line 3338 of file efr32bg21_rac.h .

#define _RAC_PACTRL_PASELLDOVDDPA_selected 0x00000001UL

Mode selected for RAC_PACTRL

Definition at line 3339 of file efr32bg21_rac.h .

#define _RAC_PACTRL_PASELLDOVDDPA_SHIFT 8

Shift value for RAC_PASELLDOVDDPA

Definition at line 3335 of file efr32bg21_rac.h .

#define _RAC_PACTRL_PASELLDOVDDRF_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_PACTRL

Definition at line 3346 of file efr32bg21_rac.h .

#define _RAC_PACTRL_PASELLDOVDDRF_MASK 0x200UL

Bit mask for RAC_PASELLDOVDDRF

Definition at line 3345 of file efr32bg21_rac.h .

#define _RAC_PACTRL_PASELLDOVDDRF_not_selected 0x00000000UL

Mode not_selected for RAC_PACTRL

Definition at line 3347 of file efr32bg21_rac.h .

#define _RAC_PACTRL_PASELLDOVDDRF_selected 0x00000001UL

Mode selected for RAC_PACTRL

Definition at line 3348 of file efr32bg21_rac.h .

#define _RAC_PACTRL_PASELLDOVDDRF_SHIFT 9

Shift value for RAC_PASELLDOVDDRF

Definition at line 3344 of file efr32bg21_rac.h .

#define _RAC_PACTRL_PASELSLICE_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_PACTRL

Definition at line 3399 of file efr32bg21_rac.h .

#define _RAC_PACTRL_PASELSLICE_MASK 0xF00000UL

Bit mask for RAC_PASELSLICE

Definition at line 3398 of file efr32bg21_rac.h .

#define _RAC_PACTRL_PASELSLICE_SHIFT 20

Shift value for RAC_PASELSLICE

Definition at line 3397 of file efr32bg21_rac.h .

#define _RAC_PACTRL_PASLICERST_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_PACTRL

Definition at line 3355 of file efr32bg21_rac.h .

#define _RAC_PACTRL_PASLICERST_disable 0x00000000UL

Mode disable for RAC_PACTRL

Definition at line 3356 of file efr32bg21_rac.h .

#define _RAC_PACTRL_PASLICERST_enable 0x00000001UL

Mode enable for RAC_PACTRL

Definition at line 3357 of file efr32bg21_rac.h .

#define _RAC_PACTRL_PASLICERST_MASK 0x400UL

Bit mask for RAC_PASLICERST

Definition at line 3354 of file efr32bg21_rac.h .

#define _RAC_PACTRL_PASLICERST_SHIFT 10

Shift value for RAC_PASLICERST

Definition at line 3353 of file efr32bg21_rac.h .

#define _RAC_PACTRL_RESETVALUE 0x00000000UL

Default value for RAC_PACTRL

Definition at line 3260 of file efr32bg21_rac.h .

#define _RAC_PAENCTRL_MASK 0x00000100UL

Mask for RAC_PAENCTRL

Definition at line 1471 of file efr32bg21_rac.h .

#define _RAC_PAENCTRL_PARAMP_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_PAENCTRL

Definition at line 1475 of file efr32bg21_rac.h .

#define _RAC_PAENCTRL_PARAMP_MASK 0x100UL

Bit mask for RAC_PARAMP

Definition at line 1474 of file efr32bg21_rac.h .

#define _RAC_PAENCTRL_PARAMP_SHIFT 8

Shift value for RAC_PARAMP

Definition at line 1473 of file efr32bg21_rac.h .

#define _RAC_PAENCTRL_RESETVALUE 0x00000000UL

Default value for RAC_PAENCTRL

Definition at line 1470 of file efr32bg21_rac.h .

#define _RAC_PATRIM0_MASK 0x3FFFFFFFUL

Mask for RAC_PATRIM0

Definition at line 2655 of file efr32bg21_rac.h .

#define _RAC_PATRIM0_PATRIMDRVREGIBCORE0DBM_DEFAULT 0x00000003UL

Mode DEFAULT for RAC_PATRIM0

Definition at line 2658 of file efr32bg21_rac.h .

#define _RAC_PATRIM0_PATRIMDRVREGIBCORE0DBM_i_4u 0x00000000UL

Mode i_4u for RAC_PATRIM0

Definition at line 2659 of file efr32bg21_rac.h .

#define _RAC_PATRIM0_PATRIMDRVREGIBCORE0DBM_i_5u 0x00000001UL

Mode i_5u for RAC_PATRIM0

Definition at line 2660 of file efr32bg21_rac.h .

#define _RAC_PATRIM0_PATRIMDRVREGIBCORE0DBM_i_6u 0x00000002UL

Mode i_6u for RAC_PATRIM0

Definition at line 2661 of file efr32bg21_rac.h .

#define _RAC_PATRIM0_PATRIMDRVREGIBCORE0DBM_i_7u 0x00000003UL

Mode i_7u for RAC_PATRIM0

Definition at line 2662 of file efr32bg21_rac.h .

#define _RAC_PATRIM0_PATRIMDRVREGIBCORE0DBM_MASK 0x3UL

Bit mask for RAC_PATRIMDRVREGIBCORE0DBM

Definition at line 2657 of file efr32bg21_rac.h .

#define _RAC_PATRIM0_PATRIMDRVREGIBCORE0DBM_SHIFT 0

Shift value for RAC_PATRIMDRVREGIBCORE0DBM

Definition at line 2656 of file efr32bg21_rac.h .

#define _RAC_PATRIM0_PATRIMDRVREGIBNDIO0DBM_DEFAULT 0x00000004UL

Mode DEFAULT for RAC_PATRIM0

Definition at line 2670 of file efr32bg21_rac.h .

#define _RAC_PATRIM0_PATRIMDRVREGIBNDIO0DBM_MASK 0x3CUL

Bit mask for RAC_PATRIMDRVREGIBNDIO0DBM

Definition at line 2669 of file efr32bg21_rac.h .

#define _RAC_PATRIM0_PATRIMDRVREGIBNDIO0DBM_NA_10 0x0000000AUL

Mode NA_10 for RAC_PATRIM0

Definition at line 2681 of file efr32bg21_rac.h .

#define _RAC_PATRIM0_PATRIMDRVREGIBNDIO0DBM_NA_11 0x0000000BUL

Mode NA_11 for RAC_PATRIM0

Definition at line 2682 of file efr32bg21_rac.h .

#define _RAC_PATRIM0_PATRIMDRVREGIBNDIO0DBM_NA_12 0x0000000CUL

Mode NA_12 for RAC_PATRIM0

Definition at line 2683 of file efr32bg21_rac.h .

#define _RAC_PATRIM0_PATRIMDRVREGIBNDIO0DBM_NA_13 0x0000000DUL

Mode NA_13 for RAC_PATRIM0

Definition at line 2684 of file efr32bg21_rac.h .

#define _RAC_PATRIM0_PATRIMDRVREGIBNDIO0DBM_NA_14 0x0000000EUL

Mode NA_14 for RAC_PATRIM0

Definition at line 2685 of file efr32bg21_rac.h .

#define _RAC_PATRIM0_PATRIMDRVREGIBNDIO0DBM_NA_15 0x0000000FUL

Mode NA_15 for RAC_PATRIM0

Definition at line 2686 of file efr32bg21_rac.h .

#define _RAC_PATRIM0_PATRIMDRVREGIBNDIO0DBM_SHIFT 2

Shift value for RAC_PATRIMDRVREGIBNDIO0DBM

Definition at line 2668 of file efr32bg21_rac.h .

#define _RAC_PATRIM0_PATRIMDRVREGIBNDIO0DBM_vreg_1p09 0x00000000UL

Mode vreg_1p09 for RAC_PATRIM0

Definition at line 2671 of file efr32bg21_rac.h .

#define _RAC_PATRIM0_PATRIMDRVREGIBNDIO0DBM_vreg_1p13 0x00000001UL

Mode vreg_1p13 for RAC_PATRIM0

Definition at line 2672 of file efr32bg21_rac.h .

#define _RAC_PATRIM0_PATRIMDRVREGIBNDIO0DBM_vreg_1p16 0x00000002UL

Mode vreg_1p16 for RAC_PATRIM0

Definition at line 2673 of file efr32bg21_rac.h .

#define _RAC_PATRIM0_PATRIMDRVREGIBNDIO0DBM_vreg_1p20 0x00000003UL

Mode vreg_1p20 for RAC_PATRIM0

Definition at line 2674 of file efr32bg21_rac.h .

#define _RAC_PATRIM0_PATRIMDRVREGIBNDIO0DBM_vreg_1p23 0x00000004UL

Mode vreg_1p23 for RAC_PATRIM0

Definition at line 2675 of file efr32bg21_rac.h .

#define _RAC_PATRIM0_PATRIMDRVREGIBNDIO0DBM_vreg_1p25 0x00000005UL

Mode vreg_1p25 for RAC_PATRIM0

Definition at line 2676 of file efr32bg21_rac.h .

#define _RAC_PATRIM0_PATRIMDRVREGIBNDIO0DBM_vreg_1p28 0x00000006UL

Mode vreg_1p28 for RAC_PATRIM0

Definition at line 2677 of file efr32bg21_rac.h .

#define _RAC_PATRIM0_PATRIMDRVREGIBNDIO0DBM_vreg_1p31 0x00000007UL

Mode vreg_1p31 for RAC_PATRIM0

Definition at line 2678 of file efr32bg21_rac.h .

#define _RAC_PATRIM0_PATRIMDRVREGIBNDIO0DBM_vreg_1p33 0x00000008UL

Mode vreg_1p33 for RAC_PATRIM0

Definition at line 2679 of file efr32bg21_rac.h .

#define _RAC_PATRIM0_PATRIMDRVREGIBNDIO0DBM_vreg_1p36 0x00000009UL

Mode vreg_1p36 for RAC_PATRIM0

Definition at line 2680 of file efr32bg21_rac.h .

#define _RAC_PATRIM0_PATRIMDRVREGPSR0DBM_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_PATRIM0

Definition at line 2707 of file efr32bg21_rac.h .

#define _RAC_PATRIM0_PATRIMDRVREGPSR0DBM_disable 0x00000000UL

Mode disable for RAC_PATRIM0

Definition at line 2708 of file efr32bg21_rac.h .

#define _RAC_PATRIM0_PATRIMDRVREGPSR0DBM_enable 0x00000001UL

Mode enable for RAC_PATRIM0

Definition at line 2709 of file efr32bg21_rac.h .

#define _RAC_PATRIM0_PATRIMDRVREGPSR0DBM_MASK 0x40UL

Bit mask for RAC_PATRIMDRVREGPSR0DBM

Definition at line 2706 of file efr32bg21_rac.h .

#define _RAC_PATRIM0_PATRIMDRVREGPSR0DBM_SHIFT 6

Shift value for RAC_PATRIMDRVREGPSR0DBM

Definition at line 2705 of file efr32bg21_rac.h .

#define _RAC_PATRIM0_PATRIMDRVSLICE0DBM_DEFAULT 0x00000003UL

Mode DEFAULT for RAC_PATRIM0

Definition at line 2715 of file efr32bg21_rac.h .

#define _RAC_PATRIM0_PATRIMDRVSLICE0DBM_MASK 0x180UL

Bit mask for RAC_PATRIMDRVSLICE0DBM

Definition at line 2714 of file efr32bg21_rac.h .

#define _RAC_PATRIM0_PATRIMDRVSLICE0DBM_on_0_slice 0x00000000UL

Mode on_0_slice for RAC_PATRIM0

Definition at line 2716 of file efr32bg21_rac.h .

#define _RAC_PATRIM0_PATRIMDRVSLICE0DBM_on_1_slice 0x00000001UL

Mode on_1_slice for RAC_PATRIM0

Definition at line 2717 of file efr32bg21_rac.h .

#define _RAC_PATRIM0_PATRIMDRVSLICE0DBM_on_2_slice 0x00000002UL

Mode on_2_slice for RAC_PATRIM0

Definition at line 2718 of file efr32bg21_rac.h .

#define _RAC_PATRIM0_PATRIMDRVSLICE0DBM_on_3_slice 0x00000003UL

Mode on_3_slice for RAC_PATRIM0

Definition at line 2719 of file efr32bg21_rac.h .

#define _RAC_PATRIM0_PATRIMDRVSLICE0DBM_SHIFT 7

Shift value for RAC_PATRIMDRVSLICE0DBM

Definition at line 2713 of file efr32bg21_rac.h .

#define _RAC_PATRIM0_PATRIMFB0DBM_DEFAULT 0x00000006UL

Mode DEFAULT for RAC_PATRIM0

Definition at line 2727 of file efr32bg21_rac.h .

#define _RAC_PATRIM0_PATRIMFB0DBM_MASK 0x1E00UL

Bit mask for RAC_PATRIMFB0DBM

Definition at line 2726 of file efr32bg21_rac.h .

#define _RAC_PATRIM0_PATRIMFB0DBM_SHIFT 9

Shift value for RAC_PATRIMFB0DBM

Definition at line 2725 of file efr32bg21_rac.h .

#define _RAC_PATRIM0_PATRIMFB0DBM_vo_vi_0p475 0x00000000UL

Mode vo_vi_0p475 for RAC_PATRIM0

Definition at line 2728 of file efr32bg21_rac.h .

#define _RAC_PATRIM0_PATRIMFB0DBM_vo_vi_0p500 0x00000001UL

Mode vo_vi_0p500 for RAC_PATRIM0

Definition at line 2729 of file efr32bg21_rac.h .

#define _RAC_PATRIM0_PATRIMFB0DBM_vo_vi_0p525 0x00000002UL

Mode vo_vi_0p525 for RAC_PATRIM0

Definition at line 2730 of file efr32bg21_rac.h .

#define _RAC_PATRIM0_PATRIMFB0DBM_vo_vi_0p550 0x00000003UL

Mode vo_vi_0p550 for RAC_PATRIM0

Definition at line 2731 of file efr32bg21_rac.h .

#define _RAC_PATRIM0_PATRIMFB0DBM_vo_vi_0p575 0x00000004UL

Mode vo_vi_0p575 for RAC_PATRIM0

Definition at line 2732 of file efr32bg21_rac.h .

#define _RAC_PATRIM0_PATRIMFB0DBM_vo_vi_0p600 0x00000005UL

Mode vo_vi_0p600 for RAC_PATRIM0

Definition at line 2733 of file efr32bg21_rac.h .

#define _RAC_PATRIM0_PATRIMFB0DBM_vo_vi_0p625 0x00000006UL

Mode vo_vi_0p625 for RAC_PATRIM0

Definition at line 2734 of file efr32bg21_rac.h .

#define _RAC_PATRIM0_PATRIMFB0DBM_vo_vi_0p650 0x00000007UL

Mode vo_vi_0p650 for RAC_PATRIM0

Definition at line 2735 of file efr32bg21_rac.h .

#define _RAC_PATRIM0_PATRIMFB0DBM_vo_vi_0p675 0x00000008UL

Mode vo_vi_0p675 for RAC_PATRIM0

Definition at line 2736 of file efr32bg21_rac.h .

#define _RAC_PATRIM0_PATRIMFB0DBM_vo_vi_0p700 0x00000009UL

Mode vo_vi_0p700 for RAC_PATRIM0

Definition at line 2737 of file efr32bg21_rac.h .

#define _RAC_PATRIM0_PATRIMFB0DBM_vo_vi_0p725 0x0000000AUL

Mode vo_vi_0p725 for RAC_PATRIM0

Definition at line 2738 of file efr32bg21_rac.h .

#define _RAC_PATRIM0_PATRIMFB0DBM_vo_vi_0p750 0x0000000BUL

Mode vo_vi_0p750 for RAC_PATRIM0

Definition at line 2739 of file efr32bg21_rac.h .

#define _RAC_PATRIM0_PATRIMFB0DBM_vo_vi_0p775 0x0000000CUL

Mode vo_vi_0p775 for RAC_PATRIM0

Definition at line 2740 of file efr32bg21_rac.h .

#define _RAC_PATRIM0_PATRIMFB0DBM_vo_vi_0p80 0x0000000DUL

Mode vo_vi_0p80 for RAC_PATRIM0

Definition at line 2741 of file efr32bg21_rac.h .

#define _RAC_PATRIM0_PATRIMFB0DBM_vo_vi_0p825 0x0000000EUL

Mode vo_vi_0p825 for RAC_PATRIM0

Definition at line 2742 of file efr32bg21_rac.h .

#define _RAC_PATRIM0_PATRIMFB0DBM_vo_vi_0p85 0x0000000FUL

Mode vo_vi_0p85 for RAC_PATRIM0

Definition at line 2743 of file efr32bg21_rac.h .

#define _RAC_PATRIM0_PATRIMPABIASN0DBM_DEFAULT 0x00000004UL

Mode DEFAULT for RAC_PATRIM0

Definition at line 2763 of file efr32bg21_rac.h .

#define _RAC_PATRIM0_PATRIMPABIASN0DBM_MASK 0x1E000UL

Bit mask for RAC_PATRIMPABIASN0DBM

Definition at line 2762 of file efr32bg21_rac.h .

#define _RAC_PATRIM0_PATRIMPABIASN0DBM_SHIFT 13

Shift value for RAC_PATRIMPABIASN0DBM

Definition at line 2761 of file efr32bg21_rac.h .

#define _RAC_PATRIM0_PATRIMPABIASN0DBM_v_450m 0x00000000UL

Mode v_450m for RAC_PATRIM0

Definition at line 2764 of file efr32bg21_rac.h .

#define _RAC_PATRIM0_PATRIMPABIASN0DBM_v_462p5m 0x00000001UL

Mode v_462p5m for RAC_PATRIM0

Definition at line 2765 of file efr32bg21_rac.h .

#define _RAC_PATRIM0_PATRIMPABIASN0DBM_v_475m 0x00000002UL

Mode v_475m for RAC_PATRIM0

Definition at line 2766 of file efr32bg21_rac.h .

#define _RAC_PATRIM0_PATRIMPABIASN0DBM_v_487p5m 0x00000003UL

Mode v_487p5m for RAC_PATRIM0

Definition at line 2767 of file efr32bg21_rac.h .

#define _RAC_PATRIM0_PATRIMPABIASN0DBM_v_500m 0x00000004UL

Mode v_500m for RAC_PATRIM0

Definition at line 2768 of file efr32bg21_rac.h .

#define _RAC_PATRIM0_PATRIMPABIASN0DBM_v_512p5m 0x00000005UL

Mode v_512p5m for RAC_PATRIM0

Definition at line 2769 of file efr32bg21_rac.h .

#define _RAC_PATRIM0_PATRIMPABIASN0DBM_v_525m 0x00000006UL

Mode v_525m for RAC_PATRIM0

Definition at line 2770 of file efr32bg21_rac.h .

#define _RAC_PATRIM0_PATRIMPABIASN0DBM_v_537p5m 0x00000007UL

Mode v_537p5m for RAC_PATRIM0

Definition at line 2771 of file efr32bg21_rac.h .

#define _RAC_PATRIM0_PATRIMPABIASN0DBM_v_550m 0x00000008UL

Mode v_550m for RAC_PATRIM0

Definition at line 2772 of file efr32bg21_rac.h .

#define _RAC_PATRIM0_PATRIMPABIASN0DBM_v_562p5m 0x00000009UL

Mode v_562p5m for RAC_PATRIM0

Definition at line 2773 of file efr32bg21_rac.h .

#define _RAC_PATRIM0_PATRIMPABIASN0DBM_v_575m 0x0000000AUL

Mode v_575m for RAC_PATRIM0

Definition at line 2774 of file efr32bg21_rac.h .

#define _RAC_PATRIM0_PATRIMPABIASN0DBM_v_587p5m 0x0000000BUL

Mode v_587p5m for RAC_PATRIM0

Definition at line 2775 of file efr32bg21_rac.h .

#define _RAC_PATRIM0_PATRIMPABIASN0DBM_v_600m 0x0000000CUL

Mode v_600m for RAC_PATRIM0

Definition at line 2776 of file efr32bg21_rac.h .

#define _RAC_PATRIM0_PATRIMPABIASN0DBM_v_612p5m 0x0000000DUL

Mode v_612p5m for RAC_PATRIM0

Definition at line 2777 of file efr32bg21_rac.h .

#define _RAC_PATRIM0_PATRIMPABIASN0DBM_v_625m 0x0000000EUL

Mode v_625m for RAC_PATRIM0

Definition at line 2778 of file efr32bg21_rac.h .

#define _RAC_PATRIM0_PATRIMPABIASN0DBM_v_637p5m 0x0000000FUL

Mode v_637p5m for RAC_PATRIM0

Definition at line 2779 of file efr32bg21_rac.h .

#define _RAC_PATRIM0_PATRIMPABIASP0DBM_DEFAULT 0x00000004UL

Mode DEFAULT for RAC_PATRIM0

Definition at line 2799 of file efr32bg21_rac.h .

#define _RAC_PATRIM0_PATRIMPABIASP0DBM_MASK 0x1E0000UL

Bit mask for RAC_PATRIMPABIASP0DBM

Definition at line 2798 of file efr32bg21_rac.h .

#define _RAC_PATRIM0_PATRIMPABIASP0DBM_SHIFT 17

Shift value for RAC_PATRIMPABIASP0DBM

Definition at line 2797 of file efr32bg21_rac.h .

#define _RAC_PATRIM0_PATRIMPABIASP0DBM_v_450m 0x00000000UL

Mode v_450m for RAC_PATRIM0

Definition at line 2800 of file efr32bg21_rac.h .

#define _RAC_PATRIM0_PATRIMPABIASP0DBM_v_462p5m 0x00000001UL

Mode v_462p5m for RAC_PATRIM0

Definition at line 2801 of file efr32bg21_rac.h .

#define _RAC_PATRIM0_PATRIMPABIASP0DBM_v_475m 0x00000002UL

Mode v_475m for RAC_PATRIM0

Definition at line 2802 of file efr32bg21_rac.h .

#define _RAC_PATRIM0_PATRIMPABIASP0DBM_v_487p5m 0x00000003UL

Mode v_487p5m for RAC_PATRIM0

Definition at line 2803 of file efr32bg21_rac.h .

#define _RAC_PATRIM0_PATRIMPABIASP0DBM_v_500m 0x00000004UL

Mode v_500m for RAC_PATRIM0

Definition at line 2804 of file efr32bg21_rac.h .

#define _RAC_PATRIM0_PATRIMPABIASP0DBM_v_512p5m 0x00000005UL

Mode v_512p5m for RAC_PATRIM0

Definition at line 2805 of file efr32bg21_rac.h .

#define _RAC_PATRIM0_PATRIMPABIASP0DBM_v_525m 0x00000006UL

Mode v_525m for RAC_PATRIM0

Definition at line 2806 of file efr32bg21_rac.h .

#define _RAC_PATRIM0_PATRIMPABIASP0DBM_v_537p5m 0x00000007UL

Mode v_537p5m for RAC_PATRIM0

Definition at line 2807 of file efr32bg21_rac.h .

#define _RAC_PATRIM0_PATRIMPABIASP0DBM_v_550m 0x00000008UL

Mode v_550m for RAC_PATRIM0

Definition at line 2808 of file efr32bg21_rac.h .

#define _RAC_PATRIM0_PATRIMPABIASP0DBM_v_562p5m 0x00000009UL

Mode v_562p5m for RAC_PATRIM0

Definition at line 2809 of file efr32bg21_rac.h .

#define _RAC_PATRIM0_PATRIMPABIASP0DBM_v_575m 0x0000000AUL

Mode v_575m for RAC_PATRIM0

Definition at line 2810 of file efr32bg21_rac.h .

#define _RAC_PATRIM0_PATRIMPABIASP0DBM_v_587p5m 0x0000000BUL

Mode v_587p5m for RAC_PATRIM0

Definition at line 2811 of file efr32bg21_rac.h .

#define _RAC_PATRIM0_PATRIMPABIASP0DBM_v_600m 0x0000000CUL

Mode v_600m for RAC_PATRIM0

Definition at line 2812 of file efr32bg21_rac.h .

#define _RAC_PATRIM0_PATRIMPABIASP0DBM_v_612p5m 0x0000000DUL

Mode v_612p5m for RAC_PATRIM0

Definition at line 2813 of file efr32bg21_rac.h .

#define _RAC_PATRIM0_PATRIMPABIASP0DBM_v_625m 0x0000000EUL

Mode v_625m for RAC_PATRIM0

Definition at line 2814 of file efr32bg21_rac.h .

#define _RAC_PATRIM0_PATRIMPABIASP0DBM_v_637p5m 0x0000000FUL

Mode v_637p5m for RAC_PATRIM0

Definition at line 2815 of file efr32bg21_rac.h .

#define _RAC_PATRIM0_PATRIMPASLICE0DBM_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_PATRIM0

Definition at line 2835 of file efr32bg21_rac.h .

#define _RAC_PATRIM0_PATRIMPASLICE0DBM_MASK 0x7E00000UL

Bit mask for RAC_PATRIMPASLICE0DBM

Definition at line 2834 of file efr32bg21_rac.h .

#define _RAC_PATRIM0_PATRIMPASLICE0DBM_on_slice_0 0x00000000UL

Mode on_slice_0 for RAC_PATRIM0

Definition at line 2836 of file efr32bg21_rac.h .

#define _RAC_PATRIM0_PATRIMPASLICE0DBM_on_slice_63 0x0000003FUL

Mode on_slice_63 for RAC_PATRIM0

Definition at line 2837 of file efr32bg21_rac.h .

#define _RAC_PATRIM0_PATRIMPASLICE0DBM_SHIFT 21

Shift value for RAC_PATRIMPASLICE0DBM

Definition at line 2833 of file efr32bg21_rac.h .

#define _RAC_PATRIM0_PATRIMVREF0DBM_DEFAULT 0x00000004UL

Mode DEFAULT for RAC_PATRIM0

Definition at line 2843 of file efr32bg21_rac.h .

#define _RAC_PATRIM0_PATRIMVREF0DBM_MASK 0x38000000UL

Bit mask for RAC_PATRIMVREF0DBM

Definition at line 2842 of file efr32bg21_rac.h .

#define _RAC_PATRIM0_PATRIMVREF0DBM_SHIFT 27

Shift value for RAC_PATRIMVREF0DBM

Definition at line 2841 of file efr32bg21_rac.h .

#define _RAC_PATRIM0_PATRIMVREF0DBM_v_900m 0x00000000UL

Mode v_900m for RAC_PATRIM0

Definition at line 2844 of file efr32bg21_rac.h .

#define _RAC_PATRIM0_PATRIMVREF0DBM_v_912p5m 0x00000001UL

Mode v_912p5m for RAC_PATRIM0

Definition at line 2845 of file efr32bg21_rac.h .

#define _RAC_PATRIM0_PATRIMVREF0DBM_v_925m 0x00000002UL

Mode v_925m for RAC_PATRIM0

Definition at line 2846 of file efr32bg21_rac.h .

#define _RAC_PATRIM0_PATRIMVREF0DBM_v_937p5m 0x00000003UL

Mode v_937p5m for RAC_PATRIM0

Definition at line 2847 of file efr32bg21_rac.h .

#define _RAC_PATRIM0_PATRIMVREF0DBM_v_950m 0x00000004UL

Mode v_950m for RAC_PATRIM0

Definition at line 2848 of file efr32bg21_rac.h .

#define _RAC_PATRIM0_PATRIMVREF0DBM_v_962p5m 0x00000005UL

Mode v_962p5m for RAC_PATRIM0

Definition at line 2849 of file efr32bg21_rac.h .

#define _RAC_PATRIM0_PATRIMVREF0DBM_v_975m 0x00000006UL

Mode v_975m for RAC_PATRIM0

Definition at line 2850 of file efr32bg21_rac.h .

#define _RAC_PATRIM0_PATRIMVREF0DBM_v_987p5m 0x00000007UL

Mode v_987p5m for RAC_PATRIM0

Definition at line 2851 of file efr32bg21_rac.h .

#define _RAC_PATRIM0_RESETVALUE 0x20088D93UL

Default value for RAC_PATRIM0

Definition at line 2654 of file efr32bg21_rac.h .

#define _RAC_PATRIM1_MASK 0x7FFFFFFFUL

Mask for RAC_PATRIM1

Definition at line 2864 of file efr32bg21_rac.h .

#define _RAC_PATRIM1_PATRIM10DBMDUTYCYN_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_PATRIM1

Definition at line 2867 of file efr32bg21_rac.h .

#define _RAC_PATRIM1_PATRIM10DBMDUTYCYN_MASK 0x7UL

Bit mask for RAC_PATRIM10DBMDUTYCYN

Definition at line 2866 of file efr32bg21_rac.h .

#define _RAC_PATRIM1_PATRIM10DBMDUTYCYN_na 0x00000007UL

Mode na for RAC_PATRIM1

Definition at line 2875 of file efr32bg21_rac.h .

#define _RAC_PATRIM1_PATRIM10DBMDUTYCYN_SHIFT 0

Shift value for RAC_PATRIM10DBMDUTYCYN

Definition at line 2865 of file efr32bg21_rac.h .

#define _RAC_PATRIM1_PATRIM10DBMDUTYCYN_up_0pct 0x00000000UL

Mode up_0pct for RAC_PATRIM1

Definition at line 2868 of file efr32bg21_rac.h .

#define _RAC_PATRIM1_PATRIM10DBMDUTYCYN_up_1pct 0x00000001UL

Mode up_1pct for RAC_PATRIM1

Definition at line 2869 of file efr32bg21_rac.h .

#define _RAC_PATRIM1_PATRIM10DBMDUTYCYN_up_2pct 0x00000002UL

Mode up_2pct for RAC_PATRIM1

Definition at line 2870 of file efr32bg21_rac.h .

#define _RAC_PATRIM1_PATRIM10DBMDUTYCYN_up_3pct 0x00000003UL

Mode up_3pct for RAC_PATRIM1

Definition at line 2871 of file efr32bg21_rac.h .

#define _RAC_PATRIM1_PATRIM10DBMDUTYCYN_up_4pct 0x00000004UL

Mode up_4pct for RAC_PATRIM1

Definition at line 2872 of file efr32bg21_rac.h .

#define _RAC_PATRIM1_PATRIM10DBMDUTYCYN_up_5pct 0x00000005UL

Mode up_5pct for RAC_PATRIM1

Definition at line 2873 of file efr32bg21_rac.h .

#define _RAC_PATRIM1_PATRIM10DBMDUTYCYN_up_6pct 0x00000006UL

Mode up_6pct for RAC_PATRIM1

Definition at line 2874 of file efr32bg21_rac.h .

#define _RAC_PATRIM1_PATRIM10DBMDUTYCYP_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_PATRIM1

Definition at line 2887 of file efr32bg21_rac.h .

#define _RAC_PATRIM1_PATRIM10DBMDUTYCYP_dn_0pct 0x00000000UL

Mode dn_0pct for RAC_PATRIM1

Definition at line 2888 of file efr32bg21_rac.h .

#define _RAC_PATRIM1_PATRIM10DBMDUTYCYP_dn_1pct 0x00000001UL

Mode dn_1pct for RAC_PATRIM1

Definition at line 2889 of file efr32bg21_rac.h .

#define _RAC_PATRIM1_PATRIM10DBMDUTYCYP_dn_2pct 0x00000002UL

Mode dn_2pct for RAC_PATRIM1

Definition at line 2890 of file efr32bg21_rac.h .

#define _RAC_PATRIM1_PATRIM10DBMDUTYCYP_dn_3pct 0x00000003UL

Mode dn_3pct for RAC_PATRIM1

Definition at line 2891 of file efr32bg21_rac.h .

#define _RAC_PATRIM1_PATRIM10DBMDUTYCYP_dn_4pct 0x00000004UL

Mode dn_4pct for RAC_PATRIM1

Definition at line 2892 of file efr32bg21_rac.h .

#define _RAC_PATRIM1_PATRIM10DBMDUTYCYP_dn_5pct 0x00000005UL

Mode dn_5pct for RAC_PATRIM1

Definition at line 2893 of file efr32bg21_rac.h .

#define _RAC_PATRIM1_PATRIM10DBMDUTYCYP_dn_6pct 0x00000006UL

Mode dn_6pct for RAC_PATRIM1

Definition at line 2894 of file efr32bg21_rac.h .

#define _RAC_PATRIM1_PATRIM10DBMDUTYCYP_MASK 0x38UL

Bit mask for RAC_PATRIM10DBMDUTYCYP

Definition at line 2886 of file efr32bg21_rac.h .

#define _RAC_PATRIM1_PATRIM10DBMDUTYCYP_na 0x00000007UL

Mode na for RAC_PATRIM1

Definition at line 2895 of file efr32bg21_rac.h .

#define _RAC_PATRIM1_PATRIM10DBMDUTYCYP_SHIFT 3

Shift value for RAC_PATRIM10DBMDUTYCYP

Definition at line 2885 of file efr32bg21_rac.h .

#define _RAC_PATRIM1_PATRIM20DBMPREDRV_DEFAULT 0x00000006UL

Mode DEFAULT for RAC_PATRIM1

Definition at line 2907 of file efr32bg21_rac.h .

#define _RAC_PATRIM1_PATRIM20DBMPREDRV_MASK 0x1C0UL

Bit mask for RAC_PATRIM20DBMPREDRV

Definition at line 2906 of file efr32bg21_rac.h .

#define _RAC_PATRIM1_PATRIM20DBMPREDRV_SHIFT 6

Shift value for RAC_PATRIM20DBMPREDRV

Definition at line 2905 of file efr32bg21_rac.h .

#define _RAC_PATRIM1_PATRIM20DBMPREDRV_trise_110ps 0x00000003UL

Mode trise_110ps for RAC_PATRIM1

Definition at line 2911 of file efr32bg21_rac.h .

#define _RAC_PATRIM1_PATRIM20DBMPREDRV_trise_117ps 0x00000002UL

Mode trise_117ps for RAC_PATRIM1

Definition at line 2910 of file efr32bg21_rac.h .

#define _RAC_PATRIM1_PATRIM20DBMPREDRV_trise_127ps 0x00000001UL

Mode trise_127ps for RAC_PATRIM1

Definition at line 2909 of file efr32bg21_rac.h .

#define _RAC_PATRIM1_PATRIM20DBMPREDRV_trise_137ps 0x00000000UL

Mode trise_137ps for RAC_PATRIM1

Definition at line 2908 of file efr32bg21_rac.h .

#define _RAC_PATRIM1_PATRIM20DBMPREDRV_trise_70ps 0x00000007UL

Mode trise_70ps for RAC_PATRIM1

Definition at line 2915 of file efr32bg21_rac.h .

#define _RAC_PATRIM1_PATRIM20DBMPREDRV_trise_71ps 0x00000006UL

Mode trise_71ps for RAC_PATRIM1

Definition at line 2914 of file efr32bg21_rac.h .

#define _RAC_PATRIM1_PATRIM20DBMPREDRV_trise_73ps 0x00000005UL

Mode trise_73ps for RAC_PATRIM1

Definition at line 2913 of file efr32bg21_rac.h .

#define _RAC_PATRIM1_PATRIM20DBMPREDRV_trise_75ps 0x00000004UL

Mode trise_75ps for RAC_PATRIM1

Definition at line 2912 of file efr32bg21_rac.h .

#define _RAC_PATRIM1_PATRIMANTSWBIAS_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_PATRIM1

Definition at line 2927 of file efr32bg21_rac.h .

#define _RAC_PATRIM1_PATRIMANTSWBIAS_MASK 0x600UL

Bit mask for RAC_PATRIMANTSWBIAS

Definition at line 2926 of file efr32bg21_rac.h .

#define _RAC_PATRIM1_PATRIMANTSWBIAS_SHIFT 9

Shift value for RAC_PATRIMANTSWBIAS

Definition at line 2925 of file efr32bg21_rac.h .

#define _RAC_PATRIM1_PATRIMANTSWBIAS_vb_at_vdd 0x00000000UL

Mode vb_at_vdd for RAC_PATRIM1

Definition at line 2928 of file efr32bg21_rac.h .

#define _RAC_PATRIM1_PATRIMANTSWBIAS_vb_at_vdd_m1p2v 0x00000002UL

Mode vb_at_vdd_m1p2v for RAC_PATRIM1

Definition at line 2930 of file efr32bg21_rac.h .

#define _RAC_PATRIM1_PATRIMANTSWBIAS_vb_at_vdd_m1p8v 0x00000003UL

Mode vb_at_vdd_m1p8v for RAC_PATRIM1

Definition at line 2931 of file efr32bg21_rac.h .

#define _RAC_PATRIM1_PATRIMANTSWBIAS_vb_at_vdd_mp6v 0x00000001UL

Mode vb_at_vdd_mp6v for RAC_PATRIM1

Definition at line 2929 of file efr32bg21_rac.h .

#define _RAC_PATRIM1_PATRIMBLEEDAUTOPREREG_automatic 0x00000001UL

Mode automatic for RAC_PATRIM1

Definition at line 2942 of file efr32bg21_rac.h .

#define _RAC_PATRIM1_PATRIMBLEEDAUTOPREREG_DEFAULT 0x00000001UL

Mode DEFAULT for RAC_PATRIM1

Definition at line 2940 of file efr32bg21_rac.h .

#define _RAC_PATRIM1_PATRIMBLEEDAUTOPREREG_MASK 0x800UL

Bit mask for RAC_PATRIMBLEEDAUTOPREREG

Definition at line 2939 of file efr32bg21_rac.h .

#define _RAC_PATRIM1_PATRIMBLEEDAUTOPREREG_not_automatic 0x00000000UL

Mode not_automatic for RAC_PATRIM1

Definition at line 2941 of file efr32bg21_rac.h .

#define _RAC_PATRIM1_PATRIMBLEEDAUTOPREREG_SHIFT 11

Shift value for RAC_PATRIMBLEEDAUTOPREREG

Definition at line 2938 of file efr32bg21_rac.h .

#define _RAC_PATRIM1_PATRIMCAPPAOUTM_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_PATRIM1

Definition at line 2948 of file efr32bg21_rac.h .

#define _RAC_PATRIM1_PATRIMCAPPAOUTM_MASK 0xF000UL

Bit mask for RAC_PATRIMCAPPAOUTM

Definition at line 2947 of file efr32bg21_rac.h .

#define _RAC_PATRIM1_PATRIMCAPPAOUTM_SHIFT 12

Shift value for RAC_PATRIMCAPPAOUTM

Definition at line 2946 of file efr32bg21_rac.h .

#define _RAC_PATRIM1_PATRIMCAPPAOUTP_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_PATRIM1

Definition at line 2952 of file efr32bg21_rac.h .

#define _RAC_PATRIM1_PATRIMCAPPAOUTP_MASK 0xF0000UL

Bit mask for RAC_PATRIMCAPPAOUTP

Definition at line 2951 of file efr32bg21_rac.h .

#define _RAC_PATRIM1_PATRIMCAPPAOUTP_SHIFT 16

Shift value for RAC_PATRIMCAPPAOUTP

Definition at line 2950 of file efr32bg21_rac.h .

#define _RAC_PATRIM1_PATRIMCMGAIN_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_PATRIM1

Definition at line 2956 of file efr32bg21_rac.h .

#define _RAC_PATRIM1_PATRIMCMGAIN_MASK 0x300000UL

Bit mask for RAC_PATRIMCMGAIN

Definition at line 2955 of file efr32bg21_rac.h .

#define _RAC_PATRIM1_PATRIMCMGAIN_SHIFT 20

Shift value for RAC_PATRIMCMGAIN

Definition at line 2954 of file efr32bg21_rac.h .

#define _RAC_PATRIM1_PATRIMDLY0_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_PATRIM1

Definition at line 2960 of file efr32bg21_rac.h .

#define _RAC_PATRIM1_PATRIMDLY0_MASK 0x1C00000UL

Bit mask for RAC_PATRIMDLY0

Definition at line 2959 of file efr32bg21_rac.h .

#define _RAC_PATRIM1_PATRIMDLY0_SHIFT 22

Shift value for RAC_PATRIMDLY0

Definition at line 2958 of file efr32bg21_rac.h .

#define _RAC_PATRIM1_PATRIMDLY0_tdly_0ps 0x00000000UL

Mode tdly_0ps for RAC_PATRIM1

Definition at line 2961 of file efr32bg21_rac.h .

#define _RAC_PATRIM1_PATRIMDLY0_tdly_64ps 0x00000001UL

Mode tdly_64ps for RAC_PATRIM1

Definition at line 2962 of file efr32bg21_rac.h .

#define _RAC_PATRIM1_PATRIMDLY0_tdly_65ps 0x00000002UL

Mode tdly_65ps for RAC_PATRIM1

Definition at line 2963 of file efr32bg21_rac.h .

#define _RAC_PATRIM1_PATRIMDLY0_tdly_66ps 0x00000003UL

Mode tdly_66ps for RAC_PATRIM1

Definition at line 2964 of file efr32bg21_rac.h .

#define _RAC_PATRIM1_PATRIMDLY0_tdly_68ps 0x00000004UL

Mode tdly_68ps for RAC_PATRIM1

Definition at line 2965 of file efr32bg21_rac.h .

#define _RAC_PATRIM1_PATRIMDLY0_tdly_70ps 0x00000005UL

Mode tdly_70ps for RAC_PATRIM1

Definition at line 2966 of file efr32bg21_rac.h .

#define _RAC_PATRIM1_PATRIMDLY0_tdly_75ps 0x00000006UL

Mode tdly_75ps for RAC_PATRIM1

Definition at line 2967 of file efr32bg21_rac.h .

#define _RAC_PATRIM1_PATRIMDLY0_tdly_83ps 0x00000007UL

Mode tdly_83ps for RAC_PATRIM1

Definition at line 2968 of file efr32bg21_rac.h .

#define _RAC_PATRIM1_PATRIMDLY1_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_PATRIM1

Definition at line 2980 of file efr32bg21_rac.h .

#define _RAC_PATRIM1_PATRIMDLY1_MASK 0xE000000UL

Bit mask for RAC_PATRIMDLY1

Definition at line 2979 of file efr32bg21_rac.h .

#define _RAC_PATRIM1_PATRIMDLY1_SHIFT 25

Shift value for RAC_PATRIMDLY1

Definition at line 2978 of file efr32bg21_rac.h .

#define _RAC_PATRIM1_PATRIMDLY1_tdly_0ps 0x00000000UL

Mode tdly_0ps for RAC_PATRIM1

Definition at line 2981 of file efr32bg21_rac.h .

#define _RAC_PATRIM1_PATRIMDLY1_tdly_64ps 0x00000001UL

Mode tdly_64ps for RAC_PATRIM1

Definition at line 2982 of file efr32bg21_rac.h .

#define _RAC_PATRIM1_PATRIMDLY1_tdly_65ps 0x00000002UL

Mode tdly_65ps for RAC_PATRIM1

Definition at line 2983 of file efr32bg21_rac.h .

#define _RAC_PATRIM1_PATRIMDLY1_tdly_66ps 0x00000003UL

Mode tdly_66ps for RAC_PATRIM1

Definition at line 2984 of file efr32bg21_rac.h .

#define _RAC_PATRIM1_PATRIMDLY1_tdly_68ps 0x00000004UL

Mode tdly_68ps for RAC_PATRIM1

Definition at line 2985 of file efr32bg21_rac.h .

#define _RAC_PATRIM1_PATRIMDLY1_tdly_70ps 0x00000005UL

Mode tdly_70ps for RAC_PATRIM1

Definition at line 2986 of file efr32bg21_rac.h .

#define _RAC_PATRIM1_PATRIMDLY1_tdly_75ps 0x00000006UL

Mode tdly_75ps for RAC_PATRIM1

Definition at line 2987 of file efr32bg21_rac.h .

#define _RAC_PATRIM1_PATRIMDLY1_tdly_83ps 0x00000007UL

Mode tdly_83ps for RAC_PATRIM1

Definition at line 2988 of file efr32bg21_rac.h .

#define _RAC_PATRIM1_PATRIMFBKATTPDRVLDO_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_PATRIM1

Definition at line 3001 of file efr32bg21_rac.h .

#define _RAC_PATRIM1_PATRIMFBKATTPDRVLDO_less_bw 0x00000000UL

Mode less_bw for RAC_PATRIM1

Definition at line 3002 of file efr32bg21_rac.h .

#define _RAC_PATRIM1_PATRIMFBKATTPDRVLDO_MASK 0x10000000UL

Bit mask for RAC_PATRIMFBKATTPDRVLDO

Definition at line 3000 of file efr32bg21_rac.h .

#define _RAC_PATRIM1_PATRIMFBKATTPDRVLDO_more_bw 0x00000001UL

Mode more_bw for RAC_PATRIM1

Definition at line 3003 of file efr32bg21_rac.h .

#define _RAC_PATRIM1_PATRIMFBKATTPDRVLDO_SHIFT 28

Shift value for RAC_PATRIMFBKATTPDRVLDO

Definition at line 2999 of file efr32bg21_rac.h .

#define _RAC_PATRIM1_PATRIMIBIASMASTER_DEFAULT 0x00000002UL

Mode DEFAULT for RAC_PATRIM1

Definition at line 3009 of file efr32bg21_rac.h .

#define _RAC_PATRIM1_PATRIMIBIASMASTER_Ibias_is_45u 0x00000000UL

Mode Ibias_is_45u for RAC_PATRIM1

Definition at line 3010 of file efr32bg21_rac.h .

#define _RAC_PATRIM1_PATRIMIBIASMASTER_Ibias_is_47p5u 0x00000001UL

Mode Ibias_is_47p5u for RAC_PATRIM1

Definition at line 3011 of file efr32bg21_rac.h .

#define _RAC_PATRIM1_PATRIMIBIASMASTER_Ibias_is_50u 0x00000002UL

Mode Ibias_is_50u for RAC_PATRIM1

Definition at line 3012 of file efr32bg21_rac.h .

#define _RAC_PATRIM1_PATRIMIBIASMASTER_Ibias_is_52p5u 0x00000003UL

Mode Ibias_is_52p5u for RAC_PATRIM1

Definition at line 3013 of file efr32bg21_rac.h .

#define _RAC_PATRIM1_PATRIMIBIASMASTER_MASK 0x60000000UL

Bit mask for RAC_PATRIMIBIASMASTER

Definition at line 3008 of file efr32bg21_rac.h .

#define _RAC_PATRIM1_PATRIMIBIASMASTER_SHIFT 29

Shift value for RAC_PATRIMIBIASMASTER

Definition at line 3007 of file efr32bg21_rac.h .

#define _RAC_PATRIM1_RESETVALUE 0x40000980UL

Default value for RAC_PATRIM1

Definition at line 2863 of file efr32bg21_rac.h .

#define _RAC_PATRIM2_MASK 0x7FFFFFFFUL

Mask for RAC_PATRIM2

Definition at line 3022 of file efr32bg21_rac.h .

#define _RAC_PATRIM2_PATRIMLDOFBHVPDRVLDO_DEFAULT 0x00000002UL

Mode DEFAULT for RAC_PATRIM2

Definition at line 3025 of file efr32bg21_rac.h .

#define _RAC_PATRIM2_PATRIMLDOFBHVPDRVLDO_MASK 0x3UL

Bit mask for RAC_PATRIMLDOFBHVPDRVLDO

Definition at line 3024 of file efr32bg21_rac.h .

#define _RAC_PATRIM2_PATRIMLDOFBHVPDRVLDO_SHIFT 0

Shift value for RAC_PATRIMLDOFBHVPDRVLDO

Definition at line 3023 of file efr32bg21_rac.h .

#define _RAC_PATRIM2_PATRIMLDOFBHVPDRVLDO_vreg_1p22 0x00000000UL

Mode vreg_1p22 for RAC_PATRIM2

Definition at line 3026 of file efr32bg21_rac.h .

#define _RAC_PATRIM2_PATRIMLDOFBHVPDRVLDO_vreg_1p28 0x00000001UL

Mode vreg_1p28 for RAC_PATRIM2

Definition at line 3027 of file efr32bg21_rac.h .

#define _RAC_PATRIM2_PATRIMLDOFBHVPDRVLDO_vreg_1p35 0x00000002UL

Mode vreg_1p35 for RAC_PATRIM2

Definition at line 3028 of file efr32bg21_rac.h .

#define _RAC_PATRIM2_PATRIMLDOFBHVPDRVLDO_vreg_1p44 0x00000003UL

Mode vreg_1p44 for RAC_PATRIM2

Definition at line 3029 of file efr32bg21_rac.h .

#define _RAC_PATRIM2_PATRIMLDOFBHVPREREG_DEFAULT 0x00000006UL

Mode DEFAULT for RAC_PATRIM2

Definition at line 3037 of file efr32bg21_rac.h .

#define _RAC_PATRIM2_PATRIMLDOFBHVPREREG_MASK 0x1CUL

Bit mask for RAC_PATRIMLDOFBHVPREREG

Definition at line 3036 of file efr32bg21_rac.h .

#define _RAC_PATRIM2_PATRIMLDOFBHVPREREG_SHIFT 2

Shift value for RAC_PATRIMLDOFBHVPREREG

Definition at line 3035 of file efr32bg21_rac.h .

#define _RAC_PATRIM2_PATRIMLDOFBHVPREREG_vreg_1p678 0x00000000UL

Mode vreg_1p678 for RAC_PATRIM2

Definition at line 3038 of file efr32bg21_rac.h .

#define _RAC_PATRIM2_PATRIMLDOFBHVPREREG_vreg_1p735 0x00000001UL

Mode vreg_1p735 for RAC_PATRIM2

Definition at line 3039 of file efr32bg21_rac.h .

#define _RAC_PATRIM2_PATRIMLDOFBHVPREREG_vreg_1p801 0x00000002UL

Mode vreg_1p801 for RAC_PATRIM2

Definition at line 3040 of file efr32bg21_rac.h .

#define _RAC_PATRIM2_PATRIMLDOFBHVPREREG_vreg_1p875 0x00000003UL

Mode vreg_1p875 for RAC_PATRIM2

Definition at line 3041 of file efr32bg21_rac.h .

#define _RAC_PATRIM2_PATRIMLDOFBHVPREREG_vreg_3p00 0x00000004UL

Mode vreg_3p00 for RAC_PATRIM2

Definition at line 3042 of file efr32bg21_rac.h .

#define _RAC_PATRIM2_PATRIMLDOFBHVPREREG_vreg_3p14 0x00000005UL

Mode vreg_3p14 for RAC_PATRIM2

Definition at line 3043 of file efr32bg21_rac.h .

#define _RAC_PATRIM2_PATRIMLDOFBHVPREREG_vreg_3p3 0x00000006UL

Mode vreg_3p3 for RAC_PATRIM2

Definition at line 3044 of file efr32bg21_rac.h .

#define _RAC_PATRIM2_PATRIMLDOFBHVPREREG_vreg_3p477 0x00000007UL

Mode vreg_3p477 for RAC_PATRIM2

Definition at line 3045 of file efr32bg21_rac.h .

#define _RAC_PATRIM2_PATRIMLDOHVPDRVLDO_DEFAULT 0x00000003UL

Mode DEFAULT for RAC_PATRIM2

Definition at line 3057 of file efr32bg21_rac.h .

#define _RAC_PATRIM2_PATRIMLDOHVPDRVLDO_MASK 0xE0UL

Bit mask for RAC_PATRIMLDOHVPDRVLDO

Definition at line 3056 of file efr32bg21_rac.h .

#define _RAC_PATRIM2_PATRIMLDOHVPDRVLDO_SHIFT 5

Shift value for RAC_PATRIMLDOHVPDRVLDO

Definition at line 3055 of file efr32bg21_rac.h .

#define _RAC_PATRIM2_PATRIMLDOHVPDRVLDO_vref_0p675 0x00000000UL

Mode vref_0p675 for RAC_PATRIM2

Definition at line 3058 of file efr32bg21_rac.h .

#define _RAC_PATRIM2_PATRIMLDOHVPDRVLDO_vref_0p700 0x00000001UL

Mode vref_0p700 for RAC_PATRIM2

Definition at line 3059 of file efr32bg21_rac.h .

#define _RAC_PATRIM2_PATRIMLDOHVPDRVLDO_vref_0p725 0x00000002UL

Mode vref_0p725 for RAC_PATRIM2

Definition at line 3060 of file efr32bg21_rac.h .

#define _RAC_PATRIM2_PATRIMLDOHVPDRVLDO_vref_0p750 0x00000003UL

Mode vref_0p750 for RAC_PATRIM2

Definition at line 3061 of file efr32bg21_rac.h .

#define _RAC_PATRIM2_PATRIMLDOHVPDRVLDO_vref_0p775 0x00000004UL

Mode vref_0p775 for RAC_PATRIM2

Definition at line 3062 of file efr32bg21_rac.h .

#define _RAC_PATRIM2_PATRIMLDOHVPDRVLDO_vref_0p800 0x00000005UL

Mode vref_0p800 for RAC_PATRIM2

Definition at line 3063 of file efr32bg21_rac.h .

#define _RAC_PATRIM2_PATRIMLDOHVPDRVLDO_vref_0p825 0x00000006UL

Mode vref_0p825 for RAC_PATRIM2

Definition at line 3064 of file efr32bg21_rac.h .

#define _RAC_PATRIM2_PATRIMLDOHVPDRVLDO_vref_0p850 0x00000007UL

Mode vref_0p850 for RAC_PATRIM2

Definition at line 3065 of file efr32bg21_rac.h .

#define _RAC_PATRIM2_PATRIMLDOHVPREREG_DEFAULT 0x00000008UL

Mode DEFAULT for RAC_PATRIM2

Definition at line 3077 of file efr32bg21_rac.h .

#define _RAC_PATRIM2_PATRIMLDOHVPREREG_MASK 0xF00UL

Bit mask for RAC_PATRIMLDOHVPREREG

Definition at line 3076 of file efr32bg21_rac.h .

#define _RAC_PATRIM2_PATRIMLDOHVPREREG_SHIFT 8

Shift value for RAC_PATRIMLDOHVPREREG

Definition at line 3075 of file efr32bg21_rac.h .

#define _RAC_PATRIM2_PATRIMLDOHVPREREG_vref_0p651 0x00000000UL

Mode vref_0p651 for RAC_PATRIM2

Definition at line 3078 of file efr32bg21_rac.h .

#define _RAC_PATRIM2_PATRIMLDOHVPREREG_vref_0p663 0x00000001UL

Mode vref_0p663 for RAC_PATRIM2

Definition at line 3079 of file efr32bg21_rac.h .

#define _RAC_PATRIM2_PATRIMLDOHVPREREG_vref_0p676 0x00000002UL

Mode vref_0p676 for RAC_PATRIM2

Definition at line 3080 of file efr32bg21_rac.h .

#define _RAC_PATRIM2_PATRIMLDOHVPREREG_vref_0p688 0x00000003UL

Mode vref_0p688 for RAC_PATRIM2

Definition at line 3081 of file efr32bg21_rac.h .

#define _RAC_PATRIM2_PATRIMLDOHVPREREG_vref_0p701 0x00000004UL

Mode vref_0p701 for RAC_PATRIM2

Definition at line 3082 of file efr32bg21_rac.h .

#define _RAC_PATRIM2_PATRIMLDOHVPREREG_vref_0p713 0x00000005UL

Mode vref_0p713 for RAC_PATRIM2

Definition at line 3083 of file efr32bg21_rac.h .

#define _RAC_PATRIM2_PATRIMLDOHVPREREG_vref_0p726 0x00000006UL

Mode vref_0p726 for RAC_PATRIM2

Definition at line 3084 of file efr32bg21_rac.h .

#define _RAC_PATRIM2_PATRIMLDOHVPREREG_vref_0p738 0x00000007UL

Mode vref_0p738 for RAC_PATRIM2

Definition at line 3085 of file efr32bg21_rac.h .

#define _RAC_PATRIM2_PATRIMLDOHVPREREG_vref_0p751 0x00000008UL

Mode vref_0p751 for RAC_PATRIM2

Definition at line 3086 of file efr32bg21_rac.h .

#define _RAC_PATRIM2_PATRIMLDOHVPREREG_vref_0p763 0x00000009UL

Mode vref_0p763 for RAC_PATRIM2

Definition at line 3087 of file efr32bg21_rac.h .

#define _RAC_PATRIM2_PATRIMLDOHVPREREG_vref_0p776 0x0000000AUL

Mode vref_0p776 for RAC_PATRIM2

Definition at line 3088 of file efr32bg21_rac.h .

#define _RAC_PATRIM2_PATRIMLDOHVPREREG_vref_0p788 0x0000000BUL

Mode vref_0p788 for RAC_PATRIM2

Definition at line 3089 of file efr32bg21_rac.h .

#define _RAC_PATRIM2_PATRIMLDOHVPREREG_vref_0p801 0x0000000CUL

Mode vref_0p801 for RAC_PATRIM2

Definition at line 3090 of file efr32bg21_rac.h .

#define _RAC_PATRIM2_PATRIMLDOHVPREREG_vref_0p813 0x0000000DUL

Mode vref_0p813 for RAC_PATRIM2

Definition at line 3091 of file efr32bg21_rac.h .

#define _RAC_PATRIM2_PATRIMLDOHVPREREG_vref_0p826 0x0000000EUL

Mode vref_0p826 for RAC_PATRIM2

Definition at line 3092 of file efr32bg21_rac.h .

#define _RAC_PATRIM2_PATRIMLDOHVPREREG_vref_0p838 0x0000000FUL

Mode vref_0p838 for RAC_PATRIM2

Definition at line 3093 of file efr32bg21_rac.h .

#define _RAC_PATRIM2_PATRIMLDOPSRPDRVLDO_DEFAULT 0x00000001UL

Mode DEFAULT for RAC_PATRIM2

Definition at line 3114 of file efr32bg21_rac.h .

#define _RAC_PATRIM2_PATRIMLDOPSRPDRVLDO_high_psr 0x00000001UL

Mode high_psr for RAC_PATRIM2

Definition at line 3116 of file efr32bg21_rac.h .

#define _RAC_PATRIM2_PATRIMLDOPSRPDRVLDO_low_psr 0x00000000UL

Mode low_psr for RAC_PATRIM2

Definition at line 3115 of file efr32bg21_rac.h .

#define _RAC_PATRIM2_PATRIMLDOPSRPDRVLDO_MASK 0x1000UL

Bit mask for RAC_PATRIMLDOPSRPDRVLDO

Definition at line 3113 of file efr32bg21_rac.h .

#define _RAC_PATRIM2_PATRIMLDOPSRPDRVLDO_SHIFT 12

Shift value for RAC_PATRIMLDOPSRPDRVLDO

Definition at line 3112 of file efr32bg21_rac.h .

#define _RAC_PATRIM2_PATRIMLDOPSRPREREG_DEFAULT 0x00000001UL

Mode DEFAULT for RAC_PATRIM2

Definition at line 3123 of file efr32bg21_rac.h .

#define _RAC_PATRIM2_PATRIMLDOPSRPREREG_high_psr 0x00000001UL

Mode high_psr for RAC_PATRIM2

Definition at line 3125 of file efr32bg21_rac.h .

#define _RAC_PATRIM2_PATRIMLDOPSRPREREG_low_psr 0x00000000UL

Mode low_psr for RAC_PATRIM2

Definition at line 3124 of file efr32bg21_rac.h .

#define _RAC_PATRIM2_PATRIMLDOPSRPREREG_MASK 0x2000UL

Bit mask for RAC_PATRIMLDOPSRPREREG

Definition at line 3122 of file efr32bg21_rac.h .

#define _RAC_PATRIM2_PATRIMLDOPSRPREREG_SHIFT 13

Shift value for RAC_PATRIMLDOPSRPREREG

Definition at line 3121 of file efr32bg21_rac.h .

#define _RAC_PATRIM2_PATRIMLDOSLICESPDRVLDO_DEFAULT 0x00000003UL

Mode DEFAULT for RAC_PATRIM2

Definition at line 3131 of file efr32bg21_rac.h .

#define _RAC_PATRIM2_PATRIMLDOSLICESPDRVLDO_iload_15mA 0x00000001UL

Mode iload_15mA for RAC_PATRIM2

Definition at line 3133 of file efr32bg21_rac.h .

#define _RAC_PATRIM2_PATRIMLDOSLICESPDRVLDO_iload_22p5mA 0x00000002UL

Mode iload_22p5mA for RAC_PATRIM2

Definition at line 3134 of file efr32bg21_rac.h .

#define _RAC_PATRIM2_PATRIMLDOSLICESPDRVLDO_iload_30mA 0x00000003UL

Mode iload_30mA for RAC_PATRIM2

Definition at line 3135 of file efr32bg21_rac.h .

#define _RAC_PATRIM2_PATRIMLDOSLICESPDRVLDO_iload_7p5mA 0x00000000UL

Mode iload_7p5mA for RAC_PATRIM2

Definition at line 3132 of file efr32bg21_rac.h .

#define _RAC_PATRIM2_PATRIMLDOSLICESPDRVLDO_MASK 0xC000UL

Bit mask for RAC_PATRIMLDOSLICESPDRVLDO

Definition at line 3130 of file efr32bg21_rac.h .

#define _RAC_PATRIM2_PATRIMLDOSLICESPDRVLDO_SHIFT 14

Shift value for RAC_PATRIMLDOSLICESPDRVLDO

Definition at line 3129 of file efr32bg21_rac.h .

#define _RAC_PATRIM2_PATRIMLDOSLICESPREREG_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_PATRIM2

Definition at line 3143 of file efr32bg21_rac.h .

#define _RAC_PATRIM2_PATRIMLDOSLICESPREREG_MASK 0x30000UL

Bit mask for RAC_PATRIMLDOSLICESPREREG

Definition at line 3142 of file efr32bg21_rac.h .

#define _RAC_PATRIM2_PATRIMLDOSLICESPREREG_SHIFT 16

Shift value for RAC_PATRIMLDOSLICESPREREG

Definition at line 3141 of file efr32bg21_rac.h .

#define _RAC_PATRIM2_PATRIMLDOSLICESPREREG_spare1 0x00000000UL

Mode spare1 for RAC_PATRIM2

Definition at line 3144 of file efr32bg21_rac.h .

#define _RAC_PATRIM2_PATRIMLDOSLICESPREREG_spare2 0x00000001UL

Mode spare2 for RAC_PATRIM2

Definition at line 3145 of file efr32bg21_rac.h .

#define _RAC_PATRIM2_PATRIMLDOSLICESPREREG_spare3 0x00000002UL

Mode spare3 for RAC_PATRIM2

Definition at line 3146 of file efr32bg21_rac.h .

#define _RAC_PATRIM2_PATRIMLDOSLICESPREREG_spare4 0x00000003UL

Mode spare4 for RAC_PATRIM2

Definition at line 3147 of file efr32bg21_rac.h .

#define _RAC_PATRIM2_PATRIMNBIAS_DEFAULT 0x00000008UL

Mode DEFAULT for RAC_PATRIM2

Definition at line 3164 of file efr32bg21_rac.h .

#define _RAC_PATRIM2_PATRIMNBIAS_MASK 0x780000UL

Bit mask for RAC_PATRIMNBIAS

Definition at line 3163 of file efr32bg21_rac.h .

#define _RAC_PATRIM2_PATRIMNBIAS_SHIFT 19

Shift value for RAC_PATRIMNBIAS

Definition at line 3162 of file efr32bg21_rac.h .

#define _RAC_PATRIM2_PATRIMNBIAS_vnbias_default 0x00000008UL

Mode vnbias_default for RAC_PATRIM2

Definition at line 3173 of file efr32bg21_rac.h .

#define _RAC_PATRIM2_PATRIMNBIAS_vnbias_dn104mv 0x00000000UL

Mode vnbias_dn104mv for RAC_PATRIM2

Definition at line 3165 of file efr32bg21_rac.h .

#define _RAC_PATRIM2_PATRIMNBIAS_vnbias_dn13mv 0x00000007UL

Mode vnbias_dn13mv for RAC_PATRIM2

Definition at line 3172 of file efr32bg21_rac.h .

#define _RAC_PATRIM2_PATRIMNBIAS_vnbias_dn26mv 0x00000006UL

Mode vnbias_dn26mv for RAC_PATRIM2

Definition at line 3171 of file efr32bg21_rac.h .

#define _RAC_PATRIM2_PATRIMNBIAS_vnbias_dn39mv 0x00000005UL

Mode vnbias_dn39mv for RAC_PATRIM2

Definition at line 3170 of file efr32bg21_rac.h .

#define _RAC_PATRIM2_PATRIMNBIAS_vnbias_dn52mv 0x00000004UL

Mode vnbias_dn52mv for RAC_PATRIM2

Definition at line 3169 of file efr32bg21_rac.h .

#define _RAC_PATRIM2_PATRIMNBIAS_vnbias_dn65mv 0x00000003UL

Mode vnbias_dn65mv for RAC_PATRIM2

Definition at line 3168 of file efr32bg21_rac.h .

#define _RAC_PATRIM2_PATRIMNBIAS_vnbias_dn78mv 0x00000002UL

Mode vnbias_dn78mv for RAC_PATRIM2

Definition at line 3167 of file efr32bg21_rac.h .

#define _RAC_PATRIM2_PATRIMNBIAS_vnbias_dn91mv 0x00000001UL

Mode vnbias_dn91mv for RAC_PATRIM2

Definition at line 3166 of file efr32bg21_rac.h .

#define _RAC_PATRIM2_PATRIMNBIAS_vnbias_up13mv 0x00000009UL

Mode vnbias_up13mv for RAC_PATRIM2

Definition at line 3174 of file efr32bg21_rac.h .

#define _RAC_PATRIM2_PATRIMNBIAS_vnbias_up26mv 0x0000000AUL

Mode vnbias_up26mv for RAC_PATRIM2

Definition at line 3175 of file efr32bg21_rac.h .

#define _RAC_PATRIM2_PATRIMNBIAS_vnbias_up39mv 0x0000000BUL

Mode vnbias_up39mv for RAC_PATRIM2

Definition at line 3176 of file efr32bg21_rac.h .

#define _RAC_PATRIM2_PATRIMNBIAS_vnbias_up52mv 0x0000000CUL

Mode vnbias_up52mv for RAC_PATRIM2

Definition at line 3177 of file efr32bg21_rac.h .

#define _RAC_PATRIM2_PATRIMNBIAS_vnbias_up65mv 0x0000000DUL

Mode vnbias_up65mv for RAC_PATRIM2

Definition at line 3178 of file efr32bg21_rac.h .

#define _RAC_PATRIM2_PATRIMNBIAS_vnbias_up78mv 0x0000000EUL

Mode vnbias_up78mv for RAC_PATRIM2

Definition at line 3179 of file efr32bg21_rac.h .

#define _RAC_PATRIM2_PATRIMNBIAS_vnbias_up91mv 0x0000000FUL

Mode vnbias_up91mv for RAC_PATRIM2

Definition at line 3180 of file efr32bg21_rac.h .

#define _RAC_PATRIM2_PATRIMNCASC_DEFAULT 0x00000001UL

Mode DEFAULT for RAC_PATRIM2

Definition at line 3200 of file efr32bg21_rac.h .

#define _RAC_PATRIM2_PATRIMNCASC_MASK 0x1800000UL

Bit mask for RAC_PATRIMNCASC

Definition at line 3199 of file efr32bg21_rac.h .

#define _RAC_PATRIM2_PATRIMNCASC_ncbias_default 0x00000001UL

Mode ncbias_default for RAC_PATRIM2

Definition at line 3202 of file efr32bg21_rac.h .

#define _RAC_PATRIM2_PATRIMNCASC_ncbias_m50mv 0x00000000UL

Mode ncbias_m50mv for RAC_PATRIM2

Definition at line 3201 of file efr32bg21_rac.h .

#define _RAC_PATRIM2_PATRIMNCASC_ncbias_p100mv 0x00000003UL

Mode ncbias_p100mv for RAC_PATRIM2

Definition at line 3204 of file efr32bg21_rac.h .

#define _RAC_PATRIM2_PATRIMNCASC_ncbias_p50mv 0x00000002UL

Mode ncbias_p50mv for RAC_PATRIM2

Definition at line 3203 of file efr32bg21_rac.h .

#define _RAC_PATRIM2_PATRIMNCASC_SHIFT 23

Shift value for RAC_PATRIMNCASC

Definition at line 3198 of file efr32bg21_rac.h .

#define _RAC_PATRIM2_PATRIMPADACGLITCH_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_PATRIM2

Definition at line 3156 of file efr32bg21_rac.h .

#define _RAC_PATRIM2_PATRIMPADACGLITCH_larger_glitch 0x00000000UL

Mode larger_glitch for RAC_PATRIM2

Definition at line 3157 of file efr32bg21_rac.h .

#define _RAC_PATRIM2_PATRIMPADACGLITCH_MASK 0x40000UL

Bit mask for RAC_PATRIMPADACGLITCH

Definition at line 3155 of file efr32bg21_rac.h .

#define _RAC_PATRIM2_PATRIMPADACGLITCH_SHIFT 18

Shift value for RAC_PATRIMPADACGLITCH

Definition at line 3154 of file efr32bg21_rac.h .

#define _RAC_PATRIM2_PATRIMPADACGLITCH_smaller_glitch 0x00000001UL

Mode smaller_glitch for RAC_PATRIM2

Definition at line 3158 of file efr32bg21_rac.h .

#define _RAC_PATRIM2_PATRIMPBIAS_DEFAULT 0x00000008UL

Mode DEFAULT for RAC_PATRIM2

Definition at line 3212 of file efr32bg21_rac.h .

#define _RAC_PATRIM2_PATRIMPBIAS_MASK 0x1E000000UL

Bit mask for RAC_PATRIMPBIAS

Definition at line 3211 of file efr32bg21_rac.h .

#define _RAC_PATRIM2_PATRIMPBIAS_SHIFT 25

Shift value for RAC_PATRIMPBIAS

Definition at line 3210 of file efr32bg21_rac.h .

#define _RAC_PATRIM2_PATRIMPBIAS_vpbias_default 0x00000008UL

Mode vpbias_default for RAC_PATRIM2

Definition at line 3221 of file efr32bg21_rac.h .

#define _RAC_PATRIM2_PATRIMPBIAS_vpbias_dn13mv 0x00000009UL

Mode vpbias_dn13mv for RAC_PATRIM2

Definition at line 3222 of file efr32bg21_rac.h .

#define _RAC_PATRIM2_PATRIMPBIAS_vpbias_dn26mv 0x0000000AUL

Mode vpbias_dn26mv for RAC_PATRIM2

Definition at line 3223 of file efr32bg21_rac.h .

#define _RAC_PATRIM2_PATRIMPBIAS_vpbias_dn38mv 0x0000000BUL

Mode vpbias_dn38mv for RAC_PATRIM2

Definition at line 3224 of file efr32bg21_rac.h .

#define _RAC_PATRIM2_PATRIMPBIAS_vpbias_dn52mv 0x0000000CUL

Mode vpbias_dn52mv for RAC_PATRIM2

Definition at line 3225 of file efr32bg21_rac.h .

#define _RAC_PATRIM2_PATRIMPBIAS_vpbias_dn65mv 0x0000000DUL

Mode vpbias_dn65mv for RAC_PATRIM2

Definition at line 3226 of file efr32bg21_rac.h .

#define _RAC_PATRIM2_PATRIMPBIAS_vpbias_dn78mv 0x0000000EUL

Mode vpbias_dn78mv for RAC_PATRIM2

Definition at line 3227 of file efr32bg21_rac.h .

#define _RAC_PATRIM2_PATRIMPBIAS_vpbias_dn91mv 0x0000000FUL

Mode vpbias_dn91mv for RAC_PATRIM2

Definition at line 3228 of file efr32bg21_rac.h .

#define _RAC_PATRIM2_PATRIMPBIAS_vpbias_up104mv 0x00000000UL

Mode vpbias_up104mv for RAC_PATRIM2

Definition at line 3213 of file efr32bg21_rac.h .

#define _RAC_PATRIM2_PATRIMPBIAS_vpbias_up13mv 0x00000007UL

Mode vpbias_up13mv for RAC_PATRIM2

Definition at line 3220 of file efr32bg21_rac.h .

#define _RAC_PATRIM2_PATRIMPBIAS_vpbias_up26mv 0x00000006UL

Mode vpbias_up26mv for RAC_PATRIM2

Definition at line 3219 of file efr32bg21_rac.h .

#define _RAC_PATRIM2_PATRIMPBIAS_vpbias_up39mv 0x00000005UL

Mode vpbias_up39mv for RAC_PATRIM2

Definition at line 3218 of file efr32bg21_rac.h .

#define _RAC_PATRIM2_PATRIMPBIAS_vpbias_up52mv 0x00000004UL

Mode vpbias_up52mv for RAC_PATRIM2

Definition at line 3217 of file efr32bg21_rac.h .

#define _RAC_PATRIM2_PATRIMPBIAS_vpbias_up65mv 0x00000003UL

Mode vpbias_up65mv for RAC_PATRIM2

Definition at line 3216 of file efr32bg21_rac.h .

#define _RAC_PATRIM2_PATRIMPBIAS_vpbias_up78mv 0x00000002UL

Mode vpbias_up78mv for RAC_PATRIM2

Definition at line 3215 of file efr32bg21_rac.h .

#define _RAC_PATRIM2_PATRIMPBIAS_vpbias_up91mv 0x00000001UL

Mode vpbias_up91mv for RAC_PATRIM2

Definition at line 3214 of file efr32bg21_rac.h .

#define _RAC_PATRIM2_PATRIMPCASC_DEFAULT 0x00000001UL

Mode DEFAULT for RAC_PATRIM2

Definition at line 3248 of file efr32bg21_rac.h .

#define _RAC_PATRIM2_PATRIMPCASC_MASK 0x60000000UL

Bit mask for RAC_PATRIMPCASC

Definition at line 3247 of file efr32bg21_rac.h .

#define _RAC_PATRIM2_PATRIMPCASC_pcbias_default 0x00000001UL

Mode pcbias_default for RAC_PATRIM2

Definition at line 3250 of file efr32bg21_rac.h .

#define _RAC_PATRIM2_PATRIMPCASC_pcbias_m100mv 0x00000003UL

Mode pcbias_m100mv for RAC_PATRIM2

Definition at line 3252 of file efr32bg21_rac.h .

#define _RAC_PATRIM2_PATRIMPCASC_pcbias_m50mv 0x00000002UL

Mode pcbias_m50mv for RAC_PATRIM2

Definition at line 3251 of file efr32bg21_rac.h .

#define _RAC_PATRIM2_PATRIMPCASC_pcbias_p50mv 0x00000000UL

Mode pcbias_p50mv for RAC_PATRIM2

Definition at line 3249 of file efr32bg21_rac.h .

#define _RAC_PATRIM2_PATRIMPCASC_SHIFT 29

Shift value for RAC_PATRIMPCASC

Definition at line 3246 of file efr32bg21_rac.h .

#define _RAC_PATRIM2_RESETVALUE 0x30C0F87AUL

Default value for RAC_PATRIM2

Definition at line 3021 of file efr32bg21_rac.h .

#define _RAC_PGACAL_MASK 0x3F3F3F3FUL

Mask for RAC_PGACAL

Definition at line 3467 of file efr32bg21_rac.h .

#define _RAC_PGACAL_PGAOFFNCALI_DEFAULT 0x00000020UL

Mode DEFAULT for RAC_PGACAL

Definition at line 3470 of file efr32bg21_rac.h .

#define _RAC_PGACAL_PGAOFFNCALI_MASK 0x3FUL

Bit mask for RAC_PGAOFFNCALI

Definition at line 3469 of file efr32bg21_rac.h .

#define _RAC_PGACAL_PGAOFFNCALI_offset_m_300mv 0x00000000UL

Mode offset_m_300mv for RAC_PGACAL

Definition at line 3471 of file efr32bg21_rac.h .

#define _RAC_PGACAL_PGAOFFNCALI_offset_p_300mv 0x0000003FUL

Mode offset_p_300mv for RAC_PGACAL

Definition at line 3472 of file efr32bg21_rac.h .

#define _RAC_PGACAL_PGAOFFNCALI_SHIFT 0

Shift value for RAC_PGAOFFNCALI

Definition at line 3468 of file efr32bg21_rac.h .

#define _RAC_PGACAL_PGAOFFNCALQ_DEFAULT 0x00000020UL

Mode DEFAULT for RAC_PGACAL

Definition at line 3478 of file efr32bg21_rac.h .

#define _RAC_PGACAL_PGAOFFNCALQ_MASK 0x3F00UL

Bit mask for RAC_PGAOFFNCALQ

Definition at line 3477 of file efr32bg21_rac.h .

#define _RAC_PGACAL_PGAOFFNCALQ_offset_m_300mv 0x00000000UL

Mode offset_m_300mv for RAC_PGACAL

Definition at line 3479 of file efr32bg21_rac.h .

#define _RAC_PGACAL_PGAOFFNCALQ_offset_p_300mv 0x0000003FUL

Mode offset_p_300mv for RAC_PGACAL

Definition at line 3480 of file efr32bg21_rac.h .

#define _RAC_PGACAL_PGAOFFNCALQ_SHIFT 8

Shift value for RAC_PGAOFFNCALQ

Definition at line 3476 of file efr32bg21_rac.h .

#define _RAC_PGACAL_PGAOFFPCALI_DEFAULT 0x00000020UL

Mode DEFAULT for RAC_PGACAL

Definition at line 3486 of file efr32bg21_rac.h .

#define _RAC_PGACAL_PGAOFFPCALI_MASK 0x3F0000UL

Bit mask for RAC_PGAOFFPCALI

Definition at line 3485 of file efr32bg21_rac.h .

#define _RAC_PGACAL_PGAOFFPCALI_offset_m_300mv 0x00000000UL

Mode offset_m_300mv for RAC_PGACAL

Definition at line 3487 of file efr32bg21_rac.h .

#define _RAC_PGACAL_PGAOFFPCALI_offset_p_300mv 0x0000003FUL

Mode offset_p_300mv for RAC_PGACAL

Definition at line 3488 of file efr32bg21_rac.h .

#define _RAC_PGACAL_PGAOFFPCALI_SHIFT 16

Shift value for RAC_PGAOFFPCALI

Definition at line 3484 of file efr32bg21_rac.h .

#define _RAC_PGACAL_PGAOFFPCALQ_DEFAULT 0x00000020UL

Mode DEFAULT for RAC_PGACAL

Definition at line 3494 of file efr32bg21_rac.h .

#define _RAC_PGACAL_PGAOFFPCALQ_MASK 0x3F000000UL

Bit mask for RAC_PGAOFFPCALQ

Definition at line 3493 of file efr32bg21_rac.h .

#define _RAC_PGACAL_PGAOFFPCALQ_offset_m_300mv 0x00000000UL

Mode offset_m_300mv for RAC_PGACAL

Definition at line 3495 of file efr32bg21_rac.h .

#define _RAC_PGACAL_PGAOFFPCALQ_offset_p_300mv 0x0000003FUL

Mode offset_p_300mv for RAC_PGACAL

Definition at line 3496 of file efr32bg21_rac.h .

#define _RAC_PGACAL_PGAOFFPCALQ_SHIFT 24

Shift value for RAC_PGAOFFPCALQ

Definition at line 3492 of file efr32bg21_rac.h .

#define _RAC_PGACAL_RESETVALUE 0x20202020UL

Default value for RAC_PGACAL

Definition at line 3466 of file efr32bg21_rac.h .

#define _RAC_PGACTRL_LNAMIXRFPKDTHRESHSEL_DEFAULT 0x00000004UL

Mode DEFAULT for RAC_PGACTRL

Definition at line 3681 of file efr32bg21_rac.h .

#define _RAC_PGACTRL_LNAMIXRFPKDTHRESHSEL_MASK 0x7000000UL

Bit mask for RAC_LNAMIXRFPKDTHRESHSEL

Definition at line 3680 of file efr32bg21_rac.h .

#define _RAC_PGACTRL_LNAMIXRFPKDTHRESHSEL_SHIFT 24

Shift value for RAC_LNAMIXRFPKDTHRESHSEL

Definition at line 3679 of file efr32bg21_rac.h .

#define _RAC_PGACTRL_MASK 0x07FFFFFFUL

Mask for RAC_PGACTRL

Definition at line 3503 of file efr32bg21_rac.h .

#define _RAC_PGACTRL_PGABWMODE_bw_1p25MHz 0x00000003UL

Mode bw_1p25MHz for RAC_PGACTRL

Definition at line 3510 of file efr32bg21_rac.h .

#define _RAC_PGACTRL_PGABWMODE_bw_1p67MHz 0x00000002UL

Mode bw_1p67MHz for RAC_PGACTRL

Definition at line 3509 of file efr32bg21_rac.h .

#define _RAC_PGACTRL_PGABWMODE_bw_2p5MHz 0x00000001UL

Mode bw_2p5MHz for RAC_PGACTRL

Definition at line 3508 of file efr32bg21_rac.h .

#define _RAC_PGACTRL_PGABWMODE_bw_5MHz 0x00000000UL

Mode bw_5MHz for RAC_PGACTRL

Definition at line 3507 of file efr32bg21_rac.h .

#define _RAC_PGACTRL_PGABWMODE_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_PGACTRL

Definition at line 3506 of file efr32bg21_rac.h .

#define _RAC_PGACTRL_PGABWMODE_MASK 0x3UL

Bit mask for RAC_PGABWMODE

Definition at line 3505 of file efr32bg21_rac.h .

#define _RAC_PGACTRL_PGABWMODE_SHIFT 0

Shift value for RAC_PGABWMODE

Definition at line 3504 of file efr32bg21_rac.h .

#define _RAC_PGACTRL_PGAENBIAS_bias_disable 0x00000000UL

Mode bias_disable for RAC_PGACTRL

Definition at line 3520 of file efr32bg21_rac.h .

#define _RAC_PGACTRL_PGAENBIAS_bias_enable 0x00000001UL

Mode bias_enable for RAC_PGACTRL

Definition at line 3521 of file efr32bg21_rac.h .

#define _RAC_PGACTRL_PGAENBIAS_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_PGACTRL

Definition at line 3519 of file efr32bg21_rac.h .

#define _RAC_PGACTRL_PGAENBIAS_MASK 0x4UL

Bit mask for RAC_PGAENBIAS

Definition at line 3518 of file efr32bg21_rac.h .

#define _RAC_PGACTRL_PGAENBIAS_SHIFT 2

Shift value for RAC_PGAENBIAS

Definition at line 3517 of file efr32bg21_rac.h .

#define _RAC_PGACTRL_PGAENGHZ_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_PGACTRL

Definition at line 3528 of file efr32bg21_rac.h .

#define _RAC_PGACTRL_PGAENGHZ_ghz_disable 0x00000000UL

Mode ghz_disable for RAC_PGACTRL

Definition at line 3529 of file efr32bg21_rac.h .

#define _RAC_PGACTRL_PGAENGHZ_ghz_enable 0x00000001UL

Mode ghz_enable for RAC_PGACTRL

Definition at line 3530 of file efr32bg21_rac.h .

#define _RAC_PGACTRL_PGAENGHZ_MASK 0x8UL

Bit mask for RAC_PGAENGHZ

Definition at line 3527 of file efr32bg21_rac.h .

#define _RAC_PGACTRL_PGAENGHZ_SHIFT 3

Shift value for RAC_PGAENGHZ

Definition at line 3526 of file efr32bg21_rac.h .

#define _RAC_PGACTRL_PGAENHYST_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_PGACTRL

Definition at line 3537 of file efr32bg21_rac.h .

#define _RAC_PGACTRL_PGAENHYST_MASK 0x10UL

Bit mask for RAC_PGAENHYST

Definition at line 3536 of file efr32bg21_rac.h .

#define _RAC_PGACTRL_PGAENHYST_pkd_hyst_disable 0x00000000UL

Mode pkd_hyst_disable for RAC_PGACTRL

Definition at line 3538 of file efr32bg21_rac.h .

#define _RAC_PGACTRL_PGAENHYST_pkd_hyst_enable 0x00000001UL

Mode pkd_hyst_enable for RAC_PGACTRL

Definition at line 3539 of file efr32bg21_rac.h .

#define _RAC_PGACTRL_PGAENHYST_SHIFT 4

Shift value for RAC_PGAENHYST

Definition at line 3535 of file efr32bg21_rac.h .

#define _RAC_PGACTRL_PGAENLATCHI_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_PGACTRL

Definition at line 3546 of file efr32bg21_rac.h .

#define _RAC_PGACTRL_PGAENLATCHI_MASK 0x20UL

Bit mask for RAC_PGAENLATCHI

Definition at line 3545 of file efr32bg21_rac.h .

#define _RAC_PGACTRL_PGAENLATCHI_pkd_latch_i_disable 0x00000000UL

Mode pkd_latch_i_disable for RAC_PGACTRL

Definition at line 3547 of file efr32bg21_rac.h .

#define _RAC_PGACTRL_PGAENLATCHI_pkd_latch_i_enable 0x00000001UL

Mode pkd_latch_i_enable for RAC_PGACTRL

Definition at line 3548 of file efr32bg21_rac.h .

#define _RAC_PGACTRL_PGAENLATCHI_SHIFT 5

Shift value for RAC_PGAENLATCHI

Definition at line 3544 of file efr32bg21_rac.h .

#define _RAC_PGACTRL_PGAENLATCHQ_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_PGACTRL

Definition at line 3555 of file efr32bg21_rac.h .

#define _RAC_PGACTRL_PGAENLATCHQ_MASK 0x40UL

Bit mask for RAC_PGAENLATCHQ

Definition at line 3554 of file efr32bg21_rac.h .

#define _RAC_PGACTRL_PGAENLATCHQ_pkd_latch_q_disable 0x00000000UL

Mode pkd_latch_q_disable for RAC_PGACTRL

Definition at line 3556 of file efr32bg21_rac.h .

#define _RAC_PGACTRL_PGAENLATCHQ_pkd_latch_q_enable 0x00000001UL

Mode pkd_latch_q_enable for RAC_PGACTRL

Definition at line 3557 of file efr32bg21_rac.h .

#define _RAC_PGACTRL_PGAENLATCHQ_SHIFT 6

Shift value for RAC_PGAENLATCHQ

Definition at line 3553 of file efr32bg21_rac.h .

#define _RAC_PGACTRL_PGAENLDOLOAD_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_PGACTRL

Definition at line 3564 of file efr32bg21_rac.h .

#define _RAC_PGACTRL_PGAENLDOLOAD_disable_ldo_load 0x00000000UL

Mode disable_ldo_load for RAC_PGACTRL

Definition at line 3565 of file efr32bg21_rac.h .

#define _RAC_PGACTRL_PGAENLDOLOAD_enable_ldo_load 0x00000001UL

Mode enable_ldo_load for RAC_PGACTRL

Definition at line 3566 of file efr32bg21_rac.h .

#define _RAC_PGACTRL_PGAENLDOLOAD_MASK 0x80UL

Bit mask for RAC_PGAENLDOLOAD

Definition at line 3563 of file efr32bg21_rac.h .

#define _RAC_PGACTRL_PGAENLDOLOAD_SHIFT 7

Shift value for RAC_PGAENLDOLOAD

Definition at line 3562 of file efr32bg21_rac.h .

#define _RAC_PGACTRL_PGAENOFFD_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_PGACTRL

Definition at line 3573 of file efr32bg21_rac.h .

#define _RAC_PGACTRL_PGAENOFFD_MASK 0x100UL

Bit mask for RAC_PGAENOFFD

Definition at line 3572 of file efr32bg21_rac.h .

#define _RAC_PGACTRL_PGAENOFFD_pkd_offd_disable 0x00000000UL

Mode pkd_offd_disable for RAC_PGACTRL

Definition at line 3574 of file efr32bg21_rac.h .

#define _RAC_PGACTRL_PGAENOFFD_pkd_offd_enable 0x00000001UL

Mode pkd_offd_enable for RAC_PGACTRL

Definition at line 3575 of file efr32bg21_rac.h .

#define _RAC_PGACTRL_PGAENOFFD_SHIFT 8

Shift value for RAC_PGAENOFFD

Definition at line 3571 of file efr32bg21_rac.h .

#define _RAC_PGACTRL_PGAENPGAI_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_PGACTRL

Definition at line 3582 of file efr32bg21_rac.h .

#define _RAC_PGACTRL_PGAENPGAI_MASK 0x200UL

Bit mask for RAC_PGAENPGAI

Definition at line 3581 of file efr32bg21_rac.h .

#define _RAC_PGACTRL_PGAENPGAI_pgai_disable 0x00000000UL

Mode pgai_disable for RAC_PGACTRL

Definition at line 3583 of file efr32bg21_rac.h .

#define _RAC_PGACTRL_PGAENPGAI_pgai_enable 0x00000001UL

Mode pgai_enable for RAC_PGACTRL

Definition at line 3584 of file efr32bg21_rac.h .

#define _RAC_PGACTRL_PGAENPGAI_SHIFT 9

Shift value for RAC_PGAENPGAI

Definition at line 3580 of file efr32bg21_rac.h .

#define _RAC_PGACTRL_PGAENPGAQ_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_PGACTRL

Definition at line 3591 of file efr32bg21_rac.h .

#define _RAC_PGACTRL_PGAENPGAQ_MASK 0x400UL

Bit mask for RAC_PGAENPGAQ

Definition at line 3590 of file efr32bg21_rac.h .

#define _RAC_PGACTRL_PGAENPGAQ_pgaq_disable 0x00000000UL

Mode pgaq_disable for RAC_PGACTRL

Definition at line 3592 of file efr32bg21_rac.h .

#define _RAC_PGACTRL_PGAENPGAQ_pgaq_enable 0x00000001UL

Mode pgaq_enable for RAC_PGACTRL

Definition at line 3593 of file efr32bg21_rac.h .

#define _RAC_PGACTRL_PGAENPGAQ_SHIFT 10

Shift value for RAC_PGAENPGAQ

Definition at line 3589 of file efr32bg21_rac.h .

#define _RAC_PGACTRL_PGAENPKD_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_PGACTRL

Definition at line 3600 of file efr32bg21_rac.h .

#define _RAC_PGACTRL_PGAENPKD_MASK 0x800UL

Bit mask for RAC_PGAENPKD

Definition at line 3599 of file efr32bg21_rac.h .

#define _RAC_PGACTRL_PGAENPKD_pkd_disable 0x00000000UL

Mode pkd_disable for RAC_PGACTRL

Definition at line 3601 of file efr32bg21_rac.h .

#define _RAC_PGACTRL_PGAENPKD_pkd_enable 0x00000001UL

Mode pkd_enable for RAC_PGACTRL

Definition at line 3602 of file efr32bg21_rac.h .

#define _RAC_PGACTRL_PGAENPKD_SHIFT 11

Shift value for RAC_PGAENPKD

Definition at line 3598 of file efr32bg21_rac.h .

#define _RAC_PGACTRL_PGAENRCMOUT_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_PGACTRL

Definition at line 3609 of file efr32bg21_rac.h .

#define _RAC_PGACTRL_PGAENRCMOUT_MASK 0x1000UL

Bit mask for RAC_PGAENRCMOUT

Definition at line 3608 of file efr32bg21_rac.h .

#define _RAC_PGACTRL_PGAENRCMOUT_rcm_out_disable 0x00000000UL

Mode rcm_out_disable for RAC_PGACTRL

Definition at line 3610 of file efr32bg21_rac.h .

#define _RAC_PGACTRL_PGAENRCMOUT_rcm_out_enable 0x00000001UL

Mode rcm_out_enable for RAC_PGACTRL

Definition at line 3611 of file efr32bg21_rac.h .

#define _RAC_PGACTRL_PGAENRCMOUT_SHIFT 12

Shift value for RAC_PGAENRCMOUT

Definition at line 3607 of file efr32bg21_rac.h .

#define _RAC_PGACTRL_PGAPOWERMODE_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_PGACTRL

Definition at line 3617 of file efr32bg21_rac.h .

#define _RAC_PGACTRL_PGAPOWERMODE_MASK 0xC000UL

Bit mask for RAC_PGAPOWERMODE

Definition at line 3616 of file efr32bg21_rac.h .

#define _RAC_PGACTRL_PGAPOWERMODE_pm_0p5 0x00000003UL

Mode pm_0p5 for RAC_PGACTRL

Definition at line 3621 of file efr32bg21_rac.h .

#define _RAC_PGACTRL_PGAPOWERMODE_pm_0p8 0x00000001UL

Mode pm_0p8 for RAC_PGACTRL

Definition at line 3619 of file efr32bg21_rac.h .

#define _RAC_PGACTRL_PGAPOWERMODE_pm_1p2 0x00000002UL

Mode pm_1p2 for RAC_PGACTRL

Definition at line 3620 of file efr32bg21_rac.h .

#define _RAC_PGACTRL_PGAPOWERMODE_pm_typ 0x00000000UL

Mode pm_typ for RAC_PGACTRL

Definition at line 3618 of file efr32bg21_rac.h .

#define _RAC_PGACTRL_PGAPOWERMODE_SHIFT 14

Shift value for RAC_PGAPOWERMODE

Definition at line 3615 of file efr32bg21_rac.h .

#define _RAC_PGACTRL_PGATHRPKDHISEL_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_PGACTRL

Definition at line 3655 of file efr32bg21_rac.h .

#define _RAC_PGACTRL_PGATHRPKDHISEL_MASK 0xF00000UL

Bit mask for RAC_PGATHRPKDHISEL

Definition at line 3654 of file efr32bg21_rac.h .

#define _RAC_PGACTRL_PGATHRPKDHISEL_SHIFT 20

Shift value for RAC_PGATHRPKDHISEL

Definition at line 3653 of file efr32bg21_rac.h .

#define _RAC_PGACTRL_PGATHRPKDHISEL_verf150mv 0x00000004UL

Mode verf150mv for RAC_PGACTRL

Definition at line 3660 of file efr32bg21_rac.h .

#define _RAC_PGACTRL_PGATHRPKDHISEL_vref100mv 0x00000002UL

Mode vref100mv for RAC_PGACTRL

Definition at line 3658 of file efr32bg21_rac.h .

#define _RAC_PGACTRL_PGATHRPKDHISEL_vref125mv 0x00000003UL

Mode vref125mv for RAC_PGACTRL

Definition at line 3659 of file efr32bg21_rac.h .

#define _RAC_PGACTRL_PGATHRPKDHISEL_vref175mv 0x00000005UL

Mode vref175mv for RAC_PGACTRL

Definition at line 3661 of file efr32bg21_rac.h .

#define _RAC_PGACTRL_PGATHRPKDHISEL_vref200mv 0x00000006UL

Mode vref200mv for RAC_PGACTRL

Definition at line 3662 of file efr32bg21_rac.h .

#define _RAC_PGACTRL_PGATHRPKDHISEL_vref225mv 0x00000007UL

Mode vref225mv for RAC_PGACTRL

Definition at line 3663 of file efr32bg21_rac.h .

#define _RAC_PGACTRL_PGATHRPKDHISEL_vref250mv 0x00000008UL

Mode vref250mv for RAC_PGACTRL

Definition at line 3664 of file efr32bg21_rac.h .

#define _RAC_PGACTRL_PGATHRPKDHISEL_vref275mv 0x00000009UL

Mode vref275mv for RAC_PGACTRL

Definition at line 3665 of file efr32bg21_rac.h .

#define _RAC_PGACTRL_PGATHRPKDHISEL_vref300mv 0x0000000AUL

Mode vref300mv for RAC_PGACTRL

Definition at line 3666 of file efr32bg21_rac.h .

#define _RAC_PGACTRL_PGATHRPKDHISEL_vref50mv 0x00000000UL

Mode vref50mv for RAC_PGACTRL

Definition at line 3656 of file efr32bg21_rac.h .

#define _RAC_PGACTRL_PGATHRPKDHISEL_vref75mv 0x00000001UL

Mode vref75mv for RAC_PGACTRL

Definition at line 3657 of file efr32bg21_rac.h .

#define _RAC_PGACTRL_PGATHRPKDLOSEL_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_PGACTRL

Definition at line 3629 of file efr32bg21_rac.h .

#define _RAC_PGACTRL_PGATHRPKDLOSEL_MASK 0xF0000UL

Bit mask for RAC_PGATHRPKDLOSEL

Definition at line 3628 of file efr32bg21_rac.h .

#define _RAC_PGACTRL_PGATHRPKDLOSEL_SHIFT 16

Shift value for RAC_PGATHRPKDLOSEL

Definition at line 3627 of file efr32bg21_rac.h .

#define _RAC_PGACTRL_PGATHRPKDLOSEL_vref100mv 0x00000002UL

Mode vref100mv for RAC_PGACTRL

Definition at line 3632 of file efr32bg21_rac.h .

#define _RAC_PGACTRL_PGATHRPKDLOSEL_vref125mv 0x00000003UL

Mode vref125mv for RAC_PGACTRL

Definition at line 3633 of file efr32bg21_rac.h .

#define _RAC_PGACTRL_PGATHRPKDLOSEL_vref150mv 0x00000004UL

Mode vref150mv for RAC_PGACTRL

Definition at line 3634 of file efr32bg21_rac.h .

#define _RAC_PGACTRL_PGATHRPKDLOSEL_vref175mv 0x00000005UL

Mode vref175mv for RAC_PGACTRL

Definition at line 3635 of file efr32bg21_rac.h .

#define _RAC_PGACTRL_PGATHRPKDLOSEL_vref200mv 0x00000006UL

Mode vref200mv for RAC_PGACTRL

Definition at line 3636 of file efr32bg21_rac.h .

#define _RAC_PGACTRL_PGATHRPKDLOSEL_vref225mv 0x00000007UL

Mode vref225mv for RAC_PGACTRL

Definition at line 3637 of file efr32bg21_rac.h .

#define _RAC_PGACTRL_PGATHRPKDLOSEL_vref250mv 0x00000008UL

Mode vref250mv for RAC_PGACTRL

Definition at line 3638 of file efr32bg21_rac.h .

#define _RAC_PGACTRL_PGATHRPKDLOSEL_vref275mv 0x00000009UL

Mode vref275mv for RAC_PGACTRL

Definition at line 3639 of file efr32bg21_rac.h .

#define _RAC_PGACTRL_PGATHRPKDLOSEL_vref300mv 0x0000000AUL

Mode vref300mv for RAC_PGACTRL

Definition at line 3640 of file efr32bg21_rac.h .

#define _RAC_PGACTRL_PGATHRPKDLOSEL_vref50mv 0x00000000UL

Mode vref50mv for RAC_PGACTRL

Definition at line 3630 of file efr32bg21_rac.h .

#define _RAC_PGACTRL_PGATHRPKDLOSEL_vref75mv 0x00000001UL

Mode vref75mv for RAC_PGACTRL

Definition at line 3631 of file efr32bg21_rac.h .

#define _RAC_PGACTRL_RESETVALUE 0x04000000UL

Default value for RAC_PGACTRL

Definition at line 3502 of file efr32bg21_rac.h .

#define _RAC_PGATRIM_MASK 0x000007FFUL

Mask for RAC_PGATRIM

Definition at line 3404 of file efr32bg21_rac.h .

#define _RAC_PGATRIM_PGACTUNE_cfb_0p7 0x00000000UL

Mode cfb_0p7 for RAC_PGATRIM

Definition at line 3408 of file efr32bg21_rac.h .

#define _RAC_PGATRIM_PGACTUNE_cfb_1p32 0x0000000FUL

Mode cfb_1p32 for RAC_PGATRIM

Definition at line 3410 of file efr32bg21_rac.h .

#define _RAC_PGATRIM_PGACTUNE_cfb_nominal 0x00000007UL

Mode cfb_nominal for RAC_PGATRIM

Definition at line 3409 of file efr32bg21_rac.h .

#define _RAC_PGATRIM_PGACTUNE_DEFAULT 0x00000007UL

Mode DEFAULT for RAC_PGATRIM

Definition at line 3407 of file efr32bg21_rac.h .

#define _RAC_PGATRIM_PGACTUNE_MASK 0xFUL

Bit mask for RAC_PGACTUNE

Definition at line 3406 of file efr32bg21_rac.h .

#define _RAC_PGATRIM_PGACTUNE_SHIFT 0

Shift value for RAC_PGACTUNE

Definition at line 3405 of file efr32bg21_rac.h .

#define _RAC_PGATRIM_PGADISANTILOCK_antilock_disable 0x00000001UL

Mode antilock_disable for RAC_PGATRIM

Definition at line 3420 of file efr32bg21_rac.h .

#define _RAC_PGATRIM_PGADISANTILOCK_antilock_enable 0x00000000UL

Mode antilock_enable for RAC_PGATRIM

Definition at line 3419 of file efr32bg21_rac.h .

#define _RAC_PGATRIM_PGADISANTILOCK_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_PGATRIM

Definition at line 3418 of file efr32bg21_rac.h .

#define _RAC_PGATRIM_PGADISANTILOCK_MASK 0x10UL

Bit mask for RAC_PGADISANTILOCK

Definition at line 3417 of file efr32bg21_rac.h .

#define _RAC_PGATRIM_PGADISANTILOCK_SHIFT 4

Shift value for RAC_PGADISANTILOCK

Definition at line 3416 of file efr32bg21_rac.h .

#define _RAC_PGATRIM_PGAVCMOUTTRIM_DEFAULT 0x00000002UL

Mode DEFAULT for RAC_PGATRIM

Definition at line 3426 of file efr32bg21_rac.h .

#define _RAC_PGATRIM_PGAVCMOUTTRIM_MASK 0xE0UL

Bit mask for RAC_PGAVCMOUTTRIM

Definition at line 3425 of file efr32bg21_rac.h .

#define _RAC_PGATRIM_PGAVCMOUTTRIM_SHIFT 5

Shift value for RAC_PGAVCMOUTTRIM

Definition at line 3424 of file efr32bg21_rac.h .

#define _RAC_PGATRIM_PGAVCMOUTTRIM_vcm_out_0p4 0x00000000UL

Mode vcm_out_0p4 for RAC_PGATRIM

Definition at line 3427 of file efr32bg21_rac.h .

#define _RAC_PGATRIM_PGAVCMOUTTRIM_vcm_out_0p45 0x00000001UL

Mode vcm_out_0p45 for RAC_PGATRIM

Definition at line 3428 of file efr32bg21_rac.h .

#define _RAC_PGATRIM_PGAVCMOUTTRIM_vcm_out_0p5 0x00000002UL

Mode vcm_out_0p5 for RAC_PGATRIM

Definition at line 3429 of file efr32bg21_rac.h .

#define _RAC_PGATRIM_PGAVCMOUTTRIM_vcm_out_0p55 0x00000003UL

Mode vcm_out_0p55 for RAC_PGATRIM

Definition at line 3430 of file efr32bg21_rac.h .

#define _RAC_PGATRIM_PGAVCMOUTTRIM_vcm_out_0p6 0x00000004UL

Mode vcm_out_0p6 for RAC_PGATRIM

Definition at line 3431 of file efr32bg21_rac.h .

#define _RAC_PGATRIM_PGAVCMOUTTRIM_vcm_out_0p65 0x00000005UL

Mode vcm_out_0p65 for RAC_PGATRIM

Definition at line 3432 of file efr32bg21_rac.h .

#define _RAC_PGATRIM_PGAVCMOUTTRIM_vcm_out_0p7 0x00000006UL

Mode vcm_out_0p7 for RAC_PGATRIM

Definition at line 3433 of file efr32bg21_rac.h .

#define _RAC_PGATRIM_PGAVCMOUTTRIM_vcm_out_0p75 0x00000007UL

Mode vcm_out_0p75 for RAC_PGATRIM

Definition at line 3434 of file efr32bg21_rac.h .

#define _RAC_PGATRIM_PGAVLDOTRIM_DEFAULT 0x00000005UL

Mode DEFAULT for RAC_PGATRIM

Definition at line 3446 of file efr32bg21_rac.h .

#define _RAC_PGATRIM_PGAVLDOTRIM_MASK 0x700UL

Bit mask for RAC_PGAVLDOTRIM

Definition at line 3445 of file efr32bg21_rac.h .

#define _RAC_PGATRIM_PGAVLDOTRIM_SHIFT 8

Shift value for RAC_PGAVLDOTRIM

Definition at line 3444 of file efr32bg21_rac.h .

#define _RAC_PGATRIM_PGAVLDOTRIM_vdda_1p15 0x00000000UL

Mode vdda_1p15 for RAC_PGATRIM

Definition at line 3447 of file efr32bg21_rac.h .

#define _RAC_PGATRIM_PGAVLDOTRIM_vdda_1p2 0x00000001UL

Mode vdda_1p2 for RAC_PGATRIM

Definition at line 3448 of file efr32bg21_rac.h .

#define _RAC_PGATRIM_PGAVLDOTRIM_vdda_1p25 0x00000002UL

Mode vdda_1p25 for RAC_PGATRIM

Definition at line 3449 of file efr32bg21_rac.h .

#define _RAC_PGATRIM_PGAVLDOTRIM_vdda_1p3 0x00000003UL

Mode vdda_1p3 for RAC_PGATRIM

Definition at line 3450 of file efr32bg21_rac.h .

#define _RAC_PGATRIM_PGAVLDOTRIM_vdda_1p35 0x00000004UL

Mode vdda_1p35 for RAC_PGATRIM

Definition at line 3451 of file efr32bg21_rac.h .

#define _RAC_PGATRIM_PGAVLDOTRIM_vdda_1p4 0x00000005UL

Mode vdda_1p4 for RAC_PGATRIM

Definition at line 3452 of file efr32bg21_rac.h .

#define _RAC_PGATRIM_PGAVLDOTRIM_vdda_1p5 0x00000006UL

Mode vdda_1p5 for RAC_PGATRIM

Definition at line 3453 of file efr32bg21_rac.h .

#define _RAC_PGATRIM_PGAVLDOTRIM_vdda_1p55 0x00000007UL

Mode vdda_1p55 for RAC_PGATRIM

Definition at line 3454 of file efr32bg21_rac.h .

#define _RAC_PGATRIM_RESETVALUE 0x00000547UL

Default value for RAC_PGATRIM

Definition at line 3403 of file efr32bg21_rac.h .

#define _RAC_PRECTRL_MASK 0x0000003FUL

Mask for RAC_PRECTRL

Definition at line 2610 of file efr32bg21_rac.h .

#define _RAC_PRECTRL_PREBYPFORCE_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_PRECTRL

Definition at line 2614 of file efr32bg21_rac.h .

#define _RAC_PRECTRL_PREBYPFORCE_forced 0x00000001UL

Mode forced for RAC_PRECTRL

Definition at line 2616 of file efr32bg21_rac.h .

#define _RAC_PRECTRL_PREBYPFORCE_MASK 0x1UL

Bit mask for RAC_PREBYPFORCE

Definition at line 2613 of file efr32bg21_rac.h .

#define _RAC_PRECTRL_PREBYPFORCE_not_forced 0x00000000UL

Mode not_forced for RAC_PRECTRL

Definition at line 2615 of file efr32bg21_rac.h .

#define _RAC_PRECTRL_PREBYPFORCE_SHIFT 0

Shift value for RAC_PREBYPFORCE

Definition at line 2612 of file efr32bg21_rac.h .

#define _RAC_PRECTRL_PREREGTRIM_DEFAULT 0x00000003UL

Mode DEFAULT for RAC_PRECTRL

Definition at line 2622 of file efr32bg21_rac.h .

#define _RAC_PRECTRL_PREREGTRIM_MASK 0xEUL

Bit mask for RAC_PREREGTRIM

Definition at line 2621 of file efr32bg21_rac.h .

#define _RAC_PRECTRL_PREREGTRIM_SHIFT 1

Shift value for RAC_PREREGTRIM

Definition at line 2620 of file efr32bg21_rac.h .

#define _RAC_PRECTRL_PREREGTRIM_v1p61 0x00000000UL

Mode v1p61 for RAC_PRECTRL

Definition at line 2623 of file efr32bg21_rac.h .

#define _RAC_PRECTRL_PREREGTRIM_v1p68 0x00000001UL

Mode v1p68 for RAC_PRECTRL

Definition at line 2624 of file efr32bg21_rac.h .

#define _RAC_PRECTRL_PREREGTRIM_v1p74 0x00000002UL

Mode v1p74 for RAC_PRECTRL

Definition at line 2625 of file efr32bg21_rac.h .

#define _RAC_PRECTRL_PREREGTRIM_v1p80 0x00000003UL

Mode v1p80 for RAC_PRECTRL

Definition at line 2626 of file efr32bg21_rac.h .

#define _RAC_PRECTRL_PREREGTRIM_v1p86 0x00000004UL

Mode v1p86 for RAC_PRECTRL

Definition at line 2627 of file efr32bg21_rac.h .

#define _RAC_PRECTRL_PREREGTRIM_v1p91 0x00000005UL

Mode v1p91 for RAC_PRECTRL

Definition at line 2628 of file efr32bg21_rac.h .

#define _RAC_PRECTRL_PREREGTRIM_v1p96 0x00000006UL

Mode v1p96 for RAC_PRECTRL

Definition at line 2629 of file efr32bg21_rac.h .

#define _RAC_PRECTRL_PREREGTRIM_v2p00 0x00000007UL

Mode v2p00 for RAC_PRECTRL

Definition at line 2630 of file efr32bg21_rac.h .

#define _RAC_PRECTRL_PREVREFTRIM_DEFAULT 0x00000002UL

Mode DEFAULT for RAC_PRECTRL

Definition at line 2642 of file efr32bg21_rac.h .

#define _RAC_PRECTRL_PREVREFTRIM_MASK 0x30UL

Bit mask for RAC_PREVREFTRIM

Definition at line 2641 of file efr32bg21_rac.h .

#define _RAC_PRECTRL_PREVREFTRIM_SHIFT 4

Shift value for RAC_PREVREFTRIM

Definition at line 2640 of file efr32bg21_rac.h .

#define _RAC_PRECTRL_PREVREFTRIM_v0p675 0x00000000UL

Mode v0p675 for RAC_PRECTRL

Definition at line 2643 of file efr32bg21_rac.h .

#define _RAC_PRECTRL_PREVREFTRIM_v0p688 0x00000001UL

Mode v0p688 for RAC_PRECTRL

Definition at line 2644 of file efr32bg21_rac.h .

#define _RAC_PRECTRL_PREVREFTRIM_v0p700 0x00000002UL

Mode v0p700 for RAC_PRECTRL

Definition at line 2645 of file efr32bg21_rac.h .

#define _RAC_PRECTRL_PREVREFTRIM_v0p713 0x00000003UL

Mode v0p713 for RAC_PRECTRL

Definition at line 2646 of file efr32bg21_rac.h .

#define _RAC_PRECTRL_RESETVALUE 0x00000026UL

Default value for RAC_PRECTRL

Definition at line 2609 of file efr32bg21_rac.h .

#define _RAC_PRESC_MASK 0x0000007FUL

Mask for RAC_PRESC

Definition at line 1182 of file efr32bg21_rac.h .

#define _RAC_PRESC_RESETVALUE 0x00000007UL

Default value for RAC_PRESC

Definition at line 1181 of file efr32bg21_rac.h .

#define _RAC_PRESC_STIMER_DEFAULT 0x00000007UL

Mode DEFAULT for RAC_PRESC

Definition at line 1185 of file efr32bg21_rac.h .

#define _RAC_PRESC_STIMER_MASK 0x7FUL

Bit mask for RAC_STIMER

Definition at line 1184 of file efr32bg21_rac.h .

#define _RAC_PRESC_STIMER_SHIFT 0

Shift value for RAC_STIMER

Definition at line 1183 of file efr32bg21_rac.h .

#define _RAC_R0_MASK 0xFFFFFFFFUL

Mask for RAC_R0

Definition at line 985 of file efr32bg21_rac.h .

#define _RAC_R0_R0_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_R0

Definition at line 988 of file efr32bg21_rac.h .

#define _RAC_R0_R0_MASK 0xFFFFFFFFUL

Bit mask for RAC_R0

Definition at line 987 of file efr32bg21_rac.h .

#define _RAC_R0_R0_SHIFT 0

Shift value for RAC_R0

Definition at line 986 of file efr32bg21_rac.h .

#define _RAC_R0_RESETVALUE 0x00000000UL

Default value for RAC_R0

Definition at line 984 of file efr32bg21_rac.h .

#define _RAC_R1_MASK 0xFFFFFFFFUL

Mask for RAC_R1

Definition at line 993 of file efr32bg21_rac.h .

#define _RAC_R1_R1_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_R1

Definition at line 996 of file efr32bg21_rac.h .

#define _RAC_R1_R1_MASK 0xFFFFFFFFUL

Bit mask for RAC_R1

Definition at line 995 of file efr32bg21_rac.h .

#define _RAC_R1_R1_SHIFT 0

Shift value for RAC_R1

Definition at line 994 of file efr32bg21_rac.h .

#define _RAC_R1_RESETVALUE 0x00000000UL

Default value for RAC_R1

Definition at line 992 of file efr32bg21_rac.h .

#define _RAC_R2_MASK 0xFFFFFFFFUL

Mask for RAC_R2

Definition at line 1001 of file efr32bg21_rac.h .

#define _RAC_R2_R2_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_R2

Definition at line 1004 of file efr32bg21_rac.h .

#define _RAC_R2_R2_MASK 0xFFFFFFFFUL

Bit mask for RAC_R2

Definition at line 1003 of file efr32bg21_rac.h .

#define _RAC_R2_R2_SHIFT 0

Shift value for RAC_R2

Definition at line 1002 of file efr32bg21_rac.h .

#define _RAC_R2_RESETVALUE 0x00000000UL

Default value for RAC_R2

Definition at line 1000 of file efr32bg21_rac.h .

#define _RAC_R3_MASK 0xFFFFFFFFUL

Mask for RAC_R3

Definition at line 1009 of file efr32bg21_rac.h .

#define _RAC_R3_R3_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_R3

Definition at line 1012 of file efr32bg21_rac.h .

#define _RAC_R3_R3_MASK 0xFFFFFFFFUL

Bit mask for RAC_R3

Definition at line 1011 of file efr32bg21_rac.h .

#define _RAC_R3_R3_SHIFT 0

Shift value for RAC_R3

Definition at line 1010 of file efr32bg21_rac.h .

#define _RAC_R3_RESETVALUE 0x00000000UL

Default value for RAC_R3

Definition at line 1008 of file efr32bg21_rac.h .

#define _RAC_R4_MASK 0xFFFFFFFFUL

Mask for RAC_R4

Definition at line 1017 of file efr32bg21_rac.h .

#define _RAC_R4_R4_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_R4

Definition at line 1020 of file efr32bg21_rac.h .

#define _RAC_R4_R4_MASK 0xFFFFFFFFUL

Bit mask for RAC_R4

Definition at line 1019 of file efr32bg21_rac.h .

#define _RAC_R4_R4_SHIFT 0

Shift value for RAC_R4

Definition at line 1018 of file efr32bg21_rac.h .

#define _RAC_R4_RESETVALUE 0x00000000UL

Default value for RAC_R4

Definition at line 1016 of file efr32bg21_rac.h .

#define _RAC_R5_MASK 0xFFFFFFFFUL

Mask for RAC_R5

Definition at line 1025 of file efr32bg21_rac.h .

#define _RAC_R5_R5_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_R5

Definition at line 1028 of file efr32bg21_rac.h .

#define _RAC_R5_R5_MASK 0xFFFFFFFFUL

Bit mask for RAC_R5

Definition at line 1027 of file efr32bg21_rac.h .

#define _RAC_R5_R5_SHIFT 0

Shift value for RAC_R5

Definition at line 1026 of file efr32bg21_rac.h .

#define _RAC_R5_RESETVALUE 0x00000000UL

Default value for RAC_R5

Definition at line 1024 of file efr32bg21_rac.h .

#define _RAC_R6_MASK 0xFFFFFFFFUL

Mask for RAC_R6

Definition at line 1033 of file efr32bg21_rac.h .

#define _RAC_R6_R6_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_R6

Definition at line 1036 of file efr32bg21_rac.h .

#define _RAC_R6_R6_MASK 0xFFFFFFFFUL

Bit mask for RAC_R6

Definition at line 1035 of file efr32bg21_rac.h .

#define _RAC_R6_R6_SHIFT 0

Shift value for RAC_R6

Definition at line 1034 of file efr32bg21_rac.h .

#define _RAC_R6_RESETVALUE 0x00000000UL

Default value for RAC_R6

Definition at line 1032 of file efr32bg21_rac.h .

#define _RAC_R7_MASK 0xFFFFFFFFUL

Mask for RAC_R7

Definition at line 1041 of file efr32bg21_rac.h .

#define _RAC_R7_R7_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_R7

Definition at line 1044 of file efr32bg21_rac.h .

#define _RAC_R7_R7_MASK 0xFFFFFFFFUL

Bit mask for RAC_R7

Definition at line 1043 of file efr32bg21_rac.h .

#define _RAC_R7_R7_SHIFT 0

Shift value for RAC_R7

Definition at line 1042 of file efr32bg21_rac.h .

#define _RAC_R7_RESETVALUE 0x00000000UL

Default value for RAC_R7

Definition at line 1040 of file efr32bg21_rac.h .

#define _RAC_RADIOEN_MASK 0x00000007UL

Mask for RAC_RADIOEN

Definition at line 3791 of file efr32bg21_rac.h .

#define _RAC_RADIOEN_PREEN_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_RADIOEN

Definition at line 3795 of file efr32bg21_rac.h .

#define _RAC_RADIOEN_PREEN_MASK 0x1UL

Bit mask for RAC_PREEN

Definition at line 3794 of file efr32bg21_rac.h .

#define _RAC_RADIOEN_PREEN_powered_off 0x00000000UL

Mode powered_off for RAC_RADIOEN

Definition at line 3796 of file efr32bg21_rac.h .

#define _RAC_RADIOEN_PREEN_powered_on 0x00000001UL

Mode powered_on for RAC_RADIOEN

Definition at line 3797 of file efr32bg21_rac.h .

#define _RAC_RADIOEN_PREEN_SHIFT 0

Shift value for RAC_PREEN

Definition at line 3793 of file efr32bg21_rac.h .

#define _RAC_RADIOEN_PRESTB100UDIS_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_RADIOEN

Definition at line 3804 of file efr32bg21_rac.h .

#define _RAC_RADIOEN_PRESTB100UDIS_i100ua_disabled 0x00000001UL

Mode i100ua_disabled for RAC_RADIOEN

Definition at line 3806 of file efr32bg21_rac.h .

#define _RAC_RADIOEN_PRESTB100UDIS_i100ua_enabled 0x00000000UL

Mode i100ua_enabled for RAC_RADIOEN

Definition at line 3805 of file efr32bg21_rac.h .

#define _RAC_RADIOEN_PRESTB100UDIS_MASK 0x2UL

Bit mask for RAC_PRESTB100UDIS

Definition at line 3803 of file efr32bg21_rac.h .

#define _RAC_RADIOEN_PRESTB100UDIS_SHIFT 1

Shift value for RAC_PRESTB100UDIS

Definition at line 3802 of file efr32bg21_rac.h .

#define _RAC_RADIOEN_RESETVALUE 0x00000000UL

Default value for RAC_RADIOEN

Definition at line 3790 of file efr32bg21_rac.h .

#define _RAC_RADIOEN_RFBIASEN_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_RADIOEN

Definition at line 3813 of file efr32bg21_rac.h .

#define _RAC_RADIOEN_RFBIASEN_disable_dualbis_vtr 0x00000000UL

Mode disable_dualbis_vtr for RAC_RADIOEN

Definition at line 3814 of file efr32bg21_rac.h .

#define _RAC_RADIOEN_RFBIASEN_enable_dualbis_vtr 0x00000001UL

Mode enable_dualbis_vtr for RAC_RADIOEN

Definition at line 3815 of file efr32bg21_rac.h .

#define _RAC_RADIOEN_RFBIASEN_MASK 0x4UL

Bit mask for RAC_RFBIASEN

Definition at line 3812 of file efr32bg21_rac.h .

#define _RAC_RADIOEN_RFBIASEN_SHIFT 2

Shift value for RAC_RFBIASEN

Definition at line 3811 of file efr32bg21_rac.h .

#define _RAC_RFBIASCAL_MASK 0x3F3F3F3FUL

Mask for RAC_RFBIASCAL

Definition at line 3686 of file efr32bg21_rac.h .

#define _RAC_RFBIASCAL_RESETVALUE 0x30202020UL

Default value for RAC_RFBIASCAL

Definition at line 3685 of file efr32bg21_rac.h .

#define _RAC_RFBIASCAL_RFBIASCALBIAS_DEFAULT 0x00000020UL

Mode DEFAULT for RAC_RFBIASCAL

Definition at line 3689 of file efr32bg21_rac.h .

#define _RAC_RFBIASCAL_RFBIASCALBIAS_MASK 0x3FUL

Bit mask for RAC_RFBIASCALBIAS

Definition at line 3688 of file efr32bg21_rac.h .

#define _RAC_RFBIASCAL_RFBIASCALBIAS_SHIFT 0

Shift value for RAC_RFBIASCALBIAS

Definition at line 3687 of file efr32bg21_rac.h .

#define _RAC_RFBIASCAL_RFBIASCALTC_DEFAULT 0x00000020UL

Mode DEFAULT for RAC_RFBIASCAL

Definition at line 3693 of file efr32bg21_rac.h .

#define _RAC_RFBIASCAL_RFBIASCALTC_MASK 0x3F00UL

Bit mask for RAC_RFBIASCALTC

Definition at line 3692 of file efr32bg21_rac.h .

#define _RAC_RFBIASCAL_RFBIASCALTC_SHIFT 8

Shift value for RAC_RFBIASCALTC

Definition at line 3691 of file efr32bg21_rac.h .

#define _RAC_RFBIASCAL_RFBIASCALVREF_DEFAULT 0x00000020UL

Mode DEFAULT for RAC_RFBIASCAL

Definition at line 3697 of file efr32bg21_rac.h .

#define _RAC_RFBIASCAL_RFBIASCALVREF_MASK 0x3F0000UL

Bit mask for RAC_RFBIASCALVREF

Definition at line 3696 of file efr32bg21_rac.h .

#define _RAC_RFBIASCAL_RFBIASCALVREF_SHIFT 16

Shift value for RAC_RFBIASCALVREF

Definition at line 3695 of file efr32bg21_rac.h .

#define _RAC_RFBIASCAL_RFBIASCALVREFSTARTUP_DEFAULT 0x00000030UL

Mode DEFAULT for RAC_RFBIASCAL

Definition at line 3701 of file efr32bg21_rac.h .

#define _RAC_RFBIASCAL_RFBIASCALVREFSTARTUP_MASK 0x3F000000UL

Bit mask for RAC_RFBIASCALVREFSTARTUP

Definition at line 3700 of file efr32bg21_rac.h .

#define _RAC_RFBIASCAL_RFBIASCALVREFSTARTUP_SHIFT 24

Shift value for RAC_RFBIASCALVREFSTARTUP

Definition at line 3699 of file efr32bg21_rac.h .

#define _RAC_RFBIASCTRL_MASK 0x000F001FUL

Mask for RAC_RFBIASCTRL

Definition at line 3706 of file efr32bg21_rac.h .

#define _RAC_RFBIASCTRL_RESETVALUE 0x00040000UL

Default value for RAC_RFBIASCTRL

Definition at line 3705 of file efr32bg21_rac.h .

#define _RAC_RFBIASCTRL_RFBIASDISABLEBOOTSTRAP_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_RFBIASCTRL

Definition at line 3710 of file efr32bg21_rac.h .

#define _RAC_RFBIASCTRL_RFBIASDISABLEBOOTSTRAP_disable_startup 0x00000001UL

Mode disable_startup for RAC_RFBIASCTRL

Definition at line 3712 of file efr32bg21_rac.h .

#define _RAC_RFBIASCTRL_RFBIASDISABLEBOOTSTRAP_enable_startup 0x00000000UL

Mode enable_startup for RAC_RFBIASCTRL

Definition at line 3711 of file efr32bg21_rac.h .

#define _RAC_RFBIASCTRL_RFBIASDISABLEBOOTSTRAP_MASK 0x1UL

Bit mask for RAC_RFBIASDISABLEBOOTSTRAP

Definition at line 3709 of file efr32bg21_rac.h .

#define _RAC_RFBIASCTRL_RFBIASDISABLEBOOTSTRAP_SHIFT 0

Shift value for RAC_RFBIASDISABLEBOOTSTRAP

Definition at line 3708 of file efr32bg21_rac.h .

#define _RAC_RFBIASCTRL_RFBIASLDOHIGHCURRENT_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_RFBIASCTRL

Definition at line 3719 of file efr32bg21_rac.h .

#define _RAC_RFBIASCTRL_RFBIASLDOHIGHCURRENT_high_current 0x00000001UL

Mode high_current for RAC_RFBIASCTRL

Definition at line 3721 of file efr32bg21_rac.h .

#define _RAC_RFBIASCTRL_RFBIASLDOHIGHCURRENT_low_current 0x00000000UL

Mode low_current for RAC_RFBIASCTRL

Definition at line 3720 of file efr32bg21_rac.h .

#define _RAC_RFBIASCTRL_RFBIASLDOHIGHCURRENT_MASK 0x2UL

Bit mask for RAC_RFBIASLDOHIGHCURRENT

Definition at line 3718 of file efr32bg21_rac.h .

#define _RAC_RFBIASCTRL_RFBIASLDOHIGHCURRENT_SHIFT 1

Shift value for RAC_RFBIASLDOHIGHCURRENT

Definition at line 3717 of file efr32bg21_rac.h .

#define _RAC_RFBIASCTRL_RFBIASLDOVREFTRIM_DEFAULT 0x00000004UL

Mode DEFAULT for RAC_RFBIASCTRL

Definition at line 3754 of file efr32bg21_rac.h .

#define _RAC_RFBIASCTRL_RFBIASLDOVREFTRIM_MASK 0xF0000UL

Bit mask for RAC_RFBIASLDOVREFTRIM

Definition at line 3753 of file efr32bg21_rac.h .

#define _RAC_RFBIASCTRL_RFBIASLDOVREFTRIM_SHIFT 16

Shift value for RAC_RFBIASLDOVREFTRIM

Definition at line 3752 of file efr32bg21_rac.h .

#define _RAC_RFBIASCTRL_RFBIASLDOVREFTRIM_vref_v0p800 0x00000000UL

Mode vref_v0p800 for RAC_RFBIASCTRL

Definition at line 3755 of file efr32bg21_rac.h .

#define _RAC_RFBIASCTRL_RFBIASLDOVREFTRIM_vref_v0p813 0x00000001UL

Mode vref_v0p813 for RAC_RFBIASCTRL

Definition at line 3756 of file efr32bg21_rac.h .

#define _RAC_RFBIASCTRL_RFBIASLDOVREFTRIM_vref_v0p825 0x00000002UL

Mode vref_v0p825 for RAC_RFBIASCTRL

Definition at line 3757 of file efr32bg21_rac.h .

#define _RAC_RFBIASCTRL_RFBIASLDOVREFTRIM_vref_v0p837 0x00000003UL

Mode vref_v0p837 for RAC_RFBIASCTRL

Definition at line 3758 of file efr32bg21_rac.h .

#define _RAC_RFBIASCTRL_RFBIASLDOVREFTRIM_vref_v0p850 0x00000004UL

Mode vref_v0p850 for RAC_RFBIASCTRL

Definition at line 3759 of file efr32bg21_rac.h .

#define _RAC_RFBIASCTRL_RFBIASLDOVREFTRIM_vref_v0p863 0x00000005UL

Mode vref_v0p863 for RAC_RFBIASCTRL

Definition at line 3760 of file efr32bg21_rac.h .

#define _RAC_RFBIASCTRL_RFBIASLDOVREFTRIM_vref_v0p875 0x00000006UL

Mode vref_v0p875 for RAC_RFBIASCTRL

Definition at line 3761 of file efr32bg21_rac.h .

#define _RAC_RFBIASCTRL_RFBIASLDOVREFTRIM_vref_v0p887 0x00000007UL

Mode vref_v0p887 for RAC_RFBIASCTRL

Definition at line 3762 of file efr32bg21_rac.h .

#define _RAC_RFBIASCTRL_RFBIASLDOVREFTRIM_vref_v0p900 0x00000008UL

Mode vref_v0p900 for RAC_RFBIASCTRL

Definition at line 3763 of file efr32bg21_rac.h .

#define _RAC_RFBIASCTRL_RFBIASLDOVREFTRIM_vref_v0p913 0x00000009UL

Mode vref_v0p913 for RAC_RFBIASCTRL

Definition at line 3764 of file efr32bg21_rac.h .

#define _RAC_RFBIASCTRL_RFBIASLDOVREFTRIM_vref_v0p925 0x0000000AUL

Mode vref_v0p925 for RAC_RFBIASCTRL

Definition at line 3765 of file efr32bg21_rac.h .

#define _RAC_RFBIASCTRL_RFBIASLDOVREFTRIM_vref_v0p938 0x0000000BUL

Mode vref_v0p938 for RAC_RFBIASCTRL

Definition at line 3766 of file efr32bg21_rac.h .

#define _RAC_RFBIASCTRL_RFBIASLDOVREFTRIM_vref_v0p950 0x0000000CUL

Mode vref_v0p950 for RAC_RFBIASCTRL

Definition at line 3767 of file efr32bg21_rac.h .

#define _RAC_RFBIASCTRL_RFBIASLDOVREFTRIM_vref_v0p963 0x0000000DUL

Mode vref_v0p963 for RAC_RFBIASCTRL

Definition at line 3768 of file efr32bg21_rac.h .

#define _RAC_RFBIASCTRL_RFBIASLDOVREFTRIM_vref_v0p975 0x0000000EUL

Mode vref_v0p975 for RAC_RFBIASCTRL

Definition at line 3769 of file efr32bg21_rac.h .

#define _RAC_RFBIASCTRL_RFBIASLDOVREFTRIM_vref_v0p988 0x0000000FUL

Mode vref_v0p988 for RAC_RFBIASCTRL

Definition at line 3770 of file efr32bg21_rac.h .

#define _RAC_RFBIASCTRL_RFBIASNONFLASHMODE_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_RFBIASCTRL

Definition at line 3728 of file efr32bg21_rac.h .

#define _RAC_RFBIASCTRL_RFBIASNONFLASHMODE_flash_process 0x00000000UL

Mode flash_process for RAC_RFBIASCTRL

Definition at line 3729 of file efr32bg21_rac.h .

#define _RAC_RFBIASCTRL_RFBIASNONFLASHMODE_MASK 0x4UL

Bit mask for RAC_RFBIASNONFLASHMODE

Definition at line 3727 of file efr32bg21_rac.h .

#define _RAC_RFBIASCTRL_RFBIASNONFLASHMODE_non_flash_process 0x00000001UL

Mode non_flash_process for RAC_RFBIASCTRL

Definition at line 3730 of file efr32bg21_rac.h .

#define _RAC_RFBIASCTRL_RFBIASNONFLASHMODE_SHIFT 2

Shift value for RAC_RFBIASNONFLASHMODE

Definition at line 3726 of file efr32bg21_rac.h .

#define _RAC_RFBIASCTRL_RFBIASSTARTUPCORE_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_RFBIASCTRL

Definition at line 3737 of file efr32bg21_rac.h .

#define _RAC_RFBIASCTRL_RFBIASSTARTUPCORE_default 0x00000000UL

Mode default for RAC_RFBIASCTRL

Definition at line 3738 of file efr32bg21_rac.h .

#define _RAC_RFBIASCTRL_RFBIASSTARTUPCORE_force_start 0x00000001UL

Mode force_start for RAC_RFBIASCTRL

Definition at line 3739 of file efr32bg21_rac.h .

#define _RAC_RFBIASCTRL_RFBIASSTARTUPCORE_MASK 0x8UL

Bit mask for RAC_RFBIASSTARTUPCORE

Definition at line 3736 of file efr32bg21_rac.h .

#define _RAC_RFBIASCTRL_RFBIASSTARTUPCORE_SHIFT 3

Shift value for RAC_RFBIASSTARTUPCORE

Definition at line 3735 of file efr32bg21_rac.h .

#define _RAC_RFBIASCTRL_RFBIASSTARTUPSUPPLY_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_RFBIASCTRL

Definition at line 3746 of file efr32bg21_rac.h .

#define _RAC_RFBIASCTRL_RFBIASSTARTUPSUPPLY_default 0x00000000UL

Mode default for RAC_RFBIASCTRL

Definition at line 3747 of file efr32bg21_rac.h .

#define _RAC_RFBIASCTRL_RFBIASSTARTUPSUPPLY_forc_start 0x00000001UL

Mode forc_start for RAC_RFBIASCTRL

Definition at line 3748 of file efr32bg21_rac.h .

#define _RAC_RFBIASCTRL_RFBIASSTARTUPSUPPLY_MASK 0x10UL

Bit mask for RAC_RFBIASSTARTUPSUPPLY

Definition at line 3745 of file efr32bg21_rac.h .

#define _RAC_RFBIASCTRL_RFBIASSTARTUPSUPPLY_SHIFT 4

Shift value for RAC_RFBIASSTARTUPSUPPLY

Definition at line 3744 of file efr32bg21_rac.h .

#define _RAC_RFPATHEN1_LNAMIXEN0DBMPA1_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_RFPATHEN1

Definition at line 3826 of file efr32bg21_rac.h .

#define _RAC_RFPATHEN1_LNAMIXEN0DBMPA1_disable 0x00000000UL

Mode disable for RAC_RFPATHEN1

Definition at line 3827 of file efr32bg21_rac.h .

#define _RAC_RFPATHEN1_LNAMIXEN0DBMPA1_enable 0x00000001UL

Mode enable for RAC_RFPATHEN1

Definition at line 3828 of file efr32bg21_rac.h .

#define _RAC_RFPATHEN1_LNAMIXEN0DBMPA1_MASK 0x1UL

Bit mask for RAC_LNAMIXEN0DBMPA1

Definition at line 3825 of file efr32bg21_rac.h .

#define _RAC_RFPATHEN1_LNAMIXEN0DBMPA1_SHIFT 0

Shift value for RAC_LNAMIXEN0DBMPA1

Definition at line 3824 of file efr32bg21_rac.h .

#define _RAC_RFPATHEN1_LNAMIXEN1_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_RFPATHEN1

Definition at line 3835 of file efr32bg21_rac.h .

#define _RAC_RFPATHEN1_LNAMIXEN1_disable 0x00000000UL

Mode disable for RAC_RFPATHEN1

Definition at line 3836 of file efr32bg21_rac.h .

#define _RAC_RFPATHEN1_LNAMIXEN1_enable 0x00000001UL

Mode enable for RAC_RFPATHEN1

Definition at line 3837 of file efr32bg21_rac.h .

#define _RAC_RFPATHEN1_LNAMIXEN1_MASK 0x2UL

Bit mask for RAC_LNAMIXEN1

Definition at line 3834 of file efr32bg21_rac.h .

#define _RAC_RFPATHEN1_LNAMIXEN1_SHIFT 1

Shift value for RAC_LNAMIXEN1

Definition at line 3833 of file efr32bg21_rac.h .

#define _RAC_RFPATHEN1_LNAMIXRFATTDCEN1_DEFAULT 0x00000001UL

Mode DEFAULT for RAC_RFPATHEN1

Definition at line 3844 of file efr32bg21_rac.h .

#define _RAC_RFPATHEN1_LNAMIXRFATTDCEN1_disable_dc 0x00000000UL

Mode disable_dc for RAC_RFPATHEN1

Definition at line 3845 of file efr32bg21_rac.h .

#define _RAC_RFPATHEN1_LNAMIXRFATTDCEN1_enable_dc 0x00000001UL

Mode enable_dc for RAC_RFPATHEN1

Definition at line 3846 of file efr32bg21_rac.h .

#define _RAC_RFPATHEN1_LNAMIXRFATTDCEN1_MASK 0x4UL

Bit mask for RAC_LNAMIXRFATTDCEN1

Definition at line 3843 of file efr32bg21_rac.h .

#define _RAC_RFPATHEN1_LNAMIXRFATTDCEN1_SHIFT 2

Shift value for RAC_LNAMIXRFATTDCEN1

Definition at line 3842 of file efr32bg21_rac.h .

#define _RAC_RFPATHEN1_LNAMIXRFPKDENRF1_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_RFPATHEN1

Definition at line 3853 of file efr32bg21_rac.h .

#define _RAC_RFPATHEN1_LNAMIXRFPKDENRF1_disable 0x00000000UL

Mode disable for RAC_RFPATHEN1

Definition at line 3854 of file efr32bg21_rac.h .

#define _RAC_RFPATHEN1_LNAMIXRFPKDENRF1_enable_path1 0x00000001UL

Mode enable_path1 for RAC_RFPATHEN1

Definition at line 3855 of file efr32bg21_rac.h .

#define _RAC_RFPATHEN1_LNAMIXRFPKDENRF1_MASK 0x8UL

Bit mask for RAC_LNAMIXRFPKDENRF1

Definition at line 3852 of file efr32bg21_rac.h .

#define _RAC_RFPATHEN1_LNAMIXRFPKDENRF1_SHIFT 3

Shift value for RAC_LNAMIXRFPKDENRF1

Definition at line 3851 of file efr32bg21_rac.h .

#define _RAC_RFPATHEN1_LNAMIXTRSW1_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_RFPATHEN1

Definition at line 3862 of file efr32bg21_rac.h .

#define _RAC_RFPATHEN1_LNAMIXTRSW1_disabled 0x00000000UL

Mode disabled for RAC_RFPATHEN1

Definition at line 3863 of file efr32bg21_rac.h .

#define _RAC_RFPATHEN1_LNAMIXTRSW1_enabled 0x00000001UL

Mode enabled for RAC_RFPATHEN1

Definition at line 3864 of file efr32bg21_rac.h .

#define _RAC_RFPATHEN1_LNAMIXTRSW1_MASK 0x10UL

Bit mask for RAC_LNAMIXTRSW1

Definition at line 3861 of file efr32bg21_rac.h .

#define _RAC_RFPATHEN1_LNAMIXTRSW1_SHIFT 4

Shift value for RAC_LNAMIXTRSW1

Definition at line 3860 of file efr32bg21_rac.h .

#define _RAC_RFPATHEN1_MASK 0x000000FFUL

Mask for RAC_RFPATHEN1

Definition at line 3822 of file efr32bg21_rac.h .

#define _RAC_RFPATHEN1_PAENANT1_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_RFPATHEN1

Definition at line 3871 of file efr32bg21_rac.h .

#define _RAC_RFPATHEN1_PAENANT1_disable 0x00000000UL

Mode disable for RAC_RFPATHEN1

Definition at line 3872 of file efr32bg21_rac.h .

#define _RAC_RFPATHEN1_PAENANT1_enable 0x00000001UL

Mode enable for RAC_RFPATHEN1

Definition at line 3873 of file efr32bg21_rac.h .

#define _RAC_RFPATHEN1_PAENANT1_MASK 0x20UL

Bit mask for RAC_PAENANT1

Definition at line 3870 of file efr32bg21_rac.h .

#define _RAC_RFPATHEN1_PAENANT1_SHIFT 5

Shift value for RAC_PAENANT1

Definition at line 3869 of file efr32bg21_rac.h .

#define _RAC_RFPATHEN1_PAENPA10DBM_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_RFPATHEN1

Definition at line 3880 of file efr32bg21_rac.h .

#define _RAC_RFPATHEN1_PAENPA10DBM_disable 0x00000000UL

Mode disable for RAC_RFPATHEN1

Definition at line 3881 of file efr32bg21_rac.h .

#define _RAC_RFPATHEN1_PAENPA10DBM_enable 0x00000001UL

Mode enable for RAC_RFPATHEN1

Definition at line 3882 of file efr32bg21_rac.h .

#define _RAC_RFPATHEN1_PAENPA10DBM_MASK 0x40UL

Bit mask for RAC_PAENPA10DBM

Definition at line 3879 of file efr32bg21_rac.h .

#define _RAC_RFPATHEN1_PAENPA10DBM_SHIFT 6

Shift value for RAC_PAENPA10DBM

Definition at line 3878 of file efr32bg21_rac.h .

#define _RAC_RFPATHEN1_PAENPAPREDRV10DBM_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_RFPATHEN1

Definition at line 3889 of file efr32bg21_rac.h .

#define _RAC_RFPATHEN1_PAENPAPREDRV10DBM_disable 0x00000000UL

Mode disable for RAC_RFPATHEN1

Definition at line 3890 of file efr32bg21_rac.h .

#define _RAC_RFPATHEN1_PAENPAPREDRV10DBM_enable 0x00000001UL

Mode enable for RAC_RFPATHEN1

Definition at line 3891 of file efr32bg21_rac.h .

#define _RAC_RFPATHEN1_PAENPAPREDRV10DBM_MASK 0x80UL

Bit mask for RAC_PAENPAPREDRV10DBM

Definition at line 3888 of file efr32bg21_rac.h .

#define _RAC_RFPATHEN1_PAENPAPREDRV10DBM_SHIFT 7

Shift value for RAC_PAENPAPREDRV10DBM

Definition at line 3887 of file efr32bg21_rac.h .

#define _RAC_RFPATHEN1_RESETVALUE 0x00000004UL

Default value for RAC_RFPATHEN1

Definition at line 3821 of file efr32bg21_rac.h .

#define _RAC_RFPATHEN2_LNAMIXEN0DBMPA2_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_RFPATHEN2

Definition at line 3902 of file efr32bg21_rac.h .

#define _RAC_RFPATHEN2_LNAMIXEN0DBMPA2_disable 0x00000000UL

Mode disable for RAC_RFPATHEN2

Definition at line 3903 of file efr32bg21_rac.h .

#define _RAC_RFPATHEN2_LNAMIXEN0DBMPA2_enable 0x00000001UL

Mode enable for RAC_RFPATHEN2

Definition at line 3904 of file efr32bg21_rac.h .

#define _RAC_RFPATHEN2_LNAMIXEN0DBMPA2_MASK 0x1UL

Bit mask for RAC_LNAMIXEN0DBMPA2

Definition at line 3901 of file efr32bg21_rac.h .

#define _RAC_RFPATHEN2_LNAMIXEN0DBMPA2_SHIFT 0

Shift value for RAC_LNAMIXEN0DBMPA2

Definition at line 3900 of file efr32bg21_rac.h .

#define _RAC_RFPATHEN2_LNAMIXEN2_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_RFPATHEN2

Definition at line 3911 of file efr32bg21_rac.h .

#define _RAC_RFPATHEN2_LNAMIXEN2_disable 0x00000000UL

Mode disable for RAC_RFPATHEN2

Definition at line 3912 of file efr32bg21_rac.h .

#define _RAC_RFPATHEN2_LNAMIXEN2_enable 0x00000001UL

Mode enable for RAC_RFPATHEN2

Definition at line 3913 of file efr32bg21_rac.h .

#define _RAC_RFPATHEN2_LNAMIXEN2_MASK 0x2UL

Bit mask for RAC_LNAMIXEN2

Definition at line 3910 of file efr32bg21_rac.h .

#define _RAC_RFPATHEN2_LNAMIXEN2_SHIFT 1

Shift value for RAC_LNAMIXEN2

Definition at line 3909 of file efr32bg21_rac.h .

#define _RAC_RFPATHEN2_LNAMIXRFATTDCEN2_DEFAULT 0x00000001UL

Mode DEFAULT for RAC_RFPATHEN2

Definition at line 3920 of file efr32bg21_rac.h .

#define _RAC_RFPATHEN2_LNAMIXRFATTDCEN2_disable 0x00000000UL

Mode disable for RAC_RFPATHEN2

Definition at line 3921 of file efr32bg21_rac.h .

#define _RAC_RFPATHEN2_LNAMIXRFATTDCEN2_enable 0x00000001UL

Mode enable for RAC_RFPATHEN2

Definition at line 3922 of file efr32bg21_rac.h .

#define _RAC_RFPATHEN2_LNAMIXRFATTDCEN2_MASK 0x4UL

Bit mask for RAC_LNAMIXRFATTDCEN2

Definition at line 3919 of file efr32bg21_rac.h .

#define _RAC_RFPATHEN2_LNAMIXRFATTDCEN2_SHIFT 2

Shift value for RAC_LNAMIXRFATTDCEN2

Definition at line 3918 of file efr32bg21_rac.h .

#define _RAC_RFPATHEN2_LNAMIXRFPKDENRF2_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_RFPATHEN2

Definition at line 3929 of file efr32bg21_rac.h .

#define _RAC_RFPATHEN2_LNAMIXRFPKDENRF2_disable 0x00000000UL

Mode disable for RAC_RFPATHEN2

Definition at line 3930 of file efr32bg21_rac.h .

#define _RAC_RFPATHEN2_LNAMIXRFPKDENRF2_enable_path2 0x00000001UL

Mode enable_path2 for RAC_RFPATHEN2

Definition at line 3931 of file efr32bg21_rac.h .

#define _RAC_RFPATHEN2_LNAMIXRFPKDENRF2_MASK 0x8UL

Bit mask for RAC_LNAMIXRFPKDENRF2

Definition at line 3928 of file efr32bg21_rac.h .

#define _RAC_RFPATHEN2_LNAMIXRFPKDENRF2_SHIFT 3

Shift value for RAC_LNAMIXRFPKDENRF2

Definition at line 3927 of file efr32bg21_rac.h .

#define _RAC_RFPATHEN2_LNAMIXTRSW2_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_RFPATHEN2

Definition at line 3938 of file efr32bg21_rac.h .

#define _RAC_RFPATHEN2_LNAMIXTRSW2_disable 0x00000000UL

Mode disable for RAC_RFPATHEN2

Definition at line 3939 of file efr32bg21_rac.h .

#define _RAC_RFPATHEN2_LNAMIXTRSW2_enable 0x00000001UL

Mode enable for RAC_RFPATHEN2

Definition at line 3940 of file efr32bg21_rac.h .

#define _RAC_RFPATHEN2_LNAMIXTRSW2_MASK 0x10UL

Bit mask for RAC_LNAMIXTRSW2

Definition at line 3937 of file efr32bg21_rac.h .

#define _RAC_RFPATHEN2_LNAMIXTRSW2_SHIFT 4

Shift value for RAC_LNAMIXTRSW2

Definition at line 3936 of file efr32bg21_rac.h .

#define _RAC_RFPATHEN2_MASK 0x000000FFUL

Mask for RAC_RFPATHEN2

Definition at line 3898 of file efr32bg21_rac.h .

#define _RAC_RFPATHEN2_PAENANT2_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_RFPATHEN2

Definition at line 3947 of file efr32bg21_rac.h .

#define _RAC_RFPATHEN2_PAENANT2_disable 0x00000000UL

Mode disable for RAC_RFPATHEN2

Definition at line 3948 of file efr32bg21_rac.h .

#define _RAC_RFPATHEN2_PAENANT2_enable 0x00000001UL

Mode enable for RAC_RFPATHEN2

Definition at line 3949 of file efr32bg21_rac.h .

#define _RAC_RFPATHEN2_PAENANT2_MASK 0x20UL

Bit mask for RAC_PAENANT2

Definition at line 3946 of file efr32bg21_rac.h .

#define _RAC_RFPATHEN2_PAENANT2_SHIFT 5

Shift value for RAC_PAENANT2

Definition at line 3945 of file efr32bg21_rac.h .

#define _RAC_RFPATHEN2_PAENPA20DBM_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_RFPATHEN2

Definition at line 3956 of file efr32bg21_rac.h .

#define _RAC_RFPATHEN2_PAENPA20DBM_disable 0x00000000UL

Mode disable for RAC_RFPATHEN2

Definition at line 3957 of file efr32bg21_rac.h .

#define _RAC_RFPATHEN2_PAENPA20DBM_enable 0x00000001UL

Mode enable for RAC_RFPATHEN2

Definition at line 3958 of file efr32bg21_rac.h .

#define _RAC_RFPATHEN2_PAENPA20DBM_MASK 0x40UL

Bit mask for RAC_PAENPA20DBM

Definition at line 3955 of file efr32bg21_rac.h .

#define _RAC_RFPATHEN2_PAENPA20DBM_SHIFT 6

Shift value for RAC_PAENPA20DBM

Definition at line 3954 of file efr32bg21_rac.h .

#define _RAC_RFPATHEN2_PAENPAPREDRV20DBM_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_RFPATHEN2

Definition at line 3965 of file efr32bg21_rac.h .

#define _RAC_RFPATHEN2_PAENPAPREDRV20DBM_disable 0x00000000UL

Mode disable for RAC_RFPATHEN2

Definition at line 3966 of file efr32bg21_rac.h .

#define _RAC_RFPATHEN2_PAENPAPREDRV20DBM_enable 0x00000001UL

Mode enable for RAC_RFPATHEN2

Definition at line 3967 of file efr32bg21_rac.h .

#define _RAC_RFPATHEN2_PAENPAPREDRV20DBM_MASK 0x80UL

Bit mask for RAC_PAENPAPREDRV20DBM

Definition at line 3964 of file efr32bg21_rac.h .

#define _RAC_RFPATHEN2_PAENPAPREDRV20DBM_SHIFT 7

Shift value for RAC_PAENPAPREDRV20DBM

Definition at line 3963 of file efr32bg21_rac.h .

#define _RAC_RFPATHEN2_RESETVALUE 0x00000004UL

Default value for RAC_RFPATHEN2

Definition at line 3897 of file efr32bg21_rac.h .

#define _RAC_RX_IFADCCAPRESET_cap_reset_disable 0x00000000UL

Mode cap_reset_disable for RAC_RX

Definition at line 3979 of file efr32bg21_rac.h .

#define _RAC_RX_IFADCCAPRESET_cap_reset_enable 0x00000001UL

Mode cap_reset_enable for RAC_RX

Definition at line 3980 of file efr32bg21_rac.h .

#define _RAC_RX_IFADCCAPRESET_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_RX

Definition at line 3978 of file efr32bg21_rac.h .

#define _RAC_RX_IFADCCAPRESET_MASK 0x1UL

Bit mask for RAC_IFADCCAPRESET

Definition at line 3977 of file efr32bg21_rac.h .

#define _RAC_RX_IFADCCAPRESET_SHIFT 0

Shift value for RAC_IFADCCAPRESET

Definition at line 3976 of file efr32bg21_rac.h .

#define _RAC_RX_IFADCENLDOSERIES_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_RX

Definition at line 3987 of file efr32bg21_rac.h .

#define _RAC_RX_IFADCENLDOSERIES_MASK 0x2UL

Bit mask for RAC_IFADCENLDOSERIES

Definition at line 3986 of file efr32bg21_rac.h .

#define _RAC_RX_IFADCENLDOSERIES_series_ldo_disable 0x00000000UL

Mode series_ldo_disable for RAC_RX

Definition at line 3988 of file efr32bg21_rac.h .

#define _RAC_RX_IFADCENLDOSERIES_series_ldo_enable 0x00000001UL

Mode series_ldo_enable for RAC_RX

Definition at line 3989 of file efr32bg21_rac.h .

#define _RAC_RX_IFADCENLDOSERIES_SHIFT 1

Shift value for RAC_IFADCENLDOSERIES

Definition at line 3985 of file efr32bg21_rac.h .

#define _RAC_RX_IFADCENLDOSHUNT_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_RX

Definition at line 3996 of file efr32bg21_rac.h .

#define _RAC_RX_IFADCENLDOSHUNT_MASK 0x4UL

Bit mask for RAC_IFADCENLDOSHUNT

Definition at line 3995 of file efr32bg21_rac.h .

#define _RAC_RX_IFADCENLDOSHUNT_SHIFT 2

Shift value for RAC_IFADCENLDOSHUNT

Definition at line 3994 of file efr32bg21_rac.h .

#define _RAC_RX_IFADCENLDOSHUNT_shunt_ldo_disable 0x00000000UL

Mode shunt_ldo_disable for RAC_RX

Definition at line 3997 of file efr32bg21_rac.h .

#define _RAC_RX_IFADCENLDOSHUNT_shunt_ldo_enable 0x00000001UL

Mode shunt_ldo_enable for RAC_RX

Definition at line 3998 of file efr32bg21_rac.h .

#define _RAC_RX_LNAMIXENRFPKD_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_RX

Definition at line 4005 of file efr32bg21_rac.h .

#define _RAC_RX_LNAMIXENRFPKD_disable 0x00000000UL

Mode disable for RAC_RX

Definition at line 4006 of file efr32bg21_rac.h .

#define _RAC_RX_LNAMIXENRFPKD_enable 0x00000001UL

Mode enable for RAC_RX

Definition at line 4007 of file efr32bg21_rac.h .

#define _RAC_RX_LNAMIXENRFPKD_MASK 0x8UL

Bit mask for RAC_LNAMIXENRFPKD

Definition at line 4004 of file efr32bg21_rac.h .

#define _RAC_RX_LNAMIXENRFPKD_SHIFT 3

Shift value for RAC_LNAMIXENRFPKD

Definition at line 4003 of file efr32bg21_rac.h .

#define _RAC_RX_LNAMIXLDOLOWCUR_DEFAULT 0x00000001UL

Mode DEFAULT for RAC_RX

Definition at line 4014 of file efr32bg21_rac.h .

#define _RAC_RX_LNAMIXLDOLOWCUR_low_current_mode 0x00000001UL

Mode low_current_mode for RAC_RX

Definition at line 4016 of file efr32bg21_rac.h .

#define _RAC_RX_LNAMIXLDOLOWCUR_MASK 0x10UL

Bit mask for RAC_LNAMIXLDOLOWCUR

Definition at line 4013 of file efr32bg21_rac.h .

#define _RAC_RX_LNAMIXLDOLOWCUR_regular_mode 0x00000000UL

Mode regular_mode for RAC_RX

Definition at line 4015 of file efr32bg21_rac.h .

#define _RAC_RX_LNAMIXLDOLOWCUR_SHIFT 4

Shift value for RAC_LNAMIXLDOLOWCUR

Definition at line 4012 of file efr32bg21_rac.h .

#define _RAC_RX_LNAMIXREGLOADEN_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_RX

Definition at line 4023 of file efr32bg21_rac.h .

#define _RAC_RX_LNAMIXREGLOADEN_disable_resistor 0x00000000UL

Mode disable_resistor for RAC_RX

Definition at line 4024 of file efr32bg21_rac.h .

#define _RAC_RX_LNAMIXREGLOADEN_enable_resistor 0x00000001UL

Mode enable_resistor for RAC_RX

Definition at line 4025 of file efr32bg21_rac.h .

#define _RAC_RX_LNAMIXREGLOADEN_MASK 0x20UL

Bit mask for RAC_LNAMIXREGLOADEN

Definition at line 4022 of file efr32bg21_rac.h .

#define _RAC_RX_LNAMIXREGLOADEN_SHIFT 5

Shift value for RAC_LNAMIXREGLOADEN

Definition at line 4021 of file efr32bg21_rac.h .

#define _RAC_RX_MASK 0x00003FFFUL

Mask for RAC_RX

Definition at line 3974 of file efr32bg21_rac.h .

#define _RAC_RX_PGAENLDO_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_RX

Definition at line 4032 of file efr32bg21_rac.h .

#define _RAC_RX_PGAENLDO_disable_ldo 0x00000000UL

Mode disable_ldo for RAC_RX

Definition at line 4033 of file efr32bg21_rac.h .

#define _RAC_RX_PGAENLDO_enable_ldo 0x00000001UL

Mode enable_ldo for RAC_RX

Definition at line 4034 of file efr32bg21_rac.h .

#define _RAC_RX_PGAENLDO_MASK 0x40UL

Bit mask for RAC_PGAENLDO

Definition at line 4031 of file efr32bg21_rac.h .

#define _RAC_RX_PGAENLDO_SHIFT 6

Shift value for RAC_PGAENLDO

Definition at line 4030 of file efr32bg21_rac.h .

#define _RAC_RX_RESETVALUE 0x00000410UL

Default value for RAC_RX

Definition at line 3973 of file efr32bg21_rac.h .

#define _RAC_RX_SYCHPBIASTRIMBUF_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_RX

Definition at line 4041 of file efr32bg21_rac.h .

#define _RAC_RX_SYCHPBIASTRIMBUF_i_tail_10u 0x00000000UL

Mode i_tail_10u for RAC_RX

Definition at line 4042 of file efr32bg21_rac.h .

#define _RAC_RX_SYCHPBIASTRIMBUF_i_tail_20u 0x00000001UL

Mode i_tail_20u for RAC_RX

Definition at line 4043 of file efr32bg21_rac.h .

#define _RAC_RX_SYCHPBIASTRIMBUF_MASK 0x80UL

Bit mask for RAC_SYCHPBIASTRIMBUF

Definition at line 4040 of file efr32bg21_rac.h .

#define _RAC_RX_SYCHPBIASTRIMBUF_SHIFT 7

Shift value for RAC_SYCHPBIASTRIMBUF

Definition at line 4039 of file efr32bg21_rac.h .

#define _RAC_RX_SYCHPQNC3EN_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_RX

Definition at line 4050 of file efr32bg21_rac.h .

#define _RAC_RX_SYCHPQNC3EN_MASK 0x100UL

Bit mask for RAC_SYCHPQNC3EN

Definition at line 4049 of file efr32bg21_rac.h .

#define _RAC_RX_SYCHPQNC3EN_qnc_2 0x00000000UL

Mode qnc_2 for RAC_RX

Definition at line 4051 of file efr32bg21_rac.h .

#define _RAC_RX_SYCHPQNC3EN_qnc_3 0x00000001UL

Mode qnc_3 for RAC_RX

Definition at line 4052 of file efr32bg21_rac.h .

#define _RAC_RX_SYCHPQNC3EN_SHIFT 8

Shift value for RAC_SYCHPQNC3EN

Definition at line 4048 of file efr32bg21_rac.h .

#define _RAC_RX_SYMMDMODE_DEFAULT 0x00000002UL

Mode DEFAULT for RAC_RX

Definition at line 4058 of file efr32bg21_rac.h .

#define _RAC_RX_SYMMDMODE_MASK 0xE00UL

Bit mask for RAC_SYMMDMODE

Definition at line 4057 of file efr32bg21_rac.h .

#define _RAC_RX_SYMMDMODE_notuse_5 0x00000005UL

Mode notuse_5 for RAC_RX

Definition at line 4064 of file efr32bg21_rac.h .

#define _RAC_RX_SYMMDMODE_notuse_6 0x00000006UL

Mode notuse_6 for RAC_RX

Definition at line 4065 of file efr32bg21_rac.h .

#define _RAC_RX_SYMMDMODE_notuse_7 0x00000007UL

Mode notuse_7 for RAC_RX

Definition at line 4066 of file efr32bg21_rac.h .

#define _RAC_RX_SYMMDMODE_qnc_dsm2 0x00000002UL

Mode qnc_dsm2 for RAC_RX

Definition at line 4061 of file efr32bg21_rac.h .

#define _RAC_RX_SYMMDMODE_qnc_dsm3 0x00000003UL

Mode qnc_dsm3 for RAC_RX

Definition at line 4062 of file efr32bg21_rac.h .

#define _RAC_RX_SYMMDMODE_rx_w_swctrl 0x00000000UL

Mode rx_w_swctrl for RAC_RX

Definition at line 4059 of file efr32bg21_rac.h .

#define _RAC_RX_SYMMDMODE_rx_wo_swctrl 0x00000001UL

Mode rx_wo_swctrl for RAC_RX

Definition at line 4060 of file efr32bg21_rac.h .

#define _RAC_RX_SYMMDMODE_rxlp_wo_swctrl 0x00000004UL

Mode rxlp_wo_swctrl for RAC_RX

Definition at line 4063 of file efr32bg21_rac.h .

#define _RAC_RX_SYMMDMODE_SHIFT 9

Shift value for RAC_SYMMDMODE

Definition at line 4056 of file efr32bg21_rac.h .

#define _RAC_RX_SYPFDCHPLPEN_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_RX

Definition at line 4079 of file efr32bg21_rac.h .

#define _RAC_RX_SYPFDCHPLPEN_disable 0x00000000UL

Mode disable for RAC_RX

Definition at line 4080 of file efr32bg21_rac.h .

#define _RAC_RX_SYPFDCHPLPEN_enable 0x00000001UL

Mode enable for RAC_RX

Definition at line 4081 of file efr32bg21_rac.h .

#define _RAC_RX_SYPFDCHPLPEN_MASK 0x1000UL

Bit mask for RAC_SYPFDCHPLPEN

Definition at line 4078 of file efr32bg21_rac.h .

#define _RAC_RX_SYPFDCHPLPEN_SHIFT 12

Shift value for RAC_SYPFDCHPLPEN

Definition at line 4077 of file efr32bg21_rac.h .

#define _RAC_RX_SYPFDFPWEN_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_RX

Definition at line 4088 of file efr32bg21_rac.h .

#define _RAC_RX_SYPFDFPWEN_disable 0x00000000UL

Mode disable for RAC_RX

Definition at line 4089 of file efr32bg21_rac.h .

#define _RAC_RX_SYPFDFPWEN_enable 0x00000001UL

Mode enable for RAC_RX

Definition at line 4090 of file efr32bg21_rac.h .

#define _RAC_RX_SYPFDFPWEN_MASK 0x2000UL

Bit mask for RAC_SYPFDFPWEN

Definition at line 4087 of file efr32bg21_rac.h .

#define _RAC_RX_SYPFDFPWEN_SHIFT 13

Shift value for RAC_SYPFDFPWEN

Definition at line 4086 of file efr32bg21_rac.h .

#define _RAC_RXENSRCEN_CHANNELBUSYEN_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_RXENSRCEN

Definition at line 505 of file efr32bg21_rac.h .

#define _RAC_RXENSRCEN_CHANNELBUSYEN_MASK 0x100UL

Bit mask for RAC_CHANNELBUSYEN

Definition at line 504 of file efr32bg21_rac.h .

#define _RAC_RXENSRCEN_CHANNELBUSYEN_SHIFT 8

Shift value for RAC_CHANNELBUSYEN

Definition at line 503 of file efr32bg21_rac.h .

#define _RAC_RXENSRCEN_DEMODRXREQEN_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_RXENSRCEN

Definition at line 525 of file efr32bg21_rac.h .

#define _RAC_RXENSRCEN_DEMODRXREQEN_MASK 0x1000UL

Bit mask for RAC_DEMODRXREQEN

Definition at line 524 of file efr32bg21_rac.h .

#define _RAC_RXENSRCEN_DEMODRXREQEN_SHIFT 12

Shift value for RAC_DEMODRXREQEN

Definition at line 523 of file efr32bg21_rac.h .

#define _RAC_RXENSRCEN_FRAMEDETEN_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_RXENSRCEN

Definition at line 520 of file efr32bg21_rac.h .

#define _RAC_RXENSRCEN_FRAMEDETEN_MASK 0x800UL

Bit mask for RAC_FRAMEDETEN

Definition at line 519 of file efr32bg21_rac.h .

#define _RAC_RXENSRCEN_FRAMEDETEN_SHIFT 11

Shift value for RAC_FRAMEDETEN

Definition at line 518 of file efr32bg21_rac.h .

#define _RAC_RXENSRCEN_MASK 0x00003FFFUL

Mask for RAC_RXENSRCEN

Definition at line 497 of file efr32bg21_rac.h .

#define _RAC_RXENSRCEN_PREDETEN_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_RXENSRCEN

Definition at line 515 of file efr32bg21_rac.h .

#define _RAC_RXENSRCEN_PREDETEN_MASK 0x400UL

Bit mask for RAC_PREDETEN

Definition at line 514 of file efr32bg21_rac.h .

#define _RAC_RXENSRCEN_PREDETEN_SHIFT 10

Shift value for RAC_PREDETEN

Definition at line 513 of file efr32bg21_rac.h .

#define _RAC_RXENSRCEN_PRSRXEN_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_RXENSRCEN

Definition at line 530 of file efr32bg21_rac.h .

#define _RAC_RXENSRCEN_PRSRXEN_MASK 0x2000UL

Bit mask for RAC_PRSRXEN

Definition at line 529 of file efr32bg21_rac.h .

#define _RAC_RXENSRCEN_PRSRXEN_SHIFT 13

Shift value for RAC_PRSRXEN

Definition at line 528 of file efr32bg21_rac.h .

#define _RAC_RXENSRCEN_RESETVALUE 0x00000000UL

Default value for RAC_RXENSRCEN

Definition at line 496 of file efr32bg21_rac.h .

#define _RAC_RXENSRCEN_SWRXEN_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_RXENSRCEN

Definition at line 500 of file efr32bg21_rac.h .

#define _RAC_RXENSRCEN_SWRXEN_MASK 0xFFUL

Bit mask for RAC_SWRXEN

Definition at line 499 of file efr32bg21_rac.h .

#define _RAC_RXENSRCEN_SWRXEN_SHIFT 0

Shift value for RAC_SWRXEN

Definition at line 498 of file efr32bg21_rac.h .

#define _RAC_RXENSRCEN_TIMDETEN_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_RXENSRCEN

Definition at line 510 of file efr32bg21_rac.h .

#define _RAC_RXENSRCEN_TIMDETEN_MASK 0x200UL

Bit mask for RAC_TIMDETEN

Definition at line 509 of file efr32bg21_rac.h .

#define _RAC_RXENSRCEN_TIMDETEN_SHIFT 9

Shift value for RAC_TIMDETEN

Definition at line 508 of file efr32bg21_rac.h .

#define _RAC_SCRATCH0_MASK 0xFFFFFFFFUL

Mask for RAC_SCRATCH0

Definition at line 4979 of file efr32bg21_rac.h .

#define _RAC_SCRATCH0_RESETVALUE 0x00000000UL

Default value for RAC_SCRATCH0

Definition at line 4978 of file efr32bg21_rac.h .

#define _RAC_SCRATCH0_SCRATCH0_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_SCRATCH0

Definition at line 4982 of file efr32bg21_rac.h .

#define _RAC_SCRATCH0_SCRATCH0_MASK 0xFFFFFFFFUL

Bit mask for RAC_SCRATCH0

Definition at line 4981 of file efr32bg21_rac.h .

#define _RAC_SCRATCH0_SCRATCH0_SHIFT 0

Shift value for RAC_SCRATCH0

Definition at line 4980 of file efr32bg21_rac.h .

#define _RAC_SCRATCH1_MASK 0xFFFFFFFFUL

Mask for RAC_SCRATCH1

Definition at line 4987 of file efr32bg21_rac.h .

#define _RAC_SCRATCH1_RESETVALUE 0x00000000UL

Default value for RAC_SCRATCH1

Definition at line 4986 of file efr32bg21_rac.h .

#define _RAC_SCRATCH1_SCRATCH1_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_SCRATCH1

Definition at line 4990 of file efr32bg21_rac.h .

#define _RAC_SCRATCH1_SCRATCH1_MASK 0xFFFFFFFFUL

Bit mask for RAC_SCRATCH1

Definition at line 4989 of file efr32bg21_rac.h .

#define _RAC_SCRATCH1_SCRATCH1_SHIFT 0

Shift value for RAC_SCRATCH1

Definition at line 4988 of file efr32bg21_rac.h .

#define _RAC_SCRATCH2_MASK 0xFFFFFFFFUL

Mask for RAC_SCRATCH2

Definition at line 4995 of file efr32bg21_rac.h .

#define _RAC_SCRATCH2_RESETVALUE 0x00000000UL

Default value for RAC_SCRATCH2

Definition at line 4994 of file efr32bg21_rac.h .

#define _RAC_SCRATCH2_SCRATCH2_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_SCRATCH2

Definition at line 4998 of file efr32bg21_rac.h .

#define _RAC_SCRATCH2_SCRATCH2_MASK 0xFFFFFFFFUL

Bit mask for RAC_SCRATCH2

Definition at line 4997 of file efr32bg21_rac.h .

#define _RAC_SCRATCH2_SCRATCH2_SHIFT 0

Shift value for RAC_SCRATCH2

Definition at line 4996 of file efr32bg21_rac.h .

#define _RAC_SCRATCH3_MASK 0xFFFFFFFFUL

Mask for RAC_SCRATCH3

Definition at line 5003 of file efr32bg21_rac.h .

#define _RAC_SCRATCH3_RESETVALUE 0x00000000UL

Default value for RAC_SCRATCH3

Definition at line 5002 of file efr32bg21_rac.h .

#define _RAC_SCRATCH3_SCRATCH3_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_SCRATCH3

Definition at line 5006 of file efr32bg21_rac.h .

#define _RAC_SCRATCH3_SCRATCH3_MASK 0xFFFFFFFFUL

Bit mask for RAC_SCRATCH3

Definition at line 5005 of file efr32bg21_rac.h .

#define _RAC_SCRATCH3_SCRATCH3_SHIFT 0

Shift value for RAC_SCRATCH3

Definition at line 5004 of file efr32bg21_rac.h .

#define _RAC_SCRATCH4_MASK 0xFFFFFFFFUL

Mask for RAC_SCRATCH4

Definition at line 5011 of file efr32bg21_rac.h .

#define _RAC_SCRATCH4_RESETVALUE 0x00000000UL

Default value for RAC_SCRATCH4

Definition at line 5010 of file efr32bg21_rac.h .

#define _RAC_SCRATCH4_SCRATCH4_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_SCRATCH4

Definition at line 5014 of file efr32bg21_rac.h .

#define _RAC_SCRATCH4_SCRATCH4_MASK 0xFFFFFFFFUL

Bit mask for RAC_SCRATCH4

Definition at line 5013 of file efr32bg21_rac.h .

#define _RAC_SCRATCH4_SCRATCH4_SHIFT 0

Shift value for RAC_SCRATCH4

Definition at line 5012 of file efr32bg21_rac.h .

#define _RAC_SCRATCH5_MASK 0xFFFFFFFFUL

Mask for RAC_SCRATCH5

Definition at line 5019 of file efr32bg21_rac.h .

#define _RAC_SCRATCH5_RESETVALUE 0x00000000UL

Default value for RAC_SCRATCH5

Definition at line 5018 of file efr32bg21_rac.h .

#define _RAC_SCRATCH5_SCRATCH5_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_SCRATCH5

Definition at line 5022 of file efr32bg21_rac.h .

#define _RAC_SCRATCH5_SCRATCH5_MASK 0xFFFFFFFFUL

Bit mask for RAC_SCRATCH5

Definition at line 5021 of file efr32bg21_rac.h .

#define _RAC_SCRATCH5_SCRATCH5_SHIFT 0

Shift value for RAC_SCRATCH5

Definition at line 5020 of file efr32bg21_rac.h .

#define _RAC_SCRATCH6_MASK 0xFFFFFFFFUL

Mask for RAC_SCRATCH6

Definition at line 5027 of file efr32bg21_rac.h .

#define _RAC_SCRATCH6_RESETVALUE 0x00000000UL

Default value for RAC_SCRATCH6

Definition at line 5026 of file efr32bg21_rac.h .

#define _RAC_SCRATCH6_SCRATCH6_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_SCRATCH6

Definition at line 5030 of file efr32bg21_rac.h .

#define _RAC_SCRATCH6_SCRATCH6_MASK 0xFFFFFFFFUL

Bit mask for RAC_SCRATCH6

Definition at line 5029 of file efr32bg21_rac.h .

#define _RAC_SCRATCH6_SCRATCH6_SHIFT 0

Shift value for RAC_SCRATCH6

Definition at line 5028 of file efr32bg21_rac.h .

#define _RAC_SCRATCH7_MASK 0xFFFFFFFFUL

Mask for RAC_SCRATCH7

Definition at line 5035 of file efr32bg21_rac.h .

#define _RAC_SCRATCH7_RESETVALUE 0x00000000UL

Default value for RAC_SCRATCH7

Definition at line 5034 of file efr32bg21_rac.h .

#define _RAC_SCRATCH7_SCRATCH7_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_SCRATCH7

Definition at line 5038 of file efr32bg21_rac.h .

#define _RAC_SCRATCH7_SCRATCH7_MASK 0xFFFFFFFFUL

Bit mask for RAC_SCRATCH7

Definition at line 5037 of file efr32bg21_rac.h .

#define _RAC_SCRATCH7_SCRATCH7_SHIFT 0

Shift value for RAC_SCRATCH7

Definition at line 5036 of file efr32bg21_rac.h .

#define _RAC_SEQCMD_ABORT_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_SEQCMD

Definition at line 962 of file efr32bg21_rac.h .

#define _RAC_SEQCMD_ABORT_MASK 0x20UL

Bit mask for RAC_ABORT

Definition at line 961 of file efr32bg21_rac.h .

#define _RAC_SEQCMD_ABORT_SHIFT 5

Shift value for RAC_ABORT

Definition at line 960 of file efr32bg21_rac.h .

#define _RAC_SEQCMD_ABORTENCLEAR_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_SEQCMD

Definition at line 972 of file efr32bg21_rac.h .

#define _RAC_SEQCMD_ABORTENCLEAR_MASK 0x80UL

Bit mask for RAC_ABORTENCLEAR

Definition at line 971 of file efr32bg21_rac.h .

#define _RAC_SEQCMD_ABORTENCLEAR_SHIFT 7

Shift value for RAC_ABORTENCLEAR

Definition at line 970 of file efr32bg21_rac.h .

#define _RAC_SEQCMD_ABORTENSET_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_SEQCMD

Definition at line 967 of file efr32bg21_rac.h .

#define _RAC_SEQCMD_ABORTENSET_MASK 0x40UL

Bit mask for RAC_ABORTENSET

Definition at line 966 of file efr32bg21_rac.h .

#define _RAC_SEQCMD_ABORTENSET_SHIFT 6

Shift value for RAC_ABORTENSET

Definition at line 965 of file efr32bg21_rac.h .

#define _RAC_SEQCMD_BKPTDIS_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_SEQCMD

Definition at line 957 of file efr32bg21_rac.h .

#define _RAC_SEQCMD_BKPTDIS_MASK 0x10UL

Bit mask for RAC_BKPTDIS

Definition at line 956 of file efr32bg21_rac.h .

#define _RAC_SEQCMD_BKPTDIS_SHIFT 4

Shift value for RAC_BKPTDIS

Definition at line 955 of file efr32bg21_rac.h .

#define _RAC_SEQCMD_BKPTEN_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_SEQCMD

Definition at line 952 of file efr32bg21_rac.h .

#define _RAC_SEQCMD_BKPTEN_MASK 0x8UL

Bit mask for RAC_BKPTEN

Definition at line 951 of file efr32bg21_rac.h .

#define _RAC_SEQCMD_BKPTEN_SHIFT 3

Shift value for RAC_BKPTEN

Definition at line 950 of file efr32bg21_rac.h .

#define _RAC_SEQCMD_HALT_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_SEQCMD

Definition at line 937 of file efr32bg21_rac.h .

#define _RAC_SEQCMD_HALT_MASK 0x1UL

Bit mask for RAC_HALT

Definition at line 936 of file efr32bg21_rac.h .

#define _RAC_SEQCMD_HALT_SHIFT 0

Shift value for RAC_HALT

Definition at line 935 of file efr32bg21_rac.h .

#define _RAC_SEQCMD_MASK 0x000000FFUL

Mask for RAC_SEQCMD

Definition at line 933 of file efr32bg21_rac.h .

#define _RAC_SEQCMD_RESETVALUE 0x00000000UL

Default value for RAC_SEQCMD

Definition at line 932 of file efr32bg21_rac.h .

#define _RAC_SEQCMD_RESUME_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_SEQCMD

Definition at line 947 of file efr32bg21_rac.h .

#define _RAC_SEQCMD_RESUME_MASK 0x4UL

Bit mask for RAC_RESUME

Definition at line 946 of file efr32bg21_rac.h .

#define _RAC_SEQCMD_RESUME_SHIFT 2

Shift value for RAC_RESUME

Definition at line 945 of file efr32bg21_rac.h .

#define _RAC_SEQCMD_STEP_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_SEQCMD

Definition at line 942 of file efr32bg21_rac.h .

#define _RAC_SEQCMD_STEP_MASK 0x2UL

Bit mask for RAC_STEP

Definition at line 941 of file efr32bg21_rac.h .

#define _RAC_SEQCMD_STEP_SHIFT 1

Shift value for RAC_STEP

Definition at line 940 of file efr32bg21_rac.h .

#define _RAC_SEQCTRL_COMPACT_CONTINUE 0x00000001UL

Mode CONTINUE for RAC_SEQCTRL

Definition at line 1136 of file efr32bg21_rac.h .

#define _RAC_SEQCTRL_COMPACT_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_SEQCTRL

Definition at line 1134 of file efr32bg21_rac.h .

#define _RAC_SEQCTRL_COMPACT_MASK 0x1UL

Bit mask for RAC_COMPACT

Definition at line 1133 of file efr32bg21_rac.h .

#define _RAC_SEQCTRL_COMPACT_SHIFT 0

Shift value for RAC_COMPACT

Definition at line 1132 of file efr32bg21_rac.h .

#define _RAC_SEQCTRL_COMPACT_WRAP 0x00000000UL

Mode WRAP for RAC_SEQCTRL

Definition at line 1135 of file efr32bg21_rac.h .

#define _RAC_SEQCTRL_COMPINVALMODE_COMPEVENT 0x00000002UL

Mode COMPEVENT for RAC_SEQCTRL

Definition at line 1145 of file efr32bg21_rac.h .

#define _RAC_SEQCTRL_COMPINVALMODE_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_SEQCTRL

Definition at line 1142 of file efr32bg21_rac.h .

#define _RAC_SEQCTRL_COMPINVALMODE_MASK 0x6UL

Bit mask for RAC_COMPINVALMODE

Definition at line 1141 of file efr32bg21_rac.h .

#define _RAC_SEQCTRL_COMPINVALMODE_NEVER 0x00000000UL

Mode NEVER for RAC_SEQCTRL

Definition at line 1143 of file efr32bg21_rac.h .

#define _RAC_SEQCTRL_COMPINVALMODE_SHIFT 1

Shift value for RAC_COMPINVALMODE

Definition at line 1140 of file efr32bg21_rac.h .

#define _RAC_SEQCTRL_COMPINVALMODE_STATECHANGE 0x00000001UL

Mode STATECHANGE for RAC_SEQCTRL

Definition at line 1144 of file efr32bg21_rac.h .

#define _RAC_SEQCTRL_COMPINVALMODE_STATECOMP 0x00000003UL

Mode STATECOMP for RAC_SEQCTRL

Definition at line 1146 of file efr32bg21_rac.h .

#define _RAC_SEQCTRL_CPUHALTREQEN_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_SEQCTRL

Definition at line 1164 of file efr32bg21_rac.h .

#define _RAC_SEQCTRL_CPUHALTREQEN_MASK 0x800UL

Bit mask for RAC_CPUHALTREQEN

Definition at line 1163 of file efr32bg21_rac.h .

#define _RAC_SEQCTRL_CPUHALTREQEN_SHIFT 11

Shift value for RAC_CPUHALTREQEN

Definition at line 1162 of file efr32bg21_rac.h .

#define _RAC_SEQCTRL_CPUHALTREQEN_X0 0x00000000UL

Mode X0 for RAC_SEQCTRL

Definition at line 1165 of file efr32bg21_rac.h .

#define _RAC_SEQCTRL_CPUHALTREQEN_X1 0x00000001UL

Mode X1 for RAC_SEQCTRL

Definition at line 1166 of file efr32bg21_rac.h .

#define _RAC_SEQCTRL_MASK 0x00001C07UL

Mask for RAC_SEQCTRL

Definition at line 1130 of file efr32bg21_rac.h .

#define _RAC_SEQCTRL_RESETVALUE 0x00000000UL

Default value for RAC_SEQCTRL

Definition at line 1129 of file efr32bg21_rac.h .

#define _RAC_SEQCTRL_SEQHALTUPONCPUHALTEN_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_SEQCTRL

Definition at line 1173 of file efr32bg21_rac.h .

#define _RAC_SEQCTRL_SEQHALTUPONCPUHALTEN_MASK 0x1000UL

Bit mask for RAC_SEQHALTUPONCPUHALTEN

Definition at line 1172 of file efr32bg21_rac.h .

#define _RAC_SEQCTRL_SEQHALTUPONCPUHALTEN_SHIFT 12

Shift value for RAC_SEQHALTUPONCPUHALTEN

Definition at line 1171 of file efr32bg21_rac.h .

#define _RAC_SEQCTRL_SEQHALTUPONCPUHALTEN_X0 0x00000000UL

Mode X0 for RAC_SEQCTRL

Definition at line 1174 of file efr32bg21_rac.h .

#define _RAC_SEQCTRL_SEQHALTUPONCPUHALTEN_X1 0x00000001UL

Mode X1 for RAC_SEQCTRL

Definition at line 1175 of file efr32bg21_rac.h .

#define _RAC_SEQCTRL_STIMERDEBUGRUN_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_SEQCTRL

Definition at line 1155 of file efr32bg21_rac.h .

#define _RAC_SEQCTRL_STIMERDEBUGRUN_MASK 0x400UL

Bit mask for RAC_STIMERDEBUGRUN

Definition at line 1154 of file efr32bg21_rac.h .

#define _RAC_SEQCTRL_STIMERDEBUGRUN_SHIFT 10

Shift value for RAC_STIMERDEBUGRUN

Definition at line 1153 of file efr32bg21_rac.h .

#define _RAC_SEQCTRL_STIMERDEBUGRUN_X0 0x00000000UL

Mode X0 for RAC_SEQCTRL

Definition at line 1156 of file efr32bg21_rac.h .

#define _RAC_SEQCTRL_STIMERDEBUGRUN_X1 0x00000001UL

Mode X1 for RAC_SEQCTRL

Definition at line 1157 of file efr32bg21_rac.h .

#define _RAC_SEQSTATUS_ABORTEN_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_SEQSTATUS

Definition at line 924 of file efr32bg21_rac.h .

#define _RAC_SEQSTATUS_ABORTEN_MASK 0x400UL

Bit mask for RAC_ABORTEN

Definition at line 923 of file efr32bg21_rac.h .

#define _RAC_SEQSTATUS_ABORTEN_SHIFT 10

Shift value for RAC_ABORTEN

Definition at line 922 of file efr32bg21_rac.h .

#define _RAC_SEQSTATUS_ABORTEN_X0 0x00000000UL

Mode X0 for RAC_SEQSTATUS

Definition at line 925 of file efr32bg21_rac.h .

#define _RAC_SEQSTATUS_ABORTEN_X1 0x00000001UL

Mode X1 for RAC_SEQSTATUS

Definition at line 926 of file efr32bg21_rac.h .

#define _RAC_SEQSTATUS_BKPT_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_SEQSTATUS

Definition at line 880 of file efr32bg21_rac.h .

#define _RAC_SEQSTATUS_BKPT_MASK 0x2UL

Bit mask for RAC_BKPT

Definition at line 879 of file efr32bg21_rac.h .

#define _RAC_SEQSTATUS_BKPT_SHIFT 1

Shift value for RAC_BKPT

Definition at line 878 of file efr32bg21_rac.h .

#define _RAC_SEQSTATUS_CARRY_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_SEQSTATUS

Definition at line 919 of file efr32bg21_rac.h .

#define _RAC_SEQSTATUS_CARRY_MASK 0x100UL

Bit mask for RAC_CARRY

Definition at line 918 of file efr32bg21_rac.h .

#define _RAC_SEQSTATUS_CARRY_SHIFT 8

Shift value for RAC_CARRY

Definition at line 917 of file efr32bg21_rac.h .

#define _RAC_SEQSTATUS_DONE_DEFAULT 0x00000001UL

Mode DEFAULT for RAC_SEQSTATUS

Definition at line 899 of file efr32bg21_rac.h .

#define _RAC_SEQSTATUS_DONE_MASK 0x10UL

Bit mask for RAC_DONE

Definition at line 898 of file efr32bg21_rac.h .

#define _RAC_SEQSTATUS_DONE_SHIFT 4

Shift value for RAC_DONE

Definition at line 897 of file efr32bg21_rac.h .

#define _RAC_SEQSTATUS_MASK 0x000005FFUL

Mask for RAC_SEQSTATUS

Definition at line 871 of file efr32bg21_rac.h .

#define _RAC_SEQSTATUS_NEG_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_SEQSTATUS

Definition at line 904 of file efr32bg21_rac.h .

#define _RAC_SEQSTATUS_NEG_MASK 0x20UL

Bit mask for RAC_NEG

Definition at line 903 of file efr32bg21_rac.h .

#define _RAC_SEQSTATUS_NEG_SHIFT 5

Shift value for RAC_NEG

Definition at line 902 of file efr32bg21_rac.h .

#define _RAC_SEQSTATUS_POS_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_SEQSTATUS

Definition at line 909 of file efr32bg21_rac.h .

#define _RAC_SEQSTATUS_POS_MASK 0x40UL

Bit mask for RAC_POS

Definition at line 908 of file efr32bg21_rac.h .

#define _RAC_SEQSTATUS_POS_SHIFT 6

Shift value for RAC_POS

Definition at line 907 of file efr32bg21_rac.h .

#define _RAC_SEQSTATUS_RESETVALUE 0x00000010UL

Default value for RAC_SEQSTATUS

Definition at line 870 of file efr32bg21_rac.h .

#define _RAC_SEQSTATUS_STOPPED_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_SEQSTATUS

Definition at line 875 of file efr32bg21_rac.h .

#define _RAC_SEQSTATUS_STOPPED_MASK 0x1UL

Bit mask for RAC_STOPPED

Definition at line 874 of file efr32bg21_rac.h .

#define _RAC_SEQSTATUS_STOPPED_SHIFT 0

Shift value for RAC_STOPPED

Definition at line 873 of file efr32bg21_rac.h .

#define _RAC_SEQSTATUS_WAITING_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_SEQSTATUS

Definition at line 885 of file efr32bg21_rac.h .

#define _RAC_SEQSTATUS_WAITING_MASK 0x4UL

Bit mask for RAC_WAITING

Definition at line 884 of file efr32bg21_rac.h .

#define _RAC_SEQSTATUS_WAITING_SHIFT 2

Shift value for RAC_WAITING

Definition at line 883 of file efr32bg21_rac.h .

#define _RAC_SEQSTATUS_WAITMODE_ALL 0x00000001UL

Mode ALL for RAC_SEQSTATUS

Definition at line 892 of file efr32bg21_rac.h .

#define _RAC_SEQSTATUS_WAITMODE_ANY 0x00000000UL

Mode ANY for RAC_SEQSTATUS

Definition at line 891 of file efr32bg21_rac.h .

#define _RAC_SEQSTATUS_WAITMODE_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_SEQSTATUS

Definition at line 890 of file efr32bg21_rac.h .

#define _RAC_SEQSTATUS_WAITMODE_MASK 0x8UL

Bit mask for RAC_WAITMODE

Definition at line 889 of file efr32bg21_rac.h .

#define _RAC_SEQSTATUS_WAITMODE_SHIFT 3

Shift value for RAC_WAITMODE

Definition at line 888 of file efr32bg21_rac.h .

#define _RAC_SEQSTATUS_ZERO_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_SEQSTATUS

Definition at line 914 of file efr32bg21_rac.h .

#define _RAC_SEQSTATUS_ZERO_MASK 0x80UL

Bit mask for RAC_ZERO

Definition at line 913 of file efr32bg21_rac.h .

#define _RAC_SEQSTATUS_ZERO_SHIFT 7

Shift value for RAC_ZERO

Definition at line 912 of file efr32bg21_rac.h .

#define _RAC_SR0_MASK 0xFFFFFFFFUL

Mask for RAC_SR0

Definition at line 1190 of file efr32bg21_rac.h .

#define _RAC_SR0_RESETVALUE 0x00000000UL

Default value for RAC_SR0

Definition at line 1189 of file efr32bg21_rac.h .

#define _RAC_SR0_SR0_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_SR0

Definition at line 1193 of file efr32bg21_rac.h .

#define _RAC_SR0_SR0_MASK 0xFFFFFFFFUL

Bit mask for RAC_SR0

Definition at line 1192 of file efr32bg21_rac.h .

#define _RAC_SR0_SR0_SHIFT 0

Shift value for RAC_SR0

Definition at line 1191 of file efr32bg21_rac.h .

#define _RAC_SR1_MASK 0xFFFFFFFFUL

Mask for RAC_SR1

Definition at line 1198 of file efr32bg21_rac.h .

#define _RAC_SR1_RESETVALUE 0x00000000UL

Default value for RAC_SR1

Definition at line 1197 of file efr32bg21_rac.h .

#define _RAC_SR1_SR1_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_SR1

Definition at line 1201 of file efr32bg21_rac.h .

#define _RAC_SR1_SR1_MASK 0xFFFFFFFFUL

Bit mask for RAC_SR1

Definition at line 1200 of file efr32bg21_rac.h .

#define _RAC_SR1_SR1_SHIFT 0

Shift value for RAC_SR1

Definition at line 1199 of file efr32bg21_rac.h .

#define _RAC_SR2_MASK 0xFFFFFFFFUL

Mask for RAC_SR2

Definition at line 1206 of file efr32bg21_rac.h .

#define _RAC_SR2_RESETVALUE 0x00000000UL

Default value for RAC_SR2

Definition at line 1205 of file efr32bg21_rac.h .

#define _RAC_SR2_SR2_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_SR2

Definition at line 1209 of file efr32bg21_rac.h .

#define _RAC_SR2_SR2_MASK 0xFFFFFFFFUL

Bit mask for RAC_SR2

Definition at line 1208 of file efr32bg21_rac.h .

#define _RAC_SR2_SR2_SHIFT 0

Shift value for RAC_SR2

Definition at line 1207 of file efr32bg21_rac.h .

#define _RAC_SR3_MASK 0xFFFFFFFFUL

Mask for RAC_SR3

Definition at line 1214 of file efr32bg21_rac.h .

#define _RAC_SR3_RESETVALUE 0x00000000UL

Default value for RAC_SR3

Definition at line 1213 of file efr32bg21_rac.h .

#define _RAC_SR3_SR3_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_SR3

Definition at line 1217 of file efr32bg21_rac.h .

#define _RAC_SR3_SR3_MASK 0xFFFFFFFFUL

Bit mask for RAC_SR3

Definition at line 1216 of file efr32bg21_rac.h .

#define _RAC_SR3_SR3_SHIFT 0

Shift value for RAC_SR3

Definition at line 1215 of file efr32bg21_rac.h .

#define _RAC_STATUS2_MASK 0x00000FFFUL

Mask for RAC_STATUS2

Definition at line 1322 of file efr32bg21_rac.h .

#define _RAC_STATUS2_PREVSTATE1_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_STATUS2

Definition at line 1325 of file efr32bg21_rac.h .

#define _RAC_STATUS2_PREVSTATE1_MASK 0xFUL

Bit mask for RAC_PREVSTATE1

Definition at line 1324 of file efr32bg21_rac.h .

#define _RAC_STATUS2_PREVSTATE1_OFF 0x00000000UL

Mode OFF for RAC_STATUS2

Definition at line 1326 of file efr32bg21_rac.h .

#define _RAC_STATUS2_PREVSTATE1_RX2RX 0x00000005UL

Mode RX2RX for RAC_STATUS2

Definition at line 1331 of file efr32bg21_rac.h .

#define _RAC_STATUS2_PREVSTATE1_RX2TX 0x00000007UL

Mode RX2TX for RAC_STATUS2

Definition at line 1333 of file efr32bg21_rac.h .

#define _RAC_STATUS2_PREVSTATE1_RXFRAME 0x00000003UL

Mode RXFRAME for RAC_STATUS2

Definition at line 1329 of file efr32bg21_rac.h .

#define _RAC_STATUS2_PREVSTATE1_RXOVERFLOW 0x00000006UL

Mode RXOVERFLOW for RAC_STATUS2

Definition at line 1332 of file efr32bg21_rac.h .

#define _RAC_STATUS2_PREVSTATE1_RXPD 0x00000004UL

Mode RXPD for RAC_STATUS2

Definition at line 1330 of file efr32bg21_rac.h .

#define _RAC_STATUS2_PREVSTATE1_RXSEARCH 0x00000002UL

Mode RXSEARCH for RAC_STATUS2

Definition at line 1328 of file efr32bg21_rac.h .

#define _RAC_STATUS2_PREVSTATE1_RXWARM 0x00000001UL

Mode RXWARM for RAC_STATUS2

Definition at line 1327 of file efr32bg21_rac.h .

#define _RAC_STATUS2_PREVSTATE1_SHIFT 0

Shift value for RAC_PREVSTATE1

Definition at line 1323 of file efr32bg21_rac.h .

#define _RAC_STATUS2_PREVSTATE1_SHUTDOWN 0x0000000DUL

Mode SHUTDOWN for RAC_STATUS2

Definition at line 1339 of file efr32bg21_rac.h .

#define _RAC_STATUS2_PREVSTATE1_TX 0x00000009UL

Mode TX for RAC_STATUS2

Definition at line 1335 of file efr32bg21_rac.h .

#define _RAC_STATUS2_PREVSTATE1_TX2RX 0x0000000BUL

Mode TX2RX for RAC_STATUS2

Definition at line 1337 of file efr32bg21_rac.h .

#define _RAC_STATUS2_PREVSTATE1_TX2TX 0x0000000CUL

Mode TX2TX for RAC_STATUS2

Definition at line 1338 of file efr32bg21_rac.h .

#define _RAC_STATUS2_PREVSTATE1_TXPD 0x0000000AUL

Mode TXPD for RAC_STATUS2

Definition at line 1336 of file efr32bg21_rac.h .

#define _RAC_STATUS2_PREVSTATE1_TXWARM 0x00000008UL

Mode TXWARM for RAC_STATUS2

Definition at line 1334 of file efr32bg21_rac.h .

#define _RAC_STATUS2_PREVSTATE2_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_STATUS2

Definition at line 1357 of file efr32bg21_rac.h .

#define _RAC_STATUS2_PREVSTATE2_MASK 0xF0UL

Bit mask for RAC_PREVSTATE2

Definition at line 1356 of file efr32bg21_rac.h .

#define _RAC_STATUS2_PREVSTATE2_OFF 0x00000000UL

Mode OFF for RAC_STATUS2

Definition at line 1358 of file efr32bg21_rac.h .

#define _RAC_STATUS2_PREVSTATE2_RX2RX 0x00000005UL

Mode RX2RX for RAC_STATUS2

Definition at line 1363 of file efr32bg21_rac.h .

#define _RAC_STATUS2_PREVSTATE2_RX2TX 0x00000007UL

Mode RX2TX for RAC_STATUS2

Definition at line 1365 of file efr32bg21_rac.h .

#define _RAC_STATUS2_PREVSTATE2_RXFRAME 0x00000003UL

Mode RXFRAME for RAC_STATUS2

Definition at line 1361 of file efr32bg21_rac.h .

#define _RAC_STATUS2_PREVSTATE2_RXOVERFLOW 0x00000006UL

Mode RXOVERFLOW for RAC_STATUS2

Definition at line 1364 of file efr32bg21_rac.h .

#define _RAC_STATUS2_PREVSTATE2_RXPD 0x00000004UL

Mode RXPD for RAC_STATUS2

Definition at line 1362 of file efr32bg21_rac.h .

#define _RAC_STATUS2_PREVSTATE2_RXSEARCH 0x00000002UL

Mode RXSEARCH for RAC_STATUS2

Definition at line 1360 of file efr32bg21_rac.h .

#define _RAC_STATUS2_PREVSTATE2_RXWARM 0x00000001UL

Mode RXWARM for RAC_STATUS2

Definition at line 1359 of file efr32bg21_rac.h .

#define _RAC_STATUS2_PREVSTATE2_SHIFT 4

Shift value for RAC_PREVSTATE2

Definition at line 1355 of file efr32bg21_rac.h .

#define _RAC_STATUS2_PREVSTATE2_SHUTDOWN 0x0000000DUL

Mode SHUTDOWN for RAC_STATUS2

Definition at line 1371 of file efr32bg21_rac.h .

#define _RAC_STATUS2_PREVSTATE2_TX 0x00000009UL

Mode TX for RAC_STATUS2

Definition at line 1367 of file efr32bg21_rac.h .

#define _RAC_STATUS2_PREVSTATE2_TX2RX 0x0000000BUL

Mode TX2RX for RAC_STATUS2

Definition at line 1369 of file efr32bg21_rac.h .

#define _RAC_STATUS2_PREVSTATE2_TX2TX 0x0000000CUL

Mode TX2TX for RAC_STATUS2

Definition at line 1370 of file efr32bg21_rac.h .

#define _RAC_STATUS2_PREVSTATE2_TXPD 0x0000000AUL

Mode TXPD for RAC_STATUS2

Definition at line 1368 of file efr32bg21_rac.h .

#define _RAC_STATUS2_PREVSTATE2_TXWARM 0x00000008UL

Mode TXWARM for RAC_STATUS2

Definition at line 1366 of file efr32bg21_rac.h .

#define _RAC_STATUS2_PREVSTATE3_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_STATUS2

Definition at line 1389 of file efr32bg21_rac.h .

#define _RAC_STATUS2_PREVSTATE3_MASK 0xF00UL

Bit mask for RAC_PREVSTATE3

Definition at line 1388 of file efr32bg21_rac.h .

#define _RAC_STATUS2_PREVSTATE3_OFF 0x00000000UL

Mode OFF for RAC_STATUS2

Definition at line 1390 of file efr32bg21_rac.h .

#define _RAC_STATUS2_PREVSTATE3_RX2RX 0x00000005UL

Mode RX2RX for RAC_STATUS2

Definition at line 1395 of file efr32bg21_rac.h .

#define _RAC_STATUS2_PREVSTATE3_RX2TX 0x00000007UL

Mode RX2TX for RAC_STATUS2

Definition at line 1397 of file efr32bg21_rac.h .

#define _RAC_STATUS2_PREVSTATE3_RXFRAME 0x00000003UL

Mode RXFRAME for RAC_STATUS2

Definition at line 1393 of file efr32bg21_rac.h .

#define _RAC_STATUS2_PREVSTATE3_RXOVERFLOW 0x00000006UL

Mode RXOVERFLOW for RAC_STATUS2

Definition at line 1396 of file efr32bg21_rac.h .

#define _RAC_STATUS2_PREVSTATE3_RXPD 0x00000004UL

Mode RXPD for RAC_STATUS2

Definition at line 1394 of file efr32bg21_rac.h .

#define _RAC_STATUS2_PREVSTATE3_RXSEARCH 0x00000002UL

Mode RXSEARCH for RAC_STATUS2

Definition at line 1392 of file efr32bg21_rac.h .

#define _RAC_STATUS2_PREVSTATE3_RXWARM 0x00000001UL

Mode RXWARM for RAC_STATUS2

Definition at line 1391 of file efr32bg21_rac.h .

#define _RAC_STATUS2_PREVSTATE3_SHIFT 8

Shift value for RAC_PREVSTATE3

Definition at line 1387 of file efr32bg21_rac.h .

#define _RAC_STATUS2_PREVSTATE3_SHUTDOWN 0x0000000DUL

Mode SHUTDOWN for RAC_STATUS2

Definition at line 1403 of file efr32bg21_rac.h .

#define _RAC_STATUS2_PREVSTATE3_TX 0x00000009UL

Mode TX for RAC_STATUS2

Definition at line 1399 of file efr32bg21_rac.h .

#define _RAC_STATUS2_PREVSTATE3_TX2RX 0x0000000BUL

Mode TX2RX for RAC_STATUS2

Definition at line 1401 of file efr32bg21_rac.h .

#define _RAC_STATUS2_PREVSTATE3_TX2TX 0x0000000CUL

Mode TX2TX for RAC_STATUS2

Definition at line 1402 of file efr32bg21_rac.h .

#define _RAC_STATUS2_PREVSTATE3_TXPD 0x0000000AUL

Mode TXPD for RAC_STATUS2

Definition at line 1400 of file efr32bg21_rac.h .

#define _RAC_STATUS2_PREVSTATE3_TXWARM 0x00000008UL

Mode TXWARM for RAC_STATUS2

Definition at line 1398 of file efr32bg21_rac.h .

#define _RAC_STATUS2_RESETVALUE 0x00000000UL

Default value for RAC_STATUS2

Definition at line 1321 of file efr32bg21_rac.h .

#define _RAC_STATUS_FORCESTATEACTIVE_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_STATUS

Definition at line 543 of file efr32bg21_rac.h .

#define _RAC_STATUS_FORCESTATEACTIVE_MASK 0x80000UL

Bit mask for RAC_FORCESTATEACTIVE

Definition at line 542 of file efr32bg21_rac.h .

#define _RAC_STATUS_FORCESTATEACTIVE_SHIFT 19

Shift value for RAC_FORCESTATEACTIVE

Definition at line 541 of file efr32bg21_rac.h .

#define _RAC_STATUS_FORCESTATEACTIVE_X0 0x00000000UL

Mode X0 for RAC_STATUS

Definition at line 544 of file efr32bg21_rac.h .

#define _RAC_STATUS_FORCESTATEACTIVE_X1 0x00000001UL

Mode X1 for RAC_STATUS

Definition at line 545 of file efr32bg21_rac.h .

#define _RAC_STATUS_MASK 0xEF38FFFFUL

Mask for RAC_STATUS

Definition at line 535 of file efr32bg21_rac.h .

#define _RAC_STATUS_RESETVALUE 0x00000000UL

Default value for RAC_STATUS

Definition at line 534 of file efr32bg21_rac.h .

#define _RAC_STATUS_RXENS_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_STATUS

Definition at line 611 of file efr32bg21_rac.h .

#define _RAC_STATUS_RXENS_MASK 0x80000000UL

Bit mask for RAC_RXENS

Definition at line 610 of file efr32bg21_rac.h .

#define _RAC_STATUS_RXENS_SHIFT 31

Shift value for RAC_RXENS

Definition at line 609 of file efr32bg21_rac.h .

#define _RAC_STATUS_RXENS_X0 0x00000000UL

Mode X0 for RAC_STATUS

Definition at line 612 of file efr32bg21_rac.h .

#define _RAC_STATUS_RXENS_X1 0x00000001UL

Mode X1 for RAC_STATUS

Definition at line 613 of file efr32bg21_rac.h .

#define _RAC_STATUS_RXMASK_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_STATUS

Definition at line 538 of file efr32bg21_rac.h .

#define _RAC_STATUS_RXMASK_MASK 0xFFFFUL

Bit mask for RAC_RXMASK

Definition at line 537 of file efr32bg21_rac.h .

#define _RAC_STATUS_RXMASK_SHIFT 0

Shift value for RAC_RXMASK

Definition at line 536 of file efr32bg21_rac.h .

#define _RAC_STATUS_STATE_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_STATUS

Definition at line 569 of file efr32bg21_rac.h .

#define _RAC_STATUS_STATE_MASK 0xF000000UL

Bit mask for RAC_STATE

Definition at line 568 of file efr32bg21_rac.h .

#define _RAC_STATUS_STATE_OFF 0x00000000UL

Mode OFF for RAC_STATUS

Definition at line 570 of file efr32bg21_rac.h .

#define _RAC_STATUS_STATE_RX2RX 0x00000005UL

Mode RX2RX for RAC_STATUS

Definition at line 575 of file efr32bg21_rac.h .

#define _RAC_STATUS_STATE_RX2TX 0x00000007UL

Mode RX2TX for RAC_STATUS

Definition at line 577 of file efr32bg21_rac.h .

#define _RAC_STATUS_STATE_RXFRAME 0x00000003UL

Mode RXFRAME for RAC_STATUS

Definition at line 573 of file efr32bg21_rac.h .

#define _RAC_STATUS_STATE_RXOVERFLOW 0x00000006UL

Mode RXOVERFLOW for RAC_STATUS

Definition at line 576 of file efr32bg21_rac.h .

#define _RAC_STATUS_STATE_RXPD 0x00000004UL

Mode RXPD for RAC_STATUS

Definition at line 574 of file efr32bg21_rac.h .

#define _RAC_STATUS_STATE_RXSEARCH 0x00000002UL

Mode RXSEARCH for RAC_STATUS

Definition at line 572 of file efr32bg21_rac.h .

#define _RAC_STATUS_STATE_RXWARM 0x00000001UL

Mode RXWARM for RAC_STATUS

Definition at line 571 of file efr32bg21_rac.h .

#define _RAC_STATUS_STATE_SHIFT 24

Shift value for RAC_STATE

Definition at line 567 of file efr32bg21_rac.h .

#define _RAC_STATUS_STATE_SHUTDOWN 0x0000000DUL

Mode SHUTDOWN for RAC_STATUS

Definition at line 583 of file efr32bg21_rac.h .

#define _RAC_STATUS_STATE_TX 0x00000009UL

Mode TX for RAC_STATUS

Definition at line 579 of file efr32bg21_rac.h .

#define _RAC_STATUS_STATE_TX2RX 0x0000000BUL

Mode TX2RX for RAC_STATUS

Definition at line 581 of file efr32bg21_rac.h .

#define _RAC_STATUS_STATE_TX2TX 0x0000000CUL

Mode TX2TX for RAC_STATUS

Definition at line 582 of file efr32bg21_rac.h .

#define _RAC_STATUS_STATE_TXPD 0x0000000AUL

Mode TXPD for RAC_STATUS

Definition at line 580 of file efr32bg21_rac.h .

#define _RAC_STATUS_STATE_TXWARM 0x00000008UL

Mode TXWARM for RAC_STATUS

Definition at line 578 of file efr32bg21_rac.h .

#define _RAC_STATUS_TXAFTERFRAMEACTIVE_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_STATUS

Definition at line 561 of file efr32bg21_rac.h .

#define _RAC_STATUS_TXAFTERFRAMEACTIVE_MASK 0x200000UL

Bit mask for RAC_TXAFTERFRAMEACTIVE

Definition at line 560 of file efr32bg21_rac.h .

#define _RAC_STATUS_TXAFTERFRAMEACTIVE_SHIFT 21

Shift value for RAC_TXAFTERFRAMEACTIVE

Definition at line 559 of file efr32bg21_rac.h .

#define _RAC_STATUS_TXAFTERFRAMEACTIVE_X0 0x00000000UL

Mode X0 for RAC_STATUS

Definition at line 562 of file efr32bg21_rac.h .

#define _RAC_STATUS_TXAFTERFRAMEACTIVE_X1 0x00000001UL

Mode X1 for RAC_STATUS

Definition at line 563 of file efr32bg21_rac.h .

#define _RAC_STATUS_TXAFTERFRAMEPEND_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_STATUS

Definition at line 552 of file efr32bg21_rac.h .

#define _RAC_STATUS_TXAFTERFRAMEPEND_MASK 0x100000UL

Bit mask for RAC_TXAFTERFRAMEPEND

Definition at line 551 of file efr32bg21_rac.h .

#define _RAC_STATUS_TXAFTERFRAMEPEND_SHIFT 20

Shift value for RAC_TXAFTERFRAMEPEND

Definition at line 550 of file efr32bg21_rac.h .

#define _RAC_STATUS_TXAFTERFRAMEPEND_X0 0x00000000UL

Mode X0 for RAC_STATUS

Definition at line 553 of file efr32bg21_rac.h .

#define _RAC_STATUS_TXAFTERFRAMEPEND_X1 0x00000001UL

Mode X1 for RAC_STATUS

Definition at line 554 of file efr32bg21_rac.h .

#define _RAC_STATUS_TXENS_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_STATUS

Definition at line 602 of file efr32bg21_rac.h .

#define _RAC_STATUS_TXENS_MASK 0x40000000UL

Bit mask for RAC_TXENS

Definition at line 601 of file efr32bg21_rac.h .

#define _RAC_STATUS_TXENS_SHIFT 30

Shift value for RAC_TXENS

Definition at line 600 of file efr32bg21_rac.h .

#define _RAC_STATUS_TXENS_X0 0x00000000UL

Mode X0 for RAC_STATUS

Definition at line 603 of file efr32bg21_rac.h .

#define _RAC_STATUS_TXENS_X1 0x00000001UL

Mode X1 for RAC_STATUS

Definition at line 604 of file efr32bg21_rac.h .

#define _RAC_STIMER_MASK 0x0000FFFFUL

Mask for RAC_STIMER

Definition at line 1106 of file efr32bg21_rac.h .

#define _RAC_STIMER_RESETVALUE 0x00000000UL

Default value for RAC_STIMER

Definition at line 1105 of file efr32bg21_rac.h .

#define _RAC_STIMER_STIMER_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_STIMER

Definition at line 1109 of file efr32bg21_rac.h .

#define _RAC_STIMER_STIMER_MASK 0xFFFFUL

Bit mask for RAC_STIMER

Definition at line 1108 of file efr32bg21_rac.h .

#define _RAC_STIMER_STIMER_SHIFT 0

Shift value for RAC_STIMER

Definition at line 1107 of file efr32bg21_rac.h .

#define _RAC_STIMERCOMP_MASK 0x0000FFFFUL

Mask for RAC_STIMERCOMP

Definition at line 1114 of file efr32bg21_rac.h .

#define _RAC_STIMERCOMP_RESETVALUE 0x00000000UL

Default value for RAC_STIMERCOMP

Definition at line 1113 of file efr32bg21_rac.h .

#define _RAC_STIMERCOMP_STIMERCOMP_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_STIMERCOMP

Definition at line 1117 of file efr32bg21_rac.h .

#define _RAC_STIMERCOMP_STIMERCOMP_MASK 0xFFFFUL

Bit mask for RAC_STIMERCOMP

Definition at line 1116 of file efr32bg21_rac.h .

#define _RAC_STIMERCOMP_STIMERCOMP_SHIFT 0

Shift value for RAC_STIMERCOMP

Definition at line 1115 of file efr32bg21_rac.h .

#define _RAC_SYCAL_MASK 0x03018700UL

Mask for RAC_SYCAL

Definition at line 4523 of file efr32bg21_rac.h .

#define _RAC_SYCAL_RESETVALUE 0x01008100UL

Default value for RAC_SYCAL

Definition at line 4522 of file efr32bg21_rac.h .

#define _RAC_SYCAL_SYHILOADCHPREG_DEFAULT 0x00000001UL

Mode DEFAULT for RAC_SYCAL

Definition at line 4557 of file efr32bg21_rac.h .

#define _RAC_SYCAL_SYHILOADCHPREG_i_350uA 0x00000000UL

Mode i_350uA for RAC_SYCAL

Definition at line 4558 of file efr32bg21_rac.h .

#define _RAC_SYCAL_SYHILOADCHPREG_i_500uA 0x00000001UL

Mode i_500uA for RAC_SYCAL

Definition at line 4559 of file efr32bg21_rac.h .

#define _RAC_SYCAL_SYHILOADCHPREG_i_550uA 0x00000002UL

Mode i_550uA for RAC_SYCAL

Definition at line 4560 of file efr32bg21_rac.h .

#define _RAC_SYCAL_SYHILOADCHPREG_i_700uA 0x00000003UL

Mode i_700uA for RAC_SYCAL

Definition at line 4561 of file efr32bg21_rac.h .

#define _RAC_SYCAL_SYHILOADCHPREG_MASK 0x3000000UL

Bit mask for RAC_SYHILOADCHPREG

Definition at line 4556 of file efr32bg21_rac.h .

#define _RAC_SYCAL_SYHILOADCHPREG_SHIFT 24

Shift value for RAC_SYHILOADCHPREG

Definition at line 4555 of file efr32bg21_rac.h .

#define _RAC_SYCAL_SYVCOMODEPKD_DEFAULT 0x00000001UL

Mode DEFAULT for RAC_SYCAL

Definition at line 4527 of file efr32bg21_rac.h .

#define _RAC_SYCAL_SYVCOMODEPKD_MASK 0x100UL

Bit mask for RAC_SYVCOMODEPKD

Definition at line 4526 of file efr32bg21_rac.h .

#define _RAC_SYCAL_SYVCOMODEPKD_SHIFT 8

Shift value for RAC_SYVCOMODEPKD

Definition at line 4525 of file efr32bg21_rac.h .

#define _RAC_SYCAL_SYVCOMODEPKD_t_openloop_0 0x00000000UL

Mode t_openloop_0 for RAC_SYCAL

Definition at line 4528 of file efr32bg21_rac.h .

#define _RAC_SYCAL_SYVCOMODEPKD_t_pkdetect_1 0x00000001UL

Mode t_pkdetect_1 for RAC_SYCAL

Definition at line 4529 of file efr32bg21_rac.h .

#define _RAC_SYCAL_SYVCOMORECURRENT_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_SYCAL

Definition at line 4536 of file efr32bg21_rac.h .

#define _RAC_SYCAL_SYVCOMORECURRENT_MASK 0x200UL

Bit mask for RAC_SYVCOMORECURRENT

Definition at line 4535 of file efr32bg21_rac.h .

#define _RAC_SYCAL_SYVCOMORECURRENT_more_current_0 0x00000000UL

Mode more_current_0 for RAC_SYCAL

Definition at line 4537 of file efr32bg21_rac.h .

#define _RAC_SYCAL_SYVCOMORECURRENT_more_current_1 0x00000001UL

Mode more_current_1 for RAC_SYCAL

Definition at line 4538 of file efr32bg21_rac.h .

#define _RAC_SYCAL_SYVCOMORECURRENT_SHIFT 9

Shift value for RAC_SYVCOMORECURRENT

Definition at line 4534 of file efr32bg21_rac.h .

#define _RAC_SYCAL_SYVCOSLOWNOISEFILTER_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_SYCAL

Definition at line 4545 of file efr32bg21_rac.h .

#define _RAC_SYCAL_SYVCOSLOWNOISEFILTER_MASK 0x400UL

Bit mask for RAC_SYVCOSLOWNOISEFILTER

Definition at line 4544 of file efr32bg21_rac.h .

#define _RAC_SYCAL_SYVCOSLOWNOISEFILTER_SHIFT 10

Shift value for RAC_SYVCOSLOWNOISEFILTER

Definition at line 4543 of file efr32bg21_rac.h .

#define _RAC_SYCAL_SYVCOSLOWNOISEFILTER_slow_noise_filter_0 0x00000000UL

Mode slow_noise_filter_0 for RAC_SYCAL

Definition at line 4546 of file efr32bg21_rac.h .

#define _RAC_SYCAL_SYVCOSLOWNOISEFILTER_slow_noise_filter_1 0x00000001UL

Mode slow_noise_filter_1 for RAC_SYCAL

Definition at line 4547 of file efr32bg21_rac.h .

#define _RAC_SYCAL_SYVCOVCAPVCM_DEFAULT 0x00000001UL

Mode DEFAULT for RAC_SYCAL

Definition at line 4553 of file efr32bg21_rac.h .

#define _RAC_SYCAL_SYVCOVCAPVCM_MASK 0x18000UL

Bit mask for RAC_SYVCOVCAPVCM

Definition at line 4552 of file efr32bg21_rac.h .

#define _RAC_SYCAL_SYVCOVCAPVCM_SHIFT 15

Shift value for RAC_SYVCOVCAPVCM

Definition at line 4551 of file efr32bg21_rac.h .

#define _RAC_SYEN_MASK 0x00007FFFUL

Mask for RAC_SYEN

Definition at line 4570 of file efr32bg21_rac.h .

#define _RAC_SYEN_RESETVALUE 0x00000000UL

Default value for RAC_SYEN

Definition at line 4569 of file efr32bg21_rac.h .

#define _RAC_SYEN_SYCHPEN_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_SYEN

Definition at line 4574 of file efr32bg21_rac.h .

#define _RAC_SYEN_SYCHPEN_disable 0x00000000UL

Mode disable for RAC_SYEN

Definition at line 4575 of file efr32bg21_rac.h .

#define _RAC_SYEN_SYCHPEN_enable 0x00000001UL

Mode enable for RAC_SYEN

Definition at line 4576 of file efr32bg21_rac.h .

#define _RAC_SYEN_SYCHPEN_MASK 0x1UL

Bit mask for RAC_SYCHPEN

Definition at line 4573 of file efr32bg21_rac.h .

#define _RAC_SYEN_SYCHPEN_SHIFT 0

Shift value for RAC_SYCHPEN

Definition at line 4572 of file efr32bg21_rac.h .

#define _RAC_SYEN_SYCHPLPEN_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_SYEN

Definition at line 4583 of file efr32bg21_rac.h .

#define _RAC_SYEN_SYCHPLPEN_disable 0x00000000UL

Mode disable for RAC_SYEN

Definition at line 4584 of file efr32bg21_rac.h .

#define _RAC_SYEN_SYCHPLPEN_enable 0x00000001UL

Mode enable for RAC_SYEN

Definition at line 4585 of file efr32bg21_rac.h .

#define _RAC_SYEN_SYCHPLPEN_MASK 0x2UL

Bit mask for RAC_SYCHPLPEN

Definition at line 4582 of file efr32bg21_rac.h .

#define _RAC_SYEN_SYCHPLPEN_SHIFT 1

Shift value for RAC_SYCHPLPEN

Definition at line 4581 of file efr32bg21_rac.h .

#define _RAC_SYEN_SYENCHPREG_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_SYEN

Definition at line 4592 of file efr32bg21_rac.h .

#define _RAC_SYEN_SYENCHPREG_Disable 0x00000000UL

Mode Disable for RAC_SYEN

Definition at line 4593 of file efr32bg21_rac.h .

#define _RAC_SYEN_SYENCHPREG_Enable 0x00000001UL

Mode Enable for RAC_SYEN

Definition at line 4594 of file efr32bg21_rac.h .

#define _RAC_SYEN_SYENCHPREG_MASK 0x4UL

Bit mask for RAC_SYENCHPREG

Definition at line 4591 of file efr32bg21_rac.h .

#define _RAC_SYEN_SYENCHPREG_SHIFT 2

Shift value for RAC_SYENCHPREG

Definition at line 4590 of file efr32bg21_rac.h .

#define _RAC_SYEN_SYENCHPREPLICA_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_SYEN

Definition at line 4601 of file efr32bg21_rac.h .

#define _RAC_SYEN_SYENCHPREPLICA_disable 0x00000000UL

Mode disable for RAC_SYEN

Definition at line 4602 of file efr32bg21_rac.h .

#define _RAC_SYEN_SYENCHPREPLICA_enable 0x00000001UL

Mode enable for RAC_SYEN

Definition at line 4603 of file efr32bg21_rac.h .

#define _RAC_SYEN_SYENCHPREPLICA_MASK 0x8UL

Bit mask for RAC_SYENCHPREPLICA

Definition at line 4600 of file efr32bg21_rac.h .

#define _RAC_SYEN_SYENCHPREPLICA_SHIFT 3

Shift value for RAC_SYENCHPREPLICA

Definition at line 4599 of file efr32bg21_rac.h .

#define _RAC_SYEN_SYENMMDREG_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_SYEN

Definition at line 4610 of file efr32bg21_rac.h .

#define _RAC_SYEN_SYENMMDREG_Disable 0x00000000UL

Mode Disable for RAC_SYEN

Definition at line 4611 of file efr32bg21_rac.h .

#define _RAC_SYEN_SYENMMDREG_Enable 0x00000001UL

Mode Enable for RAC_SYEN

Definition at line 4612 of file efr32bg21_rac.h .

#define _RAC_SYEN_SYENMMDREG_MASK 0x10UL

Bit mask for RAC_SYENMMDREG

Definition at line 4609 of file efr32bg21_rac.h .

#define _RAC_SYEN_SYENMMDREG_SHIFT 4

Shift value for RAC_SYENMMDREG

Definition at line 4608 of file efr32bg21_rac.h .

#define _RAC_SYEN_SYENMMDREPLICA1_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_SYEN

Definition at line 4619 of file efr32bg21_rac.h .

#define _RAC_SYEN_SYENMMDREPLICA1_disable 0x00000000UL

Mode disable for RAC_SYEN

Definition at line 4620 of file efr32bg21_rac.h .

#define _RAC_SYEN_SYENMMDREPLICA1_enable 0x00000001UL

Mode enable for RAC_SYEN

Definition at line 4621 of file efr32bg21_rac.h .

#define _RAC_SYEN_SYENMMDREPLICA1_MASK 0x20UL

Bit mask for RAC_SYENMMDREPLICA1

Definition at line 4618 of file efr32bg21_rac.h .

#define _RAC_SYEN_SYENMMDREPLICA1_SHIFT 5

Shift value for RAC_SYENMMDREPLICA1

Definition at line 4617 of file efr32bg21_rac.h .

#define _RAC_SYEN_SYENMMDREPLICA2_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_SYEN

Definition at line 4628 of file efr32bg21_rac.h .

#define _RAC_SYEN_SYENMMDREPLICA2_Disable 0x00000000UL

Mode Disable for RAC_SYEN

Definition at line 4629 of file efr32bg21_rac.h .

#define _RAC_SYEN_SYENMMDREPLICA2_Enable 0x00000001UL

Mode Enable for RAC_SYEN

Definition at line 4630 of file efr32bg21_rac.h .

#define _RAC_SYEN_SYENMMDREPLICA2_MASK 0x40UL

Bit mask for RAC_SYENMMDREPLICA2

Definition at line 4627 of file efr32bg21_rac.h .

#define _RAC_SYEN_SYENMMDREPLICA2_SHIFT 6

Shift value for RAC_SYENMMDREPLICA2

Definition at line 4626 of file efr32bg21_rac.h .

#define _RAC_SYEN_SYENVCOBIAS_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_SYEN

Definition at line 4637 of file efr32bg21_rac.h .

#define _RAC_SYEN_SYENVCOBIAS_en_vco_bias_0 0x00000000UL

Mode en_vco_bias_0 for RAC_SYEN

Definition at line 4638 of file efr32bg21_rac.h .

#define _RAC_SYEN_SYENVCOBIAS_en_vco_bias_1 0x00000001UL

Mode en_vco_bias_1 for RAC_SYEN

Definition at line 4639 of file efr32bg21_rac.h .

#define _RAC_SYEN_SYENVCOBIAS_MASK 0x80UL

Bit mask for RAC_SYENVCOBIAS

Definition at line 4636 of file efr32bg21_rac.h .

#define _RAC_SYEN_SYENVCOBIAS_SHIFT 7

Shift value for RAC_SYENVCOBIAS

Definition at line 4635 of file efr32bg21_rac.h .

#define _RAC_SYEN_SYENVCOPFET_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_SYEN

Definition at line 4646 of file efr32bg21_rac.h .

#define _RAC_SYEN_SYENVCOPFET_en_vco_pfet_0 0x00000000UL

Mode en_vco_pfet_0 for RAC_SYEN

Definition at line 4647 of file efr32bg21_rac.h .

#define _RAC_SYEN_SYENVCOPFET_en_vco_pfet_1 0x00000001UL

Mode en_vco_pfet_1 for RAC_SYEN

Definition at line 4648 of file efr32bg21_rac.h .

#define _RAC_SYEN_SYENVCOPFET_MASK 0x100UL

Bit mask for RAC_SYENVCOPFET

Definition at line 4645 of file efr32bg21_rac.h .

#define _RAC_SYEN_SYENVCOPFET_SHIFT 8

Shift value for RAC_SYENVCOPFET

Definition at line 4644 of file efr32bg21_rac.h .

#define _RAC_SYEN_SYENVCOREG_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_SYEN

Definition at line 4655 of file efr32bg21_rac.h .

#define _RAC_SYEN_SYENVCOREG_en_vco_reg_0 0x00000000UL

Mode en_vco_reg_0 for RAC_SYEN

Definition at line 4656 of file efr32bg21_rac.h .

#define _RAC_SYEN_SYENVCOREG_en_vco_reg_1 0x00000001UL

Mode en_vco_reg_1 for RAC_SYEN

Definition at line 4657 of file efr32bg21_rac.h .

#define _RAC_SYEN_SYENVCOREG_MASK 0x200UL

Bit mask for RAC_SYENVCOREG

Definition at line 4654 of file efr32bg21_rac.h .

#define _RAC_SYEN_SYENVCOREG_SHIFT 9

Shift value for RAC_SYENVCOREG

Definition at line 4653 of file efr32bg21_rac.h .

#define _RAC_SYEN_SYLODIVEN_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_SYEN

Definition at line 4664 of file efr32bg21_rac.h .

#define _RAC_SYEN_SYLODIVEN_disable 0x00000000UL

Mode disable for RAC_SYEN

Definition at line 4665 of file efr32bg21_rac.h .

#define _RAC_SYEN_SYLODIVEN_enable 0x00000001UL

Mode enable for RAC_SYEN

Definition at line 4666 of file efr32bg21_rac.h .

#define _RAC_SYEN_SYLODIVEN_MASK 0x400UL

Bit mask for RAC_SYLODIVEN

Definition at line 4663 of file efr32bg21_rac.h .

#define _RAC_SYEN_SYLODIVEN_SHIFT 10

Shift value for RAC_SYLODIVEN

Definition at line 4662 of file efr32bg21_rac.h .

#define _RAC_SYEN_SYLODIVLDOBIASEN_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_SYEN

Definition at line 4673 of file efr32bg21_rac.h .

#define _RAC_SYEN_SYLODIVLDOBIASEN_disable 0x00000000UL

Mode disable for RAC_SYEN

Definition at line 4674 of file efr32bg21_rac.h .

#define _RAC_SYEN_SYLODIVLDOBIASEN_enable 0x00000001UL

Mode enable for RAC_SYEN

Definition at line 4675 of file efr32bg21_rac.h .

#define _RAC_SYEN_SYLODIVLDOBIASEN_MASK 0x800UL

Bit mask for RAC_SYLODIVLDOBIASEN

Definition at line 4672 of file efr32bg21_rac.h .

#define _RAC_SYEN_SYLODIVLDOBIASEN_SHIFT 11

Shift value for RAC_SYLODIVLDOBIASEN

Definition at line 4671 of file efr32bg21_rac.h .

#define _RAC_SYEN_SYLODIVLDOEN_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_SYEN

Definition at line 4682 of file efr32bg21_rac.h .

#define _RAC_SYEN_SYLODIVLDOEN_disable 0x00000000UL

Mode disable for RAC_SYEN

Definition at line 4683 of file efr32bg21_rac.h .

#define _RAC_SYEN_SYLODIVLDOEN_enable 0x00000001UL

Mode enable for RAC_SYEN

Definition at line 4684 of file efr32bg21_rac.h .

#define _RAC_SYEN_SYLODIVLDOEN_MASK 0x1000UL

Bit mask for RAC_SYLODIVLDOEN

Definition at line 4681 of file efr32bg21_rac.h .

#define _RAC_SYEN_SYLODIVLDOEN_SHIFT 12

Shift value for RAC_SYLODIVLDOEN

Definition at line 4680 of file efr32bg21_rac.h .

#define _RAC_SYEN_SYSTARTCHPREG_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_SYEN

Definition at line 4691 of file efr32bg21_rac.h .

#define _RAC_SYEN_SYSTARTCHPREG_fast_startup 0x00000001UL

Mode fast_startup for RAC_SYEN

Definition at line 4693 of file efr32bg21_rac.h .

#define _RAC_SYEN_SYSTARTCHPREG_MASK 0x2000UL

Bit mask for RAC_SYSTARTCHPREG

Definition at line 4690 of file efr32bg21_rac.h .

#define _RAC_SYEN_SYSTARTCHPREG_no_fast_startup 0x00000000UL

Mode no_fast_startup for RAC_SYEN

Definition at line 4692 of file efr32bg21_rac.h .

#define _RAC_SYEN_SYSTARTCHPREG_SHIFT 13

Shift value for RAC_SYSTARTCHPREG

Definition at line 4689 of file efr32bg21_rac.h .

#define _RAC_SYEN_SYSTARTMMDREG_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_SYEN

Definition at line 4700 of file efr32bg21_rac.h .

#define _RAC_SYEN_SYSTARTMMDREG_fast_startup 0x00000001UL

Mode fast_startup for RAC_SYEN

Definition at line 4702 of file efr32bg21_rac.h .

#define _RAC_SYEN_SYSTARTMMDREG_MASK 0x4000UL

Bit mask for RAC_SYSTARTMMDREG

Definition at line 4699 of file efr32bg21_rac.h .

#define _RAC_SYEN_SYSTARTMMDREG_no_fast_startup 0x00000000UL

Mode no_fast_startup for RAC_SYEN

Definition at line 4701 of file efr32bg21_rac.h .

#define _RAC_SYEN_SYSTARTMMDREG_SHIFT 14

Shift value for RAC_SYSTARTMMDREG

Definition at line 4698 of file efr32bg21_rac.h .

#define _RAC_SYLOEN_MASK 0x00001FFFUL

Mask for RAC_SYLOEN

Definition at line 4709 of file efr32bg21_rac.h .

#define _RAC_SYLOEN_RESETVALUE 0x00000000UL

Default value for RAC_SYLOEN

Definition at line 4708 of file efr32bg21_rac.h .

#define _RAC_SYLOEN_SYLODIVRLO12G4EN_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_SYLOEN

Definition at line 4722 of file efr32bg21_rac.h .

#define _RAC_SYLOEN_SYLODIVRLO12G4EN_disable 0x00000000UL

Mode disable for RAC_SYLOEN

Definition at line 4723 of file efr32bg21_rac.h .

#define _RAC_SYLOEN_SYLODIVRLO12G4EN_enable 0x00000001UL

Mode enable for RAC_SYLOEN

Definition at line 4724 of file efr32bg21_rac.h .

#define _RAC_SYLOEN_SYLODIVRLO12G4EN_MASK 0x2UL

Bit mask for RAC_SYLODIVRLO12G4EN

Definition at line 4721 of file efr32bg21_rac.h .

#define _RAC_SYLOEN_SYLODIVRLO12G4EN_SHIFT 1

Shift value for RAC_SYLODIVRLO12G4EN

Definition at line 4720 of file efr32bg21_rac.h .

#define _RAC_SYLOEN_SYLODIVRLO22G4EN_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_SYLOEN

Definition at line 4731 of file efr32bg21_rac.h .

#define _RAC_SYLOEN_SYLODIVRLO22G4EN_disable 0x00000000UL

Mode disable for RAC_SYLOEN

Definition at line 4732 of file efr32bg21_rac.h .

#define _RAC_SYLOEN_SYLODIVRLO22G4EN_enable 0x00000001UL

Mode enable for RAC_SYLOEN

Definition at line 4733 of file efr32bg21_rac.h .

#define _RAC_SYLOEN_SYLODIVRLO22G4EN_MASK 0x8UL

Bit mask for RAC_SYLODIVRLO22G4EN

Definition at line 4730 of file efr32bg21_rac.h .

#define _RAC_SYLOEN_SYLODIVRLO22G4EN_SHIFT 3

Shift value for RAC_SYLODIVRLO22G4EN

Definition at line 4729 of file efr32bg21_rac.h .

#define _RAC_SYLOEN_SYLODIVRLOADCCLK2G4EN_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_SYLOEN

Definition at line 4713 of file efr32bg21_rac.h .

#define _RAC_SYLOEN_SYLODIVRLOADCCLK2G4EN_disable 0x00000000UL

Mode disable for RAC_SYLOEN

Definition at line 4714 of file efr32bg21_rac.h .

#define _RAC_SYLOEN_SYLODIVRLOADCCLK2G4EN_enable 0x00000001UL

Mode enable for RAC_SYLOEN

Definition at line 4715 of file efr32bg21_rac.h .

#define _RAC_SYLOEN_SYLODIVRLOADCCLK2G4EN_MASK 0x1UL

Bit mask for RAC_SYLODIVRLOADCCLK2G4EN

Definition at line 4712 of file efr32bg21_rac.h .

#define _RAC_SYLOEN_SYLODIVRLOADCCLK2G4EN_SHIFT 0

Shift value for RAC_SYLODIVRLOADCCLK2G4EN

Definition at line 4711 of file efr32bg21_rac.h .

#define _RAC_SYLOEN_SYLODIVTLO0DBM2G4AUXEN_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_SYLOEN

Definition at line 4740 of file efr32bg21_rac.h .

#define _RAC_SYLOEN_SYLODIVTLO0DBM2G4AUXEN_disable 0x00000000UL

Mode disable for RAC_SYLOEN

Definition at line 4741 of file efr32bg21_rac.h .

#define _RAC_SYLOEN_SYLODIVTLO0DBM2G4AUXEN_enable 0x00000001UL

Mode enable for RAC_SYLOEN

Definition at line 4742 of file efr32bg21_rac.h .

#define _RAC_SYLOEN_SYLODIVTLO0DBM2G4AUXEN_MASK 0x20UL

Bit mask for RAC_SYLODIVTLO0DBM2G4AUXEN

Definition at line 4739 of file efr32bg21_rac.h .

#define _RAC_SYLOEN_SYLODIVTLO0DBM2G4AUXEN_SHIFT 5

Shift value for RAC_SYLODIVTLO0DBM2G4AUXEN

Definition at line 4738 of file efr32bg21_rac.h .

#define _RAC_SYLOEN_SYLODIVTLO0DBM2G4EN_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_SYLOEN

Definition at line 4749 of file efr32bg21_rac.h .

#define _RAC_SYLOEN_SYLODIVTLO0DBM2G4EN_disable 0x00000000UL

Mode disable for RAC_SYLOEN

Definition at line 4750 of file efr32bg21_rac.h .

#define _RAC_SYLOEN_SYLODIVTLO0DBM2G4EN_enable 0x00000001UL

Mode enable for RAC_SYLOEN

Definition at line 4751 of file efr32bg21_rac.h .

#define _RAC_SYLOEN_SYLODIVTLO0DBM2G4EN_MASK 0x40UL

Bit mask for RAC_SYLODIVTLO0DBM2G4EN

Definition at line 4748 of file efr32bg21_rac.h .

#define _RAC_SYLOEN_SYLODIVTLO0DBM2G4EN_SHIFT 6

Shift value for RAC_SYLODIVTLO0DBM2G4EN

Definition at line 4747 of file efr32bg21_rac.h .

#define _RAC_SYLOEN_SYLODIVTLO20DBM2G4AUXEN_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_SYLOEN

Definition at line 4758 of file efr32bg21_rac.h .

#define _RAC_SYLOEN_SYLODIVTLO20DBM2G4AUXEN_disable 0x00000000UL

Mode disable for RAC_SYLOEN

Definition at line 4759 of file efr32bg21_rac.h .

#define _RAC_SYLOEN_SYLODIVTLO20DBM2G4AUXEN_enable 0x00000001UL

Mode enable for RAC_SYLOEN

Definition at line 4760 of file efr32bg21_rac.h .

#define _RAC_SYLOEN_SYLODIVTLO20DBM2G4AUXEN_MASK 0x200UL

Bit mask for RAC_SYLODIVTLO20DBM2G4AUXEN

Definition at line 4757 of file efr32bg21_rac.h .

#define _RAC_SYLOEN_SYLODIVTLO20DBM2G4AUXEN_SHIFT 9

Shift value for RAC_SYLODIVTLO20DBM2G4AUXEN

Definition at line 4756 of file efr32bg21_rac.h .

#define _RAC_SYLOEN_SYLODIVTLO20DBM2G4EN_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_SYLOEN

Definition at line 4767 of file efr32bg21_rac.h .

#define _RAC_SYLOEN_SYLODIVTLO20DBM2G4EN_disable 0x00000000UL

Mode disable for RAC_SYLOEN

Definition at line 4768 of file efr32bg21_rac.h .

#define _RAC_SYLOEN_SYLODIVTLO20DBM2G4EN_enable 0x00000001UL

Mode enable for RAC_SYLOEN

Definition at line 4769 of file efr32bg21_rac.h .

#define _RAC_SYLOEN_SYLODIVTLO20DBM2G4EN_MASK 0x400UL

Bit mask for RAC_SYLODIVTLO20DBM2G4EN

Definition at line 4766 of file efr32bg21_rac.h .

#define _RAC_SYLOEN_SYLODIVTLO20DBM2G4EN_SHIFT 10

Shift value for RAC_SYLODIVTLO20DBM2G4EN

Definition at line 4765 of file efr32bg21_rac.h .

#define _RAC_SYMMDCTRL_MASK 0x00000007UL

Mask for RAC_SYMMDCTRL

Definition at line 4776 of file efr32bg21_rac.h .

#define _RAC_SYMMDCTRL_RESETVALUE 0x00000000UL

Default value for RAC_SYMMDCTRL

Definition at line 4775 of file efr32bg21_rac.h .

#define _RAC_SYMMDCTRL_SYMMDDIVRSDIG_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_SYMMDCTRL

Definition at line 4788 of file efr32bg21_rac.h .

#define _RAC_SYMMDCTRL_SYMMDDIVRSDIG_Divideby1 0x00000000UL

Mode Divideby1 for RAC_SYMMDCTRL

Definition at line 4789 of file efr32bg21_rac.h .

#define _RAC_SYMMDCTRL_SYMMDDIVRSDIG_Divideby2 0x00000001UL

Mode Divideby2 for RAC_SYMMDCTRL

Definition at line 4790 of file efr32bg21_rac.h .

#define _RAC_SYMMDCTRL_SYMMDDIVRSDIG_Divideby4 0x00000002UL

Mode Divideby4 for RAC_SYMMDCTRL

Definition at line 4791 of file efr32bg21_rac.h .

#define _RAC_SYMMDCTRL_SYMMDDIVRSDIG_Divideby8 0x00000003UL

Mode Divideby8 for RAC_SYMMDCTRL

Definition at line 4792 of file efr32bg21_rac.h .

#define _RAC_SYMMDCTRL_SYMMDDIVRSDIG_MASK 0x6UL

Bit mask for RAC_SYMMDDIVRSDIG

Definition at line 4787 of file efr32bg21_rac.h .

#define _RAC_SYMMDCTRL_SYMMDDIVRSDIG_SHIFT 1

Shift value for RAC_SYMMDDIVRSDIG

Definition at line 4786 of file efr32bg21_rac.h .

#define _RAC_SYMMDCTRL_SYMMDENRSDIG_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_SYMMDCTRL

Definition at line 4780 of file efr32bg21_rac.h .

#define _RAC_SYMMDCTRL_SYMMDENRSDIG_disable 0x00000000UL

Mode disable for RAC_SYMMDCTRL

Definition at line 4781 of file efr32bg21_rac.h .

#define _RAC_SYMMDCTRL_SYMMDENRSDIG_enable 0x00000001UL

Mode enable for RAC_SYMMDCTRL

Definition at line 4782 of file efr32bg21_rac.h .

#define _RAC_SYMMDCTRL_SYMMDENRSDIG_MASK 0x1UL

Bit mask for RAC_SYMMDENRSDIG

Definition at line 4779 of file efr32bg21_rac.h .

#define _RAC_SYMMDCTRL_SYMMDENRSDIG_SHIFT 0

Shift value for RAC_SYMMDENRSDIG

Definition at line 4778 of file efr32bg21_rac.h .

#define _RAC_SYNTHCTRL_MASK 0x00000400UL

Mask for RAC_SYNTHCTRL

Definition at line 1309 of file efr32bg21_rac.h .

#define _RAC_SYNTHCTRL_MMDPOWERBALANCEDISABLE_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_SYNTHCTRL

Definition at line 1313 of file efr32bg21_rac.h .

#define _RAC_SYNTHCTRL_MMDPOWERBALANCEDISABLE_DisablePowerBleed 0x00000001UL

Mode DisablePowerBleed for RAC_SYNTHCTRL

Definition at line 1315 of file efr32bg21_rac.h .

#define _RAC_SYNTHCTRL_MMDPOWERBALANCEDISABLE_EnablePowerbleed 0x00000000UL

Mode EnablePowerbleed for RAC_SYNTHCTRL

Definition at line 1314 of file efr32bg21_rac.h .

#define _RAC_SYNTHCTRL_MMDPOWERBALANCEDISABLE_MASK 0x400UL

Bit mask for RAC_MMDPOWERBALANCEDISABLE

Definition at line 1312 of file efr32bg21_rac.h .

#define _RAC_SYNTHCTRL_MMDPOWERBALANCEDISABLE_SHIFT 10

Shift value for RAC_MMDPOWERBALANCEDISABLE

Definition at line 1311 of file efr32bg21_rac.h .

#define _RAC_SYNTHCTRL_RESETVALUE 0x00000000UL

Default value for RAC_SYNTHCTRL

Definition at line 1308 of file efr32bg21_rac.h .

#define _RAC_SYNTHENCTRL_LPFBWSEL_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_SYNTHENCTRL

Definition at line 1244 of file efr32bg21_rac.h .

#define _RAC_SYNTHENCTRL_LPFBWSEL_LPFBWRX 0x00000000UL

Mode LPFBWRX for RAC_SYNTHENCTRL

Definition at line 1245 of file efr32bg21_rac.h .

#define _RAC_SYNTHENCTRL_LPFBWSEL_LPFBWTX 0x00000001UL

Mode LPFBWTX for RAC_SYNTHENCTRL

Definition at line 1246 of file efr32bg21_rac.h .

#define _RAC_SYNTHENCTRL_LPFBWSEL_MASK 0x100000UL

Bit mask for RAC_LPFBWSEL

Definition at line 1243 of file efr32bg21_rac.h .

#define _RAC_SYNTHENCTRL_LPFBWSEL_SHIFT 20

Shift value for RAC_LPFBWSEL

Definition at line 1242 of file efr32bg21_rac.h .

#define _RAC_SYNTHENCTRL_MASK 0x00100282UL

Mask for RAC_SYNTHENCTRL

Definition at line 1222 of file efr32bg21_rac.h .

#define _RAC_SYNTHENCTRL_RESETVALUE 0x00000000UL

Default value for RAC_SYNTHENCTRL

Definition at line 1221 of file efr32bg21_rac.h .

#define _RAC_SYNTHENCTRL_VCBUFEN_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_SYNTHENCTRL

Definition at line 1235 of file efr32bg21_rac.h .

#define _RAC_SYNTHENCTRL_VCBUFEN_Disabled 0x00000000UL

Mode Disabled for RAC_SYNTHENCTRL

Definition at line 1236 of file efr32bg21_rac.h .

#define _RAC_SYNTHENCTRL_VCBUFEN_Enabled 0x00000001UL

Mode Enabled for RAC_SYNTHENCTRL

Definition at line 1237 of file efr32bg21_rac.h .

#define _RAC_SYNTHENCTRL_VCBUFEN_MASK 0x80UL

Bit mask for RAC_VCBUFEN

Definition at line 1234 of file efr32bg21_rac.h .

#define _RAC_SYNTHENCTRL_VCBUFEN_SHIFT 7

Shift value for RAC_VCBUFEN

Definition at line 1233 of file efr32bg21_rac.h .

#define _RAC_SYNTHENCTRL_VCOSTARTUP_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_SYNTHENCTRL

Definition at line 1226 of file efr32bg21_rac.h .

#define _RAC_SYNTHENCTRL_VCOSTARTUP_fast_start_up_0 0x00000000UL

Mode fast_start_up_0 for RAC_SYNTHENCTRL

Definition at line 1227 of file efr32bg21_rac.h .

#define _RAC_SYNTHENCTRL_VCOSTARTUP_fast_start_up_1 0x00000001UL

Mode fast_start_up_1 for RAC_SYNTHENCTRL

Definition at line 1228 of file efr32bg21_rac.h .

#define _RAC_SYNTHENCTRL_VCOSTARTUP_MASK 0x2UL

Bit mask for RAC_VCOSTARTUP

Definition at line 1225 of file efr32bg21_rac.h .

#define _RAC_SYNTHENCTRL_VCOSTARTUP_SHIFT 1

Shift value for RAC_VCOSTARTUP

Definition at line 1224 of file efr32bg21_rac.h .

#define _RAC_SYNTHREGCTRL_CHPLDOVREFTRIM_DEFAULT 0x00000004UL

Mode DEFAULT for RAC_SYNTHREGCTRL

Definition at line 1276 of file efr32bg21_rac.h .

#define _RAC_SYNTHREGCTRL_CHPLDOVREFTRIM_MASK 0x7000000UL

Bit mask for RAC_CHPLDOVREFTRIM

Definition at line 1275 of file efr32bg21_rac.h .

#define _RAC_SYNTHREGCTRL_CHPLDOVREFTRIM_SHIFT 24

Shift value for RAC_CHPLDOVREFTRIM

Definition at line 1274 of file efr32bg21_rac.h .

#define _RAC_SYNTHREGCTRL_CHPLDOVREFTRIM_vref0p6000 0x00000000UL

Mode vref0p6000 for RAC_SYNTHREGCTRL

Definition at line 1277 of file efr32bg21_rac.h .

#define _RAC_SYNTHREGCTRL_CHPLDOVREFTRIM_vref0p6125 0x00000001UL

Mode vref0p6125 for RAC_SYNTHREGCTRL

Definition at line 1278 of file efr32bg21_rac.h .

#define _RAC_SYNTHREGCTRL_CHPLDOVREFTRIM_vref0p6250 0x00000002UL

Mode vref0p6250 for RAC_SYNTHREGCTRL

Definition at line 1279 of file efr32bg21_rac.h .

#define _RAC_SYNTHREGCTRL_CHPLDOVREFTRIM_vref0p6375 0x00000003UL

Mode vref0p6375 for RAC_SYNTHREGCTRL

Definition at line 1280 of file efr32bg21_rac.h .

#define _RAC_SYNTHREGCTRL_CHPLDOVREFTRIM_vref0p6500 0x00000004UL

Mode vref0p6500 for RAC_SYNTHREGCTRL

Definition at line 1281 of file efr32bg21_rac.h .

#define _RAC_SYNTHREGCTRL_CHPLDOVREFTRIM_vref0p6625 0x00000005UL

Mode vref0p6625 for RAC_SYNTHREGCTRL

Definition at line 1282 of file efr32bg21_rac.h .

#define _RAC_SYNTHREGCTRL_CHPLDOVREFTRIM_vref0p6750 0x00000006UL

Mode vref0p6750 for RAC_SYNTHREGCTRL

Definition at line 1283 of file efr32bg21_rac.h .

#define _RAC_SYNTHREGCTRL_CHPLDOVREFTRIM_vref0p6875 0x00000007UL

Mode vref0p6875 for RAC_SYNTHREGCTRL

Definition at line 1284 of file efr32bg21_rac.h .

#define _RAC_SYNTHREGCTRL_MASK 0x07001C00UL

Mask for RAC_SYNTHREGCTRL

Definition at line 1253 of file efr32bg21_rac.h .

#define _RAC_SYNTHREGCTRL_MMDLDOVREFTRIM_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_SYNTHREGCTRL

Definition at line 1256 of file efr32bg21_rac.h .

#define _RAC_SYNTHREGCTRL_MMDLDOVREFTRIM_MASK 0x1C00UL

Bit mask for RAC_MMDLDOVREFTRIM

Definition at line 1255 of file efr32bg21_rac.h .

#define _RAC_SYNTHREGCTRL_MMDLDOVREFTRIM_SHIFT 10

Shift value for RAC_MMDLDOVREFTRIM

Definition at line 1254 of file efr32bg21_rac.h .

#define _RAC_SYNTHREGCTRL_MMDLDOVREFTRIM_vref0p6000 0x00000000UL

Mode vref0p6000 for RAC_SYNTHREGCTRL

Definition at line 1257 of file efr32bg21_rac.h .

#define _RAC_SYNTHREGCTRL_MMDLDOVREFTRIM_vref0p6125 0x00000001UL

Mode vref0p6125 for RAC_SYNTHREGCTRL

Definition at line 1258 of file efr32bg21_rac.h .

#define _RAC_SYNTHREGCTRL_MMDLDOVREFTRIM_vref0p6250 0x00000002UL

Mode vref0p6250 for RAC_SYNTHREGCTRL

Definition at line 1259 of file efr32bg21_rac.h .

#define _RAC_SYNTHREGCTRL_MMDLDOVREFTRIM_vref0p6375 0x00000003UL

Mode vref0p6375 for RAC_SYNTHREGCTRL

Definition at line 1260 of file efr32bg21_rac.h .

#define _RAC_SYNTHREGCTRL_MMDLDOVREFTRIM_vref0p6500 0x00000004UL

Mode vref0p6500 for RAC_SYNTHREGCTRL

Definition at line 1261 of file efr32bg21_rac.h .

#define _RAC_SYNTHREGCTRL_MMDLDOVREFTRIM_vref0p6625 0x00000005UL

Mode vref0p6625 for RAC_SYNTHREGCTRL

Definition at line 1262 of file efr32bg21_rac.h .

#define _RAC_SYNTHREGCTRL_MMDLDOVREFTRIM_vref0p6750 0x00000006UL

Mode vref0p6750 for RAC_SYNTHREGCTRL

Definition at line 1263 of file efr32bg21_rac.h .

#define _RAC_SYNTHREGCTRL_MMDLDOVREFTRIM_vref0p6875 0x00000007UL

Mode vref0p6875 for RAC_SYNTHREGCTRL

Definition at line 1264 of file efr32bg21_rac.h .

#define _RAC_SYNTHREGCTRL_RESETVALUE 0x04000000UL

Default value for RAC_SYNTHREGCTRL

Definition at line 1252 of file efr32bg21_rac.h .

#define _RAC_SYTRIM0_MASK 0x003FEFFFUL

Mask for RAC_SYTRIM0

Definition at line 4294 of file efr32bg21_rac.h .

#define _RAC_SYTRIM0_RESETVALUE 0x00062E29UL

Default value for RAC_SYTRIM0

Definition at line 4293 of file efr32bg21_rac.h .

#define _RAC_SYTRIM0_SYCHPBIAS_bias_0 0x00000000UL

Mode bias_0 for RAC_SYTRIM0

Definition at line 4298 of file efr32bg21_rac.h .

#define _RAC_SYTRIM0_SYCHPBIAS_bias_1 0x00000001UL

Mode bias_1 for RAC_SYTRIM0

Definition at line 4299 of file efr32bg21_rac.h .

#define _RAC_SYTRIM0_SYCHPBIAS_bias_2 0x00000003UL

Mode bias_2 for RAC_SYTRIM0

Definition at line 4300 of file efr32bg21_rac.h .

#define _RAC_SYTRIM0_SYCHPBIAS_bias_3 0x00000007UL

Mode bias_3 for RAC_SYTRIM0

Definition at line 4301 of file efr32bg21_rac.h .

#define _RAC_SYTRIM0_SYCHPBIAS_DEFAULT 0x00000001UL

Mode DEFAULT for RAC_SYTRIM0

Definition at line 4297 of file efr32bg21_rac.h .

#define _RAC_SYTRIM0_SYCHPBIAS_MASK 0x7UL

Bit mask for RAC_SYCHPBIAS

Definition at line 4296 of file efr32bg21_rac.h .

#define _RAC_SYTRIM0_SYCHPBIAS_SHIFT 0

Shift value for RAC_SYCHPBIAS

Definition at line 4295 of file efr32bg21_rac.h .

#define _RAC_SYTRIM0_SYCHPCURR_curr_1p5uA 0x00000000UL

Mode curr_1p5uA for RAC_SYTRIM0

Definition at line 4310 of file efr32bg21_rac.h .

#define _RAC_SYTRIM0_SYCHPCURR_curr_2p0uA 0x00000001UL

Mode curr_2p0uA for RAC_SYTRIM0

Definition at line 4311 of file efr32bg21_rac.h .

#define _RAC_SYTRIM0_SYCHPCURR_curr_2p5uA 0x00000002UL

Mode curr_2p5uA for RAC_SYTRIM0

Definition at line 4312 of file efr32bg21_rac.h .

#define _RAC_SYTRIM0_SYCHPCURR_curr_3p0uA 0x00000003UL

Mode curr_3p0uA for RAC_SYTRIM0

Definition at line 4313 of file efr32bg21_rac.h .

#define _RAC_SYTRIM0_SYCHPCURR_curr_3p5uA 0x00000004UL

Mode curr_3p5uA for RAC_SYTRIM0

Definition at line 4314 of file efr32bg21_rac.h .

#define _RAC_SYTRIM0_SYCHPCURR_curr_4p0uA 0x00000005UL

Mode curr_4p0uA for RAC_SYTRIM0

Definition at line 4315 of file efr32bg21_rac.h .

#define _RAC_SYTRIM0_SYCHPCURR_curr_4p5uA 0x00000006UL

Mode curr_4p5uA for RAC_SYTRIM0

Definition at line 4316 of file efr32bg21_rac.h .

#define _RAC_SYTRIM0_SYCHPCURR_curr_5p0uA 0x00000007UL

Mode curr_5p0uA for RAC_SYTRIM0

Definition at line 4317 of file efr32bg21_rac.h .

#define _RAC_SYTRIM0_SYCHPCURR_DEFAULT 0x00000005UL

Mode DEFAULT for RAC_SYTRIM0

Definition at line 4309 of file efr32bg21_rac.h .

#define _RAC_SYTRIM0_SYCHPCURR_MASK 0x38UL

Bit mask for RAC_SYCHPCURR

Definition at line 4308 of file efr32bg21_rac.h .

#define _RAC_SYTRIM0_SYCHPCURR_SHIFT 3

Shift value for RAC_SYCHPCURR

Definition at line 4307 of file efr32bg21_rac.h .

#define _RAC_SYTRIM0_SYCHPLEVNSRC_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_SYTRIM0

Definition at line 4329 of file efr32bg21_rac.h .

#define _RAC_SYTRIM0_SYCHPLEVNSRC_MASK 0x1C0UL

Bit mask for RAC_SYCHPLEVNSRC

Definition at line 4328 of file efr32bg21_rac.h .

#define _RAC_SYTRIM0_SYCHPLEVNSRC_SHIFT 6

Shift value for RAC_SYCHPLEVNSRC

Definition at line 4327 of file efr32bg21_rac.h .

#define _RAC_SYTRIM0_SYCHPLEVPSRC_DEFAULT 0x00000007UL

Mode DEFAULT for RAC_SYTRIM0

Definition at line 4333 of file efr32bg21_rac.h .

#define _RAC_SYTRIM0_SYCHPLEVPSRC_MASK 0xE00UL

Bit mask for RAC_SYCHPLEVPSRC

Definition at line 4332 of file efr32bg21_rac.h .

#define _RAC_SYTRIM0_SYCHPLEVPSRC_SHIFT 9

Shift value for RAC_SYCHPLEVPSRC

Definition at line 4331 of file efr32bg21_rac.h .

#define _RAC_SYTRIM0_SYCHPLEVPSRC_vsrcp_n0m 0x00000007UL

Mode vsrcp_n0m for RAC_SYTRIM0

Definition at line 4341 of file efr32bg21_rac.h .

#define _RAC_SYTRIM0_SYCHPLEVPSRC_vsrcp_n105m 0x00000000UL

Mode vsrcp_n105m for RAC_SYTRIM0

Definition at line 4334 of file efr32bg21_rac.h .

#define _RAC_SYTRIM0_SYCHPLEVPSRC_vsrcp_n15m 0x00000006UL

Mode vsrcp_n15m for RAC_SYTRIM0

Definition at line 4340 of file efr32bg21_rac.h .

#define _RAC_SYTRIM0_SYCHPLEVPSRC_vsrcp_n30m 0x00000005UL

Mode vsrcp_n30m for RAC_SYTRIM0

Definition at line 4339 of file efr32bg21_rac.h .

#define _RAC_SYTRIM0_SYCHPLEVPSRC_vsrcp_n45m 0x00000004UL

Mode vsrcp_n45m for RAC_SYTRIM0

Definition at line 4338 of file efr32bg21_rac.h .

#define _RAC_SYTRIM0_SYCHPLEVPSRC_vsrcp_n60m 0x00000003UL

Mode vsrcp_n60m for RAC_SYTRIM0

Definition at line 4337 of file efr32bg21_rac.h .

#define _RAC_SYTRIM0_SYCHPLEVPSRC_vsrcp_n75m 0x00000002UL

Mode vsrcp_n75m for RAC_SYTRIM0

Definition at line 4336 of file efr32bg21_rac.h .

#define _RAC_SYTRIM0_SYCHPLEVPSRC_vsrcp_n90m 0x00000001UL

Mode vsrcp_n90m for RAC_SYTRIM0

Definition at line 4335 of file efr32bg21_rac.h .

#define _RAC_SYTRIM0_SYCHPREPLICACURRADJ_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_SYTRIM0

Definition at line 4362 of file efr32bg21_rac.h .

#define _RAC_SYTRIM0_SYCHPREPLICACURRADJ_load_16ua 0x00000001UL

Mode load_16ua for RAC_SYTRIM0

Definition at line 4364 of file efr32bg21_rac.h .

#define _RAC_SYTRIM0_SYCHPREPLICACURRADJ_load_20ua 0x00000002UL

Mode load_20ua for RAC_SYTRIM0

Definition at line 4365 of file efr32bg21_rac.h .

#define _RAC_SYTRIM0_SYCHPREPLICACURRADJ_load_24ua 0x00000004UL

Mode load_24ua for RAC_SYTRIM0

Definition at line 4367 of file efr32bg21_rac.h .

#define _RAC_SYTRIM0_SYCHPREPLICACURRADJ_load_28ua 0x00000003UL

Mode load_28ua for RAC_SYTRIM0

Definition at line 4366 of file efr32bg21_rac.h .

#define _RAC_SYTRIM0_SYCHPREPLICACURRADJ_load_32ua 0x00000005UL

Mode load_32ua for RAC_SYTRIM0

Definition at line 4368 of file efr32bg21_rac.h .

#define _RAC_SYTRIM0_SYCHPREPLICACURRADJ_load_36ua 0x00000006UL

Mode load_36ua for RAC_SYTRIM0

Definition at line 4369 of file efr32bg21_rac.h .

#define _RAC_SYTRIM0_SYCHPREPLICACURRADJ_load_44ua 0x00000007UL

Mode load_44ua for RAC_SYTRIM0

Definition at line 4370 of file efr32bg21_rac.h .

#define _RAC_SYTRIM0_SYCHPREPLICACURRADJ_load_8ua 0x00000000UL

Mode load_8ua for RAC_SYTRIM0

Definition at line 4363 of file efr32bg21_rac.h .

#define _RAC_SYTRIM0_SYCHPREPLICACURRADJ_MASK 0x1C000UL

Bit mask for RAC_SYCHPREPLICACURRADJ

Definition at line 4361 of file efr32bg21_rac.h .

#define _RAC_SYTRIM0_SYCHPREPLICACURRADJ_SHIFT 14

Shift value for RAC_SYCHPREPLICACURRADJ

Definition at line 4360 of file efr32bg21_rac.h .

#define _RAC_SYTRIM0_SYCHPSRCEN_DEFAULT 0x00000001UL

Mode DEFAULT for RAC_SYTRIM0

Definition at line 4354 of file efr32bg21_rac.h .

#define _RAC_SYTRIM0_SYCHPSRCEN_disable 0x00000000UL

Mode disable for RAC_SYTRIM0

Definition at line 4355 of file efr32bg21_rac.h .

#define _RAC_SYTRIM0_SYCHPSRCEN_enable 0x00000001UL

Mode enable for RAC_SYTRIM0

Definition at line 4356 of file efr32bg21_rac.h .

#define _RAC_SYTRIM0_SYCHPSRCEN_MASK 0x2000UL

Bit mask for RAC_SYCHPSRCEN

Definition at line 4353 of file efr32bg21_rac.h .

#define _RAC_SYTRIM0_SYCHPSRCEN_SHIFT 13

Shift value for RAC_SYCHPSRCEN

Definition at line 4352 of file efr32bg21_rac.h .

#define _RAC_SYTRIM0_SYTRIMCHPREGAMPBIAS_bias_14uA 0x00000000UL

Mode bias_14uA for RAC_SYTRIM0

Definition at line 4383 of file efr32bg21_rac.h .

#define _RAC_SYTRIM0_SYTRIMCHPREGAMPBIAS_bias_20uA 0x00000001UL

Mode bias_20uA for RAC_SYTRIM0

Definition at line 4384 of file efr32bg21_rac.h .

#define _RAC_SYTRIM0_SYTRIMCHPREGAMPBIAS_bias_26uA 0x00000002UL

Mode bias_26uA for RAC_SYTRIM0

Definition at line 4385 of file efr32bg21_rac.h .

#define _RAC_SYTRIM0_SYTRIMCHPREGAMPBIAS_bias_32uA 0x00000003UL

Mode bias_32uA for RAC_SYTRIM0

Definition at line 4386 of file efr32bg21_rac.h .

#define _RAC_SYTRIM0_SYTRIMCHPREGAMPBIAS_bias_38uA 0x00000004UL

Mode bias_38uA for RAC_SYTRIM0

Definition at line 4387 of file efr32bg21_rac.h .

#define _RAC_SYTRIM0_SYTRIMCHPREGAMPBIAS_bias_44uA 0x00000005UL

Mode bias_44uA for RAC_SYTRIM0

Definition at line 4388 of file efr32bg21_rac.h .

#define _RAC_SYTRIM0_SYTRIMCHPREGAMPBIAS_bias_50uA 0x00000006UL

Mode bias_50uA for RAC_SYTRIM0

Definition at line 4389 of file efr32bg21_rac.h .

#define _RAC_SYTRIM0_SYTRIMCHPREGAMPBIAS_bias_56uA 0x00000007UL

Mode bias_56uA for RAC_SYTRIM0

Definition at line 4390 of file efr32bg21_rac.h .

#define _RAC_SYTRIM0_SYTRIMCHPREGAMPBIAS_DEFAULT 0x00000003UL

Mode DEFAULT for RAC_SYTRIM0

Definition at line 4382 of file efr32bg21_rac.h .

#define _RAC_SYTRIM0_SYTRIMCHPREGAMPBIAS_MASK 0xE0000UL

Bit mask for RAC_SYTRIMCHPREGAMPBIAS

Definition at line 4381 of file efr32bg21_rac.h .

#define _RAC_SYTRIM0_SYTRIMCHPREGAMPBIAS_SHIFT 17

Shift value for RAC_SYTRIMCHPREGAMPBIAS

Definition at line 4380 of file efr32bg21_rac.h .

#define _RAC_SYTRIM0_SYTRIMCHPREGAMPBW_C_000f 0x00000000UL

Mode C_000f for RAC_SYTRIM0

Definition at line 4403 of file efr32bg21_rac.h .

#define _RAC_SYTRIM0_SYTRIMCHPREGAMPBW_C_300f 0x00000001UL

Mode C_300f for RAC_SYTRIM0

Definition at line 4404 of file efr32bg21_rac.h .

#define _RAC_SYTRIM0_SYTRIMCHPREGAMPBW_C_600f 0x00000002UL

Mode C_600f for RAC_SYTRIM0

Definition at line 4405 of file efr32bg21_rac.h .

#define _RAC_SYTRIM0_SYTRIMCHPREGAMPBW_C_900f 0x00000003UL

Mode C_900f for RAC_SYTRIM0

Definition at line 4406 of file efr32bg21_rac.h .

#define _RAC_SYTRIM0_SYTRIMCHPREGAMPBW_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_SYTRIM0

Definition at line 4402 of file efr32bg21_rac.h .

#define _RAC_SYTRIM0_SYTRIMCHPREGAMPBW_MASK 0x300000UL

Bit mask for RAC_SYTRIMCHPREGAMPBW

Definition at line 4401 of file efr32bg21_rac.h .

#define _RAC_SYTRIM0_SYTRIMCHPREGAMPBW_SHIFT 20

Shift value for RAC_SYTRIMCHPREGAMPBW

Definition at line 4400 of file efr32bg21_rac.h .

#define _RAC_SYTRIM1_MASK 0x0001FFFFUL

Mask for RAC_SYTRIM1

Definition at line 4415 of file efr32bg21_rac.h .

#define _RAC_SYTRIM1_RESETVALUE 0x00003FD0UL

Default value for RAC_SYTRIM1

Definition at line 4414 of file efr32bg21_rac.h .

#define _RAC_SYTRIM1_SYLODIVLDOTRIMCORE_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_SYTRIM1

Definition at line 4418 of file efr32bg21_rac.h .

#define _RAC_SYTRIM1_SYLODIVLDOTRIMCORE_MASK 0x3UL

Bit mask for RAC_SYLODIVLDOTRIMCORE

Definition at line 4417 of file efr32bg21_rac.h .

#define _RAC_SYTRIM1_SYLODIVLDOTRIMCORE_RXLO 0x00000000UL

Mode RXLO for RAC_SYTRIM1

Definition at line 4419 of file efr32bg21_rac.h .

#define _RAC_SYTRIM1_SYLODIVLDOTRIMCORE_SHIFT 0

Shift value for RAC_SYLODIVLDOTRIMCORE

Definition at line 4416 of file efr32bg21_rac.h .

#define _RAC_SYTRIM1_SYLODIVLDOTRIMCORE_TXLO 0x00000003UL

Mode TXLO for RAC_SYTRIM1

Definition at line 4420 of file efr32bg21_rac.h .

#define _RAC_SYTRIM1_SYLODIVLDOTRIMNDIO_DEFAULT 0x00000004UL

Mode DEFAULT for RAC_SYTRIM1

Definition at line 4426 of file efr32bg21_rac.h .

#define _RAC_SYTRIM1_SYLODIVLDOTRIMNDIO_MASK 0x3CUL

Bit mask for RAC_SYLODIVLDOTRIMNDIO

Definition at line 4425 of file efr32bg21_rac.h .

#define _RAC_SYTRIM1_SYLODIVLDOTRIMNDIO_SHIFT 2

Shift value for RAC_SYLODIVLDOTRIMNDIO

Definition at line 4424 of file efr32bg21_rac.h .

#define _RAC_SYTRIM1_SYLODIVLDOTRIMNDIO_vreg_1p08 0x00000000UL

Mode vreg_1p08 for RAC_SYTRIM1

Definition at line 4427 of file efr32bg21_rac.h .

#define _RAC_SYTRIM1_SYLODIVLDOTRIMNDIO_vreg_1p11 0x00000001UL

Mode vreg_1p11 for RAC_SYTRIM1

Definition at line 4428 of file efr32bg21_rac.h .

#define _RAC_SYTRIM1_SYLODIVLDOTRIMNDIO_vreg_1p15 0x00000002UL

Mode vreg_1p15 for RAC_SYTRIM1

Definition at line 4429 of file efr32bg21_rac.h .

#define _RAC_SYTRIM1_SYLODIVLDOTRIMNDIO_vreg_1p18 0x00000003UL

Mode vreg_1p18 for RAC_SYTRIM1

Definition at line 4430 of file efr32bg21_rac.h .

#define _RAC_SYTRIM1_SYLODIVLDOTRIMNDIO_vreg_1p21 0x00000004UL

Mode vreg_1p21 for RAC_SYTRIM1

Definition at line 4431 of file efr32bg21_rac.h .

#define _RAC_SYTRIM1_SYLODIVLDOTRIMNDIO_vreg_1p24 0x00000005UL

Mode vreg_1p24 for RAC_SYTRIM1

Definition at line 4432 of file efr32bg21_rac.h .

#define _RAC_SYTRIM1_SYLODIVLDOTRIMNDIO_vreg_1p27 0x00000006UL

Mode vreg_1p27 for RAC_SYTRIM1

Definition at line 4433 of file efr32bg21_rac.h .

#define _RAC_SYTRIM1_SYLODIVLDOTRIMNDIO_vreg_1p29 0x00000007UL

Mode vreg_1p29 for RAC_SYTRIM1

Definition at line 4434 of file efr32bg21_rac.h .

#define _RAC_SYTRIM1_SYLODIVLDOTRIMNDIO_vreg_1p32 0x00000008UL

Mode vreg_1p32 for RAC_SYTRIM1

Definition at line 4435 of file efr32bg21_rac.h .

#define _RAC_SYTRIM1_SYLODIVLDOTRIMNDIO_vreg_1p34 0x00000009UL

Mode vreg_1p34 for RAC_SYTRIM1

Definition at line 4436 of file efr32bg21_rac.h .

#define _RAC_SYTRIM1_SYMMDREPLICA1CURRADJ_DEFAULT 0x00000007UL

Mode DEFAULT for RAC_SYTRIM1

Definition at line 4450 of file efr32bg21_rac.h .

#define _RAC_SYTRIM1_SYMMDREPLICA1CURRADJ_load_16u 0x00000001UL

Mode load_16u for RAC_SYTRIM1

Definition at line 4452 of file efr32bg21_rac.h .

#define _RAC_SYTRIM1_SYMMDREPLICA1CURRADJ_load_20ua 0x00000002UL

Mode load_20ua for RAC_SYTRIM1

Definition at line 4453 of file efr32bg21_rac.h .

#define _RAC_SYTRIM1_SYMMDREPLICA1CURRADJ_load_24ua 0x00000004UL

Mode load_24ua for RAC_SYTRIM1

Definition at line 4455 of file efr32bg21_rac.h .

#define _RAC_SYTRIM1_SYMMDREPLICA1CURRADJ_load_28ua 0x00000003UL

Mode load_28ua for RAC_SYTRIM1

Definition at line 4454 of file efr32bg21_rac.h .

#define _RAC_SYTRIM1_SYMMDREPLICA1CURRADJ_load_32ua 0x00000005UL

Mode load_32ua for RAC_SYTRIM1

Definition at line 4456 of file efr32bg21_rac.h .

#define _RAC_SYTRIM1_SYMMDREPLICA1CURRADJ_load_36ua 0x00000006UL

Mode load_36ua for RAC_SYTRIM1

Definition at line 4457 of file efr32bg21_rac.h .

#define _RAC_SYTRIM1_SYMMDREPLICA1CURRADJ_load_44ua 0x00000007UL

Mode load_44ua for RAC_SYTRIM1

Definition at line 4458 of file efr32bg21_rac.h .

#define _RAC_SYTRIM1_SYMMDREPLICA1CURRADJ_load_8ua 0x00000000UL

Mode load_8ua for RAC_SYTRIM1

Definition at line 4451 of file efr32bg21_rac.h .

#define _RAC_SYTRIM1_SYMMDREPLICA1CURRADJ_MASK 0x1C0UL

Bit mask for RAC_SYMMDREPLICA1CURRADJ

Definition at line 4449 of file efr32bg21_rac.h .

#define _RAC_SYTRIM1_SYMMDREPLICA1CURRADJ_SHIFT 6

Shift value for RAC_SYMMDREPLICA1CURRADJ

Definition at line 4448 of file efr32bg21_rac.h .

#define _RAC_SYTRIM1_SYMMDREPLICA2CURRADJ_DEFAULT 0x00000007UL

Mode DEFAULT for RAC_SYTRIM1

Definition at line 4470 of file efr32bg21_rac.h .

#define _RAC_SYTRIM1_SYMMDREPLICA2CURRADJ_load_128u 0x00000003UL

Mode load_128u for RAC_SYTRIM1

Definition at line 4474 of file efr32bg21_rac.h .

#define _RAC_SYTRIM1_SYMMDREPLICA2CURRADJ_load_160u 0x00000004UL

Mode load_160u for RAC_SYTRIM1

Definition at line 4475 of file efr32bg21_rac.h .

#define _RAC_SYTRIM1_SYMMDREPLICA2CURRADJ_load_192u 0x00000005UL

Mode load_192u for RAC_SYTRIM1

Definition at line 4476 of file efr32bg21_rac.h .

#define _RAC_SYTRIM1_SYMMDREPLICA2CURRADJ_load_224u 0x00000006UL

Mode load_224u for RAC_SYTRIM1

Definition at line 4477 of file efr32bg21_rac.h .

#define _RAC_SYTRIM1_SYMMDREPLICA2CURRADJ_load_256u 0x00000007UL

Mode load_256u for RAC_SYTRIM1

Definition at line 4478 of file efr32bg21_rac.h .

#define _RAC_SYTRIM1_SYMMDREPLICA2CURRADJ_load_32u 0x00000000UL

Mode load_32u for RAC_SYTRIM1

Definition at line 4471 of file efr32bg21_rac.h .

#define _RAC_SYTRIM1_SYMMDREPLICA2CURRADJ_load_64u 0x00000001UL

Mode load_64u for RAC_SYTRIM1

Definition at line 4472 of file efr32bg21_rac.h .

#define _RAC_SYTRIM1_SYMMDREPLICA2CURRADJ_load_96u 0x00000002UL

Mode load_96u for RAC_SYTRIM1

Definition at line 4473 of file efr32bg21_rac.h .

#define _RAC_SYTRIM1_SYMMDREPLICA2CURRADJ_MASK 0xE00UL

Bit mask for RAC_SYMMDREPLICA2CURRADJ

Definition at line 4469 of file efr32bg21_rac.h .

#define _RAC_SYTRIM1_SYMMDREPLICA2CURRADJ_SHIFT 9

Shift value for RAC_SYMMDREPLICA2CURRADJ

Definition at line 4468 of file efr32bg21_rac.h .

#define _RAC_SYTRIM1_SYTRIMMMDREGAMPBIAS_bias_14uA 0x00000000UL

Mode bias_14uA for RAC_SYTRIM1

Definition at line 4491 of file efr32bg21_rac.h .

#define _RAC_SYTRIM1_SYTRIMMMDREGAMPBIAS_bias_20uA 0x00000001UL

Mode bias_20uA for RAC_SYTRIM1

Definition at line 4492 of file efr32bg21_rac.h .

#define _RAC_SYTRIM1_SYTRIMMMDREGAMPBIAS_bias_26uA 0x00000002UL

Mode bias_26uA for RAC_SYTRIM1

Definition at line 4493 of file efr32bg21_rac.h .

#define _RAC_SYTRIM1_SYTRIMMMDREGAMPBIAS_bias_32uA 0x00000003UL

Mode bias_32uA for RAC_SYTRIM1

Definition at line 4494 of file efr32bg21_rac.h .

#define _RAC_SYTRIM1_SYTRIMMMDREGAMPBIAS_bias_38uA 0x00000004UL

Mode bias_38uA for RAC_SYTRIM1

Definition at line 4495 of file efr32bg21_rac.h .

#define _RAC_SYTRIM1_SYTRIMMMDREGAMPBIAS_bias_44uA 0x00000005UL

Mode bias_44uA for RAC_SYTRIM1

Definition at line 4496 of file efr32bg21_rac.h .

#define _RAC_SYTRIM1_SYTRIMMMDREGAMPBIAS_bias_50uA 0x00000006UL

Mode bias_50uA for RAC_SYTRIM1

Definition at line 4497 of file efr32bg21_rac.h .

#define _RAC_SYTRIM1_SYTRIMMMDREGAMPBIAS_bias_56uA 0x00000007UL

Mode bias_56uA for RAC_SYTRIM1

Definition at line 4498 of file efr32bg21_rac.h .

#define _RAC_SYTRIM1_SYTRIMMMDREGAMPBIAS_DEFAULT 0x00000003UL

Mode DEFAULT for RAC_SYTRIM1

Definition at line 4490 of file efr32bg21_rac.h .

#define _RAC_SYTRIM1_SYTRIMMMDREGAMPBIAS_MASK 0x7000UL

Bit mask for RAC_SYTRIMMMDREGAMPBIAS

Definition at line 4489 of file efr32bg21_rac.h .

#define _RAC_SYTRIM1_SYTRIMMMDREGAMPBIAS_SHIFT 12

Shift value for RAC_SYTRIMMMDREGAMPBIAS

Definition at line 4488 of file efr32bg21_rac.h .

#define _RAC_SYTRIM1_SYTRIMMMDREGAMPBW_C_000f 0x00000000UL

Mode C_000f for RAC_SYTRIM1

Definition at line 4511 of file efr32bg21_rac.h .

#define _RAC_SYTRIM1_SYTRIMMMDREGAMPBW_C_300f 0x00000001UL

Mode C_300f for RAC_SYTRIM1

Definition at line 4512 of file efr32bg21_rac.h .

#define _RAC_SYTRIM1_SYTRIMMMDREGAMPBW_C_600f 0x00000002UL

Mode C_600f for RAC_SYTRIM1

Definition at line 4513 of file efr32bg21_rac.h .

#define _RAC_SYTRIM1_SYTRIMMMDREGAMPBW_C_900f 0x00000003UL

Mode C_900f for RAC_SYTRIM1

Definition at line 4514 of file efr32bg21_rac.h .

#define _RAC_SYTRIM1_SYTRIMMMDREGAMPBW_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_SYTRIM1

Definition at line 4510 of file efr32bg21_rac.h .

#define _RAC_SYTRIM1_SYTRIMMMDREGAMPBW_MASK 0x18000UL

Bit mask for RAC_SYTRIMMMDREGAMPBW

Definition at line 4509 of file efr32bg21_rac.h .

#define _RAC_SYTRIM1_SYTRIMMMDREGAMPBW_SHIFT 15

Shift value for RAC_SYTRIMMMDREGAMPBW

Definition at line 4508 of file efr32bg21_rac.h .

#define _RAC_TESTCTRL_AUX2RFSENSE_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_TESTCTRL

Definition at line 852 of file efr32bg21_rac.h .

#define _RAC_TESTCTRL_AUX2RFSENSE_MASK 0x4UL

Bit mask for RAC_AUX2RFSENSE

Definition at line 851 of file efr32bg21_rac.h .

#define _RAC_TESTCTRL_AUX2RFSENSE_SHIFT 2

Shift value for RAC_AUX2RFSENSE

Definition at line 850 of file efr32bg21_rac.h .

#define _RAC_TESTCTRL_AUX2RFSENSE_X0 0x00000000UL

Mode X0 for RAC_TESTCTRL

Definition at line 853 of file efr32bg21_rac.h .

#define _RAC_TESTCTRL_AUX2RFSENSE_X1 0x00000001UL

Mode X1 for RAC_TESTCTRL

Definition at line 854 of file efr32bg21_rac.h .

#define _RAC_TESTCTRL_DEMODEN_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_TESTCTRL

Definition at line 847 of file efr32bg21_rac.h .

#define _RAC_TESTCTRL_DEMODEN_MASK 0x2UL

Bit mask for RAC_DEMODEN

Definition at line 846 of file efr32bg21_rac.h .

#define _RAC_TESTCTRL_DEMODEN_SHIFT 1

Shift value for RAC_DEMODEN

Definition at line 845 of file efr32bg21_rac.h .

#define _RAC_TESTCTRL_LOOPBACK2LNAINPUT_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_TESTCTRL

Definition at line 861 of file efr32bg21_rac.h .

#define _RAC_TESTCTRL_LOOPBACK2LNAINPUT_MASK 0x8UL

Bit mask for RAC_LOOPBACK2LNAINPUT

Definition at line 860 of file efr32bg21_rac.h .

#define _RAC_TESTCTRL_LOOPBACK2LNAINPUT_SHIFT 3

Shift value for RAC_LOOPBACK2LNAINPUT

Definition at line 859 of file efr32bg21_rac.h .

#define _RAC_TESTCTRL_LOOPBACK2LNAOUTPUT_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_TESTCTRL

Definition at line 866 of file efr32bg21_rac.h .

#define _RAC_TESTCTRL_LOOPBACK2LNAOUTPUT_MASK 0x10UL

Bit mask for RAC_LOOPBACK2LNAOUTPUT

Definition at line 865 of file efr32bg21_rac.h .

#define _RAC_TESTCTRL_LOOPBACK2LNAOUTPUT_SHIFT 4

Shift value for RAC_LOOPBACK2LNAOUTPUT

Definition at line 864 of file efr32bg21_rac.h .

#define _RAC_TESTCTRL_MASK 0x0000001FUL

Mask for RAC_TESTCTRL

Definition at line 838 of file efr32bg21_rac.h .

#define _RAC_TESTCTRL_MODEN_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_TESTCTRL

Definition at line 842 of file efr32bg21_rac.h .

#define _RAC_TESTCTRL_MODEN_MASK 0x1UL

Bit mask for RAC_MODEN

Definition at line 841 of file efr32bg21_rac.h .

#define _RAC_TESTCTRL_MODEN_SHIFT 0

Shift value for RAC_MODEN

Definition at line 840 of file efr32bg21_rac.h .

#define _RAC_TESTCTRL_RESETVALUE 0x00000000UL

Default value for RAC_TESTCTRL

Definition at line 837 of file efr32bg21_rac.h .

#define _RAC_TX_ENPAPOWER_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_TX

Definition at line 4284 of file efr32bg21_rac.h .

#define _RAC_TX_ENPAPOWER_MASK 0x40000000UL

Bit mask for RAC_ENPAPOWER

Definition at line 4283 of file efr32bg21_rac.h .

#define _RAC_TX_ENPAPOWER_SHIFT 30

Shift value for RAC_ENPAPOWER

Definition at line 4282 of file efr32bg21_rac.h .

#define _RAC_TX_ENPASELSLICE_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_TX

Definition at line 4289 of file efr32bg21_rac.h .

#define _RAC_TX_ENPASELSLICE_MASK 0x80000000UL

Bit mask for RAC_ENPASELSLICE

Definition at line 4288 of file efr32bg21_rac.h .

#define _RAC_TX_ENPASELSLICE_SHIFT 31

Shift value for RAC_ENPASELSLICE

Definition at line 4287 of file efr32bg21_rac.h .

#define _RAC_TX_ENPATRIMPASLICE0DBM_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_TX

Definition at line 4184 of file efr32bg21_rac.h .

#define _RAC_TX_ENPATRIMPASLICE0DBM_MASK 0x400UL

Bit mask for RAC_ENPATRIMPASLICE0DBM

Definition at line 4183 of file efr32bg21_rac.h .

#define _RAC_TX_ENPATRIMPASLICE0DBM_SHIFT 10

Shift value for RAC_ENPATRIMPASLICE0DBM

Definition at line 4182 of file efr32bg21_rac.h .

#define _RAC_TX_ENXOSQBUFFILT_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_TX

Definition at line 4279 of file efr32bg21_rac.h .

#define _RAC_TX_ENXOSQBUFFILT_MASK 0x20000000UL

Bit mask for RAC_ENXOSQBUFFILT

Definition at line 4278 of file efr32bg21_rac.h .

#define _RAC_TX_ENXOSQBUFFILT_SHIFT 29

Shift value for RAC_ENXOSQBUFFILT

Definition at line 4277 of file efr32bg21_rac.h .

#define _RAC_TX_MASK 0xFF3707FFUL

Mask for RAC_TX

Definition at line 4097 of file efr32bg21_rac.h .

#define _RAC_TX_PABLEEDDRVREG0DBM_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_TX

Definition at line 4101 of file efr32bg21_rac.h .

#define _RAC_TX_PABLEEDDRVREG0DBM_disable 0x00000000UL

Mode disable for RAC_TX

Definition at line 4102 of file efr32bg21_rac.h .

#define _RAC_TX_PABLEEDDRVREG0DBM_enable 0x00000001UL

Mode enable for RAC_TX

Definition at line 4103 of file efr32bg21_rac.h .

#define _RAC_TX_PABLEEDDRVREG0DBM_MASK 0x1UL

Bit mask for RAC_PABLEEDDRVREG0DBM

Definition at line 4100 of file efr32bg21_rac.h .

#define _RAC_TX_PABLEEDDRVREG0DBM_SHIFT 0

Shift value for RAC_PABLEEDDRVREG0DBM

Definition at line 4099 of file efr32bg21_rac.h .

#define _RAC_TX_PABLEEDREG0DBM_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_TX

Definition at line 4110 of file efr32bg21_rac.h .

#define _RAC_TX_PABLEEDREG0DBM_disable 0x00000000UL

Mode disable for RAC_TX

Definition at line 4111 of file efr32bg21_rac.h .

#define _RAC_TX_PABLEEDREG0DBM_enable 0x00000001UL

Mode enable for RAC_TX

Definition at line 4112 of file efr32bg21_rac.h .

#define _RAC_TX_PABLEEDREG0DBM_MASK 0x2UL

Bit mask for RAC_PABLEEDREG0DBM

Definition at line 4109 of file efr32bg21_rac.h .

#define _RAC_TX_PABLEEDREG0DBM_SHIFT 1

Shift value for RAC_PABLEEDREG0DBM

Definition at line 4108 of file efr32bg21_rac.h .

#define _RAC_TX_PAEN10DBMM_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_TX

Definition at line 4189 of file efr32bg21_rac.h .

#define _RAC_TX_PAEN10DBMM_disable 0x00000000UL

Mode disable for RAC_TX

Definition at line 4190 of file efr32bg21_rac.h .

#define _RAC_TX_PAEN10DBMM_enable 0x00000001UL

Mode enable for RAC_TX

Definition at line 4191 of file efr32bg21_rac.h .

#define _RAC_TX_PAEN10DBMM_MASK 0x10000UL

Bit mask for RAC_PAEN10DBMM

Definition at line 4188 of file efr32bg21_rac.h .

#define _RAC_TX_PAEN10DBMM_SHIFT 16

Shift value for RAC_PAEN10DBMM

Definition at line 4187 of file efr32bg21_rac.h .

#define _RAC_TX_PAEN10DBMP_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_TX

Definition at line 4198 of file efr32bg21_rac.h .

#define _RAC_TX_PAEN10DBMP_disable 0x00000000UL

Mode disable for RAC_TX

Definition at line 4199 of file efr32bg21_rac.h .

#define _RAC_TX_PAEN10DBMP_enable 0x00000001UL

Mode enable for RAC_TX

Definition at line 4200 of file efr32bg21_rac.h .

#define _RAC_TX_PAEN10DBMP_MASK 0x20000UL

Bit mask for RAC_PAEN10DBMP

Definition at line 4197 of file efr32bg21_rac.h .

#define _RAC_TX_PAEN10DBMP_SHIFT 17

Shift value for RAC_PAEN10DBMP

Definition at line 4196 of file efr32bg21_rac.h .

#define _RAC_TX_PAEN10DBMPDRV_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_TX

Definition at line 4207 of file efr32bg21_rac.h .

#define _RAC_TX_PAEN10DBMPDRV_disable 0x00000000UL

Mode disable for RAC_TX

Definition at line 4208 of file efr32bg21_rac.h .

#define _RAC_TX_PAEN10DBMPDRV_enable 0x00000001UL

Mode enable for RAC_TX

Definition at line 4209 of file efr32bg21_rac.h .

#define _RAC_TX_PAEN10DBMPDRV_MASK 0x40000UL

Bit mask for RAC_PAEN10DBMPDRV

Definition at line 4206 of file efr32bg21_rac.h .

#define _RAC_TX_PAEN10DBMPDRV_SHIFT 18

Shift value for RAC_PAEN10DBMPDRV

Definition at line 4205 of file efr32bg21_rac.h .

#define _RAC_TX_PAEN20DBM_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_TX

Definition at line 4216 of file efr32bg21_rac.h .

#define _RAC_TX_PAEN20DBM_disable 0x00000000UL

Mode disable for RAC_TX

Definition at line 4217 of file efr32bg21_rac.h .

#define _RAC_TX_PAEN20DBM_enable 0x00000001UL

Mode enable for RAC_TX

Definition at line 4218 of file efr32bg21_rac.h .

#define _RAC_TX_PAEN20DBM_MASK 0x100000UL

Bit mask for RAC_PAEN20DBM

Definition at line 4215 of file efr32bg21_rac.h .

#define _RAC_TX_PAEN20DBM_SHIFT 20

Shift value for RAC_PAEN20DBM

Definition at line 4214 of file efr32bg21_rac.h .

#define _RAC_TX_PAEN20DBMPDRV_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_TX

Definition at line 4225 of file efr32bg21_rac.h .

#define _RAC_TX_PAEN20DBMPDRV_disable 0x00000000UL

Mode disable for RAC_TX

Definition at line 4226 of file efr32bg21_rac.h .

#define _RAC_TX_PAEN20DBMPDRV_enable 0x00000001UL

Mode enable for RAC_TX

Definition at line 4227 of file efr32bg21_rac.h .

#define _RAC_TX_PAEN20DBMPDRV_MASK 0x200000UL

Bit mask for RAC_PAEN20DBMPDRV

Definition at line 4224 of file efr32bg21_rac.h .

#define _RAC_TX_PAEN20DBMPDRV_SHIFT 21

Shift value for RAC_PAEN20DBMPDRV

Definition at line 4223 of file efr32bg21_rac.h .

#define _RAC_TX_PAENBIAS0DBM_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_TX

Definition at line 4119 of file efr32bg21_rac.h .

#define _RAC_TX_PAENBIAS0DBM_disable 0x00000000UL

Mode disable for RAC_TX

Definition at line 4120 of file efr32bg21_rac.h .

#define _RAC_TX_PAENBIAS0DBM_enable 0x00000001UL

Mode enable for RAC_TX

Definition at line 4121 of file efr32bg21_rac.h .

#define _RAC_TX_PAENBIAS0DBM_MASK 0x4UL

Bit mask for RAC_PAENBIAS0DBM

Definition at line 4118 of file efr32bg21_rac.h .

#define _RAC_TX_PAENBIAS0DBM_SHIFT 2

Shift value for RAC_PAENBIAS0DBM

Definition at line 4117 of file efr32bg21_rac.h .

#define _RAC_TX_PAENBLEEDPDRVLDO_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_TX

Definition at line 4234 of file efr32bg21_rac.h .

#define _RAC_TX_PAENBLEEDPDRVLDO_disable 0x00000000UL

Mode disable for RAC_TX

Definition at line 4235 of file efr32bg21_rac.h .

#define _RAC_TX_PAENBLEEDPDRVLDO_enable 0x00000001UL

Mode enable for RAC_TX

Definition at line 4236 of file efr32bg21_rac.h .

#define _RAC_TX_PAENBLEEDPDRVLDO_MASK 0x1000000UL

Bit mask for RAC_PAENBLEEDPDRVLDO

Definition at line 4233 of file efr32bg21_rac.h .

#define _RAC_TX_PAENBLEEDPDRVLDO_SHIFT 24

Shift value for RAC_PAENBLEEDPDRVLDO

Definition at line 4232 of file efr32bg21_rac.h .

#define _RAC_TX_PAENBLEEDPREREG_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_TX

Definition at line 4243 of file efr32bg21_rac.h .

#define _RAC_TX_PAENBLEEDPREREG_disable 0x00000000UL

Mode disable for RAC_TX

Definition at line 4244 of file efr32bg21_rac.h .

#define _RAC_TX_PAENBLEEDPREREG_enable 0x00000001UL

Mode enable for RAC_TX

Definition at line 4245 of file efr32bg21_rac.h .

#define _RAC_TX_PAENBLEEDPREREG_MASK 0x2000000UL

Bit mask for RAC_PAENBLEEDPREREG

Definition at line 4242 of file efr32bg21_rac.h .

#define _RAC_TX_PAENBLEEDPREREG_SHIFT 25

Shift value for RAC_PAENBLEEDPREREG

Definition at line 4241 of file efr32bg21_rac.h .

#define _RAC_TX_PAENDRVREG0DBM_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_TX

Definition at line 4128 of file efr32bg21_rac.h .

#define _RAC_TX_PAENDRVREG0DBM_disable 0x00000000UL

Mode disable for RAC_TX

Definition at line 4129 of file efr32bg21_rac.h .

#define _RAC_TX_PAENDRVREG0DBM_enable 0x00000001UL

Mode enable for RAC_TX

Definition at line 4130 of file efr32bg21_rac.h .

#define _RAC_TX_PAENDRVREG0DBM_MASK 0x8UL

Bit mask for RAC_PAENDRVREG0DBM

Definition at line 4127 of file efr32bg21_rac.h .

#define _RAC_TX_PAENDRVREG0DBM_SHIFT 3

Shift value for RAC_PAENDRVREG0DBM

Definition at line 4126 of file efr32bg21_rac.h .

#define _RAC_TX_PAENDRVREGBIAS0DBM_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_TX

Definition at line 4137 of file efr32bg21_rac.h .

#define _RAC_TX_PAENDRVREGBIAS0DBM_disable 0x00000000UL

Mode disable for RAC_TX

Definition at line 4138 of file efr32bg21_rac.h .

#define _RAC_TX_PAENDRVREGBIAS0DBM_enable 0x00000001UL

Mode enable for RAC_TX

Definition at line 4139 of file efr32bg21_rac.h .

#define _RAC_TX_PAENDRVREGBIAS0DBM_MASK 0x10UL

Bit mask for RAC_PAENDRVREGBIAS0DBM

Definition at line 4136 of file efr32bg21_rac.h .

#define _RAC_TX_PAENDRVREGBIAS0DBM_SHIFT 4

Shift value for RAC_PAENDRVREGBIAS0DBM

Definition at line 4135 of file efr32bg21_rac.h .

#define _RAC_TX_PAENLDOHVPDRVLDO_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_TX

Definition at line 4252 of file efr32bg21_rac.h .

#define _RAC_TX_PAENLDOHVPDRVLDO_disable 0x00000000UL

Mode disable for RAC_TX

Definition at line 4253 of file efr32bg21_rac.h .

#define _RAC_TX_PAENLDOHVPDRVLDO_enable 0x00000001UL

Mode enable for RAC_TX

Definition at line 4254 of file efr32bg21_rac.h .

#define _RAC_TX_PAENLDOHVPDRVLDO_MASK 0x4000000UL

Bit mask for RAC_PAENLDOHVPDRVLDO

Definition at line 4251 of file efr32bg21_rac.h .

#define _RAC_TX_PAENLDOHVPDRVLDO_SHIFT 26

Shift value for RAC_PAENLDOHVPDRVLDO

Definition at line 4250 of file efr32bg21_rac.h .

#define _RAC_TX_PAENLDOHVPREREG_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_TX

Definition at line 4261 of file efr32bg21_rac.h .

#define _RAC_TX_PAENLDOHVPREREG_disable 0x00000000UL

Mode disable for RAC_TX

Definition at line 4262 of file efr32bg21_rac.h .

#define _RAC_TX_PAENLDOHVPREREG_enable 0x00000001UL

Mode enable for RAC_TX

Definition at line 4263 of file efr32bg21_rac.h .

#define _RAC_TX_PAENLDOHVPREREG_MASK 0x8000000UL

Bit mask for RAC_PAENLDOHVPREREG

Definition at line 4260 of file efr32bg21_rac.h .

#define _RAC_TX_PAENLDOHVPREREG_SHIFT 27

Shift value for RAC_PAENLDOHVPREREG

Definition at line 4259 of file efr32bg21_rac.h .

#define _RAC_TX_PAENLO0DBM_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_TX

Definition at line 4146 of file efr32bg21_rac.h .

#define _RAC_TX_PAENLO0DBM_disable 0x00000000UL

Mode disable for RAC_TX

Definition at line 4147 of file efr32bg21_rac.h .

#define _RAC_TX_PAENLO0DBM_enable 0x00000001UL

Mode enable for RAC_TX

Definition at line 4148 of file efr32bg21_rac.h .

#define _RAC_TX_PAENLO0DBM_MASK 0x20UL

Bit mask for RAC_PAENLO0DBM

Definition at line 4145 of file efr32bg21_rac.h .

#define _RAC_TX_PAENLO0DBM_SHIFT 5

Shift value for RAC_PAENLO0DBM

Definition at line 4144 of file efr32bg21_rac.h .

#define _RAC_TX_PAENPAOUT_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_TX

Definition at line 4270 of file efr32bg21_rac.h .

#define _RAC_TX_PAENPAOUT_disable 0x00000000UL

Mode disable for RAC_TX

Definition at line 4271 of file efr32bg21_rac.h .

#define _RAC_TX_PAENPAOUT_enable 0x00000001UL

Mode enable for RAC_TX

Definition at line 4272 of file efr32bg21_rac.h .

#define _RAC_TX_PAENPAOUT_MASK 0x10000000UL

Bit mask for RAC_PAENPAOUT

Definition at line 4269 of file efr32bg21_rac.h .

#define _RAC_TX_PAENPAOUT_SHIFT 28

Shift value for RAC_PAENPAOUT

Definition at line 4268 of file efr32bg21_rac.h .

#define _RAC_TX_PAENREG0DBM_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_TX

Definition at line 4155 of file efr32bg21_rac.h .

#define _RAC_TX_PAENREG0DBM_disable 0x00000000UL

Mode disable for RAC_TX

Definition at line 4156 of file efr32bg21_rac.h .

#define _RAC_TX_PAENREG0DBM_enable 0x00000001UL

Mode enable for RAC_TX

Definition at line 4157 of file efr32bg21_rac.h .

#define _RAC_TX_PAENREG0DBM_MASK 0x40UL

Bit mask for RAC_PAENREG0DBM

Definition at line 4154 of file efr32bg21_rac.h .

#define _RAC_TX_PAENREG0DBM_SHIFT 6

Shift value for RAC_PAENREG0DBM

Definition at line 4153 of file efr32bg21_rac.h .

#define _RAC_TX_PAENTAPCAP0DBM_cap_0f 0x00000000UL

Mode cap_0f for RAC_TX

Definition at line 4164 of file efr32bg21_rac.h .

#define _RAC_TX_PAENTAPCAP0DBM_cap_0p35pF 0x00000001UL

Mode cap_0p35pF for RAC_TX

Definition at line 4165 of file efr32bg21_rac.h .

#define _RAC_TX_PAENTAPCAP0DBM_cap_0p7pF 0x00000002UL

Mode cap_0p7pF for RAC_TX

Definition at line 4166 of file efr32bg21_rac.h .

#define _RAC_TX_PAENTAPCAP0DBM_cap_1p05pF 0x00000003UL

Mode cap_1p05pF for RAC_TX

Definition at line 4167 of file efr32bg21_rac.h .

#define _RAC_TX_PAENTAPCAP0DBM_cap_1p4pF 0x00000004UL

Mode cap_1p4pF for RAC_TX

Definition at line 4168 of file efr32bg21_rac.h .

#define _RAC_TX_PAENTAPCAP0DBM_cap_1p75pF 0x00000005UL

Mode cap_1p75pF for RAC_TX

Definition at line 4169 of file efr32bg21_rac.h .

#define _RAC_TX_PAENTAPCAP0DBM_cap_2p1pF 0x00000006UL

Mode cap_2p1pF for RAC_TX

Definition at line 4170 of file efr32bg21_rac.h .

#define _RAC_TX_PAENTAPCAP0DBM_cap_2p45pF 0x00000007UL

Mode cap_2p45pF for RAC_TX

Definition at line 4171 of file efr32bg21_rac.h .

#define _RAC_TX_PAENTAPCAP0DBM_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_TX

Definition at line 4163 of file efr32bg21_rac.h .

#define _RAC_TX_PAENTAPCAP0DBM_MASK 0x380UL

Bit mask for RAC_PAENTAPCAP0DBM

Definition at line 4162 of file efr32bg21_rac.h .

#define _RAC_TX_PAENTAPCAP0DBM_SHIFT 7

Shift value for RAC_PAENTAPCAP0DBM

Definition at line 4161 of file efr32bg21_rac.h .

#define _RAC_TX_RESETVALUE 0x00000000UL

Default value for RAC_TX

Definition at line 4096 of file efr32bg21_rac.h .

#define _RAC_VCOCTRL_MASK 0x000000FFUL

Mask for RAC_VCOCTRL

Definition at line 1297 of file efr32bg21_rac.h .

#define _RAC_VCOCTRL_RESETVALUE 0x0000004CUL

Default value for RAC_VCOCTRL

Definition at line 1296 of file efr32bg21_rac.h .

#define _RAC_VCOCTRL_VCOAMPLITUDE_DEFAULT 0x0000000CUL

Mode DEFAULT for RAC_VCOCTRL

Definition at line 1300 of file efr32bg21_rac.h .

#define _RAC_VCOCTRL_VCOAMPLITUDE_MASK 0xFUL

Bit mask for RAC_VCOAMPLITUDE

Definition at line 1299 of file efr32bg21_rac.h .

#define _RAC_VCOCTRL_VCOAMPLITUDE_SHIFT 0

Shift value for RAC_VCOAMPLITUDE

Definition at line 1298 of file efr32bg21_rac.h .

#define _RAC_VCOCTRL_VCODETAMPLITUDE_DEFAULT 0x00000004UL

Mode DEFAULT for RAC_VCOCTRL

Definition at line 1304 of file efr32bg21_rac.h .

#define _RAC_VCOCTRL_VCODETAMPLITUDE_MASK 0xF0UL

Bit mask for RAC_VCODETAMPLITUDE

Definition at line 1303 of file efr32bg21_rac.h .

#define _RAC_VCOCTRL_VCODETAMPLITUDE_SHIFT 4

Shift value for RAC_VCODETAMPLITUDE

Definition at line 1302 of file efr32bg21_rac.h .

#define _RAC_VECTADDR_MASK 0xFFFFFFFFUL

Mask for RAC_VECTADDR

Definition at line 1122 of file efr32bg21_rac.h .

#define _RAC_VECTADDR_RESETVALUE 0x00000000UL

Default value for RAC_VECTADDR

Definition at line 1121 of file efr32bg21_rac.h .

#define _RAC_VECTADDR_VECTADDR_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_VECTADDR

Definition at line 1125 of file efr32bg21_rac.h .

#define _RAC_VECTADDR_VECTADDR_MASK 0xFFFFFFFFUL

Bit mask for RAC_VECTADDR

Definition at line 1124 of file efr32bg21_rac.h .

#define _RAC_VECTADDR_VECTADDR_SHIFT 0

Shift value for RAC_VECTADDR

Definition at line 1123 of file efr32bg21_rac.h .

#define _RAC_WAITMASK_ANTSWITCH_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_WAITMASK

Definition at line 1093 of file efr32bg21_rac.h .

#define _RAC_WAITMASK_ANTSWITCH_MASK 0x100UL

Bit mask for RAC_ANTSWITCH

Definition at line 1092 of file efr32bg21_rac.h .

#define _RAC_WAITMASK_ANTSWITCH_SHIFT 8

Shift value for RAC_ANTSWITCH

Definition at line 1091 of file efr32bg21_rac.h .

#define _RAC_WAITMASK_DEMODRXREQCLR_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_WAITMASK

Definition at line 1073 of file efr32bg21_rac.h .

#define _RAC_WAITMASK_DEMODRXREQCLR_MASK 0x10UL

Bit mask for RAC_DEMODRXREQCLR

Definition at line 1072 of file efr32bg21_rac.h .

#define _RAC_WAITMASK_DEMODRXREQCLR_SHIFT 4

Shift value for RAC_DEMODRXREQCLR

Definition at line 1071 of file efr32bg21_rac.h .

#define _RAC_WAITMASK_FRCPAUSED_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_WAITMASK

Definition at line 1088 of file efr32bg21_rac.h .

#define _RAC_WAITMASK_FRCPAUSED_MASK 0x80UL

Bit mask for RAC_FRCPAUSED

Definition at line 1087 of file efr32bg21_rac.h .

#define _RAC_WAITMASK_FRCPAUSED_SHIFT 7

Shift value for RAC_FRCPAUSED

Definition at line 1086 of file efr32bg21_rac.h .

#define _RAC_WAITMASK_FRCRX_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_WAITMASK

Definition at line 1058 of file efr32bg21_rac.h .

#define _RAC_WAITMASK_FRCRX_MASK 0x2UL

Bit mask for RAC_FRCRX

Definition at line 1057 of file efr32bg21_rac.h .

#define _RAC_WAITMASK_FRCRX_SHIFT 1

Shift value for RAC_FRCRX

Definition at line 1056 of file efr32bg21_rac.h .

#define _RAC_WAITMASK_FRCTX_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_WAITMASK

Definition at line 1063 of file efr32bg21_rac.h .

#define _RAC_WAITMASK_FRCTX_MASK 0x4UL

Bit mask for RAC_FRCTX

Definition at line 1062 of file efr32bg21_rac.h .

#define _RAC_WAITMASK_FRCTX_SHIFT 2

Shift value for RAC_FRCTX

Definition at line 1061 of file efr32bg21_rac.h .

#define _RAC_WAITMASK_MASK 0x000001FFUL

Mask for RAC_WAITMASK

Definition at line 1049 of file efr32bg21_rac.h .

#define _RAC_WAITMASK_PRSEVENT_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_WAITMASK

Definition at line 1068 of file efr32bg21_rac.h .

#define _RAC_WAITMASK_PRSEVENT_MASK 0x8UL

Bit mask for RAC_PRSEVENT

Definition at line 1067 of file efr32bg21_rac.h .

#define _RAC_WAITMASK_PRSEVENT_SHIFT 3

Shift value for RAC_PRSEVENT

Definition at line 1066 of file efr32bg21_rac.h .

#define _RAC_WAITMASK_RAMPDONE_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_WAITMASK

Definition at line 1083 of file efr32bg21_rac.h .

#define _RAC_WAITMASK_RAMPDONE_MASK 0x40UL

Bit mask for RAC_RAMPDONE

Definition at line 1082 of file efr32bg21_rac.h .

#define _RAC_WAITMASK_RAMPDONE_SHIFT 6

Shift value for RAC_RAMPDONE

Definition at line 1081 of file efr32bg21_rac.h .

#define _RAC_WAITMASK_RESETVALUE 0x00000000UL

Default value for RAC_WAITMASK

Definition at line 1048 of file efr32bg21_rac.h .

#define _RAC_WAITMASK_STCMP_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_WAITMASK

Definition at line 1053 of file efr32bg21_rac.h .

#define _RAC_WAITMASK_STCMP_MASK 0x1UL

Bit mask for RAC_STCMP

Definition at line 1052 of file efr32bg21_rac.h .

#define _RAC_WAITMASK_STCMP_SHIFT 0

Shift value for RAC_STCMP

Definition at line 1051 of file efr32bg21_rac.h .

#define _RAC_WAITMASK_SYNTHRDY_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_WAITMASK

Definition at line 1078 of file efr32bg21_rac.h .

#define _RAC_WAITMASK_SYNTHRDY_MASK 0x20UL

Bit mask for RAC_SYNTHRDY

Definition at line 1077 of file efr32bg21_rac.h .

#define _RAC_WAITMASK_SYNTHRDY_SHIFT 5

Shift value for RAC_SYNTHRDY

Definition at line 1076 of file efr32bg21_rac.h .

#define _RAC_WAITSNSH_MASK 0x000003FFUL

Mask for RAC_WAITSNSH

Definition at line 1098 of file efr32bg21_rac.h .

#define _RAC_WAITSNSH_RESETVALUE 0x00000000UL

Default value for RAC_WAITSNSH

Definition at line 1097 of file efr32bg21_rac.h .

#define _RAC_WAITSNSH_WAITSNSH_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_WAITSNSH

Definition at line 1101 of file efr32bg21_rac.h .

#define _RAC_WAITSNSH_WAITSNSH_MASK 0x3FFUL

Bit mask for RAC_WAITSNSH

Definition at line 1100 of file efr32bg21_rac.h .

#define _RAC_WAITSNSH_WAITSNSH_SHIFT 0

Shift value for RAC_WAITSNSH

Definition at line 1099 of file efr32bg21_rac.h .

#define _RAC_XORETIMECTRL_MASK 0x00000777UL

Mask for RAC_XORETIMECTRL

Definition at line 4862 of file efr32bg21_rac.h .

#define _RAC_XORETIMECTRL_RESETVALUE 0x00000000UL

Default value for RAC_XORETIMECTRL

Definition at line 4861 of file efr32bg21_rac.h .

#define _RAC_XORETIMECTRL_XORETIMEDISRETIME_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_XORETIMECTRL

Definition at line 4875 of file efr32bg21_rac.h .

#define _RAC_XORETIMECTRL_XORETIMEDISRETIME_disable_retime 0x00000001UL

Mode disable_retime for RAC_XORETIMECTRL

Definition at line 4877 of file efr32bg21_rac.h .

#define _RAC_XORETIMECTRL_XORETIMEDISRETIME_enable_retime 0x00000000UL

Mode enable_retime for RAC_XORETIMECTRL

Definition at line 4876 of file efr32bg21_rac.h .

#define _RAC_XORETIMECTRL_XORETIMEDISRETIME_MASK 0x2UL

Bit mask for RAC_XORETIMEDISRETIME

Definition at line 4874 of file efr32bg21_rac.h .

#define _RAC_XORETIMECTRL_XORETIMEDISRETIME_SHIFT 1

Shift value for RAC_XORETIMEDISRETIME

Definition at line 4873 of file efr32bg21_rac.h .

#define _RAC_XORETIMECTRL_XORETIMEENRETIME_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_XORETIMECTRL

Definition at line 4866 of file efr32bg21_rac.h .

#define _RAC_XORETIMECTRL_XORETIMEENRETIME_disable 0x00000000UL

Mode disable for RAC_XORETIMECTRL

Definition at line 4867 of file efr32bg21_rac.h .

#define _RAC_XORETIMECTRL_XORETIMEENRETIME_enable 0x00000001UL

Mode enable for RAC_XORETIMECTRL

Definition at line 4868 of file efr32bg21_rac.h .

#define _RAC_XORETIMECTRL_XORETIMEENRETIME_MASK 0x1UL

Bit mask for RAC_XORETIMEENRETIME

Definition at line 4865 of file efr32bg21_rac.h .

#define _RAC_XORETIMECTRL_XORETIMEENRETIME_SHIFT 0

Shift value for RAC_XORETIMEENRETIME

Definition at line 4864 of file efr32bg21_rac.h .

#define _RAC_XORETIMECTRL_XORETIMELIMITH_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_XORETIMECTRL

Definition at line 4892 of file efr32bg21_rac.h .

#define _RAC_XORETIMECTRL_XORETIMELIMITH_MASK 0x70UL

Bit mask for RAC_XORETIMELIMITH

Definition at line 4891 of file efr32bg21_rac.h .

#define _RAC_XORETIMECTRL_XORETIMELIMITH_SHIFT 4

Shift value for RAC_XORETIMELIMITH

Definition at line 4890 of file efr32bg21_rac.h .

#define _RAC_XORETIMECTRL_XORETIMELIMITL_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_XORETIMECTRL

Definition at line 4896 of file efr32bg21_rac.h .

#define _RAC_XORETIMECTRL_XORETIMELIMITL_MASK 0x700UL

Bit mask for RAC_XORETIMELIMITL

Definition at line 4895 of file efr32bg21_rac.h .

#define _RAC_XORETIMECTRL_XORETIMELIMITL_SHIFT 8

Shift value for RAC_XORETIMELIMITL

Definition at line 4894 of file efr32bg21_rac.h .

#define _RAC_XORETIMECTRL_XORETIMERESETN_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_XORETIMECTRL

Definition at line 4884 of file efr32bg21_rac.h .

#define _RAC_XORETIMECTRL_XORETIMERESETN_MASK 0x4UL

Bit mask for RAC_XORETIMERESETN

Definition at line 4883 of file efr32bg21_rac.h .

#define _RAC_XORETIMECTRL_XORETIMERESETN_operate 0x00000000UL

Mode operate for RAC_XORETIMECTRL

Definition at line 4885 of file efr32bg21_rac.h .

#define _RAC_XORETIMECTRL_XORETIMERESETN_reset 0x00000001UL

Mode reset for RAC_XORETIMECTRL

Definition at line 4886 of file efr32bg21_rac.h .

#define _RAC_XORETIMECTRL_XORETIMERESETN_SHIFT 2

Shift value for RAC_XORETIMERESETN

Definition at line 4882 of file efr32bg21_rac.h .

#define _RAC_XORETIMESTATUS_MASK 0x00000003UL

Mask for RAC_XORETIMESTATUS

Definition at line 4901 of file efr32bg21_rac.h .

#define _RAC_XORETIMESTATUS_RESETVALUE 0x00000000UL

Default value for RAC_XORETIMESTATUS

Definition at line 4900 of file efr32bg21_rac.h .

#define _RAC_XORETIMESTATUS_XORETIMECLKSEL_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_XORETIMESTATUS

Definition at line 4905 of file efr32bg21_rac.h .

#define _RAC_XORETIMESTATUS_XORETIMECLKSEL_MASK 0x1UL

Bit mask for RAC_XORETIMECLKSEL

Definition at line 4904 of file efr32bg21_rac.h .

#define _RAC_XORETIMESTATUS_XORETIMECLKSEL_SHIFT 0

Shift value for RAC_XORETIMECLKSEL

Definition at line 4903 of file efr32bg21_rac.h .

#define _RAC_XORETIMESTATUS_XORETIMECLKSEL_use_raw_clk 0x00000000UL

Mode use_raw_clk for RAC_XORETIMESTATUS

Definition at line 4906 of file efr32bg21_rac.h .

#define _RAC_XORETIMESTATUS_XORETIMECLKSEL_use_retimed_clk 0x00000001UL

Mode use_retimed_clk for RAC_XORETIMESTATUS

Definition at line 4907 of file efr32bg21_rac.h .

#define _RAC_XORETIMESTATUS_XORETIMERESETNLO_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_XORETIMESTATUS

Definition at line 4914 of file efr32bg21_rac.h .

#define _RAC_XORETIMESTATUS_XORETIMERESETNLO_hi 0x00000001UL

Mode hi for RAC_XORETIMESTATUS

Definition at line 4916 of file efr32bg21_rac.h .

#define _RAC_XORETIMESTATUS_XORETIMERESETNLO_lo 0x00000000UL

Mode lo for RAC_XORETIMESTATUS

Definition at line 4915 of file efr32bg21_rac.h .

#define _RAC_XORETIMESTATUS_XORETIMERESETNLO_MASK 0x2UL

Bit mask for RAC_XORETIMERESETNLO

Definition at line 4913 of file efr32bg21_rac.h .

#define _RAC_XORETIMESTATUS_XORETIMERESETNLO_SHIFT 1

Shift value for RAC_XORETIMERESETNLO

Definition at line 4912 of file efr32bg21_rac.h .

#define _RAC_XOSQBUFFILT_MASK 0x00000003UL

Mask for RAC_XOSQBUFFILT

Definition at line 4923 of file efr32bg21_rac.h .

#define _RAC_XOSQBUFFILT_RESETVALUE 0x00000000UL

Default value for RAC_XOSQBUFFILT

Definition at line 4922 of file efr32bg21_rac.h .

#define _RAC_XOSQBUFFILT_XOSQBUFFILT_bypass 0x00000000UL

Mode bypass for RAC_XOSQBUFFILT

Definition at line 4927 of file efr32bg21_rac.h .

#define _RAC_XOSQBUFFILT_XOSQBUFFILT_DEFAULT 0x00000000UL

Mode DEFAULT for RAC_XOSQBUFFILT

Definition at line 4926 of file efr32bg21_rac.h .

#define _RAC_XOSQBUFFILT_XOSQBUFFILT_filter_1 0x00000001UL

Mode filter_1 for RAC_XOSQBUFFILT

Definition at line 4928 of file efr32bg21_rac.h .

#define _RAC_XOSQBUFFILT_XOSQBUFFILT_filter_2 0x00000002UL

Mode filter_2 for RAC_XOSQBUFFILT

Definition at line 4929 of file efr32bg21_rac.h .

#define _RAC_XOSQBUFFILT_XOSQBUFFILT_filter_3 0x00000003UL

Mode filter_3 for RAC_XOSQBUFFILT

Definition at line 4930 of file efr32bg21_rac.h .

#define _RAC_XOSQBUFFILT_XOSQBUFFILT_MASK 0x3UL

Bit mask for RAC_XOSQBUFFILT

Definition at line 4925 of file efr32bg21_rac.h .

#define _RAC_XOSQBUFFILT_XOSQBUFFILT_SHIFT 0

Shift value for RAC_XOSQBUFFILT

Definition at line 4924 of file efr32bg21_rac.h .

#define RAC_ANTDIV_EN_DEFAULT ( _RAC_ANTDIV_EN_DEFAULT << 0)

Shifted mode DEFAULT for RAC_ANTDIV

Definition at line 4953 of file efr32bg21_rac.h .

#define RAC_ANTDIV_EN_LNAMIXEN1 ( _RAC_ANTDIV_EN_LNAMIXEN1 << 0)

Shifted mode LNAMIXEN1 for RAC_ANTDIV

Definition at line 4956 of file efr32bg21_rac.h .

#define RAC_ANTDIV_EN_LNAMIXEN2 ( _RAC_ANTDIV_EN_LNAMIXEN2 << 0)

Shifted mode LNAMIXEN2 for RAC_ANTDIV

Definition at line 4960 of file efr32bg21_rac.h .

#define RAC_ANTDIV_EN_LNAMIXRFPKDENRF1 ( _RAC_ANTDIV_EN_LNAMIXRFPKDENRF1 << 0)

Shifted mode LNAMIXRFPKDENRF1 for RAC_ANTDIV

Definition at line 4957 of file efr32bg21_rac.h .

#define RAC_ANTDIV_EN_LNAMIXRFPKDENRF2 ( _RAC_ANTDIV_EN_LNAMIXRFPKDENRF2 << 0)

Shifted mode LNAMIXRFPKDENRF2 for RAC_ANTDIV

Definition at line 4961 of file efr32bg21_rac.h .

#define RAC_ANTDIV_EN_OFF ( _RAC_ANTDIV_EN_OFF << 0)

Shifted mode OFF for RAC_ANTDIV

Definition at line 4954 of file efr32bg21_rac.h .

#define RAC_ANTDIV_EN_ON ( _RAC_ANTDIV_EN_ON << 0)

Shifted mode ON for RAC_ANTDIV

Definition at line 4963 of file efr32bg21_rac.h .

#define RAC_ANTDIV_EN_PAENANT1 ( _RAC_ANTDIV_EN_PAENANT1 << 0)

Shifted mode PAENANT1 for RAC_ANTDIV

Definition at line 4955 of file efr32bg21_rac.h .

#define RAC_ANTDIV_EN_PAENANT2 ( _RAC_ANTDIV_EN_PAENANT2 << 0)

Shifted mode PAENANT2 for RAC_ANTDIV

Definition at line 4959 of file efr32bg21_rac.h .

#define RAC_ANTDIV_EN_SYLODIVRLO12G4EN ( _RAC_ANTDIV_EN_SYLODIVRLO12G4EN << 0)

Shifted mode SYLODIVRLO12G4EN for RAC_ANTDIV

Definition at line 4958 of file efr32bg21_rac.h .

#define RAC_ANTDIV_EN_SYLODIVRLO22G4EN ( _RAC_ANTDIV_EN_SYLODIVRLO22G4EN << 0)

Shifted mode SYLODIVRLO22G4EN for RAC_ANTDIV

Definition at line 4962 of file efr32bg21_rac.h .

#define RAC_ANTDIV_STATUS_ANT1 ( _RAC_ANTDIV_STATUS_ANT1 << 8)

Shifted mode ANT1 for RAC_ANTDIV

Definition at line 4973 of file efr32bg21_rac.h .

#define RAC_ANTDIV_STATUS_ANT2 ( _RAC_ANTDIV_STATUS_ANT2 << 8)

Shifted mode ANT2 for RAC_ANTDIV

Definition at line 4974 of file efr32bg21_rac.h .

#define RAC_ANTDIV_STATUS_BOTH ( _RAC_ANTDIV_STATUS_BOTH << 8)

Shifted mode BOTH for RAC_ANTDIV

Definition at line 4975 of file efr32bg21_rac.h .

#define RAC_ANTDIV_STATUS_DEFAULT ( _RAC_ANTDIV_STATUS_DEFAULT << 8)

Shifted mode DEFAULT for RAC_ANTDIV

Definition at line 4971 of file efr32bg21_rac.h .

#define RAC_ANTDIV_STATUS_OFF ( _RAC_ANTDIV_STATUS_OFF << 8)

Shifted mode OFF for RAC_ANTDIV

Definition at line 4972 of file efr32bg21_rac.h .

#define RAC_APC_AMPCONTROLLIMITSW_DEFAULT ( _RAC_APC_AMPCONTROLLIMITSW_DEFAULT << 24)

Shifted mode DEFAULT for RAC_APC

Definition at line 1493 of file efr32bg21_rac.h .

#define RAC_APC_ENAPCSW (0x1UL << 2)

software control bit for apc

Definition at line 1481 of file efr32bg21_rac.h .

#define RAC_APC_ENAPCSW_DEFAULT ( _RAC_APC_ENAPCSW_DEFAULT << 2)

Shifted mode DEFAULT for RAC_APC

Definition at line 1487 of file efr32bg21_rac.h .

#define RAC_APC_ENAPCSW_DISABLE ( _RAC_APC_ENAPCSW_DISABLE << 2)

Shifted mode DISABLE for RAC_APC

Definition at line 1488 of file efr32bg21_rac.h .

#define RAC_APC_ENAPCSW_ENABLE ( _RAC_APC_ENAPCSW_ENABLE << 2)

Shifted mode ENABLE for RAC_APC

Definition at line 1489 of file efr32bg21_rac.h .

#define RAC_AUXADCCTRL0_CLRCOUNTER (0x1UL << 12)

Clear counter

Definition at line 1755 of file efr32bg21_rac.h .

#define RAC_AUXADCCTRL0_CLRCOUNTER_DEFAULT ( _RAC_AUXADCCTRL0_CLRCOUNTER_DEFAULT << 12)

Shifted mode DEFAULT for RAC_AUXADCCTRL0

Definition at line 1759 of file efr32bg21_rac.h .

#define RAC_AUXADCCTRL0_CLRFILTER (0x1UL << 13)

Clear accumulators

Definition at line 1760 of file efr32bg21_rac.h .

#define RAC_AUXADCCTRL0_CLRFILTER_DEFAULT ( _RAC_AUXADCCTRL0_CLRFILTER_DEFAULT << 13)

Shifted mode DEFAULT for RAC_AUXADCCTRL0

Definition at line 1764 of file efr32bg21_rac.h .

#define RAC_AUXADCCTRL0_CYCLES_DEFAULT ( _RAC_AUXADCCTRL0_CYCLES_DEFAULT << 0)

Shifted mode DEFAULT for RAC_AUXADCCTRL0

Definition at line 1750 of file efr32bg21_rac.h .

#define RAC_AUXADCCTRL0_INPUTRESSEL_DEFAULT ( _RAC_AUXADCCTRL0_INPUTRESSEL_DEFAULT << 14)

Shifted mode DEFAULT for RAC_AUXADCCTRL0

Definition at line 1768 of file efr32bg21_rac.h .

#define RAC_AUXADCCTRL0_MUXSEL_DEFAULT ( _RAC_AUXADCCTRL0_MUXSEL_DEFAULT << 10)

Shifted mode DEFAULT for RAC_AUXADCCTRL0

Definition at line 1754 of file efr32bg21_rac.h .

#define RAC_AUXADCCTRL1_AUXADCINPUTRESSEL_DEFAULT ( _RAC_AUXADCCTRL1_AUXADCINPUTRESSEL_DEFAULT << 0)

Shifted mode DEFAULT for RAC_AUXADCCTRL1

Definition at line 1788 of file efr32bg21_rac.h .

#define RAC_AUXADCCTRL1_AUXADCINPUTRESSEL_RES0p6kOhm ( _RAC_AUXADCCTRL1_AUXADCINPUTRESSEL_RES0p6kOhm << 0)

Shifted mode RES0p6kOhm for RAC_AUXADCCTRL1

Definition at line 1799 of file efr32bg21_rac.h .

#define RAC_AUXADCCTRL1_AUXADCINPUTRESSEL_RES10kOhm ( _RAC_AUXADCCTRL1_AUXADCINPUTRESSEL_RES10kOhm << 0)

Shifted mode RES10kOhm for RAC_AUXADCCTRL1

Definition at line 1795 of file efr32bg21_rac.h .

#define RAC_AUXADCCTRL1_AUXADCINPUTRESSEL_RES160kOhm ( _RAC_AUXADCCTRL1_AUXADCINPUTRESSEL_RES160kOhm << 0)

Shifted mode RES160kOhm for RAC_AUXADCCTRL1

Definition at line 1791 of file efr32bg21_rac.h .

#define RAC_AUXADCCTRL1_AUXADCINPUTRESSEL_RES1p25kOhm ( _RAC_AUXADCCTRL1_AUXADCINPUTRESSEL_RES1p25kOhm << 0)

Shifted mode RES1p25kOhm for RAC_AUXADCCTRL1

Definition at line 1798 of file efr32bg21_rac.h .

#define RAC_AUXADCCTRL1_AUXADCINPUTRESSEL_RES20kOhm ( _RAC_AUXADCCTRL1_AUXADCINPUTRESSEL_RES20kOhm << 0)

Shifted mode RES20kOhm for RAC_AUXADCCTRL1

Definition at line 1794 of file efr32bg21_rac.h .

#define RAC_AUXADCCTRL1_AUXADCINPUTRESSEL_RES2p5kOhm ( _RAC_AUXADCCTRL1_AUXADCINPUTRESSEL_RES2p5kOhm << 0)

Shifted mode RES2p5kOhm for RAC_AUXADCCTRL1

Definition at line 1797 of file efr32bg21_rac.h .

#define RAC_AUXADCCTRL1_AUXADCINPUTRESSEL_RES320kOhm ( _RAC_AUXADCCTRL1_AUXADCINPUTRESSEL_RES320kOhm << 0)

Shifted mode RES320kOhm for RAC_AUXADCCTRL1

Definition at line 1790 of file efr32bg21_rac.h .

#define RAC_AUXADCCTRL1_AUXADCINPUTRESSEL_RES40kOhm ( _RAC_AUXADCCTRL1_AUXADCINPUTRESSEL_RES40kOhm << 0)

Shifted mode RES40kOhm for RAC_AUXADCCTRL1

Definition at line 1793 of file efr32bg21_rac.h .

#define RAC_AUXADCCTRL1_AUXADCINPUTRESSEL_RES5kOhm ( _RAC_AUXADCCTRL1_AUXADCINPUTRESSEL_RES5kOhm << 0)

Shifted mode RES5kOhm for RAC_AUXADCCTRL1

Definition at line 1796 of file efr32bg21_rac.h .

#define RAC_AUXADCCTRL1_AUXADCINPUTRESSEL_RES640kOhm ( _RAC_AUXADCCTRL1_AUXADCINPUTRESSEL_RES640kOhm << 0)

Shifted mode RES640kOhm for RAC_AUXADCCTRL1

Definition at line 1789 of file efr32bg21_rac.h .

#define RAC_AUXADCCTRL1_AUXADCINPUTRESSEL_RES80kOhm ( _RAC_AUXADCCTRL1_AUXADCINPUTRESSEL_RES80kOhm << 0)

Shifted mode RES80kOhm for RAC_AUXADCCTRL1

Definition at line 1792 of file efr32bg21_rac.h .

#define RAC_AUXADCCTRL1_AUXADCINPUTRESSEL_RES_switch ( _RAC_AUXADCCTRL1_AUXADCINPUTRESSEL_RES_switch << 0)

Shifted mode RES_switch for RAC_AUXADCCTRL1

Definition at line 1800 of file efr32bg21_rac.h .

#define RAC_AUXADCCTRL1_AUXADCINPUTSELECT_DEFAULT ( _RAC_AUXADCCTRL1_AUXADCINPUTSELECT_DEFAULT << 4)

Shifted mode DEFAULT for RAC_AUXADCCTRL1

Definition at line 1814 of file efr32bg21_rac.h .

#define RAC_AUXADCCTRL1_AUXADCINPUTSELECT_SEL0 ( _RAC_AUXADCCTRL1_AUXADCINPUTSELECT_SEL0 << 4)

Shifted mode SEL0 for RAC_AUXADCCTRL1

Definition at line 1815 of file efr32bg21_rac.h .

#define RAC_AUXADCCTRL1_AUXADCINPUTSELECT_SEL1 ( _RAC_AUXADCCTRL1_AUXADCINPUTSELECT_SEL1 << 4)

Shifted mode SEL1 for RAC_AUXADCCTRL1

Definition at line 1816 of file efr32bg21_rac.h .

#define RAC_AUXADCCTRL1_AUXADCINPUTSELECT_SEL2 ( _RAC_AUXADCCTRL1_AUXADCINPUTSELECT_SEL2 << 4)

Shifted mode SEL2 for RAC_AUXADCCTRL1

Definition at line 1817 of file efr32bg21_rac.h .

#define RAC_AUXADCCTRL1_AUXADCINPUTSELECT_SEL3 ( _RAC_AUXADCCTRL1_AUXADCINPUTSELECT_SEL3 << 4)

Shifted mode SEL3 for RAC_AUXADCCTRL1

Definition at line 1818 of file efr32bg21_rac.h .

#define RAC_AUXADCCTRL1_AUXADCINPUTSELECT_SEL4 ( _RAC_AUXADCCTRL1_AUXADCINPUTSELECT_SEL4 << 4)

Shifted mode SEL4 for RAC_AUXADCCTRL1

Definition at line 1819 of file efr32bg21_rac.h .

#define RAC_AUXADCCTRL1_AUXADCINPUTSELECT_SEL5 ( _RAC_AUXADCCTRL1_AUXADCINPUTSELECT_SEL5 << 4)

Shifted mode SEL5 for RAC_AUXADCCTRL1

Definition at line 1820 of file efr32bg21_rac.h .

#define RAC_AUXADCCTRL1_AUXADCINPUTSELECT_SEL6 ( _RAC_AUXADCCTRL1_AUXADCINPUTSELECT_SEL6 << 4)

Shifted mode SEL6 for RAC_AUXADCCTRL1

Definition at line 1821 of file efr32bg21_rac.h .

#define RAC_AUXADCCTRL1_AUXADCINPUTSELECT_SEL7 ( _RAC_AUXADCCTRL1_AUXADCINPUTSELECT_SEL7 << 4)

Shifted mode SEL7 for RAC_AUXADCCTRL1

Definition at line 1822 of file efr32bg21_rac.h .

#define RAC_AUXADCCTRL1_AUXADCINPUTSELECT_SEL8 ( _RAC_AUXADCCTRL1_AUXADCINPUTSELECT_SEL8 << 4)

Shifted mode SEL8 for RAC_AUXADCCTRL1

Definition at line 1823 of file efr32bg21_rac.h .

#define RAC_AUXADCCTRL1_AUXADCINPUTSELECT_SEL9 ( _RAC_AUXADCCTRL1_AUXADCINPUTSELECT_SEL9 << 4)

Shifted mode SEL9 for RAC_AUXADCCTRL1

Definition at line 1824 of file efr32bg21_rac.h .

#define RAC_AUXADCCTRL1_AUXADCPMONSELECT_DEFAULT ( _RAC_AUXADCCTRL1_AUXADCPMONSELECT_DEFAULT << 8)

Shifted mode DEFAULT for RAC_AUXADCCTRL1

Definition at line 1828 of file efr32bg21_rac.h .

#define RAC_AUXADCCTRL1_AUXADCRESET (0x1UL << 24)

AUXADCRESET

Definition at line 1833 of file efr32bg21_rac.h .

#define RAC_AUXADCCTRL1_AUXADCRESET_DEFAULT ( _RAC_AUXADCCTRL1_AUXADCRESET_DEFAULT << 24)

Shifted mode DEFAULT for RAC_AUXADCCTRL1

Definition at line 1839 of file efr32bg21_rac.h .

#define RAC_AUXADCCTRL1_AUXADCRESET_Reset_Disabled ( _RAC_AUXADCCTRL1_AUXADCRESET_Reset_Disabled << 24)

Shifted mode Reset_Disabled for RAC_AUXADCCTRL1

Definition at line 1841 of file efr32bg21_rac.h .

#define RAC_AUXADCCTRL1_AUXADCRESET_Reset_Enabled ( _RAC_AUXADCCTRL1_AUXADCRESET_Reset_Enabled << 24)

Shifted mode Reset_Enabled for RAC_AUXADCCTRL1

Definition at line 1840 of file efr32bg21_rac.h .

#define RAC_AUXADCCTRL1_AUXADCTSENSESELCURR_DEFAULT ( _RAC_AUXADCCTRL1_AUXADCTSENSESELCURR_DEFAULT << 16)

Shifted mode DEFAULT for RAC_AUXADCCTRL1

Definition at line 1832 of file efr32bg21_rac.h .

#define RAC_AUXADCCTRL1_AUXADCTSENSESELVBE (0x1UL << 25)

AUXADCTSENSESELVBE

Definition at line 1842 of file efr32bg21_rac.h .

#define RAC_AUXADCCTRL1_AUXADCTSENSESELVBE_DEFAULT ( _RAC_AUXADCCTRL1_AUXADCTSENSESELVBE_DEFAULT << 25)

Shifted mode DEFAULT for RAC_AUXADCCTRL1

Definition at line 1848 of file efr32bg21_rac.h .

#define RAC_AUXADCCTRL1_AUXADCTSENSESELVBE_VBE1 ( _RAC_AUXADCCTRL1_AUXADCTSENSESELVBE_VBE1 << 25)

Shifted mode VBE1 for RAC_AUXADCCTRL1

Definition at line 1849 of file efr32bg21_rac.h .

#define RAC_AUXADCCTRL1_AUXADCTSENSESELVBE_VBE2 ( _RAC_AUXADCCTRL1_AUXADCTSENSESELVBE_VBE2 << 25)

Shifted mode VBE2 for RAC_AUXADCCTRL1

Definition at line 1850 of file efr32bg21_rac.h .

#define RAC_AUXADCEN_AUXADCENAUXADC (0x1UL << 0)

AUXADCENAUXADC

Definition at line 1662 of file efr32bg21_rac.h .

#define RAC_AUXADCEN_AUXADCENAUXADC_DEFAULT ( _RAC_AUXADCEN_AUXADCENAUXADC_DEFAULT << 0)

Shifted mode DEFAULT for RAC_AUXADCEN

Definition at line 1668 of file efr32bg21_rac.h .

#define RAC_AUXADCEN_AUXADCENAUXADC_Disabled ( _RAC_AUXADCEN_AUXADCENAUXADC_Disabled << 0)

Shifted mode Disabled for RAC_AUXADCEN

Definition at line 1669 of file efr32bg21_rac.h .

#define RAC_AUXADCEN_AUXADCENAUXADC_Enabled ( _RAC_AUXADCEN_AUXADCENAUXADC_Enabled << 0)

Shifted mode Enabled for RAC_AUXADCEN

Definition at line 1670 of file efr32bg21_rac.h .

#define RAC_AUXADCEN_AUXADCENINPUTBUFFER (0x1UL << 1)

AUXADCENINPUTBUFFER

Definition at line 1671 of file efr32bg21_rac.h .

#define RAC_AUXADCEN_AUXADCENINPUTBUFFER_DEFAULT ( _RAC_AUXADCEN_AUXADCENINPUTBUFFER_DEFAULT << 1)

Shifted mode DEFAULT for RAC_AUXADCEN

Definition at line 1677 of file efr32bg21_rac.h .

#define RAC_AUXADCEN_AUXADCENINPUTBUFFER_Disabled ( _RAC_AUXADCEN_AUXADCENINPUTBUFFER_Disabled << 1)

Shifted mode Disabled for RAC_AUXADCEN

Definition at line 1678 of file efr32bg21_rac.h .

#define RAC_AUXADCEN_AUXADCENINPUTBUFFER_Enabled ( _RAC_AUXADCEN_AUXADCENINPUTBUFFER_Enabled << 1)

Shifted mode Enabled for RAC_AUXADCEN

Definition at line 1679 of file efr32bg21_rac.h .

#define RAC_AUXADCEN_AUXADCENLDO (0x1UL << 2)

AUXADCENLDO

Definition at line 1680 of file efr32bg21_rac.h .

#define RAC_AUXADCEN_AUXADCENLDO_DEFAULT ( _RAC_AUXADCEN_AUXADCENLDO_DEFAULT << 2)

Shifted mode DEFAULT for RAC_AUXADCEN

Definition at line 1686 of file efr32bg21_rac.h .

#define RAC_AUXADCEN_AUXADCENLDO_Disabled ( _RAC_AUXADCEN_AUXADCENLDO_Disabled << 2)

Shifted mode Disabled for RAC_AUXADCEN

Definition at line 1687 of file efr32bg21_rac.h .

#define RAC_AUXADCEN_AUXADCENLDO_Enabled ( _RAC_AUXADCEN_AUXADCENLDO_Enabled << 2)

Shifted mode Enabled for RAC_AUXADCEN

Definition at line 1688 of file efr32bg21_rac.h .

#define RAC_AUXADCEN_AUXADCENOUTPUTDRV (0x1UL << 3)

AUXADCENOUTPUTDRV

Definition at line 1689 of file efr32bg21_rac.h .

#define RAC_AUXADCEN_AUXADCENOUTPUTDRV_DEFAULT ( _RAC_AUXADCEN_AUXADCENOUTPUTDRV_DEFAULT << 3)

Shifted mode DEFAULT for RAC_AUXADCEN

Definition at line 1695 of file efr32bg21_rac.h .

#define RAC_AUXADCEN_AUXADCENOUTPUTDRV_Disabled ( _RAC_AUXADCEN_AUXADCENOUTPUTDRV_Disabled << 3)

Shifted mode Disabled for RAC_AUXADCEN

Definition at line 1696 of file efr32bg21_rac.h .

#define RAC_AUXADCEN_AUXADCENOUTPUTDRV_Enabled ( _RAC_AUXADCEN_AUXADCENOUTPUTDRV_Enabled << 3)

Shifted mode Enabled for RAC_AUXADCEN

Definition at line 1697 of file efr32bg21_rac.h .

#define RAC_AUXADCEN_AUXADCENPMON (0x1UL << 4)

AUXADCENPMON

Definition at line 1698 of file efr32bg21_rac.h .

#define RAC_AUXADCEN_AUXADCENPMON_DEFAULT ( _RAC_AUXADCEN_AUXADCENPMON_DEFAULT << 4)

Shifted mode DEFAULT for RAC_AUXADCEN

Definition at line 1704 of file efr32bg21_rac.h .

#define RAC_AUXADCEN_AUXADCENPMON_Disabled ( _RAC_AUXADCEN_AUXADCENPMON_Disabled << 4)

Shifted mode Disabled for RAC_AUXADCEN

Definition at line 1705 of file efr32bg21_rac.h .

#define RAC_AUXADCEN_AUXADCENPMON_Enabled ( _RAC_AUXADCEN_AUXADCENPMON_Enabled << 4)

Shifted mode Enabled for RAC_AUXADCEN

Definition at line 1706 of file efr32bg21_rac.h .

#define RAC_AUXADCEN_AUXADCENRESONDIAGA (0x1UL << 5)

AUXADCENRESONDIAGA

Definition at line 1707 of file efr32bg21_rac.h .

#define RAC_AUXADCEN_AUXADCENRESONDIAGA_DEFAULT ( _RAC_AUXADCEN_AUXADCENRESONDIAGA_DEFAULT << 5)

Shifted mode DEFAULT for RAC_AUXADCEN

Definition at line 1713 of file efr32bg21_rac.h .

#define RAC_AUXADCEN_AUXADCENRESONDIAGA_Disabled ( _RAC_AUXADCEN_AUXADCENRESONDIAGA_Disabled << 5)

Shifted mode Disabled for RAC_AUXADCEN

Definition at line 1714 of file efr32bg21_rac.h .

#define RAC_AUXADCEN_AUXADCENRESONDIAGA_Enabled ( _RAC_AUXADCEN_AUXADCENRESONDIAGA_Enabled << 5)

Shifted mode Enabled for RAC_AUXADCEN

Definition at line 1715 of file efr32bg21_rac.h .

#define RAC_AUXADCEN_AUXADCENTSENSE (0x1UL << 6)

AUXADCENTSENSE

Definition at line 1716 of file efr32bg21_rac.h .

#define RAC_AUXADCEN_AUXADCENTSENSE_DEFAULT ( _RAC_AUXADCEN_AUXADCENTSENSE_DEFAULT << 6)

Shifted mode DEFAULT for RAC_AUXADCEN

Definition at line 1722 of file efr32bg21_rac.h .

#define RAC_AUXADCEN_AUXADCENTSENSE_Disabled ( _RAC_AUXADCEN_AUXADCENTSENSE_Disabled << 6)

Shifted mode Disabled for RAC_AUXADCEN

Definition at line 1723 of file efr32bg21_rac.h .

#define RAC_AUXADCEN_AUXADCENTSENSE_Enabled ( _RAC_AUXADCEN_AUXADCENTSENSE_Enabled << 6)

Shifted mode Enabled for RAC_AUXADCEN

Definition at line 1724 of file efr32bg21_rac.h .

#define RAC_AUXADCEN_AUXADCENTSENSECAL (0x1UL << 7)

AUXADCENTSENSECAL

Definition at line 1725 of file efr32bg21_rac.h .

#define RAC_AUXADCEN_AUXADCENTSENSECAL_DEFAULT ( _RAC_AUXADCEN_AUXADCENTSENSECAL_DEFAULT << 7)

Shifted mode DEFAULT for RAC_AUXADCEN

Definition at line 1731 of file efr32bg21_rac.h .

#define RAC_AUXADCEN_AUXADCENTSENSECAL_Disabled ( _RAC_AUXADCEN_AUXADCENTSENSECAL_Disabled << 7)

Shifted mode Disabled for RAC_AUXADCEN

Definition at line 1732 of file efr32bg21_rac.h .

#define RAC_AUXADCEN_AUXADCENTSENSECAL_Enabled ( _RAC_AUXADCEN_AUXADCENTSENSECAL_Enabled << 7)

Shifted mode Enabled for RAC_AUXADCEN

Definition at line 1733 of file efr32bg21_rac.h .

#define RAC_AUXADCEN_AUXADCINPUTBUFFERBYPASS (0x1UL << 8)

AUXADCINPUTBUFFERBYPASS

Definition at line 1734 of file efr32bg21_rac.h .

#define RAC_AUXADCEN_AUXADCINPUTBUFFERBYPASS_Bypassed ( _RAC_AUXADCEN_AUXADCINPUTBUFFERBYPASS_Bypassed << 8)

Shifted mode Bypassed for RAC_AUXADCEN

Definition at line 1742 of file efr32bg21_rac.h .

#define RAC_AUXADCEN_AUXADCINPUTBUFFERBYPASS_DEFAULT ( _RAC_AUXADCEN_AUXADCINPUTBUFFERBYPASS_DEFAULT << 8)

Shifted mode DEFAULT for RAC_AUXADCEN

Definition at line 1740 of file efr32bg21_rac.h .

#define RAC_AUXADCEN_AUXADCINPUTBUFFERBYPASS_Not_Bypassed ( _RAC_AUXADCEN_AUXADCINPUTBUFFERBYPASS_Not_Bypassed << 8)

Shifted mode Not_Bypassed for RAC_AUXADCEN

Definition at line 1741 of file efr32bg21_rac.h .

#define RAC_AUXADCOUT_AUXADCOUT_DEFAULT ( _RAC_AUXADCOUT_AUXADCOUT_DEFAULT << 0)

Shifted mode DEFAULT for RAC_AUXADCOUT

Definition at line 1858 of file efr32bg21_rac.h .

#define RAC_AUXADCTRIM_AUXADCCLKINVERT (0x1UL << 0)

AUXADCCLKINVERT

Definition at line 1498 of file efr32bg21_rac.h .

#define RAC_AUXADCTRIM_AUXADCCLKINVERT_DEFAULT ( _RAC_AUXADCTRIM_AUXADCCLKINVERT_DEFAULT << 0)

Shifted mode DEFAULT for RAC_AUXADCTRIM

Definition at line 1504 of file efr32bg21_rac.h .

#define RAC_AUXADCTRIM_AUXADCCLKINVERT_Disable_Invert ( _RAC_AUXADCTRIM_AUXADCCLKINVERT_Disable_Invert << 0)

Shifted mode Disable_Invert for RAC_AUXADCTRIM

Definition at line 1505 of file efr32bg21_rac.h .

#define RAC_AUXADCTRIM_AUXADCCLKINVERT_Enable_Invert ( _RAC_AUXADCTRIM_AUXADCCLKINVERT_Enable_Invert << 0)

Shifted mode Enable_Invert for RAC_AUXADCTRIM

Definition at line 1506 of file efr32bg21_rac.h .

#define RAC_AUXADCTRIM_AUXADCLDOVREFTRIM_DEFAULT ( _RAC_AUXADCTRIM_AUXADCLDOVREFTRIM_DEFAULT << 1)

Shifted mode DEFAULT for RAC_AUXADCTRIM

Definition at line 1514 of file efr32bg21_rac.h .

#define RAC_AUXADCTRIM_AUXADCLDOVREFTRIM_TRIM1p27 ( _RAC_AUXADCTRIM_AUXADCLDOVREFTRIM_TRIM1p27 << 1)

Shifted mode TRIM1p27 for RAC_AUXADCTRIM

Definition at line 1515 of file efr32bg21_rac.h .

#define RAC_AUXADCTRIM_AUXADCLDOVREFTRIM_TRIM1p3 ( _RAC_AUXADCTRIM_AUXADCLDOVREFTRIM_TRIM1p3 << 1)

Shifted mode TRIM1p3 for RAC_AUXADCTRIM

Definition at line 1516 of file efr32bg21_rac.h .

#define RAC_AUXADCTRIM_AUXADCLDOVREFTRIM_TRIM1p35 ( _RAC_AUXADCTRIM_AUXADCLDOVREFTRIM_TRIM1p35 << 1)

Shifted mode TRIM1p35 for RAC_AUXADCTRIM

Definition at line 1517 of file efr32bg21_rac.h .

#define RAC_AUXADCTRIM_AUXADCLDOVREFTRIM_TRIM1p4 ( _RAC_AUXADCTRIM_AUXADCLDOVREFTRIM_TRIM1p4 << 1)

Shifted mode TRIM1p4 for RAC_AUXADCTRIM

Definition at line 1518 of file efr32bg21_rac.h .

#define RAC_AUXADCTRIM_AUXADCOUTPUTINVERT (0x1UL << 3)

AUXADCOUTPUTINVERT

Definition at line 1519 of file efr32bg21_rac.h .

#define RAC_AUXADCTRIM_AUXADCOUTPUTINVERT_DEFAULT ( _RAC_AUXADCTRIM_AUXADCOUTPUTINVERT_DEFAULT << 3)

Shifted mode DEFAULT for RAC_AUXADCTRIM

Definition at line 1525 of file efr32bg21_rac.h .

#define RAC_AUXADCTRIM_AUXADCOUTPUTINVERT_Disabled ( _RAC_AUXADCTRIM_AUXADCOUTPUTINVERT_Disabled << 3)

Shifted mode Disabled for RAC_AUXADCTRIM

Definition at line 1526 of file efr32bg21_rac.h .

#define RAC_AUXADCTRIM_AUXADCOUTPUTINVERT_Enabled ( _RAC_AUXADCTRIM_AUXADCOUTPUTINVERT_Enabled << 3)

Shifted mode Enabled for RAC_AUXADCTRIM

Definition at line 1527 of file efr32bg21_rac.h .

#define RAC_AUXADCTRIM_AUXADCRCTUNE_DEFAULT ( _RAC_AUXADCTRIM_AUXADCRCTUNE_DEFAULT << 4)

Shifted mode DEFAULT for RAC_AUXADCTRIM

Definition at line 1531 of file efr32bg21_rac.h .

#define RAC_AUXADCTRIM_AUXADCTRIMADCINPUTRES_DEFAULT ( _RAC_AUXADCTRIM_AUXADCTRIMADCINPUTRES_DEFAULT << 9)

Shifted mode DEFAULT for RAC_AUXADCTRIM

Definition at line 1539 of file efr32bg21_rac.h .

#define RAC_AUXADCTRIM_AUXADCTRIMADCINPUTRES_RES200k ( _RAC_AUXADCTRIM_AUXADCTRIMADCINPUTRES_RES200k << 9)

Shifted mode RES200k for RAC_AUXADCTRIM

Definition at line 1540 of file efr32bg21_rac.h .

#define RAC_AUXADCTRIM_AUXADCTRIMADCINPUTRES_RES250k ( _RAC_AUXADCTRIM_AUXADCTRIMADCINPUTRES_RES250k << 9)

Shifted mode RES250k for RAC_AUXADCTRIM

Definition at line 1541 of file efr32bg21_rac.h .

#define RAC_AUXADCTRIM_AUXADCTRIMADCINPUTRES_RES300k ( _RAC_AUXADCTRIM_AUXADCTRIMADCINPUTRES_RES300k << 9)

Shifted mode RES300k for RAC_AUXADCTRIM

Definition at line 1542 of file efr32bg21_rac.h .

#define RAC_AUXADCTRIM_AUXADCTRIMADCINPUTRES_RES350k ( _RAC_AUXADCTRIM_AUXADCTRIMADCINPUTRES_RES350k << 9)

Shifted mode RES350k for RAC_AUXADCTRIM

Definition at line 1543 of file efr32bg21_rac.h .

#define RAC_AUXADCTRIM_AUXADCTRIMCURRINPUTBUF_DEFAULT ( _RAC_AUXADCTRIM_AUXADCTRIMCURRINPUTBUF_DEFAULT << 11)

Shifted mode DEFAULT for RAC_AUXADCTRIM

Definition at line 1551 of file efr32bg21_rac.h .

#define RAC_AUXADCTRIM_AUXADCTRIMCURRINPUTBUF_Typ ( _RAC_AUXADCTRIM_AUXADCTRIMCURRINPUTBUF_Typ << 11)

Shifted mode Typ for RAC_AUXADCTRIM

Definition at line 1554 of file efr32bg21_rac.h .

#define RAC_AUXADCTRIM_AUXADCTRIMCURRINPUTBUF_Typ_minus_20pct ( _RAC_AUXADCTRIM_AUXADCTRIMCURRINPUTBUF_Typ_minus_20pct << 11)

Shifted mode Typ_minus_20pct for RAC_AUXADCTRIM

Definition at line 1553 of file efr32bg21_rac.h .

#define RAC_AUXADCTRIM_AUXADCTRIMCURRINPUTBUF_Typ_minus_40pct ( _RAC_AUXADCTRIM_AUXADCTRIMCURRINPUTBUF_Typ_minus_40pct << 11)

Shifted mode Typ_minus_40pct for RAC_AUXADCTRIM

Definition at line 1552 of file efr32bg21_rac.h .

#define RAC_AUXADCTRIM_AUXADCTRIMCURRINPUTBUF_Typ_plus_20pct ( _RAC_AUXADCTRIM_AUXADCTRIMCURRINPUTBUF_Typ_plus_20pct << 11)

Shifted mode Typ_plus_20pct for RAC_AUXADCTRIM

Definition at line 1555 of file efr32bg21_rac.h .

#define RAC_AUXADCTRIM_AUXADCTRIMCURROPA1_DEFAULT ( _RAC_AUXADCTRIM_AUXADCTRIMCURROPA1_DEFAULT << 13)

Shifted mode DEFAULT for RAC_AUXADCTRIM

Definition at line 1563 of file efr32bg21_rac.h .

#define RAC_AUXADCTRIM_AUXADCTRIMCURROPA1_Typ ( _RAC_AUXADCTRIM_AUXADCTRIMCURROPA1_Typ << 13)

Shifted mode Typ for RAC_AUXADCTRIM

Definition at line 1566 of file efr32bg21_rac.h .

#define RAC_AUXADCTRIM_AUXADCTRIMCURROPA1_Typ_minus_20pct ( _RAC_AUXADCTRIM_AUXADCTRIMCURROPA1_Typ_minus_20pct << 13)

Shifted mode Typ_minus_20pct for RAC_AUXADCTRIM

Definition at line 1565 of file efr32bg21_rac.h .

#define RAC_AUXADCTRIM_AUXADCTRIMCURROPA1_Typ_minus_40pct ( _RAC_AUXADCTRIM_AUXADCTRIMCURROPA1_Typ_minus_40pct << 13)

Shifted mode Typ_minus_40pct for RAC_AUXADCTRIM

Definition at line 1564 of file efr32bg21_rac.h .

#define RAC_AUXADCTRIM_AUXADCTRIMCURROPA1_Typ_plus_20pct ( _RAC_AUXADCTRIM_AUXADCTRIMCURROPA1_Typ_plus_20pct << 13)

Shifted mode Typ_plus_20pct for RAC_AUXADCTRIM

Definition at line 1567 of file efr32bg21_rac.h .

#define RAC_AUXADCTRIM_AUXADCTRIMCURROPA2_DEFAULT ( _RAC_AUXADCTRIM_AUXADCTRIMCURROPA2_DEFAULT << 15)

Shifted mode DEFAULT for RAC_AUXADCTRIM

Definition at line 1575 of file efr32bg21_rac.h .

#define RAC_AUXADCTRIM_AUXADCTRIMCURROPA2_Typ ( _RAC_AUXADCTRIM_AUXADCTRIMCURROPA2_Typ << 15)

Shifted mode Typ for RAC_AUXADCTRIM

Definition at line 1578 of file efr32bg21_rac.h .

#define RAC_AUXADCTRIM_AUXADCTRIMCURROPA2_Typ_minus_20pct ( _RAC_AUXADCTRIM_AUXADCTRIMCURROPA2_Typ_minus_20pct << 15)

Shifted mode Typ_minus_20pct for RAC_AUXADCTRIM

Definition at line 1577 of file efr32bg21_rac.h .

#define RAC_AUXADCTRIM_AUXADCTRIMCURROPA2_Typ_minus_40pct ( _RAC_AUXADCTRIM_AUXADCTRIMCURROPA2_Typ_minus_40pct << 15)

Shifted mode Typ_minus_40pct for RAC_AUXADCTRIM

Definition at line 1576 of file efr32bg21_rac.h .

#define RAC_AUXADCTRIM_AUXADCTRIMCURROPA2_Typ_plus_20pct ( _RAC_AUXADCTRIM_AUXADCTRIMCURROPA2_Typ_plus_20pct << 15)

Shifted mode Typ_plus_20pct for RAC_AUXADCTRIM

Definition at line 1579 of file efr32bg21_rac.h .

#define RAC_AUXADCTRIM_AUXADCTRIMCURRREFBUF_DEFAULT ( _RAC_AUXADCTRIM_AUXADCTRIMCURRREFBUF_DEFAULT << 17)

Shifted mode DEFAULT for RAC_AUXADCTRIM

Definition at line 1587 of file efr32bg21_rac.h .

#define RAC_AUXADCTRIM_AUXADCTRIMCURRREFBUF_Typ ( _RAC_AUXADCTRIM_AUXADCTRIMCURRREFBUF_Typ << 17)

Shifted mode Typ for RAC_AUXADCTRIM

Definition at line 1590 of file efr32bg21_rac.h .

#define RAC_AUXADCTRIM_AUXADCTRIMCURRREFBUF_Typ_minus_20pct ( _RAC_AUXADCTRIM_AUXADCTRIMCURRREFBUF_Typ_minus_20pct << 17)

Shifted mode Typ_minus_20pct for RAC_AUXADCTRIM

Definition at line 1589 of file efr32bg21_rac.h .

#define RAC_AUXADCTRIM_AUXADCTRIMCURRREFBUF_Typ_minus_40pct ( _RAC_AUXADCTRIM_AUXADCTRIMCURRREFBUF_Typ_minus_40pct << 17)

Shifted mode Typ_minus_40pct for RAC_AUXADCTRIM

Definition at line 1588 of file efr32bg21_rac.h .

#define RAC_AUXADCTRIM_AUXADCTRIMCURRREFBUF_Typ_plus_20pct ( _RAC_AUXADCTRIM_AUXADCTRIMCURRREFBUF_Typ_plus_20pct << 17)

Shifted mode Typ_plus_20pct for RAC_AUXADCTRIM

Definition at line 1591 of file efr32bg21_rac.h .

#define RAC_AUXADCTRIM_AUXADCTRIMCURRTSENSE_DEFAULT ( _RAC_AUXADCTRIM_AUXADCTRIMCURRTSENSE_DEFAULT << 19)

Shifted mode DEFAULT for RAC_AUXADCTRIM

Definition at line 1599 of file efr32bg21_rac.h .

#define RAC_AUXADCTRIM_AUXADCTRIMCURRTSENSE_Typ ( _RAC_AUXADCTRIM_AUXADCTRIMCURRTSENSE_Typ << 19)

Shifted mode Typ for RAC_AUXADCTRIM

Definition at line 1602 of file efr32bg21_rac.h .

#define RAC_AUXADCTRIM_AUXADCTRIMCURRTSENSE_Typ_minus_20pct ( _RAC_AUXADCTRIM_AUXADCTRIMCURRTSENSE_Typ_minus_20pct << 19)

Shifted mode Typ_minus_20pct for RAC_AUXADCTRIM

Definition at line 1601 of file efr32bg21_rac.h .

#define RAC_AUXADCTRIM_AUXADCTRIMCURRTSENSE_Typ_minus_40pct ( _RAC_AUXADCTRIM_AUXADCTRIMCURRTSENSE_Typ_minus_40pct << 19)

Shifted mode Typ_minus_40pct for RAC_AUXADCTRIM

Definition at line 1600 of file efr32bg21_rac.h .

#define RAC_AUXADCTRIM_AUXADCTRIMCURRTSENSE_Typ_plus_20pct ( _RAC_AUXADCTRIM_AUXADCTRIMCURRTSENSE_Typ_plus_20pct << 19)

Shifted mode Typ_plus_20pct for RAC_AUXADCTRIM

Definition at line 1603 of file efr32bg21_rac.h .

#define RAC_AUXADCTRIM_AUXADCTRIMCURRVCMBUF_DEFAULT ( _RAC_AUXADCTRIM_AUXADCTRIMCURRVCMBUF_DEFAULT << 21)

Shifted mode DEFAULT for RAC_AUXADCTRIM

Definition at line 1611 of file efr32bg21_rac.h .

#define RAC_AUXADCTRIM_AUXADCTRIMCURRVCMBUF_Typ ( _RAC_AUXADCTRIM_AUXADCTRIMCURRVCMBUF_Typ << 21)

Shifted mode Typ for RAC_AUXADCTRIM

Definition at line 1614 of file efr32bg21_rac.h .

#define RAC_AUXADCTRIM_AUXADCTRIMCURRVCMBUF_Typ_minus_20pct ( _RAC_AUXADCTRIM_AUXADCTRIMCURRVCMBUF_Typ_minus_20pct << 21)

Shifted mode Typ_minus_20pct for RAC_AUXADCTRIM

Definition at line 1613 of file efr32bg21_rac.h .

#define RAC_AUXADCTRIM_AUXADCTRIMCURRVCMBUF_Typ_minus_40pct ( _RAC_AUXADCTRIM_AUXADCTRIMCURRVCMBUF_Typ_minus_40pct << 21)

Shifted mode Typ_minus_40pct for RAC_AUXADCTRIM

Definition at line 1612 of file efr32bg21_rac.h .

#define RAC_AUXADCTRIM_AUXADCTRIMCURRVCMBUF_Typ_plus_20pct ( _RAC_AUXADCTRIM_AUXADCTRIMCURRVCMBUF_Typ_plus_20pct << 21)

Shifted mode Typ_plus_20pct for RAC_AUXADCTRIM

Definition at line 1615 of file efr32bg21_rac.h .

#define RAC_AUXADCTRIM_AUXADCTRIMLDOHIGHCURRENT (0x1UL << 23)

AUXADCTRIMLDOHIGHCURRENT

Definition at line 1616 of file efr32bg21_rac.h .

#define RAC_AUXADCTRIM_AUXADCTRIMLDOHIGHCURRENT_DEFAULT ( _RAC_AUXADCTRIM_AUXADCTRIMLDOHIGHCURRENT_DEFAULT << 23)

Shifted mode DEFAULT for RAC_AUXADCTRIM

Definition at line 1622 of file efr32bg21_rac.h .

#define RAC_AUXADCTRIM_AUXADCTRIMLDOHIGHCURRENT_HighCurrentMode ( _RAC_AUXADCTRIM_AUXADCTRIMLDOHIGHCURRENT_HighCurrentMode << 23)

Shifted mode HighCurrentMode for RAC_AUXADCTRIM

Definition at line 1624 of file efr32bg21_rac.h .

#define RAC_AUXADCTRIM_AUXADCTRIMLDOHIGHCURRENT_LowCurrentMode ( _RAC_AUXADCTRIM_AUXADCTRIMLDOHIGHCURRENT_LowCurrentMode << 23)

Shifted mode LowCurrentMode for RAC_AUXADCTRIM

Definition at line 1623 of file efr32bg21_rac.h .

#define RAC_AUXADCTRIM_AUXADCTRIMREFP_DEFAULT ( _RAC_AUXADCTRIM_AUXADCTRIMREFP_DEFAULT << 24)

Shifted mode DEFAULT for RAC_AUXADCTRIM

Definition at line 1632 of file efr32bg21_rac.h .

#define RAC_AUXADCTRIM_AUXADCTRIMREFP_REF1p05 ( _RAC_AUXADCTRIM_AUXADCTRIMREFP_REF1p05 << 24)

Shifted mode REF1p05 for RAC_AUXADCTRIM

Definition at line 1633 of file efr32bg21_rac.h .

#define RAC_AUXADCTRIM_AUXADCTRIMREFP_REF1p16 ( _RAC_AUXADCTRIM_AUXADCTRIMREFP_REF1p16 << 24)

Shifted mode REF1p16 for RAC_AUXADCTRIM

Definition at line 1634 of file efr32bg21_rac.h .

#define RAC_AUXADCTRIM_AUXADCTRIMREFP_REF1p2 ( _RAC_AUXADCTRIM_AUXADCTRIMREFP_REF1p2 << 24)

Shifted mode REF1p2 for RAC_AUXADCTRIM

Definition at line 1635 of file efr32bg21_rac.h .

#define RAC_AUXADCTRIM_AUXADCTRIMREFP_REF1p25 ( _RAC_AUXADCTRIM_AUXADCTRIMREFP_REF1p25 << 24)

Shifted mode REF1p25 for RAC_AUXADCTRIM

Definition at line 1636 of file efr32bg21_rac.h .

#define RAC_AUXADCTRIM_AUXADCTRIMVREFVCM_DEFAULT ( _RAC_AUXADCTRIM_AUXADCTRIMVREFVCM_DEFAULT << 26)

Shifted mode DEFAULT for RAC_AUXADCTRIM

Definition at line 1644 of file efr32bg21_rac.h .

#define RAC_AUXADCTRIM_AUXADCTRIMVREFVCM_Trim0p6 ( _RAC_AUXADCTRIM_AUXADCTRIMVREFVCM_Trim0p6 << 26)

Shifted mode Trim0p6 for RAC_AUXADCTRIM

Definition at line 1645 of file efr32bg21_rac.h .

#define RAC_AUXADCTRIM_AUXADCTRIMVREFVCM_Trim0p65 ( _RAC_AUXADCTRIM_AUXADCTRIMVREFVCM_Trim0p65 << 26)

Shifted mode Trim0p65 for RAC_AUXADCTRIM

Definition at line 1646 of file efr32bg21_rac.h .

#define RAC_AUXADCTRIM_AUXADCTRIMVREFVCM_Trim0p7 ( _RAC_AUXADCTRIM_AUXADCTRIMVREFVCM_Trim0p7 << 26)

Shifted mode Trim0p7 for RAC_AUXADCTRIM

Definition at line 1647 of file efr32bg21_rac.h .

#define RAC_AUXADCTRIM_AUXADCTRIMVREFVCM_Trim0p75 ( _RAC_AUXADCTRIM_AUXADCTRIMVREFVCM_Trim0p75 << 26)

Shifted mode Trim0p75 for RAC_AUXADCTRIM

Definition at line 1648 of file efr32bg21_rac.h .

#define RAC_AUXADCTRIM_AUXADCTSENSETRIMVBE2 (0x1UL << 28)

AUXADCTSENSETRIMVBE2

Definition at line 1649 of file efr32bg21_rac.h .

#define RAC_AUXADCTRIM_AUXADCTSENSETRIMVBE2_DEFAULT ( _RAC_AUXADCTRIM_AUXADCTSENSETRIMVBE2_DEFAULT << 28)

Shifted mode DEFAULT for RAC_AUXADCTRIM

Definition at line 1655 of file efr32bg21_rac.h .

#define RAC_AUXADCTRIM_AUXADCTSENSETRIMVBE2_VBE_16uA ( _RAC_AUXADCTRIM_AUXADCTSENSETRIMVBE2_VBE_16uA << 28)

Shifted mode VBE_16uA for RAC_AUXADCTRIM

Definition at line 1656 of file efr32bg21_rac.h .

#define RAC_AUXADCTRIM_AUXADCTSENSETRIMVBE2_VBE_32uA ( _RAC_AUXADCTRIM_AUXADCTSENSETRIMVBE2_VBE_32uA << 28)

Shifted mode VBE_32uA for RAC_AUXADCTRIM

Definition at line 1657 of file efr32bg21_rac.h .

#define RAC_BREAKPOINT_BKPADDR_DEFAULT ( _RAC_BREAKPOINT_BKPADDR_DEFAULT << 0)

Shifted mode DEFAULT for RAC_BREAKPOINT

Definition at line 981 of file efr32bg21_rac.h .

#define RAC_CLKMULTCTRL_CLKMULTDIVN_DEFAULT ( _RAC_CLKMULTCTRL_CLKMULTDIVN_DEFAULT << 0)

Shifted mode DEFAULT for RAC_CLKMULTCTRL

Definition at line 2103 of file efr32bg21_rac.h .

#define RAC_CLKMULTCTRL_CLKMULTDIVR_DEFAULT ( _RAC_CLKMULTCTRL_CLKMULTDIVR_DEFAULT << 7)

Shifted mode DEFAULT for RAC_CLKMULTCTRL

Definition at line 2107 of file efr32bg21_rac.h .

#define RAC_CLKMULTCTRL_CLKMULTDIVX_DEFAULT ( _RAC_CLKMULTCTRL_CLKMULTDIVX_DEFAULT << 10)

Shifted mode DEFAULT for RAC_CLKMULTCTRL

Definition at line 2119 of file efr32bg21_rac.h .

#define RAC_CLKMULTCTRL_CLKMULTDIVX_div10 ( _RAC_CLKMULTCTRL_CLKMULTDIVX_div10 << 10)

Shifted mode div10 for RAC_CLKMULTCTRL

Definition at line 2125 of file efr32bg21_rac.h .

#define RAC_CLKMULTCTRL_CLKMULTDIVX_div12 ( _RAC_CLKMULTCTRL_CLKMULTDIVX_div12 << 10)

Shifted mode div12 for RAC_CLKMULTCTRL

Definition at line 2126 of file efr32bg21_rac.h .

#define RAC_CLKMULTCTRL_CLKMULTDIVX_div14 ( _RAC_CLKMULTCTRL_CLKMULTDIVX_div14 << 10)

Shifted mode div14 for RAC_CLKMULTCTRL

Definition at line 2127 of file efr32bg21_rac.h .

#define RAC_CLKMULTCTRL_CLKMULTDIVX_div_1 ( _RAC_CLKMULTCTRL_CLKMULTDIVX_div_1 << 10)

Shifted mode div_1 for RAC_CLKMULTCTRL

Definition at line 2120 of file efr32bg21_rac.h .

#define RAC_CLKMULTCTRL_CLKMULTDIVX_div_2 ( _RAC_CLKMULTCTRL_CLKMULTDIVX_div_2 << 10)

Shifted mode div_2 for RAC_CLKMULTCTRL

Definition at line 2121 of file efr32bg21_rac.h .

#define RAC_CLKMULTCTRL_CLKMULTDIVX_div_4 ( _RAC_CLKMULTCTRL_CLKMULTDIVX_div_4 << 10)

Shifted mode div_4 for RAC_CLKMULTCTRL

Definition at line 2122 of file efr32bg21_rac.h .

#define RAC_CLKMULTCTRL_CLKMULTDIVX_div_6 ( _RAC_CLKMULTCTRL_CLKMULTDIVX_div_6 << 10)

Shifted mode div_6 for RAC_CLKMULTCTRL

Definition at line 2123 of file efr32bg21_rac.h .

#define RAC_CLKMULTCTRL_CLKMULTDIVX_div_8 ( _RAC_CLKMULTCTRL_CLKMULTDIVX_div_8 << 10)

Shifted mode div_8 for RAC_CLKMULTCTRL

Definition at line 2124 of file efr32bg21_rac.h .

#define RAC_CLKMULTCTRL_CLKMULTENRESYNC (0x1UL << 13)

CLKMULTENRESYNC

Definition at line 2128 of file efr32bg21_rac.h .

#define RAC_CLKMULTCTRL_CLKMULTENRESYNC_DEFAULT ( _RAC_CLKMULTCTRL_CLKMULTENRESYNC_DEFAULT << 13)

Shifted mode DEFAULT for RAC_CLKMULTCTRL

Definition at line 2134 of file efr32bg21_rac.h .

#define RAC_CLKMULTCTRL_CLKMULTENRESYNC_disable_sync ( _RAC_CLKMULTCTRL_CLKMULTENRESYNC_disable_sync << 13)

Shifted mode disable_sync for RAC_CLKMULTCTRL

Definition at line 2135 of file efr32bg21_rac.h .

#define RAC_CLKMULTCTRL_CLKMULTENRESYNC_enable_sync ( _RAC_CLKMULTCTRL_CLKMULTENRESYNC_enable_sync << 13)

Shifted mode enable_sync for RAC_CLKMULTCTRL

Definition at line 2136 of file efr32bg21_rac.h .

#define RAC_CLKMULTCTRL_CLKMULTVALID (0x1UL << 14)

CLKMULTVALID

Definition at line 2137 of file efr32bg21_rac.h .

#define RAC_CLKMULTCTRL_CLKMULTVALID_DEFAULT ( _RAC_CLKMULTCTRL_CLKMULTVALID_DEFAULT << 14)

Shifted mode DEFAULT for RAC_CLKMULTCTRL

Definition at line 2143 of file efr32bg21_rac.h .

#define RAC_CLKMULTCTRL_CLKMULTVALID_invalid ( _RAC_CLKMULTCTRL_CLKMULTVALID_invalid << 14)

Shifted mode invalid for RAC_CLKMULTCTRL

Definition at line 2144 of file efr32bg21_rac.h .

#define RAC_CLKMULTCTRL_CLKMULTVALID_valid ( _RAC_CLKMULTCTRL_CLKMULTVALID_valid << 14)

Shifted mode valid for RAC_CLKMULTCTRL

Definition at line 2145 of file efr32bg21_rac.h .

#define RAC_CLKMULTEN0_CLKMULTBWCAL_bw_1lsb ( _RAC_CLKMULTEN0_CLKMULTBWCAL_bw_1lsb << 0)

Shifted mode bw_1lsb for RAC_CLKMULTEN0

Definition at line 1871 of file efr32bg21_rac.h .

#define RAC_CLKMULTEN0_CLKMULTBWCAL_bw_2lsb ( _RAC_CLKMULTEN0_CLKMULTBWCAL_bw_2lsb << 0)

Shifted mode bw_2lsb for RAC_CLKMULTEN0

Definition at line 1872 of file efr32bg21_rac.h .

#define RAC_CLKMULTEN0_CLKMULTBWCAL_bw_3lsb ( _RAC_CLKMULTEN0_CLKMULTBWCAL_bw_3lsb << 0)

Shifted mode bw_3lsb for RAC_CLKMULTEN0

Definition at line 1873 of file efr32bg21_rac.h .

#define RAC_CLKMULTEN0_CLKMULTBWCAL_bw_4lsb ( _RAC_CLKMULTEN0_CLKMULTBWCAL_bw_4lsb << 0)

Shifted mode bw_4lsb for RAC_CLKMULTEN0

Definition at line 1874 of file efr32bg21_rac.h .

#define RAC_CLKMULTEN0_CLKMULTBWCAL_DEFAULT ( _RAC_CLKMULTEN0_CLKMULTBWCAL_DEFAULT << 0)

Shifted mode DEFAULT for RAC_CLKMULTEN0

Definition at line 1870 of file efr32bg21_rac.h .

#define RAC_CLKMULTEN0_CLKMULTDISICO (0x1UL << 2)

CLKMULTDISICO

Definition at line 1875 of file efr32bg21_rac.h .

#define RAC_CLKMULTEN0_CLKMULTDISICO_DEFAULT ( _RAC_CLKMULTEN0_CLKMULTDISICO_DEFAULT << 2)

Shifted mode DEFAULT for RAC_CLKMULTEN0

Definition at line 1881 of file efr32bg21_rac.h .

#define RAC_CLKMULTEN0_CLKMULTDISICO_disable ( _RAC_CLKMULTEN0_CLKMULTDISICO_disable << 2)

Shifted mode disable for RAC_CLKMULTEN0

Definition at line 1883 of file efr32bg21_rac.h .

#define RAC_CLKMULTEN0_CLKMULTDISICO_enable ( _RAC_CLKMULTEN0_CLKMULTDISICO_enable << 2)

Shifted mode enable for RAC_CLKMULTEN0

Definition at line 1882 of file efr32bg21_rac.h .

#define RAC_CLKMULTEN0_CLKMULTENBBDET (0x1UL << 3)

CLKMULTENBBDET

Definition at line 1884 of file efr32bg21_rac.h .

#define RAC_CLKMULTEN0_CLKMULTENBBDET_DEFAULT ( _RAC_CLKMULTEN0_CLKMULTENBBDET_DEFAULT << 3)

Shifted mode DEFAULT for RAC_CLKMULTEN0

Definition at line 1890 of file efr32bg21_rac.h .

#define RAC_CLKMULTEN0_CLKMULTENBBDET_disable ( _RAC_CLKMULTEN0_CLKMULTENBBDET_disable << 3)

Shifted mode disable for RAC_CLKMULTEN0

Definition at line 1891 of file efr32bg21_rac.h .

#define RAC_CLKMULTEN0_CLKMULTENBBDET_enable ( _RAC_CLKMULTEN0_CLKMULTENBBDET_enable << 3)

Shifted mode enable for RAC_CLKMULTEN0

Definition at line 1892 of file efr32bg21_rac.h .

#define RAC_CLKMULTEN0_CLKMULTENBBXLDET (0x1UL << 4)

CLKMULTENBBXLDET

Definition at line 1893 of file efr32bg21_rac.h .

#define RAC_CLKMULTEN0_CLKMULTENBBXLDET_DEFAULT ( _RAC_CLKMULTEN0_CLKMULTENBBXLDET_DEFAULT << 4)

Shifted mode DEFAULT for RAC_CLKMULTEN0

Definition at line 1899 of file efr32bg21_rac.h .

#define RAC_CLKMULTEN0_CLKMULTENBBXLDET_disable ( _RAC_CLKMULTEN0_CLKMULTENBBXLDET_disable << 4)

Shifted mode disable for RAC_CLKMULTEN0

Definition at line 1900 of file efr32bg21_rac.h .

#define RAC_CLKMULTEN0_CLKMULTENBBXLDET_enable ( _RAC_CLKMULTEN0_CLKMULTENBBXLDET_enable << 4)

Shifted mode enable for RAC_CLKMULTEN0

Definition at line 1901 of file efr32bg21_rac.h .

#define RAC_CLKMULTEN0_CLKMULTENBBXMDET (0x1UL << 5)

CLKMULTENBBXMDET

Definition at line 1902 of file efr32bg21_rac.h .

#define RAC_CLKMULTEN0_CLKMULTENBBXMDET_DEFAULT ( _RAC_CLKMULTEN0_CLKMULTENBBXMDET_DEFAULT << 5)

Shifted mode DEFAULT for RAC_CLKMULTEN0

Definition at line 1908 of file efr32bg21_rac.h .

#define RAC_CLKMULTEN0_CLKMULTENBBXMDET_disable ( _RAC_CLKMULTEN0_CLKMULTENBBXMDET_disable << 5)

Shifted mode disable for RAC_CLKMULTEN0

Definition at line 1909 of file efr32bg21_rac.h .

#define RAC_CLKMULTEN0_CLKMULTENBBXMDET_enable ( _RAC_CLKMULTEN0_CLKMULTENBBXMDET_enable << 5)

Shifted mode enable for RAC_CLKMULTEN0

Definition at line 1910 of file efr32bg21_rac.h .

#define RAC_CLKMULTEN0_CLKMULTENCFDET (0x1UL << 6)

CLKMULTENCFDET

Definition at line 1911 of file efr32bg21_rac.h .

#define RAC_CLKMULTEN0_CLKMULTENCFDET_DEFAULT ( _RAC_CLKMULTEN0_CLKMULTENCFDET_DEFAULT << 6)

Shifted mode DEFAULT for RAC_CLKMULTEN0

Definition at line 1917 of file efr32bg21_rac.h .

#define RAC_CLKMULTEN0_CLKMULTENCFDET_disable ( _RAC_CLKMULTEN0_CLKMULTENCFDET_disable << 6)

Shifted mode disable for RAC_CLKMULTEN0

Definition at line 1918 of file efr32bg21_rac.h .

#define RAC_CLKMULTEN0_CLKMULTENCFDET_enable ( _RAC_CLKMULTEN0_CLKMULTENCFDET_enable << 6)

Shifted mode enable for RAC_CLKMULTEN0

Definition at line 1919 of file efr32bg21_rac.h .

#define RAC_CLKMULTEN0_CLKMULTENDITHER (0x1UL << 7)

CLKMULTENDITHER

Definition at line 1920 of file efr32bg21_rac.h .

#define RAC_CLKMULTEN0_CLKMULTENDITHER_DEFAULT ( _RAC_CLKMULTEN0_CLKMULTENDITHER_DEFAULT << 7)

Shifted mode DEFAULT for RAC_CLKMULTEN0

Definition at line 1926 of file efr32bg21_rac.h .

#define RAC_CLKMULTEN0_CLKMULTENDITHER_disable ( _RAC_CLKMULTEN0_CLKMULTENDITHER_disable << 7)

Shifted mode disable for RAC_CLKMULTEN0

Definition at line 1927 of file efr32bg21_rac.h .

#define RAC_CLKMULTEN0_CLKMULTENDITHER_enable ( _RAC_CLKMULTEN0_CLKMULTENDITHER_enable << 7)

Shifted mode enable for RAC_CLKMULTEN0

Definition at line 1928 of file efr32bg21_rac.h .

#define RAC_CLKMULTEN0_CLKMULTENDRVADC (0x1UL << 8)

CLKMULTENDRVADC

Definition at line 1929 of file efr32bg21_rac.h .

#define RAC_CLKMULTEN0_CLKMULTENDRVADC_DEFAULT ( _RAC_CLKMULTEN0_CLKMULTENDRVADC_DEFAULT << 8)

Shifted mode DEFAULT for RAC_CLKMULTEN0

Definition at line 1935 of file efr32bg21_rac.h .

#define RAC_CLKMULTEN0_CLKMULTENDRVADC_disable ( _RAC_CLKMULTEN0_CLKMULTENDRVADC_disable << 8)

Shifted mode disable for RAC_CLKMULTEN0

Definition at line 1936 of file efr32bg21_rac.h .

#define RAC_CLKMULTEN0_CLKMULTENDRVADC_enable ( _RAC_CLKMULTEN0_CLKMULTENDRVADC_enable << 8)

Shifted mode enable for RAC_CLKMULTEN0

Definition at line 1937 of file efr32bg21_rac.h .

#define RAC_CLKMULTEN0_CLKMULTENDRVDIFF (0x1UL << 9)

CLKMULTENDRVDIFF

Definition at line 1938 of file efr32bg21_rac.h .

#define RAC_CLKMULTEN0_CLKMULTENDRVDIFF_DEFAULT ( _RAC_CLKMULTEN0_CLKMULTENDRVDIFF_DEFAULT << 9)

Shifted mode DEFAULT for RAC_CLKMULTEN0

Definition at line 1944 of file efr32bg21_rac.h .

#define RAC_CLKMULTEN0_CLKMULTENDRVDIFF_Differential ( _RAC_CLKMULTEN0_CLKMULTENDRVDIFF_Differential << 9)

Shifted mode Differential for RAC_CLKMULTEN0

Definition at line 1946 of file efr32bg21_rac.h .

#define RAC_CLKMULTEN0_CLKMULTENDRVDIFF_Single_ended ( _RAC_CLKMULTEN0_CLKMULTENDRVDIFF_Single_ended << 9)

Shifted mode Single_ended for RAC_CLKMULTEN0

Definition at line 1945 of file efr32bg21_rac.h .

#define RAC_CLKMULTEN0_CLKMULTENDRVRX2P4G (0x1UL << 10)

CLKMULTENDRVRX2P4G

Definition at line 1947 of file efr32bg21_rac.h .

#define RAC_CLKMULTEN0_CLKMULTENDRVRX2P4G_DEFAULT ( _RAC_CLKMULTEN0_CLKMULTENDRVRX2P4G_DEFAULT << 10)

Shifted mode DEFAULT for RAC_CLKMULTEN0

Definition at line 1953 of file efr32bg21_rac.h .

#define RAC_CLKMULTEN0_CLKMULTENDRVRX2P4G_disable ( _RAC_CLKMULTEN0_CLKMULTENDRVRX2P4G_disable << 10)

Shifted mode disable for RAC_CLKMULTEN0

Definition at line 1954 of file efr32bg21_rac.h .

#define RAC_CLKMULTEN0_CLKMULTENDRVRX2P4G_enable ( _RAC_CLKMULTEN0_CLKMULTENDRVRX2P4G_enable << 10)

Shifted mode enable for RAC_CLKMULTEN0

Definition at line 1955 of file efr32bg21_rac.h .

#define RAC_CLKMULTEN0_CLKMULTENFBDIV (0x1UL << 13)

CLKMULTENFBDIV

Definition at line 1956 of file efr32bg21_rac.h .

#define RAC_CLKMULTEN0_CLKMULTENFBDIV_DEFAULT ( _RAC_CLKMULTEN0_CLKMULTENFBDIV_DEFAULT << 13)

Shifted mode DEFAULT for RAC_CLKMULTEN0

Definition at line 1962 of file efr32bg21_rac.h .

#define RAC_CLKMULTEN0_CLKMULTENFBDIV_disable ( _RAC_CLKMULTEN0_CLKMULTENFBDIV_disable << 13)

Shifted mode disable for RAC_CLKMULTEN0

Definition at line 1963 of file efr32bg21_rac.h .

#define RAC_CLKMULTEN0_CLKMULTENFBDIV_enable ( _RAC_CLKMULTEN0_CLKMULTENFBDIV_enable << 13)

Shifted mode enable for RAC_CLKMULTEN0

Definition at line 1964 of file efr32bg21_rac.h .

#define RAC_CLKMULTEN0_CLKMULTENREFDIV (0x1UL << 14)

CLKMULTENREFDIV

Definition at line 1965 of file efr32bg21_rac.h .

#define RAC_CLKMULTEN0_CLKMULTENREFDIV_DEFAULT ( _RAC_CLKMULTEN0_CLKMULTENREFDIV_DEFAULT << 14)

Shifted mode DEFAULT for RAC_CLKMULTEN0

Definition at line 1971 of file efr32bg21_rac.h .

#define RAC_CLKMULTEN0_CLKMULTENREFDIV_disable ( _RAC_CLKMULTEN0_CLKMULTENREFDIV_disable << 14)

Shifted mode disable for RAC_CLKMULTEN0

Definition at line 1972 of file efr32bg21_rac.h .

#define RAC_CLKMULTEN0_CLKMULTENREFDIV_enable ( _RAC_CLKMULTEN0_CLKMULTENREFDIV_enable << 14)

Shifted mode enable for RAC_CLKMULTEN0

Definition at line 1973 of file efr32bg21_rac.h .

#define RAC_CLKMULTEN0_CLKMULTENREG1 (0x1UL << 15)

CLKMULTENREG1

Definition at line 1974 of file efr32bg21_rac.h .

#define RAC_CLKMULTEN0_CLKMULTENREG1_DEFAULT ( _RAC_CLKMULTEN0_CLKMULTENREG1_DEFAULT << 15)

Shifted mode DEFAULT for RAC_CLKMULTEN0

Definition at line 1980 of file efr32bg21_rac.h .

#define RAC_CLKMULTEN0_CLKMULTENREG1_disable ( _RAC_CLKMULTEN0_CLKMULTENREG1_disable << 15)

Shifted mode disable for RAC_CLKMULTEN0

Definition at line 1981 of file efr32bg21_rac.h .

#define RAC_CLKMULTEN0_CLKMULTENREG1_enable ( _RAC_CLKMULTEN0_CLKMULTENREG1_enable << 15)

Shifted mode enable for RAC_CLKMULTEN0

Definition at line 1982 of file efr32bg21_rac.h .

#define RAC_CLKMULTEN0_CLKMULTENREG2 (0x1UL << 16)

CLKMULTENREG2

Definition at line 1983 of file efr32bg21_rac.h .

#define RAC_CLKMULTEN0_CLKMULTENREG2_DEFAULT ( _RAC_CLKMULTEN0_CLKMULTENREG2_DEFAULT << 16)

Shifted mode DEFAULT for RAC_CLKMULTEN0

Definition at line 1989 of file efr32bg21_rac.h .

#define RAC_CLKMULTEN0_CLKMULTENREG2_disable ( _RAC_CLKMULTEN0_CLKMULTENREG2_disable << 16)

Shifted mode disable for RAC_CLKMULTEN0

Definition at line 1990 of file efr32bg21_rac.h .

#define RAC_CLKMULTEN0_CLKMULTENREG2_enable ( _RAC_CLKMULTEN0_CLKMULTENREG2_enable << 16)

Shifted mode enable for RAC_CLKMULTEN0

Definition at line 1991 of file efr32bg21_rac.h .

#define RAC_CLKMULTEN0_CLKMULTENROTDET (0x1UL << 17)

CLKMULTENROTDET

Definition at line 1992 of file efr32bg21_rac.h .

#define RAC_CLKMULTEN0_CLKMULTENROTDET_DEFAULT ( _RAC_CLKMULTEN0_CLKMULTENROTDET_DEFAULT << 17)

Shifted mode DEFAULT for RAC_CLKMULTEN0

Definition at line 1998 of file efr32bg21_rac.h .

#define RAC_CLKMULTEN0_CLKMULTENROTDET_disable ( _RAC_CLKMULTEN0_CLKMULTENROTDET_disable << 17)

Shifted mode disable for RAC_CLKMULTEN0

Definition at line 1999 of file efr32bg21_rac.h .

#define RAC_CLKMULTEN0_CLKMULTENROTDET_enable ( _RAC_CLKMULTEN0_CLKMULTENROTDET_enable << 17)

Shifted mode enable for RAC_CLKMULTEN0

Definition at line 2000 of file efr32bg21_rac.h .

#define RAC_CLKMULTEN0_CLKMULTFREQCAL_DEFAULT ( _RAC_CLKMULTEN0_CLKMULTFREQCAL_DEFAULT << 18)

Shifted mode DEFAULT for RAC_CLKMULTEN0

Definition at line 2008 of file efr32bg21_rac.h .

#define RAC_CLKMULTEN0_CLKMULTFREQCAL_pedes_14uA ( _RAC_CLKMULTEN0_CLKMULTFREQCAL_pedes_14uA << 18)

Shifted mode pedes_14uA for RAC_CLKMULTEN0

Definition at line 2009 of file efr32bg21_rac.h .

#define RAC_CLKMULTEN0_CLKMULTFREQCAL_pedes_22uA ( _RAC_CLKMULTEN0_CLKMULTFREQCAL_pedes_22uA << 18)

Shifted mode pedes_22uA for RAC_CLKMULTEN0

Definition at line 2010 of file efr32bg21_rac.h .

#define RAC_CLKMULTEN0_CLKMULTFREQCAL_pedes_30uA ( _RAC_CLKMULTEN0_CLKMULTFREQCAL_pedes_30uA << 18)

Shifted mode pedes_30uA for RAC_CLKMULTEN0

Definition at line 2011 of file efr32bg21_rac.h .

#define RAC_CLKMULTEN0_CLKMULTFREQCAL_pedes_38uA ( _RAC_CLKMULTEN0_CLKMULTFREQCAL_pedes_38uA << 18)

Shifted mode pedes_38uA for RAC_CLKMULTEN0

Definition at line 2012 of file efr32bg21_rac.h .

#define RAC_CLKMULTEN0_CLKMULTREG1ADJV_DEFAULT ( _RAC_CLKMULTEN0_CLKMULTREG1ADJV_DEFAULT << 20)

Shifted mode DEFAULT for RAC_CLKMULTEN0

Definition at line 2020 of file efr32bg21_rac.h .

#define RAC_CLKMULTEN0_CLKMULTREG1ADJV_v1p28 ( _RAC_CLKMULTEN0_CLKMULTREG1ADJV_v1p28 << 20)

Shifted mode v1p28 for RAC_CLKMULTEN0

Definition at line 2021 of file efr32bg21_rac.h .

#define RAC_CLKMULTEN0_CLKMULTREG1ADJV_v1p32 ( _RAC_CLKMULTEN0_CLKMULTREG1ADJV_v1p32 << 20)

Shifted mode v1p32 for RAC_CLKMULTEN0

Definition at line 2022 of file efr32bg21_rac.h .

#define RAC_CLKMULTEN0_CLKMULTREG1ADJV_v1p33 ( _RAC_CLKMULTEN0_CLKMULTREG1ADJV_v1p33 << 20)

Shifted mode v1p33 for RAC_CLKMULTEN0

Definition at line 2023 of file efr32bg21_rac.h .

#define RAC_CLKMULTEN0_CLKMULTREG1ADJV_v1p38 ( _RAC_CLKMULTEN0_CLKMULTREG1ADJV_v1p38 << 20)

Shifted mode v1p38 for RAC_CLKMULTEN0

Definition at line 2024 of file efr32bg21_rac.h .

#define RAC_CLKMULTEN0_CLKMULTREG2ADJI_DEFAULT ( _RAC_CLKMULTEN0_CLKMULTREG2ADJI_DEFAULT << 22)

Shifted mode DEFAULT for RAC_CLKMULTEN0

Definition at line 2032 of file efr32bg21_rac.h .

#define RAC_CLKMULTEN0_CLKMULTREG2ADJI_I_1040uA ( _RAC_CLKMULTEN0_CLKMULTREG2ADJI_I_1040uA << 22)

Shifted mode I_1040uA for RAC_CLKMULTEN0

Definition at line 2036 of file efr32bg21_rac.h .

#define RAC_CLKMULTEN0_CLKMULTREG2ADJI_I_200uA ( _RAC_CLKMULTEN0_CLKMULTREG2ADJI_I_200uA << 22)

Shifted mode I_200uA for RAC_CLKMULTEN0

Definition at line 2033 of file efr32bg21_rac.h .

#define RAC_CLKMULTEN0_CLKMULTREG2ADJI_I_480uA ( _RAC_CLKMULTEN0_CLKMULTREG2ADJI_I_480uA << 22)

Shifted mode I_480uA for RAC_CLKMULTEN0

Definition at line 2034 of file efr32bg21_rac.h .

#define RAC_CLKMULTEN0_CLKMULTREG2ADJI_I_760uA ( _RAC_CLKMULTEN0_CLKMULTREG2ADJI_I_760uA << 22)

Shifted mode I_760uA for RAC_CLKMULTEN0

Definition at line 2035 of file efr32bg21_rac.h .

#define RAC_CLKMULTEN0_CLKMULTREG2ADJV_DEFAULT ( _RAC_CLKMULTEN0_CLKMULTREG2ADJV_DEFAULT << 24)

Shifted mode DEFAULT for RAC_CLKMULTEN0

Definition at line 2044 of file efr32bg21_rac.h .

#define RAC_CLKMULTEN0_CLKMULTREG2ADJV_v1p03 ( _RAC_CLKMULTEN0_CLKMULTREG2ADJV_v1p03 << 24)

Shifted mode v1p03 for RAC_CLKMULTEN0

Definition at line 2045 of file efr32bg21_rac.h .

#define RAC_CLKMULTEN0_CLKMULTREG2ADJV_v1p09 ( _RAC_CLKMULTEN0_CLKMULTREG2ADJV_v1p09 << 24)

Shifted mode v1p09 for RAC_CLKMULTEN0

Definition at line 2046 of file efr32bg21_rac.h .

#define RAC_CLKMULTEN0_CLKMULTREG2ADJV_v1p10 ( _RAC_CLKMULTEN0_CLKMULTREG2ADJV_v1p10 << 24)

Shifted mode v1p10 for RAC_CLKMULTEN0

Definition at line 2047 of file efr32bg21_rac.h .

#define RAC_CLKMULTEN0_CLKMULTREG2ADJV_v1p16 ( _RAC_CLKMULTEN0_CLKMULTREG2ADJV_v1p16 << 24)

Shifted mode v1p16 for RAC_CLKMULTEN0

Definition at line 2048 of file efr32bg21_rac.h .

#define RAC_CLKMULTEN1_CLKMULTINNIBBLE_DEFAULT ( _RAC_CLKMULTEN1_CLKMULTINNIBBLE_DEFAULT << 0)

Shifted mode DEFAULT for RAC_CLKMULTEN1

Definition at line 2056 of file efr32bg21_rac.h .

#define RAC_CLKMULTEN1_CLKMULTLDCNIB (0x1UL << 4)

CLKMULTLDCNIB

Definition at line 2057 of file efr32bg21_rac.h .

#define RAC_CLKMULTEN1_CLKMULTLDCNIB_DEFAULT ( _RAC_CLKMULTEN1_CLKMULTLDCNIB_DEFAULT << 4)

Shifted mode DEFAULT for RAC_CLKMULTEN1

Definition at line 2063 of file efr32bg21_rac.h .

#define RAC_CLKMULTEN1_CLKMULTLDCNIB_disable ( _RAC_CLKMULTEN1_CLKMULTLDCNIB_disable << 4)

Shifted mode disable for RAC_CLKMULTEN1

Definition at line 2064 of file efr32bg21_rac.h .

#define RAC_CLKMULTEN1_CLKMULTLDCNIB_enable ( _RAC_CLKMULTEN1_CLKMULTLDCNIB_enable << 4)

Shifted mode enable for RAC_CLKMULTEN1

Definition at line 2065 of file efr32bg21_rac.h .

#define RAC_CLKMULTEN1_CLKMULTLDFNIB (0x1UL << 5)

CLKMULTLDFNIB

Definition at line 2066 of file efr32bg21_rac.h .

#define RAC_CLKMULTEN1_CLKMULTLDFNIB_DEFAULT ( _RAC_CLKMULTEN1_CLKMULTLDFNIB_DEFAULT << 5)

Shifted mode DEFAULT for RAC_CLKMULTEN1

Definition at line 2072 of file efr32bg21_rac.h .

#define RAC_CLKMULTEN1_CLKMULTLDFNIB_disable ( _RAC_CLKMULTEN1_CLKMULTLDFNIB_disable << 5)

Shifted mode disable for RAC_CLKMULTEN1

Definition at line 2073 of file efr32bg21_rac.h .

#define RAC_CLKMULTEN1_CLKMULTLDFNIB_enable ( _RAC_CLKMULTEN1_CLKMULTLDFNIB_enable << 5)

Shifted mode enable for RAC_CLKMULTEN1

Definition at line 2074 of file efr32bg21_rac.h .

#define RAC_CLKMULTEN1_CLKMULTLDMNIB (0x1UL << 6)

CLKMULTLDMNIB

Definition at line 2075 of file efr32bg21_rac.h .

#define RAC_CLKMULTEN1_CLKMULTLDMNIB_DEFAULT ( _RAC_CLKMULTEN1_CLKMULTLDMNIB_DEFAULT << 6)

Shifted mode DEFAULT for RAC_CLKMULTEN1

Definition at line 2081 of file efr32bg21_rac.h .

#define RAC_CLKMULTEN1_CLKMULTLDMNIB_disable ( _RAC_CLKMULTEN1_CLKMULTLDMNIB_disable << 6)

Shifted mode disable for RAC_CLKMULTEN1

Definition at line 2082 of file efr32bg21_rac.h .

#define RAC_CLKMULTEN1_CLKMULTLDMNIB_enable ( _RAC_CLKMULTEN1_CLKMULTLDMNIB_enable << 6)

Shifted mode enable for RAC_CLKMULTEN1

Definition at line 2083 of file efr32bg21_rac.h .

#define RAC_CLKMULTEN1_CLKMULTRDNIBBLE_coarse_nibble ( _RAC_CLKMULTEN1_CLKMULTRDNIBBLE_coarse_nibble << 7)

Shifted mode coarse_nibble for RAC_CLKMULTEN1

Definition at line 2095 of file efr32bg21_rac.h .

#define RAC_CLKMULTEN1_CLKMULTRDNIBBLE_DEFAULT ( _RAC_CLKMULTEN1_CLKMULTRDNIBBLE_DEFAULT << 7)

Shifted mode DEFAULT for RAC_CLKMULTEN1

Definition at line 2091 of file efr32bg21_rac.h .

#define RAC_CLKMULTEN1_CLKMULTRDNIBBLE_fine_nibble ( _RAC_CLKMULTEN1_CLKMULTRDNIBBLE_fine_nibble << 7)

Shifted mode fine_nibble for RAC_CLKMULTEN1

Definition at line 2093 of file efr32bg21_rac.h .

#define RAC_CLKMULTEN1_CLKMULTRDNIBBLE_moderate_nibble ( _RAC_CLKMULTEN1_CLKMULTRDNIBBLE_moderate_nibble << 7)

Shifted mode moderate_nibble for RAC_CLKMULTEN1

Definition at line 2094 of file efr32bg21_rac.h .

#define RAC_CLKMULTEN1_CLKMULTRDNIBBLE_quarter_nibble ( _RAC_CLKMULTEN1_CLKMULTRDNIBBLE_quarter_nibble << 7)

Shifted mode quarter_nibble for RAC_CLKMULTEN1

Definition at line 2092 of file efr32bg21_rac.h .

#define RAC_CLKMULTSTATUS_CLKMULTACKVALID (0x1UL << 4)

CLKMULTACKVALID

Definition at line 2154 of file efr32bg21_rac.h .

#define RAC_CLKMULTSTATUS_CLKMULTACKVALID_DEFAULT ( _RAC_CLKMULTSTATUS_CLKMULTACKVALID_DEFAULT << 4)

Shifted mode DEFAULT for RAC_CLKMULTSTATUS

Definition at line 2160 of file efr32bg21_rac.h .

#define RAC_CLKMULTSTATUS_CLKMULTACKVALID_invalid ( _RAC_CLKMULTSTATUS_CLKMULTACKVALID_invalid << 4)

Shifted mode invalid for RAC_CLKMULTSTATUS

Definition at line 2161 of file efr32bg21_rac.h .

#define RAC_CLKMULTSTATUS_CLKMULTACKVALID_valid ( _RAC_CLKMULTSTATUS_CLKMULTACKVALID_valid << 4)

Shifted mode valid for RAC_CLKMULTSTATUS

Definition at line 2162 of file efr32bg21_rac.h .

#define RAC_CLKMULTSTATUS_CLKMULTOUTNIBBLE_DEFAULT ( _RAC_CLKMULTSTATUS_CLKMULTOUTNIBBLE_DEFAULT << 0)

Shifted mode DEFAULT for RAC_CLKMULTSTATUS

Definition at line 2153 of file efr32bg21_rac.h .

#define RAC_CMD_CLEARRXOVERFLOW (0x1UL << 6)

Clear RX Overflow

Definition at line 651 of file efr32bg21_rac.h .

#define RAC_CMD_CLEARRXOVERFLOW_DEFAULT ( _RAC_CMD_CLEARRXOVERFLOW_DEFAULT << 6)

Shifted mode DEFAULT for RAC_CMD

Definition at line 655 of file efr32bg21_rac.h .

#define RAC_CMD_CLEARTXEN (0x1UL << 3)

Clear TX Enable

Definition at line 636 of file efr32bg21_rac.h .

#define RAC_CMD_CLEARTXEN_DEFAULT ( _RAC_CMD_CLEARTXEN_DEFAULT << 3)

Shifted mode DEFAULT for RAC_CMD

Definition at line 640 of file efr32bg21_rac.h .

#define RAC_CMD_FORCETX (0x1UL << 1)

Force TX Command

Definition at line 626 of file efr32bg21_rac.h .

#define RAC_CMD_FORCETX_DEFAULT ( _RAC_CMD_FORCETX_DEFAULT << 1)

Shifted mode DEFAULT for RAC_CMD

Definition at line 630 of file efr32bg21_rac.h .

#define RAC_CMD_LNAENCLEAR (0x1UL << 15)

LNAEN Clear

Definition at line 681 of file efr32bg21_rac.h .

#define RAC_CMD_LNAENCLEAR_DEFAULT ( _RAC_CMD_LNAENCLEAR_DEFAULT << 15)

Shifted mode DEFAULT for RAC_CMD

Definition at line 685 of file efr32bg21_rac.h .

#define RAC_CMD_LNAENSET (0x1UL << 14)

LNAEN Set

Definition at line 676 of file efr32bg21_rac.h .

#define RAC_CMD_LNAENSET_DEFAULT ( _RAC_CMD_LNAENSET_DEFAULT << 14)

Shifted mode DEFAULT for RAC_CMD

Definition at line 680 of file efr32bg21_rac.h .

#define RAC_CMD_PAENCLEAR (0x1UL << 13)

PAEN Clear

Definition at line 671 of file efr32bg21_rac.h .

#define RAC_CMD_PAENCLEAR_DEFAULT ( _RAC_CMD_PAENCLEAR_DEFAULT << 13)

Shifted mode DEFAULT for RAC_CMD

Definition at line 675 of file efr32bg21_rac.h .

#define RAC_CMD_PAENSET (0x1UL << 12)

PAEN Set

Definition at line 666 of file efr32bg21_rac.h .

#define RAC_CMD_PAENSET_DEFAULT ( _RAC_CMD_PAENSET_DEFAULT << 12)

Shifted mode DEFAULT for RAC_CMD

Definition at line 670 of file efr32bg21_rac.h .

#define RAC_CMD_RXCAL (0x1UL << 7)

Start an RX Calibration

Definition at line 656 of file efr32bg21_rac.h .

#define RAC_CMD_RXCAL_DEFAULT ( _RAC_CMD_RXCAL_DEFAULT << 7)

Shifted mode DEFAULT for RAC_CMD

Definition at line 660 of file efr32bg21_rac.h .

#define RAC_CMD_RXDIS (0x1UL << 8)

RX Disable

Definition at line 661 of file efr32bg21_rac.h .

#define RAC_CMD_RXDIS_DEFAULT ( _RAC_CMD_RXDIS_DEFAULT << 8)

Shifted mode DEFAULT for RAC_CMD

Definition at line 665 of file efr32bg21_rac.h .

#define RAC_CMD_TXAFTERFRAME (0x1UL << 4)

TX After Frame

Definition at line 641 of file efr32bg21_rac.h .

#define RAC_CMD_TXAFTERFRAME_DEFAULT ( _RAC_CMD_TXAFTERFRAME_DEFAULT << 4)

Shifted mode DEFAULT for RAC_CMD

Definition at line 645 of file efr32bg21_rac.h .

#define RAC_CMD_TXDIS (0x1UL << 5)

TX Disable

Definition at line 646 of file efr32bg21_rac.h .

#define RAC_CMD_TXDIS_DEFAULT ( _RAC_CMD_TXDIS_DEFAULT << 5)

Shifted mode DEFAULT for RAC_CMD

Definition at line 650 of file efr32bg21_rac.h .

#define RAC_CMD_TXEN (0x1UL << 0)

Transmitter Enable

Definition at line 621 of file efr32bg21_rac.h .

#define RAC_CMD_TXEN_DEFAULT ( _RAC_CMD_TXEN_DEFAULT << 0)

Shifted mode DEFAULT for RAC_CMD

Definition at line 625 of file efr32bg21_rac.h .

#define RAC_CMD_TXONCCA (0x1UL << 2)

Transmit On CCA

Definition at line 631 of file efr32bg21_rac.h .

#define RAC_CMD_TXONCCA_DEFAULT ( _RAC_CMD_TXONCCA_DEFAULT << 2)

Shifted mode DEFAULT for RAC_CMD

Definition at line 635 of file efr32bg21_rac.h .

#define RAC_CTRL_ACTIVEPOL (0x1UL << 7)

ACTIVE signal polarity

Definition at line 736 of file efr32bg21_rac.h .

#define RAC_CTRL_ACTIVEPOL_DEFAULT ( _RAC_CTRL_ACTIVEPOL_DEFAULT << 7)

Shifted mode DEFAULT for RAC_CTRL

Definition at line 742 of file efr32bg21_rac.h .

#define RAC_CTRL_ACTIVEPOL_X0 ( _RAC_CTRL_ACTIVEPOL_X0 << 7)

Shifted mode X0 for RAC_CTRL

Definition at line 743 of file efr32bg21_rac.h .

#define RAC_CTRL_ACTIVEPOL_X1 ( _RAC_CTRL_ACTIVEPOL_X1 << 7)

Shifted mode X1 for RAC_CTRL

Definition at line 744 of file efr32bg21_rac.h .

#define RAC_CTRL_FORCEDISABLE (0x1UL << 0)

Force Radio Disable

Definition at line 690 of file efr32bg21_rac.h .

#define RAC_CTRL_FORCEDISABLE_DEFAULT ( _RAC_CTRL_FORCEDISABLE_DEFAULT << 0)

Shifted mode DEFAULT for RAC_CTRL

Definition at line 694 of file efr32bg21_rac.h .

#define RAC_CTRL_LNAENPOL (0x1UL << 9)

LNAEN signal polarity

Definition at line 754 of file efr32bg21_rac.h .

#define RAC_CTRL_LNAENPOL_DEFAULT ( _RAC_CTRL_LNAENPOL_DEFAULT << 9)

Shifted mode DEFAULT for RAC_CTRL

Definition at line 760 of file efr32bg21_rac.h .

#define RAC_CTRL_LNAENPOL_X0 ( _RAC_CTRL_LNAENPOL_X0 << 9)

Shifted mode X0 for RAC_CTRL

Definition at line 761 of file efr32bg21_rac.h .

#define RAC_CTRL_LNAENPOL_X1 ( _RAC_CTRL_LNAENPOL_X1 << 9)

Shifted mode X1 for RAC_CTRL

Definition at line 762 of file efr32bg21_rac.h .

#define RAC_CTRL_PAENPOL (0x1UL << 8)

PAEN signal polarity

Definition at line 745 of file efr32bg21_rac.h .

#define RAC_CTRL_PAENPOL_DEFAULT ( _RAC_CTRL_PAENPOL_DEFAULT << 8)

Shifted mode DEFAULT for RAC_CTRL

Definition at line 751 of file efr32bg21_rac.h .

#define RAC_CTRL_PAENPOL_X0 ( _RAC_CTRL_PAENPOL_X0 << 8)

Shifted mode X0 for RAC_CTRL

Definition at line 752 of file efr32bg21_rac.h .

#define RAC_CTRL_PAENPOL_X1 ( _RAC_CTRL_PAENPOL_X1 << 8)

Shifted mode X1 for RAC_CTRL

Definition at line 753 of file efr32bg21_rac.h .

#define RAC_CTRL_PRSCLR (0x1UL << 5)

PRS RXEN Clear

Definition at line 718 of file efr32bg21_rac.h .

#define RAC_CTRL_PRSCLR_DEFAULT ( _RAC_CTRL_PRSCLR_DEFAULT << 5)

Shifted mode DEFAULT for RAC_CTRL

Definition at line 724 of file efr32bg21_rac.h .

#define RAC_CTRL_PRSCLR_PRSCH ( _RAC_CTRL_PRSCLR_PRSCH << 5)

Shifted mode PRSCH for RAC_CTRL

Definition at line 726 of file efr32bg21_rac.h .

#define RAC_CTRL_PRSCLR_RXSEARCH ( _RAC_CTRL_PRSCLR_RXSEARCH << 5)

Shifted mode RXSEARCH for RAC_CTRL

Definition at line 725 of file efr32bg21_rac.h .

#define RAC_CTRL_PRSFORCETX (0x1UL << 16)

PRS Force RX

Definition at line 772 of file efr32bg21_rac.h .

#define RAC_CTRL_PRSFORCETX_DEFAULT ( _RAC_CTRL_PRSFORCETX_DEFAULT << 16)

Shifted mode DEFAULT for RAC_CTRL

Definition at line 778 of file efr32bg21_rac.h .

#define RAC_CTRL_PRSFORCETX_X0 ( _RAC_CTRL_PRSFORCETX_X0 << 16)

Shifted mode X0 for RAC_CTRL

Definition at line 779 of file efr32bg21_rac.h .

#define RAC_CTRL_PRSFORCETX_X1 ( _RAC_CTRL_PRSFORCETX_X1 << 16)

Shifted mode X1 for RAC_CTRL

Definition at line 780 of file efr32bg21_rac.h .

#define RAC_CTRL_PRSMODE (0x1UL << 3)

PRS RXEN Mode

Definition at line 709 of file efr32bg21_rac.h .

#define RAC_CTRL_PRSMODE_DEFAULT ( _RAC_CTRL_PRSMODE_DEFAULT << 3)

Shifted mode DEFAULT for RAC_CTRL

Definition at line 715 of file efr32bg21_rac.h .

#define RAC_CTRL_PRSMODE_DIRECT ( _RAC_CTRL_PRSMODE_DIRECT << 3)

Shifted mode DIRECT for RAC_CTRL

Definition at line 716 of file efr32bg21_rac.h .

#define RAC_CTRL_PRSMODE_PULSE ( _RAC_CTRL_PRSMODE_PULSE << 3)

Shifted mode PULSE for RAC_CTRL

Definition at line 717 of file efr32bg21_rac.h .

#define RAC_CTRL_PRSRXDIS (0x1UL << 10)

PRS RX Disable

Definition at line 763 of file efr32bg21_rac.h .

#define RAC_CTRL_PRSRXDIS_DEFAULT ( _RAC_CTRL_PRSRXDIS_DEFAULT << 10)

Shifted mode DEFAULT for RAC_CTRL

Definition at line 769 of file efr32bg21_rac.h .

#define RAC_CTRL_PRSRXDIS_X0 ( _RAC_CTRL_PRSRXDIS_X0 << 10)

Shifted mode X0 for RAC_CTRL

Definition at line 770 of file efr32bg21_rac.h .

#define RAC_CTRL_PRSRXDIS_X1 ( _RAC_CTRL_PRSRXDIS_X1 << 10)

Shifted mode X1 for RAC_CTRL

Definition at line 771 of file efr32bg21_rac.h .

#define RAC_CTRL_PRSTXEN (0x1UL << 1)

PRS TX Enable

Definition at line 695 of file efr32bg21_rac.h .

#define RAC_CTRL_PRSTXEN_DEFAULT ( _RAC_CTRL_PRSTXEN_DEFAULT << 1)

Shifted mode DEFAULT for RAC_CTRL

Definition at line 699 of file efr32bg21_rac.h .

#define RAC_CTRL_TXAFTERRX (0x1UL << 2)

TX After RX

Definition at line 700 of file efr32bg21_rac.h .

#define RAC_CTRL_TXAFTERRX_DEFAULT ( _RAC_CTRL_TXAFTERRX_DEFAULT << 2)

Shifted mode DEFAULT for RAC_CTRL

Definition at line 706 of file efr32bg21_rac.h .

#define RAC_CTRL_TXAFTERRX_X0 ( _RAC_CTRL_TXAFTERRX_X0 << 2)

Shifted mode X0 for RAC_CTRL

Definition at line 707 of file efr32bg21_rac.h .

#define RAC_CTRL_TXAFTERRX_X1 ( _RAC_CTRL_TXAFTERRX_X1 << 2)

Shifted mode X1 for RAC_CTRL

Definition at line 708 of file efr32bg21_rac.h .

#define RAC_CTRL_TXPOSTPONE (0x1UL << 6)

TX Postpone

Definition at line 727 of file efr32bg21_rac.h .

#define RAC_CTRL_TXPOSTPONE_DEFAULT ( _RAC_CTRL_TXPOSTPONE_DEFAULT << 6)

Shifted mode DEFAULT for RAC_CTRL

Definition at line 733 of file efr32bg21_rac.h .

#define RAC_CTRL_TXPOSTPONE_X0 ( _RAC_CTRL_TXPOSTPONE_X0 << 6)

Shifted mode X0 for RAC_CTRL

Definition at line 734 of file efr32bg21_rac.h .

#define RAC_CTRL_TXPOSTPONE_X1 ( _RAC_CTRL_TXPOSTPONE_X1 << 6)

Shifted mode X1 for RAC_CTRL

Definition at line 735 of file efr32bg21_rac.h .

#define RAC_DIGCLKRETIMECTRL_DIGCLKRETIMEDISRETIME (0x1UL << 1)

DIGCLKRETIMEDISRETIME

Definition at line 4811 of file efr32bg21_rac.h .

#define RAC_DIGCLKRETIMECTRL_DIGCLKRETIMEDISRETIME_DEFAULT ( _RAC_DIGCLKRETIMECTRL_DIGCLKRETIMEDISRETIME_DEFAULT << 1)

Shifted mode DEFAULT for RAC_DIGCLKRETIMECTRL

Definition at line 4817 of file efr32bg21_rac.h .

#define RAC_DIGCLKRETIMECTRL_DIGCLKRETIMEDISRETIME_disable_retime ( _RAC_DIGCLKRETIMECTRL_DIGCLKRETIMEDISRETIME_disable_retime << 1)

Shifted mode disable_retime for RAC_DIGCLKRETIMECTRL

Definition at line 4819 of file efr32bg21_rac.h .

#define RAC_DIGCLKRETIMECTRL_DIGCLKRETIMEDISRETIME_enable_retime ( _RAC_DIGCLKRETIMECTRL_DIGCLKRETIMEDISRETIME_enable_retime << 1)

Shifted mode enable_retime for RAC_DIGCLKRETIMECTRL

Definition at line 4818 of file efr32bg21_rac.h .

#define RAC_DIGCLKRETIMECTRL_DIGCLKRETIMEENRETIME (0x1UL << 0)

DIGCLKRETIMEENRETIME

Definition at line 4802 of file efr32bg21_rac.h .

#define RAC_DIGCLKRETIMECTRL_DIGCLKRETIMEENRETIME_DEFAULT ( _RAC_DIGCLKRETIMECTRL_DIGCLKRETIMEENRETIME_DEFAULT << 0)

Shifted mode DEFAULT for RAC_DIGCLKRETIMECTRL

Definition at line 4808 of file efr32bg21_rac.h .

#define RAC_DIGCLKRETIMECTRL_DIGCLKRETIMEENRETIME_disable ( _RAC_DIGCLKRETIMECTRL_DIGCLKRETIMEENRETIME_disable << 0)

Shifted mode disable for RAC_DIGCLKRETIMECTRL

Definition at line 4809 of file efr32bg21_rac.h .

#define RAC_DIGCLKRETIMECTRL_DIGCLKRETIMEENRETIME_enable ( _RAC_DIGCLKRETIMECTRL_DIGCLKRETIMEENRETIME_enable << 0)

Shifted mode enable for RAC_DIGCLKRETIMECTRL

Definition at line 4810 of file efr32bg21_rac.h .

#define RAC_DIGCLKRETIMECTRL_DIGCLKRETIMELIMITH_DEFAULT ( _RAC_DIGCLKRETIMECTRL_DIGCLKRETIMELIMITH_DEFAULT << 4)

Shifted mode DEFAULT for RAC_DIGCLKRETIMECTRL

Definition at line 4832 of file efr32bg21_rac.h .

#define RAC_DIGCLKRETIMECTRL_DIGCLKRETIMELIMITL_DEFAULT ( _RAC_DIGCLKRETIMECTRL_DIGCLKRETIMELIMITL_DEFAULT << 8)

Shifted mode DEFAULT for RAC_DIGCLKRETIMECTRL

Definition at line 4836 of file efr32bg21_rac.h .

#define RAC_DIGCLKRETIMECTRL_DIGCLKRETIMERESETN (0x1UL << 2)

DIGCLKRETIMERESETN

Definition at line 4820 of file efr32bg21_rac.h .

#define RAC_DIGCLKRETIMECTRL_DIGCLKRETIMERESETN_DEFAULT ( _RAC_DIGCLKRETIMECTRL_DIGCLKRETIMERESETN_DEFAULT << 2)

Shifted mode DEFAULT for RAC_DIGCLKRETIMECTRL

Definition at line 4826 of file efr32bg21_rac.h .

#define RAC_DIGCLKRETIMECTRL_DIGCLKRETIMERESETN_operate ( _RAC_DIGCLKRETIMECTRL_DIGCLKRETIMERESETN_operate << 2)

Shifted mode operate for RAC_DIGCLKRETIMECTRL

Definition at line 4827 of file efr32bg21_rac.h .

#define RAC_DIGCLKRETIMECTRL_DIGCLKRETIMERESETN_reset ( _RAC_DIGCLKRETIMECTRL_DIGCLKRETIMERESETN_reset << 2)

Shifted mode reset for RAC_DIGCLKRETIMECTRL

Definition at line 4828 of file efr32bg21_rac.h .

#define RAC_DIGCLKRETIMESTATUS_DIGCLKRETIMECLKSEL (0x1UL << 0)

DIGCLKRETIMECLKSEL

Definition at line 4841 of file efr32bg21_rac.h .

#define RAC_DIGCLKRETIMESTATUS_DIGCLKRETIMECLKSEL_DEFAULT ( _RAC_DIGCLKRETIMESTATUS_DIGCLKRETIMECLKSEL_DEFAULT << 0)

Shifted mode DEFAULT for RAC_DIGCLKRETIMESTATUS

Definition at line 4847 of file efr32bg21_rac.h .

#define RAC_DIGCLKRETIMESTATUS_DIGCLKRETIMECLKSEL_use_raw_clk ( _RAC_DIGCLKRETIMESTATUS_DIGCLKRETIMECLKSEL_use_raw_clk << 0)

Shifted mode use_raw_clk for RAC_DIGCLKRETIMESTATUS

Definition at line 4848 of file efr32bg21_rac.h .

#define RAC_DIGCLKRETIMESTATUS_DIGCLKRETIMECLKSEL_use_retimed_clk ( _RAC_DIGCLKRETIMESTATUS_DIGCLKRETIMECLKSEL_use_retimed_clk << 0)

Shifted mode use_retimed_clk for RAC_DIGCLKRETIMESTATUS

Definition at line 4849 of file efr32bg21_rac.h .

#define RAC_DIGCLKRETIMESTATUS_DIGCLKRETIMERESETNLO (0x1UL << 1)

DIGCLKRETIMERESETNLO

Definition at line 4850 of file efr32bg21_rac.h .

#define RAC_DIGCLKRETIMESTATUS_DIGCLKRETIMERESETNLO_DEFAULT ( _RAC_DIGCLKRETIMESTATUS_DIGCLKRETIMERESETNLO_DEFAULT << 1)

Shifted mode DEFAULT for RAC_DIGCLKRETIMESTATUS

Definition at line 4856 of file efr32bg21_rac.h .

#define RAC_DIGCLKRETIMESTATUS_DIGCLKRETIMERESETNLO_hi ( _RAC_DIGCLKRETIMESTATUS_DIGCLKRETIMERESETNLO_hi << 1)

Shifted mode hi for RAC_DIGCLKRETIMESTATUS

Definition at line 4858 of file efr32bg21_rac.h .

#define RAC_DIGCLKRETIMESTATUS_DIGCLKRETIMERESETNLO_lo ( _RAC_DIGCLKRETIMESTATUS_DIGCLKRETIMERESETNLO_lo << 1)

Shifted mode lo for RAC_DIGCLKRETIMESTATUS

Definition at line 4857 of file efr32bg21_rac.h .

#define RAC_EN_EN (0x1UL << 0)

Enable peripheral clock to this module

Definition at line 489 of file efr32bg21_rac.h .

#define RAC_EN_EN_DEFAULT ( _RAC_EN_EN_DEFAULT << 0)

Shifted mode DEFAULT for RAC_EN

Definition at line 493 of file efr32bg21_rac.h .

#define RAC_FORCESTATE_FORCESTATE_DEFAULT ( _RAC_FORCESTATE_FORCESTATE_DEFAULT << 0)

Shifted mode DEFAULT for RAC_FORCESTATE

Definition at line 788 of file efr32bg21_rac.h .

#define RAC_IEN_BUSERROR (0x1UL << 2)

Bus Error Interrupt Enable

Definition at line 826 of file efr32bg21_rac.h .

#define RAC_IEN_BUSERROR_DEFAULT ( _RAC_IEN_BUSERROR_DEFAULT << 2)

Shifted mode DEFAULT for RAC_IEN

Definition at line 830 of file efr32bg21_rac.h .

#define RAC_IEN_SEQ_DEFAULT ( _RAC_IEN_SEQ_DEFAULT << 16)

Shifted mode DEFAULT for RAC_IEN

Definition at line 834 of file efr32bg21_rac.h .

#define RAC_IEN_STATECHANGE (0x1UL << 0)

Radio State Change Interrupt Enable

Definition at line 816 of file efr32bg21_rac.h .

#define RAC_IEN_STATECHANGE_DEFAULT ( _RAC_IEN_STATECHANGE_DEFAULT << 0)

Shifted mode DEFAULT for RAC_IEN

Definition at line 820 of file efr32bg21_rac.h .

#define RAC_IEN_STIMCMPEV (0x1UL << 1)

STIMER Compare Event Interrupt Enable

Definition at line 821 of file efr32bg21_rac.h .

#define RAC_IEN_STIMCMPEV_DEFAULT ( _RAC_IEN_STIMCMPEV_DEFAULT << 1)

Shifted mode DEFAULT for RAC_IEN

Definition at line 825 of file efr32bg21_rac.h .

#define RAC_IF_BUSERROR (0x1UL << 2)

Bus Error

Definition at line 803 of file efr32bg21_rac.h .

#define RAC_IF_BUSERROR_DEFAULT ( _RAC_IF_BUSERROR_DEFAULT << 2)

Shifted mode DEFAULT for RAC_IF

Definition at line 807 of file efr32bg21_rac.h .

#define RAC_IF_SEQ_DEFAULT ( _RAC_IF_SEQ_DEFAULT << 16)

Shifted mode DEFAULT for RAC_IF

Definition at line 811 of file efr32bg21_rac.h .

#define RAC_IF_STATECHANGE (0x1UL << 0)

Radio State Change

Definition at line 793 of file efr32bg21_rac.h .

#define RAC_IF_STATECHANGE_DEFAULT ( _RAC_IF_STATECHANGE_DEFAULT << 0)

Shifted mode DEFAULT for RAC_IF

Definition at line 797 of file efr32bg21_rac.h .

#define RAC_IF_STIMCMPEV (0x1UL << 1)

STIMER Compare Event

Definition at line 798 of file efr32bg21_rac.h .

#define RAC_IF_STIMCMPEV_DEFAULT ( _RAC_IF_STIMCMPEV_DEFAULT << 1)

Shifted mode DEFAULT for RAC_IF

Definition at line 802 of file efr32bg21_rac.h .

#define RAC_IFADCCAL_IFADCENRCCAL (0x1UL << 0)

IFADCENRCCAL

Definition at line 2359 of file efr32bg21_rac.h .

#define RAC_IFADCCAL_IFADCENRCCAL_DEFAULT ( _RAC_IFADCCAL_IFADCENRCCAL_DEFAULT << 0)

Shifted mode DEFAULT for RAC_IFADCCAL

Definition at line 2365 of file efr32bg21_rac.h .

#define RAC_IFADCCAL_IFADCENRCCAL_rccal_disable ( _RAC_IFADCCAL_IFADCENRCCAL_rccal_disable << 0)

Shifted mode rccal_disable for RAC_IFADCCAL

Definition at line 2366 of file efr32bg21_rac.h .

#define RAC_IFADCCAL_IFADCENRCCAL_rccal_enable ( _RAC_IFADCCAL_IFADCENRCCAL_rccal_enable << 0)

Shifted mode rccal_enable for RAC_IFADCCAL

Definition at line 2367 of file efr32bg21_rac.h .

#define RAC_IFADCCAL_IFADCTUNERC_DEFAULT ( _RAC_IFADCCAL_IFADCTUNERC_DEFAULT << 8)

Shifted mode DEFAULT for RAC_IFADCCAL

Definition at line 2380 of file efr32bg21_rac.h .

#define RAC_IFADCCAL_IFADCTUNERCCALMODE (0x1UL << 1)

IFADCTUNERCCALMODE

Definition at line 2368 of file efr32bg21_rac.h .

#define RAC_IFADCCAL_IFADCTUNERCCALMODE_ADCmode ( _RAC_IFADCCAL_IFADCTUNERCCALMODE_ADCmode << 1)

Shifted mode ADCmode for RAC_IFADCCAL

Definition at line 2376 of file efr32bg21_rac.h .

#define RAC_IFADCCAL_IFADCTUNERCCALMODE_DEFAULT ( _RAC_IFADCCAL_IFADCTUNERCCALMODE_DEFAULT << 1)

Shifted mode DEFAULT for RAC_IFADCCAL

Definition at line 2374 of file efr32bg21_rac.h .

#define RAC_IFADCCAL_IFADCTUNERCCALMODE_SYmode ( _RAC_IFADCCAL_IFADCTUNERCCALMODE_SYmode << 1)

Shifted mode SYmode for RAC_IFADCCAL

Definition at line 2375 of file efr32bg21_rac.h .

#define RAC_IFADCSTATUS_IFADCRCCALOUT (0x1UL << 0)

IFADCRCCALOUT

Definition at line 2385 of file efr32bg21_rac.h .

#define RAC_IFADCSTATUS_IFADCRCCALOUT_DEFAULT ( _RAC_IFADCSTATUS_IFADCRCCALOUT_DEFAULT << 0)

Shifted mode DEFAULT for RAC_IFADCSTATUS

Definition at line 2391 of file efr32bg21_rac.h .

#define RAC_IFADCSTATUS_IFADCRCCALOUT_hi ( _RAC_IFADCSTATUS_IFADCRCCALOUT_hi << 0)

Shifted mode hi for RAC_IFADCSTATUS

Definition at line 2393 of file efr32bg21_rac.h .

#define RAC_IFADCSTATUS_IFADCRCCALOUT_lo ( _RAC_IFADCSTATUS_IFADCRCCALOUT_lo << 0)

Shifted mode lo for RAC_IFADCSTATUS

Definition at line 2392 of file efr32bg21_rac.h .

#define RAC_IFADCTRIM_IFADCCLKSEL (0x1UL << 0)

IFADCCLKSEL

Definition at line 2167 of file efr32bg21_rac.h .

#define RAC_IFADCTRIM_IFADCCLKSEL_clk_2p4g ( _RAC_IFADCTRIM_IFADCCLKSEL_clk_2p4g << 0)

Shifted mode clk_2p4g for RAC_IFADCTRIM

Definition at line 2174 of file efr32bg21_rac.h .

#define RAC_IFADCTRIM_IFADCCLKSEL_clk_subg ( _RAC_IFADCTRIM_IFADCCLKSEL_clk_subg << 0)

Shifted mode clk_subg for RAC_IFADCTRIM

Definition at line 2175 of file efr32bg21_rac.h .

#define RAC_IFADCTRIM_IFADCCLKSEL_DEFAULT ( _RAC_IFADCTRIM_IFADCCLKSEL_DEFAULT << 0)

Shifted mode DEFAULT for RAC_IFADCTRIM

Definition at line 2173 of file efr32bg21_rac.h .

#define RAC_IFADCTRIM_IFADCENHALFMODE (0x1UL << 1)

IFADCENHALFMODE

Definition at line 2176 of file efr32bg21_rac.h .

#define RAC_IFADCTRIM_IFADCENHALFMODE_DEFAULT ( _RAC_IFADCTRIM_IFADCENHALFMODE_DEFAULT << 1)

Shifted mode DEFAULT for RAC_IFADCTRIM

Definition at line 2182 of file efr32bg21_rac.h .

#define RAC_IFADCTRIM_IFADCENHALFMODE_full_speed_mode ( _RAC_IFADCTRIM_IFADCENHALFMODE_full_speed_mode << 1)

Shifted mode full_speed_mode for RAC_IFADCTRIM

Definition at line 2183 of file efr32bg21_rac.h .

#define RAC_IFADCTRIM_IFADCENHALFMODE_half_speed_mode ( _RAC_IFADCTRIM_IFADCENHALFMODE_half_speed_mode << 1)

Shifted mode half_speed_mode for RAC_IFADCTRIM

Definition at line 2184 of file efr32bg21_rac.h .

#define RAC_IFADCTRIM_IFADCLDOSERIESAMPLVL_DEFAULT ( _RAC_IFADCTRIM_IFADCLDOSERIESAMPLVL_DEFAULT << 2)

Shifted mode DEFAULT for RAC_IFADCTRIM

Definition at line 2196 of file efr32bg21_rac.h .

#define RAC_IFADCTRIM_IFADCLDOSERIESAMPLVL_v1p20 ( _RAC_IFADCTRIM_IFADCLDOSERIESAMPLVL_v1p20 << 2)

Shifted mode v1p20 for RAC_IFADCTRIM

Definition at line 2197 of file efr32bg21_rac.h .

#define RAC_IFADCTRIM_IFADCLDOSERIESAMPLVL_v1p24 ( _RAC_IFADCTRIM_IFADCLDOSERIESAMPLVL_v1p24 << 2)

Shifted mode v1p24 for RAC_IFADCTRIM

Definition at line 2198 of file efr32bg21_rac.h .

#define RAC_IFADCTRIM_IFADCLDOSERIESAMPLVL_v1p28 ( _RAC_IFADCTRIM_IFADCLDOSERIESAMPLVL_v1p28 << 2)

Shifted mode v1p28 for RAC_IFADCTRIM

Definition at line 2199 of file efr32bg21_rac.h .

#define RAC_IFADCTRIM_IFADCLDOSERIESAMPLVL_v1p32 ( _RAC_IFADCTRIM_IFADCLDOSERIESAMPLVL_v1p32 << 2)

Shifted mode v1p32 for RAC_IFADCTRIM

Definition at line 2200 of file efr32bg21_rac.h .

#define RAC_IFADCTRIM_IFADCLDOSERIESAMPLVL_v1p35 ( _RAC_IFADCTRIM_IFADCLDOSERIESAMPLVL_v1p35 << 2)

Shifted mode v1p35 for RAC_IFADCTRIM

Definition at line 2201 of file efr32bg21_rac.h .

#define RAC_IFADCTRIM_IFADCLDOSERIESAMPLVL_v1p39 ( _RAC_IFADCTRIM_IFADCLDOSERIESAMPLVL_v1p39 << 2)

Shifted mode v1p39 for RAC_IFADCTRIM

Definition at line 2202 of file efr32bg21_rac.h .

#define RAC_IFADCTRIM_IFADCLDOSERIESAMPLVL_v1p42 ( _RAC_IFADCTRIM_IFADCLDOSERIESAMPLVL_v1p42 << 2)

Shifted mode v1p42 for RAC_IFADCTRIM

Definition at line 2203 of file efr32bg21_rac.h .

#define RAC_IFADCTRIM_IFADCLDOSERIESAMPLVL_v1p46 ( _RAC_IFADCTRIM_IFADCLDOSERIESAMPLVL_v1p46 << 2)

Shifted mode v1p46 for RAC_IFADCTRIM

Definition at line 2204 of file efr32bg21_rac.h .

#define RAC_IFADCTRIM_IFADCLDOSHUNTAMPLVL_DEFAULT ( _RAC_IFADCTRIM_IFADCLDOSHUNTAMPLVL_DEFAULT << 5)

Shifted mode DEFAULT for RAC_IFADCTRIM

Definition at line 2216 of file efr32bg21_rac.h .

#define RAC_IFADCTRIM_IFADCLDOSHUNTAMPLVL_v1p20 ( _RAC_IFADCTRIM_IFADCLDOSHUNTAMPLVL_v1p20 << 5)

Shifted mode v1p20 for RAC_IFADCTRIM

Definition at line 2217 of file efr32bg21_rac.h .

#define RAC_IFADCTRIM_IFADCLDOSHUNTAMPLVL_v1p24 ( _RAC_IFADCTRIM_IFADCLDOSHUNTAMPLVL_v1p24 << 5)

Shifted mode v1p24 for RAC_IFADCTRIM

Definition at line 2218 of file efr32bg21_rac.h .

#define RAC_IFADCTRIM_IFADCLDOSHUNTAMPLVL_v1p28 ( _RAC_IFADCTRIM_IFADCLDOSHUNTAMPLVL_v1p28 << 5)

Shifted mode v1p28 for RAC_IFADCTRIM

Definition at line 2219 of file efr32bg21_rac.h .

#define RAC_IFADCTRIM_IFADCLDOSHUNTAMPLVL_v1p32 ( _RAC_IFADCTRIM_IFADCLDOSHUNTAMPLVL_v1p32 << 5)

Shifted mode v1p32 for RAC_IFADCTRIM

Definition at line 2220 of file efr32bg21_rac.h .

#define RAC_IFADCTRIM_IFADCLDOSHUNTAMPLVL_v1p35 ( _RAC_IFADCTRIM_IFADCLDOSHUNTAMPLVL_v1p35 << 5)

Shifted mode v1p35 for RAC_IFADCTRIM

Definition at line 2221 of file efr32bg21_rac.h .

#define RAC_IFADCTRIM_IFADCLDOSHUNTAMPLVL_v1p39 ( _RAC_IFADCTRIM_IFADCLDOSHUNTAMPLVL_v1p39 << 5)

Shifted mode v1p39 for RAC_IFADCTRIM

Definition at line 2222 of file efr32bg21_rac.h .

#define RAC_IFADCTRIM_IFADCLDOSHUNTAMPLVL_v1p42 ( _RAC_IFADCTRIM_IFADCLDOSHUNTAMPLVL_v1p42 << 5)

Shifted mode v1p42 for RAC_IFADCTRIM

Definition at line 2223 of file efr32bg21_rac.h .

#define RAC_IFADCTRIM_IFADCLDOSHUNTAMPLVL_v1p46 ( _RAC_IFADCTRIM_IFADCLDOSHUNTAMPLVL_v1p46 << 5)

Shifted mode v1p46 for RAC_IFADCTRIM

Definition at line 2224 of file efr32bg21_rac.h .

#define RAC_IFADCTRIM_IFADCLDOSHUNTCURLP (0x1UL << 8)

IFADCLDOSHUNTCURLP

Definition at line 2225 of file efr32bg21_rac.h .

#define RAC_IFADCTRIM_IFADCLDOSHUNTCURLP_DEFAULT ( _RAC_IFADCTRIM_IFADCLDOSHUNTCURLP_DEFAULT << 8)

Shifted mode DEFAULT for RAC_IFADCTRIM

Definition at line 2231 of file efr32bg21_rac.h .

#define RAC_IFADCTRIM_IFADCLDOSHUNTCURLP_low_power_disabled ( _RAC_IFADCTRIM_IFADCLDOSHUNTCURLP_low_power_disabled << 8)

Shifted mode low_power_disabled for RAC_IFADCTRIM

Definition at line 2232 of file efr32bg21_rac.h .

#define RAC_IFADCTRIM_IFADCLDOSHUNTCURLP_low_power_enabled ( _RAC_IFADCTRIM_IFADCLDOSHUNTCURLP_low_power_enabled << 8)

Shifted mode low_power_enabled for RAC_IFADCTRIM

Definition at line 2233 of file efr32bg21_rac.h .

#define RAC_IFADCTRIM_IFADCLDOSHUNTCURLVL_current_180uA ( _RAC_IFADCTRIM_IFADCLDOSHUNTCURLVL_current_180uA << 9)

Shifted mode current_180uA for RAC_IFADCTRIM

Definition at line 2242 of file efr32bg21_rac.h .

#define RAC_IFADCTRIM_IFADCLDOSHUNTCURLVL_current_190uA ( _RAC_IFADCTRIM_IFADCLDOSHUNTCURLVL_current_190uA << 9)

Shifted mode current_190uA for RAC_IFADCTRIM

Definition at line 2243 of file efr32bg21_rac.h .

#define RAC_IFADCTRIM_IFADCLDOSHUNTCURLVL_current_200uA ( _RAC_IFADCTRIM_IFADCLDOSHUNTCURLVL_current_200uA << 9)

Shifted mode current_200uA for RAC_IFADCTRIM

Definition at line 2244 of file efr32bg21_rac.h .

#define RAC_IFADCTRIM_IFADCLDOSHUNTCURLVL_current_210uA ( _RAC_IFADCTRIM_IFADCLDOSHUNTCURLVL_current_210uA << 9)

Shifted mode current_210uA for RAC_IFADCTRIM

Definition at line 2245 of file efr32bg21_rac.h .

#define RAC_IFADCTRIM_IFADCLDOSHUNTCURLVL_DEFAULT ( _RAC_IFADCTRIM_IFADCLDOSHUNTCURLVL_DEFAULT << 9)

Shifted mode DEFAULT for RAC_IFADCTRIM

Definition at line 2241 of file efr32bg21_rac.h .

#define RAC_IFADCTRIM_IFADCOTAST1CURRENT_DEFAULT ( _RAC_IFADCTRIM_IFADCOTAST1CURRENT_DEFAULT << 11)

Shifted mode DEFAULT for RAC_IFADCTRIM

Definition at line 2253 of file efr32bg21_rac.h .

#define RAC_IFADCTRIM_IFADCOTAST1CURRENT_negative_11p ( _RAC_IFADCTRIM_IFADCOTAST1CURRENT_negative_11p << 11)

Shifted mode negative_11p for RAC_IFADCTRIM

Definition at line 2255 of file efr32bg21_rac.h .

#define RAC_IFADCTRIM_IFADCOTAST1CURRENT_negative_20p ( _RAC_IFADCTRIM_IFADCOTAST1CURRENT_negative_20p << 11)

Shifted mode negative_20p for RAC_IFADCTRIM

Definition at line 2254 of file efr32bg21_rac.h .

#define RAC_IFADCTRIM_IFADCOTAST1CURRENT_nominal ( _RAC_IFADCTRIM_IFADCOTAST1CURRENT_nominal << 11)

Shifted mode nominal for RAC_IFADCTRIM

Definition at line 2256 of file efr32bg21_rac.h .

#define RAC_IFADCTRIM_IFADCOTAST1CURRENT_positive_15p ( _RAC_IFADCTRIM_IFADCOTAST1CURRENT_positive_15p << 11)

Shifted mode positive_15p for RAC_IFADCTRIM

Definition at line 2257 of file efr32bg21_rac.h .

#define RAC_IFADCTRIM_IFADCOTAST2CURRENT_DEFAULT ( _RAC_IFADCTRIM_IFADCOTAST2CURRENT_DEFAULT << 13)

Shifted mode DEFAULT for RAC_IFADCTRIM

Definition at line 2265 of file efr32bg21_rac.h .

#define RAC_IFADCTRIM_IFADCOTAST2CURRENT_negative_11p ( _RAC_IFADCTRIM_IFADCOTAST2CURRENT_negative_11p << 13)

Shifted mode negative_11p for RAC_IFADCTRIM

Definition at line 2267 of file efr32bg21_rac.h .

#define RAC_IFADCTRIM_IFADCOTAST2CURRENT_negative_20p ( _RAC_IFADCTRIM_IFADCOTAST2CURRENT_negative_20p << 13)

Shifted mode negative_20p for RAC_IFADCTRIM

Definition at line 2266 of file efr32bg21_rac.h .

#define RAC_IFADCTRIM_IFADCOTAST2CURRENT_nominal ( _RAC_IFADCTRIM_IFADCOTAST2CURRENT_nominal << 13)

Shifted mode nominal for RAC_IFADCTRIM

Definition at line 2268 of file efr32bg21_rac.h .

#define RAC_IFADCTRIM_IFADCOTAST2CURRENT_positive_15p ( _RAC_IFADCTRIM_IFADCOTAST2CURRENT_positive_15p << 13)

Shifted mode positive_15p for RAC_IFADCTRIM

Definition at line 2269 of file efr32bg21_rac.h .

#define RAC_IFADCTRIM_IFADCREFBUFAMPLVL_DEFAULT ( _RAC_IFADCTRIM_IFADCREFBUFAMPLVL_DEFAULT << 15)

Shifted mode DEFAULT for RAC_IFADCTRIM

Definition at line 2281 of file efr32bg21_rac.h .

#define RAC_IFADCTRIM_IFADCREFBUFAMPLVL_v0p88 ( _RAC_IFADCTRIM_IFADCREFBUFAMPLVL_v0p88 << 15)

Shifted mode v0p88 for RAC_IFADCTRIM

Definition at line 2282 of file efr32bg21_rac.h .

#define RAC_IFADCTRIM_IFADCREFBUFAMPLVL_v0p91 ( _RAC_IFADCTRIM_IFADCREFBUFAMPLVL_v0p91 << 15)

Shifted mode v0p91 for RAC_IFADCTRIM

Definition at line 2283 of file efr32bg21_rac.h .

#define RAC_IFADCTRIM_IFADCREFBUFAMPLVL_v0p94 ( _RAC_IFADCTRIM_IFADCREFBUFAMPLVL_v0p94 << 15)

Shifted mode v0p94 for RAC_IFADCTRIM

Definition at line 2284 of file efr32bg21_rac.h .

#define RAC_IFADCTRIM_IFADCREFBUFAMPLVL_v0p97 ( _RAC_IFADCTRIM_IFADCREFBUFAMPLVL_v0p97 << 15)

Shifted mode v0p97 for RAC_IFADCTRIM

Definition at line 2285 of file efr32bg21_rac.h .

#define RAC_IFADCTRIM_IFADCREFBUFAMPLVL_v1p00 ( _RAC_IFADCTRIM_IFADCREFBUFAMPLVL_v1p00 << 15)

Shifted mode v1p00 for RAC_IFADCTRIM

Definition at line 2286 of file efr32bg21_rac.h .

#define RAC_IFADCTRIM_IFADCREFBUFAMPLVL_v1p03 ( _RAC_IFADCTRIM_IFADCREFBUFAMPLVL_v1p03 << 15)

Shifted mode v1p03 for RAC_IFADCTRIM

Definition at line 2287 of file efr32bg21_rac.h .

#define RAC_IFADCTRIM_IFADCREFBUFAMPLVL_v1p06 ( _RAC_IFADCTRIM_IFADCREFBUFAMPLVL_v1p06 << 15)

Shifted mode v1p06 for RAC_IFADCTRIM

Definition at line 2288 of file efr32bg21_rac.h .

#define RAC_IFADCTRIM_IFADCREFBUFAMPLVL_v1p09 ( _RAC_IFADCTRIM_IFADCREFBUFAMPLVL_v1p09 << 15)

Shifted mode v1p09 for RAC_IFADCTRIM

Definition at line 2289 of file efr32bg21_rac.h .

#define RAC_IFADCTRIM_IFADCREFBUFCURLVL_current_65uA ( _RAC_IFADCTRIM_IFADCREFBUFCURLVL_current_65uA << 18)

Shifted mode current_65uA for RAC_IFADCTRIM

Definition at line 2298 of file efr32bg21_rac.h .

#define RAC_IFADCTRIM_IFADCREFBUFCURLVL_current_75uA ( _RAC_IFADCTRIM_IFADCREFBUFCURLVL_current_75uA << 18)

Shifted mode current_75uA for RAC_IFADCTRIM

Definition at line 2299 of file efr32bg21_rac.h .

#define RAC_IFADCTRIM_IFADCREFBUFCURLVL_current_85uA ( _RAC_IFADCTRIM_IFADCREFBUFCURLVL_current_85uA << 18)

Shifted mode current_85uA for RAC_IFADCTRIM

Definition at line 2300 of file efr32bg21_rac.h .

#define RAC_IFADCTRIM_IFADCREFBUFCURLVL_current_95uA ( _RAC_IFADCTRIM_IFADCREFBUFCURLVL_current_95uA << 18)

Shifted mode current_95uA for RAC_IFADCTRIM

Definition at line 2301 of file efr32bg21_rac.h .

#define RAC_IFADCTRIM_IFADCREFBUFCURLVL_DEFAULT ( _RAC_IFADCTRIM_IFADCREFBUFCURLVL_DEFAULT << 18)

Shifted mode DEFAULT for RAC_IFADCTRIM

Definition at line 2297 of file efr32bg21_rac.h .

#define RAC_IFADCTRIM_IFADCSIDETONEAMP_DEFAULT ( _RAC_IFADCTRIM_IFADCSIDETONEAMP_DEFAULT << 20)

Shifted mode DEFAULT for RAC_IFADCTRIM

Definition at line 2309 of file efr32bg21_rac.h .

#define RAC_IFADCTRIM_IFADCSIDETONEAMP_diff_pk_100mV ( _RAC_IFADCTRIM_IFADCSIDETONEAMP_diff_pk_100mV << 20)

Shifted mode diff_pk_100mV for RAC_IFADCTRIM

Definition at line 2313 of file efr32bg21_rac.h .

#define RAC_IFADCTRIM_IFADCSIDETONEAMP_diff_pk_10mV ( _RAC_IFADCTRIM_IFADCSIDETONEAMP_diff_pk_10mV << 20)

Shifted mode diff_pk_10mV for RAC_IFADCTRIM

Definition at line 2310 of file efr32bg21_rac.h .

#define RAC_IFADCTRIM_IFADCSIDETONEAMP_diff_pk_20mV ( _RAC_IFADCTRIM_IFADCSIDETONEAMP_diff_pk_20mV << 20)

Shifted mode diff_pk_20mV for RAC_IFADCTRIM

Definition at line 2311 of file efr32bg21_rac.h .

#define RAC_IFADCTRIM_IFADCSIDETONEAMP_diff_pk_50mV ( _RAC_IFADCTRIM_IFADCSIDETONEAMP_diff_pk_50mV << 20)

Shifted mode diff_pk_50mV for RAC_IFADCTRIM

Definition at line 2312 of file efr32bg21_rac.h .

#define RAC_IFADCTRIM_IFADCSIDETONEFREQ_DEFAULT ( _RAC_IFADCTRIM_IFADCSIDETONEFREQ_DEFAULT << 22)

Shifted mode DEFAULT for RAC_IFADCTRIM

Definition at line 2325 of file efr32bg21_rac.h .

#define RAC_IFADCTRIM_IFADCSIDETONEFREQ_div_128 ( _RAC_IFADCTRIM_IFADCSIDETONEFREQ_div_128 << 22)

Shifted mode div_128 for RAC_IFADCTRIM

Definition at line 2327 of file efr32bg21_rac.h .

#define RAC_IFADCTRIM_IFADCSIDETONEFREQ_div_16 ( _RAC_IFADCTRIM_IFADCSIDETONEFREQ_div_16 << 22)

Shifted mode div_16 for RAC_IFADCTRIM

Definition at line 2330 of file efr32bg21_rac.h .

#define RAC_IFADCTRIM_IFADCSIDETONEFREQ_div_32 ( _RAC_IFADCTRIM_IFADCSIDETONEFREQ_div_32 << 22)

Shifted mode div_32 for RAC_IFADCTRIM

Definition at line 2329 of file efr32bg21_rac.h .

#define RAC_IFADCTRIM_IFADCSIDETONEFREQ_div_4 ( _RAC_IFADCTRIM_IFADCSIDETONEFREQ_div_4 << 22)

Shifted mode div_4 for RAC_IFADCTRIM

Definition at line 2332 of file efr32bg21_rac.h .

#define RAC_IFADCTRIM_IFADCSIDETONEFREQ_div_64 ( _RAC_IFADCTRIM_IFADCSIDETONEFREQ_div_64 << 22)

Shifted mode div_64 for RAC_IFADCTRIM

Definition at line 2328 of file efr32bg21_rac.h .

#define RAC_IFADCTRIM_IFADCSIDETONEFREQ_div_8 ( _RAC_IFADCTRIM_IFADCSIDETONEFREQ_div_8 << 22)

Shifted mode div_8 for RAC_IFADCTRIM

Definition at line 2331 of file efr32bg21_rac.h .

#define RAC_IFADCTRIM_IFADCSIDETONEFREQ_na0 ( _RAC_IFADCTRIM_IFADCSIDETONEFREQ_na0 << 22)

Shifted mode na0 for RAC_IFADCTRIM

Definition at line 2326 of file efr32bg21_rac.h .

#define RAC_IFADCTRIM_IFADCSIDETONEFREQ_na7 ( _RAC_IFADCTRIM_IFADCSIDETONEFREQ_na7 << 22)

Shifted mode na7 for RAC_IFADCTRIM

Definition at line 2333 of file efr32bg21_rac.h .

#define RAC_IFADCTRIM_IFADCTUNEZERO (0x1UL << 25)

IFADCTUNEZERO

Definition at line 2334 of file efr32bg21_rac.h .

#define RAC_IFADCTRIM_IFADCTUNEZERO_DEFAULT ( _RAC_IFADCTRIM_IFADCTUNEZERO_DEFAULT << 25)

Shifted mode DEFAULT for RAC_IFADCTRIM

Definition at line 2340 of file efr32bg21_rac.h .

#define RAC_IFADCTRIM_IFADCTUNEZERO_half_freq_zero ( _RAC_IFADCTRIM_IFADCTUNEZERO_half_freq_zero << 25)

Shifted mode half_freq_zero for RAC_IFADCTRIM

Definition at line 2342 of file efr32bg21_rac.h .

#define RAC_IFADCTRIM_IFADCTUNEZERO_nominal_zero ( _RAC_IFADCTRIM_IFADCTUNEZERO_nominal_zero << 25)

Shifted mode nominal_zero for RAC_IFADCTRIM

Definition at line 2341 of file efr32bg21_rac.h .

#define RAC_IFADCTRIM_IFADCVCMLVL_DEFAULT ( _RAC_IFADCTRIM_IFADCVCMLVL_DEFAULT << 26)

Shifted mode DEFAULT for RAC_IFADCTRIM

Definition at line 2350 of file efr32bg21_rac.h .

#define RAC_IFADCTRIM_IFADCVCMLVL_ratio_0p48 ( _RAC_IFADCTRIM_IFADCVCMLVL_ratio_0p48 << 26)

Shifted mode ratio_0p48 for RAC_IFADCTRIM

Definition at line 2351 of file efr32bg21_rac.h .

#define RAC_IFADCTRIM_IFADCVCMLVL_ratio_0p49 ( _RAC_IFADCTRIM_IFADCVCMLVL_ratio_0p49 << 26)

Shifted mode ratio_0p49 for RAC_IFADCTRIM

Definition at line 2352 of file efr32bg21_rac.h .

#define RAC_IFADCTRIM_IFADCVCMLVL_ratio_0p5 ( _RAC_IFADCTRIM_IFADCVCMLVL_ratio_0p5 << 26)

Shifted mode ratio_0p5 for RAC_IFADCTRIM

Definition at line 2353 of file efr32bg21_rac.h .

#define RAC_IFADCTRIM_IFADCVCMLVL_ratio_0p52 ( _RAC_IFADCTRIM_IFADCVCMLVL_ratio_0p52 << 26)

Shifted mode ratio_0p52 for RAC_IFADCTRIM

Definition at line 2354 of file efr32bg21_rac.h .

#define RAC_IFPGACTRL_DCCALDCGEAR_DEFAULT ( _RAC_IFPGACTRL_DCCALDCGEAR_DEFAULT << 25)

Shifted mode DEFAULT for RAC_IFPGACTRL

Definition at line 1467 of file efr32bg21_rac.h .

#define RAC_IFPGACTRL_DCCALDEC0_DEFAULT ( _RAC_IFPGACTRL_DCCALDEC0_DEFAULT << 22)

Shifted mode DEFAULT for RAC_IFPGACTRL

Definition at line 1458 of file efr32bg21_rac.h .

#define RAC_IFPGACTRL_DCCALDEC0_DF3 ( _RAC_IFPGACTRL_DCCALDEC0_DF3 << 22)

Shifted mode DF3 for RAC_IFPGACTRL

Definition at line 1459 of file efr32bg21_rac.h .

#define RAC_IFPGACTRL_DCCALDEC0_DF4NARROW ( _RAC_IFPGACTRL_DCCALDEC0_DF4NARROW << 22)

Shifted mode DF4NARROW for RAC_IFPGACTRL

Definition at line 1461 of file efr32bg21_rac.h .

#define RAC_IFPGACTRL_DCCALDEC0_DF4WIDE ( _RAC_IFPGACTRL_DCCALDEC0_DF4WIDE << 22)

Shifted mode DF4WIDE for RAC_IFPGACTRL

Definition at line 1460 of file efr32bg21_rac.h .

#define RAC_IFPGACTRL_DCCALDEC0_DF8NARROW ( _RAC_IFPGACTRL_DCCALDEC0_DF8NARROW << 22)

Shifted mode DF8NARROW for RAC_IFPGACTRL

Definition at line 1463 of file efr32bg21_rac.h .

#define RAC_IFPGACTRL_DCCALDEC0_DF8WIDE ( _RAC_IFPGACTRL_DCCALDEC0_DF8WIDE << 22)

Shifted mode DF8WIDE for RAC_IFPGACTRL

Definition at line 1462 of file efr32bg21_rac.h .

#define RAC_IFPGACTRL_DCCALON (0x1UL << 19)

Enable/Disable DCCAL in DEMOD

Definition at line 1423 of file efr32bg21_rac.h .

#define RAC_IFPGACTRL_DCCALON_DEFAULT ( _RAC_IFPGACTRL_DCCALON_DEFAULT << 19)

Shifted mode DEFAULT for RAC_IFPGACTRL

Definition at line 1429 of file efr32bg21_rac.h .

#define RAC_IFPGACTRL_DCCALON_DISABLE ( _RAC_IFPGACTRL_DCCALON_DISABLE << 19)

Shifted mode DISABLE for RAC_IFPGACTRL

Definition at line 1430 of file efr32bg21_rac.h .

#define RAC_IFPGACTRL_DCCALON_ENABLE ( _RAC_IFPGACTRL_DCCALON_ENABLE << 19)

Shifted mode ENABLE for RAC_IFPGACTRL

Definition at line 1431 of file efr32bg21_rac.h .

#define RAC_IFPGACTRL_DCESTIEN (0x1UL << 21)

DCESTIEN Override for RAC

Definition at line 1441 of file efr32bg21_rac.h .

#define RAC_IFPGACTRL_DCESTIEN_DEFAULT ( _RAC_IFPGACTRL_DCESTIEN_DEFAULT << 21)

Shifted mode DEFAULT for RAC_IFPGACTRL

Definition at line 1447 of file efr32bg21_rac.h .

#define RAC_IFPGACTRL_DCESTIEN_DISABLE ( _RAC_IFPGACTRL_DCESTIEN_DISABLE << 21)

Shifted mode DISABLE for RAC_IFPGACTRL

Definition at line 1448 of file efr32bg21_rac.h .

#define RAC_IFPGACTRL_DCESTIEN_ENABLE ( _RAC_IFPGACTRL_DCESTIEN_ENABLE << 21)

Shifted mode ENABLE for RAC_IFPGACTRL

Definition at line 1449 of file efr32bg21_rac.h .

#define RAC_IFPGACTRL_DCRSTEN (0x1UL << 20)

DC Compensation Filter Reset Enable

Definition at line 1432 of file efr32bg21_rac.h .

#define RAC_IFPGACTRL_DCRSTEN_DEFAULT ( _RAC_IFPGACTRL_DCRSTEN_DEFAULT << 20)

Shifted mode DEFAULT for RAC_IFPGACTRL

Definition at line 1438 of file efr32bg21_rac.h .

#define RAC_IFPGACTRL_DCRSTEN_DISABLE ( _RAC_IFPGACTRL_DCRSTEN_DISABLE << 20)

Shifted mode DISABLE for RAC_IFPGACTRL

Definition at line 1439 of file efr32bg21_rac.h .

#define RAC_IFPGACTRL_DCRSTEN_ENABLE ( _RAC_IFPGACTRL_DCRSTEN_ENABLE << 20)

Shifted mode ENABLE for RAC_IFPGACTRL

Definition at line 1440 of file efr32bg21_rac.h .

#define RAC_IPVERSION_IPVERSION_DEFAULT ( _RAC_IPVERSION_IPVERSION_DEFAULT << 0)

Shifted mode DEFAULT for RAC_IPVERSION

Definition at line 484 of file efr32bg21_rac.h .

#define RAC_LNAMIXCAL_LNAMIXCALEN (0x1UL << 0)

LNAMIXCALEN

Definition at line 2550 of file efr32bg21_rac.h .

#define RAC_LNAMIXCAL_LNAMIXCALEN_cal_disable ( _RAC_LNAMIXCAL_LNAMIXCALEN_cal_disable << 0)

Shifted mode cal_disable for RAC_LNAMIXCAL

Definition at line 2557 of file efr32bg21_rac.h .

#define RAC_LNAMIXCAL_LNAMIXCALEN_cal_enable ( _RAC_LNAMIXCAL_LNAMIXCALEN_cal_enable << 0)

Shifted mode cal_enable for RAC_LNAMIXCAL

Definition at line 2558 of file efr32bg21_rac.h .

#define RAC_LNAMIXCAL_LNAMIXCALEN_DEFAULT ( _RAC_LNAMIXCAL_LNAMIXCALEN_DEFAULT << 0)

Shifted mode DEFAULT for RAC_LNAMIXCAL

Definition at line 2556 of file efr32bg21_rac.h .

#define RAC_LNAMIXCAL_LNAMIXCALVMODE (0x1UL << 1)

LNAMIXCALVMODE

Definition at line 2559 of file efr32bg21_rac.h .

#define RAC_LNAMIXCAL_LNAMIXCALVMODE_current_mode ( _RAC_LNAMIXCAL_LNAMIXCALVMODE_current_mode << 1)

Shifted mode current_mode for RAC_LNAMIXCAL

Definition at line 2566 of file efr32bg21_rac.h .

#define RAC_LNAMIXCAL_LNAMIXCALVMODE_DEFAULT ( _RAC_LNAMIXCAL_LNAMIXCALVMODE_DEFAULT << 1)

Shifted mode DEFAULT for RAC_LNAMIXCAL

Definition at line 2565 of file efr32bg21_rac.h .

#define RAC_LNAMIXCAL_LNAMIXCALVMODE_voltage_mode ( _RAC_LNAMIXCAL_LNAMIXCALVMODE_voltage_mode << 1)

Shifted mode voltage_mode for RAC_LNAMIXCAL

Definition at line 2567 of file efr32bg21_rac.h .

#define RAC_LNAMIXCAL_LNAMIXENIRCAL1 (0x1UL << 2)

LNAMIXENIRCAL1

Definition at line 2568 of file efr32bg21_rac.h .

#define RAC_LNAMIXCAL_LNAMIXENIRCAL1_DEFAULT ( _RAC_LNAMIXCAL_LNAMIXENIRCAL1_DEFAULT << 2)

Shifted mode DEFAULT for RAC_LNAMIXCAL

Definition at line 2574 of file efr32bg21_rac.h .

#define RAC_LNAMIXCAL_LNAMIXENIRCAL1_disable ( _RAC_LNAMIXCAL_LNAMIXENIRCAL1_disable << 2)

Shifted mode disable for RAC_LNAMIXCAL

Definition at line 2575 of file efr32bg21_rac.h .

#define RAC_LNAMIXCAL_LNAMIXENIRCAL1_enable ( _RAC_LNAMIXCAL_LNAMIXENIRCAL1_enable << 2)

Shifted mode enable for RAC_LNAMIXCAL

Definition at line 2576 of file efr32bg21_rac.h .

#define RAC_LNAMIXCAL_LNAMIXENIRCAL2 (0x1UL << 3)

LNAMIXENIRCAL2

Definition at line 2577 of file efr32bg21_rac.h .

#define RAC_LNAMIXCAL_LNAMIXENIRCAL2_DEFAULT ( _RAC_LNAMIXCAL_LNAMIXENIRCAL2_DEFAULT << 3)

Shifted mode DEFAULT for RAC_LNAMIXCAL

Definition at line 2583 of file efr32bg21_rac.h .

#define RAC_LNAMIXCAL_LNAMIXENIRCAL2_disable ( _RAC_LNAMIXCAL_LNAMIXENIRCAL2_disable << 3)

Shifted mode disable for RAC_LNAMIXCAL

Definition at line 2584 of file efr32bg21_rac.h .

#define RAC_LNAMIXCAL_LNAMIXENIRCAL2_enable ( _RAC_LNAMIXCAL_LNAMIXENIRCAL2_enable << 3)

Shifted mode enable for RAC_LNAMIXCAL

Definition at line 2585 of file efr32bg21_rac.h .

#define RAC_LNAMIXCAL_LNAMIXIRCAL1AMP_DEFAULT ( _RAC_LNAMIXCAL_LNAMIXIRCAL1AMP_DEFAULT << 4)

Shifted mode DEFAULT for RAC_LNAMIXCAL

Definition at line 2589 of file efr32bg21_rac.h .

#define RAC_LNAMIXCAL_LNAMIXIRCAL2AMP_DEFAULT ( _RAC_LNAMIXCAL_LNAMIXIRCAL2AMP_DEFAULT << 7)

Shifted mode DEFAULT for RAC_LNAMIXCAL

Definition at line 2593 of file efr32bg21_rac.h .

#define RAC_LNAMIXEN_LNAMIXENLDO (0x1UL << 0)

LNAMIXENLDO

Definition at line 2598 of file efr32bg21_rac.h .

#define RAC_LNAMIXEN_LNAMIXENLDO_DEFAULT ( _RAC_LNAMIXEN_LNAMIXENLDO_DEFAULT << 0)

Shifted mode DEFAULT for RAC_LNAMIXEN

Definition at line 2604 of file efr32bg21_rac.h .

#define RAC_LNAMIXEN_LNAMIXENLDO_disable ( _RAC_LNAMIXEN_LNAMIXENLDO_disable << 0)

Shifted mode disable for RAC_LNAMIXEN

Definition at line 2605 of file efr32bg21_rac.h .

#define RAC_LNAMIXEN_LNAMIXENLDO_enable ( _RAC_LNAMIXEN_LNAMIXENLDO_enable << 0)

Shifted mode enable for RAC_LNAMIXEN

Definition at line 2606 of file efr32bg21_rac.h .

#define RAC_LNAMIXTRIM0_LNAMIXCURCTRL_DEFAULT ( _RAC_LNAMIXTRIM0_LNAMIXCURCTRL_DEFAULT << 0)

Shifted mode DEFAULT for RAC_LNAMIXTRIM0

Definition at line 2401 of file efr32bg21_rac.h .

#define RAC_LNAMIXTRIM0_LNAMIXHIGHCUR_current_470uA ( _RAC_LNAMIXTRIM0_LNAMIXHIGHCUR_current_470uA << 6)

Shifted mode current_470uA for RAC_LNAMIXTRIM0

Definition at line 2410 of file efr32bg21_rac.h .

#define RAC_LNAMIXTRIM0_LNAMIXHIGHCUR_current_530uA ( _RAC_LNAMIXTRIM0_LNAMIXHIGHCUR_current_530uA << 6)

Shifted mode current_530uA for RAC_LNAMIXTRIM0

Definition at line 2411 of file efr32bg21_rac.h .

#define RAC_LNAMIXTRIM0_LNAMIXHIGHCUR_current_590uA ( _RAC_LNAMIXTRIM0_LNAMIXHIGHCUR_current_590uA << 6)

Shifted mode current_590uA for RAC_LNAMIXTRIM0

Definition at line 2413 of file efr32bg21_rac.h .

#define RAC_LNAMIXTRIM0_LNAMIXHIGHCUR_DEFAULT ( _RAC_LNAMIXTRIM0_LNAMIXHIGHCUR_DEFAULT << 6)

Shifted mode DEFAULT for RAC_LNAMIXTRIM0

Definition at line 2409 of file efr32bg21_rac.h .

#define RAC_LNAMIXTRIM0_LNAMIXHIGHCUR_unused ( _RAC_LNAMIXTRIM0_LNAMIXHIGHCUR_unused << 6)

Shifted mode unused for RAC_LNAMIXTRIM0

Definition at line 2412 of file efr32bg21_rac.h .

#define RAC_LNAMIXTRIM0_LNAMIXLOWCUR_current_60percent ( _RAC_LNAMIXTRIM0_LNAMIXLOWCUR_current_60percent << 8)

Shifted mode current_60percent for RAC_LNAMIXTRIM0

Definition at line 2425 of file efr32bg21_rac.h .

#define RAC_LNAMIXTRIM0_LNAMIXLOWCUR_current_80percent ( _RAC_LNAMIXTRIM0_LNAMIXLOWCUR_current_80percent << 8)

Shifted mode current_80percent for RAC_LNAMIXTRIM0

Definition at line 2424 of file efr32bg21_rac.h .

#define RAC_LNAMIXTRIM0_LNAMIXLOWCUR_current_nom ( _RAC_LNAMIXTRIM0_LNAMIXLOWCUR_current_nom << 8)

Shifted mode current_nom for RAC_LNAMIXTRIM0

Definition at line 2422 of file efr32bg21_rac.h .

#define RAC_LNAMIXTRIM0_LNAMIXLOWCUR_DEFAULT ( _RAC_LNAMIXTRIM0_LNAMIXLOWCUR_DEFAULT << 8)

Shifted mode DEFAULT for RAC_LNAMIXTRIM0

Definition at line 2421 of file efr32bg21_rac.h .

#define RAC_LNAMIXTRIM0_LNAMIXLOWCUR_unused ( _RAC_LNAMIXTRIM0_LNAMIXLOWCUR_unused << 8)

Shifted mode unused for RAC_LNAMIXTRIM0

Definition at line 2423 of file efr32bg21_rac.h .

#define RAC_LNAMIXTRIM0_LNAMIXRFPKDBWSEL_DEFAULT ( _RAC_LNAMIXTRIM0_LNAMIXRFPKDBWSEL_DEFAULT << 10)

Shifted mode DEFAULT for RAC_LNAMIXTRIM0

Definition at line 2429 of file efr32bg21_rac.h .

#define RAC_LNAMIXTRIM0_LNAMIXRFPKDCALCM_DEFAULT ( _RAC_LNAMIXTRIM0_LNAMIXRFPKDCALCM_DEFAULT << 12)

Shifted mode DEFAULT for RAC_LNAMIXTRIM0

Definition at line 2433 of file efr32bg21_rac.h .

#define RAC_LNAMIXTRIM0_LNAMIXRFPKDCALDM_DEFAULT ( _RAC_LNAMIXTRIM0_LNAMIXRFPKDCALDM_DEFAULT << 18)

Shifted mode DEFAULT for RAC_LNAMIXTRIM0

Definition at line 2437 of file efr32bg21_rac.h .

#define RAC_LNAMIXTRIM0_LNAMIXTRIMVREG_DEFAULT ( _RAC_LNAMIXTRIM0_LNAMIXTRIMVREG_DEFAULT << 23)

Shifted mode DEFAULT for RAC_LNAMIXTRIM0

Definition at line 2441 of file efr32bg21_rac.h .

#define RAC_LNAMIXTRIM1_LNAMIXIBIAS1ADJ_DEFAULT ( _RAC_LNAMIXTRIM1_LNAMIXIBIAS1ADJ_DEFAULT << 0)

Shifted mode DEFAULT for RAC_LNAMIXTRIM1

Definition at line 2449 of file efr32bg21_rac.h .

#define RAC_LNAMIXTRIM1_LNAMIXLNA1CAPSEL_DEFAULT ( _RAC_LNAMIXTRIM1_LNAMIXLNA1CAPSEL_DEFAULT << 4)

Shifted mode DEFAULT for RAC_LNAMIXTRIM1

Definition at line 2453 of file efr32bg21_rac.h .

#define RAC_LNAMIXTRIM1_LNAMIXMXRBIAS1_bias_1V ( _RAC_LNAMIXTRIM1_LNAMIXMXRBIAS1_bias_1V << 7)

Shifted mode bias_1V for RAC_LNAMIXTRIM1

Definition at line 2462 of file efr32bg21_rac.h .

#define RAC_LNAMIXTRIM1_LNAMIXMXRBIAS1_bias_800m ( _RAC_LNAMIXTRIM1_LNAMIXMXRBIAS1_bias_800m << 7)

Shifted mode bias_800m for RAC_LNAMIXTRIM1

Definition at line 2465 of file efr32bg21_rac.h .

#define RAC_LNAMIXTRIM1_LNAMIXMXRBIAS1_bias_900m ( _RAC_LNAMIXTRIM1_LNAMIXMXRBIAS1_bias_900m << 7)

Shifted mode bias_900m for RAC_LNAMIXTRIM1

Definition at line 2464 of file efr32bg21_rac.h .

#define RAC_LNAMIXTRIM1_LNAMIXMXRBIAS1_DEFAULT ( _RAC_LNAMIXTRIM1_LNAMIXMXRBIAS1_DEFAULT << 7)

Shifted mode DEFAULT for RAC_LNAMIXTRIM1

Definition at line 2461 of file efr32bg21_rac.h .

#define RAC_LNAMIXTRIM1_LNAMIXMXRBIAS1_unused ( _RAC_LNAMIXTRIM1_LNAMIXMXRBIAS1_unused << 7)

Shifted mode unused for RAC_LNAMIXTRIM1

Definition at line 2463 of file efr32bg21_rac.h .

#define RAC_LNAMIXTRIM1_LNAMIXNCAS1ADJ_DEFAULT ( _RAC_LNAMIXTRIM1_LNAMIXNCAS1ADJ_DEFAULT << 9)

Shifted mode DEFAULT for RAC_LNAMIXTRIM1

Definition at line 2473 of file efr32bg21_rac.h .

#define RAC_LNAMIXTRIM1_LNAMIXNCAS1ADJ_ncas_1V ( _RAC_LNAMIXTRIM1_LNAMIXNCAS1ADJ_ncas_1V << 9)

Shifted mode ncas_1V for RAC_LNAMIXTRIM1

Definition at line 2474 of file efr32bg21_rac.h .

#define RAC_LNAMIXTRIM1_LNAMIXNCAS1ADJ_ncas_900m ( _RAC_LNAMIXTRIM1_LNAMIXNCAS1ADJ_ncas_900m << 9)

Shifted mode ncas_900m for RAC_LNAMIXTRIM1

Definition at line 2477 of file efr32bg21_rac.h .

#define RAC_LNAMIXTRIM1_LNAMIXNCAS1ADJ_ncas_950m ( _RAC_LNAMIXTRIM1_LNAMIXNCAS1ADJ_ncas_950m << 9)

Shifted mode ncas_950m for RAC_LNAMIXTRIM1

Definition at line 2476 of file efr32bg21_rac.h .

#define RAC_LNAMIXTRIM1_LNAMIXNCAS1ADJ_unused ( _RAC_LNAMIXTRIM1_LNAMIXNCAS1ADJ_unused << 9)

Shifted mode unused for RAC_LNAMIXTRIM1

Definition at line 2475 of file efr32bg21_rac.h .

#define RAC_LNAMIXTRIM1_LNAMIXPCAS1ADJ_DEFAULT ( _RAC_LNAMIXTRIM1_LNAMIXPCAS1ADJ_DEFAULT << 11)

Shifted mode DEFAULT for RAC_LNAMIXTRIM1

Definition at line 2485 of file efr32bg21_rac.h .

#define RAC_LNAMIXTRIM1_LNAMIXPCAS1ADJ_pcas_250m ( _RAC_LNAMIXTRIM1_LNAMIXPCAS1ADJ_pcas_250m << 11)

Shifted mode pcas_250m for RAC_LNAMIXTRIM1

Definition at line 2486 of file efr32bg21_rac.h .

#define RAC_LNAMIXTRIM1_LNAMIXPCAS1ADJ_pcas_300m ( _RAC_LNAMIXTRIM1_LNAMIXPCAS1ADJ_pcas_300m << 11)

Shifted mode pcas_300m for RAC_LNAMIXTRIM1

Definition at line 2488 of file efr32bg21_rac.h .

#define RAC_LNAMIXTRIM1_LNAMIXPCAS1ADJ_pcas_350m ( _RAC_LNAMIXTRIM1_LNAMIXPCAS1ADJ_pcas_350m << 11)

Shifted mode pcas_350m for RAC_LNAMIXTRIM1

Definition at line 2489 of file efr32bg21_rac.h .

#define RAC_LNAMIXTRIM1_LNAMIXPCAS1ADJ_unused ( _RAC_LNAMIXTRIM1_LNAMIXPCAS1ADJ_unused << 11)

Shifted mode unused for RAC_LNAMIXTRIM1

Definition at line 2487 of file efr32bg21_rac.h .

#define RAC_LNAMIXTRIM1_LNAMIXVOUT1ADJ_DEFAULT ( _RAC_LNAMIXTRIM1_LNAMIXVOUT1ADJ_DEFAULT << 13)

Shifted mode DEFAULT for RAC_LNAMIXTRIM1

Definition at line 2493 of file efr32bg21_rac.h .

#define RAC_LNAMIXTRIM2_LNAMIXIBIAS2ADJ_DEFAULT ( _RAC_LNAMIXTRIM2_LNAMIXIBIAS2ADJ_DEFAULT << 0)

Shifted mode DEFAULT for RAC_LNAMIXTRIM2

Definition at line 2501 of file efr32bg21_rac.h .

#define RAC_LNAMIXTRIM2_LNAMIXLNA2CAPSEL_DEFAULT ( _RAC_LNAMIXTRIM2_LNAMIXLNA2CAPSEL_DEFAULT << 4)

Shifted mode DEFAULT for RAC_LNAMIXTRIM2

Definition at line 2505 of file efr32bg21_rac.h .

#define RAC_LNAMIXTRIM2_LNAMIXMXRBIAS2_bias_1V ( _RAC_LNAMIXTRIM2_LNAMIXMXRBIAS2_bias_1V << 7)

Shifted mode bias_1V for RAC_LNAMIXTRIM2

Definition at line 2514 of file efr32bg21_rac.h .

#define RAC_LNAMIXTRIM2_LNAMIXMXRBIAS2_bias_800m ( _RAC_LNAMIXTRIM2_LNAMIXMXRBIAS2_bias_800m << 7)

Shifted mode bias_800m for RAC_LNAMIXTRIM2

Definition at line 2517 of file efr32bg21_rac.h .

#define RAC_LNAMIXTRIM2_LNAMIXMXRBIAS2_bias_900m ( _RAC_LNAMIXTRIM2_LNAMIXMXRBIAS2_bias_900m << 7)

Shifted mode bias_900m for RAC_LNAMIXTRIM2

Definition at line 2516 of file efr32bg21_rac.h .

#define RAC_LNAMIXTRIM2_LNAMIXMXRBIAS2_DEFAULT ( _RAC_LNAMIXTRIM2_LNAMIXMXRBIAS2_DEFAULT << 7)

Shifted mode DEFAULT for RAC_LNAMIXTRIM2

Definition at line 2513 of file efr32bg21_rac.h .

#define RAC_LNAMIXTRIM2_LNAMIXMXRBIAS2_unused ( _RAC_LNAMIXTRIM2_LNAMIXMXRBIAS2_unused << 7)

Shifted mode unused for RAC_LNAMIXTRIM2

Definition at line 2515 of file efr32bg21_rac.h .

#define RAC_LNAMIXTRIM2_LNAMIXNCAS2ADJ_DEFAULT ( _RAC_LNAMIXTRIM2_LNAMIXNCAS2ADJ_DEFAULT << 9)

Shifted mode DEFAULT for RAC_LNAMIXTRIM2

Definition at line 2525 of file efr32bg21_rac.h .

#define RAC_LNAMIXTRIM2_LNAMIXNCAS2ADJ_ncas_1V ( _RAC_LNAMIXTRIM2_LNAMIXNCAS2ADJ_ncas_1V << 9)

Shifted mode ncas_1V for RAC_LNAMIXTRIM2

Definition at line 2526 of file efr32bg21_rac.h .

#define RAC_LNAMIXTRIM2_LNAMIXNCAS2ADJ_ncas_900m ( _RAC_LNAMIXTRIM2_LNAMIXNCAS2ADJ_ncas_900m << 9)

Shifted mode ncas_900m for RAC_LNAMIXTRIM2

Definition at line 2529 of file efr32bg21_rac.h .

#define RAC_LNAMIXTRIM2_LNAMIXNCAS2ADJ_ncas_950m ( _RAC_LNAMIXTRIM2_LNAMIXNCAS2ADJ_ncas_950m << 9)

Shifted mode ncas_950m for RAC_LNAMIXTRIM2

Definition at line 2528 of file efr32bg21_rac.h .

#define RAC_LNAMIXTRIM2_LNAMIXNCAS2ADJ_unused ( _RAC_LNAMIXTRIM2_LNAMIXNCAS2ADJ_unused << 9)

Shifted mode unused for RAC_LNAMIXTRIM2

Definition at line 2527 of file efr32bg21_rac.h .

#define RAC_LNAMIXTRIM2_LNAMIXPCAS2ADJ_DEFAULT ( _RAC_LNAMIXTRIM2_LNAMIXPCAS2ADJ_DEFAULT << 11)

Shifted mode DEFAULT for RAC_LNAMIXTRIM2

Definition at line 2537 of file efr32bg21_rac.h .

#define RAC_LNAMIXTRIM2_LNAMIXPCAS2ADJ_pcas_250m ( _RAC_LNAMIXTRIM2_LNAMIXPCAS2ADJ_pcas_250m << 11)

Shifted mode pcas_250m for RAC_LNAMIXTRIM2

Definition at line 2538 of file efr32bg21_rac.h .

#define RAC_LNAMIXTRIM2_LNAMIXPCAS2ADJ_pcas_300m ( _RAC_LNAMIXTRIM2_LNAMIXPCAS2ADJ_pcas_300m << 11)

Shifted mode pcas_300m for RAC_LNAMIXTRIM2

Definition at line 2540 of file efr32bg21_rac.h .

#define RAC_LNAMIXTRIM2_LNAMIXPCAS2ADJ_pcas_350m ( _RAC_LNAMIXTRIM2_LNAMIXPCAS2ADJ_pcas_350m << 11)

Shifted mode pcas_350m for RAC_LNAMIXTRIM2

Definition at line 2541 of file efr32bg21_rac.h .

#define RAC_LNAMIXTRIM2_LNAMIXPCAS2ADJ_unused ( _RAC_LNAMIXTRIM2_LNAMIXPCAS2ADJ_unused << 11)

Shifted mode unused for RAC_LNAMIXTRIM2

Definition at line 2539 of file efr32bg21_rac.h .

#define RAC_LNAMIXTRIM2_LNAMIXVOUT2ADJ_DEFAULT ( _RAC_LNAMIXTRIM2_LNAMIXVOUT2ADJ_DEFAULT << 13)

Shifted mode DEFAULT for RAC_LNAMIXTRIM2

Definition at line 2545 of file efr32bg21_rac.h .

#define RAC_PACTRL_PAEN10DBMVMID (0x1UL << 0)

PAEN10DBMVMID

Definition at line 3262 of file efr32bg21_rac.h .

#define RAC_PACTRL_PAEN10DBMVMID_DEFAULT ( _RAC_PACTRL_PAEN10DBMVMID_DEFAULT << 0)

Shifted mode DEFAULT for RAC_PACTRL

Definition at line 3268 of file efr32bg21_rac.h .

#define RAC_PACTRL_PAEN10DBMVMID_disable ( _RAC_PACTRL_PAEN10DBMVMID_disable << 0)

Shifted mode disable for RAC_PACTRL

Definition at line 3269 of file efr32bg21_rac.h .

#define RAC_PACTRL_PAEN10DBMVMID_enable ( _RAC_PACTRL_PAEN10DBMVMID_enable << 0)

Shifted mode enable for RAC_PACTRL

Definition at line 3270 of file efr32bg21_rac.h .

#define RAC_PACTRL_PAEN20DBMVMID (0x1UL << 1)

PAEN20DBMVMID

Definition at line 3271 of file efr32bg21_rac.h .

#define RAC_PACTRL_PAEN20DBMVMID_DEFAULT ( _RAC_PACTRL_PAEN20DBMVMID_DEFAULT << 1)

Shifted mode DEFAULT for RAC_PACTRL

Definition at line 3277 of file efr32bg21_rac.h .

#define RAC_PACTRL_PAEN20DBMVMID_disable ( _RAC_PACTRL_PAEN20DBMVMID_disable << 1)

Shifted mode disable for RAC_PACTRL

Definition at line 3278 of file efr32bg21_rac.h .

#define RAC_PACTRL_PAEN20DBMVMID_enable ( _RAC_PACTRL_PAEN20DBMVMID_enable << 1)

Shifted mode enable for RAC_PACTRL

Definition at line 3279 of file efr32bg21_rac.h .

#define RAC_PACTRL_PAENCAPATT (0x1UL << 2)

PAENCAPATT

Definition at line 3280 of file efr32bg21_rac.h .

#define RAC_PACTRL_PAENCAPATT_DEFAULT ( _RAC_PACTRL_PAENCAPATT_DEFAULT << 2)

Shifted mode DEFAULT for RAC_PACTRL

Definition at line 3286 of file efr32bg21_rac.h .

#define RAC_PACTRL_PAENCAPATT_disable ( _RAC_PACTRL_PAENCAPATT_disable << 2)

Shifted mode disable for RAC_PACTRL

Definition at line 3287 of file efr32bg21_rac.h .

#define RAC_PACTRL_PAENCAPATT_enable ( _RAC_PACTRL_PAENCAPATT_enable << 2)

Shifted mode enable for RAC_PACTRL

Definition at line 3288 of file efr32bg21_rac.h .

#define RAC_PACTRL_PAENLATCHBYPASS (0x1UL << 3)

PAENLATCHBYPASS

Definition at line 3289 of file efr32bg21_rac.h .

#define RAC_PACTRL_PAENLATCHBYPASS_DEFAULT ( _RAC_PACTRL_PAENLATCHBYPASS_DEFAULT << 3)

Shifted mode DEFAULT for RAC_PACTRL

Definition at line 3295 of file efr32bg21_rac.h .

#define RAC_PACTRL_PAENLATCHBYPASS_disable ( _RAC_PACTRL_PAENLATCHBYPASS_disable << 3)

Shifted mode disable for RAC_PACTRL

Definition at line 3296 of file efr32bg21_rac.h .

#define RAC_PACTRL_PAENLATCHBYPASS_enable ( _RAC_PACTRL_PAENLATCHBYPASS_enable << 3)

Shifted mode enable for RAC_PACTRL

Definition at line 3297 of file efr32bg21_rac.h .

#define RAC_PACTRL_PAENPOWERRAMPINGCLK (0x1UL << 4)

PAENPOWERRAMPINGCLK

Definition at line 3298 of file efr32bg21_rac.h .

#define RAC_PACTRL_PAENPOWERRAMPINGCLK_DEFAULT ( _RAC_PACTRL_PAENPOWERRAMPINGCLK_DEFAULT << 4)

Shifted mode DEFAULT for RAC_PACTRL

Definition at line 3304 of file efr32bg21_rac.h .

#define RAC_PACTRL_PAENPOWERRAMPINGCLK_en_clk ( _RAC_PACTRL_PAENPOWERRAMPINGCLK_en_clk << 4)

Shifted mode en_clk for RAC_PACTRL

Definition at line 3306 of file efr32bg21_rac.h .

#define RAC_PACTRL_PAENPOWERRAMPINGCLK_silence_clk ( _RAC_PACTRL_PAENPOWERRAMPINGCLK_silence_clk << 4)

Shifted mode silence_clk for RAC_PACTRL

Definition at line 3305 of file efr32bg21_rac.h .

#define RAC_PACTRL_PAPOWER_DEFAULT ( _RAC_PACTRL_PAPOWER_DEFAULT << 16)

Shifted mode DEFAULT for RAC_PACTRL

Definition at line 3380 of file efr32bg21_rac.h .

#define RAC_PACTRL_PAPOWER_t0stripeon ( _RAC_PACTRL_PAPOWER_t0stripeon << 16)

Shifted mode t0stripeon for RAC_PACTRL

Definition at line 3381 of file efr32bg21_rac.h .

#define RAC_PACTRL_PAPOWER_t10stripeon ( _RAC_PACTRL_PAPOWER_t10stripeon << 16)

Shifted mode t10stripeon for RAC_PACTRL

Definition at line 3391 of file efr32bg21_rac.h .

#define RAC_PACTRL_PAPOWER_t11stripeon ( _RAC_PACTRL_PAPOWER_t11stripeon << 16)

Shifted mode t11stripeon for RAC_PACTRL

Definition at line 3392 of file efr32bg21_rac.h .

#define RAC_PACTRL_PAPOWER_t12stripeon ( _RAC_PACTRL_PAPOWER_t12stripeon << 16)

Shifted mode t12stripeon for RAC_PACTRL

Definition at line 3393 of file efr32bg21_rac.h .

#define RAC_PACTRL_PAPOWER_t13stripeon ( _RAC_PACTRL_PAPOWER_t13stripeon << 16)

Shifted mode t13stripeon for RAC_PACTRL

Definition at line 3394 of file efr32bg21_rac.h .

#define RAC_PACTRL_PAPOWER_t14stripeon ( _RAC_PACTRL_PAPOWER_t14stripeon << 16)

Shifted mode t14stripeon for RAC_PACTRL

Definition at line 3395 of file efr32bg21_rac.h .

#define RAC_PACTRL_PAPOWER_t15stripeon ( _RAC_PACTRL_PAPOWER_t15stripeon << 16)

Shifted mode t15stripeon for RAC_PACTRL

Definition at line 3396 of file efr32bg21_rac.h .

#define RAC_PACTRL_PAPOWER_t1stripeon ( _RAC_PACTRL_PAPOWER_t1stripeon << 16)

Shifted mode t1stripeon for RAC_PACTRL

Definition at line 3382 of file efr32bg21_rac.h .

#define RAC_PACTRL_PAPOWER_t2stripeon ( _RAC_PACTRL_PAPOWER_t2stripeon << 16)

Shifted mode t2stripeon for RAC_PACTRL

Definition at line 3383 of file efr32bg21_rac.h .

#define RAC_PACTRL_PAPOWER_t3stripeon ( _RAC_PACTRL_PAPOWER_t3stripeon << 16)

Shifted mode t3stripeon for RAC_PACTRL

Definition at line 3384 of file efr32bg21_rac.h .

#define RAC_PACTRL_PAPOWER_t4stripeon ( _RAC_PACTRL_PAPOWER_t4stripeon << 16)

Shifted mode t4stripeon for RAC_PACTRL

Definition at line 3385 of file efr32bg21_rac.h .

#define RAC_PACTRL_PAPOWER_t5stripeon ( _RAC_PACTRL_PAPOWER_t5stripeon << 16)

Shifted mode t5stripeon for RAC_PACTRL

Definition at line 3386 of file efr32bg21_rac.h .

#define RAC_PACTRL_PAPOWER_t6stripeon ( _RAC_PACTRL_PAPOWER_t6stripeon << 16)

Shifted mode t6stripeon for RAC_PACTRL

Definition at line 3387 of file efr32bg21_rac.h .

#define RAC_PACTRL_PAPOWER_t7stripeon ( _RAC_PACTRL_PAPOWER_t7stripeon << 16)

Shifted mode t7stripeon for RAC_PACTRL

Definition at line 3388 of file efr32bg21_rac.h .

#define RAC_PACTRL_PAPOWER_t8stripeon ( _RAC_PACTRL_PAPOWER_t8stripeon << 16)

Shifted mode t8stripeon for RAC_PACTRL

Definition at line 3389 of file efr32bg21_rac.h .

#define RAC_PACTRL_PAPOWER_t9stripeon ( _RAC_PACTRL_PAPOWER_t9stripeon << 16)

Shifted mode t9stripeon for RAC_PACTRL

Definition at line 3390 of file efr32bg21_rac.h .

#define RAC_PACTRL_PAPULLDOWNVDDPA (0x1UL << 5)

PAPULLDOWNVDDPA

Definition at line 3307 of file efr32bg21_rac.h .

#define RAC_PACTRL_PAPULLDOWNVDDPA_DEFAULT ( _RAC_PACTRL_PAPULLDOWNVDDPA_DEFAULT << 5)

Shifted mode DEFAULT for RAC_PACTRL

Definition at line 3313 of file efr32bg21_rac.h .

#define RAC_PACTRL_PAPULLDOWNVDDPA_not_pull_down ( _RAC_PACTRL_PAPULLDOWNVDDPA_not_pull_down << 5)

Shifted mode not_pull_down for RAC_PACTRL

Definition at line 3314 of file efr32bg21_rac.h .

#define RAC_PACTRL_PAPULLDOWNVDDPA_pull_down_vddpa ( _RAC_PACTRL_PAPULLDOWNVDDPA_pull_down_vddpa << 5)

Shifted mode pull_down_vddpa for RAC_PACTRL

Definition at line 3315 of file efr32bg21_rac.h .

#define RAC_PACTRL_PAREGBYPASSPDRVLDO (0x1UL << 6)

PAREGBYPASSPDRVLDO

Definition at line 3316 of file efr32bg21_rac.h .

#define RAC_PACTRL_PAREGBYPASSPDRVLDO_bypass ( _RAC_PACTRL_PAREGBYPASSPDRVLDO_bypass << 6)

Shifted mode bypass for RAC_PACTRL

Definition at line 3324 of file efr32bg21_rac.h .

#define RAC_PACTRL_PAREGBYPASSPDRVLDO_DEFAULT ( _RAC_PACTRL_PAREGBYPASSPDRVLDO_DEFAULT << 6)

Shifted mode DEFAULT for RAC_PACTRL

Definition at line 3322 of file efr32bg21_rac.h .

#define RAC_PACTRL_PAREGBYPASSPDRVLDO_not_bypass ( _RAC_PACTRL_PAREGBYPASSPDRVLDO_not_bypass << 6)

Shifted mode not_bypass for RAC_PACTRL

Definition at line 3323 of file efr32bg21_rac.h .

#define RAC_PACTRL_PAREGBYPASSPREREG (0x1UL << 7)

PAREGBYPASSPREREG

Definition at line 3325 of file efr32bg21_rac.h .

#define RAC_PACTRL_PAREGBYPASSPREREG_bypass ( _RAC_PACTRL_PAREGBYPASSPREREG_bypass << 7)

Shifted mode bypass for RAC_PACTRL

Definition at line 3333 of file efr32bg21_rac.h .

#define RAC_PACTRL_PAREGBYPASSPREREG_DEFAULT ( _RAC_PACTRL_PAREGBYPASSPREREG_DEFAULT << 7)

Shifted mode DEFAULT for RAC_PACTRL

Definition at line 3331 of file efr32bg21_rac.h .

#define RAC_PACTRL_PAREGBYPASSPREREG_not_bypass ( _RAC_PACTRL_PAREGBYPASSPREREG_not_bypass << 7)

Shifted mode not_bypass for RAC_PACTRL

Definition at line 3332 of file efr32bg21_rac.h .

#define RAC_PACTRL_PASELLDOVDDPA (0x1UL << 8)

PASELLDOVDDPA

Definition at line 3334 of file efr32bg21_rac.h .

#define RAC_PACTRL_PASELLDOVDDPA_DEFAULT ( _RAC_PACTRL_PASELLDOVDDPA_DEFAULT << 8)

Shifted mode DEFAULT for RAC_PACTRL

Definition at line 3340 of file efr32bg21_rac.h .

#define RAC_PACTRL_PASELLDOVDDPA_not_selected ( _RAC_PACTRL_PASELLDOVDDPA_not_selected << 8)

Shifted mode not_selected for RAC_PACTRL

Definition at line 3341 of file efr32bg21_rac.h .

#define RAC_PACTRL_PASELLDOVDDPA_selected ( _RAC_PACTRL_PASELLDOVDDPA_selected << 8)

Shifted mode selected for RAC_PACTRL

Definition at line 3342 of file efr32bg21_rac.h .

#define RAC_PACTRL_PASELLDOVDDRF (0x1UL << 9)

PASELLDOVDDRF

Definition at line 3343 of file efr32bg21_rac.h .

#define RAC_PACTRL_PASELLDOVDDRF_DEFAULT ( _RAC_PACTRL_PASELLDOVDDRF_DEFAULT << 9)

Shifted mode DEFAULT for RAC_PACTRL

Definition at line 3349 of file efr32bg21_rac.h .

#define RAC_PACTRL_PASELLDOVDDRF_not_selected ( _RAC_PACTRL_PASELLDOVDDRF_not_selected << 9)

Shifted mode not_selected for RAC_PACTRL

Definition at line 3350 of file efr32bg21_rac.h .

#define RAC_PACTRL_PASELLDOVDDRF_selected ( _RAC_PACTRL_PASELLDOVDDRF_selected << 9)

Shifted mode selected for RAC_PACTRL

Definition at line 3351 of file efr32bg21_rac.h .

#define RAC_PACTRL_PASELSLICE_DEFAULT ( _RAC_PACTRL_PASELSLICE_DEFAULT << 20)

Shifted mode DEFAULT for RAC_PACTRL

Definition at line 3400 of file efr32bg21_rac.h .

#define RAC_PACTRL_PASLICERST (0x1UL << 10)

PASLICERST

Definition at line 3352 of file efr32bg21_rac.h .

#define RAC_PACTRL_PASLICERST_DEFAULT ( _RAC_PACTRL_PASLICERST_DEFAULT << 10)

Shifted mode DEFAULT for RAC_PACTRL

Definition at line 3358 of file efr32bg21_rac.h .

#define RAC_PACTRL_PASLICERST_disable ( _RAC_PACTRL_PASLICERST_disable << 10)

Shifted mode disable for RAC_PACTRL

Definition at line 3359 of file efr32bg21_rac.h .

#define RAC_PACTRL_PASLICERST_enable ( _RAC_PACTRL_PASLICERST_enable << 10)

Shifted mode enable for RAC_PACTRL

Definition at line 3360 of file efr32bg21_rac.h .

#define RAC_PAENCTRL_PARAMP (0x1UL << 8)

PA output level ramping

Definition at line 1472 of file efr32bg21_rac.h .

#define RAC_PAENCTRL_PARAMP_DEFAULT ( _RAC_PAENCTRL_PARAMP_DEFAULT << 8)

Shifted mode DEFAULT for RAC_PAENCTRL

Definition at line 1476 of file efr32bg21_rac.h .

#define RAC_PATRIM0_PATRIMDRVREGIBCORE0DBM_DEFAULT ( _RAC_PATRIM0_PATRIMDRVREGIBCORE0DBM_DEFAULT << 0)

Shifted mode DEFAULT for RAC_PATRIM0

Definition at line 2663 of file efr32bg21_rac.h .

#define RAC_PATRIM0_PATRIMDRVREGIBCORE0DBM_i_4u ( _RAC_PATRIM0_PATRIMDRVREGIBCORE0DBM_i_4u << 0)

Shifted mode i_4u for RAC_PATRIM0

Definition at line 2664 of file efr32bg21_rac.h .

#define RAC_PATRIM0_PATRIMDRVREGIBCORE0DBM_i_5u ( _RAC_PATRIM0_PATRIMDRVREGIBCORE0DBM_i_5u << 0)

Shifted mode i_5u for RAC_PATRIM0

Definition at line 2665 of file efr32bg21_rac.h .

#define RAC_PATRIM0_PATRIMDRVREGIBCORE0DBM_i_6u ( _RAC_PATRIM0_PATRIMDRVREGIBCORE0DBM_i_6u << 0)

Shifted mode i_6u for RAC_PATRIM0

Definition at line 2666 of file efr32bg21_rac.h .

#define RAC_PATRIM0_PATRIMDRVREGIBCORE0DBM_i_7u ( _RAC_PATRIM0_PATRIMDRVREGIBCORE0DBM_i_7u << 0)

Shifted mode i_7u for RAC_PATRIM0

Definition at line 2667 of file efr32bg21_rac.h .

#define RAC_PATRIM0_PATRIMDRVREGIBNDIO0DBM_DEFAULT ( _RAC_PATRIM0_PATRIMDRVREGIBNDIO0DBM_DEFAULT << 2)

Shifted mode DEFAULT for RAC_PATRIM0

Definition at line 2687 of file efr32bg21_rac.h .

#define RAC_PATRIM0_PATRIMDRVREGIBNDIO0DBM_NA_10 ( _RAC_PATRIM0_PATRIMDRVREGIBNDIO0DBM_NA_10 << 2)

Shifted mode NA_10 for RAC_PATRIM0

Definition at line 2698 of file efr32bg21_rac.h .

#define RAC_PATRIM0_PATRIMDRVREGIBNDIO0DBM_NA_11 ( _RAC_PATRIM0_PATRIMDRVREGIBNDIO0DBM_NA_11 << 2)

Shifted mode NA_11 for RAC_PATRIM0

Definition at line 2699 of file efr32bg21_rac.h .

#define RAC_PATRIM0_PATRIMDRVREGIBNDIO0DBM_NA_12 ( _RAC_PATRIM0_PATRIMDRVREGIBNDIO0DBM_NA_12 << 2)

Shifted mode NA_12 for RAC_PATRIM0

Definition at line 2700 of file efr32bg21_rac.h .

#define RAC_PATRIM0_PATRIMDRVREGIBNDIO0DBM_NA_13 ( _RAC_PATRIM0_PATRIMDRVREGIBNDIO0DBM_NA_13 << 2)

Shifted mode NA_13 for RAC_PATRIM0

Definition at line 2701 of file efr32bg21_rac.h .

#define RAC_PATRIM0_PATRIMDRVREGIBNDIO0DBM_NA_14 ( _RAC_PATRIM0_PATRIMDRVREGIBNDIO0DBM_NA_14 << 2)

Shifted mode NA_14 for RAC_PATRIM0

Definition at line 2702 of file efr32bg21_rac.h .

#define RAC_PATRIM0_PATRIMDRVREGIBNDIO0DBM_NA_15 ( _RAC_PATRIM0_PATRIMDRVREGIBNDIO0DBM_NA_15 << 2)

Shifted mode NA_15 for RAC_PATRIM0

Definition at line 2703 of file efr32bg21_rac.h .

#define RAC_PATRIM0_PATRIMDRVREGIBNDIO0DBM_vreg_1p09 ( _RAC_PATRIM0_PATRIMDRVREGIBNDIO0DBM_vreg_1p09 << 2)

Shifted mode vreg_1p09 for RAC_PATRIM0

Definition at line 2688 of file efr32bg21_rac.h .

#define RAC_PATRIM0_PATRIMDRVREGIBNDIO0DBM_vreg_1p13 ( _RAC_PATRIM0_PATRIMDRVREGIBNDIO0DBM_vreg_1p13 << 2)

Shifted mode vreg_1p13 for RAC_PATRIM0

Definition at line 2689 of file efr32bg21_rac.h .

#define RAC_PATRIM0_PATRIMDRVREGIBNDIO0DBM_vreg_1p16 ( _RAC_PATRIM0_PATRIMDRVREGIBNDIO0DBM_vreg_1p16 << 2)

Shifted mode vreg_1p16 for RAC_PATRIM0

Definition at line 2690 of file efr32bg21_rac.h .

#define RAC_PATRIM0_PATRIMDRVREGIBNDIO0DBM_vreg_1p20 ( _RAC_PATRIM0_PATRIMDRVREGIBNDIO0DBM_vreg_1p20 << 2)

Shifted mode vreg_1p20 for RAC_PATRIM0

Definition at line 2691 of file efr32bg21_rac.h .

#define RAC_PATRIM0_PATRIMDRVREGIBNDIO0DBM_vreg_1p23 ( _RAC_PATRIM0_PATRIMDRVREGIBNDIO0DBM_vreg_1p23 << 2)

Shifted mode vreg_1p23 for RAC_PATRIM0

Definition at line 2692 of file efr32bg21_rac.h .

#define RAC_PATRIM0_PATRIMDRVREGIBNDIO0DBM_vreg_1p25 ( _RAC_PATRIM0_PATRIMDRVREGIBNDIO0DBM_vreg_1p25 << 2)

Shifted mode vreg_1p25 for RAC_PATRIM0

Definition at line 2693 of file efr32bg21_rac.h .

#define RAC_PATRIM0_PATRIMDRVREGIBNDIO0DBM_vreg_1p28 ( _RAC_PATRIM0_PATRIMDRVREGIBNDIO0DBM_vreg_1p28 << 2)

Shifted mode vreg_1p28 for RAC_PATRIM0

Definition at line 2694 of file efr32bg21_rac.h .

#define RAC_PATRIM0_PATRIMDRVREGIBNDIO0DBM_vreg_1p31 ( _RAC_PATRIM0_PATRIMDRVREGIBNDIO0DBM_vreg_1p31 << 2)

Shifted mode vreg_1p31 for RAC_PATRIM0

Definition at line 2695 of file efr32bg21_rac.h .

#define RAC_PATRIM0_PATRIMDRVREGIBNDIO0DBM_vreg_1p33 ( _RAC_PATRIM0_PATRIMDRVREGIBNDIO0DBM_vreg_1p33 << 2)

Shifted mode vreg_1p33 for RAC_PATRIM0

Definition at line 2696 of file efr32bg21_rac.h .

#define RAC_PATRIM0_PATRIMDRVREGIBNDIO0DBM_vreg_1p36 ( _RAC_PATRIM0_PATRIMDRVREGIBNDIO0DBM_vreg_1p36 << 2)

Shifted mode vreg_1p36 for RAC_PATRIM0

Definition at line 2697 of file efr32bg21_rac.h .

#define RAC_PATRIM0_PATRIMDRVREGPSR0DBM (0x1UL << 6)

PATRIMDRVREGPSR0DBM

Definition at line 2704 of file efr32bg21_rac.h .

#define RAC_PATRIM0_PATRIMDRVREGPSR0DBM_DEFAULT ( _RAC_PATRIM0_PATRIMDRVREGPSR0DBM_DEFAULT << 6)

Shifted mode DEFAULT for RAC_PATRIM0

Definition at line 2710 of file efr32bg21_rac.h .

#define RAC_PATRIM0_PATRIMDRVREGPSR0DBM_disable ( _RAC_PATRIM0_PATRIMDRVREGPSR0DBM_disable << 6)

Shifted mode disable for RAC_PATRIM0

Definition at line 2711 of file efr32bg21_rac.h .

#define RAC_PATRIM0_PATRIMDRVREGPSR0DBM_enable ( _RAC_PATRIM0_PATRIMDRVREGPSR0DBM_enable << 6)

Shifted mode enable for RAC_PATRIM0

Definition at line 2712 of file efr32bg21_rac.h .

#define RAC_PATRIM0_PATRIMDRVSLICE0DBM_DEFAULT ( _RAC_PATRIM0_PATRIMDRVSLICE0DBM_DEFAULT << 7)

Shifted mode DEFAULT for RAC_PATRIM0

Definition at line 2720 of file efr32bg21_rac.h .

#define RAC_PATRIM0_PATRIMDRVSLICE0DBM_on_0_slice ( _RAC_PATRIM0_PATRIMDRVSLICE0DBM_on_0_slice << 7)

Shifted mode on_0_slice for RAC_PATRIM0

Definition at line 2721 of file efr32bg21_rac.h .

#define RAC_PATRIM0_PATRIMDRVSLICE0DBM_on_1_slice ( _RAC_PATRIM0_PATRIMDRVSLICE0DBM_on_1_slice << 7)

Shifted mode on_1_slice for RAC_PATRIM0

Definition at line 2722 of file efr32bg21_rac.h .

#define RAC_PATRIM0_PATRIMDRVSLICE0DBM_on_2_slice ( _RAC_PATRIM0_PATRIMDRVSLICE0DBM_on_2_slice << 7)

Shifted mode on_2_slice for RAC_PATRIM0

Definition at line 2723 of file efr32bg21_rac.h .

#define RAC_PATRIM0_PATRIMDRVSLICE0DBM_on_3_slice ( _RAC_PATRIM0_PATRIMDRVSLICE0DBM_on_3_slice << 7)

Shifted mode on_3_slice for RAC_PATRIM0

Definition at line 2724 of file efr32bg21_rac.h .

#define RAC_PATRIM0_PATRIMFB0DBM_DEFAULT ( _RAC_PATRIM0_PATRIMFB0DBM_DEFAULT << 9)

Shifted mode DEFAULT for RAC_PATRIM0

Definition at line 2744 of file efr32bg21_rac.h .

#define RAC_PATRIM0_PATRIMFB0DBM_vo_vi_0p475 ( _RAC_PATRIM0_PATRIMFB0DBM_vo_vi_0p475 << 9)

Shifted mode vo_vi_0p475 for RAC_PATRIM0

Definition at line 2745 of file efr32bg21_rac.h .

#define RAC_PATRIM0_PATRIMFB0DBM_vo_vi_0p500 ( _RAC_PATRIM0_PATRIMFB0DBM_vo_vi_0p500 << 9)

Shifted mode vo_vi_0p500 for RAC_PATRIM0

Definition at line 2746 of file efr32bg21_rac.h .

#define RAC_PATRIM0_PATRIMFB0DBM_vo_vi_0p525 ( _RAC_PATRIM0_PATRIMFB0DBM_vo_vi_0p525 << 9)

Shifted mode vo_vi_0p525 for RAC_PATRIM0

Definition at line 2747 of file efr32bg21_rac.h .

#define RAC_PATRIM0_PATRIMFB0DBM_vo_vi_0p550 ( _RAC_PATRIM0_PATRIMFB0DBM_vo_vi_0p550 << 9)

Shifted mode vo_vi_0p550 for RAC_PATRIM0

Definition at line 2748 of file efr32bg21_rac.h .

#define RAC_PATRIM0_PATRIMFB0DBM_vo_vi_0p575 ( _RAC_PATRIM0_PATRIMFB0DBM_vo_vi_0p575 << 9)

Shifted mode vo_vi_0p575 for RAC_PATRIM0

Definition at line 2749 of file efr32bg21_rac.h .

#define RAC_PATRIM0_PATRIMFB0DBM_vo_vi_0p600 ( _RAC_PATRIM0_PATRIMFB0DBM_vo_vi_0p600 << 9)

Shifted mode vo_vi_0p600 for RAC_PATRIM0

Definition at line 2750 of file efr32bg21_rac.h .

#define RAC_PATRIM0_PATRIMFB0DBM_vo_vi_0p625 ( _RAC_PATRIM0_PATRIMFB0DBM_vo_vi_0p625 << 9)

Shifted mode vo_vi_0p625 for RAC_PATRIM0

Definition at line 2751 of file efr32bg21_rac.h .

#define RAC_PATRIM0_PATRIMFB0DBM_vo_vi_0p650 ( _RAC_PATRIM0_PATRIMFB0DBM_vo_vi_0p650 << 9)

Shifted mode vo_vi_0p650 for RAC_PATRIM0

Definition at line 2752 of file efr32bg21_rac.h .

#define RAC_PATRIM0_PATRIMFB0DBM_vo_vi_0p675 ( _RAC_PATRIM0_PATRIMFB0DBM_vo_vi_0p675 << 9)

Shifted mode vo_vi_0p675 for RAC_PATRIM0

Definition at line 2753 of file efr32bg21_rac.h .

#define RAC_PATRIM0_PATRIMFB0DBM_vo_vi_0p700 ( _RAC_PATRIM0_PATRIMFB0DBM_vo_vi_0p700 << 9)

Shifted mode vo_vi_0p700 for RAC_PATRIM0

Definition at line 2754 of file efr32bg21_rac.h .

#define RAC_PATRIM0_PATRIMFB0DBM_vo_vi_0p725 ( _RAC_PATRIM0_PATRIMFB0DBM_vo_vi_0p725 << 9)

Shifted mode vo_vi_0p725 for RAC_PATRIM0

Definition at line 2755 of file efr32bg21_rac.h .

#define RAC_PATRIM0_PATRIMFB0DBM_vo_vi_0p750 ( _RAC_PATRIM0_PATRIMFB0DBM_vo_vi_0p750 << 9)

Shifted mode vo_vi_0p750 for RAC_PATRIM0

Definition at line 2756 of file efr32bg21_rac.h .

#define RAC_PATRIM0_PATRIMFB0DBM_vo_vi_0p775 ( _RAC_PATRIM0_PATRIMFB0DBM_vo_vi_0p775 << 9)

Shifted mode vo_vi_0p775 for RAC_PATRIM0

Definition at line 2757 of file efr32bg21_rac.h .

#define RAC_PATRIM0_PATRIMFB0DBM_vo_vi_0p80 ( _RAC_PATRIM0_PATRIMFB0DBM_vo_vi_0p80 << 9)

Shifted mode vo_vi_0p80 for RAC_PATRIM0

Definition at line 2758 of file efr32bg21_rac.h .

#define RAC_PATRIM0_PATRIMFB0DBM_vo_vi_0p825 ( _RAC_PATRIM0_PATRIMFB0DBM_vo_vi_0p825 << 9)

Shifted mode vo_vi_0p825 for RAC_PATRIM0

Definition at line 2759 of file efr32bg21_rac.h .

#define RAC_PATRIM0_PATRIMFB0DBM_vo_vi_0p85 ( _RAC_PATRIM0_PATRIMFB0DBM_vo_vi_0p85 << 9)

Shifted mode vo_vi_0p85 for RAC_PATRIM0

Definition at line 2760 of file efr32bg21_rac.h .

#define RAC_PATRIM0_PATRIMPABIASN0DBM_DEFAULT ( _RAC_PATRIM0_PATRIMPABIASN0DBM_DEFAULT << 13)

Shifted mode DEFAULT for RAC_PATRIM0

Definition at line 2780 of file efr32bg21_rac.h .

#define RAC_PATRIM0_PATRIMPABIASN0DBM_v_450m ( _RAC_PATRIM0_PATRIMPABIASN0DBM_v_450m << 13)

Shifted mode v_450m for RAC_PATRIM0

Definition at line 2781 of file efr32bg21_rac.h .

#define RAC_PATRIM0_PATRIMPABIASN0DBM_v_462p5m ( _RAC_PATRIM0_PATRIMPABIASN0DBM_v_462p5m << 13)

Shifted mode v_462p5m for RAC_PATRIM0

Definition at line 2782 of file efr32bg21_rac.h .

#define RAC_PATRIM0_PATRIMPABIASN0DBM_v_475m ( _RAC_PATRIM0_PATRIMPABIASN0DBM_v_475m << 13)

Shifted mode v_475m for RAC_PATRIM0

Definition at line 2783 of file efr32bg21_rac.h .

#define RAC_PATRIM0_PATRIMPABIASN0DBM_v_487p5m ( _RAC_PATRIM0_PATRIMPABIASN0DBM_v_487p5m << 13)

Shifted mode v_487p5m for RAC_PATRIM0

Definition at line 2784 of file efr32bg21_rac.h .

#define RAC_PATRIM0_PATRIMPABIASN0DBM_v_500m ( _RAC_PATRIM0_PATRIMPABIASN0DBM_v_500m << 13)

Shifted mode v_500m for RAC_PATRIM0

Definition at line 2785 of file efr32bg21_rac.h .

#define RAC_PATRIM0_PATRIMPABIASN0DBM_v_512p5m ( _RAC_PATRIM0_PATRIMPABIASN0DBM_v_512p5m << 13)

Shifted mode v_512p5m for RAC_PATRIM0

Definition at line 2786 of file efr32bg21_rac.h .

#define RAC_PATRIM0_PATRIMPABIASN0DBM_v_525m ( _RAC_PATRIM0_PATRIMPABIASN0DBM_v_525m << 13)

Shifted mode v_525m for RAC_PATRIM0

Definition at line 2787 of file efr32bg21_rac.h .

#define RAC_PATRIM0_PATRIMPABIASN0DBM_v_537p5m ( _RAC_PATRIM0_PATRIMPABIASN0DBM_v_537p5m << 13)

Shifted mode v_537p5m for RAC_PATRIM0

Definition at line 2788 of file efr32bg21_rac.h .

#define RAC_PATRIM0_PATRIMPABIASN0DBM_v_550m ( _RAC_PATRIM0_PATRIMPABIASN0DBM_v_550m << 13)

Shifted mode v_550m for RAC_PATRIM0

Definition at line 2789 of file efr32bg21_rac.h .

#define RAC_PATRIM0_PATRIMPABIASN0DBM_v_562p5m ( _RAC_PATRIM0_PATRIMPABIASN0DBM_v_562p5m << 13)

Shifted mode v_562p5m for RAC_PATRIM0

Definition at line 2790 of file efr32bg21_rac.h .

#define RAC_PATRIM0_PATRIMPABIASN0DBM_v_575m ( _RAC_PATRIM0_PATRIMPABIASN0DBM_v_575m << 13)

Shifted mode v_575m for RAC_PATRIM0

Definition at line 2791 of file efr32bg21_rac.h .

#define RAC_PATRIM0_PATRIMPABIASN0DBM_v_587p5m ( _RAC_PATRIM0_PATRIMPABIASN0DBM_v_587p5m << 13)

Shifted mode v_587p5m for RAC_PATRIM0

Definition at line 2792 of file efr32bg21_rac.h .

#define RAC_PATRIM0_PATRIMPABIASN0DBM_v_600m ( _RAC_PATRIM0_PATRIMPABIASN0DBM_v_600m << 13)

Shifted mode v_600m for RAC_PATRIM0

Definition at line 2793 of file efr32bg21_rac.h .

#define RAC_PATRIM0_PATRIMPABIASN0DBM_v_612p5m ( _RAC_PATRIM0_PATRIMPABIASN0DBM_v_612p5m << 13)

Shifted mode v_612p5m for RAC_PATRIM0

Definition at line 2794 of file efr32bg21_rac.h .

#define RAC_PATRIM0_PATRIMPABIASN0DBM_v_625m ( _RAC_PATRIM0_PATRIMPABIASN0DBM_v_625m << 13)

Shifted mode v_625m for RAC_PATRIM0

Definition at line 2795 of file efr32bg21_rac.h .

#define RAC_PATRIM0_PATRIMPABIASN0DBM_v_637p5m ( _RAC_PATRIM0_PATRIMPABIASN0DBM_v_637p5m << 13)

Shifted mode v_637p5m for RAC_PATRIM0

Definition at line 2796 of file efr32bg21_rac.h .

#define RAC_PATRIM0_PATRIMPABIASP0DBM_DEFAULT ( _RAC_PATRIM0_PATRIMPABIASP0DBM_DEFAULT << 17)

Shifted mode DEFAULT for RAC_PATRIM0

Definition at line 2816 of file efr32bg21_rac.h .

#define RAC_PATRIM0_PATRIMPABIASP0DBM_v_450m ( _RAC_PATRIM0_PATRIMPABIASP0DBM_v_450m << 17)

Shifted mode v_450m for RAC_PATRIM0

Definition at line 2817 of file efr32bg21_rac.h .

#define RAC_PATRIM0_PATRIMPABIASP0DBM_v_462p5m ( _RAC_PATRIM0_PATRIMPABIASP0DBM_v_462p5m << 17)

Shifted mode v_462p5m for RAC_PATRIM0

Definition at line 2818 of file efr32bg21_rac.h .

#define RAC_PATRIM0_PATRIMPABIASP0DBM_v_475m ( _RAC_PATRIM0_PATRIMPABIASP0DBM_v_475m << 17)

Shifted mode v_475m for RAC_PATRIM0

Definition at line 2819 of file efr32bg21_rac.h .

#define RAC_PATRIM0_PATRIMPABIASP0DBM_v_487p5m ( _RAC_PATRIM0_PATRIMPABIASP0DBM_v_487p5m << 17)

Shifted mode v_487p5m for RAC_PATRIM0

Definition at line 2820 of file efr32bg21_rac.h .

#define RAC_PATRIM0_PATRIMPABIASP0DBM_v_500m ( _RAC_PATRIM0_PATRIMPABIASP0DBM_v_500m << 17)

Shifted mode v_500m for RAC_PATRIM0

Definition at line 2821 of file efr32bg21_rac.h .

#define RAC_PATRIM0_PATRIMPABIASP0DBM_v_512p5m ( _RAC_PATRIM0_PATRIMPABIASP0DBM_v_512p5m << 17)

Shifted mode v_512p5m for RAC_PATRIM0

Definition at line 2822 of file efr32bg21_rac.h .

#define RAC_PATRIM0_PATRIMPABIASP0DBM_v_525m ( _RAC_PATRIM0_PATRIMPABIASP0DBM_v_525m << 17)

Shifted mode v_525m for RAC_PATRIM0

Definition at line 2823 of file efr32bg21_rac.h .

#define RAC_PATRIM0_PATRIMPABIASP0DBM_v_537p5m ( _RAC_PATRIM0_PATRIMPABIASP0DBM_v_537p5m << 17)

Shifted mode v_537p5m for RAC_PATRIM0

Definition at line 2824 of file efr32bg21_rac.h .

#define RAC_PATRIM0_PATRIMPABIASP0DBM_v_550m ( _RAC_PATRIM0_PATRIMPABIASP0DBM_v_550m << 17)

Shifted mode v_550m for RAC_PATRIM0

Definition at line 2825 of file efr32bg21_rac.h .

#define RAC_PATRIM0_PATRIMPABIASP0DBM_v_562p5m ( _RAC_PATRIM0_PATRIMPABIASP0DBM_v_562p5m << 17)

Shifted mode v_562p5m for RAC_PATRIM0

Definition at line 2826 of file efr32bg21_rac.h .

#define RAC_PATRIM0_PATRIMPABIASP0DBM_v_575m ( _RAC_PATRIM0_PATRIMPABIASP0DBM_v_575m << 17)

Shifted mode v_575m for RAC_PATRIM0

Definition at line 2827 of file efr32bg21_rac.h .

#define RAC_PATRIM0_PATRIMPABIASP0DBM_v_587p5m ( _RAC_PATRIM0_PATRIMPABIASP0DBM_v_587p5m << 17)

Shifted mode v_587p5m for RAC_PATRIM0

Definition at line 2828 of file efr32bg21_rac.h .

#define RAC_PATRIM0_PATRIMPABIASP0DBM_v_600m ( _RAC_PATRIM0_PATRIMPABIASP0DBM_v_600m << 17)

Shifted mode v_600m for RAC_PATRIM0

Definition at line 2829 of file efr32bg21_rac.h .

#define RAC_PATRIM0_PATRIMPABIASP0DBM_v_612p5m ( _RAC_PATRIM0_PATRIMPABIASP0DBM_v_612p5m << 17)

Shifted mode v_612p5m for RAC_PATRIM0

Definition at line 2830 of file efr32bg21_rac.h .

#define RAC_PATRIM0_PATRIMPABIASP0DBM_v_625m ( _RAC_PATRIM0_PATRIMPABIASP0DBM_v_625m << 17)

Shifted mode v_625m for RAC_PATRIM0

Definition at line 2831 of file efr32bg21_rac.h .

#define RAC_PATRIM0_PATRIMPABIASP0DBM_v_637p5m ( _RAC_PATRIM0_PATRIMPABIASP0DBM_v_637p5m << 17)

Shifted mode v_637p5m for RAC_PATRIM0

Definition at line 2832 of file efr32bg21_rac.h .

#define RAC_PATRIM0_PATRIMPASLICE0DBM_DEFAULT ( _RAC_PATRIM0_PATRIMPASLICE0DBM_DEFAULT << 21)

Shifted mode DEFAULT for RAC_PATRIM0

Definition at line 2838 of file efr32bg21_rac.h .

#define RAC_PATRIM0_PATRIMPASLICE0DBM_on_slice_0 ( _RAC_PATRIM0_PATRIMPASLICE0DBM_on_slice_0 << 21)

Shifted mode on_slice_0 for RAC_PATRIM0

Definition at line 2839 of file efr32bg21_rac.h .

#define RAC_PATRIM0_PATRIMPASLICE0DBM_on_slice_63 ( _RAC_PATRIM0_PATRIMPASLICE0DBM_on_slice_63 << 21)

Shifted mode on_slice_63 for RAC_PATRIM0

Definition at line 2840 of file efr32bg21_rac.h .

#define RAC_PATRIM0_PATRIMVREF0DBM_DEFAULT ( _RAC_PATRIM0_PATRIMVREF0DBM_DEFAULT << 27)

Shifted mode DEFAULT for RAC_PATRIM0

Definition at line 2852 of file efr32bg21_rac.h .

#define RAC_PATRIM0_PATRIMVREF0DBM_v_900m ( _RAC_PATRIM0_PATRIMVREF0DBM_v_900m << 27)

Shifted mode v_900m for RAC_PATRIM0

Definition at line 2853 of file efr32bg21_rac.h .

#define RAC_PATRIM0_PATRIMVREF0DBM_v_912p5m ( _RAC_PATRIM0_PATRIMVREF0DBM_v_912p5m << 27)

Shifted mode v_912p5m for RAC_PATRIM0

Definition at line 2854 of file efr32bg21_rac.h .

#define RAC_PATRIM0_PATRIMVREF0DBM_v_925m ( _RAC_PATRIM0_PATRIMVREF0DBM_v_925m << 27)

Shifted mode v_925m for RAC_PATRIM0

Definition at line 2855 of file efr32bg21_rac.h .

#define RAC_PATRIM0_PATRIMVREF0DBM_v_937p5m ( _RAC_PATRIM0_PATRIMVREF0DBM_v_937p5m << 27)

Shifted mode v_937p5m for RAC_PATRIM0

Definition at line 2856 of file efr32bg21_rac.h .

#define RAC_PATRIM0_PATRIMVREF0DBM_v_950m ( _RAC_PATRIM0_PATRIMVREF0DBM_v_950m << 27)

Shifted mode v_950m for RAC_PATRIM0

Definition at line 2857 of file efr32bg21_rac.h .

#define RAC_PATRIM0_PATRIMVREF0DBM_v_962p5m ( _RAC_PATRIM0_PATRIMVREF0DBM_v_962p5m << 27)

Shifted mode v_962p5m for RAC_PATRIM0

Definition at line 2858 of file efr32bg21_rac.h .

#define RAC_PATRIM0_PATRIMVREF0DBM_v_975m ( _RAC_PATRIM0_PATRIMVREF0DBM_v_975m << 27)

Shifted mode v_975m for RAC_PATRIM0

Definition at line 2859 of file efr32bg21_rac.h .

#define RAC_PATRIM0_PATRIMVREF0DBM_v_987p5m ( _RAC_PATRIM0_PATRIMVREF0DBM_v_987p5m << 27)

Shifted mode v_987p5m for RAC_PATRIM0

Definition at line 2860 of file efr32bg21_rac.h .

#define RAC_PATRIM1_PATRIM10DBMDUTYCYN_DEFAULT ( _RAC_PATRIM1_PATRIM10DBMDUTYCYN_DEFAULT << 0)

Shifted mode DEFAULT for RAC_PATRIM1

Definition at line 2876 of file efr32bg21_rac.h .

#define RAC_PATRIM1_PATRIM10DBMDUTYCYN_na ( _RAC_PATRIM1_PATRIM10DBMDUTYCYN_na << 0)

Shifted mode na for RAC_PATRIM1

Definition at line 2884 of file efr32bg21_rac.h .

#define RAC_PATRIM1_PATRIM10DBMDUTYCYN_up_0pct ( _RAC_PATRIM1_PATRIM10DBMDUTYCYN_up_0pct << 0)

Shifted mode up_0pct for RAC_PATRIM1

Definition at line 2877 of file efr32bg21_rac.h .

#define RAC_PATRIM1_PATRIM10DBMDUTYCYN_up_1pct ( _RAC_PATRIM1_PATRIM10DBMDUTYCYN_up_1pct << 0)

Shifted mode up_1pct for RAC_PATRIM1

Definition at line 2878 of file efr32bg21_rac.h .

#define RAC_PATRIM1_PATRIM10DBMDUTYCYN_up_2pct ( _RAC_PATRIM1_PATRIM10DBMDUTYCYN_up_2pct << 0)

Shifted mode up_2pct for RAC_PATRIM1

Definition at line 2879 of file efr32bg21_rac.h .

#define RAC_PATRIM1_PATRIM10DBMDUTYCYN_up_3pct ( _RAC_PATRIM1_PATRIM10DBMDUTYCYN_up_3pct << 0)

Shifted mode up_3pct for RAC_PATRIM1

Definition at line 2880 of file efr32bg21_rac.h .

#define RAC_PATRIM1_PATRIM10DBMDUTYCYN_up_4pct ( _RAC_PATRIM1_PATRIM10DBMDUTYCYN_up_4pct << 0)

Shifted mode up_4pct for RAC_PATRIM1

Definition at line 2881 of file efr32bg21_rac.h .

#define RAC_PATRIM1_PATRIM10DBMDUTYCYN_up_5pct ( _RAC_PATRIM1_PATRIM10DBMDUTYCYN_up_5pct << 0)

Shifted mode up_5pct for RAC_PATRIM1

Definition at line 2882 of file efr32bg21_rac.h .

#define RAC_PATRIM1_PATRIM10DBMDUTYCYN_up_6pct ( _RAC_PATRIM1_PATRIM10DBMDUTYCYN_up_6pct << 0)

Shifted mode up_6pct for RAC_PATRIM1

Definition at line 2883 of file efr32bg21_rac.h .

#define RAC_PATRIM1_PATRIM10DBMDUTYCYP_DEFAULT ( _RAC_PATRIM1_PATRIM10DBMDUTYCYP_DEFAULT << 3)

Shifted mode DEFAULT for RAC_PATRIM1

Definition at line 2896 of file efr32bg21_rac.h .

#define RAC_PATRIM1_PATRIM10DBMDUTYCYP_dn_0pct ( _RAC_PATRIM1_PATRIM10DBMDUTYCYP_dn_0pct << 3)

Shifted mode dn_0pct for RAC_PATRIM1

Definition at line 2897 of file efr32bg21_rac.h .

#define RAC_PATRIM1_PATRIM10DBMDUTYCYP_dn_1pct ( _RAC_PATRIM1_PATRIM10DBMDUTYCYP_dn_1pct << 3)

Shifted mode dn_1pct for RAC_PATRIM1

Definition at line 2898 of file efr32bg21_rac.h .

#define RAC_PATRIM1_PATRIM10DBMDUTYCYP_dn_2pct ( _RAC_PATRIM1_PATRIM10DBMDUTYCYP_dn_2pct << 3)

Shifted mode dn_2pct for RAC_PATRIM1

Definition at line 2899 of file efr32bg21_rac.h .

#define RAC_PATRIM1_PATRIM10DBMDUTYCYP_dn_3pct ( _RAC_PATRIM1_PATRIM10DBMDUTYCYP_dn_3pct << 3)

Shifted mode dn_3pct for RAC_PATRIM1

Definition at line 2900 of file efr32bg21_rac.h .

#define RAC_PATRIM1_PATRIM10DBMDUTYCYP_dn_4pct ( _RAC_PATRIM1_PATRIM10DBMDUTYCYP_dn_4pct << 3)

Shifted mode dn_4pct for RAC_PATRIM1

Definition at line 2901 of file efr32bg21_rac.h .

#define RAC_PATRIM1_PATRIM10DBMDUTYCYP_dn_5pct ( _RAC_PATRIM1_PATRIM10DBMDUTYCYP_dn_5pct << 3)

Shifted mode dn_5pct for RAC_PATRIM1

Definition at line 2902 of file efr32bg21_rac.h .

#define RAC_PATRIM1_PATRIM10DBMDUTYCYP_dn_6pct ( _RAC_PATRIM1_PATRIM10DBMDUTYCYP_dn_6pct << 3)

Shifted mode dn_6pct for RAC_PATRIM1

Definition at line 2903 of file efr32bg21_rac.h .

#define RAC_PATRIM1_PATRIM10DBMDUTYCYP_na ( _RAC_PATRIM1_PATRIM10DBMDUTYCYP_na << 3)

Shifted mode na for RAC_PATRIM1

Definition at line 2904 of file efr32bg21_rac.h .

#define RAC_PATRIM1_PATRIM20DBMPREDRV_DEFAULT ( _RAC_PATRIM1_PATRIM20DBMPREDRV_DEFAULT << 6)

Shifted mode DEFAULT for RAC_PATRIM1

Definition at line 2916 of file efr32bg21_rac.h .

#define RAC_PATRIM1_PATRIM20DBMPREDRV_trise_110ps ( _RAC_PATRIM1_PATRIM20DBMPREDRV_trise_110ps << 6)

Shifted mode trise_110ps for RAC_PATRIM1

Definition at line 2920 of file efr32bg21_rac.h .

#define RAC_PATRIM1_PATRIM20DBMPREDRV_trise_117ps ( _RAC_PATRIM1_PATRIM20DBMPREDRV_trise_117ps << 6)

Shifted mode trise_117ps for RAC_PATRIM1

Definition at line 2919 of file efr32bg21_rac.h .

#define RAC_PATRIM1_PATRIM20DBMPREDRV_trise_127ps ( _RAC_PATRIM1_PATRIM20DBMPREDRV_trise_127ps << 6)

Shifted mode trise_127ps for RAC_PATRIM1

Definition at line 2918 of file efr32bg21_rac.h .

#define RAC_PATRIM1_PATRIM20DBMPREDRV_trise_137ps ( _RAC_PATRIM1_PATRIM20DBMPREDRV_trise_137ps << 6)

Shifted mode trise_137ps for RAC_PATRIM1

Definition at line 2917 of file efr32bg21_rac.h .

#define RAC_PATRIM1_PATRIM20DBMPREDRV_trise_70ps ( _RAC_PATRIM1_PATRIM20DBMPREDRV_trise_70ps << 6)

Shifted mode trise_70ps for RAC_PATRIM1

Definition at line 2924 of file efr32bg21_rac.h .

#define RAC_PATRIM1_PATRIM20DBMPREDRV_trise_71ps ( _RAC_PATRIM1_PATRIM20DBMPREDRV_trise_71ps << 6)

Shifted mode trise_71ps for RAC_PATRIM1

Definition at line 2923 of file efr32bg21_rac.h .

#define RAC_PATRIM1_PATRIM20DBMPREDRV_trise_73ps ( _RAC_PATRIM1_PATRIM20DBMPREDRV_trise_73ps << 6)

Shifted mode trise_73ps for RAC_PATRIM1

Definition at line 2922 of file efr32bg21_rac.h .

#define RAC_PATRIM1_PATRIM20DBMPREDRV_trise_75ps ( _RAC_PATRIM1_PATRIM20DBMPREDRV_trise_75ps << 6)

Shifted mode trise_75ps for RAC_PATRIM1

Definition at line 2921 of file efr32bg21_rac.h .

#define RAC_PATRIM1_PATRIMANTSWBIAS_DEFAULT ( _RAC_PATRIM1_PATRIMANTSWBIAS_DEFAULT << 9)

Shifted mode DEFAULT for RAC_PATRIM1

Definition at line 2932 of file efr32bg21_rac.h .

#define RAC_PATRIM1_PATRIMANTSWBIAS_vb_at_vdd ( _RAC_PATRIM1_PATRIMANTSWBIAS_vb_at_vdd << 9)

Shifted mode vb_at_vdd for RAC_PATRIM1

Definition at line 2933 of file efr32bg21_rac.h .

#define RAC_PATRIM1_PATRIMANTSWBIAS_vb_at_vdd_m1p2v ( _RAC_PATRIM1_PATRIMANTSWBIAS_vb_at_vdd_m1p2v << 9)

Shifted mode vb_at_vdd_m1p2v for RAC_PATRIM1

Definition at line 2935 of file efr32bg21_rac.h .

#define RAC_PATRIM1_PATRIMANTSWBIAS_vb_at_vdd_m1p8v ( _RAC_PATRIM1_PATRIMANTSWBIAS_vb_at_vdd_m1p8v << 9)

Shifted mode vb_at_vdd_m1p8v for RAC_PATRIM1

Definition at line 2936 of file efr32bg21_rac.h .

#define RAC_PATRIM1_PATRIMANTSWBIAS_vb_at_vdd_mp6v ( _RAC_PATRIM1_PATRIMANTSWBIAS_vb_at_vdd_mp6v << 9)

Shifted mode vb_at_vdd_mp6v for RAC_PATRIM1

Definition at line 2934 of file efr32bg21_rac.h .

#define RAC_PATRIM1_PATRIMBLEEDAUTOPREREG (0x1UL << 11)

PATRIMBLEEDAUTOPREREG

Definition at line 2937 of file efr32bg21_rac.h .

#define RAC_PATRIM1_PATRIMBLEEDAUTOPREREG_automatic ( _RAC_PATRIM1_PATRIMBLEEDAUTOPREREG_automatic << 11)

Shifted mode automatic for RAC_PATRIM1

Definition at line 2945 of file efr32bg21_rac.h .

#define RAC_PATRIM1_PATRIMBLEEDAUTOPREREG_DEFAULT ( _RAC_PATRIM1_PATRIMBLEEDAUTOPREREG_DEFAULT << 11)

Shifted mode DEFAULT for RAC_PATRIM1

Definition at line 2943 of file efr32bg21_rac.h .

#define RAC_PATRIM1_PATRIMBLEEDAUTOPREREG_not_automatic ( _RAC_PATRIM1_PATRIMBLEEDAUTOPREREG_not_automatic << 11)

Shifted mode not_automatic for RAC_PATRIM1

Definition at line 2944 of file efr32bg21_rac.h .

#define RAC_PATRIM1_PATRIMCAPPAOUTM_DEFAULT ( _RAC_PATRIM1_PATRIMCAPPAOUTM_DEFAULT << 12)

Shifted mode DEFAULT for RAC_PATRIM1

Definition at line 2949 of file efr32bg21_rac.h .

#define RAC_PATRIM1_PATRIMCAPPAOUTP_DEFAULT ( _RAC_PATRIM1_PATRIMCAPPAOUTP_DEFAULT << 16)

Shifted mode DEFAULT for RAC_PATRIM1

Definition at line 2953 of file efr32bg21_rac.h .

#define RAC_PATRIM1_PATRIMCMGAIN_DEFAULT ( _RAC_PATRIM1_PATRIMCMGAIN_DEFAULT << 20)

Shifted mode DEFAULT for RAC_PATRIM1

Definition at line 2957 of file efr32bg21_rac.h .

#define RAC_PATRIM1_PATRIMDLY0_DEFAULT ( _RAC_PATRIM1_PATRIMDLY0_DEFAULT << 22)

Shifted mode DEFAULT for RAC_PATRIM1

Definition at line 2969 of file efr32bg21_rac.h .

#define RAC_PATRIM1_PATRIMDLY0_tdly_0ps ( _RAC_PATRIM1_PATRIMDLY0_tdly_0ps << 22)

Shifted mode tdly_0ps for RAC_PATRIM1

Definition at line 2970 of file efr32bg21_rac.h .

#define RAC_PATRIM1_PATRIMDLY0_tdly_64ps ( _RAC_PATRIM1_PATRIMDLY0_tdly_64ps << 22)

Shifted mode tdly_64ps for RAC_PATRIM1

Definition at line 2971 of file efr32bg21_rac.h .

#define RAC_PATRIM1_PATRIMDLY0_tdly_65ps ( _RAC_PATRIM1_PATRIMDLY0_tdly_65ps << 22)

Shifted mode tdly_65ps for RAC_PATRIM1

Definition at line 2972 of file efr32bg21_rac.h .

#define RAC_PATRIM1_PATRIMDLY0_tdly_66ps ( _RAC_PATRIM1_PATRIMDLY0_tdly_66ps << 22)

Shifted mode tdly_66ps for RAC_PATRIM1

Definition at line 2973 of file efr32bg21_rac.h .

#define RAC_PATRIM1_PATRIMDLY0_tdly_68ps ( _RAC_PATRIM1_PATRIMDLY0_tdly_68ps << 22)

Shifted mode tdly_68ps for RAC_PATRIM1

Definition at line 2974 of file efr32bg21_rac.h .

#define RAC_PATRIM1_PATRIMDLY0_tdly_70ps ( _RAC_PATRIM1_PATRIMDLY0_tdly_70ps << 22)

Shifted mode tdly_70ps for RAC_PATRIM1

Definition at line 2975 of file efr32bg21_rac.h .

#define RAC_PATRIM1_PATRIMDLY0_tdly_75ps ( _RAC_PATRIM1_PATRIMDLY0_tdly_75ps << 22)

Shifted mode tdly_75ps for RAC_PATRIM1

Definition at line 2976 of file efr32bg21_rac.h .

#define RAC_PATRIM1_PATRIMDLY0_tdly_83ps ( _RAC_PATRIM1_PATRIMDLY0_tdly_83ps << 22)

Shifted mode tdly_83ps for RAC_PATRIM1

Definition at line 2977 of file efr32bg21_rac.h .

#define RAC_PATRIM1_PATRIMDLY1_DEFAULT ( _RAC_PATRIM1_PATRIMDLY1_DEFAULT << 25)

Shifted mode DEFAULT for RAC_PATRIM1

Definition at line 2989 of file efr32bg21_rac.h .

#define RAC_PATRIM1_PATRIMDLY1_tdly_0ps ( _RAC_PATRIM1_PATRIMDLY1_tdly_0ps << 25)

Shifted mode tdly_0ps for RAC_PATRIM1

Definition at line 2990 of file efr32bg21_rac.h .

#define RAC_PATRIM1_PATRIMDLY1_tdly_64ps ( _RAC_PATRIM1_PATRIMDLY1_tdly_64ps << 25)

Shifted mode tdly_64ps for RAC_PATRIM1

Definition at line 2991 of file efr32bg21_rac.h .

#define RAC_PATRIM1_PATRIMDLY1_tdly_65ps ( _RAC_PATRIM1_PATRIMDLY1_tdly_65ps << 25)

Shifted mode tdly_65ps for RAC_PATRIM1

Definition at line 2992 of file efr32bg21_rac.h .

#define RAC_PATRIM1_PATRIMDLY1_tdly_66ps ( _RAC_PATRIM1_PATRIMDLY1_tdly_66ps << 25)

Shifted mode tdly_66ps for RAC_PATRIM1

Definition at line 2993 of file efr32bg21_rac.h .

#define RAC_PATRIM1_PATRIMDLY1_tdly_68ps ( _RAC_PATRIM1_PATRIMDLY1_tdly_68ps << 25)

Shifted mode tdly_68ps for RAC_PATRIM1

Definition at line 2994 of file efr32bg21_rac.h .

#define RAC_PATRIM1_PATRIMDLY1_tdly_70ps ( _RAC_PATRIM1_PATRIMDLY1_tdly_70ps << 25)

Shifted mode tdly_70ps for RAC_PATRIM1

Definition at line 2995 of file efr32bg21_rac.h .

#define RAC_PATRIM1_PATRIMDLY1_tdly_75ps ( _RAC_PATRIM1_PATRIMDLY1_tdly_75ps << 25)

Shifted mode tdly_75ps for RAC_PATRIM1

Definition at line 2996 of file efr32bg21_rac.h .

#define RAC_PATRIM1_PATRIMDLY1_tdly_83ps ( _RAC_PATRIM1_PATRIMDLY1_tdly_83ps << 25)

Shifted mode tdly_83ps for RAC_PATRIM1

Definition at line 2997 of file efr32bg21_rac.h .

#define RAC_PATRIM1_PATRIMFBKATTPDRVLDO (0x1UL << 28)

PATRIMFBKATTPDRVLDO

Definition at line 2998 of file efr32bg21_rac.h .

#define RAC_PATRIM1_PATRIMFBKATTPDRVLDO_DEFAULT ( _RAC_PATRIM1_PATRIMFBKATTPDRVLDO_DEFAULT << 28)

Shifted mode DEFAULT for RAC_PATRIM1

Definition at line 3004 of file efr32bg21_rac.h .

#define RAC_PATRIM1_PATRIMFBKATTPDRVLDO_less_bw ( _RAC_PATRIM1_PATRIMFBKATTPDRVLDO_less_bw << 28)

Shifted mode less_bw for RAC_PATRIM1

Definition at line 3005 of file efr32bg21_rac.h .

#define RAC_PATRIM1_PATRIMFBKATTPDRVLDO_more_bw ( _RAC_PATRIM1_PATRIMFBKATTPDRVLDO_more_bw << 28)

Shifted mode more_bw for RAC_PATRIM1

Definition at line 3006 of file efr32bg21_rac.h .

#define RAC_PATRIM1_PATRIMIBIASMASTER_DEFAULT ( _RAC_PATRIM1_PATRIMIBIASMASTER_DEFAULT << 29)

Shifted mode DEFAULT for RAC_PATRIM1

Definition at line 3014 of file efr32bg21_rac.h .

#define RAC_PATRIM1_PATRIMIBIASMASTER_Ibias_is_45u ( _RAC_PATRIM1_PATRIMIBIASMASTER_Ibias_is_45u << 29)

Shifted mode Ibias_is_45u for RAC_PATRIM1

Definition at line 3015 of file efr32bg21_rac.h .

#define RAC_PATRIM1_PATRIMIBIASMASTER_Ibias_is_47p5u ( _RAC_PATRIM1_PATRIMIBIASMASTER_Ibias_is_47p5u << 29)

Shifted mode Ibias_is_47p5u for RAC_PATRIM1

Definition at line 3016 of file efr32bg21_rac.h .

#define RAC_PATRIM1_PATRIMIBIASMASTER_Ibias_is_50u ( _RAC_PATRIM1_PATRIMIBIASMASTER_Ibias_is_50u << 29)

Shifted mode Ibias_is_50u for RAC_PATRIM1

Definition at line 3017 of file efr32bg21_rac.h .

#define RAC_PATRIM1_PATRIMIBIASMASTER_Ibias_is_52p5u ( _RAC_PATRIM1_PATRIMIBIASMASTER_Ibias_is_52p5u << 29)

Shifted mode Ibias_is_52p5u for RAC_PATRIM1

Definition at line 3018 of file efr32bg21_rac.h .

#define RAC_PATRIM2_PATRIMLDOFBHVPDRVLDO_DEFAULT ( _RAC_PATRIM2_PATRIMLDOFBHVPDRVLDO_DEFAULT << 0)

Shifted mode DEFAULT for RAC_PATRIM2

Definition at line 3030 of file efr32bg21_rac.h .

#define RAC_PATRIM2_PATRIMLDOFBHVPDRVLDO_vreg_1p22 ( _RAC_PATRIM2_PATRIMLDOFBHVPDRVLDO_vreg_1p22 << 0)

Shifted mode vreg_1p22 for RAC_PATRIM2

Definition at line 3031 of file efr32bg21_rac.h .

#define RAC_PATRIM2_PATRIMLDOFBHVPDRVLDO_vreg_1p28 ( _RAC_PATRIM2_PATRIMLDOFBHVPDRVLDO_vreg_1p28 << 0)

Shifted mode vreg_1p28 for RAC_PATRIM2

Definition at line 3032 of file efr32bg21_rac.h .

#define RAC_PATRIM2_PATRIMLDOFBHVPDRVLDO_vreg_1p35 ( _RAC_PATRIM2_PATRIMLDOFBHVPDRVLDO_vreg_1p35 << 0)

Shifted mode vreg_1p35 for RAC_PATRIM2

Definition at line 3033 of file efr32bg21_rac.h .

#define RAC_PATRIM2_PATRIMLDOFBHVPDRVLDO_vreg_1p44 ( _RAC_PATRIM2_PATRIMLDOFBHVPDRVLDO_vreg_1p44 << 0)

Shifted mode vreg_1p44 for RAC_PATRIM2

Definition at line 3034 of file efr32bg21_rac.h .

#define RAC_PATRIM2_PATRIMLDOFBHVPREREG_DEFAULT ( _RAC_PATRIM2_PATRIMLDOFBHVPREREG_DEFAULT << 2)

Shifted mode DEFAULT for RAC_PATRIM2

Definition at line 3046 of file efr32bg21_rac.h .

#define RAC_PATRIM2_PATRIMLDOFBHVPREREG_vreg_1p678 ( _RAC_PATRIM2_PATRIMLDOFBHVPREREG_vreg_1p678 << 2)

Shifted mode vreg_1p678 for RAC_PATRIM2

Definition at line 3047 of file efr32bg21_rac.h .

#define RAC_PATRIM2_PATRIMLDOFBHVPREREG_vreg_1p735 ( _RAC_PATRIM2_PATRIMLDOFBHVPREREG_vreg_1p735 << 2)

Shifted mode vreg_1p735 for RAC_PATRIM2

Definition at line 3048 of file efr32bg21_rac.h .

#define RAC_PATRIM2_PATRIMLDOFBHVPREREG_vreg_1p801 ( _RAC_PATRIM2_PATRIMLDOFBHVPREREG_vreg_1p801 << 2)

Shifted mode vreg_1p801 for RAC_PATRIM2

Definition at line 3049 of file efr32bg21_rac.h .

#define RAC_PATRIM2_PATRIMLDOFBHVPREREG_vreg_1p875 ( _RAC_PATRIM2_PATRIMLDOFBHVPREREG_vreg_1p875 << 2)

Shifted mode vreg_1p875 for RAC_PATRIM2

Definition at line 3050 of file efr32bg21_rac.h .

#define RAC_PATRIM2_PATRIMLDOFBHVPREREG_vreg_3p00 ( _RAC_PATRIM2_PATRIMLDOFBHVPREREG_vreg_3p00 << 2)

Shifted mode vreg_3p00 for RAC_PATRIM2

Definition at line 3051 of file efr32bg21_rac.h .

#define RAC_PATRIM2_PATRIMLDOFBHVPREREG_vreg_3p14 ( _RAC_PATRIM2_PATRIMLDOFBHVPREREG_vreg_3p14 << 2)

Shifted mode vreg_3p14 for RAC_PATRIM2

Definition at line 3052 of file efr32bg21_rac.h .

#define RAC_PATRIM2_PATRIMLDOFBHVPREREG_vreg_3p3 ( _RAC_PATRIM2_PATRIMLDOFBHVPREREG_vreg_3p3 << 2)

Shifted mode vreg_3p3 for RAC_PATRIM2

Definition at line 3053 of file efr32bg21_rac.h .

#define RAC_PATRIM2_PATRIMLDOFBHVPREREG_vreg_3p477 ( _RAC_PATRIM2_PATRIMLDOFBHVPREREG_vreg_3p477 << 2)

Shifted mode vreg_3p477 for RAC_PATRIM2

Definition at line 3054 of file efr32bg21_rac.h .

#define RAC_PATRIM2_PATRIMLDOHVPDRVLDO_DEFAULT ( _RAC_PATRIM2_PATRIMLDOHVPDRVLDO_DEFAULT << 5)

Shifted mode DEFAULT for RAC_PATRIM2

Definition at line 3066 of file efr32bg21_rac.h .

#define RAC_PATRIM2_PATRIMLDOHVPDRVLDO_vref_0p675 ( _RAC_PATRIM2_PATRIMLDOHVPDRVLDO_vref_0p675 << 5)

Shifted mode vref_0p675 for RAC_PATRIM2

Definition at line 3067 of file efr32bg21_rac.h .

#define RAC_PATRIM2_PATRIMLDOHVPDRVLDO_vref_0p700 ( _RAC_PATRIM2_PATRIMLDOHVPDRVLDO_vref_0p700 << 5)

Shifted mode vref_0p700 for RAC_PATRIM2

Definition at line 3068 of file efr32bg21_rac.h .

#define RAC_PATRIM2_PATRIMLDOHVPDRVLDO_vref_0p725 ( _RAC_PATRIM2_PATRIMLDOHVPDRVLDO_vref_0p725 << 5)

Shifted mode vref_0p725 for RAC_PATRIM2

Definition at line 3069 of file efr32bg21_rac.h .

#define RAC_PATRIM2_PATRIMLDOHVPDRVLDO_vref_0p750 ( _RAC_PATRIM2_PATRIMLDOHVPDRVLDO_vref_0p750 << 5)

Shifted mode vref_0p750 for RAC_PATRIM2

Definition at line 3070 of file efr32bg21_rac.h .

#define RAC_PATRIM2_PATRIMLDOHVPDRVLDO_vref_0p775 ( _RAC_PATRIM2_PATRIMLDOHVPDRVLDO_vref_0p775 << 5)

Shifted mode vref_0p775 for RAC_PATRIM2

Definition at line 3071 of file efr32bg21_rac.h .

#define RAC_PATRIM2_PATRIMLDOHVPDRVLDO_vref_0p800 ( _RAC_PATRIM2_PATRIMLDOHVPDRVLDO_vref_0p800 << 5)

Shifted mode vref_0p800 for RAC_PATRIM2

Definition at line 3072 of file efr32bg21_rac.h .

#define RAC_PATRIM2_PATRIMLDOHVPDRVLDO_vref_0p825 ( _RAC_PATRIM2_PATRIMLDOHVPDRVLDO_vref_0p825 << 5)

Shifted mode vref_0p825 for RAC_PATRIM2

Definition at line 3073 of file efr32bg21_rac.h .

#define RAC_PATRIM2_PATRIMLDOHVPDRVLDO_vref_0p850 ( _RAC_PATRIM2_PATRIMLDOHVPDRVLDO_vref_0p850 << 5)

Shifted mode vref_0p850 for RAC_PATRIM2

Definition at line 3074 of file efr32bg21_rac.h .

#define RAC_PATRIM2_PATRIMLDOHVPREREG_DEFAULT ( _RAC_PATRIM2_PATRIMLDOHVPREREG_DEFAULT << 8)

Shifted mode DEFAULT for RAC_PATRIM2

Definition at line 3094 of file efr32bg21_rac.h .

#define RAC_PATRIM2_PATRIMLDOHVPREREG_vref_0p651 ( _RAC_PATRIM2_PATRIMLDOHVPREREG_vref_0p651 << 8)

Shifted mode vref_0p651 for RAC_PATRIM2

Definition at line 3095 of file efr32bg21_rac.h .

#define RAC_PATRIM2_PATRIMLDOHVPREREG_vref_0p663 ( _RAC_PATRIM2_PATRIMLDOHVPREREG_vref_0p663 << 8)

Shifted mode vref_0p663 for RAC_PATRIM2

Definition at line 3096 of file efr32bg21_rac.h .

#define RAC_PATRIM2_PATRIMLDOHVPREREG_vref_0p676 ( _RAC_PATRIM2_PATRIMLDOHVPREREG_vref_0p676 << 8)

Shifted mode vref_0p676 for RAC_PATRIM2

Definition at line 3097 of file efr32bg21_rac.h .

#define RAC_PATRIM2_PATRIMLDOHVPREREG_vref_0p688 ( _RAC_PATRIM2_PATRIMLDOHVPREREG_vref_0p688 << 8)

Shifted mode vref_0p688 for RAC_PATRIM2

Definition at line 3098 of file efr32bg21_rac.h .

#define RAC_PATRIM2_PATRIMLDOHVPREREG_vref_0p701 ( _RAC_PATRIM2_PATRIMLDOHVPREREG_vref_0p701 << 8)

Shifted mode vref_0p701 for RAC_PATRIM2

Definition at line 3099 of file efr32bg21_rac.h .

#define RAC_PATRIM2_PATRIMLDOHVPREREG_vref_0p713 ( _RAC_PATRIM2_PATRIMLDOHVPREREG_vref_0p713 << 8)

Shifted mode vref_0p713 for RAC_PATRIM2

Definition at line 3100 of file efr32bg21_rac.h .

#define RAC_PATRIM2_PATRIMLDOHVPREREG_vref_0p726 ( _RAC_PATRIM2_PATRIMLDOHVPREREG_vref_0p726 << 8)

Shifted mode vref_0p726 for RAC_PATRIM2

Definition at line 3101 of file efr32bg21_rac.h .

#define RAC_PATRIM2_PATRIMLDOHVPREREG_vref_0p738 ( _RAC_PATRIM2_PATRIMLDOHVPREREG_vref_0p738 << 8)

Shifted mode vref_0p738 for RAC_PATRIM2

Definition at line 3102 of file efr32bg21_rac.h .

#define RAC_PATRIM2_PATRIMLDOHVPREREG_vref_0p751 ( _RAC_PATRIM2_PATRIMLDOHVPREREG_vref_0p751 << 8)

Shifted mode vref_0p751 for RAC_PATRIM2

Definition at line 3103 of file efr32bg21_rac.h .

#define RAC_PATRIM2_PATRIMLDOHVPREREG_vref_0p763 ( _RAC_PATRIM2_PATRIMLDOHVPREREG_vref_0p763 << 8)

Shifted mode vref_0p763 for RAC_PATRIM2

Definition at line 3104 of file efr32bg21_rac.h .

#define RAC_PATRIM2_PATRIMLDOHVPREREG_vref_0p776 ( _RAC_PATRIM2_PATRIMLDOHVPREREG_vref_0p776 << 8)

Shifted mode vref_0p776 for RAC_PATRIM2

Definition at line 3105 of file efr32bg21_rac.h .

#define RAC_PATRIM2_PATRIMLDOHVPREREG_vref_0p788 ( _RAC_PATRIM2_PATRIMLDOHVPREREG_vref_0p788 << 8)

Shifted mode vref_0p788 for RAC_PATRIM2

Definition at line 3106 of file efr32bg21_rac.h .

#define RAC_PATRIM2_PATRIMLDOHVPREREG_vref_0p801 ( _RAC_PATRIM2_PATRIMLDOHVPREREG_vref_0p801 << 8)

Shifted mode vref_0p801 for RAC_PATRIM2

Definition at line 3107 of file efr32bg21_rac.h .

#define RAC_PATRIM2_PATRIMLDOHVPREREG_vref_0p813 ( _RAC_PATRIM2_PATRIMLDOHVPREREG_vref_0p813 << 8)

Shifted mode vref_0p813 for RAC_PATRIM2

Definition at line 3108 of file efr32bg21_rac.h .

#define RAC_PATRIM2_PATRIMLDOHVPREREG_vref_0p826 ( _RAC_PATRIM2_PATRIMLDOHVPREREG_vref_0p826 << 8)

Shifted mode vref_0p826 for RAC_PATRIM2

Definition at line 3109 of file efr32bg21_rac.h .

#define RAC_PATRIM2_PATRIMLDOHVPREREG_vref_0p838 ( _RAC_PATRIM2_PATRIMLDOHVPREREG_vref_0p838 << 8)

Shifted mode vref_0p838 for RAC_PATRIM2

Definition at line 3110 of file efr32bg21_rac.h .

#define RAC_PATRIM2_PATRIMLDOPSRPDRVLDO (0x1UL << 12)

PATRIMLDOPSRPDRVLDO

Definition at line 3111 of file efr32bg21_rac.h .

#define RAC_PATRIM2_PATRIMLDOPSRPDRVLDO_DEFAULT ( _RAC_PATRIM2_PATRIMLDOPSRPDRVLDO_DEFAULT << 12)

Shifted mode DEFAULT for RAC_PATRIM2

Definition at line 3117 of file efr32bg21_rac.h .

#define RAC_PATRIM2_PATRIMLDOPSRPDRVLDO_high_psr ( _RAC_PATRIM2_PATRIMLDOPSRPDRVLDO_high_psr << 12)

Shifted mode high_psr for RAC_PATRIM2

Definition at line 3119 of file efr32bg21_rac.h .

#define RAC_PATRIM2_PATRIMLDOPSRPDRVLDO_low_psr ( _RAC_PATRIM2_PATRIMLDOPSRPDRVLDO_low_psr << 12)

Shifted mode low_psr for RAC_PATRIM2

Definition at line 3118 of file efr32bg21_rac.h .

#define RAC_PATRIM2_PATRIMLDOPSRPREREG (0x1UL << 13)

PATRIMLDOPSRPREREG

Definition at line 3120 of file efr32bg21_rac.h .

#define RAC_PATRIM2_PATRIMLDOPSRPREREG_DEFAULT ( _RAC_PATRIM2_PATRIMLDOPSRPREREG_DEFAULT << 13)

Shifted mode DEFAULT for RAC_PATRIM2

Definition at line 3126 of file efr32bg21_rac.h .

#define RAC_PATRIM2_PATRIMLDOPSRPREREG_high_psr ( _RAC_PATRIM2_PATRIMLDOPSRPREREG_high_psr << 13)

Shifted mode high_psr for RAC_PATRIM2

Definition at line 3128 of file efr32bg21_rac.h .

#define RAC_PATRIM2_PATRIMLDOPSRPREREG_low_psr ( _RAC_PATRIM2_PATRIMLDOPSRPREREG_low_psr << 13)

Shifted mode low_psr for RAC_PATRIM2

Definition at line 3127 of file efr32bg21_rac.h .

#define RAC_PATRIM2_PATRIMLDOSLICESPDRVLDO_DEFAULT ( _RAC_PATRIM2_PATRIMLDOSLICESPDRVLDO_DEFAULT << 14)

Shifted mode DEFAULT for RAC_PATRIM2

Definition at line 3136 of file efr32bg21_rac.h .

#define RAC_PATRIM2_PATRIMLDOSLICESPDRVLDO_iload_15mA ( _RAC_PATRIM2_PATRIMLDOSLICESPDRVLDO_iload_15mA << 14)

Shifted mode iload_15mA for RAC_PATRIM2

Definition at line 3138 of file efr32bg21_rac.h .

#define RAC_PATRIM2_PATRIMLDOSLICESPDRVLDO_iload_22p5mA ( _RAC_PATRIM2_PATRIMLDOSLICESPDRVLDO_iload_22p5mA << 14)

Shifted mode iload_22p5mA for RAC_PATRIM2

Definition at line 3139 of file efr32bg21_rac.h .

#define RAC_PATRIM2_PATRIMLDOSLICESPDRVLDO_iload_30mA ( _RAC_PATRIM2_PATRIMLDOSLICESPDRVLDO_iload_30mA << 14)

Shifted mode iload_30mA for RAC_PATRIM2

Definition at line 3140 of file efr32bg21_rac.h .

#define RAC_PATRIM2_PATRIMLDOSLICESPDRVLDO_iload_7p5mA ( _RAC_PATRIM2_PATRIMLDOSLICESPDRVLDO_iload_7p5mA << 14)

Shifted mode iload_7p5mA for RAC_PATRIM2

Definition at line 3137 of file efr32bg21_rac.h .

#define RAC_PATRIM2_PATRIMLDOSLICESPREREG_DEFAULT ( _RAC_PATRIM2_PATRIMLDOSLICESPREREG_DEFAULT << 16)

Shifted mode DEFAULT for RAC_PATRIM2

Definition at line 3148 of file efr32bg21_rac.h .

#define RAC_PATRIM2_PATRIMLDOSLICESPREREG_spare1 ( _RAC_PATRIM2_PATRIMLDOSLICESPREREG_spare1 << 16)

Shifted mode spare1 for RAC_PATRIM2

Definition at line 3149 of file efr32bg21_rac.h .

#define RAC_PATRIM2_PATRIMLDOSLICESPREREG_spare2 ( _RAC_PATRIM2_PATRIMLDOSLICESPREREG_spare2 << 16)

Shifted mode spare2 for RAC_PATRIM2

Definition at line 3150 of file efr32bg21_rac.h .

#define RAC_PATRIM2_PATRIMLDOSLICESPREREG_spare3 ( _RAC_PATRIM2_PATRIMLDOSLICESPREREG_spare3 << 16)

Shifted mode spare3 for RAC_PATRIM2

Definition at line 3151 of file efr32bg21_rac.h .

#define RAC_PATRIM2_PATRIMLDOSLICESPREREG_spare4 ( _RAC_PATRIM2_PATRIMLDOSLICESPREREG_spare4 << 16)

Shifted mode spare4 for RAC_PATRIM2

Definition at line 3152 of file efr32bg21_rac.h .

#define RAC_PATRIM2_PATRIMNBIAS_DEFAULT ( _RAC_PATRIM2_PATRIMNBIAS_DEFAULT << 19)

Shifted mode DEFAULT for RAC_PATRIM2

Definition at line 3181 of file efr32bg21_rac.h .

#define RAC_PATRIM2_PATRIMNBIAS_vnbias_default ( _RAC_PATRIM2_PATRIMNBIAS_vnbias_default << 19)

Shifted mode vnbias_default for RAC_PATRIM2

Definition at line 3190 of file efr32bg21_rac.h .

#define RAC_PATRIM2_PATRIMNBIAS_vnbias_dn104mv ( _RAC_PATRIM2_PATRIMNBIAS_vnbias_dn104mv << 19)

Shifted mode vnbias_dn104mv for RAC_PATRIM2

Definition at line 3182 of file efr32bg21_rac.h .

#define RAC_PATRIM2_PATRIMNBIAS_vnbias_dn13mv ( _RAC_PATRIM2_PATRIMNBIAS_vnbias_dn13mv << 19)

Shifted mode vnbias_dn13mv for RAC_PATRIM2

Definition at line 3189 of file efr32bg21_rac.h .

#define RAC_PATRIM2_PATRIMNBIAS_vnbias_dn26mv ( _RAC_PATRIM2_PATRIMNBIAS_vnbias_dn26mv << 19)

Shifted mode vnbias_dn26mv for RAC_PATRIM2

Definition at line 3188 of file efr32bg21_rac.h .

#define RAC_PATRIM2_PATRIMNBIAS_vnbias_dn39mv ( _RAC_PATRIM2_PATRIMNBIAS_vnbias_dn39mv << 19)

Shifted mode vnbias_dn39mv for RAC_PATRIM2

Definition at line 3187 of file efr32bg21_rac.h .

#define RAC_PATRIM2_PATRIMNBIAS_vnbias_dn52mv ( _RAC_PATRIM2_PATRIMNBIAS_vnbias_dn52mv << 19)

Shifted mode vnbias_dn52mv for RAC_PATRIM2

Definition at line 3186 of file efr32bg21_rac.h .

#define RAC_PATRIM2_PATRIMNBIAS_vnbias_dn65mv ( _RAC_PATRIM2_PATRIMNBIAS_vnbias_dn65mv << 19)

Shifted mode vnbias_dn65mv for RAC_PATRIM2

Definition at line 3185 of file efr32bg21_rac.h .

#define RAC_PATRIM2_PATRIMNBIAS_vnbias_dn78mv ( _RAC_PATRIM2_PATRIMNBIAS_vnbias_dn78mv << 19)

Shifted mode vnbias_dn78mv for RAC_PATRIM2

Definition at line 3184 of file efr32bg21_rac.h .

#define RAC_PATRIM2_PATRIMNBIAS_vnbias_dn91mv ( _RAC_PATRIM2_PATRIMNBIAS_vnbias_dn91mv << 19)

Shifted mode vnbias_dn91mv for RAC_PATRIM2

Definition at line 3183 of file efr32bg21_rac.h .

#define RAC_PATRIM2_PATRIMNBIAS_vnbias_up13mv ( _RAC_PATRIM2_PATRIMNBIAS_vnbias_up13mv << 19)

Shifted mode vnbias_up13mv for RAC_PATRIM2

Definition at line 3191 of file efr32bg21_rac.h .

#define RAC_PATRIM2_PATRIMNBIAS_vnbias_up26mv ( _RAC_PATRIM2_PATRIMNBIAS_vnbias_up26mv << 19)

Shifted mode vnbias_up26mv for RAC_PATRIM2

Definition at line 3192 of file efr32bg21_rac.h .

#define RAC_PATRIM2_PATRIMNBIAS_vnbias_up39mv ( _RAC_PATRIM2_PATRIMNBIAS_vnbias_up39mv << 19)

Shifted mode vnbias_up39mv for RAC_PATRIM2

Definition at line 3193 of file efr32bg21_rac.h .

#define RAC_PATRIM2_PATRIMNBIAS_vnbias_up52mv ( _RAC_PATRIM2_PATRIMNBIAS_vnbias_up52mv << 19)

Shifted mode vnbias_up52mv for RAC_PATRIM2

Definition at line 3194 of file efr32bg21_rac.h .

#define RAC_PATRIM2_PATRIMNBIAS_vnbias_up65mv ( _RAC_PATRIM2_PATRIMNBIAS_vnbias_up65mv << 19)

Shifted mode vnbias_up65mv for RAC_PATRIM2

Definition at line 3195 of file efr32bg21_rac.h .

#define RAC_PATRIM2_PATRIMNBIAS_vnbias_up78mv ( _RAC_PATRIM2_PATRIMNBIAS_vnbias_up78mv << 19)

Shifted mode vnbias_up78mv for RAC_PATRIM2

Definition at line 3196 of file efr32bg21_rac.h .

#define RAC_PATRIM2_PATRIMNBIAS_vnbias_up91mv ( _RAC_PATRIM2_PATRIMNBIAS_vnbias_up91mv << 19)

Shifted mode vnbias_up91mv for RAC_PATRIM2

Definition at line 3197 of file efr32bg21_rac.h .

#define RAC_PATRIM2_PATRIMNCASC_DEFAULT ( _RAC_PATRIM2_PATRIMNCASC_DEFAULT << 23)

Shifted mode DEFAULT for RAC_PATRIM2

Definition at line 3205 of file efr32bg21_rac.h .

#define RAC_PATRIM2_PATRIMNCASC_ncbias_default ( _RAC_PATRIM2_PATRIMNCASC_ncbias_default << 23)

Shifted mode ncbias_default for RAC_PATRIM2

Definition at line 3207 of file efr32bg21_rac.h .

#define RAC_PATRIM2_PATRIMNCASC_ncbias_m50mv ( _RAC_PATRIM2_PATRIMNCASC_ncbias_m50mv << 23)

Shifted mode ncbias_m50mv for RAC_PATRIM2

Definition at line 3206 of file efr32bg21_rac.h .

#define RAC_PATRIM2_PATRIMNCASC_ncbias_p100mv ( _RAC_PATRIM2_PATRIMNCASC_ncbias_p100mv << 23)

Shifted mode ncbias_p100mv for RAC_PATRIM2

Definition at line 3209 of file efr32bg21_rac.h .

#define RAC_PATRIM2_PATRIMNCASC_ncbias_p50mv ( _RAC_PATRIM2_PATRIMNCASC_ncbias_p50mv << 23)

Shifted mode ncbias_p50mv for RAC_PATRIM2

Definition at line 3208 of file efr32bg21_rac.h .

#define RAC_PATRIM2_PATRIMPADACGLITCH (0x1UL << 18)

PATRIMPADACGLITCH

Definition at line 3153 of file efr32bg21_rac.h .

#define RAC_PATRIM2_PATRIMPADACGLITCH_DEFAULT ( _RAC_PATRIM2_PATRIMPADACGLITCH_DEFAULT << 18)

Shifted mode DEFAULT for RAC_PATRIM2

Definition at line 3159 of file efr32bg21_rac.h .

#define RAC_PATRIM2_PATRIMPADACGLITCH_larger_glitch ( _RAC_PATRIM2_PATRIMPADACGLITCH_larger_glitch << 18)

Shifted mode larger_glitch for RAC_PATRIM2

Definition at line 3160 of file efr32bg21_rac.h .

#define RAC_PATRIM2_PATRIMPADACGLITCH_smaller_glitch ( _RAC_PATRIM2_PATRIMPADACGLITCH_smaller_glitch << 18)

Shifted mode smaller_glitch for RAC_PATRIM2

Definition at line 3161 of file efr32bg21_rac.h .

#define RAC_PATRIM2_PATRIMPBIAS_DEFAULT ( _RAC_PATRIM2_PATRIMPBIAS_DEFAULT << 25)

Shifted mode DEFAULT for RAC_PATRIM2

Definition at line 3229 of file efr32bg21_rac.h .

#define RAC_PATRIM2_PATRIMPBIAS_vpbias_default ( _RAC_PATRIM2_PATRIMPBIAS_vpbias_default << 25)

Shifted mode vpbias_default for RAC_PATRIM2

Definition at line 3238 of file efr32bg21_rac.h .

#define RAC_PATRIM2_PATRIMPBIAS_vpbias_dn13mv ( _RAC_PATRIM2_PATRIMPBIAS_vpbias_dn13mv << 25)

Shifted mode vpbias_dn13mv for RAC_PATRIM2

Definition at line 3239 of file efr32bg21_rac.h .

#define RAC_PATRIM2_PATRIMPBIAS_vpbias_dn26mv ( _RAC_PATRIM2_PATRIMPBIAS_vpbias_dn26mv << 25)

Shifted mode vpbias_dn26mv for RAC_PATRIM2

Definition at line 3240 of file efr32bg21_rac.h .

#define RAC_PATRIM2_PATRIMPBIAS_vpbias_dn38mv ( _RAC_PATRIM2_PATRIMPBIAS_vpbias_dn38mv << 25)

Shifted mode vpbias_dn38mv for RAC_PATRIM2

Definition at line 3241 of file efr32bg21_rac.h .

#define RAC_PATRIM2_PATRIMPBIAS_vpbias_dn52mv ( _RAC_PATRIM2_PATRIMPBIAS_vpbias_dn52mv << 25)

Shifted mode vpbias_dn52mv for RAC_PATRIM2

Definition at line 3242 of file efr32bg21_rac.h .

#define RAC_PATRIM2_PATRIMPBIAS_vpbias_dn65mv ( _RAC_PATRIM2_PATRIMPBIAS_vpbias_dn65mv << 25)

Shifted mode vpbias_dn65mv for RAC_PATRIM2

Definition at line 3243 of file efr32bg21_rac.h .

#define RAC_PATRIM2_PATRIMPBIAS_vpbias_dn78mv ( _RAC_PATRIM2_PATRIMPBIAS_vpbias_dn78mv << 25)

Shifted mode vpbias_dn78mv for RAC_PATRIM2

Definition at line 3244 of file efr32bg21_rac.h .

#define RAC_PATRIM2_PATRIMPBIAS_vpbias_dn91mv ( _RAC_PATRIM2_PATRIMPBIAS_vpbias_dn91mv << 25)

Shifted mode vpbias_dn91mv for RAC_PATRIM2

Definition at line 3245 of file efr32bg21_rac.h .

#define RAC_PATRIM2_PATRIMPBIAS_vpbias_up104mv ( _RAC_PATRIM2_PATRIMPBIAS_vpbias_up104mv << 25)

Shifted mode vpbias_up104mv for RAC_PATRIM2

Definition at line 3230 of file efr32bg21_rac.h .

#define RAC_PATRIM2_PATRIMPBIAS_vpbias_up13mv ( _RAC_PATRIM2_PATRIMPBIAS_vpbias_up13mv << 25)

Shifted mode vpbias_up13mv for RAC_PATRIM2

Definition at line 3237 of file efr32bg21_rac.h .

#define RAC_PATRIM2_PATRIMPBIAS_vpbias_up26mv ( _RAC_PATRIM2_PATRIMPBIAS_vpbias_up26mv << 25)

Shifted mode vpbias_up26mv for RAC_PATRIM2

Definition at line 3236 of file efr32bg21_rac.h .

#define RAC_PATRIM2_PATRIMPBIAS_vpbias_up39mv ( _RAC_PATRIM2_PATRIMPBIAS_vpbias_up39mv << 25)

Shifted mode vpbias_up39mv for RAC_PATRIM2

Definition at line 3235 of file efr32bg21_rac.h .

#define RAC_PATRIM2_PATRIMPBIAS_vpbias_up52mv ( _RAC_PATRIM2_PATRIMPBIAS_vpbias_up52mv << 25)

Shifted mode vpbias_up52mv for RAC_PATRIM2

Definition at line 3234 of file efr32bg21_rac.h .

#define RAC_PATRIM2_PATRIMPBIAS_vpbias_up65mv ( _RAC_PATRIM2_PATRIMPBIAS_vpbias_up65mv << 25)

Shifted mode vpbias_up65mv for RAC_PATRIM2

Definition at line 3233 of file efr32bg21_rac.h .

#define RAC_PATRIM2_PATRIMPBIAS_vpbias_up78mv ( _RAC_PATRIM2_PATRIMPBIAS_vpbias_up78mv << 25)

Shifted mode vpbias_up78mv for RAC_PATRIM2

Definition at line 3232 of file efr32bg21_rac.h .

#define RAC_PATRIM2_PATRIMPBIAS_vpbias_up91mv ( _RAC_PATRIM2_PATRIMPBIAS_vpbias_up91mv << 25)

Shifted mode vpbias_up91mv for RAC_PATRIM2

Definition at line 3231 of file efr32bg21_rac.h .

#define RAC_PATRIM2_PATRIMPCASC_DEFAULT ( _RAC_PATRIM2_PATRIMPCASC_DEFAULT << 29)

Shifted mode DEFAULT for RAC_PATRIM2

Definition at line 3253 of file efr32bg21_rac.h .

#define RAC_PATRIM2_PATRIMPCASC_pcbias_default ( _RAC_PATRIM2_PATRIMPCASC_pcbias_default << 29)

Shifted mode pcbias_default for RAC_PATRIM2

Definition at line 3255 of file efr32bg21_rac.h .

#define RAC_PATRIM2_PATRIMPCASC_pcbias_m100mv ( _RAC_PATRIM2_PATRIMPCASC_pcbias_m100mv << 29)

Shifted mode pcbias_m100mv for RAC_PATRIM2

Definition at line 3257 of file efr32bg21_rac.h .

#define RAC_PATRIM2_PATRIMPCASC_pcbias_m50mv ( _RAC_PATRIM2_PATRIMPCASC_pcbias_m50mv << 29)

Shifted mode pcbias_m50mv for RAC_PATRIM2

Definition at line 3256 of file efr32bg21_rac.h .

#define RAC_PATRIM2_PATRIMPCASC_pcbias_p50mv ( _RAC_PATRIM2_PATRIMPCASC_pcbias_p50mv << 29)

Shifted mode pcbias_p50mv for RAC_PATRIM2

Definition at line 3254 of file efr32bg21_rac.h .

#define RAC_PGACAL_PGAOFFNCALI_DEFAULT ( _RAC_PGACAL_PGAOFFNCALI_DEFAULT << 0)

Shifted mode DEFAULT for RAC_PGACAL

Definition at line 3473 of file efr32bg21_rac.h .

#define RAC_PGACAL_PGAOFFNCALI_offset_m_300mv ( _RAC_PGACAL_PGAOFFNCALI_offset_m_300mv << 0)

Shifted mode offset_m_300mv for RAC_PGACAL

Definition at line 3474 of file efr32bg21_rac.h .

#define RAC_PGACAL_PGAOFFNCALI_offset_p_300mv ( _RAC_PGACAL_PGAOFFNCALI_offset_p_300mv << 0)

Shifted mode offset_p_300mv for RAC_PGACAL

Definition at line 3475 of file efr32bg21_rac.h .

#define RAC_PGACAL_PGAOFFNCALQ_DEFAULT ( _RAC_PGACAL_PGAOFFNCALQ_DEFAULT << 8)

Shifted mode DEFAULT for RAC_PGACAL

Definition at line 3481 of file efr32bg21_rac.h .

#define RAC_PGACAL_PGAOFFNCALQ_offset_m_300mv ( _RAC_PGACAL_PGAOFFNCALQ_offset_m_300mv << 8)

Shifted mode offset_m_300mv for RAC_PGACAL

Definition at line 3482 of file efr32bg21_rac.h .

#define RAC_PGACAL_PGAOFFNCALQ_offset_p_300mv ( _RAC_PGACAL_PGAOFFNCALQ_offset_p_300mv << 8)

Shifted mode offset_p_300mv for RAC_PGACAL

Definition at line 3483 of file efr32bg21_rac.h .

#define RAC_PGACAL_PGAOFFPCALI_DEFAULT ( _RAC_PGACAL_PGAOFFPCALI_DEFAULT << 16)

Shifted mode DEFAULT for RAC_PGACAL

Definition at line 3489 of file efr32bg21_rac.h .

#define RAC_PGACAL_PGAOFFPCALI_offset_m_300mv ( _RAC_PGACAL_PGAOFFPCALI_offset_m_300mv << 16)

Shifted mode offset_m_300mv for RAC_PGACAL

Definition at line 3490 of file efr32bg21_rac.h .

#define RAC_PGACAL_PGAOFFPCALI_offset_p_300mv ( _RAC_PGACAL_PGAOFFPCALI_offset_p_300mv << 16)

Shifted mode offset_p_300mv for RAC_PGACAL

Definition at line 3491 of file efr32bg21_rac.h .

#define RAC_PGACAL_PGAOFFPCALQ_DEFAULT ( _RAC_PGACAL_PGAOFFPCALQ_DEFAULT << 24)

Shifted mode DEFAULT for RAC_PGACAL

Definition at line 3497 of file efr32bg21_rac.h .

#define RAC_PGACAL_PGAOFFPCALQ_offset_m_300mv ( _RAC_PGACAL_PGAOFFPCALQ_offset_m_300mv << 24)

Shifted mode offset_m_300mv for RAC_PGACAL

Definition at line 3498 of file efr32bg21_rac.h .

#define RAC_PGACAL_PGAOFFPCALQ_offset_p_300mv ( _RAC_PGACAL_PGAOFFPCALQ_offset_p_300mv << 24)

Shifted mode offset_p_300mv for RAC_PGACAL

Definition at line 3499 of file efr32bg21_rac.h .

#define RAC_PGACTRL_LNAMIXRFPKDTHRESHSEL_DEFAULT ( _RAC_PGACTRL_LNAMIXRFPKDTHRESHSEL_DEFAULT << 24)

Shifted mode DEFAULT for RAC_PGACTRL

Definition at line 3682 of file efr32bg21_rac.h .

#define RAC_PGACTRL_PGABWMODE_bw_1p25MHz ( _RAC_PGACTRL_PGABWMODE_bw_1p25MHz << 0)

Shifted mode bw_1p25MHz for RAC_PGACTRL

Definition at line 3515 of file efr32bg21_rac.h .

#define RAC_PGACTRL_PGABWMODE_bw_1p67MHz ( _RAC_PGACTRL_PGABWMODE_bw_1p67MHz << 0)

Shifted mode bw_1p67MHz for RAC_PGACTRL

Definition at line 3514 of file efr32bg21_rac.h .

#define RAC_PGACTRL_PGABWMODE_bw_2p5MHz ( _RAC_PGACTRL_PGABWMODE_bw_2p5MHz << 0)

Shifted mode bw_2p5MHz for RAC_PGACTRL

Definition at line 3513 of file efr32bg21_rac.h .

#define RAC_PGACTRL_PGABWMODE_bw_5MHz ( _RAC_PGACTRL_PGABWMODE_bw_5MHz << 0)

Shifted mode bw_5MHz for RAC_PGACTRL

Definition at line 3512 of file efr32bg21_rac.h .

#define RAC_PGACTRL_PGABWMODE_DEFAULT ( _RAC_PGACTRL_PGABWMODE_DEFAULT << 0)

Shifted mode DEFAULT for RAC_PGACTRL

Definition at line 3511 of file efr32bg21_rac.h .

#define RAC_PGACTRL_PGAENBIAS (0x1UL << 2)

PGAENBIAS

Definition at line 3516 of file efr32bg21_rac.h .

#define RAC_PGACTRL_PGAENBIAS_bias_disable ( _RAC_PGACTRL_PGAENBIAS_bias_disable << 2)

Shifted mode bias_disable for RAC_PGACTRL

Definition at line 3523 of file efr32bg21_rac.h .

#define RAC_PGACTRL_PGAENBIAS_bias_enable ( _RAC_PGACTRL_PGAENBIAS_bias_enable << 2)

Shifted mode bias_enable for RAC_PGACTRL

Definition at line 3524 of file efr32bg21_rac.h .

#define RAC_PGACTRL_PGAENBIAS_DEFAULT ( _RAC_PGACTRL_PGAENBIAS_DEFAULT << 2)

Shifted mode DEFAULT for RAC_PGACTRL

Definition at line 3522 of file efr32bg21_rac.h .

#define RAC_PGACTRL_PGAENGHZ (0x1UL << 3)

PGAENGHZ

Definition at line 3525 of file efr32bg21_rac.h .

#define RAC_PGACTRL_PGAENGHZ_DEFAULT ( _RAC_PGACTRL_PGAENGHZ_DEFAULT << 3)

Shifted mode DEFAULT for RAC_PGACTRL

Definition at line 3531 of file efr32bg21_rac.h .

#define RAC_PGACTRL_PGAENGHZ_ghz_disable ( _RAC_PGACTRL_PGAENGHZ_ghz_disable << 3)

Shifted mode ghz_disable for RAC_PGACTRL

Definition at line 3532 of file efr32bg21_rac.h .

#define RAC_PGACTRL_PGAENGHZ_ghz_enable ( _RAC_PGACTRL_PGAENGHZ_ghz_enable << 3)

Shifted mode ghz_enable for RAC_PGACTRL

Definition at line 3533 of file efr32bg21_rac.h .

#define RAC_PGACTRL_PGAENHYST (0x1UL << 4)

PGAENHYST

Definition at line 3534 of file efr32bg21_rac.h .

#define RAC_PGACTRL_PGAENHYST_DEFAULT ( _RAC_PGACTRL_PGAENHYST_DEFAULT << 4)

Shifted mode DEFAULT for RAC_PGACTRL

Definition at line 3540 of file efr32bg21_rac.h .

#define RAC_PGACTRL_PGAENHYST_pkd_hyst_disable ( _RAC_PGACTRL_PGAENHYST_pkd_hyst_disable << 4)

Shifted mode pkd_hyst_disable for RAC_PGACTRL

Definition at line 3541 of file efr32bg21_rac.h .

#define RAC_PGACTRL_PGAENHYST_pkd_hyst_enable ( _RAC_PGACTRL_PGAENHYST_pkd_hyst_enable << 4)

Shifted mode pkd_hyst_enable for RAC_PGACTRL

Definition at line 3542 of file efr32bg21_rac.h .

#define RAC_PGACTRL_PGAENLATCHI (0x1UL << 5)

PGAENLATCHI

Definition at line 3543 of file efr32bg21_rac.h .

#define RAC_PGACTRL_PGAENLATCHI_DEFAULT ( _RAC_PGACTRL_PGAENLATCHI_DEFAULT << 5)

Shifted mode DEFAULT for RAC_PGACTRL

Definition at line 3549 of file efr32bg21_rac.h .

#define RAC_PGACTRL_PGAENLATCHI_pkd_latch_i_disable ( _RAC_PGACTRL_PGAENLATCHI_pkd_latch_i_disable << 5)

Shifted mode pkd_latch_i_disable for RAC_PGACTRL

Definition at line 3550 of file efr32bg21_rac.h .

#define RAC_PGACTRL_PGAENLATCHI_pkd_latch_i_enable ( _RAC_PGACTRL_PGAENLATCHI_pkd_latch_i_enable << 5)

Shifted mode pkd_latch_i_enable for RAC_PGACTRL

Definition at line 3551 of file efr32bg21_rac.h .

#define RAC_PGACTRL_PGAENLATCHQ (0x1UL << 6)

PGAENLATCHQ

Definition at line 3552 of file efr32bg21_rac.h .

#define RAC_PGACTRL_PGAENLATCHQ_DEFAULT ( _RAC_PGACTRL_PGAENLATCHQ_DEFAULT << 6)

Shifted mode DEFAULT for RAC_PGACTRL

Definition at line 3558 of file efr32bg21_rac.h .

#define RAC_PGACTRL_PGAENLATCHQ_pkd_latch_q_disable ( _RAC_PGACTRL_PGAENLATCHQ_pkd_latch_q_disable << 6)

Shifted mode pkd_latch_q_disable for RAC_PGACTRL

Definition at line 3559 of file efr32bg21_rac.h .

#define RAC_PGACTRL_PGAENLATCHQ_pkd_latch_q_enable ( _RAC_PGACTRL_PGAENLATCHQ_pkd_latch_q_enable << 6)

Shifted mode pkd_latch_q_enable for RAC_PGACTRL

Definition at line 3560 of file efr32bg21_rac.h .

#define RAC_PGACTRL_PGAENLDOLOAD (0x1UL << 7)

PGAENLDOLOAD

Definition at line 3561 of file efr32bg21_rac.h .

#define RAC_PGACTRL_PGAENLDOLOAD_DEFAULT ( _RAC_PGACTRL_PGAENLDOLOAD_DEFAULT << 7)

Shifted mode DEFAULT for RAC_PGACTRL

Definition at line 3567 of file efr32bg21_rac.h .

#define RAC_PGACTRL_PGAENLDOLOAD_disable_ldo_load ( _RAC_PGACTRL_PGAENLDOLOAD_disable_ldo_load << 7)

Shifted mode disable_ldo_load for RAC_PGACTRL

Definition at line 3568 of file efr32bg21_rac.h .

#define RAC_PGACTRL_PGAENLDOLOAD_enable_ldo_load ( _RAC_PGACTRL_PGAENLDOLOAD_enable_ldo_load << 7)

Shifted mode enable_ldo_load for RAC_PGACTRL

Definition at line 3569 of file efr32bg21_rac.h .

#define RAC_PGACTRL_PGAENOFFD (0x1UL << 8)

PGAENOFFD

Definition at line 3570 of file efr32bg21_rac.h .

#define RAC_PGACTRL_PGAENOFFD_DEFAULT ( _RAC_PGACTRL_PGAENOFFD_DEFAULT << 8)

Shifted mode DEFAULT for RAC_PGACTRL

Definition at line 3576 of file efr32bg21_rac.h .

#define RAC_PGACTRL_PGAENOFFD_pkd_offd_disable ( _RAC_PGACTRL_PGAENOFFD_pkd_offd_disable << 8)

Shifted mode pkd_offd_disable for RAC_PGACTRL

Definition at line 3577 of file efr32bg21_rac.h .

#define RAC_PGACTRL_PGAENOFFD_pkd_offd_enable ( _RAC_PGACTRL_PGAENOFFD_pkd_offd_enable << 8)

Shifted mode pkd_offd_enable for RAC_PGACTRL

Definition at line 3578 of file efr32bg21_rac.h .

#define RAC_PGACTRL_PGAENPGAI (0x1UL << 9)

PGAENPGAI

Definition at line 3579 of file efr32bg21_rac.h .

#define RAC_PGACTRL_PGAENPGAI_DEFAULT ( _RAC_PGACTRL_PGAENPGAI_DEFAULT << 9)

Shifted mode DEFAULT for RAC_PGACTRL

Definition at line 3585 of file efr32bg21_rac.h .

#define RAC_PGACTRL_PGAENPGAI_pgai_disable ( _RAC_PGACTRL_PGAENPGAI_pgai_disable << 9)

Shifted mode pgai_disable for RAC_PGACTRL

Definition at line 3586 of file efr32bg21_rac.h .

#define RAC_PGACTRL_PGAENPGAI_pgai_enable ( _RAC_PGACTRL_PGAENPGAI_pgai_enable << 9)

Shifted mode pgai_enable for RAC_PGACTRL

Definition at line 3587 of file efr32bg21_rac.h .

#define RAC_PGACTRL_PGAENPGAQ (0x1UL << 10)

PGAENPGAQ

Definition at line 3588 of file efr32bg21_rac.h .

#define RAC_PGACTRL_PGAENPGAQ_DEFAULT ( _RAC_PGACTRL_PGAENPGAQ_DEFAULT << 10)

Shifted mode DEFAULT for RAC_PGACTRL

Definition at line 3594 of file efr32bg21_rac.h .

#define RAC_PGACTRL_PGAENPGAQ_pgaq_disable ( _RAC_PGACTRL_PGAENPGAQ_pgaq_disable << 10)

Shifted mode pgaq_disable for RAC_PGACTRL

Definition at line 3595 of file efr32bg21_rac.h .

#define RAC_PGACTRL_PGAENPGAQ_pgaq_enable ( _RAC_PGACTRL_PGAENPGAQ_pgaq_enable << 10)

Shifted mode pgaq_enable for RAC_PGACTRL

Definition at line 3596 of file efr32bg21_rac.h .

#define RAC_PGACTRL_PGAENPKD (0x1UL << 11)

PGAENPKD

Definition at line 3597 of file efr32bg21_rac.h .

#define RAC_PGACTRL_PGAENPKD_DEFAULT ( _RAC_PGACTRL_PGAENPKD_DEFAULT << 11)

Shifted mode DEFAULT for RAC_PGACTRL

Definition at line 3603 of file efr32bg21_rac.h .

#define RAC_PGACTRL_PGAENPKD_pkd_disable ( _RAC_PGACTRL_PGAENPKD_pkd_disable << 11)

Shifted mode pkd_disable for RAC_PGACTRL

Definition at line 3604 of file efr32bg21_rac.h .

#define RAC_PGACTRL_PGAENPKD_pkd_enable ( _RAC_PGACTRL_PGAENPKD_pkd_enable << 11)

Shifted mode pkd_enable for RAC_PGACTRL

Definition at line 3605 of file efr32bg21_rac.h .

#define RAC_PGACTRL_PGAENRCMOUT (0x1UL << 12)

PGAENRCMOUT

Definition at line 3606 of file efr32bg21_rac.h .

#define RAC_PGACTRL_PGAENRCMOUT_DEFAULT ( _RAC_PGACTRL_PGAENRCMOUT_DEFAULT << 12)

Shifted mode DEFAULT for RAC_PGACTRL

Definition at line 3612 of file efr32bg21_rac.h .

#define RAC_PGACTRL_PGAENRCMOUT_rcm_out_disable ( _RAC_PGACTRL_PGAENRCMOUT_rcm_out_disable << 12)

Shifted mode rcm_out_disable for RAC_PGACTRL

Definition at line 3613 of file efr32bg21_rac.h .

#define RAC_PGACTRL_PGAENRCMOUT_rcm_out_enable ( _RAC_PGACTRL_PGAENRCMOUT_rcm_out_enable << 12)

Shifted mode rcm_out_enable for RAC_PGACTRL

Definition at line 3614 of file efr32bg21_rac.h .

#define RAC_PGACTRL_PGAPOWERMODE_DEFAULT ( _RAC_PGACTRL_PGAPOWERMODE_DEFAULT << 14)

Shifted mode DEFAULT for RAC_PGACTRL

Definition at line 3622 of file efr32bg21_rac.h .

#define RAC_PGACTRL_PGAPOWERMODE_pm_0p5 ( _RAC_PGACTRL_PGAPOWERMODE_pm_0p5 << 14)

Shifted mode pm_0p5 for RAC_PGACTRL

Definition at line 3626 of file efr32bg21_rac.h .

#define RAC_PGACTRL_PGAPOWERMODE_pm_0p8 ( _RAC_PGACTRL_PGAPOWERMODE_pm_0p8 << 14)

Shifted mode pm_0p8 for RAC_PGACTRL

Definition at line 3624 of file efr32bg21_rac.h .

#define RAC_PGACTRL_PGAPOWERMODE_pm_1p2 ( _RAC_PGACTRL_PGAPOWERMODE_pm_1p2 << 14)

Shifted mode pm_1p2 for RAC_PGACTRL

Definition at line 3625 of file efr32bg21_rac.h .

#define RAC_PGACTRL_PGAPOWERMODE_pm_typ ( _RAC_PGACTRL_PGAPOWERMODE_pm_typ << 14)

Shifted mode pm_typ for RAC_PGACTRL

Definition at line 3623 of file efr32bg21_rac.h .

#define RAC_PGACTRL_PGATHRPKDHISEL_DEFAULT ( _RAC_PGACTRL_PGATHRPKDHISEL_DEFAULT << 20)

Shifted mode DEFAULT for RAC_PGACTRL

Definition at line 3667 of file efr32bg21_rac.h .

#define RAC_PGACTRL_PGATHRPKDHISEL_verf150mv ( _RAC_PGACTRL_PGATHRPKDHISEL_verf150mv << 20)

Shifted mode verf150mv for RAC_PGACTRL

Definition at line 3672 of file efr32bg21_rac.h .

#define RAC_PGACTRL_PGATHRPKDHISEL_vref100mv ( _RAC_PGACTRL_PGATHRPKDHISEL_vref100mv << 20)

Shifted mode vref100mv for RAC_PGACTRL

Definition at line 3670 of file efr32bg21_rac.h .

#define RAC_PGACTRL_PGATHRPKDHISEL_vref125mv ( _RAC_PGACTRL_PGATHRPKDHISEL_vref125mv << 20)

Shifted mode vref125mv for RAC_PGACTRL

Definition at line 3671 of file efr32bg21_rac.h .

#define RAC_PGACTRL_PGATHRPKDHISEL_vref175mv ( _RAC_PGACTRL_PGATHRPKDHISEL_vref175mv << 20)

Shifted mode vref175mv for RAC_PGACTRL

Definition at line 3673 of file efr32bg21_rac.h .

#define RAC_PGACTRL_PGATHRPKDHISEL_vref200mv ( _RAC_PGACTRL_PGATHRPKDHISEL_vref200mv << 20)

Shifted mode vref200mv for RAC_PGACTRL

Definition at line 3674 of file efr32bg21_rac.h .

#define RAC_PGACTRL_PGATHRPKDHISEL_vref225mv ( _RAC_PGACTRL_PGATHRPKDHISEL_vref225mv << 20)

Shifted mode vref225mv for RAC_PGACTRL

Definition at line 3675 of file efr32bg21_rac.h .

#define RAC_PGACTRL_PGATHRPKDHISEL_vref250mv ( _RAC_PGACTRL_PGATHRPKDHISEL_vref250mv << 20)

Shifted mode vref250mv for RAC_PGACTRL

Definition at line 3676 of file efr32bg21_rac.h .

#define RAC_PGACTRL_PGATHRPKDHISEL_vref275mv ( _RAC_PGACTRL_PGATHRPKDHISEL_vref275mv << 20)

Shifted mode vref275mv for RAC_PGACTRL

Definition at line 3677 of file efr32bg21_rac.h .

#define RAC_PGACTRL_PGATHRPKDHISEL_vref300mv ( _RAC_PGACTRL_PGATHRPKDHISEL_vref300mv << 20)

Shifted mode vref300mv for RAC_PGACTRL

Definition at line 3678 of file efr32bg21_rac.h .

#define RAC_PGACTRL_PGATHRPKDHISEL_vref50mv ( _RAC_PGACTRL_PGATHRPKDHISEL_vref50mv << 20)

Shifted mode vref50mv for RAC_PGACTRL

Definition at line 3668 of file efr32bg21_rac.h .

#define RAC_PGACTRL_PGATHRPKDHISEL_vref75mv ( _RAC_PGACTRL_PGATHRPKDHISEL_vref75mv << 20)

Shifted mode vref75mv for RAC_PGACTRL

Definition at line 3669 of file efr32bg21_rac.h .

#define RAC_PGACTRL_PGATHRPKDLOSEL_DEFAULT ( _RAC_PGACTRL_PGATHRPKDLOSEL_DEFAULT << 16)

Shifted mode DEFAULT for RAC_PGACTRL

Definition at line 3641 of file efr32bg21_rac.h .

#define RAC_PGACTRL_PGATHRPKDLOSEL_vref100mv ( _RAC_PGACTRL_PGATHRPKDLOSEL_vref100mv << 16)

Shifted mode vref100mv for RAC_PGACTRL

Definition at line 3644 of file efr32bg21_rac.h .

#define RAC_PGACTRL_PGATHRPKDLOSEL_vref125mv ( _RAC_PGACTRL_PGATHRPKDLOSEL_vref125mv << 16)

Shifted mode vref125mv for RAC_PGACTRL

Definition at line 3645 of file efr32bg21_rac.h .

#define RAC_PGACTRL_PGATHRPKDLOSEL_vref150mv ( _RAC_PGACTRL_PGATHRPKDLOSEL_vref150mv << 16)

Shifted mode vref150mv for RAC_PGACTRL

Definition at line 3646 of file efr32bg21_rac.h .

#define RAC_PGACTRL_PGATHRPKDLOSEL_vref175mv ( _RAC_PGACTRL_PGATHRPKDLOSEL_vref175mv << 16)

Shifted mode vref175mv for RAC_PGACTRL

Definition at line 3647 of file efr32bg21_rac.h .

#define RAC_PGACTRL_PGATHRPKDLOSEL_vref200mv ( _RAC_PGACTRL_PGATHRPKDLOSEL_vref200mv << 16)

Shifted mode vref200mv for RAC_PGACTRL

Definition at line 3648 of file efr32bg21_rac.h .

#define RAC_PGACTRL_PGATHRPKDLOSEL_vref225mv ( _RAC_PGACTRL_PGATHRPKDLOSEL_vref225mv << 16)

Shifted mode vref225mv for RAC_PGACTRL

Definition at line 3649 of file efr32bg21_rac.h .

#define RAC_PGACTRL_PGATHRPKDLOSEL_vref250mv ( _RAC_PGACTRL_PGATHRPKDLOSEL_vref250mv << 16)

Shifted mode vref250mv for RAC_PGACTRL

Definition at line 3650 of file efr32bg21_rac.h .

#define RAC_PGACTRL_PGATHRPKDLOSEL_vref275mv ( _RAC_PGACTRL_PGATHRPKDLOSEL_vref275mv << 16)

Shifted mode vref275mv for RAC_PGACTRL

Definition at line 3651 of file efr32bg21_rac.h .

#define RAC_PGACTRL_PGATHRPKDLOSEL_vref300mv ( _RAC_PGACTRL_PGATHRPKDLOSEL_vref300mv << 16)

Shifted mode vref300mv for RAC_PGACTRL

Definition at line 3652 of file efr32bg21_rac.h .

#define RAC_PGACTRL_PGATHRPKDLOSEL_vref50mv ( _RAC_PGACTRL_PGATHRPKDLOSEL_vref50mv << 16)

Shifted mode vref50mv for RAC_PGACTRL

Definition at line 3642 of file efr32bg21_rac.h .

#define RAC_PGACTRL_PGATHRPKDLOSEL_vref75mv ( _RAC_PGACTRL_PGATHRPKDLOSEL_vref75mv << 16)

Shifted mode vref75mv for RAC_PGACTRL

Definition at line 3643 of file efr32bg21_rac.h .

#define RAC_PGATRIM_PGACTUNE_cfb_0p7 ( _RAC_PGATRIM_PGACTUNE_cfb_0p7 << 0)

Shifted mode cfb_0p7 for RAC_PGATRIM

Definition at line 3412 of file efr32bg21_rac.h .

#define RAC_PGATRIM_PGACTUNE_cfb_1p32 ( _RAC_PGATRIM_PGACTUNE_cfb_1p32 << 0)

Shifted mode cfb_1p32 for RAC_PGATRIM

Definition at line 3414 of file efr32bg21_rac.h .

#define RAC_PGATRIM_PGACTUNE_cfb_nominal ( _RAC_PGATRIM_PGACTUNE_cfb_nominal << 0)

Shifted mode cfb_nominal for RAC_PGATRIM

Definition at line 3413 of file efr32bg21_rac.h .

#define RAC_PGATRIM_PGACTUNE_DEFAULT ( _RAC_PGATRIM_PGACTUNE_DEFAULT << 0)

Shifted mode DEFAULT for RAC_PGATRIM

Definition at line 3411 of file efr32bg21_rac.h .

#define RAC_PGATRIM_PGADISANTILOCK (0x1UL << 4)

PGADISANTILOCK

Definition at line 3415 of file efr32bg21_rac.h .

#define RAC_PGATRIM_PGADISANTILOCK_antilock_disable ( _RAC_PGATRIM_PGADISANTILOCK_antilock_disable << 4)

Shifted mode antilock_disable for RAC_PGATRIM

Definition at line 3423 of file efr32bg21_rac.h .

#define RAC_PGATRIM_PGADISANTILOCK_antilock_enable ( _RAC_PGATRIM_PGADISANTILOCK_antilock_enable << 4)

Shifted mode antilock_enable for RAC_PGATRIM

Definition at line 3422 of file efr32bg21_rac.h .

#define RAC_PGATRIM_PGADISANTILOCK_DEFAULT ( _RAC_PGATRIM_PGADISANTILOCK_DEFAULT << 4)

Shifted mode DEFAULT for RAC_PGATRIM

Definition at line 3421 of file efr32bg21_rac.h .

#define RAC_PGATRIM_PGAVCMOUTTRIM_DEFAULT ( _RAC_PGATRIM_PGAVCMOUTTRIM_DEFAULT << 5)

Shifted mode DEFAULT for RAC_PGATRIM

Definition at line 3435 of file efr32bg21_rac.h .

#define RAC_PGATRIM_PGAVCMOUTTRIM_vcm_out_0p4 ( _RAC_PGATRIM_PGAVCMOUTTRIM_vcm_out_0p4 << 5)

Shifted mode vcm_out_0p4 for RAC_PGATRIM

Definition at line 3436 of file efr32bg21_rac.h .

#define RAC_PGATRIM_PGAVCMOUTTRIM_vcm_out_0p45 ( _RAC_PGATRIM_PGAVCMOUTTRIM_vcm_out_0p45 << 5)

Shifted mode vcm_out_0p45 for RAC_PGATRIM

Definition at line 3437 of file efr32bg21_rac.h .

#define RAC_PGATRIM_PGAVCMOUTTRIM_vcm_out_0p5 ( _RAC_PGATRIM_PGAVCMOUTTRIM_vcm_out_0p5 << 5)

Shifted mode vcm_out_0p5 for RAC_PGATRIM

Definition at line 3438 of file efr32bg21_rac.h .

#define RAC_PGATRIM_PGAVCMOUTTRIM_vcm_out_0p55 ( _RAC_PGATRIM_PGAVCMOUTTRIM_vcm_out_0p55 << 5)

Shifted mode vcm_out_0p55 for RAC_PGATRIM

Definition at line 3439 of file efr32bg21_rac.h .

#define RAC_PGATRIM_PGAVCMOUTTRIM_vcm_out_0p6 ( _RAC_PGATRIM_PGAVCMOUTTRIM_vcm_out_0p6 << 5)

Shifted mode vcm_out_0p6 for RAC_PGATRIM

Definition at line 3440 of file efr32bg21_rac.h .

#define RAC_PGATRIM_PGAVCMOUTTRIM_vcm_out_0p65 ( _RAC_PGATRIM_PGAVCMOUTTRIM_vcm_out_0p65 << 5)

Shifted mode vcm_out_0p65 for RAC_PGATRIM

Definition at line 3441 of file efr32bg21_rac.h .

#define RAC_PGATRIM_PGAVCMOUTTRIM_vcm_out_0p7 ( _RAC_PGATRIM_PGAVCMOUTTRIM_vcm_out_0p7 << 5)

Shifted mode vcm_out_0p7 for RAC_PGATRIM

Definition at line 3442 of file efr32bg21_rac.h .

#define RAC_PGATRIM_PGAVCMOUTTRIM_vcm_out_0p75 ( _RAC_PGATRIM_PGAVCMOUTTRIM_vcm_out_0p75 << 5)

Shifted mode vcm_out_0p75 for RAC_PGATRIM

Definition at line 3443 of file efr32bg21_rac.h .

#define RAC_PGATRIM_PGAVLDOTRIM_DEFAULT ( _RAC_PGATRIM_PGAVLDOTRIM_DEFAULT << 8)

Shifted mode DEFAULT for RAC_PGATRIM

Definition at line 3455 of file efr32bg21_rac.h .

#define RAC_PGATRIM_PGAVLDOTRIM_vdda_1p15 ( _RAC_PGATRIM_PGAVLDOTRIM_vdda_1p15 << 8)

Shifted mode vdda_1p15 for RAC_PGATRIM

Definition at line 3456 of file efr32bg21_rac.h .

#define RAC_PGATRIM_PGAVLDOTRIM_vdda_1p2 ( _RAC_PGATRIM_PGAVLDOTRIM_vdda_1p2 << 8)

Shifted mode vdda_1p2 for RAC_PGATRIM

Definition at line 3457 of file efr32bg21_rac.h .

#define RAC_PGATRIM_PGAVLDOTRIM_vdda_1p25 ( _RAC_PGATRIM_PGAVLDOTRIM_vdda_1p25 << 8)

Shifted mode vdda_1p25 for RAC_PGATRIM

Definition at line 3458 of file efr32bg21_rac.h .

#define RAC_PGATRIM_PGAVLDOTRIM_vdda_1p3 ( _RAC_PGATRIM_PGAVLDOTRIM_vdda_1p3 << 8)

Shifted mode vdda_1p3 for RAC_PGATRIM

Definition at line 3459 of file efr32bg21_rac.h .

#define RAC_PGATRIM_PGAVLDOTRIM_vdda_1p35 ( _RAC_PGATRIM_PGAVLDOTRIM_vdda_1p35 << 8)

Shifted mode vdda_1p35 for RAC_PGATRIM

Definition at line 3460 of file efr32bg21_rac.h .

#define RAC_PGATRIM_PGAVLDOTRIM_vdda_1p4 ( _RAC_PGATRIM_PGAVLDOTRIM_vdda_1p4 << 8)

Shifted mode vdda_1p4 for RAC_PGATRIM

Definition at line 3461 of file efr32bg21_rac.h .

#define RAC_PGATRIM_PGAVLDOTRIM_vdda_1p5 ( _RAC_PGATRIM_PGAVLDOTRIM_vdda_1p5 << 8)

Shifted mode vdda_1p5 for RAC_PGATRIM

Definition at line 3462 of file efr32bg21_rac.h .

#define RAC_PGATRIM_PGAVLDOTRIM_vdda_1p55 ( _RAC_PGATRIM_PGAVLDOTRIM_vdda_1p55 << 8)

Shifted mode vdda_1p55 for RAC_PGATRIM

Definition at line 3463 of file efr32bg21_rac.h .

#define RAC_PRECTRL_PREBYPFORCE (0x1UL << 0)

PREBYPFORCE

Definition at line 2611 of file efr32bg21_rac.h .

#define RAC_PRECTRL_PREBYPFORCE_DEFAULT ( _RAC_PRECTRL_PREBYPFORCE_DEFAULT << 0)

Shifted mode DEFAULT for RAC_PRECTRL

Definition at line 2617 of file efr32bg21_rac.h .

#define RAC_PRECTRL_PREBYPFORCE_forced ( _RAC_PRECTRL_PREBYPFORCE_forced << 0)

Shifted mode forced for RAC_PRECTRL

Definition at line 2619 of file efr32bg21_rac.h .

#define RAC_PRECTRL_PREBYPFORCE_not_forced ( _RAC_PRECTRL_PREBYPFORCE_not_forced << 0)

Shifted mode not_forced for RAC_PRECTRL

Definition at line 2618 of file efr32bg21_rac.h .

#define RAC_PRECTRL_PREREGTRIM_DEFAULT ( _RAC_PRECTRL_PREREGTRIM_DEFAULT << 1)

Shifted mode DEFAULT for RAC_PRECTRL

Definition at line 2631 of file efr32bg21_rac.h .

#define RAC_PRECTRL_PREREGTRIM_v1p61 ( _RAC_PRECTRL_PREREGTRIM_v1p61 << 1)

Shifted mode v1p61 for RAC_PRECTRL

Definition at line 2632 of file efr32bg21_rac.h .

#define RAC_PRECTRL_PREREGTRIM_v1p68 ( _RAC_PRECTRL_PREREGTRIM_v1p68 << 1)

Shifted mode v1p68 for RAC_PRECTRL

Definition at line 2633 of file efr32bg21_rac.h .

#define RAC_PRECTRL_PREREGTRIM_v1p74 ( _RAC_PRECTRL_PREREGTRIM_v1p74 << 1)

Shifted mode v1p74 for RAC_PRECTRL

Definition at line 2634 of file efr32bg21_rac.h .

#define RAC_PRECTRL_PREREGTRIM_v1p80 ( _RAC_PRECTRL_PREREGTRIM_v1p80 << 1)

Shifted mode v1p80 for RAC_PRECTRL

Definition at line 2635 of file efr32bg21_rac.h .

#define RAC_PRECTRL_PREREGTRIM_v1p86 ( _RAC_PRECTRL_PREREGTRIM_v1p86 << 1)

Shifted mode v1p86 for RAC_PRECTRL

Definition at line 2636 of file efr32bg21_rac.h .

#define RAC_PRECTRL_PREREGTRIM_v1p91 ( _RAC_PRECTRL_PREREGTRIM_v1p91 << 1)

Shifted mode v1p91 for RAC_PRECTRL

Definition at line 2637 of file efr32bg21_rac.h .

#define RAC_PRECTRL_PREREGTRIM_v1p96 ( _RAC_PRECTRL_PREREGTRIM_v1p96 << 1)

Shifted mode v1p96 for RAC_PRECTRL

Definition at line 2638 of file efr32bg21_rac.h .

#define RAC_PRECTRL_PREREGTRIM_v2p00 ( _RAC_PRECTRL_PREREGTRIM_v2p00 << 1)

Shifted mode v2p00 for RAC_PRECTRL

Definition at line 2639 of file efr32bg21_rac.h .

#define RAC_PRECTRL_PREVREFTRIM_DEFAULT ( _RAC_PRECTRL_PREVREFTRIM_DEFAULT << 4)

Shifted mode DEFAULT for RAC_PRECTRL

Definition at line 2647 of file efr32bg21_rac.h .

#define RAC_PRECTRL_PREVREFTRIM_v0p675 ( _RAC_PRECTRL_PREVREFTRIM_v0p675 << 4)

Shifted mode v0p675 for RAC_PRECTRL

Definition at line 2648 of file efr32bg21_rac.h .

#define RAC_PRECTRL_PREVREFTRIM_v0p688 ( _RAC_PRECTRL_PREVREFTRIM_v0p688 << 4)

Shifted mode v0p688 for RAC_PRECTRL

Definition at line 2649 of file efr32bg21_rac.h .

#define RAC_PRECTRL_PREVREFTRIM_v0p700 ( _RAC_PRECTRL_PREVREFTRIM_v0p700 << 4)

Shifted mode v0p700 for RAC_PRECTRL

Definition at line 2650 of file efr32bg21_rac.h .

#define RAC_PRECTRL_PREVREFTRIM_v0p713 ( _RAC_PRECTRL_PREVREFTRIM_v0p713 << 4)

Shifted mode v0p713 for RAC_PRECTRL

Definition at line 2651 of file efr32bg21_rac.h .

#define RAC_PRESC_STIMER_DEFAULT ( _RAC_PRESC_STIMER_DEFAULT << 0)

Shifted mode DEFAULT for RAC_PRESC

Definition at line 1186 of file efr32bg21_rac.h .

#define RAC_R0_R0_DEFAULT ( _RAC_R0_R0_DEFAULT << 0)

Shifted mode DEFAULT for RAC_R0

Definition at line 989 of file efr32bg21_rac.h .

#define RAC_R1_R1_DEFAULT ( _RAC_R1_R1_DEFAULT << 0)

Shifted mode DEFAULT for RAC_R1

Definition at line 997 of file efr32bg21_rac.h .

#define RAC_R2_R2_DEFAULT ( _RAC_R2_R2_DEFAULT << 0)

Shifted mode DEFAULT for RAC_R2

Definition at line 1005 of file efr32bg21_rac.h .

#define RAC_R3_R3_DEFAULT ( _RAC_R3_R3_DEFAULT << 0)

Shifted mode DEFAULT for RAC_R3

Definition at line 1013 of file efr32bg21_rac.h .

#define RAC_R4_R4_DEFAULT ( _RAC_R4_R4_DEFAULT << 0)

Shifted mode DEFAULT for RAC_R4

Definition at line 1021 of file efr32bg21_rac.h .

#define RAC_R5_R5_DEFAULT ( _RAC_R5_R5_DEFAULT << 0)

Shifted mode DEFAULT for RAC_R5

Definition at line 1029 of file efr32bg21_rac.h .

#define RAC_R6_R6_DEFAULT ( _RAC_R6_R6_DEFAULT << 0)

Shifted mode DEFAULT for RAC_R6

Definition at line 1037 of file efr32bg21_rac.h .

#define RAC_R7_R7_DEFAULT ( _RAC_R7_R7_DEFAULT << 0)

Shifted mode DEFAULT for RAC_R7

Definition at line 1045 of file efr32bg21_rac.h .

#define RAC_RADIOEN_PREEN (0x1UL << 0)

PREEN

Definition at line 3792 of file efr32bg21_rac.h .

#define RAC_RADIOEN_PREEN_DEFAULT ( _RAC_RADIOEN_PREEN_DEFAULT << 0)

Shifted mode DEFAULT for RAC_RADIOEN

Definition at line 3798 of file efr32bg21_rac.h .

#define RAC_RADIOEN_PREEN_powered_off ( _RAC_RADIOEN_PREEN_powered_off << 0)

Shifted mode powered_off for RAC_RADIOEN

Definition at line 3799 of file efr32bg21_rac.h .

#define RAC_RADIOEN_PREEN_powered_on ( _RAC_RADIOEN_PREEN_powered_on << 0)

Shifted mode powered_on for RAC_RADIOEN

Definition at line 3800 of file efr32bg21_rac.h .

#define RAC_RADIOEN_PRESTB100UDIS (0x1UL << 1)

PRESTB100UDIS

Definition at line 3801 of file efr32bg21_rac.h .

#define RAC_RADIOEN_PRESTB100UDIS_DEFAULT ( _RAC_RADIOEN_PRESTB100UDIS_DEFAULT << 1)

Shifted mode DEFAULT for RAC_RADIOEN

Definition at line 3807 of file efr32bg21_rac.h .

#define RAC_RADIOEN_PRESTB100UDIS_i100ua_disabled ( _RAC_RADIOEN_PRESTB100UDIS_i100ua_disabled << 1)

Shifted mode i100ua_disabled for RAC_RADIOEN

Definition at line 3809 of file efr32bg21_rac.h .

#define RAC_RADIOEN_PRESTB100UDIS_i100ua_enabled ( _RAC_RADIOEN_PRESTB100UDIS_i100ua_enabled << 1)

Shifted mode i100ua_enabled for RAC_RADIOEN

Definition at line 3808 of file efr32bg21_rac.h .

#define RAC_RADIOEN_RFBIASEN (0x1UL << 2)

RFBIASEN

Definition at line 3810 of file efr32bg21_rac.h .

#define RAC_RADIOEN_RFBIASEN_DEFAULT ( _RAC_RADIOEN_RFBIASEN_DEFAULT << 2)

Shifted mode DEFAULT for RAC_RADIOEN

Definition at line 3816 of file efr32bg21_rac.h .

#define RAC_RADIOEN_RFBIASEN_disable_dualbis_vtr ( _RAC_RADIOEN_RFBIASEN_disable_dualbis_vtr << 2)

Shifted mode disable_dualbis_vtr for RAC_RADIOEN

Definition at line 3817 of file efr32bg21_rac.h .

#define RAC_RADIOEN_RFBIASEN_enable_dualbis_vtr ( _RAC_RADIOEN_RFBIASEN_enable_dualbis_vtr << 2)

Shifted mode enable_dualbis_vtr for RAC_RADIOEN

Definition at line 3818 of file efr32bg21_rac.h .

#define RAC_RFBIASCAL_RFBIASCALBIAS_DEFAULT ( _RAC_RFBIASCAL_RFBIASCALBIAS_DEFAULT << 0)

Shifted mode DEFAULT for RAC_RFBIASCAL

Definition at line 3690 of file efr32bg21_rac.h .

#define RAC_RFBIASCAL_RFBIASCALTC_DEFAULT ( _RAC_RFBIASCAL_RFBIASCALTC_DEFAULT << 8)

Shifted mode DEFAULT for RAC_RFBIASCAL

Definition at line 3694 of file efr32bg21_rac.h .

#define RAC_RFBIASCAL_RFBIASCALVREF_DEFAULT ( _RAC_RFBIASCAL_RFBIASCALVREF_DEFAULT << 16)

Shifted mode DEFAULT for RAC_RFBIASCAL

Definition at line 3698 of file efr32bg21_rac.h .

#define RAC_RFBIASCAL_RFBIASCALVREFSTARTUP_DEFAULT ( _RAC_RFBIASCAL_RFBIASCALVREFSTARTUP_DEFAULT << 24)

Shifted mode DEFAULT for RAC_RFBIASCAL

Definition at line 3702 of file efr32bg21_rac.h .

#define RAC_RFBIASCTRL_RFBIASDISABLEBOOTSTRAP (0x1UL << 0)

RFBIASDISABLEBOOTSTRAP

Definition at line 3707 of file efr32bg21_rac.h .

#define RAC_RFBIASCTRL_RFBIASDISABLEBOOTSTRAP_DEFAULT ( _RAC_RFBIASCTRL_RFBIASDISABLEBOOTSTRAP_DEFAULT << 0)

Shifted mode DEFAULT for RAC_RFBIASCTRL

Definition at line 3713 of file efr32bg21_rac.h .

#define RAC_RFBIASCTRL_RFBIASDISABLEBOOTSTRAP_disable_startup ( _RAC_RFBIASCTRL_RFBIASDISABLEBOOTSTRAP_disable_startup << 0)

Shifted mode disable_startup for RAC_RFBIASCTRL

Definition at line 3715 of file efr32bg21_rac.h .

#define RAC_RFBIASCTRL_RFBIASDISABLEBOOTSTRAP_enable_startup ( _RAC_RFBIASCTRL_RFBIASDISABLEBOOTSTRAP_enable_startup << 0)

Shifted mode enable_startup for RAC_RFBIASCTRL

Definition at line 3714 of file efr32bg21_rac.h .

#define RAC_RFBIASCTRL_RFBIASLDOHIGHCURRENT (0x1UL << 1)

RFBIASLDOHIGHCURRENT

Definition at line 3716 of file efr32bg21_rac.h .

#define RAC_RFBIASCTRL_RFBIASLDOHIGHCURRENT_DEFAULT ( _RAC_RFBIASCTRL_RFBIASLDOHIGHCURRENT_DEFAULT << 1)

Shifted mode DEFAULT for RAC_RFBIASCTRL

Definition at line 3722 of file efr32bg21_rac.h .

#define RAC_RFBIASCTRL_RFBIASLDOHIGHCURRENT_high_current ( _RAC_RFBIASCTRL_RFBIASLDOHIGHCURRENT_high_current << 1)

Shifted mode high_current for RAC_RFBIASCTRL

Definition at line 3724 of file efr32bg21_rac.h .

#define RAC_RFBIASCTRL_RFBIASLDOHIGHCURRENT_low_current ( _RAC_RFBIASCTRL_RFBIASLDOHIGHCURRENT_low_current << 1)

Shifted mode low_current for RAC_RFBIASCTRL

Definition at line 3723 of file efr32bg21_rac.h .

#define RAC_RFBIASCTRL_RFBIASLDOVREFTRIM_DEFAULT ( _RAC_RFBIASCTRL_RFBIASLDOVREFTRIM_DEFAULT << 16)

Shifted mode DEFAULT for RAC_RFBIASCTRL

Definition at line 3771 of file efr32bg21_rac.h .

#define RAC_RFBIASCTRL_RFBIASLDOVREFTRIM_vref_v0p800 ( _RAC_RFBIASCTRL_RFBIASLDOVREFTRIM_vref_v0p800 << 16)

Shifted mode vref_v0p800 for RAC_RFBIASCTRL

Definition at line 3772 of file efr32bg21_rac.h .

#define RAC_RFBIASCTRL_RFBIASLDOVREFTRIM_vref_v0p813 ( _RAC_RFBIASCTRL_RFBIASLDOVREFTRIM_vref_v0p813 << 16)

Shifted mode vref_v0p813 for RAC_RFBIASCTRL

Definition at line 3773 of file efr32bg21_rac.h .

#define RAC_RFBIASCTRL_RFBIASLDOVREFTRIM_vref_v0p825 ( _RAC_RFBIASCTRL_RFBIASLDOVREFTRIM_vref_v0p825 << 16)

Shifted mode vref_v0p825 for RAC_RFBIASCTRL

Definition at line 3774 of file efr32bg21_rac.h .

#define RAC_RFBIASCTRL_RFBIASLDOVREFTRIM_vref_v0p837 ( _RAC_RFBIASCTRL_RFBIASLDOVREFTRIM_vref_v0p837 << 16)

Shifted mode vref_v0p837 for RAC_RFBIASCTRL

Definition at line 3775 of file efr32bg21_rac.h .

#define RAC_RFBIASCTRL_RFBIASLDOVREFTRIM_vref_v0p850 ( _RAC_RFBIASCTRL_RFBIASLDOVREFTRIM_vref_v0p850 << 16)

Shifted mode vref_v0p850 for RAC_RFBIASCTRL

Definition at line 3776 of file efr32bg21_rac.h .

#define RAC_RFBIASCTRL_RFBIASLDOVREFTRIM_vref_v0p863 ( _RAC_RFBIASCTRL_RFBIASLDOVREFTRIM_vref_v0p863 << 16)

Shifted mode vref_v0p863 for RAC_RFBIASCTRL

Definition at line 3777 of file efr32bg21_rac.h .

#define RAC_RFBIASCTRL_RFBIASLDOVREFTRIM_vref_v0p875 ( _RAC_RFBIASCTRL_RFBIASLDOVREFTRIM_vref_v0p875 << 16)

Shifted mode vref_v0p875 for RAC_RFBIASCTRL

Definition at line 3778 of file efr32bg21_rac.h .

#define RAC_RFBIASCTRL_RFBIASLDOVREFTRIM_vref_v0p887 ( _RAC_RFBIASCTRL_RFBIASLDOVREFTRIM_vref_v0p887 << 16)

Shifted mode vref_v0p887 for RAC_RFBIASCTRL

Definition at line 3779 of file efr32bg21_rac.h .

#define RAC_RFBIASCTRL_RFBIASLDOVREFTRIM_vref_v0p900 ( _RAC_RFBIASCTRL_RFBIASLDOVREFTRIM_vref_v0p900 << 16)

Shifted mode vref_v0p900 for RAC_RFBIASCTRL

Definition at line 3780 of file efr32bg21_rac.h .

#define RAC_RFBIASCTRL_RFBIASLDOVREFTRIM_vref_v0p913 ( _RAC_RFBIASCTRL_RFBIASLDOVREFTRIM_vref_v0p913 << 16)

Shifted mode vref_v0p913 for RAC_RFBIASCTRL

Definition at line 3781 of file efr32bg21_rac.h .

#define RAC_RFBIASCTRL_RFBIASLDOVREFTRIM_vref_v0p925 ( _RAC_RFBIASCTRL_RFBIASLDOVREFTRIM_vref_v0p925 << 16)

Shifted mode vref_v0p925 for RAC_RFBIASCTRL

Definition at line 3782 of file efr32bg21_rac.h .

#define RAC_RFBIASCTRL_RFBIASLDOVREFTRIM_vref_v0p938 ( _RAC_RFBIASCTRL_RFBIASLDOVREFTRIM_vref_v0p938 << 16)

Shifted mode vref_v0p938 for RAC_RFBIASCTRL

Definition at line 3783 of file efr32bg21_rac.h .

#define RAC_RFBIASCTRL_RFBIASLDOVREFTRIM_vref_v0p950 ( _RAC_RFBIASCTRL_RFBIASLDOVREFTRIM_vref_v0p950 << 16)

Shifted mode vref_v0p950 for RAC_RFBIASCTRL

Definition at line 3784 of file efr32bg21_rac.h .

#define RAC_RFBIASCTRL_RFBIASLDOVREFTRIM_vref_v0p963 ( _RAC_RFBIASCTRL_RFBIASLDOVREFTRIM_vref_v0p963 << 16)

Shifted mode vref_v0p963 for RAC_RFBIASCTRL

Definition at line 3785 of file efr32bg21_rac.h .

#define RAC_RFBIASCTRL_RFBIASLDOVREFTRIM_vref_v0p975 ( _RAC_RFBIASCTRL_RFBIASLDOVREFTRIM_vref_v0p975 << 16)

Shifted mode vref_v0p975 for RAC_RFBIASCTRL

Definition at line 3786 of file efr32bg21_rac.h .

#define RAC_RFBIASCTRL_RFBIASLDOVREFTRIM_vref_v0p988 ( _RAC_RFBIASCTRL_RFBIASLDOVREFTRIM_vref_v0p988 << 16)

Shifted mode vref_v0p988 for RAC_RFBIASCTRL

Definition at line 3787 of file efr32bg21_rac.h .

#define RAC_RFBIASCTRL_RFBIASNONFLASHMODE (0x1UL << 2)

RFBIASNONFLASHMODE

Definition at line 3725 of file efr32bg21_rac.h .

#define RAC_RFBIASCTRL_RFBIASNONFLASHMODE_DEFAULT ( _RAC_RFBIASCTRL_RFBIASNONFLASHMODE_DEFAULT << 2)

Shifted mode DEFAULT for RAC_RFBIASCTRL

Definition at line 3731 of file efr32bg21_rac.h .

#define RAC_RFBIASCTRL_RFBIASNONFLASHMODE_flash_process ( _RAC_RFBIASCTRL_RFBIASNONFLASHMODE_flash_process << 2)

Shifted mode flash_process for RAC_RFBIASCTRL

Definition at line 3732 of file efr32bg21_rac.h .

#define RAC_RFBIASCTRL_RFBIASNONFLASHMODE_non_flash_process ( _RAC_RFBIASCTRL_RFBIASNONFLASHMODE_non_flash_process << 2)

Shifted mode non_flash_process for RAC_RFBIASCTRL

Definition at line 3733 of file efr32bg21_rac.h .

#define RAC_RFBIASCTRL_RFBIASSTARTUPCORE (0x1UL << 3)

RFBIASSTARTUPCORE

Definition at line 3734 of file efr32bg21_rac.h .

#define RAC_RFBIASCTRL_RFBIASSTARTUPCORE_DEFAULT ( _RAC_RFBIASCTRL_RFBIASSTARTUPCORE_DEFAULT << 3)

Shifted mode DEFAULT for RAC_RFBIASCTRL

Definition at line 3740 of file efr32bg21_rac.h .

#define RAC_RFBIASCTRL_RFBIASSTARTUPCORE_default ( _RAC_RFBIASCTRL_RFBIASSTARTUPCORE_default << 3)

Shifted mode default for RAC_RFBIASCTRL

Definition at line 3741 of file efr32bg21_rac.h .

#define RAC_RFBIASCTRL_RFBIASSTARTUPCORE_force_start ( _RAC_RFBIASCTRL_RFBIASSTARTUPCORE_force_start << 3)

Shifted mode force_start for RAC_RFBIASCTRL

Definition at line 3742 of file efr32bg21_rac.h .

#define RAC_RFBIASCTRL_RFBIASSTARTUPSUPPLY (0x1UL << 4)

RFBIASSTARTUPSUPPLY

Definition at line 3743 of file efr32bg21_rac.h .

#define RAC_RFBIASCTRL_RFBIASSTARTUPSUPPLY_DEFAULT ( _RAC_RFBIASCTRL_RFBIASSTARTUPSUPPLY_DEFAULT << 4)

Shifted mode DEFAULT for RAC_RFBIASCTRL

Definition at line 3749 of file efr32bg21_rac.h .

#define RAC_RFBIASCTRL_RFBIASSTARTUPSUPPLY_default ( _RAC_RFBIASCTRL_RFBIASSTARTUPSUPPLY_default << 4)

Shifted mode default for RAC_RFBIASCTRL

Definition at line 3750 of file efr32bg21_rac.h .

#define RAC_RFBIASCTRL_RFBIASSTARTUPSUPPLY_forc_start ( _RAC_RFBIASCTRL_RFBIASSTARTUPSUPPLY_forc_start << 4)

Shifted mode forc_start for RAC_RFBIASCTRL

Definition at line 3751 of file efr32bg21_rac.h .

#define RAC_RFPATHEN1_LNAMIXEN0DBMPA1 (0x1UL << 0)

LNAMIXEN0DBMPA1

Definition at line 3823 of file efr32bg21_rac.h .

#define RAC_RFPATHEN1_LNAMIXEN0DBMPA1_DEFAULT ( _RAC_RFPATHEN1_LNAMIXEN0DBMPA1_DEFAULT << 0)

Shifted mode DEFAULT for RAC_RFPATHEN1

Definition at line 3829 of file efr32bg21_rac.h .

#define RAC_RFPATHEN1_LNAMIXEN0DBMPA1_disable ( _RAC_RFPATHEN1_LNAMIXEN0DBMPA1_disable << 0)

Shifted mode disable for RAC_RFPATHEN1

Definition at line 3830 of file efr32bg21_rac.h .

#define RAC_RFPATHEN1_LNAMIXEN0DBMPA1_enable ( _RAC_RFPATHEN1_LNAMIXEN0DBMPA1_enable << 0)

Shifted mode enable for RAC_RFPATHEN1

Definition at line 3831 of file efr32bg21_rac.h .

#define RAC_RFPATHEN1_LNAMIXEN1 (0x1UL << 1)

LNAMIXEN1

Definition at line 3832 of file efr32bg21_rac.h .

#define RAC_RFPATHEN1_LNAMIXEN1_DEFAULT ( _RAC_RFPATHEN1_LNAMIXEN1_DEFAULT << 1)

Shifted mode DEFAULT for RAC_RFPATHEN1

Definition at line 3838 of file efr32bg21_rac.h .

#define RAC_RFPATHEN1_LNAMIXEN1_disable ( _RAC_RFPATHEN1_LNAMIXEN1_disable << 1)

Shifted mode disable for RAC_RFPATHEN1

Definition at line 3839 of file efr32bg21_rac.h .

#define RAC_RFPATHEN1_LNAMIXEN1_enable ( _RAC_RFPATHEN1_LNAMIXEN1_enable << 1)

Shifted mode enable for RAC_RFPATHEN1

Definition at line 3840 of file efr32bg21_rac.h .

#define RAC_RFPATHEN1_LNAMIXRFATTDCEN1 (0x1UL << 2)

LNAMIXRFATTDCEN1

Definition at line 3841 of file efr32bg21_rac.h .

#define RAC_RFPATHEN1_LNAMIXRFATTDCEN1_DEFAULT ( _RAC_RFPATHEN1_LNAMIXRFATTDCEN1_DEFAULT << 2)

Shifted mode DEFAULT for RAC_RFPATHEN1

Definition at line 3847 of file efr32bg21_rac.h .

#define RAC_RFPATHEN1_LNAMIXRFATTDCEN1_disable_dc ( _RAC_RFPATHEN1_LNAMIXRFATTDCEN1_disable_dc << 2)

Shifted mode disable_dc for RAC_RFPATHEN1

Definition at line 3848 of file efr32bg21_rac.h .

#define RAC_RFPATHEN1_LNAMIXRFATTDCEN1_enable_dc ( _RAC_RFPATHEN1_LNAMIXRFATTDCEN1_enable_dc << 2)

Shifted mode enable_dc for RAC_RFPATHEN1

Definition at line 3849 of file efr32bg21_rac.h .

#define RAC_RFPATHEN1_LNAMIXRFPKDENRF1 (0x1UL << 3)

LNAMIXRFPKDENRF1

Definition at line 3850 of file efr32bg21_rac.h .

#define RAC_RFPATHEN1_LNAMIXRFPKDENRF1_DEFAULT ( _RAC_RFPATHEN1_LNAMIXRFPKDENRF1_DEFAULT << 3)

Shifted mode DEFAULT for RAC_RFPATHEN1

Definition at line 3856 of file efr32bg21_rac.h .

#define RAC_RFPATHEN1_LNAMIXRFPKDENRF1_disable ( _RAC_RFPATHEN1_LNAMIXRFPKDENRF1_disable << 3)

Shifted mode disable for RAC_RFPATHEN1

Definition at line 3857 of file efr32bg21_rac.h .

#define RAC_RFPATHEN1_LNAMIXRFPKDENRF1_enable_path1 ( _RAC_RFPATHEN1_LNAMIXRFPKDENRF1_enable_path1 << 3)

Shifted mode enable_path1 for RAC_RFPATHEN1

Definition at line 3858 of file efr32bg21_rac.h .

#define RAC_RFPATHEN1_LNAMIXTRSW1 (0x1UL << 4)

LNAMIXTRSW1

Definition at line 3859 of file efr32bg21_rac.h .

#define RAC_RFPATHEN1_LNAMIXTRSW1_DEFAULT ( _RAC_RFPATHEN1_LNAMIXTRSW1_DEFAULT << 4)

Shifted mode DEFAULT for RAC_RFPATHEN1

Definition at line 3865 of file efr32bg21_rac.h .

#define RAC_RFPATHEN1_LNAMIXTRSW1_disabled ( _RAC_RFPATHEN1_LNAMIXTRSW1_disabled << 4)

Shifted mode disabled for RAC_RFPATHEN1

Definition at line 3866 of file efr32bg21_rac.h .

#define RAC_RFPATHEN1_LNAMIXTRSW1_enabled ( _RAC_RFPATHEN1_LNAMIXTRSW1_enabled << 4)

Shifted mode enabled for RAC_RFPATHEN1

Definition at line 3867 of file efr32bg21_rac.h .

#define RAC_RFPATHEN1_PAENANT1 (0x1UL << 5)

PAENANT1

Definition at line 3868 of file efr32bg21_rac.h .

#define RAC_RFPATHEN1_PAENANT1_DEFAULT ( _RAC_RFPATHEN1_PAENANT1_DEFAULT << 5)

Shifted mode DEFAULT for RAC_RFPATHEN1

Definition at line 3874 of file efr32bg21_rac.h .

#define RAC_RFPATHEN1_PAENANT1_disable ( _RAC_RFPATHEN1_PAENANT1_disable << 5)

Shifted mode disable for RAC_RFPATHEN1

Definition at line 3875 of file efr32bg21_rac.h .

#define RAC_RFPATHEN1_PAENANT1_enable ( _RAC_RFPATHEN1_PAENANT1_enable << 5)

Shifted mode enable for RAC_RFPATHEN1

Definition at line 3876 of file efr32bg21_rac.h .

#define RAC_RFPATHEN1_PAENPA10DBM (0x1UL << 6)

PAENPA10DBM

Definition at line 3877 of file efr32bg21_rac.h .

#define RAC_RFPATHEN1_PAENPA10DBM_DEFAULT ( _RAC_RFPATHEN1_PAENPA10DBM_DEFAULT << 6)

Shifted mode DEFAULT for RAC_RFPATHEN1

Definition at line 3883 of file efr32bg21_rac.h .

#define RAC_RFPATHEN1_PAENPA10DBM_disable ( _RAC_RFPATHEN1_PAENPA10DBM_disable << 6)

Shifted mode disable for RAC_RFPATHEN1

Definition at line 3884 of file efr32bg21_rac.h .

#define RAC_RFPATHEN1_PAENPA10DBM_enable ( _RAC_RFPATHEN1_PAENPA10DBM_enable << 6)

Shifted mode enable for RAC_RFPATHEN1

Definition at line 3885 of file efr32bg21_rac.h .

#define RAC_RFPATHEN1_PAENPAPREDRV10DBM (0x1UL << 7)

PAENPAPREDRV10DBM

Definition at line 3886 of file efr32bg21_rac.h .

#define RAC_RFPATHEN1_PAENPAPREDRV10DBM_DEFAULT ( _RAC_RFPATHEN1_PAENPAPREDRV10DBM_DEFAULT << 7)

Shifted mode DEFAULT for RAC_RFPATHEN1

Definition at line 3892 of file efr32bg21_rac.h .

#define RAC_RFPATHEN1_PAENPAPREDRV10DBM_disable ( _RAC_RFPATHEN1_PAENPAPREDRV10DBM_disable << 7)

Shifted mode disable for RAC_RFPATHEN1

Definition at line 3893 of file efr32bg21_rac.h .

#define RAC_RFPATHEN1_PAENPAPREDRV10DBM_enable ( _RAC_RFPATHEN1_PAENPAPREDRV10DBM_enable << 7)

Shifted mode enable for RAC_RFPATHEN1

Definition at line 3894 of file efr32bg21_rac.h .

#define RAC_RFPATHEN2_LNAMIXEN0DBMPA2 (0x1UL << 0)

LNAMIXEN0DBMPA2

Definition at line 3899 of file efr32bg21_rac.h .

#define RAC_RFPATHEN2_LNAMIXEN0DBMPA2_DEFAULT ( _RAC_RFPATHEN2_LNAMIXEN0DBMPA2_DEFAULT << 0)

Shifted mode DEFAULT for RAC_RFPATHEN2

Definition at line 3905 of file efr32bg21_rac.h .

#define RAC_RFPATHEN2_LNAMIXEN0DBMPA2_disable ( _RAC_RFPATHEN2_LNAMIXEN0DBMPA2_disable << 0)

Shifted mode disable for RAC_RFPATHEN2

Definition at line 3906 of file efr32bg21_rac.h .

#define RAC_RFPATHEN2_LNAMIXEN0DBMPA2_enable ( _RAC_RFPATHEN2_LNAMIXEN0DBMPA2_enable << 0)

Shifted mode enable for RAC_RFPATHEN2

Definition at line 3907 of file efr32bg21_rac.h .

#define RAC_RFPATHEN2_LNAMIXEN2 (0x1UL << 1)

LNAMIXEN2

Definition at line 3908 of file efr32bg21_rac.h .

#define RAC_RFPATHEN2_LNAMIXEN2_DEFAULT ( _RAC_RFPATHEN2_LNAMIXEN2_DEFAULT << 1)

Shifted mode DEFAULT for RAC_RFPATHEN2

Definition at line 3914 of file efr32bg21_rac.h .

#define RAC_RFPATHEN2_LNAMIXEN2_disable ( _RAC_RFPATHEN2_LNAMIXEN2_disable << 1)

Shifted mode disable for RAC_RFPATHEN2

Definition at line 3915 of file efr32bg21_rac.h .

#define RAC_RFPATHEN2_LNAMIXEN2_enable ( _RAC_RFPATHEN2_LNAMIXEN2_enable << 1)

Shifted mode enable for RAC_RFPATHEN2

Definition at line 3916 of file efr32bg21_rac.h .

#define RAC_RFPATHEN2_LNAMIXRFATTDCEN2 (0x1UL << 2)

LNAMIXRFATTDCEN2

Definition at line 3917 of file efr32bg21_rac.h .

#define RAC_RFPATHEN2_LNAMIXRFATTDCEN2_DEFAULT ( _RAC_RFPATHEN2_LNAMIXRFATTDCEN2_DEFAULT << 2)

Shifted mode DEFAULT for RAC_RFPATHEN2

Definition at line 3923 of file efr32bg21_rac.h .

#define RAC_RFPATHEN2_LNAMIXRFATTDCEN2_disable ( _RAC_RFPATHEN2_LNAMIXRFATTDCEN2_disable << 2)

Shifted mode disable for RAC_RFPATHEN2

Definition at line 3924 of file efr32bg21_rac.h .

#define RAC_RFPATHEN2_LNAMIXRFATTDCEN2_enable ( _RAC_RFPATHEN2_LNAMIXRFATTDCEN2_enable << 2)

Shifted mode enable for RAC_RFPATHEN2

Definition at line 3925 of file efr32bg21_rac.h .

#define RAC_RFPATHEN2_LNAMIXRFPKDENRF2 (0x1UL << 3)

LNAMIXRFPKDENRF2

Definition at line 3926 of file efr32bg21_rac.h .

#define RAC_RFPATHEN2_LNAMIXRFPKDENRF2_DEFAULT ( _RAC_RFPATHEN2_LNAMIXRFPKDENRF2_DEFAULT << 3)

Shifted mode DEFAULT for RAC_RFPATHEN2

Definition at line 3932 of file efr32bg21_rac.h .

#define RAC_RFPATHEN2_LNAMIXRFPKDENRF2_disable ( _RAC_RFPATHEN2_LNAMIXRFPKDENRF2_disable << 3)

Shifted mode disable for RAC_RFPATHEN2

Definition at line 3933 of file efr32bg21_rac.h .

#define RAC_RFPATHEN2_LNAMIXRFPKDENRF2_enable_path2 ( _RAC_RFPATHEN2_LNAMIXRFPKDENRF2_enable_path2 << 3)

Shifted mode enable_path2 for RAC_RFPATHEN2

Definition at line 3934 of file efr32bg21_rac.h .

#define RAC_RFPATHEN2_LNAMIXTRSW2 (0x1UL << 4)

LNAMIXTRSW2

Definition at line 3935 of file efr32bg21_rac.h .

#define RAC_RFPATHEN2_LNAMIXTRSW2_DEFAULT ( _RAC_RFPATHEN2_LNAMIXTRSW2_DEFAULT << 4)

Shifted mode DEFAULT for RAC_RFPATHEN2

Definition at line 3941 of file efr32bg21_rac.h .

#define RAC_RFPATHEN2_LNAMIXTRSW2_disable ( _RAC_RFPATHEN2_LNAMIXTRSW2_disable << 4)

Shifted mode disable for RAC_RFPATHEN2

Definition at line 3942 of file efr32bg21_rac.h .

#define RAC_RFPATHEN2_LNAMIXTRSW2_enable ( _RAC_RFPATHEN2_LNAMIXTRSW2_enable << 4)

Shifted mode enable for RAC_RFPATHEN2

Definition at line 3943 of file efr32bg21_rac.h .

#define RAC_RFPATHEN2_PAENANT2 (0x1UL << 5)

PAENANT2

Definition at line 3944 of file efr32bg21_rac.h .

#define RAC_RFPATHEN2_PAENANT2_DEFAULT ( _RAC_RFPATHEN2_PAENANT2_DEFAULT << 5)

Shifted mode DEFAULT for RAC_RFPATHEN2

Definition at line 3950 of file efr32bg21_rac.h .

#define RAC_RFPATHEN2_PAENANT2_disable ( _RAC_RFPATHEN2_PAENANT2_disable << 5)

Shifted mode disable for RAC_RFPATHEN2

Definition at line 3951 of file efr32bg21_rac.h .

#define RAC_RFPATHEN2_PAENANT2_enable ( _RAC_RFPATHEN2_PAENANT2_enable << 5)

Shifted mode enable for RAC_RFPATHEN2

Definition at line 3952 of file efr32bg21_rac.h .

#define RAC_RFPATHEN2_PAENPA20DBM (0x1UL << 6)

PAENPA20DBM

Definition at line 3953 of file efr32bg21_rac.h .

#define RAC_RFPATHEN2_PAENPA20DBM_DEFAULT ( _RAC_RFPATHEN2_PAENPA20DBM_DEFAULT << 6)

Shifted mode DEFAULT for RAC_RFPATHEN2

Definition at line 3959 of file efr32bg21_rac.h .

#define RAC_RFPATHEN2_PAENPA20DBM_disable ( _RAC_RFPATHEN2_PAENPA20DBM_disable << 6)

Shifted mode disable for RAC_RFPATHEN2

Definition at line 3960 of file efr32bg21_rac.h .

#define RAC_RFPATHEN2_PAENPA20DBM_enable ( _RAC_RFPATHEN2_PAENPA20DBM_enable << 6)

Shifted mode enable for RAC_RFPATHEN2

Definition at line 3961 of file efr32bg21_rac.h .

#define RAC_RFPATHEN2_PAENPAPREDRV20DBM (0x1UL << 7)

PAENPAPREDRV20DBM

Definition at line 3962 of file efr32bg21_rac.h .

#define RAC_RFPATHEN2_PAENPAPREDRV20DBM_DEFAULT ( _RAC_RFPATHEN2_PAENPAPREDRV20DBM_DEFAULT << 7)

Shifted mode DEFAULT for RAC_RFPATHEN2

Definition at line 3968 of file efr32bg21_rac.h .

#define RAC_RFPATHEN2_PAENPAPREDRV20DBM_disable ( _RAC_RFPATHEN2_PAENPAPREDRV20DBM_disable << 7)

Shifted mode disable for RAC_RFPATHEN2

Definition at line 3969 of file efr32bg21_rac.h .

#define RAC_RFPATHEN2_PAENPAPREDRV20DBM_enable ( _RAC_RFPATHEN2_PAENPAPREDRV20DBM_enable << 7)

Shifted mode enable for RAC_RFPATHEN2

Definition at line 3970 of file efr32bg21_rac.h .

#define RAC_RX_IFADCCAPRESET (0x1UL << 0)

IFADCCAPRESET

Definition at line 3975 of file efr32bg21_rac.h .

#define RAC_RX_IFADCCAPRESET_cap_reset_disable ( _RAC_RX_IFADCCAPRESET_cap_reset_disable << 0)

Shifted mode cap_reset_disable for RAC_RX

Definition at line 3982 of file efr32bg21_rac.h .

#define RAC_RX_IFADCCAPRESET_cap_reset_enable ( _RAC_RX_IFADCCAPRESET_cap_reset_enable << 0)

Shifted mode cap_reset_enable for RAC_RX

Definition at line 3983 of file efr32bg21_rac.h .

#define RAC_RX_IFADCCAPRESET_DEFAULT ( _RAC_RX_IFADCCAPRESET_DEFAULT << 0)

Shifted mode DEFAULT for RAC_RX

Definition at line 3981 of file efr32bg21_rac.h .

#define RAC_RX_IFADCENLDOSERIES (0x1UL << 1)

IFADCENLDOSERIES

Definition at line 3984 of file efr32bg21_rac.h .

#define RAC_RX_IFADCENLDOSERIES_DEFAULT ( _RAC_RX_IFADCENLDOSERIES_DEFAULT << 1)

Shifted mode DEFAULT for RAC_RX

Definition at line 3990 of file efr32bg21_rac.h .

#define RAC_RX_IFADCENLDOSERIES_series_ldo_disable ( _RAC_RX_IFADCENLDOSERIES_series_ldo_disable << 1)

Shifted mode series_ldo_disable for RAC_RX

Definition at line 3991 of file efr32bg21_rac.h .

#define RAC_RX_IFADCENLDOSERIES_series_ldo_enable ( _RAC_RX_IFADCENLDOSERIES_series_ldo_enable << 1)

Shifted mode series_ldo_enable for RAC_RX

Definition at line 3992 of file efr32bg21_rac.h .

#define RAC_RX_IFADCENLDOSHUNT (0x1UL << 2)

IFADCENLDOSHUNT

Definition at line 3993 of file efr32bg21_rac.h .

#define RAC_RX_IFADCENLDOSHUNT_DEFAULT ( _RAC_RX_IFADCENLDOSHUNT_DEFAULT << 2)

Shifted mode DEFAULT for RAC_RX

Definition at line 3999 of file efr32bg21_rac.h .

#define RAC_RX_IFADCENLDOSHUNT_shunt_ldo_disable ( _RAC_RX_IFADCENLDOSHUNT_shunt_ldo_disable << 2)

Shifted mode shunt_ldo_disable for RAC_RX

Definition at line 4000 of file efr32bg21_rac.h .

#define RAC_RX_IFADCENLDOSHUNT_shunt_ldo_enable ( _RAC_RX_IFADCENLDOSHUNT_shunt_ldo_enable << 2)

Shifted mode shunt_ldo_enable for RAC_RX

Definition at line 4001 of file efr32bg21_rac.h .

#define RAC_RX_LNAMIXENRFPKD (0x1UL << 3)

LNAMIXENRFPKD

Definition at line 4002 of file efr32bg21_rac.h .

#define RAC_RX_LNAMIXENRFPKD_DEFAULT ( _RAC_RX_LNAMIXENRFPKD_DEFAULT << 3)

Shifted mode DEFAULT for RAC_RX

Definition at line 4008 of file efr32bg21_rac.h .

#define RAC_RX_LNAMIXENRFPKD_disable ( _RAC_RX_LNAMIXENRFPKD_disable << 3)

Shifted mode disable for RAC_RX

Definition at line 4009 of file efr32bg21_rac.h .

#define RAC_RX_LNAMIXENRFPKD_enable ( _RAC_RX_LNAMIXENRFPKD_enable << 3)

Shifted mode enable for RAC_RX

Definition at line 4010 of file efr32bg21_rac.h .

#define RAC_RX_LNAMIXLDOLOWCUR (0x1UL << 4)

LNAMIXLDOLOWCUR

Definition at line 4011 of file efr32bg21_rac.h .

#define RAC_RX_LNAMIXLDOLOWCUR_DEFAULT ( _RAC_RX_LNAMIXLDOLOWCUR_DEFAULT << 4)

Shifted mode DEFAULT for RAC_RX

Definition at line 4017 of file efr32bg21_rac.h .

#define RAC_RX_LNAMIXLDOLOWCUR_low_current_mode ( _RAC_RX_LNAMIXLDOLOWCUR_low_current_mode << 4)

Shifted mode low_current_mode for RAC_RX

Definition at line 4019 of file efr32bg21_rac.h .

#define RAC_RX_LNAMIXLDOLOWCUR_regular_mode ( _RAC_RX_LNAMIXLDOLOWCUR_regular_mode << 4)

Shifted mode regular_mode for RAC_RX

Definition at line 4018 of file efr32bg21_rac.h .

#define RAC_RX_LNAMIXREGLOADEN (0x1UL << 5)

LNAMIXREGLOADEN

Definition at line 4020 of file efr32bg21_rac.h .

#define RAC_RX_LNAMIXREGLOADEN_DEFAULT ( _RAC_RX_LNAMIXREGLOADEN_DEFAULT << 5)

Shifted mode DEFAULT for RAC_RX

Definition at line 4026 of file efr32bg21_rac.h .

#define RAC_RX_LNAMIXREGLOADEN_disable_resistor ( _RAC_RX_LNAMIXREGLOADEN_disable_resistor << 5)

Shifted mode disable_resistor for RAC_RX

Definition at line 4027 of file efr32bg21_rac.h .

#define RAC_RX_LNAMIXREGLOADEN_enable_resistor ( _RAC_RX_LNAMIXREGLOADEN_enable_resistor << 5)

Shifted mode enable_resistor for RAC_RX

Definition at line 4028 of file efr32bg21_rac.h .

#define RAC_RX_PGAENLDO (0x1UL << 6)

PGAENLDO

Definition at line 4029 of file efr32bg21_rac.h .

#define RAC_RX_PGAENLDO_DEFAULT ( _RAC_RX_PGAENLDO_DEFAULT << 6)

Shifted mode DEFAULT for RAC_RX

Definition at line 4035 of file efr32bg21_rac.h .

#define RAC_RX_PGAENLDO_disable_ldo ( _RAC_RX_PGAENLDO_disable_ldo << 6)

Shifted mode disable_ldo for RAC_RX

Definition at line 4036 of file efr32bg21_rac.h .

#define RAC_RX_PGAENLDO_enable_ldo ( _RAC_RX_PGAENLDO_enable_ldo << 6)

Shifted mode enable_ldo for RAC_RX

Definition at line 4037 of file efr32bg21_rac.h .

#define RAC_RX_SYCHPBIASTRIMBUF (0x1UL << 7)

SYCHPBIASTRIMBUF

Definition at line 4038 of file efr32bg21_rac.h .

#define RAC_RX_SYCHPBIASTRIMBUF_DEFAULT ( _RAC_RX_SYCHPBIASTRIMBUF_DEFAULT << 7)

Shifted mode DEFAULT for RAC_RX

Definition at line 4044 of file efr32bg21_rac.h .

#define RAC_RX_SYCHPBIASTRIMBUF_i_tail_10u ( _RAC_RX_SYCHPBIASTRIMBUF_i_tail_10u << 7)

Shifted mode i_tail_10u for RAC_RX

Definition at line 4045 of file efr32bg21_rac.h .

#define RAC_RX_SYCHPBIASTRIMBUF_i_tail_20u ( _RAC_RX_SYCHPBIASTRIMBUF_i_tail_20u << 7)

Shifted mode i_tail_20u for RAC_RX

Definition at line 4046 of file efr32bg21_rac.h .

#define RAC_RX_SYCHPQNC3EN (0x1UL << 8)

SYCHPQNC3EN

Definition at line 4047 of file efr32bg21_rac.h .

#define RAC_RX_SYCHPQNC3EN_DEFAULT ( _RAC_RX_SYCHPQNC3EN_DEFAULT << 8)

Shifted mode DEFAULT for RAC_RX

Definition at line 4053 of file efr32bg21_rac.h .

#define RAC_RX_SYCHPQNC3EN_qnc_2 ( _RAC_RX_SYCHPQNC3EN_qnc_2 << 8)

Shifted mode qnc_2 for RAC_RX

Definition at line 4054 of file efr32bg21_rac.h .

#define RAC_RX_SYCHPQNC3EN_qnc_3 ( _RAC_RX_SYCHPQNC3EN_qnc_3 << 8)

Shifted mode qnc_3 for RAC_RX

Definition at line 4055 of file efr32bg21_rac.h .

#define RAC_RX_SYMMDMODE_DEFAULT ( _RAC_RX_SYMMDMODE_DEFAULT << 9)

Shifted mode DEFAULT for RAC_RX

Definition at line 4067 of file efr32bg21_rac.h .

#define RAC_RX_SYMMDMODE_notuse_5 ( _RAC_RX_SYMMDMODE_notuse_5 << 9)

Shifted mode notuse_5 for RAC_RX

Definition at line 4073 of file efr32bg21_rac.h .

#define RAC_RX_SYMMDMODE_notuse_6 ( _RAC_RX_SYMMDMODE_notuse_6 << 9)

Shifted mode notuse_6 for RAC_RX

Definition at line 4074 of file efr32bg21_rac.h .

#define RAC_RX_SYMMDMODE_notuse_7 ( _RAC_RX_SYMMDMODE_notuse_7 << 9)

Shifted mode notuse_7 for RAC_RX

Definition at line 4075 of file efr32bg21_rac.h .

#define RAC_RX_SYMMDMODE_qnc_dsm2 ( _RAC_RX_SYMMDMODE_qnc_dsm2 << 9)

Shifted mode qnc_dsm2 for RAC_RX

Definition at line 4070 of file efr32bg21_rac.h .

#define RAC_RX_SYMMDMODE_qnc_dsm3 ( _RAC_RX_SYMMDMODE_qnc_dsm3 << 9)

Shifted mode qnc_dsm3 for RAC_RX

Definition at line 4071 of file efr32bg21_rac.h .

#define RAC_RX_SYMMDMODE_rx_w_swctrl ( _RAC_RX_SYMMDMODE_rx_w_swctrl << 9)

Shifted mode rx_w_swctrl for RAC_RX

Definition at line 4068 of file efr32bg21_rac.h .

#define RAC_RX_SYMMDMODE_rx_wo_swctrl ( _RAC_RX_SYMMDMODE_rx_wo_swctrl << 9)

Shifted mode rx_wo_swctrl for RAC_RX

Definition at line 4069 of file efr32bg21_rac.h .

#define RAC_RX_SYMMDMODE_rxlp_wo_swctrl ( _RAC_RX_SYMMDMODE_rxlp_wo_swctrl << 9)

Shifted mode rxlp_wo_swctrl for RAC_RX

Definition at line 4072 of file efr32bg21_rac.h .

#define RAC_RX_SYPFDCHPLPEN (0x1UL << 12)

SYPFDCHPLPEN

Definition at line 4076 of file efr32bg21_rac.h .

#define RAC_RX_SYPFDCHPLPEN_DEFAULT ( _RAC_RX_SYPFDCHPLPEN_DEFAULT << 12)

Shifted mode DEFAULT for RAC_RX

Definition at line 4082 of file efr32bg21_rac.h .

#define RAC_RX_SYPFDCHPLPEN_disable ( _RAC_RX_SYPFDCHPLPEN_disable << 12)

Shifted mode disable for RAC_RX

Definition at line 4083 of file efr32bg21_rac.h .

#define RAC_RX_SYPFDCHPLPEN_enable ( _RAC_RX_SYPFDCHPLPEN_enable << 12)

Shifted mode enable for RAC_RX

Definition at line 4084 of file efr32bg21_rac.h .

#define RAC_RX_SYPFDFPWEN (0x1UL << 13)

SYPFDFPWEN

Definition at line 4085 of file efr32bg21_rac.h .

#define RAC_RX_SYPFDFPWEN_DEFAULT ( _RAC_RX_SYPFDFPWEN_DEFAULT << 13)

Shifted mode DEFAULT for RAC_RX

Definition at line 4091 of file efr32bg21_rac.h .

#define RAC_RX_SYPFDFPWEN_disable ( _RAC_RX_SYPFDFPWEN_disable << 13)

Shifted mode disable for RAC_RX

Definition at line 4092 of file efr32bg21_rac.h .

#define RAC_RX_SYPFDFPWEN_enable ( _RAC_RX_SYPFDFPWEN_enable << 13)

Shifted mode enable for RAC_RX

Definition at line 4093 of file efr32bg21_rac.h .

#define RAC_RXENSRCEN_CHANNELBUSYEN (0x1UL << 8)

Channel Busy Enable

Definition at line 502 of file efr32bg21_rac.h .

#define RAC_RXENSRCEN_CHANNELBUSYEN_DEFAULT ( _RAC_RXENSRCEN_CHANNELBUSYEN_DEFAULT << 8)

Shifted mode DEFAULT for RAC_RXENSRCEN

Definition at line 506 of file efr32bg21_rac.h .

#define RAC_RXENSRCEN_DEMODRXREQEN (0x1UL << 12)

DEMOD RX Request Enable

Definition at line 522 of file efr32bg21_rac.h .

#define RAC_RXENSRCEN_DEMODRXREQEN_DEFAULT ( _RAC_RXENSRCEN_DEMODRXREQEN_DEFAULT << 12)

Shifted mode DEFAULT for RAC_RXENSRCEN

Definition at line 526 of file efr32bg21_rac.h .

#define RAC_RXENSRCEN_FRAMEDETEN (0x1UL << 11)

Frame Detected Enable

Definition at line 517 of file efr32bg21_rac.h .

#define RAC_RXENSRCEN_FRAMEDETEN_DEFAULT ( _RAC_RXENSRCEN_FRAMEDETEN_DEFAULT << 11)

Shifted mode DEFAULT for RAC_RXENSRCEN

Definition at line 521 of file efr32bg21_rac.h .

#define RAC_RXENSRCEN_PREDETEN (0x1UL << 10)

Preamble Detected Enable

Definition at line 512 of file efr32bg21_rac.h .

#define RAC_RXENSRCEN_PREDETEN_DEFAULT ( _RAC_RXENSRCEN_PREDETEN_DEFAULT << 10)

Shifted mode DEFAULT for RAC_RXENSRCEN

Definition at line 516 of file efr32bg21_rac.h .

#define RAC_RXENSRCEN_PRSRXEN (0x1UL << 13)

PRS RX Enable

Definition at line 527 of file efr32bg21_rac.h .

#define RAC_RXENSRCEN_PRSRXEN_DEFAULT ( _RAC_RXENSRCEN_PRSRXEN_DEFAULT << 13)

Shifted mode DEFAULT for RAC_RXENSRCEN

Definition at line 531 of file efr32bg21_rac.h .

#define RAC_RXENSRCEN_SWRXEN_DEFAULT ( _RAC_RXENSRCEN_SWRXEN_DEFAULT << 0)

Shifted mode DEFAULT for RAC_RXENSRCEN

Definition at line 501 of file efr32bg21_rac.h .

#define RAC_RXENSRCEN_TIMDETEN (0x1UL << 9)

Timing Detected Enable

Definition at line 507 of file efr32bg21_rac.h .

#define RAC_RXENSRCEN_TIMDETEN_DEFAULT ( _RAC_RXENSRCEN_TIMDETEN_DEFAULT << 9)

Shifted mode DEFAULT for RAC_RXENSRCEN

Definition at line 511 of file efr32bg21_rac.h .

#define RAC_SCRATCH0_SCRATCH0_DEFAULT ( _RAC_SCRATCH0_SCRATCH0_DEFAULT << 0)

Shifted mode DEFAULT for RAC_SCRATCH0

Definition at line 4983 of file efr32bg21_rac.h .

#define RAC_SCRATCH1_SCRATCH1_DEFAULT ( _RAC_SCRATCH1_SCRATCH1_DEFAULT << 0)

Shifted mode DEFAULT for RAC_SCRATCH1

Definition at line 4991 of file efr32bg21_rac.h .

#define RAC_SCRATCH2_SCRATCH2_DEFAULT ( _RAC_SCRATCH2_SCRATCH2_DEFAULT << 0)

Shifted mode DEFAULT for RAC_SCRATCH2

Definition at line 4999 of file efr32bg21_rac.h .

#define RAC_SCRATCH3_SCRATCH3_DEFAULT ( _RAC_SCRATCH3_SCRATCH3_DEFAULT << 0)

Shifted mode DEFAULT for RAC_SCRATCH3

Definition at line 5007 of file efr32bg21_rac.h .

#define RAC_SCRATCH4_SCRATCH4_DEFAULT ( _RAC_SCRATCH4_SCRATCH4_DEFAULT << 0)

Shifted mode DEFAULT for RAC_SCRATCH4

Definition at line 5015 of file efr32bg21_rac.h .

#define RAC_SCRATCH5_SCRATCH5_DEFAULT ( _RAC_SCRATCH5_SCRATCH5_DEFAULT << 0)

Shifted mode DEFAULT for RAC_SCRATCH5

Definition at line 5023 of file efr32bg21_rac.h .

#define RAC_SCRATCH6_SCRATCH6_DEFAULT ( _RAC_SCRATCH6_SCRATCH6_DEFAULT << 0)

Shifted mode DEFAULT for RAC_SCRATCH6

Definition at line 5031 of file efr32bg21_rac.h .

#define RAC_SCRATCH7_SCRATCH7_DEFAULT ( _RAC_SCRATCH7_SCRATCH7_DEFAULT << 0)

Shifted mode DEFAULT for RAC_SCRATCH7

Definition at line 5039 of file efr32bg21_rac.h .

#define RAC_SEQCMD_ABORT (0x1UL << 5)

Sequencer Execution Abort

Definition at line 959 of file efr32bg21_rac.h .

#define RAC_SEQCMD_ABORT_DEFAULT ( _RAC_SEQCMD_ABORT_DEFAULT << 5)

Shifted mode DEFAULT for RAC_SEQCMD

Definition at line 963 of file efr32bg21_rac.h .

#define RAC_SEQCMD_ABORTENCLEAR (0x1UL << 7)

Clear Sequencer Abort Enable

Definition at line 969 of file efr32bg21_rac.h .

#define RAC_SEQCMD_ABORTENCLEAR_DEFAULT ( _RAC_SEQCMD_ABORTENCLEAR_DEFAULT << 7)

Shifted mode DEFAULT for RAC_SEQCMD

Definition at line 973 of file efr32bg21_rac.h .

#define RAC_SEQCMD_ABORTENSET (0x1UL << 6)

Set Sequencer Abort Enable

Definition at line 964 of file efr32bg21_rac.h .

#define RAC_SEQCMD_ABORTENSET_DEFAULT ( _RAC_SEQCMD_ABORTENSET_DEFAULT << 6)

Shifted mode DEFAULT for RAC_SEQCMD

Definition at line 968 of file efr32bg21_rac.h .

#define RAC_SEQCMD_BKPTDIS (0x1UL << 4)

Breakpoint Disable

Definition at line 954 of file efr32bg21_rac.h .

#define RAC_SEQCMD_BKPTDIS_DEFAULT ( _RAC_SEQCMD_BKPTDIS_DEFAULT << 4)

Shifted mode DEFAULT for RAC_SEQCMD

Definition at line 958 of file efr32bg21_rac.h .

#define RAC_SEQCMD_BKPTEN (0x1UL << 3)

Breakpoint Enable

Definition at line 949 of file efr32bg21_rac.h .

#define RAC_SEQCMD_BKPTEN_DEFAULT ( _RAC_SEQCMD_BKPTEN_DEFAULT << 3)

Shifted mode DEFAULT for RAC_SEQCMD

Definition at line 953 of file efr32bg21_rac.h .

#define RAC_SEQCMD_HALT (0x1UL << 0)

Sequencer Halt

Definition at line 934 of file efr32bg21_rac.h .

#define RAC_SEQCMD_HALT_DEFAULT ( _RAC_SEQCMD_HALT_DEFAULT << 0)

Shifted mode DEFAULT for RAC_SEQCMD

Definition at line 938 of file efr32bg21_rac.h .

#define RAC_SEQCMD_RESUME (0x1UL << 2)

Sequencer Resume

Definition at line 944 of file efr32bg21_rac.h .

#define RAC_SEQCMD_RESUME_DEFAULT ( _RAC_SEQCMD_RESUME_DEFAULT << 2)

Shifted mode DEFAULT for RAC_SEQCMD

Definition at line 948 of file efr32bg21_rac.h .

#define RAC_SEQCMD_STEP (0x1UL << 1)

Sequencer Step

Definition at line 939 of file efr32bg21_rac.h .

#define RAC_SEQCMD_STEP_DEFAULT ( _RAC_SEQCMD_STEP_DEFAULT << 1)

Shifted mode DEFAULT for RAC_SEQCMD

Definition at line 943 of file efr32bg21_rac.h .

#define RAC_SEQCTRL_COMPACT (0x1UL << 0)

STIMER Compare Action

Definition at line 1131 of file efr32bg21_rac.h .

#define RAC_SEQCTRL_COMPACT_CONTINUE ( _RAC_SEQCTRL_COMPACT_CONTINUE << 0)

Shifted mode CONTINUE for RAC_SEQCTRL

Definition at line 1139 of file efr32bg21_rac.h .

#define RAC_SEQCTRL_COMPACT_DEFAULT ( _RAC_SEQCTRL_COMPACT_DEFAULT << 0)

Shifted mode DEFAULT for RAC_SEQCTRL

Definition at line 1137 of file efr32bg21_rac.h .

#define RAC_SEQCTRL_COMPACT_WRAP ( _RAC_SEQCTRL_COMPACT_WRAP << 0)

Shifted mode WRAP for RAC_SEQCTRL

Definition at line 1138 of file efr32bg21_rac.h .

#define RAC_SEQCTRL_COMPINVALMODE_COMPEVENT ( _RAC_SEQCTRL_COMPINVALMODE_COMPEVENT << 1)

Shifted mode COMPEVENT for RAC_SEQCTRL

Definition at line 1150 of file efr32bg21_rac.h .

#define RAC_SEQCTRL_COMPINVALMODE_DEFAULT ( _RAC_SEQCTRL_COMPINVALMODE_DEFAULT << 1)

Shifted mode DEFAULT for RAC_SEQCTRL

Definition at line 1147 of file efr32bg21_rac.h .

#define RAC_SEQCTRL_COMPINVALMODE_NEVER ( _RAC_SEQCTRL_COMPINVALMODE_NEVER << 1)

Shifted mode NEVER for RAC_SEQCTRL

Definition at line 1148 of file efr32bg21_rac.h .

#define RAC_SEQCTRL_COMPINVALMODE_STATECHANGE ( _RAC_SEQCTRL_COMPINVALMODE_STATECHANGE << 1)

Shifted mode STATECHANGE for RAC_SEQCTRL

Definition at line 1149 of file efr32bg21_rac.h .

#define RAC_SEQCTRL_COMPINVALMODE_STATECOMP ( _RAC_SEQCTRL_COMPINVALMODE_STATECOMP << 1)

Shifted mode STATECOMP for RAC_SEQCTRL

Definition at line 1151 of file efr32bg21_rac.h .

#define RAC_SEQCTRL_CPUHALTREQEN (0x1UL << 11)

CPU Halt Request Enable

Definition at line 1161 of file efr32bg21_rac.h .

#define RAC_SEQCTRL_CPUHALTREQEN_DEFAULT ( _RAC_SEQCTRL_CPUHALTREQEN_DEFAULT << 11)

Shifted mode DEFAULT for RAC_SEQCTRL

Definition at line 1167 of file efr32bg21_rac.h .

#define RAC_SEQCTRL_CPUHALTREQEN_X0 ( _RAC_SEQCTRL_CPUHALTREQEN_X0 << 11)

Shifted mode X0 for RAC_SEQCTRL

Definition at line 1168 of file efr32bg21_rac.h .

#define RAC_SEQCTRL_CPUHALTREQEN_X1 ( _RAC_SEQCTRL_CPUHALTREQEN_X1 << 11)

Shifted mode X1 for RAC_SEQCTRL

Definition at line 1169 of file efr32bg21_rac.h .

#define RAC_SEQCTRL_SEQHALTUPONCPUHALTEN (0x1UL << 12)

Sequencer Halt Upon CPU Halt Enable

Definition at line 1170 of file efr32bg21_rac.h .

#define RAC_SEQCTRL_SEQHALTUPONCPUHALTEN_DEFAULT ( _RAC_SEQCTRL_SEQHALTUPONCPUHALTEN_DEFAULT << 12)

Shifted mode DEFAULT for RAC_SEQCTRL

Definition at line 1176 of file efr32bg21_rac.h .

#define RAC_SEQCTRL_SEQHALTUPONCPUHALTEN_X0 ( _RAC_SEQCTRL_SEQHALTUPONCPUHALTEN_X0 << 12)

Shifted mode X0 for RAC_SEQCTRL

Definition at line 1177 of file efr32bg21_rac.h .

#define RAC_SEQCTRL_SEQHALTUPONCPUHALTEN_X1 ( _RAC_SEQCTRL_SEQHALTUPONCPUHALTEN_X1 << 12)

Shifted mode X1 for RAC_SEQCTRL

Definition at line 1178 of file efr32bg21_rac.h .

#define RAC_SEQCTRL_STIMERDEBUGRUN (0x1UL << 10)

STIMER Debug Run

Definition at line 1152 of file efr32bg21_rac.h .

#define RAC_SEQCTRL_STIMERDEBUGRUN_DEFAULT ( _RAC_SEQCTRL_STIMERDEBUGRUN_DEFAULT << 10)

Shifted mode DEFAULT for RAC_SEQCTRL

Definition at line 1158 of file efr32bg21_rac.h .

#define RAC_SEQCTRL_STIMERDEBUGRUN_X0 ( _RAC_SEQCTRL_STIMERDEBUGRUN_X0 << 10)

Shifted mode X0 for RAC_SEQCTRL

Definition at line 1159 of file efr32bg21_rac.h .

#define RAC_SEQCTRL_STIMERDEBUGRUN_X1 ( _RAC_SEQCTRL_STIMERDEBUGRUN_X1 << 10)

Shifted mode X1 for RAC_SEQCTRL

Definition at line 1160 of file efr32bg21_rac.h .

#define RAC_SEQSTATUS_ABORTEN (0x1UL << 10)

Sequencer Program Execution Abort Enable

Definition at line 921 of file efr32bg21_rac.h .

#define RAC_SEQSTATUS_ABORTEN_DEFAULT ( _RAC_SEQSTATUS_ABORTEN_DEFAULT << 10)

Shifted mode DEFAULT for RAC_SEQSTATUS

Definition at line 927 of file efr32bg21_rac.h .

#define RAC_SEQSTATUS_ABORTEN_X0 ( _RAC_SEQSTATUS_ABORTEN_X0 << 10)

Shifted mode X0 for RAC_SEQSTATUS

Definition at line 928 of file efr32bg21_rac.h .

#define RAC_SEQSTATUS_ABORTEN_X1 ( _RAC_SEQSTATUS_ABORTEN_X1 << 10)

Shifted mode X1 for RAC_SEQSTATUS

Definition at line 929 of file efr32bg21_rac.h .

#define RAC_SEQSTATUS_BKPT (0x1UL << 1)

Breakpoint Enabled

Definition at line 877 of file efr32bg21_rac.h .

#define RAC_SEQSTATUS_BKPT_DEFAULT ( _RAC_SEQSTATUS_BKPT_DEFAULT << 1)

Shifted mode DEFAULT for RAC_SEQSTATUS

Definition at line 881 of file efr32bg21_rac.h .

#define RAC_SEQSTATUS_CARRY (0x1UL << 8)

Carry Flag

Definition at line 916 of file efr32bg21_rac.h .

#define RAC_SEQSTATUS_CARRY_DEFAULT ( _RAC_SEQSTATUS_CARRY_DEFAULT << 8)

Shifted mode DEFAULT for RAC_SEQSTATUS

Definition at line 920 of file efr32bg21_rac.h .

#define RAC_SEQSTATUS_DONE (0x1UL << 4)

Sequencer Done Signal

Definition at line 896 of file efr32bg21_rac.h .

#define RAC_SEQSTATUS_DONE_DEFAULT ( _RAC_SEQSTATUS_DONE_DEFAULT << 4)

Shifted mode DEFAULT for RAC_SEQSTATUS

Definition at line 900 of file efr32bg21_rac.h .

#define RAC_SEQSTATUS_NEG (0x1UL << 5)

Negative Flag

Definition at line 901 of file efr32bg21_rac.h .

#define RAC_SEQSTATUS_NEG_DEFAULT ( _RAC_SEQSTATUS_NEG_DEFAULT << 5)

Shifted mode DEFAULT for RAC_SEQSTATUS

Definition at line 905 of file efr32bg21_rac.h .

#define RAC_SEQSTATUS_POS (0x1UL << 6)

Positive Flag

Definition at line 906 of file efr32bg21_rac.h .

#define RAC_SEQSTATUS_POS_DEFAULT ( _RAC_SEQSTATUS_POS_DEFAULT << 6)

Shifted mode DEFAULT for RAC_SEQSTATUS

Definition at line 910 of file efr32bg21_rac.h .

#define RAC_SEQSTATUS_STOPPED (0x1UL << 0)

Sequencer Stopped

Definition at line 872 of file efr32bg21_rac.h .

#define RAC_SEQSTATUS_STOPPED_DEFAULT ( _RAC_SEQSTATUS_STOPPED_DEFAULT << 0)

Shifted mode DEFAULT for RAC_SEQSTATUS

Definition at line 876 of file efr32bg21_rac.h .

#define RAC_SEQSTATUS_WAITING (0x1UL << 2)

Sequencer Waiting

Definition at line 882 of file efr32bg21_rac.h .

#define RAC_SEQSTATUS_WAITING_DEFAULT ( _RAC_SEQSTATUS_WAITING_DEFAULT << 2)

Shifted mode DEFAULT for RAC_SEQSTATUS

Definition at line 886 of file efr32bg21_rac.h .

#define RAC_SEQSTATUS_WAITMODE (0x1UL << 3)

Sequencer Waiting Mode

Definition at line 887 of file efr32bg21_rac.h .

#define RAC_SEQSTATUS_WAITMODE_ALL ( _RAC_SEQSTATUS_WAITMODE_ALL << 3)

Shifted mode ALL for RAC_SEQSTATUS

Definition at line 895 of file efr32bg21_rac.h .

#define RAC_SEQSTATUS_WAITMODE_ANY ( _RAC_SEQSTATUS_WAITMODE_ANY << 3)

Shifted mode ANY for RAC_SEQSTATUS

Definition at line 894 of file efr32bg21_rac.h .

#define RAC_SEQSTATUS_WAITMODE_DEFAULT ( _RAC_SEQSTATUS_WAITMODE_DEFAULT << 3)

Shifted mode DEFAULT for RAC_SEQSTATUS

Definition at line 893 of file efr32bg21_rac.h .

#define RAC_SEQSTATUS_ZERO (0x1UL << 7)

Zero Flag

Definition at line 911 of file efr32bg21_rac.h .

#define RAC_SEQSTATUS_ZERO_DEFAULT ( _RAC_SEQSTATUS_ZERO_DEFAULT << 7)

Shifted mode DEFAULT for RAC_SEQSTATUS

Definition at line 915 of file efr32bg21_rac.h .

#define RAC_SR0_SR0_DEFAULT ( _RAC_SR0_SR0_DEFAULT << 0)

Shifted mode DEFAULT for RAC_SR0

Definition at line 1194 of file efr32bg21_rac.h .

#define RAC_SR1_SR1_DEFAULT ( _RAC_SR1_SR1_DEFAULT << 0)

Shifted mode DEFAULT for RAC_SR1

Definition at line 1202 of file efr32bg21_rac.h .

#define RAC_SR2_SR2_DEFAULT ( _RAC_SR2_SR2_DEFAULT << 0)

Shifted mode DEFAULT for RAC_SR2

Definition at line 1210 of file efr32bg21_rac.h .

#define RAC_SR3_SR3_DEFAULT ( _RAC_SR3_SR3_DEFAULT << 0)

Shifted mode DEFAULT for RAC_SR3

Definition at line 1218 of file efr32bg21_rac.h .

#define RAC_STATUS2_PREVSTATE1_DEFAULT ( _RAC_STATUS2_PREVSTATE1_DEFAULT << 0)

Shifted mode DEFAULT for RAC_STATUS2

Definition at line 1340 of file efr32bg21_rac.h .

#define RAC_STATUS2_PREVSTATE1_OFF ( _RAC_STATUS2_PREVSTATE1_OFF << 0)

Shifted mode OFF for RAC_STATUS2

Definition at line 1341 of file efr32bg21_rac.h .

#define RAC_STATUS2_PREVSTATE1_RX2RX ( _RAC_STATUS2_PREVSTATE1_RX2RX << 0)

Shifted mode RX2RX for RAC_STATUS2

Definition at line 1346 of file efr32bg21_rac.h .

#define RAC_STATUS2_PREVSTATE1_RX2TX ( _RAC_STATUS2_PREVSTATE1_RX2TX << 0)

Shifted mode RX2TX for RAC_STATUS2

Definition at line 1348 of file efr32bg21_rac.h .

#define RAC_STATUS2_PREVSTATE1_RXFRAME ( _RAC_STATUS2_PREVSTATE1_RXFRAME << 0)

Shifted mode RXFRAME for RAC_STATUS2

Definition at line 1344 of file efr32bg21_rac.h .

#define RAC_STATUS2_PREVSTATE1_RXOVERFLOW ( _RAC_STATUS2_PREVSTATE1_RXOVERFLOW << 0)

Shifted mode RXOVERFLOW for RAC_STATUS2

Definition at line 1347 of file efr32bg21_rac.h .

#define RAC_STATUS2_PREVSTATE1_RXPD ( _RAC_STATUS2_PREVSTATE1_RXPD << 0)

Shifted mode RXPD for RAC_STATUS2

Definition at line 1345 of file efr32bg21_rac.h .

#define RAC_STATUS2_PREVSTATE1_RXSEARCH ( _RAC_STATUS2_PREVSTATE1_RXSEARCH << 0)

Shifted mode RXSEARCH for RAC_STATUS2

Definition at line 1343 of file efr32bg21_rac.h .

#define RAC_STATUS2_PREVSTATE1_RXWARM ( _RAC_STATUS2_PREVSTATE1_RXWARM << 0)

Shifted mode RXWARM for RAC_STATUS2

Definition at line 1342 of file efr32bg21_rac.h .

#define RAC_STATUS2_PREVSTATE1_SHUTDOWN ( _RAC_STATUS2_PREVSTATE1_SHUTDOWN << 0)

Shifted mode SHUTDOWN for RAC_STATUS2

Definition at line 1354 of file efr32bg21_rac.h .

#define RAC_STATUS2_PREVSTATE1_TX ( _RAC_STATUS2_PREVSTATE1_TX << 0)

Shifted mode TX for RAC_STATUS2

Definition at line 1350 of file efr32bg21_rac.h .

#define RAC_STATUS2_PREVSTATE1_TX2RX ( _RAC_STATUS2_PREVSTATE1_TX2RX << 0)

Shifted mode TX2RX for RAC_STATUS2

Definition at line 1352 of file efr32bg21_rac.h .

#define RAC_STATUS2_PREVSTATE1_TX2TX ( _RAC_STATUS2_PREVSTATE1_TX2TX << 0)

Shifted mode TX2TX for RAC_STATUS2

Definition at line 1353 of file efr32bg21_rac.h .

#define RAC_STATUS2_PREVSTATE1_TXPD ( _RAC_STATUS2_PREVSTATE1_TXPD << 0)

Shifted mode TXPD for RAC_STATUS2

Definition at line 1351 of file efr32bg21_rac.h .

#define RAC_STATUS2_PREVSTATE1_TXWARM ( _RAC_STATUS2_PREVSTATE1_TXWARM << 0)

Shifted mode TXWARM for RAC_STATUS2

Definition at line 1349 of file efr32bg21_rac.h .

#define RAC_STATUS2_PREVSTATE2_DEFAULT ( _RAC_STATUS2_PREVSTATE2_DEFAULT << 4)

Shifted mode DEFAULT for RAC_STATUS2

Definition at line 1372 of file efr32bg21_rac.h .

#define RAC_STATUS2_PREVSTATE2_OFF ( _RAC_STATUS2_PREVSTATE2_OFF << 4)

Shifted mode OFF for RAC_STATUS2

Definition at line 1373 of file efr32bg21_rac.h .

#define RAC_STATUS2_PREVSTATE2_RX2RX ( _RAC_STATUS2_PREVSTATE2_RX2RX << 4)

Shifted mode RX2RX for RAC_STATUS2

Definition at line 1378 of file efr32bg21_rac.h .

#define RAC_STATUS2_PREVSTATE2_RX2TX ( _RAC_STATUS2_PREVSTATE2_RX2TX << 4)

Shifted mode RX2TX for RAC_STATUS2

Definition at line 1380 of file efr32bg21_rac.h .

#define RAC_STATUS2_PREVSTATE2_RXFRAME ( _RAC_STATUS2_PREVSTATE2_RXFRAME << 4)

Shifted mode RXFRAME for RAC_STATUS2

Definition at line 1376 of file efr32bg21_rac.h .

#define RAC_STATUS2_PREVSTATE2_RXOVERFLOW ( _RAC_STATUS2_PREVSTATE2_RXOVERFLOW << 4)

Shifted mode RXOVERFLOW for RAC_STATUS2

Definition at line 1379 of file efr32bg21_rac.h .

#define RAC_STATUS2_PREVSTATE2_RXPD ( _RAC_STATUS2_PREVSTATE2_RXPD << 4)

Shifted mode RXPD for RAC_STATUS2

Definition at line 1377 of file efr32bg21_rac.h .

#define RAC_STATUS2_PREVSTATE2_RXSEARCH ( _RAC_STATUS2_PREVSTATE2_RXSEARCH << 4)

Shifted mode RXSEARCH for RAC_STATUS2

Definition at line 1375 of file efr32bg21_rac.h .

#define RAC_STATUS2_PREVSTATE2_RXWARM ( _RAC_STATUS2_PREVSTATE2_RXWARM << 4)

Shifted mode RXWARM for RAC_STATUS2

Definition at line 1374 of file efr32bg21_rac.h .

#define RAC_STATUS2_PREVSTATE2_SHUTDOWN ( _RAC_STATUS2_PREVSTATE2_SHUTDOWN << 4)

Shifted mode SHUTDOWN for RAC_STATUS2

Definition at line 1386 of file efr32bg21_rac.h .

#define RAC_STATUS2_PREVSTATE2_TX ( _RAC_STATUS2_PREVSTATE2_TX << 4)

Shifted mode TX for RAC_STATUS2

Definition at line 1382 of file efr32bg21_rac.h .

#define RAC_STATUS2_PREVSTATE2_TX2RX ( _RAC_STATUS2_PREVSTATE2_TX2RX << 4)

Shifted mode TX2RX for RAC_STATUS2

Definition at line 1384 of file efr32bg21_rac.h .

#define RAC_STATUS2_PREVSTATE2_TX2TX ( _RAC_STATUS2_PREVSTATE2_TX2TX << 4)

Shifted mode TX2TX for RAC_STATUS2

Definition at line 1385 of file efr32bg21_rac.h .

#define RAC_STATUS2_PREVSTATE2_TXPD ( _RAC_STATUS2_PREVSTATE2_TXPD << 4)

Shifted mode TXPD for RAC_STATUS2

Definition at line 1383 of file efr32bg21_rac.h .

#define RAC_STATUS2_PREVSTATE2_TXWARM ( _RAC_STATUS2_PREVSTATE2_TXWARM << 4)

Shifted mode TXWARM for RAC_STATUS2

Definition at line 1381 of file efr32bg21_rac.h .

#define RAC_STATUS2_PREVSTATE3_DEFAULT ( _RAC_STATUS2_PREVSTATE3_DEFAULT << 8)

Shifted mode DEFAULT for RAC_STATUS2

Definition at line 1404 of file efr32bg21_rac.h .

#define RAC_STATUS2_PREVSTATE3_OFF ( _RAC_STATUS2_PREVSTATE3_OFF << 8)

Shifted mode OFF for RAC_STATUS2

Definition at line 1405 of file efr32bg21_rac.h .

#define RAC_STATUS2_PREVSTATE3_RX2RX ( _RAC_STATUS2_PREVSTATE3_RX2RX << 8)

Shifted mode RX2RX for RAC_STATUS2

Definition at line 1410 of file efr32bg21_rac.h .

#define RAC_STATUS2_PREVSTATE3_RX2TX ( _RAC_STATUS2_PREVSTATE3_RX2TX << 8)

Shifted mode RX2TX for RAC_STATUS2

Definition at line 1412 of file efr32bg21_rac.h .

#define RAC_STATUS2_PREVSTATE3_RXFRAME ( _RAC_STATUS2_PREVSTATE3_RXFRAME << 8)

Shifted mode RXFRAME for RAC_STATUS2

Definition at line 1408 of file efr32bg21_rac.h .

#define RAC_STATUS2_PREVSTATE3_RXOVERFLOW ( _RAC_STATUS2_PREVSTATE3_RXOVERFLOW << 8)

Shifted mode RXOVERFLOW for RAC_STATUS2

Definition at line 1411 of file efr32bg21_rac.h .

#define RAC_STATUS2_PREVSTATE3_RXPD ( _RAC_STATUS2_PREVSTATE3_RXPD << 8)

Shifted mode RXPD for RAC_STATUS2

Definition at line 1409 of file efr32bg21_rac.h .

#define RAC_STATUS2_PREVSTATE3_RXSEARCH ( _RAC_STATUS2_PREVSTATE3_RXSEARCH << 8)

Shifted mode RXSEARCH for RAC_STATUS2

Definition at line 1407 of file efr32bg21_rac.h .

#define RAC_STATUS2_PREVSTATE3_RXWARM ( _RAC_STATUS2_PREVSTATE3_RXWARM << 8)

Shifted mode RXWARM for RAC_STATUS2

Definition at line 1406 of file efr32bg21_rac.h .

#define RAC_STATUS2_PREVSTATE3_SHUTDOWN ( _RAC_STATUS2_PREVSTATE3_SHUTDOWN << 8)

Shifted mode SHUTDOWN for RAC_STATUS2

Definition at line 1418 of file efr32bg21_rac.h .

#define RAC_STATUS2_PREVSTATE3_TX ( _RAC_STATUS2_PREVSTATE3_TX << 8)

Shifted mode TX for RAC_STATUS2

Definition at line 1414 of file efr32bg21_rac.h .

#define RAC_STATUS2_PREVSTATE3_TX2RX ( _RAC_STATUS2_PREVSTATE3_TX2RX << 8)

Shifted mode TX2RX for RAC_STATUS2

Definition at line 1416 of file efr32bg21_rac.h .

#define RAC_STATUS2_PREVSTATE3_TX2TX ( _RAC_STATUS2_PREVSTATE3_TX2TX << 8)

Shifted mode TX2TX for RAC_STATUS2

Definition at line 1417 of file efr32bg21_rac.h .

#define RAC_STATUS2_PREVSTATE3_TXPD ( _RAC_STATUS2_PREVSTATE3_TXPD << 8)

Shifted mode TXPD for RAC_STATUS2

Definition at line 1415 of file efr32bg21_rac.h .

#define RAC_STATUS2_PREVSTATE3_TXWARM ( _RAC_STATUS2_PREVSTATE3_TXWARM << 8)

Shifted mode TXWARM for RAC_STATUS2

Definition at line 1413 of file efr32bg21_rac.h .

#define RAC_STATUS_FORCESTATEACTIVE (0x1UL << 19)

FSM state force active

Definition at line 540 of file efr32bg21_rac.h .

#define RAC_STATUS_FORCESTATEACTIVE_DEFAULT ( _RAC_STATUS_FORCESTATEACTIVE_DEFAULT << 19)

Shifted mode DEFAULT for RAC_STATUS

Definition at line 546 of file efr32bg21_rac.h .

#define RAC_STATUS_FORCESTATEACTIVE_X0 ( _RAC_STATUS_FORCESTATEACTIVE_X0 << 19)

Shifted mode X0 for RAC_STATUS

Definition at line 547 of file efr32bg21_rac.h .

#define RAC_STATUS_FORCESTATEACTIVE_X1 ( _RAC_STATUS_FORCESTATEACTIVE_X1 << 19)

Shifted mode X1 for RAC_STATUS

Definition at line 548 of file efr32bg21_rac.h .

#define RAC_STATUS_RXENS (0x1UL << 31)

RXEN Status

Definition at line 608 of file efr32bg21_rac.h .

#define RAC_STATUS_RXENS_DEFAULT ( _RAC_STATUS_RXENS_DEFAULT << 31)

Shifted mode DEFAULT for RAC_STATUS

Definition at line 614 of file efr32bg21_rac.h .

#define RAC_STATUS_RXENS_X0 ( _RAC_STATUS_RXENS_X0 << 31)

Shifted mode X0 for RAC_STATUS

Definition at line 615 of file efr32bg21_rac.h .

#define RAC_STATUS_RXENS_X1 ( _RAC_STATUS_RXENS_X1 << 31)

Shifted mode X1 for RAC_STATUS

Definition at line 616 of file efr32bg21_rac.h .

#define RAC_STATUS_RXMASK_DEFAULT ( _RAC_STATUS_RXMASK_DEFAULT << 0)

Shifted mode DEFAULT for RAC_STATUS

Definition at line 539 of file efr32bg21_rac.h .

#define RAC_STATUS_STATE_DEFAULT ( _RAC_STATUS_STATE_DEFAULT << 24)

Shifted mode DEFAULT for RAC_STATUS

Definition at line 584 of file efr32bg21_rac.h .

#define RAC_STATUS_STATE_OFF ( _RAC_STATUS_STATE_OFF << 24)

Shifted mode OFF for RAC_STATUS

Definition at line 585 of file efr32bg21_rac.h .

#define RAC_STATUS_STATE_RX2RX ( _RAC_STATUS_STATE_RX2RX << 24)

Shifted mode RX2RX for RAC_STATUS

Definition at line 590 of file efr32bg21_rac.h .

#define RAC_STATUS_STATE_RX2TX ( _RAC_STATUS_STATE_RX2TX << 24)

Shifted mode RX2TX for RAC_STATUS

Definition at line 592 of file efr32bg21_rac.h .

#define RAC_STATUS_STATE_RXFRAME ( _RAC_STATUS_STATE_RXFRAME << 24)

Shifted mode RXFRAME for RAC_STATUS

Definition at line 588 of file efr32bg21_rac.h .

#define RAC_STATUS_STATE_RXOVERFLOW ( _RAC_STATUS_STATE_RXOVERFLOW << 24)

Shifted mode RXOVERFLOW for RAC_STATUS

Definition at line 591 of file efr32bg21_rac.h .

#define RAC_STATUS_STATE_RXPD ( _RAC_STATUS_STATE_RXPD << 24)

Shifted mode RXPD for RAC_STATUS

Definition at line 589 of file efr32bg21_rac.h .

#define RAC_STATUS_STATE_RXSEARCH ( _RAC_STATUS_STATE_RXSEARCH << 24)

Shifted mode RXSEARCH for RAC_STATUS

Definition at line 587 of file efr32bg21_rac.h .

#define RAC_STATUS_STATE_RXWARM ( _RAC_STATUS_STATE_RXWARM << 24)

Shifted mode RXWARM for RAC_STATUS

Definition at line 586 of file efr32bg21_rac.h .

#define RAC_STATUS_STATE_SHUTDOWN ( _RAC_STATUS_STATE_SHUTDOWN << 24)

Shifted mode SHUTDOWN for RAC_STATUS

Definition at line 598 of file efr32bg21_rac.h .

#define RAC_STATUS_STATE_TX ( _RAC_STATUS_STATE_TX << 24)

Shifted mode TX for RAC_STATUS

Definition at line 594 of file efr32bg21_rac.h .

#define RAC_STATUS_STATE_TX2RX ( _RAC_STATUS_STATE_TX2RX << 24)

Shifted mode TX2RX for RAC_STATUS

Definition at line 596 of file efr32bg21_rac.h .

#define RAC_STATUS_STATE_TX2TX ( _RAC_STATUS_STATE_TX2TX << 24)

Shifted mode TX2TX for RAC_STATUS

Definition at line 597 of file efr32bg21_rac.h .

#define RAC_STATUS_STATE_TXPD ( _RAC_STATUS_STATE_TXPD << 24)

Shifted mode TXPD for RAC_STATUS

Definition at line 595 of file efr32bg21_rac.h .

#define RAC_STATUS_STATE_TXWARM ( _RAC_STATUS_STATE_TXWARM << 24)

Shifted mode TXWARM for RAC_STATUS

Definition at line 593 of file efr32bg21_rac.h .

#define RAC_STATUS_TXAFTERFRAMEACTIVE (0x1UL << 21)

TX After Frame Active

Definition at line 558 of file efr32bg21_rac.h .

#define RAC_STATUS_TXAFTERFRAMEACTIVE_DEFAULT ( _RAC_STATUS_TXAFTERFRAMEACTIVE_DEFAULT << 21)

Shifted mode DEFAULT for RAC_STATUS

Definition at line 564 of file efr32bg21_rac.h .

#define RAC_STATUS_TXAFTERFRAMEACTIVE_X0 ( _RAC_STATUS_TXAFTERFRAMEACTIVE_X0 << 21)

Shifted mode X0 for RAC_STATUS

Definition at line 565 of file efr32bg21_rac.h .

#define RAC_STATUS_TXAFTERFRAMEACTIVE_X1 ( _RAC_STATUS_TXAFTERFRAMEACTIVE_X1 << 21)

Shifted mode X1 for RAC_STATUS

Definition at line 566 of file efr32bg21_rac.h .

#define RAC_STATUS_TXAFTERFRAMEPEND (0x1UL << 20)

TX After Frame Pending

Definition at line 549 of file efr32bg21_rac.h .

#define RAC_STATUS_TXAFTERFRAMEPEND_DEFAULT ( _RAC_STATUS_TXAFTERFRAMEPEND_DEFAULT << 20)

Shifted mode DEFAULT for RAC_STATUS

Definition at line 555 of file efr32bg21_rac.h .

#define RAC_STATUS_TXAFTERFRAMEPEND_X0 ( _RAC_STATUS_TXAFTERFRAMEPEND_X0 << 20)

Shifted mode X0 for RAC_STATUS

Definition at line 556 of file efr32bg21_rac.h .

#define RAC_STATUS_TXAFTERFRAMEPEND_X1 ( _RAC_STATUS_TXAFTERFRAMEPEND_X1 << 20)

Shifted mode X1 for RAC_STATUS

Definition at line 557 of file efr32bg21_rac.h .

#define RAC_STATUS_TXENS (0x1UL << 30)

TXEN Status

Definition at line 599 of file efr32bg21_rac.h .

#define RAC_STATUS_TXENS_DEFAULT ( _RAC_STATUS_TXENS_DEFAULT << 30)

Shifted mode DEFAULT for RAC_STATUS

Definition at line 605 of file efr32bg21_rac.h .

#define RAC_STATUS_TXENS_X0 ( _RAC_STATUS_TXENS_X0 << 30)

Shifted mode X0 for RAC_STATUS

Definition at line 606 of file efr32bg21_rac.h .

#define RAC_STATUS_TXENS_X1 ( _RAC_STATUS_TXENS_X1 << 30)

Shifted mode X1 for RAC_STATUS

Definition at line 607 of file efr32bg21_rac.h .

#define RAC_STIMER_STIMER_DEFAULT ( _RAC_STIMER_STIMER_DEFAULT << 0)

Shifted mode DEFAULT for RAC_STIMER

Definition at line 1110 of file efr32bg21_rac.h .

#define RAC_STIMERCOMP_STIMERCOMP_DEFAULT ( _RAC_STIMERCOMP_STIMERCOMP_DEFAULT << 0)

Shifted mode DEFAULT for RAC_STIMERCOMP

Definition at line 1118 of file efr32bg21_rac.h .

#define RAC_SYCAL_SYHILOADCHPREG_DEFAULT ( _RAC_SYCAL_SYHILOADCHPREG_DEFAULT << 24)

Shifted mode DEFAULT for RAC_SYCAL

Definition at line 4562 of file efr32bg21_rac.h .

#define RAC_SYCAL_SYHILOADCHPREG_i_350uA ( _RAC_SYCAL_SYHILOADCHPREG_i_350uA << 24)

Shifted mode i_350uA for RAC_SYCAL

Definition at line 4563 of file efr32bg21_rac.h .

#define RAC_SYCAL_SYHILOADCHPREG_i_500uA ( _RAC_SYCAL_SYHILOADCHPREG_i_500uA << 24)

Shifted mode i_500uA for RAC_SYCAL

Definition at line 4564 of file efr32bg21_rac.h .

#define RAC_SYCAL_SYHILOADCHPREG_i_550uA ( _RAC_SYCAL_SYHILOADCHPREG_i_550uA << 24)

Shifted mode i_550uA for RAC_SYCAL

Definition at line 4565 of file efr32bg21_rac.h .

#define RAC_SYCAL_SYHILOADCHPREG_i_700uA ( _RAC_SYCAL_SYHILOADCHPREG_i_700uA << 24)

Shifted mode i_700uA for RAC_SYCAL

Definition at line 4566 of file efr32bg21_rac.h .

#define RAC_SYCAL_SYVCOMODEPKD (0x1UL << 8)

SYVCOMODEPKD

Definition at line 4524 of file efr32bg21_rac.h .

#define RAC_SYCAL_SYVCOMODEPKD_DEFAULT ( _RAC_SYCAL_SYVCOMODEPKD_DEFAULT << 8)

Shifted mode DEFAULT for RAC_SYCAL

Definition at line 4530 of file efr32bg21_rac.h .

#define RAC_SYCAL_SYVCOMODEPKD_t_openloop_0 ( _RAC_SYCAL_SYVCOMODEPKD_t_openloop_0 << 8)

Shifted mode t_openloop_0 for RAC_SYCAL

Definition at line 4531 of file efr32bg21_rac.h .

#define RAC_SYCAL_SYVCOMODEPKD_t_pkdetect_1 ( _RAC_SYCAL_SYVCOMODEPKD_t_pkdetect_1 << 8)

Shifted mode t_pkdetect_1 for RAC_SYCAL

Definition at line 4532 of file efr32bg21_rac.h .

#define RAC_SYCAL_SYVCOMORECURRENT (0x1UL << 9)

SYVCOMORECURRENT

Definition at line 4533 of file efr32bg21_rac.h .

#define RAC_SYCAL_SYVCOMORECURRENT_DEFAULT ( _RAC_SYCAL_SYVCOMORECURRENT_DEFAULT << 9)

Shifted mode DEFAULT for RAC_SYCAL

Definition at line 4539 of file efr32bg21_rac.h .

#define RAC_SYCAL_SYVCOMORECURRENT_more_current_0 ( _RAC_SYCAL_SYVCOMORECURRENT_more_current_0 << 9)

Shifted mode more_current_0 for RAC_SYCAL

Definition at line 4540 of file efr32bg21_rac.h .

#define RAC_SYCAL_SYVCOMORECURRENT_more_current_1 ( _RAC_SYCAL_SYVCOMORECURRENT_more_current_1 << 9)

Shifted mode more_current_1 for RAC_SYCAL

Definition at line 4541 of file efr32bg21_rac.h .

#define RAC_SYCAL_SYVCOSLOWNOISEFILTER (0x1UL << 10)

SYVCOSLOWNOISEFILTER

Definition at line 4542 of file efr32bg21_rac.h .

#define RAC_SYCAL_SYVCOSLOWNOISEFILTER_DEFAULT ( _RAC_SYCAL_SYVCOSLOWNOISEFILTER_DEFAULT << 10)

Shifted mode DEFAULT for RAC_SYCAL

Definition at line 4548 of file efr32bg21_rac.h .

#define RAC_SYCAL_SYVCOSLOWNOISEFILTER_slow_noise_filter_0 ( _RAC_SYCAL_SYVCOSLOWNOISEFILTER_slow_noise_filter_0 << 10)

Shifted mode slow_noise_filter_0 for RAC_SYCAL

Definition at line 4549 of file efr32bg21_rac.h .

#define RAC_SYCAL_SYVCOSLOWNOISEFILTER_slow_noise_filter_1 ( _RAC_SYCAL_SYVCOSLOWNOISEFILTER_slow_noise_filter_1 << 10)

Shifted mode slow_noise_filter_1 for RAC_SYCAL

Definition at line 4550 of file efr32bg21_rac.h .

#define RAC_SYCAL_SYVCOVCAPVCM_DEFAULT ( _RAC_SYCAL_SYVCOVCAPVCM_DEFAULT << 15)

Shifted mode DEFAULT for RAC_SYCAL

Definition at line 4554 of file efr32bg21_rac.h .

#define RAC_SYEN_SYCHPEN (0x1UL << 0)

SYCHPEN

Definition at line 4571 of file efr32bg21_rac.h .

#define RAC_SYEN_SYCHPEN_DEFAULT ( _RAC_SYEN_SYCHPEN_DEFAULT << 0)

Shifted mode DEFAULT for RAC_SYEN

Definition at line 4577 of file efr32bg21_rac.h .

#define RAC_SYEN_SYCHPEN_disable ( _RAC_SYEN_SYCHPEN_disable << 0)

Shifted mode disable for RAC_SYEN

Definition at line 4578 of file efr32bg21_rac.h .

#define RAC_SYEN_SYCHPEN_enable ( _RAC_SYEN_SYCHPEN_enable << 0)

Shifted mode enable for RAC_SYEN

Definition at line 4579 of file efr32bg21_rac.h .

#define RAC_SYEN_SYCHPLPEN (0x1UL << 1)

SYCHPLPEN

Definition at line 4580 of file efr32bg21_rac.h .

#define RAC_SYEN_SYCHPLPEN_DEFAULT ( _RAC_SYEN_SYCHPLPEN_DEFAULT << 1)

Shifted mode DEFAULT for RAC_SYEN

Definition at line 4586 of file efr32bg21_rac.h .

#define RAC_SYEN_SYCHPLPEN_disable ( _RAC_SYEN_SYCHPLPEN_disable << 1)

Shifted mode disable for RAC_SYEN

Definition at line 4587 of file efr32bg21_rac.h .

#define RAC_SYEN_SYCHPLPEN_enable ( _RAC_SYEN_SYCHPLPEN_enable << 1)

Shifted mode enable for RAC_SYEN

Definition at line 4588 of file efr32bg21_rac.h .

#define RAC_SYEN_SYENCHPREG (0x1UL << 2)

SYENCHPREG

Definition at line 4589 of file efr32bg21_rac.h .

#define RAC_SYEN_SYENCHPREG_DEFAULT ( _RAC_SYEN_SYENCHPREG_DEFAULT << 2)

Shifted mode DEFAULT for RAC_SYEN

Definition at line 4595 of file efr32bg21_rac.h .

#define RAC_SYEN_SYENCHPREG_Disable ( _RAC_SYEN_SYENCHPREG_Disable << 2)

Shifted mode Disable for RAC_SYEN

Definition at line 4596 of file efr32bg21_rac.h .

#define RAC_SYEN_SYENCHPREG_Enable ( _RAC_SYEN_SYENCHPREG_Enable << 2)

Shifted mode Enable for RAC_SYEN

Definition at line 4597 of file efr32bg21_rac.h .

#define RAC_SYEN_SYENCHPREPLICA (0x1UL << 3)

SYENCHPREPLICA

Definition at line 4598 of file efr32bg21_rac.h .

#define RAC_SYEN_SYENCHPREPLICA_DEFAULT ( _RAC_SYEN_SYENCHPREPLICA_DEFAULT << 3)

Shifted mode DEFAULT for RAC_SYEN

Definition at line 4604 of file efr32bg21_rac.h .

#define RAC_SYEN_SYENCHPREPLICA_disable ( _RAC_SYEN_SYENCHPREPLICA_disable << 3)

Shifted mode disable for RAC_SYEN

Definition at line 4605 of file efr32bg21_rac.h .

#define RAC_SYEN_SYENCHPREPLICA_enable ( _RAC_SYEN_SYENCHPREPLICA_enable << 3)

Shifted mode enable for RAC_SYEN

Definition at line 4606 of file efr32bg21_rac.h .

#define RAC_SYEN_SYENMMDREG (0x1UL << 4)

SYENMMDREG

Definition at line 4607 of file efr32bg21_rac.h .

#define RAC_SYEN_SYENMMDREG_DEFAULT ( _RAC_SYEN_SYENMMDREG_DEFAULT << 4)

Shifted mode DEFAULT for RAC_SYEN

Definition at line 4613 of file efr32bg21_rac.h .

#define RAC_SYEN_SYENMMDREG_Disable ( _RAC_SYEN_SYENMMDREG_Disable << 4)

Shifted mode Disable for RAC_SYEN

Definition at line 4614 of file efr32bg21_rac.h .

#define RAC_SYEN_SYENMMDREG_Enable ( _RAC_SYEN_SYENMMDREG_Enable << 4)

Shifted mode Enable for RAC_SYEN

Definition at line 4615 of file efr32bg21_rac.h .

#define RAC_SYEN_SYENMMDREPLICA1 (0x1UL << 5)

SYENMMDREPLICA1

Definition at line 4616 of file efr32bg21_rac.h .

#define RAC_SYEN_SYENMMDREPLICA1_DEFAULT ( _RAC_SYEN_SYENMMDREPLICA1_DEFAULT << 5)

Shifted mode DEFAULT for RAC_SYEN

Definition at line 4622 of file efr32bg21_rac.h .

#define RAC_SYEN_SYENMMDREPLICA1_disable ( _RAC_SYEN_SYENMMDREPLICA1_disable << 5)

Shifted mode disable for RAC_SYEN

Definition at line 4623 of file efr32bg21_rac.h .

#define RAC_SYEN_SYENMMDREPLICA1_enable ( _RAC_SYEN_SYENMMDREPLICA1_enable << 5)

Shifted mode enable for RAC_SYEN

Definition at line 4624 of file efr32bg21_rac.h .

#define RAC_SYEN_SYENMMDREPLICA2 (0x1UL << 6)

SYENMMDREPLICA2

Definition at line 4625 of file efr32bg21_rac.h .

#define RAC_SYEN_SYENMMDREPLICA2_DEFAULT ( _RAC_SYEN_SYENMMDREPLICA2_DEFAULT << 6)

Shifted mode DEFAULT for RAC_SYEN

Definition at line 4631 of file efr32bg21_rac.h .

#define RAC_SYEN_SYENMMDREPLICA2_Disable ( _RAC_SYEN_SYENMMDREPLICA2_Disable << 6)

Shifted mode Disable for RAC_SYEN

Definition at line 4632 of file efr32bg21_rac.h .

#define RAC_SYEN_SYENMMDREPLICA2_Enable ( _RAC_SYEN_SYENMMDREPLICA2_Enable << 6)

Shifted mode Enable for RAC_SYEN

Definition at line 4633 of file efr32bg21_rac.h .

#define RAC_SYEN_SYENVCOBIAS (0x1UL << 7)

SYENVCOBIAS

Definition at line 4634 of file efr32bg21_rac.h .

#define RAC_SYEN_SYENVCOBIAS_DEFAULT ( _RAC_SYEN_SYENVCOBIAS_DEFAULT << 7)

Shifted mode DEFAULT for RAC_SYEN

Definition at line 4640 of file efr32bg21_rac.h .

#define RAC_SYEN_SYENVCOBIAS_en_vco_bias_0 ( _RAC_SYEN_SYENVCOBIAS_en_vco_bias_0 << 7)

Shifted mode en_vco_bias_0 for RAC_SYEN

Definition at line 4641 of file efr32bg21_rac.h .

#define RAC_SYEN_SYENVCOBIAS_en_vco_bias_1 ( _RAC_SYEN_SYENVCOBIAS_en_vco_bias_1 << 7)

Shifted mode en_vco_bias_1 for RAC_SYEN

Definition at line 4642 of file efr32bg21_rac.h .

#define RAC_SYEN_SYENVCOPFET (0x1UL << 8)

SYENVCOPFET

Definition at line 4643 of file efr32bg21_rac.h .

#define RAC_SYEN_SYENVCOPFET_DEFAULT ( _RAC_SYEN_SYENVCOPFET_DEFAULT << 8)

Shifted mode DEFAULT for RAC_SYEN

Definition at line 4649 of file efr32bg21_rac.h .

#define RAC_SYEN_SYENVCOPFET_en_vco_pfet_0 ( _RAC_SYEN_SYENVCOPFET_en_vco_pfet_0 << 8)

Shifted mode en_vco_pfet_0 for RAC_SYEN

Definition at line 4650 of file efr32bg21_rac.h .

#define RAC_SYEN_SYENVCOPFET_en_vco_pfet_1 ( _RAC_SYEN_SYENVCOPFET_en_vco_pfet_1 << 8)

Shifted mode en_vco_pfet_1 for RAC_SYEN

Definition at line 4651 of file efr32bg21_rac.h .

#define RAC_SYEN_SYENVCOREG (0x1UL << 9)

SYENVCOREG

Definition at line 4652 of file efr32bg21_rac.h .

#define RAC_SYEN_SYENVCOREG_DEFAULT ( _RAC_SYEN_SYENVCOREG_DEFAULT << 9)

Shifted mode DEFAULT for RAC_SYEN

Definition at line 4658 of file efr32bg21_rac.h .

#define RAC_SYEN_SYENVCOREG_en_vco_reg_0 ( _RAC_SYEN_SYENVCOREG_en_vco_reg_0 << 9)

Shifted mode en_vco_reg_0 for RAC_SYEN

Definition at line 4659 of file efr32bg21_rac.h .

#define RAC_SYEN_SYENVCOREG_en_vco_reg_1 ( _RAC_SYEN_SYENVCOREG_en_vco_reg_1 << 9)

Shifted mode en_vco_reg_1 for RAC_SYEN

Definition at line 4660 of file efr32bg21_rac.h .

#define RAC_SYEN_SYLODIVEN (0x1UL << 10)

SYLODIVEN

Definition at line 4661 of file efr32bg21_rac.h .

#define RAC_SYEN_SYLODIVEN_DEFAULT ( _RAC_SYEN_SYLODIVEN_DEFAULT << 10)

Shifted mode DEFAULT for RAC_SYEN

Definition at line 4667 of file efr32bg21_rac.h .

#define RAC_SYEN_SYLODIVEN_disable ( _RAC_SYEN_SYLODIVEN_disable << 10)

Shifted mode disable for RAC_SYEN

Definition at line 4668 of file efr32bg21_rac.h .

#define RAC_SYEN_SYLODIVEN_enable ( _RAC_SYEN_SYLODIVEN_enable << 10)

Shifted mode enable for RAC_SYEN

Definition at line 4669 of file efr32bg21_rac.h .

#define RAC_SYEN_SYLODIVLDOBIASEN (0x1UL << 11)

SYLODIVLDOBIASEN

Definition at line 4670 of file efr32bg21_rac.h .

#define RAC_SYEN_SYLODIVLDOBIASEN_DEFAULT ( _RAC_SYEN_SYLODIVLDOBIASEN_DEFAULT << 11)

Shifted mode DEFAULT for RAC_SYEN

Definition at line 4676 of file efr32bg21_rac.h .

#define RAC_SYEN_SYLODIVLDOBIASEN_disable ( _RAC_SYEN_SYLODIVLDOBIASEN_disable << 11)

Shifted mode disable for RAC_SYEN

Definition at line 4677 of file efr32bg21_rac.h .

#define RAC_SYEN_SYLODIVLDOBIASEN_enable ( _RAC_SYEN_SYLODIVLDOBIASEN_enable << 11)

Shifted mode enable for RAC_SYEN

Definition at line 4678 of file efr32bg21_rac.h .

#define RAC_SYEN_SYLODIVLDOEN (0x1UL << 12)

SYLODIVLDOEN

Definition at line 4679 of file efr32bg21_rac.h .

#define RAC_SYEN_SYLODIVLDOEN_DEFAULT ( _RAC_SYEN_SYLODIVLDOEN_DEFAULT << 12)

Shifted mode DEFAULT for RAC_SYEN

Definition at line 4685 of file efr32bg21_rac.h .

#define RAC_SYEN_SYLODIVLDOEN_disable ( _RAC_SYEN_SYLODIVLDOEN_disable << 12)

Shifted mode disable for RAC_SYEN

Definition at line 4686 of file efr32bg21_rac.h .

#define RAC_SYEN_SYLODIVLDOEN_enable ( _RAC_SYEN_SYLODIVLDOEN_enable << 12)

Shifted mode enable for RAC_SYEN

Definition at line 4687 of file efr32bg21_rac.h .

#define RAC_SYEN_SYSTARTCHPREG (0x1UL << 13)

SYSTARTCHPREG

Definition at line 4688 of file efr32bg21_rac.h .

#define RAC_SYEN_SYSTARTCHPREG_DEFAULT ( _RAC_SYEN_SYSTARTCHPREG_DEFAULT << 13)

Shifted mode DEFAULT for RAC_SYEN

Definition at line 4694 of file efr32bg21_rac.h .

#define RAC_SYEN_SYSTARTCHPREG_fast_startup ( _RAC_SYEN_SYSTARTCHPREG_fast_startup << 13)

Shifted mode fast_startup for RAC_SYEN

Definition at line 4696 of file efr32bg21_rac.h .

#define RAC_SYEN_SYSTARTCHPREG_no_fast_startup ( _RAC_SYEN_SYSTARTCHPREG_no_fast_startup << 13)

Shifted mode no_fast_startup for RAC_SYEN

Definition at line 4695 of file efr32bg21_rac.h .

#define RAC_SYEN_SYSTARTMMDREG (0x1UL << 14)

SYSTARTMMDREG

Definition at line 4697 of file efr32bg21_rac.h .

#define RAC_SYEN_SYSTARTMMDREG_DEFAULT ( _RAC_SYEN_SYSTARTMMDREG_DEFAULT << 14)

Shifted mode DEFAULT for RAC_SYEN

Definition at line 4703 of file efr32bg21_rac.h .

#define RAC_SYEN_SYSTARTMMDREG_fast_startup ( _RAC_SYEN_SYSTARTMMDREG_fast_startup << 14)

Shifted mode fast_startup for RAC_SYEN

Definition at line 4705 of file efr32bg21_rac.h .

#define RAC_SYEN_SYSTARTMMDREG_no_fast_startup ( _RAC_SYEN_SYSTARTMMDREG_no_fast_startup << 14)

Shifted mode no_fast_startup for RAC_SYEN

Definition at line 4704 of file efr32bg21_rac.h .

#define RAC_SYLOEN_SYLODIVRLO12G4EN (0x1UL << 1)

SYLODIVRLO12G4EN

Definition at line 4719 of file efr32bg21_rac.h .

#define RAC_SYLOEN_SYLODIVRLO12G4EN_DEFAULT ( _RAC_SYLOEN_SYLODIVRLO12G4EN_DEFAULT << 1)

Shifted mode DEFAULT for RAC_SYLOEN

Definition at line 4725 of file efr32bg21_rac.h .

#define RAC_SYLOEN_SYLODIVRLO12G4EN_disable ( _RAC_SYLOEN_SYLODIVRLO12G4EN_disable << 1)

Shifted mode disable for RAC_SYLOEN

Definition at line 4726 of file efr32bg21_rac.h .

#define RAC_SYLOEN_SYLODIVRLO12G4EN_enable ( _RAC_SYLOEN_SYLODIVRLO12G4EN_enable << 1)

Shifted mode enable for RAC_SYLOEN

Definition at line 4727 of file efr32bg21_rac.h .

#define RAC_SYLOEN_SYLODIVRLO22G4EN (0x1UL << 3)

SYLODIVRLO22G4EN

Definition at line 4728 of file efr32bg21_rac.h .

#define RAC_SYLOEN_SYLODIVRLO22G4EN_DEFAULT ( _RAC_SYLOEN_SYLODIVRLO22G4EN_DEFAULT << 3)

Shifted mode DEFAULT for RAC_SYLOEN

Definition at line 4734 of file efr32bg21_rac.h .

#define RAC_SYLOEN_SYLODIVRLO22G4EN_disable ( _RAC_SYLOEN_SYLODIVRLO22G4EN_disable << 3)

Shifted mode disable for RAC_SYLOEN

Definition at line 4735 of file efr32bg21_rac.h .

#define RAC_SYLOEN_SYLODIVRLO22G4EN_enable ( _RAC_SYLOEN_SYLODIVRLO22G4EN_enable << 3)

Shifted mode enable for RAC_SYLOEN

Definition at line 4736 of file efr32bg21_rac.h .

#define RAC_SYLOEN_SYLODIVRLOADCCLK2G4EN (0x1UL << 0)

SYLODIVRLOADCCLK2G4EN

Definition at line 4710 of file efr32bg21_rac.h .

#define RAC_SYLOEN_SYLODIVRLOADCCLK2G4EN_DEFAULT ( _RAC_SYLOEN_SYLODIVRLOADCCLK2G4EN_DEFAULT << 0)

Shifted mode DEFAULT for RAC_SYLOEN

Definition at line 4716 of file efr32bg21_rac.h .

#define RAC_SYLOEN_SYLODIVRLOADCCLK2G4EN_disable ( _RAC_SYLOEN_SYLODIVRLOADCCLK2G4EN_disable << 0)

Shifted mode disable for RAC_SYLOEN

Definition at line 4717 of file efr32bg21_rac.h .

#define RAC_SYLOEN_SYLODIVRLOADCCLK2G4EN_enable ( _RAC_SYLOEN_SYLODIVRLOADCCLK2G4EN_enable << 0)

Shifted mode enable for RAC_SYLOEN

Definition at line 4718 of file efr32bg21_rac.h .

#define RAC_SYLOEN_SYLODIVTLO0DBM2G4AUXEN (0x1UL << 5)

SYLODIVTLO0DBM2G4AUXEN

Definition at line 4737 of file efr32bg21_rac.h .

#define RAC_SYLOEN_SYLODIVTLO0DBM2G4AUXEN_DEFAULT ( _RAC_SYLOEN_SYLODIVTLO0DBM2G4AUXEN_DEFAULT << 5)

Shifted mode DEFAULT for RAC_SYLOEN

Definition at line 4743 of file efr32bg21_rac.h .

#define RAC_SYLOEN_SYLODIVTLO0DBM2G4AUXEN_disable ( _RAC_SYLOEN_SYLODIVTLO0DBM2G4AUXEN_disable << 5)

Shifted mode disable for RAC_SYLOEN

Definition at line 4744 of file efr32bg21_rac.h .

#define RAC_SYLOEN_SYLODIVTLO0DBM2G4AUXEN_enable ( _RAC_SYLOEN_SYLODIVTLO0DBM2G4AUXEN_enable << 5)

Shifted mode enable for RAC_SYLOEN

Definition at line 4745 of file efr32bg21_rac.h .

#define RAC_SYLOEN_SYLODIVTLO0DBM2G4EN (0x1UL << 6)

SYLODIVTLO0DBM2G4EN

Definition at line 4746 of file efr32bg21_rac.h .

#define RAC_SYLOEN_SYLODIVTLO0DBM2G4EN_DEFAULT ( _RAC_SYLOEN_SYLODIVTLO0DBM2G4EN_DEFAULT << 6)

Shifted mode DEFAULT for RAC_SYLOEN

Definition at line 4752 of file efr32bg21_rac.h .

#define RAC_SYLOEN_SYLODIVTLO0DBM2G4EN_disable ( _RAC_SYLOEN_SYLODIVTLO0DBM2G4EN_disable << 6)

Shifted mode disable for RAC_SYLOEN

Definition at line 4753 of file efr32bg21_rac.h .

#define RAC_SYLOEN_SYLODIVTLO0DBM2G4EN_enable ( _RAC_SYLOEN_SYLODIVTLO0DBM2G4EN_enable << 6)

Shifted mode enable for RAC_SYLOEN

Definition at line 4754 of file efr32bg21_rac.h .

#define RAC_SYLOEN_SYLODIVTLO20DBM2G4AUXEN (0x1UL << 9)

SYLODIVTLO20DBM2G4AUXEN

Definition at line 4755 of file efr32bg21_rac.h .

#define RAC_SYLOEN_SYLODIVTLO20DBM2G4AUXEN_DEFAULT ( _RAC_SYLOEN_SYLODIVTLO20DBM2G4AUXEN_DEFAULT << 9)

Shifted mode DEFAULT for RAC_SYLOEN

Definition at line 4761 of file efr32bg21_rac.h .

#define RAC_SYLOEN_SYLODIVTLO20DBM2G4AUXEN_disable ( _RAC_SYLOEN_SYLODIVTLO20DBM2G4AUXEN_disable << 9)

Shifted mode disable for RAC_SYLOEN

Definition at line 4762 of file efr32bg21_rac.h .

#define RAC_SYLOEN_SYLODIVTLO20DBM2G4AUXEN_enable ( _RAC_SYLOEN_SYLODIVTLO20DBM2G4AUXEN_enable << 9)

Shifted mode enable for RAC_SYLOEN

Definition at line 4763 of file efr32bg21_rac.h .

#define RAC_SYLOEN_SYLODIVTLO20DBM2G4EN (0x1UL << 10)

SYLODIVTLO20DBM2G4EN

Definition at line 4764 of file efr32bg21_rac.h .

#define RAC_SYLOEN_SYLODIVTLO20DBM2G4EN_DEFAULT ( _RAC_SYLOEN_SYLODIVTLO20DBM2G4EN_DEFAULT << 10)

Shifted mode DEFAULT for RAC_SYLOEN

Definition at line 4770 of file efr32bg21_rac.h .

#define RAC_SYLOEN_SYLODIVTLO20DBM2G4EN_disable ( _RAC_SYLOEN_SYLODIVTLO20DBM2G4EN_disable << 10)

Shifted mode disable for RAC_SYLOEN

Definition at line 4771 of file efr32bg21_rac.h .

#define RAC_SYLOEN_SYLODIVTLO20DBM2G4EN_enable ( _RAC_SYLOEN_SYLODIVTLO20DBM2G4EN_enable << 10)

Shifted mode enable for RAC_SYLOEN

Definition at line 4772 of file efr32bg21_rac.h .

#define RAC_SYMMDCTRL_SYMMDDIVRSDIG_DEFAULT ( _RAC_SYMMDCTRL_SYMMDDIVRSDIG_DEFAULT << 1)

Shifted mode DEFAULT for RAC_SYMMDCTRL

Definition at line 4793 of file efr32bg21_rac.h .

#define RAC_SYMMDCTRL_SYMMDDIVRSDIG_Divideby1 ( _RAC_SYMMDCTRL_SYMMDDIVRSDIG_Divideby1 << 1)

Shifted mode Divideby1 for RAC_SYMMDCTRL

Definition at line 4794 of file efr32bg21_rac.h .

#define RAC_SYMMDCTRL_SYMMDDIVRSDIG_Divideby2 ( _RAC_SYMMDCTRL_SYMMDDIVRSDIG_Divideby2 << 1)

Shifted mode Divideby2 for RAC_SYMMDCTRL

Definition at line 4795 of file efr32bg21_rac.h .

#define RAC_SYMMDCTRL_SYMMDDIVRSDIG_Divideby4 ( _RAC_SYMMDCTRL_SYMMDDIVRSDIG_Divideby4 << 1)

Shifted mode Divideby4 for RAC_SYMMDCTRL

Definition at line 4796 of file efr32bg21_rac.h .

#define RAC_SYMMDCTRL_SYMMDDIVRSDIG_Divideby8 ( _RAC_SYMMDCTRL_SYMMDDIVRSDIG_Divideby8 << 1)

Shifted mode Divideby8 for RAC_SYMMDCTRL

Definition at line 4797 of file efr32bg21_rac.h .

#define RAC_SYMMDCTRL_SYMMDENRSDIG (0x1UL << 0)

SYMMDENRSDIG

Definition at line 4777 of file efr32bg21_rac.h .

#define RAC_SYMMDCTRL_SYMMDENRSDIG_DEFAULT ( _RAC_SYMMDCTRL_SYMMDENRSDIG_DEFAULT << 0)

Shifted mode DEFAULT for RAC_SYMMDCTRL

Definition at line 4783 of file efr32bg21_rac.h .

#define RAC_SYMMDCTRL_SYMMDENRSDIG_disable ( _RAC_SYMMDCTRL_SYMMDENRSDIG_disable << 0)

Shifted mode disable for RAC_SYMMDCTRL

Definition at line 4784 of file efr32bg21_rac.h .

#define RAC_SYMMDCTRL_SYMMDENRSDIG_enable ( _RAC_SYMMDCTRL_SYMMDENRSDIG_enable << 0)

Shifted mode enable for RAC_SYMMDCTRL

Definition at line 4785 of file efr32bg21_rac.h .

#define RAC_SYNTHCTRL_MMDPOWERBALANCEDISABLE (0x1UL << 10)

SYMMDPOWERBALANCEENB

Definition at line 1310 of file efr32bg21_rac.h .

#define RAC_SYNTHCTRL_MMDPOWERBALANCEDISABLE_DEFAULT ( _RAC_SYNTHCTRL_MMDPOWERBALANCEDISABLE_DEFAULT << 10)

Shifted mode DEFAULT for RAC_SYNTHCTRL

Definition at line 1316 of file efr32bg21_rac.h .

#define RAC_SYNTHCTRL_MMDPOWERBALANCEDISABLE_DisablePowerBleed ( _RAC_SYNTHCTRL_MMDPOWERBALANCEDISABLE_DisablePowerBleed << 10)

Shifted mode DisablePowerBleed for RAC_SYNTHCTRL

Definition at line 1318 of file efr32bg21_rac.h .

#define RAC_SYNTHCTRL_MMDPOWERBALANCEDISABLE_EnablePowerbleed ( _RAC_SYNTHCTRL_MMDPOWERBALANCEDISABLE_EnablePowerbleed << 10)

Shifted mode EnablePowerbleed for RAC_SYNTHCTRL

Definition at line 1317 of file efr32bg21_rac.h .

#define RAC_SYNTHENCTRL_LPFBWSEL (0x1UL << 20)

LPF bandwidth register selection

Definition at line 1241 of file efr32bg21_rac.h .

#define RAC_SYNTHENCTRL_LPFBWSEL_DEFAULT ( _RAC_SYNTHENCTRL_LPFBWSEL_DEFAULT << 20)

Shifted mode DEFAULT for RAC_SYNTHENCTRL

Definition at line 1247 of file efr32bg21_rac.h .

#define RAC_SYNTHENCTRL_LPFBWSEL_LPFBWRX ( _RAC_SYNTHENCTRL_LPFBWSEL_LPFBWRX << 20)

Shifted mode LPFBWRX for RAC_SYNTHENCTRL

Definition at line 1248 of file efr32bg21_rac.h .

#define RAC_SYNTHENCTRL_LPFBWSEL_LPFBWTX ( _RAC_SYNTHENCTRL_LPFBWSEL_LPFBWTX << 20)

Shifted mode LPFBWTX for RAC_SYNTHENCTRL

Definition at line 1249 of file efr32bg21_rac.h .

#define RAC_SYNTHENCTRL_VCBUFEN (0x1UL << 7)

SYLPFVCBUFEN

Definition at line 1232 of file efr32bg21_rac.h .

#define RAC_SYNTHENCTRL_VCBUFEN_DEFAULT ( _RAC_SYNTHENCTRL_VCBUFEN_DEFAULT << 7)

Shifted mode DEFAULT for RAC_SYNTHENCTRL

Definition at line 1238 of file efr32bg21_rac.h .

#define RAC_SYNTHENCTRL_VCBUFEN_Disabled ( _RAC_SYNTHENCTRL_VCBUFEN_Disabled << 7)

Shifted mode Disabled for RAC_SYNTHENCTRL

Definition at line 1239 of file efr32bg21_rac.h .

#define RAC_SYNTHENCTRL_VCBUFEN_Enabled ( _RAC_SYNTHENCTRL_VCBUFEN_Enabled << 7)

Shifted mode Enabled for RAC_SYNTHENCTRL

Definition at line 1240 of file efr32bg21_rac.h .

#define RAC_SYNTHENCTRL_VCOSTARTUP (0x1UL << 1)

SYVCOFASTSTARTUP

Definition at line 1223 of file efr32bg21_rac.h .

#define RAC_SYNTHENCTRL_VCOSTARTUP_DEFAULT ( _RAC_SYNTHENCTRL_VCOSTARTUP_DEFAULT << 1)

Shifted mode DEFAULT for RAC_SYNTHENCTRL

Definition at line 1229 of file efr32bg21_rac.h .

#define RAC_SYNTHENCTRL_VCOSTARTUP_fast_start_up_0 ( _RAC_SYNTHENCTRL_VCOSTARTUP_fast_start_up_0 << 1)

Shifted mode fast_start_up_0 for RAC_SYNTHENCTRL

Definition at line 1230 of file efr32bg21_rac.h .

#define RAC_SYNTHENCTRL_VCOSTARTUP_fast_start_up_1 ( _RAC_SYNTHENCTRL_VCOSTARTUP_fast_start_up_1 << 1)

Shifted mode fast_start_up_1 for RAC_SYNTHENCTRL

Definition at line 1231 of file efr32bg21_rac.h .

#define RAC_SYNTHREGCTRL_CHPLDOVREFTRIM_DEFAULT ( _RAC_SYNTHREGCTRL_CHPLDOVREFTRIM_DEFAULT << 24)

Shifted mode DEFAULT for RAC_SYNTHREGCTRL

Definition at line 1285 of file efr32bg21_rac.h .

#define RAC_SYNTHREGCTRL_CHPLDOVREFTRIM_vref0p6000 ( _RAC_SYNTHREGCTRL_CHPLDOVREFTRIM_vref0p6000 << 24)

Shifted mode vref0p6000 for RAC_SYNTHREGCTRL

Definition at line 1286 of file efr32bg21_rac.h .

#define RAC_SYNTHREGCTRL_CHPLDOVREFTRIM_vref0p6125 ( _RAC_SYNTHREGCTRL_CHPLDOVREFTRIM_vref0p6125 << 24)

Shifted mode vref0p6125 for RAC_SYNTHREGCTRL

Definition at line 1287 of file efr32bg21_rac.h .

#define RAC_SYNTHREGCTRL_CHPLDOVREFTRIM_vref0p6250 ( _RAC_SYNTHREGCTRL_CHPLDOVREFTRIM_vref0p6250 << 24)

Shifted mode vref0p6250 for RAC_SYNTHREGCTRL

Definition at line 1288 of file efr32bg21_rac.h .

#define RAC_SYNTHREGCTRL_CHPLDOVREFTRIM_vref0p6375 ( _RAC_SYNTHREGCTRL_CHPLDOVREFTRIM_vref0p6375 << 24)

Shifted mode vref0p6375 for RAC_SYNTHREGCTRL

Definition at line 1289 of file efr32bg21_rac.h .

#define RAC_SYNTHREGCTRL_CHPLDOVREFTRIM_vref0p6500 ( _RAC_SYNTHREGCTRL_CHPLDOVREFTRIM_vref0p6500 << 24)

Shifted mode vref0p6500 for RAC_SYNTHREGCTRL

Definition at line 1290 of file efr32bg21_rac.h .

#define RAC_SYNTHREGCTRL_CHPLDOVREFTRIM_vref0p6625 ( _RAC_SYNTHREGCTRL_CHPLDOVREFTRIM_vref0p6625 << 24)

Shifted mode vref0p6625 for RAC_SYNTHREGCTRL

Definition at line 1291 of file efr32bg21_rac.h .

#define RAC_SYNTHREGCTRL_CHPLDOVREFTRIM_vref0p6750 ( _RAC_SYNTHREGCTRL_CHPLDOVREFTRIM_vref0p6750 << 24)

Shifted mode vref0p6750 for RAC_SYNTHREGCTRL

Definition at line 1292 of file efr32bg21_rac.h .

#define RAC_SYNTHREGCTRL_CHPLDOVREFTRIM_vref0p6875 ( _RAC_SYNTHREGCTRL_CHPLDOVREFTRIM_vref0p6875 << 24)

Shifted mode vref0p6875 for RAC_SYNTHREGCTRL

Definition at line 1293 of file efr32bg21_rac.h .

#define RAC_SYNTHREGCTRL_MMDLDOVREFTRIM_DEFAULT ( _RAC_SYNTHREGCTRL_MMDLDOVREFTRIM_DEFAULT << 10)

Shifted mode DEFAULT for RAC_SYNTHREGCTRL

Definition at line 1265 of file efr32bg21_rac.h .

#define RAC_SYNTHREGCTRL_MMDLDOVREFTRIM_vref0p6000 ( _RAC_SYNTHREGCTRL_MMDLDOVREFTRIM_vref0p6000 << 10)

Shifted mode vref0p6000 for RAC_SYNTHREGCTRL

Definition at line 1266 of file efr32bg21_rac.h .

#define RAC_SYNTHREGCTRL_MMDLDOVREFTRIM_vref0p6125 ( _RAC_SYNTHREGCTRL_MMDLDOVREFTRIM_vref0p6125 << 10)

Shifted mode vref0p6125 for RAC_SYNTHREGCTRL

Definition at line 1267 of file efr32bg21_rac.h .

#define RAC_SYNTHREGCTRL_MMDLDOVREFTRIM_vref0p6250 ( _RAC_SYNTHREGCTRL_MMDLDOVREFTRIM_vref0p6250 << 10)

Shifted mode vref0p6250 for RAC_SYNTHREGCTRL

Definition at line 1268 of file efr32bg21_rac.h .

#define RAC_SYNTHREGCTRL_MMDLDOVREFTRIM_vref0p6375 ( _RAC_SYNTHREGCTRL_MMDLDOVREFTRIM_vref0p6375 << 10)

Shifted mode vref0p6375 for RAC_SYNTHREGCTRL

Definition at line 1269 of file efr32bg21_rac.h .

#define RAC_SYNTHREGCTRL_MMDLDOVREFTRIM_vref0p6500 ( _RAC_SYNTHREGCTRL_MMDLDOVREFTRIM_vref0p6500 << 10)

Shifted mode vref0p6500 for RAC_SYNTHREGCTRL

Definition at line 1270 of file efr32bg21_rac.h .

#define RAC_SYNTHREGCTRL_MMDLDOVREFTRIM_vref0p6625 ( _RAC_SYNTHREGCTRL_MMDLDOVREFTRIM_vref0p6625 << 10)

Shifted mode vref0p6625 for RAC_SYNTHREGCTRL

Definition at line 1271 of file efr32bg21_rac.h .

#define RAC_SYNTHREGCTRL_MMDLDOVREFTRIM_vref0p6750 ( _RAC_SYNTHREGCTRL_MMDLDOVREFTRIM_vref0p6750 << 10)

Shifted mode vref0p6750 for RAC_SYNTHREGCTRL

Definition at line 1272 of file efr32bg21_rac.h .

#define RAC_SYNTHREGCTRL_MMDLDOVREFTRIM_vref0p6875 ( _RAC_SYNTHREGCTRL_MMDLDOVREFTRIM_vref0p6875 << 10)

Shifted mode vref0p6875 for RAC_SYNTHREGCTRL

Definition at line 1273 of file efr32bg21_rac.h .

#define RAC_SYTRIM0_SYCHPBIAS_bias_0 ( _RAC_SYTRIM0_SYCHPBIAS_bias_0 << 0)

Shifted mode bias_0 for RAC_SYTRIM0

Definition at line 4303 of file efr32bg21_rac.h .

#define RAC_SYTRIM0_SYCHPBIAS_bias_1 ( _RAC_SYTRIM0_SYCHPBIAS_bias_1 << 0)

Shifted mode bias_1 for RAC_SYTRIM0

Definition at line 4304 of file efr32bg21_rac.h .

#define RAC_SYTRIM0_SYCHPBIAS_bias_2 ( _RAC_SYTRIM0_SYCHPBIAS_bias_2 << 0)

Shifted mode bias_2 for RAC_SYTRIM0

Definition at line 4305 of file efr32bg21_rac.h .

#define RAC_SYTRIM0_SYCHPBIAS_bias_3 ( _RAC_SYTRIM0_SYCHPBIAS_bias_3 << 0)

Shifted mode bias_3 for RAC_SYTRIM0

Definition at line 4306 of file efr32bg21_rac.h .

#define RAC_SYTRIM0_SYCHPBIAS_DEFAULT ( _RAC_SYTRIM0_SYCHPBIAS_DEFAULT << 0)

Shifted mode DEFAULT for RAC_SYTRIM0

Definition at line 4302 of file efr32bg21_rac.h .

#define RAC_SYTRIM0_SYCHPCURR_curr_1p5uA ( _RAC_SYTRIM0_SYCHPCURR_curr_1p5uA << 3)

Shifted mode curr_1p5uA for RAC_SYTRIM0

Definition at line 4319 of file efr32bg21_rac.h .

#define RAC_SYTRIM0_SYCHPCURR_curr_2p0uA ( _RAC_SYTRIM0_SYCHPCURR_curr_2p0uA << 3)

Shifted mode curr_2p0uA for RAC_SYTRIM0

Definition at line 4320 of file efr32bg21_rac.h .

#define RAC_SYTRIM0_SYCHPCURR_curr_2p5uA ( _RAC_SYTRIM0_SYCHPCURR_curr_2p5uA << 3)

Shifted mode curr_2p5uA for RAC_SYTRIM0

Definition at line 4321 of file efr32bg21_rac.h .

#define RAC_SYTRIM0_SYCHPCURR_curr_3p0uA ( _RAC_SYTRIM0_SYCHPCURR_curr_3p0uA << 3)

Shifted mode curr_3p0uA for RAC_SYTRIM0

Definition at line 4322 of file efr32bg21_rac.h .

#define RAC_SYTRIM0_SYCHPCURR_curr_3p5uA ( _RAC_SYTRIM0_SYCHPCURR_curr_3p5uA << 3)

Shifted mode curr_3p5uA for RAC_SYTRIM0

Definition at line 4323 of file efr32bg21_rac.h .

#define RAC_SYTRIM0_SYCHPCURR_curr_4p0uA ( _RAC_SYTRIM0_SYCHPCURR_curr_4p0uA << 3)

Shifted mode curr_4p0uA for RAC_SYTRIM0

Definition at line 4324 of file efr32bg21_rac.h .

#define RAC_SYTRIM0_SYCHPCURR_curr_4p5uA ( _RAC_SYTRIM0_SYCHPCURR_curr_4p5uA << 3)

Shifted mode curr_4p5uA for RAC_SYTRIM0

Definition at line 4325 of file efr32bg21_rac.h .

#define RAC_SYTRIM0_SYCHPCURR_curr_5p0uA ( _RAC_SYTRIM0_SYCHPCURR_curr_5p0uA << 3)

Shifted mode curr_5p0uA for RAC_SYTRIM0

Definition at line 4326 of file efr32bg21_rac.h .

#define RAC_SYTRIM0_SYCHPCURR_DEFAULT ( _RAC_SYTRIM0_SYCHPCURR_DEFAULT << 3)

Shifted mode DEFAULT for RAC_SYTRIM0

Definition at line 4318 of file efr32bg21_rac.h .

#define RAC_SYTRIM0_SYCHPLEVNSRC_DEFAULT ( _RAC_SYTRIM0_SYCHPLEVNSRC_DEFAULT << 6)

Shifted mode DEFAULT for RAC_SYTRIM0

Definition at line 4330 of file efr32bg21_rac.h .

#define RAC_SYTRIM0_SYCHPLEVPSRC_DEFAULT ( _RAC_SYTRIM0_SYCHPLEVPSRC_DEFAULT << 9)

Shifted mode DEFAULT for RAC_SYTRIM0

Definition at line 4342 of file efr32bg21_rac.h .

#define RAC_SYTRIM0_SYCHPLEVPSRC_vsrcp_n0m ( _RAC_SYTRIM0_SYCHPLEVPSRC_vsrcp_n0m << 9)

Shifted mode vsrcp_n0m for RAC_SYTRIM0

Definition at line 4350 of file efr32bg21_rac.h .

#define RAC_SYTRIM0_SYCHPLEVPSRC_vsrcp_n105m ( _RAC_SYTRIM0_SYCHPLEVPSRC_vsrcp_n105m << 9)

Shifted mode vsrcp_n105m for RAC_SYTRIM0

Definition at line 4343 of file efr32bg21_rac.h .

#define RAC_SYTRIM0_SYCHPLEVPSRC_vsrcp_n15m ( _RAC_SYTRIM0_SYCHPLEVPSRC_vsrcp_n15m << 9)

Shifted mode vsrcp_n15m for RAC_SYTRIM0

Definition at line 4349 of file efr32bg21_rac.h .

#define RAC_SYTRIM0_SYCHPLEVPSRC_vsrcp_n30m ( _RAC_SYTRIM0_SYCHPLEVPSRC_vsrcp_n30m << 9)

Shifted mode vsrcp_n30m for RAC_SYTRIM0

Definition at line 4348 of file efr32bg21_rac.h .

#define RAC_SYTRIM0_SYCHPLEVPSRC_vsrcp_n45m ( _RAC_SYTRIM0_SYCHPLEVPSRC_vsrcp_n45m << 9)

Shifted mode vsrcp_n45m for RAC_SYTRIM0

Definition at line 4347 of file efr32bg21_rac.h .

#define RAC_SYTRIM0_SYCHPLEVPSRC_vsrcp_n60m ( _RAC_SYTRIM0_SYCHPLEVPSRC_vsrcp_n60m << 9)

Shifted mode vsrcp_n60m for RAC_SYTRIM0

Definition at line 4346 of file efr32bg21_rac.h .

#define RAC_SYTRIM0_SYCHPLEVPSRC_vsrcp_n75m ( _RAC_SYTRIM0_SYCHPLEVPSRC_vsrcp_n75m << 9)

Shifted mode vsrcp_n75m for RAC_SYTRIM0

Definition at line 4345 of file efr32bg21_rac.h .

#define RAC_SYTRIM0_SYCHPLEVPSRC_vsrcp_n90m ( _RAC_SYTRIM0_SYCHPLEVPSRC_vsrcp_n90m << 9)

Shifted mode vsrcp_n90m for RAC_SYTRIM0

Definition at line 4344 of file efr32bg21_rac.h .

#define RAC_SYTRIM0_SYCHPREPLICACURRADJ_DEFAULT ( _RAC_SYTRIM0_SYCHPREPLICACURRADJ_DEFAULT << 14)

Shifted mode DEFAULT for RAC_SYTRIM0

Definition at line 4371 of file efr32bg21_rac.h .

#define RAC_SYTRIM0_SYCHPREPLICACURRADJ_load_16ua ( _RAC_SYTRIM0_SYCHPREPLICACURRADJ_load_16ua << 14)

Shifted mode load_16ua for RAC_SYTRIM0

Definition at line 4373 of file efr32bg21_rac.h .

#define RAC_SYTRIM0_SYCHPREPLICACURRADJ_load_20ua ( _RAC_SYTRIM0_SYCHPREPLICACURRADJ_load_20ua << 14)

Shifted mode load_20ua for RAC_SYTRIM0

Definition at line 4374 of file efr32bg21_rac.h .

#define RAC_SYTRIM0_SYCHPREPLICACURRADJ_load_24ua ( _RAC_SYTRIM0_SYCHPREPLICACURRADJ_load_24ua << 14)

Shifted mode load_24ua for RAC_SYTRIM0

Definition at line 4376 of file efr32bg21_rac.h .

#define RAC_SYTRIM0_SYCHPREPLICACURRADJ_load_28ua ( _RAC_SYTRIM0_SYCHPREPLICACURRADJ_load_28ua << 14)

Shifted mode load_28ua for RAC_SYTRIM0

Definition at line 4375 of file efr32bg21_rac.h .

#define RAC_SYTRIM0_SYCHPREPLICACURRADJ_load_32ua ( _RAC_SYTRIM0_SYCHPREPLICACURRADJ_load_32ua << 14)

Shifted mode load_32ua for RAC_SYTRIM0

Definition at line 4377 of file efr32bg21_rac.h .

#define RAC_SYTRIM0_SYCHPREPLICACURRADJ_load_36ua ( _RAC_SYTRIM0_SYCHPREPLICACURRADJ_load_36ua << 14)

Shifted mode load_36ua for RAC_SYTRIM0

Definition at line 4378 of file efr32bg21_rac.h .

#define RAC_SYTRIM0_SYCHPREPLICACURRADJ_load_44ua ( _RAC_SYTRIM0_SYCHPREPLICACURRADJ_load_44ua << 14)

Shifted mode load_44ua for RAC_SYTRIM0

Definition at line 4379 of file efr32bg21_rac.h .

#define RAC_SYTRIM0_SYCHPREPLICACURRADJ_load_8ua ( _RAC_SYTRIM0_SYCHPREPLICACURRADJ_load_8ua << 14)

Shifted mode load_8ua for RAC_SYTRIM0

Definition at line 4372 of file efr32bg21_rac.h .

#define RAC_SYTRIM0_SYCHPSRCEN (0x1UL << 13)

SYCHPSRCEN

Definition at line 4351 of file efr32bg21_rac.h .

#define RAC_SYTRIM0_SYCHPSRCEN_DEFAULT ( _RAC_SYTRIM0_SYCHPSRCEN_DEFAULT << 13)

Shifted mode DEFAULT for RAC_SYTRIM0

Definition at line 4357 of file efr32bg21_rac.h .

#define RAC_SYTRIM0_SYCHPSRCEN_disable ( _RAC_SYTRIM0_SYCHPSRCEN_disable << 13)

Shifted mode disable for RAC_SYTRIM0

Definition at line 4358 of file efr32bg21_rac.h .

#define RAC_SYTRIM0_SYCHPSRCEN_enable ( _RAC_SYTRIM0_SYCHPSRCEN_enable << 13)

Shifted mode enable for RAC_SYTRIM0

Definition at line 4359 of file efr32bg21_rac.h .

#define RAC_SYTRIM0_SYTRIMCHPREGAMPBIAS_bias_14uA ( _RAC_SYTRIM0_SYTRIMCHPREGAMPBIAS_bias_14uA << 17)

Shifted mode bias_14uA for RAC_SYTRIM0

Definition at line 4392 of file efr32bg21_rac.h .

#define RAC_SYTRIM0_SYTRIMCHPREGAMPBIAS_bias_20uA ( _RAC_SYTRIM0_SYTRIMCHPREGAMPBIAS_bias_20uA << 17)

Shifted mode bias_20uA for RAC_SYTRIM0

Definition at line 4393 of file efr32bg21_rac.h .

#define RAC_SYTRIM0_SYTRIMCHPREGAMPBIAS_bias_26uA ( _RAC_SYTRIM0_SYTRIMCHPREGAMPBIAS_bias_26uA << 17)

Shifted mode bias_26uA for RAC_SYTRIM0

Definition at line 4394 of file efr32bg21_rac.h .

#define RAC_SYTRIM0_SYTRIMCHPREGAMPBIAS_bias_32uA ( _RAC_SYTRIM0_SYTRIMCHPREGAMPBIAS_bias_32uA << 17)

Shifted mode bias_32uA for RAC_SYTRIM0

Definition at line 4395 of file efr32bg21_rac.h .

#define RAC_SYTRIM0_SYTRIMCHPREGAMPBIAS_bias_38uA ( _RAC_SYTRIM0_SYTRIMCHPREGAMPBIAS_bias_38uA << 17)

Shifted mode bias_38uA for RAC_SYTRIM0

Definition at line 4396 of file efr32bg21_rac.h .

#define RAC_SYTRIM0_SYTRIMCHPREGAMPBIAS_bias_44uA ( _RAC_SYTRIM0_SYTRIMCHPREGAMPBIAS_bias_44uA << 17)

Shifted mode bias_44uA for RAC_SYTRIM0

Definition at line 4397 of file efr32bg21_rac.h .

#define RAC_SYTRIM0_SYTRIMCHPREGAMPBIAS_bias_50uA ( _RAC_SYTRIM0_SYTRIMCHPREGAMPBIAS_bias_50uA << 17)

Shifted mode bias_50uA for RAC_SYTRIM0

Definition at line 4398 of file efr32bg21_rac.h .

#define RAC_SYTRIM0_SYTRIMCHPREGAMPBIAS_bias_56uA ( _RAC_SYTRIM0_SYTRIMCHPREGAMPBIAS_bias_56uA << 17)

Shifted mode bias_56uA for RAC_SYTRIM0

Definition at line 4399 of file efr32bg21_rac.h .

#define RAC_SYTRIM0_SYTRIMCHPREGAMPBIAS_DEFAULT ( _RAC_SYTRIM0_SYTRIMCHPREGAMPBIAS_DEFAULT << 17)

Shifted mode DEFAULT for RAC_SYTRIM0

Definition at line 4391 of file efr32bg21_rac.h .

#define RAC_SYTRIM0_SYTRIMCHPREGAMPBW_C_000f ( _RAC_SYTRIM0_SYTRIMCHPREGAMPBW_C_000f << 20)

Shifted mode C_000f for RAC_SYTRIM0

Definition at line 4408 of file efr32bg21_rac.h .

#define RAC_SYTRIM0_SYTRIMCHPREGAMPBW_C_300f ( _RAC_SYTRIM0_SYTRIMCHPREGAMPBW_C_300f << 20)

Shifted mode C_300f for RAC_SYTRIM0

Definition at line 4409 of file efr32bg21_rac.h .

#define RAC_SYTRIM0_SYTRIMCHPREGAMPBW_C_600f ( _RAC_SYTRIM0_SYTRIMCHPREGAMPBW_C_600f << 20)

Shifted mode C_600f for RAC_SYTRIM0

Definition at line 4410 of file efr32bg21_rac.h .

#define RAC_SYTRIM0_SYTRIMCHPREGAMPBW_C_900f ( _RAC_SYTRIM0_SYTRIMCHPREGAMPBW_C_900f << 20)

Shifted mode C_900f for RAC_SYTRIM0

Definition at line 4411 of file efr32bg21_rac.h .

#define RAC_SYTRIM0_SYTRIMCHPREGAMPBW_DEFAULT ( _RAC_SYTRIM0_SYTRIMCHPREGAMPBW_DEFAULT << 20)

Shifted mode DEFAULT for RAC_SYTRIM0

Definition at line 4407 of file efr32bg21_rac.h .

#define RAC_SYTRIM1_SYLODIVLDOTRIMCORE_DEFAULT ( _RAC_SYTRIM1_SYLODIVLDOTRIMCORE_DEFAULT << 0)

Shifted mode DEFAULT for RAC_SYTRIM1

Definition at line 4421 of file efr32bg21_rac.h .

#define RAC_SYTRIM1_SYLODIVLDOTRIMCORE_RXLO ( _RAC_SYTRIM1_SYLODIVLDOTRIMCORE_RXLO << 0)

Shifted mode RXLO for RAC_SYTRIM1

Definition at line 4422 of file efr32bg21_rac.h .

#define RAC_SYTRIM1_SYLODIVLDOTRIMCORE_TXLO ( _RAC_SYTRIM1_SYLODIVLDOTRIMCORE_TXLO << 0)

Shifted mode TXLO for RAC_SYTRIM1

Definition at line 4423 of file efr32bg21_rac.h .

#define RAC_SYTRIM1_SYLODIVLDOTRIMNDIO_DEFAULT ( _RAC_SYTRIM1_SYLODIVLDOTRIMNDIO_DEFAULT << 2)

Shifted mode DEFAULT for RAC_SYTRIM1

Definition at line 4437 of file efr32bg21_rac.h .

#define RAC_SYTRIM1_SYLODIVLDOTRIMNDIO_vreg_1p08 ( _RAC_SYTRIM1_SYLODIVLDOTRIMNDIO_vreg_1p08 << 2)

Shifted mode vreg_1p08 for RAC_SYTRIM1

Definition at line 4438 of file efr32bg21_rac.h .

#define RAC_SYTRIM1_SYLODIVLDOTRIMNDIO_vreg_1p11 ( _RAC_SYTRIM1_SYLODIVLDOTRIMNDIO_vreg_1p11 << 2)

Shifted mode vreg_1p11 for RAC_SYTRIM1

Definition at line 4439 of file efr32bg21_rac.h .

#define RAC_SYTRIM1_SYLODIVLDOTRIMNDIO_vreg_1p15 ( _RAC_SYTRIM1_SYLODIVLDOTRIMNDIO_vreg_1p15 << 2)

Shifted mode vreg_1p15 for RAC_SYTRIM1

Definition at line 4440 of file efr32bg21_rac.h .

#define RAC_SYTRIM1_SYLODIVLDOTRIMNDIO_vreg_1p18 ( _RAC_SYTRIM1_SYLODIVLDOTRIMNDIO_vreg_1p18 << 2)

Shifted mode vreg_1p18 for RAC_SYTRIM1

Definition at line 4441 of file efr32bg21_rac.h .

#define RAC_SYTRIM1_SYLODIVLDOTRIMNDIO_vreg_1p21 ( _RAC_SYTRIM1_SYLODIVLDOTRIMNDIO_vreg_1p21 << 2)

Shifted mode vreg_1p21 for RAC_SYTRIM1

Definition at line 4442 of file efr32bg21_rac.h .

#define RAC_SYTRIM1_SYLODIVLDOTRIMNDIO_vreg_1p24 ( _RAC_SYTRIM1_SYLODIVLDOTRIMNDIO_vreg_1p24 << 2)

Shifted mode vreg_1p24 for RAC_SYTRIM1

Definition at line 4443 of file efr32bg21_rac.h .

#define RAC_SYTRIM1_SYLODIVLDOTRIMNDIO_vreg_1p27 ( _RAC_SYTRIM1_SYLODIVLDOTRIMNDIO_vreg_1p27 << 2)

Shifted mode vreg_1p27 for RAC_SYTRIM1

Definition at line 4444 of file efr32bg21_rac.h .

#define RAC_SYTRIM1_SYLODIVLDOTRIMNDIO_vreg_1p29 ( _RAC_SYTRIM1_SYLODIVLDOTRIMNDIO_vreg_1p29 << 2)

Shifted mode vreg_1p29 for RAC_SYTRIM1

Definition at line 4445 of file efr32bg21_rac.h .

#define RAC_SYTRIM1_SYLODIVLDOTRIMNDIO_vreg_1p32 ( _RAC_SYTRIM1_SYLODIVLDOTRIMNDIO_vreg_1p32 << 2)

Shifted mode vreg_1p32 for RAC_SYTRIM1

Definition at line 4446 of file efr32bg21_rac.h .

#define RAC_SYTRIM1_SYLODIVLDOTRIMNDIO_vreg_1p34 ( _RAC_SYTRIM1_SYLODIVLDOTRIMNDIO_vreg_1p34 << 2)

Shifted mode vreg_1p34 for RAC_SYTRIM1

Definition at line 4447 of file efr32bg21_rac.h .

#define RAC_SYTRIM1_SYMMDREPLICA1CURRADJ_DEFAULT ( _RAC_SYTRIM1_SYMMDREPLICA1CURRADJ_DEFAULT << 6)

Shifted mode DEFAULT for RAC_SYTRIM1

Definition at line 4459 of file efr32bg21_rac.h .

#define RAC_SYTRIM1_SYMMDREPLICA1CURRADJ_load_16u ( _RAC_SYTRIM1_SYMMDREPLICA1CURRADJ_load_16u << 6)

Shifted mode load_16u for RAC_SYTRIM1

Definition at line 4461 of file efr32bg21_rac.h .

#define RAC_SYTRIM1_SYMMDREPLICA1CURRADJ_load_20ua ( _RAC_SYTRIM1_SYMMDREPLICA1CURRADJ_load_20ua << 6)

Shifted mode load_20ua for RAC_SYTRIM1

Definition at line 4462 of file efr32bg21_rac.h .

#define RAC_SYTRIM1_SYMMDREPLICA1CURRADJ_load_24ua ( _RAC_SYTRIM1_SYMMDREPLICA1CURRADJ_load_24ua << 6)

Shifted mode load_24ua for RAC_SYTRIM1

Definition at line 4464 of file efr32bg21_rac.h .

#define RAC_SYTRIM1_SYMMDREPLICA1CURRADJ_load_28ua ( _RAC_SYTRIM1_SYMMDREPLICA1CURRADJ_load_28ua << 6)

Shifted mode load_28ua for RAC_SYTRIM1

Definition at line 4463 of file efr32bg21_rac.h .

#define RAC_SYTRIM1_SYMMDREPLICA1CURRADJ_load_32ua ( _RAC_SYTRIM1_SYMMDREPLICA1CURRADJ_load_32ua << 6)

Shifted mode load_32ua for RAC_SYTRIM1

Definition at line 4465 of file efr32bg21_rac.h .

#define RAC_SYTRIM1_SYMMDREPLICA1CURRADJ_load_36ua ( _RAC_SYTRIM1_SYMMDREPLICA1CURRADJ_load_36ua << 6)

Shifted mode load_36ua for RAC_SYTRIM1

Definition at line 4466 of file efr32bg21_rac.h .

#define RAC_SYTRIM1_SYMMDREPLICA1CURRADJ_load_44ua ( _RAC_SYTRIM1_SYMMDREPLICA1CURRADJ_load_44ua << 6)

Shifted mode load_44ua for RAC_SYTRIM1

Definition at line 4467 of file efr32bg21_rac.h .

#define RAC_SYTRIM1_SYMMDREPLICA1CURRADJ_load_8ua ( _RAC_SYTRIM1_SYMMDREPLICA1CURRADJ_load_8ua << 6)

Shifted mode load_8ua for RAC_SYTRIM1

Definition at line 4460 of file efr32bg21_rac.h .

#define RAC_SYTRIM1_SYMMDREPLICA2CURRADJ_DEFAULT ( _RAC_SYTRIM1_SYMMDREPLICA2CURRADJ_DEFAULT << 9)

Shifted mode DEFAULT for RAC_SYTRIM1

Definition at line 4479 of file efr32bg21_rac.h .

#define RAC_SYTRIM1_SYMMDREPLICA2CURRADJ_load_128u ( _RAC_SYTRIM1_SYMMDREPLICA2CURRADJ_load_128u << 9)

Shifted mode load_128u for RAC_SYTRIM1

Definition at line 4483 of file efr32bg21_rac.h .

#define RAC_SYTRIM1_SYMMDREPLICA2CURRADJ_load_160u ( _RAC_SYTRIM1_SYMMDREPLICA2CURRADJ_load_160u << 9)

Shifted mode load_160u for RAC_SYTRIM1

Definition at line 4484 of file efr32bg21_rac.h .

#define RAC_SYTRIM1_SYMMDREPLICA2CURRADJ_load_192u ( _RAC_SYTRIM1_SYMMDREPLICA2CURRADJ_load_192u << 9)

Shifted mode load_192u for RAC_SYTRIM1

Definition at line 4485 of file efr32bg21_rac.h .

#define RAC_SYTRIM1_SYMMDREPLICA2CURRADJ_load_224u ( _RAC_SYTRIM1_SYMMDREPLICA2CURRADJ_load_224u << 9)

Shifted mode load_224u for RAC_SYTRIM1

Definition at line 4486 of file efr32bg21_rac.h .

#define RAC_SYTRIM1_SYMMDREPLICA2CURRADJ_load_256u ( _RAC_SYTRIM1_SYMMDREPLICA2CURRADJ_load_256u << 9)

Shifted mode load_256u for RAC_SYTRIM1

Definition at line 4487 of file efr32bg21_rac.h .

#define RAC_SYTRIM1_SYMMDREPLICA2CURRADJ_load_32u ( _RAC_SYTRIM1_SYMMDREPLICA2CURRADJ_load_32u << 9)

Shifted mode load_32u for RAC_SYTRIM1

Definition at line 4480 of file efr32bg21_rac.h .

#define RAC_SYTRIM1_SYMMDREPLICA2CURRADJ_load_64u ( _RAC_SYTRIM1_SYMMDREPLICA2CURRADJ_load_64u << 9)

Shifted mode load_64u for RAC_SYTRIM1

Definition at line 4481 of file efr32bg21_rac.h .

#define RAC_SYTRIM1_SYMMDREPLICA2CURRADJ_load_96u ( _RAC_SYTRIM1_SYMMDREPLICA2CURRADJ_load_96u << 9)

Shifted mode load_96u for RAC_SYTRIM1

Definition at line 4482 of file efr32bg21_rac.h .

#define RAC_SYTRIM1_SYTRIMMMDREGAMPBIAS_bias_14uA ( _RAC_SYTRIM1_SYTRIMMMDREGAMPBIAS_bias_14uA << 12)

Shifted mode bias_14uA for RAC_SYTRIM1

Definition at line 4500 of file efr32bg21_rac.h .

#define RAC_SYTRIM1_SYTRIMMMDREGAMPBIAS_bias_20uA ( _RAC_SYTRIM1_SYTRIMMMDREGAMPBIAS_bias_20uA << 12)

Shifted mode bias_20uA for RAC_SYTRIM1

Definition at line 4501 of file efr32bg21_rac.h .

#define RAC_SYTRIM1_SYTRIMMMDREGAMPBIAS_bias_26uA ( _RAC_SYTRIM1_SYTRIMMMDREGAMPBIAS_bias_26uA << 12)

Shifted mode bias_26uA for RAC_SYTRIM1

Definition at line 4502 of file efr32bg21_rac.h .

#define RAC_SYTRIM1_SYTRIMMMDREGAMPBIAS_bias_32uA ( _RAC_SYTRIM1_SYTRIMMMDREGAMPBIAS_bias_32uA << 12)

Shifted mode bias_32uA for RAC_SYTRIM1

Definition at line 4503 of file efr32bg21_rac.h .

#define RAC_SYTRIM1_SYTRIMMMDREGAMPBIAS_bias_38uA ( _RAC_SYTRIM1_SYTRIMMMDREGAMPBIAS_bias_38uA << 12)

Shifted mode bias_38uA for RAC_SYTRIM1

Definition at line 4504 of file efr32bg21_rac.h .

#define RAC_SYTRIM1_SYTRIMMMDREGAMPBIAS_bias_44uA ( _RAC_SYTRIM1_SYTRIMMMDREGAMPBIAS_bias_44uA << 12)

Shifted mode bias_44uA for RAC_SYTRIM1

Definition at line 4505 of file efr32bg21_rac.h .

#define RAC_SYTRIM1_SYTRIMMMDREGAMPBIAS_bias_50uA ( _RAC_SYTRIM1_SYTRIMMMDREGAMPBIAS_bias_50uA << 12)

Shifted mode bias_50uA for RAC_SYTRIM1

Definition at line 4506 of file efr32bg21_rac.h .

#define RAC_SYTRIM1_SYTRIMMMDREGAMPBIAS_bias_56uA ( _RAC_SYTRIM1_SYTRIMMMDREGAMPBIAS_bias_56uA << 12)

Shifted mode bias_56uA for RAC_SYTRIM1

Definition at line 4507 of file efr32bg21_rac.h .

#define RAC_SYTRIM1_SYTRIMMMDREGAMPBIAS_DEFAULT ( _RAC_SYTRIM1_SYTRIMMMDREGAMPBIAS_DEFAULT << 12)

Shifted mode DEFAULT for RAC_SYTRIM1

Definition at line 4499 of file efr32bg21_rac.h .

#define RAC_SYTRIM1_SYTRIMMMDREGAMPBW_C_000f ( _RAC_SYTRIM1_SYTRIMMMDREGAMPBW_C_000f << 15)

Shifted mode C_000f for RAC_SYTRIM1

Definition at line 4516 of file efr32bg21_rac.h .

#define RAC_SYTRIM1_SYTRIMMMDREGAMPBW_C_300f ( _RAC_SYTRIM1_SYTRIMMMDREGAMPBW_C_300f << 15)

Shifted mode C_300f for RAC_SYTRIM1

Definition at line 4517 of file efr32bg21_rac.h .

#define RAC_SYTRIM1_SYTRIMMMDREGAMPBW_C_600f ( _RAC_SYTRIM1_SYTRIMMMDREGAMPBW_C_600f << 15)

Shifted mode C_600f for RAC_SYTRIM1

Definition at line 4518 of file efr32bg21_rac.h .

#define RAC_SYTRIM1_SYTRIMMMDREGAMPBW_C_900f ( _RAC_SYTRIM1_SYTRIMMMDREGAMPBW_C_900f << 15)

Shifted mode C_900f for RAC_SYTRIM1

Definition at line 4519 of file efr32bg21_rac.h .

#define RAC_SYTRIM1_SYTRIMMMDREGAMPBW_DEFAULT ( _RAC_SYTRIM1_SYTRIMMMDREGAMPBW_DEFAULT << 15)

Shifted mode DEFAULT for RAC_SYTRIM1

Definition at line 4515 of file efr32bg21_rac.h .

#define RAC_TESTCTRL_AUX2RFSENSE (0x1UL << 2)

Enable auxiliary synthesizer output

Definition at line 849 of file efr32bg21_rac.h .

#define RAC_TESTCTRL_AUX2RFSENSE_DEFAULT ( _RAC_TESTCTRL_AUX2RFSENSE_DEFAULT << 2)

Shifted mode DEFAULT for RAC_TESTCTRL

Definition at line 855 of file efr32bg21_rac.h .

#define RAC_TESTCTRL_AUX2RFSENSE_X0 ( _RAC_TESTCTRL_AUX2RFSENSE_X0 << 2)

Shifted mode X0 for RAC_TESTCTRL

Definition at line 856 of file efr32bg21_rac.h .

#define RAC_TESTCTRL_AUX2RFSENSE_X1 ( _RAC_TESTCTRL_AUX2RFSENSE_X1 << 2)

Shifted mode X1 for RAC_TESTCTRL

Definition at line 857 of file efr32bg21_rac.h .

#define RAC_TESTCTRL_DEMODEN (0x1UL << 1)

Demodulator enable

Definition at line 844 of file efr32bg21_rac.h .

#define RAC_TESTCTRL_DEMODEN_DEFAULT ( _RAC_TESTCTRL_DEMODEN_DEFAULT << 1)

Shifted mode DEFAULT for RAC_TESTCTRL

Definition at line 848 of file efr32bg21_rac.h .

#define RAC_TESTCTRL_LOOPBACK2LNAINPUT (0x1UL << 3)

Enable RF loopback

Definition at line 858 of file efr32bg21_rac.h .

#define RAC_TESTCTRL_LOOPBACK2LNAINPUT_DEFAULT ( _RAC_TESTCTRL_LOOPBACK2LNAINPUT_DEFAULT << 3)

Shifted mode DEFAULT for RAC_TESTCTRL

Definition at line 862 of file efr32bg21_rac.h .

#define RAC_TESTCTRL_LOOPBACK2LNAOUTPUT (0x1UL << 4)

Enable RF loopback

Definition at line 863 of file efr32bg21_rac.h .

#define RAC_TESTCTRL_LOOPBACK2LNAOUTPUT_DEFAULT ( _RAC_TESTCTRL_LOOPBACK2LNAOUTPUT_DEFAULT << 4)

Shifted mode DEFAULT for RAC_TESTCTRL

Definition at line 867 of file efr32bg21_rac.h .

#define RAC_TESTCTRL_MODEN (0x1UL << 0)

Modulator enable

Definition at line 839 of file efr32bg21_rac.h .

#define RAC_TESTCTRL_MODEN_DEFAULT ( _RAC_TESTCTRL_MODEN_DEFAULT << 0)

Shifted mode DEFAULT for RAC_TESTCTRL

Definition at line 843 of file efr32bg21_rac.h .

#define RAC_TX_ENPAPOWER (0x1UL << 30)

Override

Definition at line 4281 of file efr32bg21_rac.h .

#define RAC_TX_ENPAPOWER_DEFAULT ( _RAC_TX_ENPAPOWER_DEFAULT << 30)

Shifted mode DEFAULT for RAC_TX

Definition at line 4285 of file efr32bg21_rac.h .

#define RAC_TX_ENPASELSLICE (0x1UL << 31)

Override

Definition at line 4286 of file efr32bg21_rac.h .

#define RAC_TX_ENPASELSLICE_DEFAULT ( _RAC_TX_ENPASELSLICE_DEFAULT << 31)

Shifted mode DEFAULT for RAC_TX

Definition at line 4290 of file efr32bg21_rac.h .

#define RAC_TX_ENPATRIMPASLICE0DBM (0x1UL << 10)

Override

Definition at line 4181 of file efr32bg21_rac.h .

#define RAC_TX_ENPATRIMPASLICE0DBM_DEFAULT ( _RAC_TX_ENPATRIMPASLICE0DBM_DEFAULT << 10)

Shifted mode DEFAULT for RAC_TX

Definition at line 4185 of file efr32bg21_rac.h .

#define RAC_TX_ENXOSQBUFFILT (0x1UL << 29)

Override

Definition at line 4276 of file efr32bg21_rac.h .

#define RAC_TX_ENXOSQBUFFILT_DEFAULT ( _RAC_TX_ENXOSQBUFFILT_DEFAULT << 29)

Shifted mode DEFAULT for RAC_TX

Definition at line 4280 of file efr32bg21_rac.h .

#define RAC_TX_PABLEEDDRVREG0DBM (0x1UL << 0)

PABLEEDDRVREG0DBM

Definition at line 4098 of file efr32bg21_rac.h .

#define RAC_TX_PABLEEDDRVREG0DBM_DEFAULT ( _RAC_TX_PABLEEDDRVREG0DBM_DEFAULT << 0)

Shifted mode DEFAULT for RAC_TX

Definition at line 4104 of file efr32bg21_rac.h .

#define RAC_TX_PABLEEDDRVREG0DBM_disable ( _RAC_TX_PABLEEDDRVREG0DBM_disable << 0)

Shifted mode disable for RAC_TX

Definition at line 4105 of file efr32bg21_rac.h .

#define RAC_TX_PABLEEDDRVREG0DBM_enable ( _RAC_TX_PABLEEDDRVREG0DBM_enable << 0)

Shifted mode enable for RAC_TX

Definition at line 4106 of file efr32bg21_rac.h .

#define RAC_TX_PABLEEDREG0DBM (0x1UL << 1)

PABLEEDREG0DBM

Definition at line 4107 of file efr32bg21_rac.h .

#define RAC_TX_PABLEEDREG0DBM_DEFAULT ( _RAC_TX_PABLEEDREG0DBM_DEFAULT << 1)

Shifted mode DEFAULT for RAC_TX

Definition at line 4113 of file efr32bg21_rac.h .

#define RAC_TX_PABLEEDREG0DBM_disable ( _RAC_TX_PABLEEDREG0DBM_disable << 1)

Shifted mode disable for RAC_TX

Definition at line 4114 of file efr32bg21_rac.h .

#define RAC_TX_PABLEEDREG0DBM_enable ( _RAC_TX_PABLEEDREG0DBM_enable << 1)

Shifted mode enable for RAC_TX

Definition at line 4115 of file efr32bg21_rac.h .

#define RAC_TX_PAEN10DBMM (0x1UL << 16)

PAEN10DBMM

Definition at line 4186 of file efr32bg21_rac.h .

#define RAC_TX_PAEN10DBMM_DEFAULT ( _RAC_TX_PAEN10DBMM_DEFAULT << 16)

Shifted mode DEFAULT for RAC_TX

Definition at line 4192 of file efr32bg21_rac.h .

#define RAC_TX_PAEN10DBMM_disable ( _RAC_TX_PAEN10DBMM_disable << 16)

Shifted mode disable for RAC_TX

Definition at line 4193 of file efr32bg21_rac.h .

#define RAC_TX_PAEN10DBMM_enable ( _RAC_TX_PAEN10DBMM_enable << 16)

Shifted mode enable for RAC_TX

Definition at line 4194 of file efr32bg21_rac.h .

#define RAC_TX_PAEN10DBMP (0x1UL << 17)

PAEN10DBMP

Definition at line 4195 of file efr32bg21_rac.h .

#define RAC_TX_PAEN10DBMP_DEFAULT ( _RAC_TX_PAEN10DBMP_DEFAULT << 17)

Shifted mode DEFAULT for RAC_TX

Definition at line 4201 of file efr32bg21_rac.h .

#define RAC_TX_PAEN10DBMP_disable ( _RAC_TX_PAEN10DBMP_disable << 17)

Shifted mode disable for RAC_TX

Definition at line 4202 of file efr32bg21_rac.h .

#define RAC_TX_PAEN10DBMP_enable ( _RAC_TX_PAEN10DBMP_enable << 17)

Shifted mode enable for RAC_TX

Definition at line 4203 of file efr32bg21_rac.h .

#define RAC_TX_PAEN10DBMPDRV (0x1UL << 18)

PAEN10DBMPDRV

Definition at line 4204 of file efr32bg21_rac.h .

#define RAC_TX_PAEN10DBMPDRV_DEFAULT ( _RAC_TX_PAEN10DBMPDRV_DEFAULT << 18)

Shifted mode DEFAULT for RAC_TX

Definition at line 4210 of file efr32bg21_rac.h .

#define RAC_TX_PAEN10DBMPDRV_disable ( _RAC_TX_PAEN10DBMPDRV_disable << 18)

Shifted mode disable for RAC_TX

Definition at line 4211 of file efr32bg21_rac.h .

#define RAC_TX_PAEN10DBMPDRV_enable ( _RAC_TX_PAEN10DBMPDRV_enable << 18)

Shifted mode enable for RAC_TX

Definition at line 4212 of file efr32bg21_rac.h .

#define RAC_TX_PAEN20DBM (0x1UL << 20)

PAEN20DBM

Definition at line 4213 of file efr32bg21_rac.h .

#define RAC_TX_PAEN20DBM_DEFAULT ( _RAC_TX_PAEN20DBM_DEFAULT << 20)

Shifted mode DEFAULT for RAC_TX

Definition at line 4219 of file efr32bg21_rac.h .

#define RAC_TX_PAEN20DBM_disable ( _RAC_TX_PAEN20DBM_disable << 20)

Shifted mode disable for RAC_TX

Definition at line 4220 of file efr32bg21_rac.h .

#define RAC_TX_PAEN20DBM_enable ( _RAC_TX_PAEN20DBM_enable << 20)

Shifted mode enable for RAC_TX

Definition at line 4221 of file efr32bg21_rac.h .

#define RAC_TX_PAEN20DBMPDRV (0x1UL << 21)

PAEN20DBMPDRV

Definition at line 4222 of file efr32bg21_rac.h .

#define RAC_TX_PAEN20DBMPDRV_DEFAULT ( _RAC_TX_PAEN20DBMPDRV_DEFAULT << 21)

Shifted mode DEFAULT for RAC_TX

Definition at line 4228 of file efr32bg21_rac.h .

#define RAC_TX_PAEN20DBMPDRV_disable ( _RAC_TX_PAEN20DBMPDRV_disable << 21)

Shifted mode disable for RAC_TX

Definition at line 4229 of file efr32bg21_rac.h .

#define RAC_TX_PAEN20DBMPDRV_enable ( _RAC_TX_PAEN20DBMPDRV_enable << 21)

Shifted mode enable for RAC_TX

Definition at line 4230 of file efr32bg21_rac.h .

#define RAC_TX_PAENBIAS0DBM (0x1UL << 2)

PAENBIAS0DBM

Definition at line 4116 of file efr32bg21_rac.h .

#define RAC_TX_PAENBIAS0DBM_DEFAULT ( _RAC_TX_PAENBIAS0DBM_DEFAULT << 2)

Shifted mode DEFAULT for RAC_TX

Definition at line 4122 of file efr32bg21_rac.h .

#define RAC_TX_PAENBIAS0DBM_disable ( _RAC_TX_PAENBIAS0DBM_disable << 2)

Shifted mode disable for RAC_TX

Definition at line 4123 of file efr32bg21_rac.h .

#define RAC_TX_PAENBIAS0DBM_enable ( _RAC_TX_PAENBIAS0DBM_enable << 2)

Shifted mode enable for RAC_TX

Definition at line 4124 of file efr32bg21_rac.h .

#define RAC_TX_PAENBLEEDPDRVLDO (0x1UL << 24)

PAENBLEEDPDRVLDO

Definition at line 4231 of file efr32bg21_rac.h .

#define RAC_TX_PAENBLEEDPDRVLDO_DEFAULT ( _RAC_TX_PAENBLEEDPDRVLDO_DEFAULT << 24)

Shifted mode DEFAULT for RAC_TX

Definition at line 4237 of file efr32bg21_rac.h .

#define RAC_TX_PAENBLEEDPDRVLDO_disable ( _RAC_TX_PAENBLEEDPDRVLDO_disable << 24)

Shifted mode disable for RAC_TX

Definition at line 4238 of file efr32bg21_rac.h .

#define RAC_TX_PAENBLEEDPDRVLDO_enable ( _RAC_TX_PAENBLEEDPDRVLDO_enable << 24)

Shifted mode enable for RAC_TX

Definition at line 4239 of file efr32bg21_rac.h .

#define RAC_TX_PAENBLEEDPREREG (0x1UL << 25)

PAENBLEEDPREREG

Definition at line 4240 of file efr32bg21_rac.h .

#define RAC_TX_PAENBLEEDPREREG_DEFAULT ( _RAC_TX_PAENBLEEDPREREG_DEFAULT << 25)

Shifted mode DEFAULT for RAC_TX

Definition at line 4246 of file efr32bg21_rac.h .

#define RAC_TX_PAENBLEEDPREREG_disable ( _RAC_TX_PAENBLEEDPREREG_disable << 25)

Shifted mode disable for RAC_TX

Definition at line 4247 of file efr32bg21_rac.h .

#define RAC_TX_PAENBLEEDPREREG_enable ( _RAC_TX_PAENBLEEDPREREG_enable << 25)

Shifted mode enable for RAC_TX

Definition at line 4248 of file efr32bg21_rac.h .

#define RAC_TX_PAENDRVREG0DBM (0x1UL << 3)

PAENDRVREG0DBM

Definition at line 4125 of file efr32bg21_rac.h .

#define RAC_TX_PAENDRVREG0DBM_DEFAULT ( _RAC_TX_PAENDRVREG0DBM_DEFAULT << 3)

Shifted mode DEFAULT for RAC_TX

Definition at line 4131 of file efr32bg21_rac.h .

#define RAC_TX_PAENDRVREG0DBM_disable ( _RAC_TX_PAENDRVREG0DBM_disable << 3)

Shifted mode disable for RAC_TX

Definition at line 4132 of file efr32bg21_rac.h .

#define RAC_TX_PAENDRVREG0DBM_enable ( _RAC_TX_PAENDRVREG0DBM_enable << 3)

Shifted mode enable for RAC_TX

Definition at line 4133 of file efr32bg21_rac.h .

#define RAC_TX_PAENDRVREGBIAS0DBM (0x1UL << 4)

PAENDRVREGBIAS0DBM

Definition at line 4134 of file efr32bg21_rac.h .

#define RAC_TX_PAENDRVREGBIAS0DBM_DEFAULT ( _RAC_TX_PAENDRVREGBIAS0DBM_DEFAULT << 4)

Shifted mode DEFAULT for RAC_TX

Definition at line 4140 of file efr32bg21_rac.h .

#define RAC_TX_PAENDRVREGBIAS0DBM_disable ( _RAC_TX_PAENDRVREGBIAS0DBM_disable << 4)

Shifted mode disable for RAC_TX

Definition at line 4141 of file efr32bg21_rac.h .

#define RAC_TX_PAENDRVREGBIAS0DBM_enable ( _RAC_TX_PAENDRVREGBIAS0DBM_enable << 4)

Shifted mode enable for RAC_TX

Definition at line 4142 of file efr32bg21_rac.h .

#define RAC_TX_PAENLDOHVPDRVLDO (0x1UL << 26)

PAENLDOHVPDRVLDO

Definition at line 4249 of file efr32bg21_rac.h .

#define RAC_TX_PAENLDOHVPDRVLDO_DEFAULT ( _RAC_TX_PAENLDOHVPDRVLDO_DEFAULT << 26)

Shifted mode DEFAULT for RAC_TX

Definition at line 4255 of file efr32bg21_rac.h .

#define RAC_TX_PAENLDOHVPDRVLDO_disable ( _RAC_TX_PAENLDOHVPDRVLDO_disable << 26)

Shifted mode disable for RAC_TX

Definition at line 4256 of file efr32bg21_rac.h .

#define RAC_TX_PAENLDOHVPDRVLDO_enable ( _RAC_TX_PAENLDOHVPDRVLDO_enable << 26)

Shifted mode enable for RAC_TX

Definition at line 4257 of file efr32bg21_rac.h .

#define RAC_TX_PAENLDOHVPREREG (0x1UL << 27)

PAENLDOHVPREREG

Definition at line 4258 of file efr32bg21_rac.h .

#define RAC_TX_PAENLDOHVPREREG_DEFAULT ( _RAC_TX_PAENLDOHVPREREG_DEFAULT << 27)

Shifted mode DEFAULT for RAC_TX

Definition at line 4264 of file efr32bg21_rac.h .

#define RAC_TX_PAENLDOHVPREREG_disable ( _RAC_TX_PAENLDOHVPREREG_disable << 27)

Shifted mode disable for RAC_TX

Definition at line 4265 of file efr32bg21_rac.h .

#define RAC_TX_PAENLDOHVPREREG_enable ( _RAC_TX_PAENLDOHVPREREG_enable << 27)

Shifted mode enable for RAC_TX

Definition at line 4266 of file efr32bg21_rac.h .

#define RAC_TX_PAENLO0DBM (0x1UL << 5)

PAENLO0DBM

Definition at line 4143 of file efr32bg21_rac.h .

#define RAC_TX_PAENLO0DBM_DEFAULT ( _RAC_TX_PAENLO0DBM_DEFAULT << 5)

Shifted mode DEFAULT for RAC_TX

Definition at line 4149 of file efr32bg21_rac.h .

#define RAC_TX_PAENLO0DBM_disable ( _RAC_TX_PAENLO0DBM_disable << 5)

Shifted mode disable for RAC_TX

Definition at line 4150 of file efr32bg21_rac.h .

#define RAC_TX_PAENLO0DBM_enable ( _RAC_TX_PAENLO0DBM_enable << 5)

Shifted mode enable for RAC_TX

Definition at line 4151 of file efr32bg21_rac.h .

#define RAC_TX_PAENPAOUT (0x1UL << 28)

PAENPAOUT

Definition at line 4267 of file efr32bg21_rac.h .

#define RAC_TX_PAENPAOUT_DEFAULT ( _RAC_TX_PAENPAOUT_DEFAULT << 28)

Shifted mode DEFAULT for RAC_TX

Definition at line 4273 of file efr32bg21_rac.h .

#define RAC_TX_PAENPAOUT_disable ( _RAC_TX_PAENPAOUT_disable << 28)

Shifted mode disable for RAC_TX

Definition at line 4274 of file efr32bg21_rac.h .

#define RAC_TX_PAENPAOUT_enable ( _RAC_TX_PAENPAOUT_enable << 28)

Shifted mode enable for RAC_TX

Definition at line 4275 of file efr32bg21_rac.h .

#define RAC_TX_PAENREG0DBM (0x1UL << 6)

PAENREG0DBM

Definition at line 4152 of file efr32bg21_rac.h .

#define RAC_TX_PAENREG0DBM_DEFAULT ( _RAC_TX_PAENREG0DBM_DEFAULT << 6)

Shifted mode DEFAULT for RAC_TX

Definition at line 4158 of file efr32bg21_rac.h .

#define RAC_TX_PAENREG0DBM_disable ( _RAC_TX_PAENREG0DBM_disable << 6)

Shifted mode disable for RAC_TX

Definition at line 4159 of file efr32bg21_rac.h .

#define RAC_TX_PAENREG0DBM_enable ( _RAC_TX_PAENREG0DBM_enable << 6)

Shifted mode enable for RAC_TX

Definition at line 4160 of file efr32bg21_rac.h .

#define RAC_TX_PAENTAPCAP0DBM_cap_0f ( _RAC_TX_PAENTAPCAP0DBM_cap_0f << 7)

Shifted mode cap_0f for RAC_TX

Definition at line 4173 of file efr32bg21_rac.h .

#define RAC_TX_PAENTAPCAP0DBM_cap_0p35pF ( _RAC_TX_PAENTAPCAP0DBM_cap_0p35pF << 7)

Shifted mode cap_0p35pF for RAC_TX

Definition at line 4174 of file efr32bg21_rac.h .

#define RAC_TX_PAENTAPCAP0DBM_cap_0p7pF ( _RAC_TX_PAENTAPCAP0DBM_cap_0p7pF << 7)

Shifted mode cap_0p7pF for RAC_TX

Definition at line 4175 of file efr32bg21_rac.h .

#define RAC_TX_PAENTAPCAP0DBM_cap_1p05pF ( _RAC_TX_PAENTAPCAP0DBM_cap_1p05pF << 7)

Shifted mode cap_1p05pF for RAC_TX

Definition at line 4176 of file efr32bg21_rac.h .

#define RAC_TX_PAENTAPCAP0DBM_cap_1p4pF ( _RAC_TX_PAENTAPCAP0DBM_cap_1p4pF << 7)

Shifted mode cap_1p4pF for RAC_TX

Definition at line 4177 of file efr32bg21_rac.h .

#define RAC_TX_PAENTAPCAP0DBM_cap_1p75pF ( _RAC_TX_PAENTAPCAP0DBM_cap_1p75pF << 7)

Shifted mode cap_1p75pF for RAC_TX

Definition at line 4178 of file efr32bg21_rac.h .

#define RAC_TX_PAENTAPCAP0DBM_cap_2p1pF ( _RAC_TX_PAENTAPCAP0DBM_cap_2p1pF << 7)

Shifted mode cap_2p1pF for RAC_TX

Definition at line 4179 of file efr32bg21_rac.h .

#define RAC_TX_PAENTAPCAP0DBM_cap_2p45pF ( _RAC_TX_PAENTAPCAP0DBM_cap_2p45pF << 7)

Shifted mode cap_2p45pF for RAC_TX

Definition at line 4180 of file efr32bg21_rac.h .

#define RAC_TX_PAENTAPCAP0DBM_DEFAULT ( _RAC_TX_PAENTAPCAP0DBM_DEFAULT << 7)

Shifted mode DEFAULT for RAC_TX

Definition at line 4172 of file efr32bg21_rac.h .

#define RAC_VCOCTRL_VCOAMPLITUDE_DEFAULT ( _RAC_VCOCTRL_VCOAMPLITUDE_DEFAULT << 0)

Shifted mode DEFAULT for RAC_VCOCTRL

Definition at line 1301 of file efr32bg21_rac.h .

#define RAC_VCOCTRL_VCODETAMPLITUDE_DEFAULT ( _RAC_VCOCTRL_VCODETAMPLITUDE_DEFAULT << 4)

Shifted mode DEFAULT for RAC_VCOCTRL

Definition at line 1305 of file efr32bg21_rac.h .

#define RAC_VECTADDR_VECTADDR_DEFAULT ( _RAC_VECTADDR_VECTADDR_DEFAULT << 0)

Shifted mode DEFAULT for RAC_VECTADDR

Definition at line 1126 of file efr32bg21_rac.h .

#define RAC_WAITMASK_ANTSWITCH (0x1UL << 8)

Active antenna has switched

Definition at line 1090 of file efr32bg21_rac.h .

#define RAC_WAITMASK_ANTSWITCH_DEFAULT ( _RAC_WAITMASK_ANTSWITCH_DEFAULT << 8)

Shifted mode DEFAULT for RAC_WAITMASK

Definition at line 1094 of file efr32bg21_rac.h .

#define RAC_WAITMASK_DEMODRXREQCLR (0x1UL << 4)

Demodulator RX Request Clear

Definition at line 1070 of file efr32bg21_rac.h .

#define RAC_WAITMASK_DEMODRXREQCLR_DEFAULT ( _RAC_WAITMASK_DEMODRXREQCLR_DEFAULT << 4)

Shifted mode DEFAULT for RAC_WAITMASK

Definition at line 1074 of file efr32bg21_rac.h .

#define RAC_WAITMASK_FRCPAUSED (0x1UL << 7)

FRC Paused

Definition at line 1085 of file efr32bg21_rac.h .

#define RAC_WAITMASK_FRCPAUSED_DEFAULT ( _RAC_WAITMASK_FRCPAUSED_DEFAULT << 7)

Shifted mode DEFAULT for RAC_WAITMASK

Definition at line 1089 of file efr32bg21_rac.h .

#define RAC_WAITMASK_FRCRX (0x1UL << 1)

FRC RXWord

Definition at line 1055 of file efr32bg21_rac.h .

#define RAC_WAITMASK_FRCRX_DEFAULT ( _RAC_WAITMASK_FRCRX_DEFAULT << 1)

Shifted mode DEFAULT for RAC_WAITMASK

Definition at line 1059 of file efr32bg21_rac.h .

#define RAC_WAITMASK_FRCTX (0x1UL << 2)

FRC TXWord

Definition at line 1060 of file efr32bg21_rac.h .

#define RAC_WAITMASK_FRCTX_DEFAULT ( _RAC_WAITMASK_FRCTX_DEFAULT << 2)

Shifted mode DEFAULT for RAC_WAITMASK

Definition at line 1064 of file efr32bg21_rac.h .

#define RAC_WAITMASK_PRSEVENT (0x1UL << 3)

PRS Event

Definition at line 1065 of file efr32bg21_rac.h .

#define RAC_WAITMASK_PRSEVENT_DEFAULT ( _RAC_WAITMASK_PRSEVENT_DEFAULT << 3)

Shifted mode DEFAULT for RAC_WAITMASK

Definition at line 1069 of file efr32bg21_rac.h .

#define RAC_WAITMASK_RAMPDONE (0x1UL << 6)

Ramp Done

Definition at line 1080 of file efr32bg21_rac.h .

#define RAC_WAITMASK_RAMPDONE_DEFAULT ( _RAC_WAITMASK_RAMPDONE_DEFAULT << 6)

Shifted mode DEFAULT for RAC_WAITMASK

Definition at line 1084 of file efr32bg21_rac.h .

#define RAC_WAITMASK_STCMP (0x1UL << 0)

STIMER Compare Event

Definition at line 1050 of file efr32bg21_rac.h .

#define RAC_WAITMASK_STCMP_DEFAULT ( _RAC_WAITMASK_STCMP_DEFAULT << 0)

Shifted mode DEFAULT for RAC_WAITMASK

Definition at line 1054 of file efr32bg21_rac.h .

#define RAC_WAITMASK_SYNTHRDY (0x1UL << 5)

SYNTH Ready

Definition at line 1075 of file efr32bg21_rac.h .

#define RAC_WAITMASK_SYNTHRDY_DEFAULT ( _RAC_WAITMASK_SYNTHRDY_DEFAULT << 5)

Shifted mode DEFAULT for RAC_WAITMASK

Definition at line 1079 of file efr32bg21_rac.h .

#define RAC_WAITSNSH_WAITSNSH_DEFAULT ( _RAC_WAITSNSH_WAITSNSH_DEFAULT << 0)

Shifted mode DEFAULT for RAC_WAITSNSH

Definition at line 1102 of file efr32bg21_rac.h .

#define RAC_XORETIMECTRL_XORETIMEDISRETIME (0x1UL << 1)

XORETIMEDISRETIME

Definition at line 4872 of file efr32bg21_rac.h .

#define RAC_XORETIMECTRL_XORETIMEDISRETIME_DEFAULT ( _RAC_XORETIMECTRL_XORETIMEDISRETIME_DEFAULT << 1)

Shifted mode DEFAULT for RAC_XORETIMECTRL

Definition at line 4878 of file efr32bg21_rac.h .

#define RAC_XORETIMECTRL_XORETIMEDISRETIME_disable_retime ( _RAC_XORETIMECTRL_XORETIMEDISRETIME_disable_retime << 1)

Shifted mode disable_retime for RAC_XORETIMECTRL

Definition at line 4880 of file efr32bg21_rac.h .

#define RAC_XORETIMECTRL_XORETIMEDISRETIME_enable_retime ( _RAC_XORETIMECTRL_XORETIMEDISRETIME_enable_retime << 1)

Shifted mode enable_retime for RAC_XORETIMECTRL

Definition at line 4879 of file efr32bg21_rac.h .

#define RAC_XORETIMECTRL_XORETIMEENRETIME (0x1UL << 0)

XORETIMEENRETIME

Definition at line 4863 of file efr32bg21_rac.h .

#define RAC_XORETIMECTRL_XORETIMEENRETIME_DEFAULT ( _RAC_XORETIMECTRL_XORETIMEENRETIME_DEFAULT << 0)

Shifted mode DEFAULT for RAC_XORETIMECTRL

Definition at line 4869 of file efr32bg21_rac.h .

#define RAC_XORETIMECTRL_XORETIMEENRETIME_disable ( _RAC_XORETIMECTRL_XORETIMEENRETIME_disable << 0)

Shifted mode disable for RAC_XORETIMECTRL

Definition at line 4870 of file efr32bg21_rac.h .

#define RAC_XORETIMECTRL_XORETIMEENRETIME_enable ( _RAC_XORETIMECTRL_XORETIMEENRETIME_enable << 0)

Shifted mode enable for RAC_XORETIMECTRL

Definition at line 4871 of file efr32bg21_rac.h .

#define RAC_XORETIMECTRL_XORETIMELIMITH_DEFAULT ( _RAC_XORETIMECTRL_XORETIMELIMITH_DEFAULT << 4)

Shifted mode DEFAULT for RAC_XORETIMECTRL

Definition at line 4893 of file efr32bg21_rac.h .

#define RAC_XORETIMECTRL_XORETIMELIMITL_DEFAULT ( _RAC_XORETIMECTRL_XORETIMELIMITL_DEFAULT << 8)

Shifted mode DEFAULT for RAC_XORETIMECTRL

Definition at line 4897 of file efr32bg21_rac.h .

#define RAC_XORETIMECTRL_XORETIMERESETN (0x1UL << 2)

XORETIMERESETN

Definition at line 4881 of file efr32bg21_rac.h .

#define RAC_XORETIMECTRL_XORETIMERESETN_DEFAULT ( _RAC_XORETIMECTRL_XORETIMERESETN_DEFAULT << 2)

Shifted mode DEFAULT for RAC_XORETIMECTRL

Definition at line 4887 of file efr32bg21_rac.h .

#define RAC_XORETIMECTRL_XORETIMERESETN_operate ( _RAC_XORETIMECTRL_XORETIMERESETN_operate << 2)

Shifted mode operate for RAC_XORETIMECTRL

Definition at line 4888 of file efr32bg21_rac.h .

#define RAC_XORETIMECTRL_XORETIMERESETN_reset ( _RAC_XORETIMECTRL_XORETIMERESETN_reset << 2)

Shifted mode reset for RAC_XORETIMECTRL

Definition at line 4889 of file efr32bg21_rac.h .

#define RAC_XORETIMESTATUS_XORETIMECLKSEL (0x1UL << 0)

XORETIMECLKSEL

Definition at line 4902 of file efr32bg21_rac.h .

#define RAC_XORETIMESTATUS_XORETIMECLKSEL_DEFAULT ( _RAC_XORETIMESTATUS_XORETIMECLKSEL_DEFAULT << 0)

Shifted mode DEFAULT for RAC_XORETIMESTATUS

Definition at line 4908 of file efr32bg21_rac.h .

#define RAC_XORETIMESTATUS_XORETIMECLKSEL_use_raw_clk ( _RAC_XORETIMESTATUS_XORETIMECLKSEL_use_raw_clk << 0)

Shifted mode use_raw_clk for RAC_XORETIMESTATUS

Definition at line 4909 of file efr32bg21_rac.h .

#define RAC_XORETIMESTATUS_XORETIMECLKSEL_use_retimed_clk ( _RAC_XORETIMESTATUS_XORETIMECLKSEL_use_retimed_clk << 0)

Shifted mode use_retimed_clk for RAC_XORETIMESTATUS

Definition at line 4910 of file efr32bg21_rac.h .

#define RAC_XORETIMESTATUS_XORETIMERESETNLO (0x1UL << 1)

XORETIMERESETNLO

Definition at line 4911 of file efr32bg21_rac.h .

#define RAC_XORETIMESTATUS_XORETIMERESETNLO_DEFAULT ( _RAC_XORETIMESTATUS_XORETIMERESETNLO_DEFAULT << 1)

Shifted mode DEFAULT for RAC_XORETIMESTATUS

Definition at line 4917 of file efr32bg21_rac.h .

#define RAC_XORETIMESTATUS_XORETIMERESETNLO_hi ( _RAC_XORETIMESTATUS_XORETIMERESETNLO_hi << 1)

Shifted mode hi for RAC_XORETIMESTATUS

Definition at line 4919 of file efr32bg21_rac.h .

#define RAC_XORETIMESTATUS_XORETIMERESETNLO_lo ( _RAC_XORETIMESTATUS_XORETIMERESETNLO_lo << 1)

Shifted mode lo for RAC_XORETIMESTATUS

Definition at line 4918 of file efr32bg21_rac.h .

#define RAC_XOSQBUFFILT_XOSQBUFFILT_bypass ( _RAC_XOSQBUFFILT_XOSQBUFFILT_bypass << 0)

Shifted mode bypass for RAC_XOSQBUFFILT

Definition at line 4932 of file efr32bg21_rac.h .

#define RAC_XOSQBUFFILT_XOSQBUFFILT_DEFAULT ( _RAC_XOSQBUFFILT_XOSQBUFFILT_DEFAULT << 0)

Shifted mode DEFAULT for RAC_XOSQBUFFILT

Definition at line 4931 of file efr32bg21_rac.h .

#define RAC_XOSQBUFFILT_XOSQBUFFILT_filter_1 ( _RAC_XOSQBUFFILT_XOSQBUFFILT_filter_1 << 0)

Shifted mode filter_1 for RAC_XOSQBUFFILT

Definition at line 4933 of file efr32bg21_rac.h .

#define RAC_XOSQBUFFILT_XOSQBUFFILT_filter_2 ( _RAC_XOSQBUFFILT_XOSQBUFFILT_filter_2 << 0)

Shifted mode filter_2 for RAC_XOSQBUFFILT

Definition at line 4934 of file efr32bg21_rac.h .

#define RAC_XOSQBUFFILT_XOSQBUFFILT_filter_3 ( _RAC_XOSQBUFFILT_XOSQBUFFILT_filter_3 << 0)

Shifted mode filter_3 for RAC_XOSQBUFFILT

Definition at line 4935 of file efr32bg21_rac.h .

RAC Bit FieldsDevices > RAC

Macros

Macro Definition Documentation