EFR32BG21A020F1024IM32 Peripheral Declarations MapDevices > EFR32BG21A020F1024IM32
Macros |
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#define | ACMP0 (( ACMP_TypeDef *) ACMP0_BASE) |
#define | ACMP0_NS (( ACMP_TypeDef *) ACMP0_NS_BASE) |
#define | ACMP0_S (( ACMP_TypeDef *) ACMP0_BASE) |
#define | ACMP1 (( ACMP_TypeDef *) ACMP1_BASE) |
#define | ACMP1_NS (( ACMP_TypeDef *) ACMP1_NS_BASE) |
#define | ACMP1_S (( ACMP_TypeDef *) ACMP1_BASE) |
#define | AGC (( AGC_TypeDef *) AGC_BASE) |
#define | AGC_NS (( AGC_TypeDef *) AGC_NS_BASE) |
#define | AGC_S (( AGC_TypeDef *) AGC_BASE) |
#define | AMUXCP0 (( AMUXCP_TypeDef *) AMUXCP0_BASE) |
#define | AMUXCP0_NS (( AMUXCP_TypeDef *) AMUXCP0_NS_BASE) |
#define | AMUXCP0_S (( AMUXCP_TypeDef *) AMUXCP0_BASE) |
#define | BUFC (( BUFC_TypeDef *) BUFC_BASE) |
#define | BUFC_NS (( BUFC_TypeDef *) BUFC_NS_BASE) |
#define | BUFC_S (( BUFC_TypeDef *) BUFC_BASE) |
#define | BURAM (( BURAM_TypeDef *) BURAM_BASE) |
#define | BURAM_NS (( BURAM_TypeDef *) BURAM_NS_BASE) |
#define | BURAM_S (( BURAM_TypeDef *) BURAM_BASE) |
#define | BURTC (( BURTC_TypeDef *) BURTC_BASE) |
#define | BURTC_NS (( BURTC_TypeDef *) BURTC_NS_BASE) |
#define | BURTC_S (( BURTC_TypeDef *) BURTC_BASE) |
#define | CMU (( CMU_TypeDef *) CMU_BASE) |
#define | CMU_NS (( CMU_TypeDef *) CMU_NS_BASE) |
#define | CMU_S (( CMU_TypeDef *) CMU_BASE) |
#define | DEVINFO (( DEVINFO_TypeDef *) DEVINFO_BASE) |
#define | DPLL0 (( DPLL_TypeDef *) DPLL0_BASE) |
#define | DPLL0_NS (( DPLL_TypeDef *) DPLL0_NS_BASE) |
#define | DPLL0_S (( DPLL_TypeDef *) DPLL0_BASE) |
#define | EMU (( EMU_TypeDef *) EMU_BASE) |
#define | EMU_NS (( EMU_TypeDef *) EMU_NS_BASE) |
#define | EMU_S (( EMU_TypeDef *) EMU_BASE) |
#define | FRC (( FRC_TypeDef *) FRC_BASE) |
#define | FRC_NS (( FRC_TypeDef *) FRC_NS_BASE) |
#define | FRC_S (( FRC_TypeDef *) FRC_BASE) |
#define | FSRCO (( FSRCO_TypeDef *) FSRCO_BASE) |
#define | FSRCO_NS (( FSRCO_TypeDef *) FSRCO_NS_BASE) |
#define | FSRCO_S (( FSRCO_TypeDef *) FSRCO_BASE) |
#define | GPCRC (( GPCRC_TypeDef *) GPCRC_BASE) |
#define | GPCRC_NS (( GPCRC_TypeDef *) GPCRC_NS_BASE) |
#define | GPCRC_S (( GPCRC_TypeDef *) GPCRC_BASE) |
#define | GPIO (( GPIO_TypeDef *) GPIO_BASE) |
#define | GPIO_NS (( GPIO_TypeDef *) GPIO_NS_BASE) |
#define | GPIO_S (( GPIO_TypeDef *) GPIO_BASE) |
#define | HFRCO0 (( HFRCO_TypeDef *) HFRCO0_BASE) |
#define | HFRCO0_NS (( HFRCO_TypeDef *) HFRCO0_NS_BASE) |
#define | HFRCO0_S (( HFRCO_TypeDef *) HFRCO0_BASE) |
#define | HFRCOEM23 (( HFRCO_TypeDef *) HFRCOEM23_BASE) |
#define | HFRCOEM23_NS (( HFRCO_TypeDef *) HFRCOEM23_NS_BASE) |
#define | HFRCOEM23_S (( HFRCO_TypeDef *) HFRCOEM23_BASE) |
#define | HFXO0 (( HFXO_TypeDef *) HFXO0_BASE) |
#define | HFXO0_NS (( HFXO_TypeDef *) HFXO0_NS_BASE) |
#define | HFXO0_S (( HFXO_TypeDef *) HFXO0_BASE) |
#define | I2C0 (( I2C_TypeDef *) I2C0_BASE) |
#define | I2C0_NS (( I2C_TypeDef *) I2C0_NS_BASE) |
#define | I2C0_S (( I2C_TypeDef *) I2C0_BASE) |
#define | I2C1 (( I2C_TypeDef *) I2C1_BASE) |
#define | I2C1_NS (( I2C_TypeDef *) I2C1_NS_BASE) |
#define | I2C1_S (( I2C_TypeDef *) I2C1_BASE) |
#define | IADC0 (( IADC_TypeDef *) IADC0_BASE) |
#define | IADC0_NS (( IADC_TypeDef *) IADC0_NS_BASE) |
#define | IADC0_S (( IADC_TypeDef *) IADC0_BASE) |
#define | ICACHE0 (( ICACHE_TypeDef *) ICACHE0_BASE) |
#define | ICACHE0_NS (( ICACHE_TypeDef *) ICACHE0_NS_BASE) |
#define | ICACHE0_S (( ICACHE_TypeDef *) ICACHE0_BASE) |
#define | LDMA (( LDMA_TypeDef *) LDMA_BASE) |
#define | LDMA_NS (( LDMA_TypeDef *) LDMA_NS_BASE) |
#define | LDMA_S (( LDMA_TypeDef *) LDMA_BASE) |
#define | LDMAXBAR (( LDMAXBAR_TypeDef *) LDMAXBAR_BASE) |
#define | LDMAXBAR_NS (( LDMAXBAR_TypeDef *) LDMAXBAR_NS_BASE) |
#define | LDMAXBAR_S (( LDMAXBAR_TypeDef *) LDMAXBAR_BASE) |
#define | LETIMER0 (( LETIMER_TypeDef *) LETIMER0_BASE) |
#define | LETIMER0_NS (( LETIMER_TypeDef *) LETIMER0_NS_BASE) |
#define | LETIMER0_S (( LETIMER_TypeDef *) LETIMER0_BASE) |
#define | LFRCO (( LFRCO_TypeDef *) LFRCO_BASE) |
#define | LFRCO_NS (( LFRCO_TypeDef *) LFRCO_NS_BASE) |
#define | LFRCO_S (( LFRCO_TypeDef *) LFRCO_BASE) |
#define | LFXO (( LFXO_TypeDef *) LFXO_BASE) |
#define | LFXO_NS (( LFXO_TypeDef *) LFXO_NS_BASE) |
#define | LFXO_S (( LFXO_TypeDef *) LFXO_BASE) |
#define | LVGD (( LVGD_TypeDef *) LVGD_BASE) |
#define | LVGD_NS (( LVGD_TypeDef *) LVGD_NS_BASE) |
#define | LVGD_S (( LVGD_TypeDef *) LVGD_BASE) |
#define | MODEM (( MODEM_TypeDef *) MODEM_BASE) |
#define | MODEM_NS (( MODEM_TypeDef *) MODEM_NS_BASE) |
#define | MODEM_S (( MODEM_TypeDef *) MODEM_BASE) |
#define | MSC (( MSC_TypeDef *) MSC_BASE) |
#define | MSC_NS (( MSC_TypeDef *) MSC_NS_BASE) |
#define | MSC_S (( MSC_TypeDef *) MSC_BASE) |
#define | PROTIMER (( PROTIMER_TypeDef *) PROTIMER_BASE) |
#define | PROTIMER_NS (( PROTIMER_TypeDef *) PROTIMER_NS_BASE) |
#define | PROTIMER_S (( PROTIMER_TypeDef *) PROTIMER_BASE) |
#define | PRS (( PRS_TypeDef *) PRS_BASE) |
#define | PRS_NS (( PRS_TypeDef *) PRS_NS_BASE) |
#define | PRS_S (( PRS_TypeDef *) PRS_BASE) |
#define | RAC (( RAC_TypeDef *) RAC_BASE) |
#define | RAC_NS (( RAC_TypeDef *) RAC_NS_BASE) |
#define | RAC_S (( RAC_TypeDef *) RAC_BASE) |
#define | RADIOAES (( AES_TypeDef *) RADIOAES_BASE) |
#define | RADIOAES_NS (( AES_TypeDef *) RADIOAES_NS_BASE) |
#define | RADIOAES_S (( AES_TypeDef *) RADIOAES_BASE) |
#define | RFCRC (( RFCRC_TypeDef *) RFCRC_BASE) |
#define | RFCRC_NS (( RFCRC_TypeDef *) RFCRC_NS_BASE) |
#define | RFCRC_S (( RFCRC_TypeDef *) RFCRC_BASE) |
#define | RTCC (( RTCC_TypeDef *) RTCC_BASE) |
#define | RTCC_NS (( RTCC_TypeDef *) RTCC_NS_BASE) |
#define | RTCC_S (( RTCC_TypeDef *) RTCC_BASE) |
#define | SEMAILBOX_HOST (( SEMAILBOX_HOST_TypeDef *) SEMAILBOX_HOST_BASE) |
#define | SEMAILBOX_NS_HOST (( SEMAILBOX_HOST_TypeDef *) SEMAILBOX_NS_HOST_BASE) |
#define | SEMAILBOX_S_HOST (( SEMAILBOX_HOST_TypeDef *) SEMAILBOX_HOST_BASE) |
#define | SMU (( SMU_TypeDef *) SMU_BASE) |
#define | SMU_NS (( SMU_TypeDef *) SMU_NS_BASE) |
#define | SMU_S (( SMU_TypeDef *) SMU_BASE) |
#define | SYNTH (( SYNTH_TypeDef *) SYNTH_BASE) |
#define | SYNTH_NS (( SYNTH_TypeDef *) SYNTH_NS_BASE) |
#define | SYNTH_S (( SYNTH_TypeDef *) SYNTH_BASE) |
#define | SYSCFG (( SYSCFG_TypeDef *) SYSCFG_BASE) |
#define | SYSCFG_NS (( SYSCFG_TypeDef *) SYSCFG_NS_BASE) |
#define | SYSCFG_S (( SYSCFG_TypeDef *) SYSCFG_BASE) |
#define | TIMER0 (( TIMER_TypeDef *) TIMER0_BASE) |
#define | TIMER0_NS (( TIMER_TypeDef *) TIMER0_NS_BASE) |
#define | TIMER0_S (( TIMER_TypeDef *) TIMER0_BASE) |
#define | TIMER1 (( TIMER_TypeDef *) TIMER1_BASE) |
#define | TIMER1_NS (( TIMER_TypeDef *) TIMER1_NS_BASE) |
#define | TIMER1_S (( TIMER_TypeDef *) TIMER1_BASE) |
#define | TIMER2 (( TIMER_TypeDef *) TIMER2_BASE) |
#define | TIMER2_NS (( TIMER_TypeDef *) TIMER2_NS_BASE) |
#define | TIMER2_S (( TIMER_TypeDef *) TIMER2_BASE) |
#define | TIMER3 (( TIMER_TypeDef *) TIMER3_BASE) |
#define | TIMER3_NS (( TIMER_TypeDef *) TIMER3_NS_BASE) |
#define | TIMER3_S (( TIMER_TypeDef *) TIMER3_BASE) |
#define | ULFRCO (( ULFRCO_TypeDef *) ULFRCO_BASE) |
#define | ULFRCO_NS (( ULFRCO_TypeDef *) ULFRCO_NS_BASE) |
#define | ULFRCO_S (( ULFRCO_TypeDef *) ULFRCO_BASE) |
#define | USART0 (( USART_TypeDef *) USART0_BASE) |
#define | USART0_NS (( USART_TypeDef *) USART0_NS_BASE) |
#define | USART0_S (( USART_TypeDef *) USART0_BASE) |
#define | USART1 (( USART_TypeDef *) USART1_BASE) |
#define | USART1_NS (( USART_TypeDef *) USART1_NS_BASE) |
#define | USART1_S (( USART_TypeDef *) USART1_BASE) |
#define | USART2 (( USART_TypeDef *) USART2_BASE) |
#define | USART2_NS (( USART_TypeDef *) USART2_NS_BASE) |
#define | USART2_S (( USART_TypeDef *) USART2_BASE) |
#define | WDOG0 (( WDOG_TypeDef *) WDOG0_BASE) |
#define | WDOG0_NS (( WDOG_TypeDef *) WDOG0_NS_BASE) |
#define | WDOG0_S (( WDOG_TypeDef *) WDOG0_BASE) |
#define | WDOG1 (( WDOG_TypeDef *) WDOG1_BASE) |
#define | WDOG1_NS (( WDOG_TypeDef *) WDOG1_NS_BASE) |
#define | WDOG1_S (( WDOG_TypeDef *) WDOG1_BASE) |
Macro Definition Documentation
#define ACMP0 (( ACMP_TypeDef *) ACMP0_BASE) |
ACMP0_S base pointer
Definition at line
637
of file
efr32bg21a020f1024im32.h
.
Referenced by CAPLESENSE_setupACMP() .
#define ACMP0_NS (( ACMP_TypeDef *) ACMP0_NS_BASE) |
ACMP0_NS base pointer
Definition at line
686
of file
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.
#define ACMP0_S (( ACMP_TypeDef *) ACMP0_BASE) |
ACMP0_S base pointer
Definition at line
636
of file
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.
#define ACMP1 (( ACMP_TypeDef *) ACMP1_BASE) |
ACMP1_S base pointer
Definition at line
639
of file
efr32bg21a020f1024im32.h
.
Referenced by CAPLESENSE_setupACMP() .
#define ACMP1_NS (( ACMP_TypeDef *) ACMP1_NS_BASE) |
ACMP1_NS base pointer
Definition at line
687
of file
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.
#define ACMP1_S (( ACMP_TypeDef *) ACMP1_BASE) |
ACMP1_S base pointer
Definition at line
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.
#define AGC (( AGC_TypeDef *) AGC_BASE) |
AGC_S base pointer
Definition at line
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#define AGC_NS (( AGC_TypeDef *) AGC_NS_BASE) |
AGC_NS base pointer
Definition at line
709
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.
#define AGC_S (( AGC_TypeDef *) AGC_BASE) |
AGC_S base pointer
Definition at line
696
of file
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.
#define AMUXCP0 (( AMUXCP_TypeDef *) AMUXCP0_BASE) |
AMUXCP0_S base pointer
Definition at line
649
of file
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#define AMUXCP0_NS (( AMUXCP_TypeDef *) AMUXCP0_NS_BASE) |
AMUXCP0_NS base pointer
Definition at line
692
of file
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#define AMUXCP0_S (( AMUXCP_TypeDef *) AMUXCP0_BASE) |
AMUXCP0_S base pointer
Definition at line
648
of file
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.
#define BUFC (( BUFC_TypeDef *) BUFC_BASE) |
BUFC_S base pointer
Definition at line
627
of file
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.
#define BUFC_NS (( BUFC_TypeDef *) BUFC_NS_BASE) |
BUFC_NS base pointer
Definition at line
681
of file
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.
#define BUFC_S (( BUFC_TypeDef *) BUFC_BASE) |
BUFC_S base pointer
Definition at line
626
of file
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.
#define BURAM (( BURAM_TypeDef *) BURAM_BASE) |
BURAM_S base pointer
Definition at line
621
of file
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#define BURAM_NS (( BURAM_TypeDef *) BURAM_NS_BASE) |
BURAM_NS base pointer
Definition at line
678
of file
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.
#define BURAM_S (( BURAM_TypeDef *) BURAM_BASE) |
BURAM_S base pointer
Definition at line
620
of file
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.
#define BURTC (( BURTC_TypeDef *) BURTC_BASE) |
BURTC_S base pointer
Definition at line
613
of file
efr32bg21a020f1024im32.h
.
Referenced by BURTC_CompareGet() , BURTC_CompareSet() , BURTC_CounterGet() , BURTC_CounterReset() , BURTC_Enable() , BURTC_Init() , BURTC_IntClear() , BURTC_IntDisable() , BURTC_IntEnable() , BURTC_IntGet() , BURTC_IntGetEnabled() , BURTC_IntSet() , BURTC_Lock() , BURTC_Reset() , BURTC_Start() , BURTC_Status() , BURTC_Stop() , BURTC_SyncWait() , and BURTC_Unlock() .
#define BURTC_NS (( BURTC_TypeDef *) BURTC_NS_BASE) |
BURTC_NS base pointer
Definition at line
674
of file
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.
#define BURTC_S (( BURTC_TypeDef *) BURTC_BASE) |
BURTC_S base pointer
Definition at line
612
of file
efr32bg21a020f1024im32.h
.
#define CMU (( CMU_TypeDef *) CMU_BASE) |
CMU_S base pointer
Definition at line
571
of file
efr32bg21a020f1024im32.h
.
Referenced by
adcDeInit()
,
BSP_TraceProfilerSetup()
,
CAPSENSE_Init()
,
CHIP_Init()
,
CMU_CalibrateConfig()
,
CMU_CalibrateCont()
,
CMU_CalibrateCountGet()
,
CMU_CalibrateStart()
,
CMU_CalibrateStop()
,
CMU_ClkOutPinConfig()
,
CMU_ClockDivGet()
,
CMU_ClockDivSet()
,
CMU_ClockSelectGet()
,
CMU_ClockSelectSet()
,
CMU_IntClear()
,
CMU_IntDisable()
,
CMU_IntEnable()
,
CMU_IntGet()
,
CMU_IntGetEnabled()
,
CMU_IntSet()
,
CMU_Lock()
,
CMU_Unlock()
,
CMU_WdogLock()
,
CMU_WdogUnlock()
,
EMU_EM23Init()
,
EMU_EnterEM3()
,
EMU_EnterEM4()
,
MIC_init()
,
RTCC_Lock()
,
RTCC_Unlock()
,
SegmentLCD_Disable()
,
SegmentLCD_Init()
,
SystemHCLKGet()
,
SystemHFXOClockSet()
,
SystemSYSCLKGet()
, and
UDELAY_Calibrate()
.
#define CMU_NS (( CMU_TypeDef *) CMU_NS_BASE) |
CMU_NS base pointer
Definition at line
653
of file
efr32bg21a020f1024im32.h
.
#define CMU_S (( CMU_TypeDef *) CMU_BASE) |
CMU_S base pointer
Definition at line
570
of file
efr32bg21a020f1024im32.h
.
#define DEVINFO (( DEVINFO_TypeDef *) DEVINFO_BASE) |
DEVINFO base pointer
Definition at line
715
of file
efr32bg21a020f1024im32.h
.
Referenced by BSP_initClocks() , calibration() , EMU_EnterEM4() , IADC_init() , SYSTEM_GetCalibrationTemperature() , SYSTEM_GetDevinfoRev() , SYSTEM_GetFamily() , SYSTEM_GetFlashPageSize() , SYSTEM_GetFlashSize() , SYSTEM_GetPartNumber() , SYSTEM_GetProdRev() , SYSTEM_GetSRAMSize() , and SYSTEM_GetUnique() .
#define DPLL0 (( DPLL_TypeDef *) DPLL0_BASE) |
DPLL0_S base pointer
Definition at line
579
of file
efr32bg21a020f1024im32.h
.
Referenced by CMU_DPLLLock() , CMU_DPLLUnlock() , and CMU_HFRCODPLLBandSet() .
#define DPLL0_NS (( DPLL_TypeDef *) DPLL0_NS_BASE) |
DPLL0_NS base pointer
Definition at line
657
of file
efr32bg21a020f1024im32.h
.
#define DPLL0_S (( DPLL_TypeDef *) DPLL0_BASE) |
DPLL0_S base pointer
Definition at line
578
of file
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.
#define EMU (( EMU_TypeDef *) EMU_BASE) |
EMU_S base pointer
Definition at line
569
of file
efr32bg21a020f1024im32.h
.
Referenced by CHIP_Init() , EMU_EM23Init() , EMU_EM4Init() , EMU_EnterEM4() , EMU_EnterEM4H() , EMU_EnterEM4S() , EMU_IntClear() , EMU_IntDisable() , EMU_IntEnable() , EMU_IntGet() , EMU_IntGetEnabled() , EMU_IntSet() , EMU_Lock() , EMU_MemPwrDown() , EMU_RamPowerDown() , EMU_RamPowerUp() , EMU_UnlatchPinRetention() , EMU_Unlock() , GPIO_EM4SetPinRetention() , RMU_ResetCauseClear() , RMU_ResetCauseGet() , RMU_ResetControl() , TEMPDRV_GetTemp() , and updateInterrupts() .
#define EMU_NS (( EMU_TypeDef *) EMU_NS_BASE) |
EMU_NS base pointer
Definition at line
652
of file
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.
#define EMU_S (( EMU_TypeDef *) EMU_BASE) |
EMU_S base pointer
Definition at line
568
of file
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.
#define FRC (( FRC_TypeDef *) FRC_BASE) |
FRC_S base pointer
Definition at line
695
of file
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.
#define FRC_NS (( FRC_TypeDef *) FRC_NS_BASE) |
FRC_NS base pointer
Definition at line
708
of file
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.
#define FRC_S (( FRC_TypeDef *) FRC_BASE) |
FRC_S base pointer
Definition at line
694
of file
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.
#define FSRCO (( FSRCO_TypeDef *) FSRCO_BASE) |
FSRCO_S base pointer
Definition at line
577
of file
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.
#define FSRCO_NS (( FSRCO_TypeDef *) FSRCO_NS_BASE) |
FSRCO_NS base pointer
Definition at line
656
of file
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.
#define FSRCO_S (( FSRCO_TypeDef *) FSRCO_BASE) |
FSRCO_S base pointer
Definition at line
576
of file
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.
#define GPCRC (( GPCRC_TypeDef *) GPCRC_BASE) |
GPCRC_S base pointer
Definition at line
623
of file
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.
#define GPCRC_NS (( GPCRC_TypeDef *) GPCRC_NS_BASE) |
GPCRC_NS base pointer
Definition at line
679
of file
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.
#define GPCRC_S (( GPCRC_TypeDef *) GPCRC_BASE) |
GPCRC_S base pointer
Definition at line
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of file
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.
#define GPIO (( GPIO_TypeDef *) GPIO_BASE) |
GPIO_S base pointer
Definition at line
593
of file
efr32bg21a020f1024im32.h
.
Referenced by ACMP_GPIOSetup() , BSP_TraceProfilerSetup() , CHIP_Init() , CMU_ClkOutPinConfig() , GPIO_DbgLocationSet() , GPIO_DbgSWDClkEnable() , GPIO_DbgSWDIOEnable() , GPIO_DbgSWOEnable() , GPIO_EM4DisablePinWakeup() , GPIO_EM4EnablePinWakeup() , GPIO_EM4GetPinWakeupCause() , GPIO_EM4SetPinRetention() , GPIO_ExtIntConfig() , GPIO_InputSenseSet() , GPIO_IntClear() , GPIO_IntDisable() , GPIO_IntEnable() , GPIO_IntGet() , GPIO_IntGetEnabled() , GPIO_IntSet() , GPIO_Lock() , GPIO_PinInGet() , GPIO_PinModeGet() , GPIO_PinModeSet() , GPIO_PinOutClear() , GPIO_PinOutGet() , GPIO_PinOutSet() , GPIO_PinOutToggle() , GPIO_PortInGet() , GPIO_PortOutClear() , GPIO_PortOutGet() , GPIO_PortOutSet() , GPIO_PortOutSetVal() , GPIO_PortOutToggle() , GPIO_SlewrateSet() , GPIO_Unlock() , I2CSPM_Init() , MICROSD_Deselect() , MICROSD_Select() , PRS_PinOutput() , RETARGET_SerialInit() , SPIDRV_Init() , UARTDRV_InitUart() , and USART_InitAsync() .
#define GPIO_NS (( GPIO_TypeDef *) GPIO_NS_BASE) |
GPIO_NS base pointer
Definition at line
664
of file
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.
#define GPIO_S (( GPIO_TypeDef *) GPIO_BASE) |
GPIO_S base pointer
Definition at line
592
of file
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.
#define HFRCO0 (( HFRCO_TypeDef *) HFRCO0_BASE) |
HFRCO0_S base pointer
Definition at line
575
of file
efr32bg21a020f1024im32.h
.
Referenced by
CMU_DPLLLock()
,
CMU_HFRCODPLLBandSet()
,
CMU_OscillatorTuningGet()
,
CMU_OscillatorTuningSet()
, and
SystemHFRCODPLLClockGet()
.
#define HFRCO0_NS (( HFRCO_TypeDef *) HFRCO0_NS_BASE) |
HFRCO0_NS base pointer
Definition at line
655
of file
efr32bg21a020f1024im32.h
.
#define HFRCO0_S (( HFRCO_TypeDef *) HFRCO0_BASE) |
HFRCO0_S base pointer
Definition at line
574
of file
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.
#define HFRCOEM23 (( HFRCO_TypeDef *) HFRCOEM23_BASE) |
HFRCOEM23_S base pointer
Definition at line
643
of file
efr32bg21a020f1024im32.h
.
Referenced by CMU_HFRCOEM23BandSet() , CMU_OscillatorTuningGet() , CMU_OscillatorTuningSet() , and SystemHFRCOEM23ClockGet() .
#define HFRCOEM23_NS (( HFRCO_TypeDef *) HFRCOEM23_NS_BASE) |
HFRCOEM23_NS base pointer
Definition at line
689
of file
efr32bg21a020f1024im32.h
.
#define HFRCOEM23_S (( HFRCO_TypeDef *) HFRCOEM23_BASE) |
HFRCOEM23_S base pointer
Definition at line
642
of file
efr32bg21a020f1024im32.h
.
#define HFXO0 (( HFXO_TypeDef *) HFXO0_BASE) |
HFXO0_S base pointer
Definition at line
573
of file
efr32bg21a020f1024im32.h
.
Referenced by CHIP_Init() , CMU_ClockSelectSet() , and CMU_HFXOInit() .
#define HFXO0_NS (( HFXO_TypeDef *) HFXO0_NS_BASE) |
HFXO0_NS base pointer
Definition at line
654
of file
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.
#define HFXO0_S (( HFXO_TypeDef *) HFXO0_BASE) |
HFXO0_S base pointer
Definition at line
572
of file
efr32bg21a020f1024im32.h
.
#define I2C0 (( I2C_TypeDef *) I2C0_BASE) |
I2C0_S base pointer
Definition at line
641
of file
efr32bg21a020f1024im32.h
.
Referenced by I2C_BusFreqGet() , I2C_BusFreqSet() , I2C_Transfer() , I2C_TransferInit() , and I2CSPM_Init() .
#define I2C0_NS (( I2C_TypeDef *) I2C0_NS_BASE) |
I2C0_NS base pointer
Definition at line
688
of file
efr32bg21a020f1024im32.h
.
#define I2C0_S (( I2C_TypeDef *) I2C0_BASE) |
I2C0_S base pointer
Definition at line
640
of file
efr32bg21a020f1024im32.h
.
#define I2C1 (( I2C_TypeDef *) I2C1_BASE) |
I2C1_S base pointer
Definition at line
615
of file
efr32bg21a020f1024im32.h
.
Referenced by BOARD_i2cBusSelect() , BOARD_init() , I2C_BusFreqGet() , I2C_BusFreqSet() , I2C_Transfer() , I2C_TransferInit() , and I2CSPM_Init() .
#define I2C1_NS (( I2C_TypeDef *) I2C1_NS_BASE) |
I2C1_NS base pointer
Definition at line
675
of file
efr32bg21a020f1024im32.h
.
#define I2C1_S (( I2C_TypeDef *) I2C1_BASE) |
I2C1_S base pointer
Definition at line
614
of file
efr32bg21a020f1024im32.h
.
#define IADC0 (( IADC_TypeDef *) IADC0_BASE) |
IADC0_S base pointer
Definition at line
635
of file
efr32bg21a020f1024im32.h
.
#define IADC0_NS (( IADC_TypeDef *) IADC0_NS_BASE) |
IADC0_NS base pointer
Definition at line
685
of file
efr32bg21a020f1024im32.h
.
#define IADC0_S (( IADC_TypeDef *) IADC0_BASE) |
IADC0_S base pointer
Definition at line
634
of file
efr32bg21a020f1024im32.h
.
#define ICACHE0 (( ICACHE_TypeDef *) ICACHE0_BASE) |
ICACHE0_S base pointer
Definition at line
589
of file
efr32bg21a020f1024im32.h
.
#define ICACHE0_NS (( ICACHE_TypeDef *) ICACHE0_NS_BASE) |
ICACHE0_NS base pointer
Definition at line
662
of file
efr32bg21a020f1024im32.h
.
#define ICACHE0_S (( ICACHE_TypeDef *) ICACHE0_BASE) |
ICACHE0_S base pointer
Definition at line
588
of file
efr32bg21a020f1024im32.h
.
#define LDMA (( LDMA_TypeDef *) LDMA_BASE) |
LDMA_S base pointer
Definition at line
595
of file
efr32bg21a020f1024im32.h
.
Referenced by DMADRV_TransferCompletePending() , LDMA_ChannelEnabled() , LDMA_DeInit() , LDMA_EnableChannelRequest() , LDMA_Init() , LDMA_IntClear() , LDMA_IntDisable() , LDMA_IntEnable() , LDMA_IntGet() , LDMA_IntGetEnabled() , LDMA_IntSet() , LDMA_StartTransfer() , LDMA_StopTransfer() , LDMA_TransferDone() , LDMA_TransferRemainingCount() , and mscEccReadWriteExistingDma() .
#define LDMA_NS (( LDMA_TypeDef *) LDMA_NS_BASE) |
LDMA_NS base pointer
Definition at line
665
of file
efr32bg21a020f1024im32.h
.
#define LDMA_S (( LDMA_TypeDef *) LDMA_BASE) |
LDMA_S base pointer
Definition at line
594
of file
efr32bg21a020f1024im32.h
.
#define LDMAXBAR (( LDMAXBAR_TypeDef *) LDMAXBAR_BASE) |
LDMAXBAR_S base pointer
Definition at line
597
of file
efr32bg21a020f1024im32.h
.
Referenced by LDMA_StartTransfer() .
#define LDMAXBAR_NS (( LDMAXBAR_TypeDef *) LDMAXBAR_NS_BASE) |
LDMAXBAR_NS base pointer
Definition at line
666
of file
efr32bg21a020f1024im32.h
.
#define LDMAXBAR_S (( LDMAXBAR_TypeDef *) LDMAXBAR_BASE) |
LDMAXBAR_S base pointer
Definition at line
596
of file
efr32bg21a020f1024im32.h
.
#define LETIMER0 (( LETIMER_TypeDef *) LETIMER0_BASE) |
LETIMER0_S base pointer
Definition at line
633
of file
efr32bg21a020f1024im32.h
.
Referenced by LETIMER_Reset() .
#define LETIMER0_NS (( LETIMER_TypeDef *) LETIMER0_NS_BASE) |
LETIMER0_NS base pointer
Definition at line
684
of file
efr32bg21a020f1024im32.h
.
#define LETIMER0_S (( LETIMER_TypeDef *) LETIMER0_BASE) |
LETIMER0_S base pointer
Definition at line
632
of file
efr32bg21a020f1024im32.h
.
#define LFRCO (( LFRCO_TypeDef *) LFRCO_BASE) |
LFRCO_S base pointer
Definition at line
583
of file
efr32bg21a020f1024im32.h
.
Referenced by CMU_OscillatorTuningGet() , CMU_OscillatorTuningSet() , and UDELAY_Calibrate() .
#define LFRCO_NS (( LFRCO_TypeDef *) LFRCO_NS_BASE) |
LFRCO_NS base pointer
Definition at line
659
of file
efr32bg21a020f1024im32.h
.
#define LFRCO_S (( LFRCO_TypeDef *) LFRCO_BASE) |
LFRCO_S base pointer
Definition at line
582
of file
efr32bg21a020f1024im32.h
.
#define LFXO (( LFXO_TypeDef *) LFXO_BASE) |
LFXO_S base pointer
Definition at line
581
of file
efr32bg21a020f1024im32.h
.
Referenced by CMU_LFXOInit() .
#define LFXO_NS (( LFXO_TypeDef *) LFXO_NS_BASE) |
LFXO_NS base pointer
Definition at line
658
of file
efr32bg21a020f1024im32.h
.
#define LFXO_S (( LFXO_TypeDef *) LFXO_BASE) |
LFXO_S base pointer
Definition at line
580
of file
efr32bg21a020f1024im32.h
.
#define LVGD (( LVGD_TypeDef *) LVGD_BASE) |
LVGD_S base pointer
Definition at line
617
of file
efr32bg21a020f1024im32.h
.
#define LVGD_NS (( LVGD_TypeDef *) LVGD_NS_BASE) |
LVGD_NS base pointer
Definition at line
676
of file
efr32bg21a020f1024im32.h
.
#define LVGD_S (( LVGD_TypeDef *) LVGD_BASE) |
LVGD_S base pointer
Definition at line
616
of file
efr32bg21a020f1024im32.h
.
#define MODEM (( MODEM_TypeDef *) MODEM_BASE) |
MODEM_S base pointer
Definition at line
701
of file
efr32bg21a020f1024im32.h
.
#define MODEM_NS (( MODEM_TypeDef *) MODEM_NS_BASE) |
MODEM_NS base pointer
Definition at line
711
of file
efr32bg21a020f1024im32.h
.
#define MODEM_S (( MODEM_TypeDef *) MODEM_BASE) |
MODEM_S base pointer
Definition at line
700
of file
efr32bg21a020f1024im32.h
.
#define MSC (( MSC_TypeDef *) MSC_BASE) |
MSC_S base pointer
Definition at line
587
of file
efr32bg21a020f1024im32.h
.
Referenced by CHIP_Init() , DBG_DisableDebugAccess() , MSC_Deinit() , MSC_EccConfigSet() , MSC_ErasePage() , MSC_ExecConfigSet() , MSC_Init() , MSC_IntClear() , MSC_IntDisable() , MSC_IntEnable() , MSC_IntGet() , MSC_IntGetEnabled() , MSC_IntSet() , and MSC_WriteWord() .
#define MSC_NS (( MSC_TypeDef *) MSC_NS_BASE) |
MSC_NS base pointer
Definition at line
661
of file
efr32bg21a020f1024im32.h
.
#define MSC_S (( MSC_TypeDef *) MSC_BASE) |
MSC_S base pointer
Definition at line
586
of file
efr32bg21a020f1024im32.h
.
#define PROTIMER (( PROTIMER_TypeDef *) PROTIMER_BASE) |
PROTIMER_S base pointer
Definition at line
705
of file
efr32bg21a020f1024im32.h
.
#define PROTIMER_NS (( PROTIMER_TypeDef *) PROTIMER_NS_BASE) |
PROTIMER_NS base pointer
Definition at line
713
of file
efr32bg21a020f1024im32.h
.
#define PROTIMER_S (( PROTIMER_TypeDef *) PROTIMER_BASE) |
PROTIMER_S base pointer
Definition at line
704
of file
efr32bg21a020f1024im32.h
.
#define PRS (( PRS_TypeDef *) PRS_BASE) |
PRS_S base pointer
Definition at line
591
of file
efr32bg21a020f1024im32.h
.
Referenced by CAPSENSE_Init() , ezradio_hal_GpioInit() , PRS_Combine() , PRS_ConnectConsumer() , PRS_ConnectSignal() , PRS_LevelGet() , PRS_LevelSet() , PRS_PulseTrigger() , PRS_Reset() , PRS_SourceSignalSet() , PRS_Values() , prsIrInput() , prsRxInput() , prsTriggerInput() , and RTCC_ChannelInit() .
#define PRS_NS (( PRS_TypeDef *) PRS_NS_BASE) |
PRS_NS base pointer
Definition at line
663
of file
efr32bg21a020f1024im32.h
.
#define PRS_S (( PRS_TypeDef *) PRS_BASE) |
PRS_S base pointer
Definition at line
590
of file
efr32bg21a020f1024im32.h
.
#define RAC (( RAC_TypeDef *) RAC_BASE) |
RAC_S base pointer
Definition at line
707
of file
efr32bg21a020f1024im32.h
.
#define RAC_NS (( RAC_TypeDef *) RAC_NS_BASE) |
RAC_NS base pointer
Definition at line
714
of file
efr32bg21a020f1024im32.h
.
#define RAC_S (( RAC_TypeDef *) RAC_BASE) |
RAC_S base pointer
Definition at line
706
of file
efr32bg21a020f1024im32.h
.
#define RADIOAES (( AES_TypeDef *) RADIOAES_BASE) |
RADIOAES_S base pointer
Definition at line
625
of file
efr32bg21a020f1024im32.h
.
#define RADIOAES_NS (( AES_TypeDef *) RADIOAES_NS_BASE) |
RADIOAES_NS base pointer
Definition at line
680
of file
efr32bg21a020f1024im32.h
.
#define RADIOAES_S (( AES_TypeDef *) RADIOAES_BASE) |
RADIOAES_S base pointer
Definition at line
624
of file
efr32bg21a020f1024im32.h
.
#define RFCRC (( RFCRC_TypeDef *) RFCRC_BASE) |
RFCRC_S base pointer
Definition at line
699
of file
efr32bg21a020f1024im32.h
.
#define RFCRC_NS (( RFCRC_TypeDef *) RFCRC_NS_BASE) |
RFCRC_NS base pointer
Definition at line
710
of file
efr32bg21a020f1024im32.h
.
#define RFCRC_S (( RFCRC_TypeDef *) RFCRC_BASE) |
RFCRC_S base pointer
Definition at line
698
of file
efr32bg21a020f1024im32.h
.
#define RTCC (( RTCC_TypeDef *) RTCC_BASE) |
RTCC_S base pointer
Definition at line
631
of file
efr32bg21a020f1024im32.h
.
Referenced by RTCC_ChannelCaptureValueGet() , RTCC_ChannelCompareValueGet() , RTCC_ChannelCompareValueSet() , RTCC_ChannelInit() , RTCC_CombinedCounterGet() , RTCC_CounterGet() , RTCC_CounterSet() , RTCC_Enable() , RTCC_Init() , RTCC_IntClear() , RTCC_IntDisable() , RTCC_IntEnable() , RTCC_IntGet() , RTCC_IntGetEnabled() , RTCC_IntSet() , RTCC_Lock() , RTCC_PreCounterGet() , RTCC_PreCounterSet() , RTCC_Reset() , RTCC_Start() , RTCC_StatusClear() , RTCC_StatusGet() , RTCC_Stop() , RTCC_SyncWait() , RTCC_Unlock() , and UDELAY_Calibrate() .
#define RTCC_NS (( RTCC_TypeDef *) RTCC_NS_BASE) |
RTCC_NS base pointer
Definition at line
683
of file
efr32bg21a020f1024im32.h
.
#define RTCC_S (( RTCC_TypeDef *) RTCC_BASE) |
RTCC_S base pointer
Definition at line
630
of file
efr32bg21a020f1024im32.h
.
#define SEMAILBOX_HOST (( SEMAILBOX_HOST_TypeDef *) SEMAILBOX_HOST_BASE) |
SEMAILBOX_S_HOST base pointer
Definition at line
651
of file
efr32bg21a020f1024im32.h
.
Referenced by SE_disableInterrupt() , SE_enableInterrupt() , SE_executeCommand() , SE_isCommandCompleted() , and SE_readCommandResponse() .
#define SEMAILBOX_NS_HOST (( SEMAILBOX_HOST_TypeDef *) SEMAILBOX_NS_HOST_BASE) |
SEMAILBOX_NS_HOST base pointer
Definition at line
693
of file
efr32bg21a020f1024im32.h
.
#define SEMAILBOX_S_HOST (( SEMAILBOX_HOST_TypeDef *) SEMAILBOX_HOST_BASE) |
SEMAILBOX_S_HOST base pointer
Definition at line
650
of file
efr32bg21a020f1024im32.h
.
#define SMU (( SMU_TypeDef *) SMU_BASE) |
SMU_S base pointer
Definition at line
629
of file
efr32bg21a020f1024im32.h
.
Referenced by SMU_EnablePPU() , SMU_GetFaultingPeripheral() , SMU_Init() , SMU_IntClear() , SMU_IntDisable() , SMU_IntEnable() , SMU_IntGet() , SMU_IntGetEnabled() , SMU_IntSet() , and SMU_SetPrivilegedAccess() .
#define SMU_NS (( SMU_TypeDef *) SMU_NS_BASE) |
SMU_NS base pointer
Definition at line
682
of file
efr32bg21a020f1024im32.h
.
#define SMU_S (( SMU_TypeDef *) SMU_BASE) |
SMU_S base pointer
Definition at line
628
of file
efr32bg21a020f1024im32.h
.
#define SYNTH (( SYNTH_TypeDef *) SYNTH_BASE) |
SYNTH_S base pointer
Definition at line
703
of file
efr32bg21a020f1024im32.h
.
#define SYNTH_NS (( SYNTH_TypeDef *) SYNTH_NS_BASE) |
SYNTH_NS base pointer
Definition at line
712
of file
efr32bg21a020f1024im32.h
.
#define SYNTH_S (( SYNTH_TypeDef *) SYNTH_BASE) |
SYNTH_S base pointer
Definition at line
702
of file
efr32bg21a020f1024im32.h
.
#define SYSCFG (( SYSCFG_TypeDef *) SYSCFG_BASE) |
SYSCFG_S base pointer
Definition at line
619
of file
efr32bg21a020f1024im32.h
.
Referenced by EMU_RamPowerDown() , and SYSTEM_ChipRevisionGet() .
#define SYSCFG_NS (( SYSCFG_TypeDef *) SYSCFG_NS_BASE) |
SYSCFG_NS base pointer
Definition at line
677
of file
efr32bg21a020f1024im32.h
.
#define SYSCFG_S (( SYSCFG_TypeDef *) SYSCFG_BASE) |
SYSCFG_S base pointer
Definition at line
618
of file
efr32bg21a020f1024im32.h
.
#define TIMER0 (( TIMER_TypeDef *) TIMER0_BASE) |
TIMER0_S base pointer
Definition at line
599
of file
efr32bg21a020f1024im32.h
.
Referenced by CAPSENSE_Init() , CAPSENSE_Measure() , TIMER0_IRQHandler() , TIMER_ClearDTIFault() , TIMER_EnableDTI() , TIMER_GetDTIFault() , TIMER_InitDTI() , and TIMER_Valid() .
#define TIMER0_NS (( TIMER_TypeDef *) TIMER0_NS_BASE) |
TIMER0_NS base pointer
Definition at line
667
of file
efr32bg21a020f1024im32.h
.
#define TIMER0_S (( TIMER_TypeDef *) TIMER0_BASE) |
TIMER0_S base pointer
Definition at line
598
of file
efr32bg21a020f1024im32.h
.
#define TIMER1 (( TIMER_TypeDef *) TIMER1_BASE) |
TIMER1_S base pointer
Definition at line
601
of file
efr32bg21a020f1024im32.h
.
Referenced by CAPSENSE_Init() , CAPSENSE_Measure() , TIMER0_IRQHandler() , and TIMER_Valid() .
#define TIMER1_NS (( TIMER_TypeDef *) TIMER1_NS_BASE) |
TIMER1_NS base pointer
Definition at line
668
of file
efr32bg21a020f1024im32.h
.
#define TIMER1_S (( TIMER_TypeDef *) TIMER1_BASE) |
TIMER1_S base pointer
Definition at line
600
of file
efr32bg21a020f1024im32.h
.
#define TIMER2 (( TIMER_TypeDef *) TIMER2_BASE) |
TIMER2_S base pointer
Definition at line
603
of file
efr32bg21a020f1024im32.h
.
Referenced by TIMER_Valid() .
#define TIMER2_NS (( TIMER_TypeDef *) TIMER2_NS_BASE) |
TIMER2_NS base pointer
Definition at line
669
of file
efr32bg21a020f1024im32.h
.
#define TIMER2_S (( TIMER_TypeDef *) TIMER2_BASE) |
TIMER2_S base pointer
Definition at line
602
of file
efr32bg21a020f1024im32.h
.
#define TIMER3 (( TIMER_TypeDef *) TIMER3_BASE) |
TIMER3_S base pointer
Definition at line
605
of file
efr32bg21a020f1024im32.h
.
Referenced by TIMER_Valid() .
#define TIMER3_NS (( TIMER_TypeDef *) TIMER3_NS_BASE) |
TIMER3_NS base pointer
Definition at line
670
of file
efr32bg21a020f1024im32.h
.
#define TIMER3_S (( TIMER_TypeDef *) TIMER3_BASE) |
TIMER3_S base pointer
Definition at line
604
of file
efr32bg21a020f1024im32.h
.
#define ULFRCO (( ULFRCO_TypeDef *) ULFRCO_BASE) |
ULFRCO_S base pointer
Definition at line
585
of file
efr32bg21a020f1024im32.h
.
#define ULFRCO_NS (( ULFRCO_TypeDef *) ULFRCO_NS_BASE) |
ULFRCO_NS base pointer
Definition at line
660
of file
efr32bg21a020f1024im32.h
.
#define ULFRCO_S (( ULFRCO_TypeDef *) ULFRCO_BASE) |
ULFRCO_S base pointer
Definition at line
584
of file
efr32bg21a020f1024im32.h
.
#define USART0 (( USART_TypeDef *) USART0_BASE) |
USART0_S base pointer
Definition at line
607
of file
efr32bg21a020f1024im32.h
.
Referenced by prsIrInput() , prsRxInput() , prsTriggerInput() , SPIDRV_Init() , UARTDRV_InitUart() , and USART_InitIrDA() .
#define USART0_NS (( USART_TypeDef *) USART0_NS_BASE) |
USART0_NS base pointer
Definition at line
671
of file
efr32bg21a020f1024im32.h
.
#define USART0_S (( USART_TypeDef *) USART0_BASE) |
USART0_S base pointer
Definition at line
606
of file
efr32bg21a020f1024im32.h
.
#define USART1 (( USART_TypeDef *) USART1_BASE) |
USART1_S base pointer
Definition at line
609
of file
efr32bg21a020f1024im32.h
.
Referenced by prsIrInput() , prsRxInput() , prsTriggerInput() , SPI_TFT_Init() , SPI_TFT_WriteRegister() , SPIDRV_Init() , UARTDRV_InitUart() , and USART_InitIrDA() .
#define USART1_NS (( USART_TypeDef *) USART1_NS_BASE) |
USART1_NS base pointer
Definition at line
672
of file
efr32bg21a020f1024im32.h
.
#define USART1_S (( USART_TypeDef *) USART1_BASE) |
USART1_S base pointer
Definition at line
608
of file
efr32bg21a020f1024im32.h
.
#define USART2 (( USART_TypeDef *) USART2_BASE) |
USART2_S base pointer
Definition at line
611
of file
efr32bg21a020f1024im32.h
.
Referenced by prsIrInput() , prsRxInput() , prsTriggerInput() , SPIDRV_Init() , UARTDRV_InitUart() , USART_BaudrateAsyncSet() , USART_BaudrateGet() , and USART_BaudrateSyncSet() .
#define USART2_NS (( USART_TypeDef *) USART2_NS_BASE) |
USART2_NS base pointer
Definition at line
673
of file
efr32bg21a020f1024im32.h
.
#define USART2_S (( USART_TypeDef *) USART2_BASE) |
USART2_S base pointer
Definition at line
610
of file
efr32bg21a020f1024im32.h
.
#define WDOG0 (( WDOG_TypeDef *) WDOG0_BASE) |
WDOG0_S base pointer
Definition at line
645
of file
efr32bg21a020f1024im32.h
.
#define WDOG0_NS (( WDOG_TypeDef *) WDOG0_NS_BASE) |
WDOG0_NS base pointer
Definition at line
690
of file
efr32bg21a020f1024im32.h
.
#define WDOG0_S (( WDOG_TypeDef *) WDOG0_BASE) |
WDOG0_S base pointer
Definition at line
644
of file
efr32bg21a020f1024im32.h
.
#define WDOG1 (( WDOG_TypeDef *) WDOG1_BASE) |
WDOG1_S base pointer
Definition at line
647
of file
efr32bg21a020f1024im32.h
.
#define WDOG1_NS (( WDOG_TypeDef *) WDOG1_NS_BASE) |
WDOG1_NS base pointer
Definition at line
691
of file
efr32bg21a020f1024im32.h
.
#define WDOG1_S (( WDOG_TypeDef *) WDOG1_BASE) |
WDOG1_S base pointer
Definition at line
646
of file
efr32bg21a020f1024im32.h
.