License

SPDX-License-Identifier: Zlib

The licensor of this software is Silicon Laboratories Inc.

This software is provided 'as-is', without any express or implied warranty. In no event will the authors be held liable for any damages arising from the use of this software.

Permission is granted to anyone to use this software for any purpose, including commercial applications, and to alter it and redistribute it freely, subject to the following restrictions:

The origin of this software must not be misrepresented; you must not claim that you wrote the original software. If you use this software in a product, an acknowledgment in the product documentation would be appreciated but is not required.
Altered source versions must be plainly marked as such, and must not be misrepresented as being the original software.
This notice may not be removed or altered from any source distribution.

Definition in file em_core.c .


       #include "
       
        em_core.h
       
       "


       #include "
       
        em_assert.h
       
       "

Macros
#define	CORE_ATOMIC_BASE_PRIORITY_LEVEL 3

#define	CORE_ATOMIC_METHOD CORE_ATOMIC_METHOD_PRIMASK

#define	CORE_INTERRUPT_ENTRY ()

#define	CORE_INTERRUPT_EXIT ()

Functions
void	CORE_AtomicDisableIrq (void)
	Disable interrupts.

void	CORE_AtomicEnableIrq (void)
	Enable interrupts.

void	CORE_CriticalDisableIrq (void)
	Disable interrupts.

void	CORE_CriticalEnableIrq (void)
	Enable interrupts.

CORE_irqState_t	CORE_EnterAtomic (void)
	Enter an ATOMIC section.

CORE_irqState_t	CORE_EnterCritical (void)
	Enter a CRITICAL section.

void	CORE_EnterNvicMask ( CORE_nvicMask_t nvicState, const CORE_nvicMask_t disable)
	Enter a NVIC mask section.

void	CORE_ExitAtomic ( CORE_irqState_t irqState)
	Exit an ATOMIC section.

void	CORE_ExitCritical ( CORE_irqState_t irqState)
	Exit a CRITICAL section.

void	CORE_GetNvicEnabledMask ( CORE_nvicMask_t *mask)
	Get the current NVIC enable mask state.

bool	CORE_GetNvicMaskDisableState (const CORE_nvicMask_t *mask)
	Get NVIC disable state for a given mask.

void *	CORE_GetNvicRamTableHandler (IRQn_Type irqN)
	Utility function to get the handler for a specific interrupt.

bool	CORE_InIrqContext (void)
	Check whether the current CPU operation mode is handler mode.

void	CORE_InitNvicVectorTable (uint32_t sourceTable, uint32_t sourceSize, uint32_t targetTable, uint32_t targetSize, void *defaultHandler, bool overwriteActive)
	Initialize an interrupt vector table by copying table entries from a source to a target table.

bool	CORE_IrqIsBlocked (IRQn_Type irqN)
	Check if a specific interrupt is disabled or blocked.

bool	CORE_IrqIsDisabled (void)
	Check if interrupts are disabled.

void	CORE_NvicDisableMask (const CORE_nvicMask_t *disable)
	Disable NVIC interrupts.

void	CORE_NvicEnableMask (const CORE_nvicMask_t *enable)
	Set current NVIC interrupt enable mask.

bool	CORE_NvicIRQDisabled (IRQn_Type irqN)
	Check if an NVIC interrupt is disabled.

void	CORE_NvicMaskClearIRQ (IRQn_Type irqN, CORE_nvicMask_t *mask)
	Utility function to clear an IRQn bit in a NVIC enable/disable mask.

void	CORE_NvicMaskSetIRQ (IRQn_Type irqN, CORE_nvicMask_t *mask)
	Utility function to set an IRQn bit in a NVIC enable/disable mask.

void	CORE_SetNvicRamTableHandler (IRQn_Type irqN, void *handler)
	Utility function to set the handler for a specific interrupt.

void	CORE_YieldAtomic (void)
	Brief interrupt enable/disable sequence to allow handling of pending interrupts.

void	CORE_YieldCritical (void)
	Brief interrupt enable/disable sequence to allow handling of pending interrupts.

void	CORE_YieldNvicMask (const CORE_nvicMask_t *enable)
	Brief NVIC interrupt enable/disable sequence to allow handling of pending interrupts.

em_core.c File Reference

License

Macros

Functions