Macros
#define	_CMU_ADCCTRL_ADC0CLKDIV_DEFAULT 0x00000000UL

#define	_CMU_ADCCTRL_ADC0CLKDIV_MASK 0x3UL

#define	_CMU_ADCCTRL_ADC0CLKDIV_NODIVISION 0x00000000UL

#define	_CMU_ADCCTRL_ADC0CLKDIV_SHIFT 0

#define	_CMU_ADCCTRL_ADC0CLKINV_DEFAULT 0x00000000UL

#define	_CMU_ADCCTRL_ADC0CLKINV_MASK 0x100UL

#define	_CMU_ADCCTRL_ADC0CLKINV_SHIFT 8

#define	_CMU_ADCCTRL_ADC0CLKSEL_AUXHFRCO 0x00000001UL

#define	_CMU_ADCCTRL_ADC0CLKSEL_DEFAULT 0x00000000UL

#define	_CMU_ADCCTRL_ADC0CLKSEL_DISABLED 0x00000000UL

#define	_CMU_ADCCTRL_ADC0CLKSEL_HFSRCCLK 0x00000003UL

#define	_CMU_ADCCTRL_ADC0CLKSEL_HFXO 0x00000002UL

#define	_CMU_ADCCTRL_ADC0CLKSEL_MASK 0x30UL

#define	_CMU_ADCCTRL_ADC0CLKSEL_SHIFT 4

#define	_CMU_ADCCTRL_ADC1CLKDIV_DEFAULT 0x00000000UL

#define	_CMU_ADCCTRL_ADC1CLKDIV_MASK 0x30000UL

#define	_CMU_ADCCTRL_ADC1CLKDIV_NODIVISION 0x00000000UL

#define	_CMU_ADCCTRL_ADC1CLKDIV_SHIFT 16

#define	_CMU_ADCCTRL_ADC1CLKINV_DEFAULT 0x00000000UL

#define	_CMU_ADCCTRL_ADC1CLKINV_MASK 0x1000000UL

#define	_CMU_ADCCTRL_ADC1CLKINV_SHIFT 24

#define	_CMU_ADCCTRL_ADC1CLKSEL_AUXHFRCO 0x00000001UL

#define	_CMU_ADCCTRL_ADC1CLKSEL_DEFAULT 0x00000000UL

#define	_CMU_ADCCTRL_ADC1CLKSEL_DISABLED 0x00000000UL

#define	_CMU_ADCCTRL_ADC1CLKSEL_HFSRCCLK 0x00000003UL

#define	_CMU_ADCCTRL_ADC1CLKSEL_HFXO 0x00000002UL

#define	_CMU_ADCCTRL_ADC1CLKSEL_MASK 0x300000UL

#define	_CMU_ADCCTRL_ADC1CLKSEL_SHIFT 20

#define	_CMU_ADCCTRL_MASK 0x01330133UL

#define	_CMU_ADCCTRL_RESETVALUE 0x00000000UL

#define	_CMU_AUXHFRCOCTRL_CLKDIV_DEFAULT 0x00000000UL

#define	_CMU_AUXHFRCOCTRL_CLKDIV_DIV1 0x00000000UL

#define	_CMU_AUXHFRCOCTRL_CLKDIV_DIV2 0x00000001UL

#define	_CMU_AUXHFRCOCTRL_CLKDIV_DIV4 0x00000002UL

#define	_CMU_AUXHFRCOCTRL_CLKDIV_MASK 0x6000000UL

#define	_CMU_AUXHFRCOCTRL_CLKDIV_SHIFT 25

#define	_CMU_AUXHFRCOCTRL_CMPBIAS_DEFAULT 0x00000002UL

#define	_CMU_AUXHFRCOCTRL_CMPBIAS_MASK 0xE00000UL

#define	_CMU_AUXHFRCOCTRL_CMPBIAS_SHIFT 21

#define	_CMU_AUXHFRCOCTRL_FINETUNING_DEFAULT 0x0000001FUL

#define	_CMU_AUXHFRCOCTRL_FINETUNING_MASK 0x3F00UL

#define	_CMU_AUXHFRCOCTRL_FINETUNING_SHIFT 8

#define	_CMU_AUXHFRCOCTRL_FINETUNINGEN_DEFAULT 0x00000000UL

#define	_CMU_AUXHFRCOCTRL_FINETUNINGEN_MASK 0x8000000UL

#define	_CMU_AUXHFRCOCTRL_FINETUNINGEN_SHIFT 27

#define	_CMU_AUXHFRCOCTRL_FREQRANGE_DEFAULT 0x00000008UL

#define	_CMU_AUXHFRCOCTRL_FREQRANGE_MASK 0x1F0000UL

#define	_CMU_AUXHFRCOCTRL_FREQRANGE_SHIFT 16

#define	_CMU_AUXHFRCOCTRL_LDOHP_DEFAULT 0x00000001UL

#define	_CMU_AUXHFRCOCTRL_LDOHP_MASK 0x1000000UL

#define	_CMU_AUXHFRCOCTRL_LDOHP_SHIFT 24

#define	_CMU_AUXHFRCOCTRL_MASK 0xFFFF3F7FUL

#define	_CMU_AUXHFRCOCTRL_RESETVALUE 0xB1481F7FUL

#define	_CMU_AUXHFRCOCTRL_TUNING_DEFAULT 0x0000007FUL

#define	_CMU_AUXHFRCOCTRL_TUNING_MASK 0x7FUL

#define	_CMU_AUXHFRCOCTRL_TUNING_SHIFT 0

#define	_CMU_AUXHFRCOCTRL_VREFTC_DEFAULT 0x0000000BUL

#define	_CMU_AUXHFRCOCTRL_VREFTC_MASK 0xF0000000UL

#define	_CMU_AUXHFRCOCTRL_VREFTC_SHIFT 28

#define	_CMU_CALCNT_CALCNT_DEFAULT 0x00000000UL

#define	_CMU_CALCNT_CALCNT_MASK 0xFFFFFUL

#define	_CMU_CALCNT_CALCNT_SHIFT 0

#define	_CMU_CALCNT_MASK 0x000FFFFFUL

#define	_CMU_CALCNT_RESETVALUE 0x00000000UL

#define	_CMU_CALCTRL_CONT_DEFAULT 0x00000000UL

#define	_CMU_CALCTRL_CONT_MASK 0x100UL

#define	_CMU_CALCTRL_CONT_SHIFT 8

#define	_CMU_CALCTRL_DOWNSEL_AUXHFRCO 0x00000005UL

#define	_CMU_CALCTRL_DOWNSEL_DEFAULT 0x00000000UL

#define	_CMU_CALCTRL_DOWNSEL_HFCLK 0x00000000UL

#define	_CMU_CALCTRL_DOWNSEL_HFRCO 0x00000003UL

#define	_CMU_CALCTRL_DOWNSEL_HFXO 0x00000001UL

#define	_CMU_CALCTRL_DOWNSEL_LFRCO 0x00000004UL

#define	_CMU_CALCTRL_DOWNSEL_LFXO 0x00000002UL

#define	_CMU_CALCTRL_DOWNSEL_MASK 0xF0UL

#define	_CMU_CALCTRL_DOWNSEL_PRS 0x00000006UL

#define	_CMU_CALCTRL_DOWNSEL_SHIFT 4

#define	_CMU_CALCTRL_DOWNSEL_USHFRCO 0x00000008UL

#define	_CMU_CALCTRL_MASK 0x1F1F01F7UL

#define	_CMU_CALCTRL_PRSDOWNSEL_DEFAULT 0x00000000UL

#define	_CMU_CALCTRL_PRSDOWNSEL_MASK 0x1F000000UL

#define	_CMU_CALCTRL_PRSDOWNSEL_PRSCH0 0x00000000UL

#define	_CMU_CALCTRL_PRSDOWNSEL_PRSCH1 0x00000001UL

#define	_CMU_CALCTRL_PRSDOWNSEL_PRSCH10 0x0000000AUL

#define	_CMU_CALCTRL_PRSDOWNSEL_PRSCH11 0x0000000BUL

#define	_CMU_CALCTRL_PRSDOWNSEL_PRSCH12 0x0000000CUL

#define	_CMU_CALCTRL_PRSDOWNSEL_PRSCH13 0x0000000DUL

#define	_CMU_CALCTRL_PRSDOWNSEL_PRSCH14 0x0000000EUL

#define	_CMU_CALCTRL_PRSDOWNSEL_PRSCH15 0x0000000FUL

#define	_CMU_CALCTRL_PRSDOWNSEL_PRSCH16 0x00000010UL

#define	_CMU_CALCTRL_PRSDOWNSEL_PRSCH17 0x00000011UL

#define	_CMU_CALCTRL_PRSDOWNSEL_PRSCH18 0x00000012UL

#define	_CMU_CALCTRL_PRSDOWNSEL_PRSCH19 0x00000013UL

#define	_CMU_CALCTRL_PRSDOWNSEL_PRSCH2 0x00000002UL

#define	_CMU_CALCTRL_PRSDOWNSEL_PRSCH20 0x00000014UL

#define	_CMU_CALCTRL_PRSDOWNSEL_PRSCH21 0x00000015UL

#define	_CMU_CALCTRL_PRSDOWNSEL_PRSCH22 0x00000016UL

#define	_CMU_CALCTRL_PRSDOWNSEL_PRSCH23 0x00000017UL

#define	_CMU_CALCTRL_PRSDOWNSEL_PRSCH3 0x00000003UL

#define	_CMU_CALCTRL_PRSDOWNSEL_PRSCH4 0x00000004UL

#define	_CMU_CALCTRL_PRSDOWNSEL_PRSCH5 0x00000005UL

#define	_CMU_CALCTRL_PRSDOWNSEL_PRSCH6 0x00000006UL

#define	_CMU_CALCTRL_PRSDOWNSEL_PRSCH7 0x00000007UL

#define	_CMU_CALCTRL_PRSDOWNSEL_PRSCH8 0x00000008UL

#define	_CMU_CALCTRL_PRSDOWNSEL_PRSCH9 0x00000009UL

#define	_CMU_CALCTRL_PRSDOWNSEL_SHIFT 24

#define	_CMU_CALCTRL_PRSUPSEL_DEFAULT 0x00000000UL

#define	_CMU_CALCTRL_PRSUPSEL_MASK 0x1F0000UL

#define	_CMU_CALCTRL_PRSUPSEL_PRSCH0 0x00000000UL

#define	_CMU_CALCTRL_PRSUPSEL_PRSCH1 0x00000001UL

#define	_CMU_CALCTRL_PRSUPSEL_PRSCH10 0x0000000AUL

#define	_CMU_CALCTRL_PRSUPSEL_PRSCH11 0x0000000BUL

#define	_CMU_CALCTRL_PRSUPSEL_PRSCH12 0x0000000CUL

#define	_CMU_CALCTRL_PRSUPSEL_PRSCH13 0x0000000DUL

#define	_CMU_CALCTRL_PRSUPSEL_PRSCH14 0x0000000EUL

#define	_CMU_CALCTRL_PRSUPSEL_PRSCH15 0x0000000FUL

#define	_CMU_CALCTRL_PRSUPSEL_PRSCH16 0x00000010UL

#define	_CMU_CALCTRL_PRSUPSEL_PRSCH17 0x00000011UL

#define	_CMU_CALCTRL_PRSUPSEL_PRSCH18 0x00000012UL

#define	_CMU_CALCTRL_PRSUPSEL_PRSCH19 0x00000013UL

#define	_CMU_CALCTRL_PRSUPSEL_PRSCH2 0x00000002UL

#define	_CMU_CALCTRL_PRSUPSEL_PRSCH20 0x00000014UL

#define	_CMU_CALCTRL_PRSUPSEL_PRSCH21 0x00000015UL

#define	_CMU_CALCTRL_PRSUPSEL_PRSCH22 0x00000016UL

#define	_CMU_CALCTRL_PRSUPSEL_PRSCH23 0x00000017UL

#define	_CMU_CALCTRL_PRSUPSEL_PRSCH3 0x00000003UL

#define	_CMU_CALCTRL_PRSUPSEL_PRSCH4 0x00000004UL

#define	_CMU_CALCTRL_PRSUPSEL_PRSCH5 0x00000005UL

#define	_CMU_CALCTRL_PRSUPSEL_PRSCH6 0x00000006UL

#define	_CMU_CALCTRL_PRSUPSEL_PRSCH7 0x00000007UL

#define	_CMU_CALCTRL_PRSUPSEL_PRSCH8 0x00000008UL

#define	_CMU_CALCTRL_PRSUPSEL_PRSCH9 0x00000009UL

#define	_CMU_CALCTRL_PRSUPSEL_SHIFT 16

#define	_CMU_CALCTRL_RESETVALUE 0x00000000UL

#define	_CMU_CALCTRL_UPSEL_AUXHFRCO 0x00000004UL

#define	_CMU_CALCTRL_UPSEL_DEFAULT 0x00000000UL

#define	_CMU_CALCTRL_UPSEL_HFRCO 0x00000002UL

#define	_CMU_CALCTRL_UPSEL_HFXO 0x00000000UL

#define	_CMU_CALCTRL_UPSEL_LFRCO 0x00000003UL

#define	_CMU_CALCTRL_UPSEL_LFXO 0x00000001UL

#define	_CMU_CALCTRL_UPSEL_MASK 0x7UL

#define	_CMU_CALCTRL_UPSEL_PRS 0x00000005UL

#define	_CMU_CALCTRL_UPSEL_SHIFT 0

#define	_CMU_CALCTRL_UPSEL_USHFRCO 0x00000007UL

#define	_CMU_CMD_CALSTART_DEFAULT 0x00000000UL

#define	_CMU_CMD_CALSTART_MASK 0x1UL

#define	_CMU_CMD_CALSTART_SHIFT 0

#define	_CMU_CMD_CALSTOP_DEFAULT 0x00000000UL

#define	_CMU_CMD_CALSTOP_MASK 0x2UL

#define	_CMU_CMD_CALSTOP_SHIFT 1

#define	_CMU_CMD_HFXOPEAKDETSTART_DEFAULT 0x00000000UL

#define	_CMU_CMD_HFXOPEAKDETSTART_MASK 0x10UL

#define	_CMU_CMD_HFXOPEAKDETSTART_SHIFT 4

#define	_CMU_CMD_MASK 0x00000013UL

#define	_CMU_CMD_RESETVALUE 0x00000000UL

#define	_CMU_CTRL_CLKOUTSEL0_AUXHFRCOQ 0x0000000DUL

#define	_CMU_CTRL_CLKOUTSEL0_DEFAULT 0x00000000UL

#define	_CMU_CTRL_CLKOUTSEL0_DISABLED 0x00000000UL

#define	_CMU_CTRL_CLKOUTSEL0_HFEXPCLK 0x00000007UL

#define	_CMU_CTRL_CLKOUTSEL0_HFRCOQ 0x0000000CUL

#define	_CMU_CTRL_CLKOUTSEL0_HFSRCCLK 0x0000000FUL

#define	_CMU_CTRL_CLKOUTSEL0_HFXO 0x00000006UL

#define	_CMU_CTRL_CLKOUTSEL0_HFXOQ 0x0000000EUL

#define	_CMU_CTRL_CLKOUTSEL0_LFRCO 0x00000002UL

#define	_CMU_CTRL_CLKOUTSEL0_LFRCOQ 0x0000000AUL

#define	_CMU_CTRL_CLKOUTSEL0_LFXO 0x00000003UL

#define	_CMU_CTRL_CLKOUTSEL0_LFXOQ 0x0000000BUL

#define	_CMU_CTRL_CLKOUTSEL0_MASK 0x1FUL

#define	_CMU_CTRL_CLKOUTSEL0_SHIFT 0

#define	_CMU_CTRL_CLKOUTSEL0_ULFRCO 0x00000001UL

#define	_CMU_CTRL_CLKOUTSEL0_ULFRCOQ 0x00000009UL

#define	_CMU_CTRL_CLKOUTSEL0_USHFRCOQ 0x00000012UL

#define	_CMU_CTRL_CLKOUTSEL1_AUXHFRCOQ 0x0000000DUL

#define	_CMU_CTRL_CLKOUTSEL1_DEFAULT 0x00000000UL

#define	_CMU_CTRL_CLKOUTSEL1_DISABLED 0x00000000UL

#define	_CMU_CTRL_CLKOUTSEL1_HFEXPCLK 0x00000007UL

#define	_CMU_CTRL_CLKOUTSEL1_HFRCOQ 0x0000000CUL

#define	_CMU_CTRL_CLKOUTSEL1_HFSRCCLK 0x0000000FUL

#define	_CMU_CTRL_CLKOUTSEL1_HFXO 0x00000006UL

#define	_CMU_CTRL_CLKOUTSEL1_HFXOQ 0x0000000EUL

#define	_CMU_CTRL_CLKOUTSEL1_LFRCO 0x00000002UL

#define	_CMU_CTRL_CLKOUTSEL1_LFRCOQ 0x0000000AUL

#define	_CMU_CTRL_CLKOUTSEL1_LFXO 0x00000003UL

#define	_CMU_CTRL_CLKOUTSEL1_LFXOQ 0x0000000BUL

#define	_CMU_CTRL_CLKOUTSEL1_MASK 0x3E0UL

#define	_CMU_CTRL_CLKOUTSEL1_SHIFT 5

#define	_CMU_CTRL_CLKOUTSEL1_ULFRCO 0x00000001UL

#define	_CMU_CTRL_CLKOUTSEL1_ULFRCOQ 0x00000009UL

#define	_CMU_CTRL_CLKOUTSEL1_USHFRCOQ 0x00000012UL

#define	_CMU_CTRL_CLKOUTSEL2_AUXHFRCOQ 0x0000000DUL

#define	_CMU_CTRL_CLKOUTSEL2_DEFAULT 0x00000000UL

#define	_CMU_CTRL_CLKOUTSEL2_DISABLED 0x00000000UL

#define	_CMU_CTRL_CLKOUTSEL2_HFEXPCLK 0x00000007UL

#define	_CMU_CTRL_CLKOUTSEL2_HFRCOQ 0x0000000CUL

#define	_CMU_CTRL_CLKOUTSEL2_HFSRCCLK 0x0000000FUL

#define	_CMU_CTRL_CLKOUTSEL2_HFXO 0x00000006UL

#define	_CMU_CTRL_CLKOUTSEL2_HFXODIV2Q 0x00000005UL

#define	_CMU_CTRL_CLKOUTSEL2_HFXOQ 0x0000000EUL

#define	_CMU_CTRL_CLKOUTSEL2_HFXOX2Q 0x00000008UL

#define	_CMU_CTRL_CLKOUTSEL2_LFRCO 0x00000002UL

#define	_CMU_CTRL_CLKOUTSEL2_LFRCOQ 0x0000000AUL

#define	_CMU_CTRL_CLKOUTSEL2_LFXO 0x00000003UL

#define	_CMU_CTRL_CLKOUTSEL2_LFXOQ 0x0000000BUL

#define	_CMU_CTRL_CLKOUTSEL2_MASK 0x7C00UL

#define	_CMU_CTRL_CLKOUTSEL2_SHIFT 10

#define	_CMU_CTRL_CLKOUTSEL2_ULFRCO 0x00000001UL

#define	_CMU_CTRL_CLKOUTSEL2_ULFRCOQ 0x00000009UL

#define	_CMU_CTRL_CLKOUTSEL2_USHFRCOQ 0x00000012UL

#define	_CMU_CTRL_HFPERCLKEN_DEFAULT 0x00000001UL

#define	_CMU_CTRL_HFPERCLKEN_MASK 0x100000UL

#define	_CMU_CTRL_HFPERCLKEN_SHIFT 20

#define	_CMU_CTRL_MASK 0x00117FFFUL

#define	_CMU_CTRL_RESETVALUE 0x00100000UL

#define	_CMU_CTRL_WSHFLE_DEFAULT 0x00000000UL

#define	_CMU_CTRL_WSHFLE_MASK 0x10000UL

#define	_CMU_CTRL_WSHFLE_SHIFT 16

#define	_CMU_DBGCLKSEL_DBG_AUXHFRCO 0x00000000UL

#define	_CMU_DBGCLKSEL_DBG_DEFAULT 0x00000000UL

#define	_CMU_DBGCLKSEL_DBG_HFCLK 0x00000001UL

#define	_CMU_DBGCLKSEL_DBG_HFRCODIV2 0x00000002UL

#define	_CMU_DBGCLKSEL_DBG_MASK 0x3UL

#define	_CMU_DBGCLKSEL_DBG_SHIFT 0

#define	_CMU_DBGCLKSEL_MASK 0x00000003UL

#define	_CMU_DBGCLKSEL_RESETVALUE 0x00000000UL

#define	_CMU_DPLLCTRL1_M_DEFAULT 0x00000000UL

#define	_CMU_DPLLCTRL1_M_MASK 0xFFFUL

#define	_CMU_DPLLCTRL1_M_SHIFT 0

#define	_CMU_DPLLCTRL1_MASK 0x0FFF0FFFUL

#define	_CMU_DPLLCTRL1_N_DEFAULT 0x00000000UL

#define	_CMU_DPLLCTRL1_N_MASK 0xFFF0000UL

#define	_CMU_DPLLCTRL1_N_SHIFT 16

#define	_CMU_DPLLCTRL1_RESETVALUE 0x00000000UL

#define	_CMU_DPLLCTRL_AUTORECOVER_DEFAULT 0x00000000UL

#define	_CMU_DPLLCTRL_AUTORECOVER_MASK 0x4UL

#define	_CMU_DPLLCTRL_AUTORECOVER_SHIFT 2

#define	_CMU_DPLLCTRL_DITHEN_DEFAULT 0x00000000UL

#define	_CMU_DPLLCTRL_DITHEN_MASK 0x40UL

#define	_CMU_DPLLCTRL_DITHEN_SHIFT 6

#define	_CMU_DPLLCTRL_EDGESEL_DEFAULT 0x00000000UL

#define	_CMU_DPLLCTRL_EDGESEL_FALL 0x00000000UL

#define	_CMU_DPLLCTRL_EDGESEL_MASK 0x2UL

#define	_CMU_DPLLCTRL_EDGESEL_RISE 0x00000001UL

#define	_CMU_DPLLCTRL_EDGESEL_SHIFT 1

#define	_CMU_DPLLCTRL_MASK 0x0000005FUL

#define	_CMU_DPLLCTRL_MODE_DEFAULT 0x00000000UL

#define	_CMU_DPLLCTRL_MODE_FREQLL 0x00000000UL

#define	_CMU_DPLLCTRL_MODE_MASK 0x1UL

#define	_CMU_DPLLCTRL_MODE_PHASELL 0x00000001UL

#define	_CMU_DPLLCTRL_MODE_SHIFT 0

#define	_CMU_DPLLCTRL_REFSEL_CLKIN0 0x00000003UL

#define	_CMU_DPLLCTRL_REFSEL_DEFAULT 0x00000000UL

#define	_CMU_DPLLCTRL_REFSEL_HFXO 0x00000000UL

#define	_CMU_DPLLCTRL_REFSEL_LFXO 0x00000001UL

#define	_CMU_DPLLCTRL_REFSEL_MASK 0x18UL

#define	_CMU_DPLLCTRL_REFSEL_SHIFT 3

#define	_CMU_DPLLCTRL_REFSEL_USHFRCO 0x00000002UL

#define	_CMU_DPLLCTRL_RESETVALUE 0x00000000UL

#define	_CMU_FREEZE_MASK 0x00000001UL

#define	_CMU_FREEZE_REGFREEZE_DEFAULT 0x00000000UL

#define	_CMU_FREEZE_REGFREEZE_FREEZE 0x00000001UL

#define	_CMU_FREEZE_REGFREEZE_MASK 0x1UL

#define	_CMU_FREEZE_REGFREEZE_SHIFT 0

#define	_CMU_FREEZE_REGFREEZE_UPDATE 0x00000000UL

#define	_CMU_FREEZE_RESETVALUE 0x00000000UL

#define	_CMU_HFBUSCLKEN0_CRYPTO0_DEFAULT 0x00000000UL

#define	_CMU_HFBUSCLKEN0_CRYPTO0_MASK 0x2UL

#define	_CMU_HFBUSCLKEN0_CRYPTO0_SHIFT 1

#define	_CMU_HFBUSCLKEN0_EBI_DEFAULT 0x00000000UL

#define	_CMU_HFBUSCLKEN0_EBI_MASK 0x4UL

#define	_CMU_HFBUSCLKEN0_EBI_SHIFT 2

#define	_CMU_HFBUSCLKEN0_ETH_DEFAULT 0x00000000UL

#define	_CMU_HFBUSCLKEN0_ETH_MASK 0x8UL

#define	_CMU_HFBUSCLKEN0_ETH_SHIFT 3

#define	_CMU_HFBUSCLKEN0_GPCRC_DEFAULT 0x00000000UL

#define	_CMU_HFBUSCLKEN0_GPCRC_MASK 0x100UL

#define	_CMU_HFBUSCLKEN0_GPCRC_SHIFT 8

#define	_CMU_HFBUSCLKEN0_GPIO_DEFAULT 0x00000000UL

#define	_CMU_HFBUSCLKEN0_GPIO_MASK 0x20UL

#define	_CMU_HFBUSCLKEN0_GPIO_SHIFT 5

#define	_CMU_HFBUSCLKEN0_LDMA_DEFAULT 0x00000000UL

#define	_CMU_HFBUSCLKEN0_LDMA_MASK 0x80UL

#define	_CMU_HFBUSCLKEN0_LDMA_SHIFT 7

#define	_CMU_HFBUSCLKEN0_LE_DEFAULT 0x00000000UL

#define	_CMU_HFBUSCLKEN0_LE_MASK 0x1UL

#define	_CMU_HFBUSCLKEN0_LE_SHIFT 0

#define	_CMU_HFBUSCLKEN0_MASK 0x000007FFUL

#define	_CMU_HFBUSCLKEN0_PRS_DEFAULT 0x00000000UL

#define	_CMU_HFBUSCLKEN0_PRS_MASK 0x40UL

#define	_CMU_HFBUSCLKEN0_PRS_SHIFT 6

#define	_CMU_HFBUSCLKEN0_QSPI0_DEFAULT 0x00000000UL

#define	_CMU_HFBUSCLKEN0_QSPI0_MASK 0x200UL

#define	_CMU_HFBUSCLKEN0_QSPI0_SHIFT 9

#define	_CMU_HFBUSCLKEN0_RESETVALUE 0x00000000UL

#define	_CMU_HFBUSCLKEN0_SDIO_DEFAULT 0x00000000UL

#define	_CMU_HFBUSCLKEN0_SDIO_MASK 0x10UL

#define	_CMU_HFBUSCLKEN0_SDIO_SHIFT 4

#define	_CMU_HFBUSCLKEN0_USB_DEFAULT 0x00000000UL

#define	_CMU_HFBUSCLKEN0_USB_MASK 0x400UL

#define	_CMU_HFBUSCLKEN0_USB_SHIFT 10

#define	_CMU_HFBUSPRESC_MASK 0x0001FF00UL

#define	_CMU_HFBUSPRESC_PRESC_DEFAULT 0x00000000UL

#define	_CMU_HFBUSPRESC_PRESC_MASK 0x1FF00UL

#define	_CMU_HFBUSPRESC_PRESC_NODIVISION 0x00000000UL

#define	_CMU_HFBUSPRESC_PRESC_SHIFT 8

#define	_CMU_HFBUSPRESC_RESETVALUE 0x00000000UL

#define	_CMU_HFCLKSEL_HF_CLKIN0 0x00000007UL

#define	_CMU_HFCLKSEL_HF_DEFAULT 0x00000000UL

#define	_CMU_HFCLKSEL_HF_HFRCO 0x00000001UL

#define	_CMU_HFCLKSEL_HF_HFRCODIV2 0x00000005UL

#define	_CMU_HFCLKSEL_HF_HFXO 0x00000002UL

#define	_CMU_HFCLKSEL_HF_LFRCO 0x00000003UL

#define	_CMU_HFCLKSEL_HF_LFXO 0x00000004UL

#define	_CMU_HFCLKSEL_HF_MASK 0x7UL

#define	_CMU_HFCLKSEL_HF_SHIFT 0

#define	_CMU_HFCLKSEL_HF_USHFRCO 0x00000006UL

#define	_CMU_HFCLKSEL_MASK 0x00000007UL

#define	_CMU_HFCLKSEL_RESETVALUE 0x00000000UL

#define	_CMU_HFCLKSTATUS_MASK 0x00000007UL

#define	_CMU_HFCLKSTATUS_RESETVALUE 0x00000001UL

#define	_CMU_HFCLKSTATUS_SELECTED_CLKIN0 0x00000007UL

#define	_CMU_HFCLKSTATUS_SELECTED_DEFAULT 0x00000001UL

#define	_CMU_HFCLKSTATUS_SELECTED_HFRCO 0x00000001UL

#define	_CMU_HFCLKSTATUS_SELECTED_HFRCODIV2 0x00000005UL

#define	_CMU_HFCLKSTATUS_SELECTED_HFXO 0x00000002UL

#define	_CMU_HFCLKSTATUS_SELECTED_LFRCO 0x00000003UL

#define	_CMU_HFCLKSTATUS_SELECTED_LFXO 0x00000004UL

#define	_CMU_HFCLKSTATUS_SELECTED_MASK 0x7UL

#define	_CMU_HFCLKSTATUS_SELECTED_SHIFT 0

#define	_CMU_HFCLKSTATUS_SELECTED_USHFRCO 0x00000006UL

#define	_CMU_HFCOREPRESC_MASK 0x0001FF00UL

#define	_CMU_HFCOREPRESC_PRESC_DEFAULT 0x00000000UL

#define	_CMU_HFCOREPRESC_PRESC_MASK 0x1FF00UL

#define	_CMU_HFCOREPRESC_PRESC_NODIVISION 0x00000000UL

#define	_CMU_HFCOREPRESC_PRESC_SHIFT 8

#define	_CMU_HFCOREPRESC_RESETVALUE 0x00000000UL

#define	_CMU_HFEXPPRESC_MASK 0x00001F00UL

#define	_CMU_HFEXPPRESC_PRESC_DEFAULT 0x00000000UL

#define	_CMU_HFEXPPRESC_PRESC_MASK 0x1F00UL

#define	_CMU_HFEXPPRESC_PRESC_NODIVISION 0x00000000UL

#define	_CMU_HFEXPPRESC_PRESC_SHIFT 8

#define	_CMU_HFEXPPRESC_RESETVALUE 0x00000000UL

#define	_CMU_HFPERCLKEN0_ACMP0_DEFAULT 0x00000000UL

#define	_CMU_HFPERCLKEN0_ACMP0_MASK 0x2000UL

#define	_CMU_HFPERCLKEN0_ACMP0_SHIFT 13

#define	_CMU_HFPERCLKEN0_ACMP1_DEFAULT 0x00000000UL

#define	_CMU_HFPERCLKEN0_ACMP1_MASK 0x4000UL

#define	_CMU_HFPERCLKEN0_ACMP1_SHIFT 14

#define	_CMU_HFPERCLKEN0_ACMP2_DEFAULT 0x00000000UL

#define	_CMU_HFPERCLKEN0_ACMP2_MASK 0x8000UL

#define	_CMU_HFPERCLKEN0_ACMP2_SHIFT 15

#define	_CMU_HFPERCLKEN0_ACMP3_DEFAULT 0x00000000UL

#define	_CMU_HFPERCLKEN0_ACMP3_MASK 0x10000UL

#define	_CMU_HFPERCLKEN0_ACMP3_SHIFT 16

#define	_CMU_HFPERCLKEN0_ADC0_DEFAULT 0x00000000UL

#define	_CMU_HFPERCLKEN0_ADC0_MASK 0x100000UL

#define	_CMU_HFPERCLKEN0_ADC0_SHIFT 20

#define	_CMU_HFPERCLKEN0_ADC1_DEFAULT 0x00000000UL

#define	_CMU_HFPERCLKEN0_ADC1_MASK 0x200000UL

#define	_CMU_HFPERCLKEN0_ADC1_SHIFT 21

#define	_CMU_HFPERCLKEN0_CRYOTIMER_DEFAULT 0x00000000UL

#define	_CMU_HFPERCLKEN0_CRYOTIMER_MASK 0x400000UL

#define	_CMU_HFPERCLKEN0_CRYOTIMER_SHIFT 22

#define	_CMU_HFPERCLKEN0_I2C0_DEFAULT 0x00000000UL

#define	_CMU_HFPERCLKEN0_I2C0_MASK 0x20000UL

#define	_CMU_HFPERCLKEN0_I2C0_SHIFT 17

#define	_CMU_HFPERCLKEN0_I2C1_DEFAULT 0x00000000UL

#define	_CMU_HFPERCLKEN0_I2C1_MASK 0x40000UL

#define	_CMU_HFPERCLKEN0_I2C1_SHIFT 18

#define	_CMU_HFPERCLKEN0_I2C2_DEFAULT 0x00000000UL

#define	_CMU_HFPERCLKEN0_I2C2_MASK 0x80000UL

#define	_CMU_HFPERCLKEN0_I2C2_SHIFT 19

#define	_CMU_HFPERCLKEN0_IDAC0_DEFAULT 0x00000000UL

#define	_CMU_HFPERCLKEN0_IDAC0_MASK 0x800000UL

#define	_CMU_HFPERCLKEN0_IDAC0_SHIFT 23

#define	_CMU_HFPERCLKEN0_MASK 0x01FFFFFFUL

#define	_CMU_HFPERCLKEN0_RESETVALUE 0x00000000UL

#define	_CMU_HFPERCLKEN0_TIMER0_DEFAULT 0x00000000UL

#define	_CMU_HFPERCLKEN0_TIMER0_MASK 0x1UL

#define	_CMU_HFPERCLKEN0_TIMER0_SHIFT 0

#define	_CMU_HFPERCLKEN0_TIMER1_DEFAULT 0x00000000UL

#define	_CMU_HFPERCLKEN0_TIMER1_MASK 0x2UL

#define	_CMU_HFPERCLKEN0_TIMER1_SHIFT 1

#define	_CMU_HFPERCLKEN0_TIMER2_DEFAULT 0x00000000UL

#define	_CMU_HFPERCLKEN0_TIMER2_MASK 0x4UL

#define	_CMU_HFPERCLKEN0_TIMER2_SHIFT 2

#define	_CMU_HFPERCLKEN0_TIMER3_DEFAULT 0x00000000UL

#define	_CMU_HFPERCLKEN0_TIMER3_MASK 0x8UL

#define	_CMU_HFPERCLKEN0_TIMER3_SHIFT 3

#define	_CMU_HFPERCLKEN0_TIMER4_DEFAULT 0x00000000UL

#define	_CMU_HFPERCLKEN0_TIMER4_MASK 0x10UL

#define	_CMU_HFPERCLKEN0_TIMER4_SHIFT 4

#define	_CMU_HFPERCLKEN0_TIMER5_DEFAULT 0x00000000UL

#define	_CMU_HFPERCLKEN0_TIMER5_MASK 0x20UL

#define	_CMU_HFPERCLKEN0_TIMER5_SHIFT 5

#define	_CMU_HFPERCLKEN0_TIMER6_DEFAULT 0x00000000UL

#define	_CMU_HFPERCLKEN0_TIMER6_MASK 0x40UL

#define	_CMU_HFPERCLKEN0_TIMER6_SHIFT 6

#define	_CMU_HFPERCLKEN0_TRNG0_DEFAULT 0x00000000UL

#define	_CMU_HFPERCLKEN0_TRNG0_MASK 0x1000000UL

#define	_CMU_HFPERCLKEN0_TRNG0_SHIFT 24

#define	_CMU_HFPERCLKEN0_USART0_DEFAULT 0x00000000UL

#define	_CMU_HFPERCLKEN0_USART0_MASK 0x80UL

#define	_CMU_HFPERCLKEN0_USART0_SHIFT 7

#define	_CMU_HFPERCLKEN0_USART1_DEFAULT 0x00000000UL

#define	_CMU_HFPERCLKEN0_USART1_MASK 0x100UL

#define	_CMU_HFPERCLKEN0_USART1_SHIFT 8

#define	_CMU_HFPERCLKEN0_USART2_DEFAULT 0x00000000UL

#define	_CMU_HFPERCLKEN0_USART2_MASK 0x200UL

#define	_CMU_HFPERCLKEN0_USART2_SHIFT 9

#define	_CMU_HFPERCLKEN0_USART3_DEFAULT 0x00000000UL

#define	_CMU_HFPERCLKEN0_USART3_MASK 0x400UL

#define	_CMU_HFPERCLKEN0_USART3_SHIFT 10

#define	_CMU_HFPERCLKEN0_USART4_DEFAULT 0x00000000UL

#define	_CMU_HFPERCLKEN0_USART4_MASK 0x800UL

#define	_CMU_HFPERCLKEN0_USART4_SHIFT 11

#define	_CMU_HFPERCLKEN0_USART5_DEFAULT 0x00000000UL

#define	_CMU_HFPERCLKEN0_USART5_MASK 0x1000UL

#define	_CMU_HFPERCLKEN0_USART5_SHIFT 12

#define	_CMU_HFPERCLKEN1_CAN0_DEFAULT 0x00000000UL

#define	_CMU_HFPERCLKEN1_CAN0_MASK 0x40UL

#define	_CMU_HFPERCLKEN1_CAN0_SHIFT 6

#define	_CMU_HFPERCLKEN1_CAN1_DEFAULT 0x00000000UL

#define	_CMU_HFPERCLKEN1_CAN1_MASK 0x80UL

#define	_CMU_HFPERCLKEN1_CAN1_SHIFT 7

#define	_CMU_HFPERCLKEN1_CSEN_DEFAULT 0x00000000UL

#define	_CMU_HFPERCLKEN1_CSEN_MASK 0x200UL

#define	_CMU_HFPERCLKEN1_CSEN_SHIFT 9

#define	_CMU_HFPERCLKEN1_MASK 0x000003FFUL

#define	_CMU_HFPERCLKEN1_RESETVALUE 0x00000000UL

#define	_CMU_HFPERCLKEN1_UART0_DEFAULT 0x00000000UL

#define	_CMU_HFPERCLKEN1_UART0_MASK 0x10UL

#define	_CMU_HFPERCLKEN1_UART0_SHIFT 4

#define	_CMU_HFPERCLKEN1_UART1_DEFAULT 0x00000000UL

#define	_CMU_HFPERCLKEN1_UART1_MASK 0x20UL

#define	_CMU_HFPERCLKEN1_UART1_SHIFT 5

#define	_CMU_HFPERCLKEN1_VDAC0_DEFAULT 0x00000000UL

#define	_CMU_HFPERCLKEN1_VDAC0_MASK 0x100UL

#define	_CMU_HFPERCLKEN1_VDAC0_SHIFT 8

#define	_CMU_HFPERCLKEN1_WTIMER0_DEFAULT 0x00000000UL

#define	_CMU_HFPERCLKEN1_WTIMER0_MASK 0x1UL

#define	_CMU_HFPERCLKEN1_WTIMER0_SHIFT 0

#define	_CMU_HFPERCLKEN1_WTIMER1_DEFAULT 0x00000000UL

#define	_CMU_HFPERCLKEN1_WTIMER1_MASK 0x2UL

#define	_CMU_HFPERCLKEN1_WTIMER1_SHIFT 1

#define	_CMU_HFPERCLKEN1_WTIMER2_DEFAULT 0x00000000UL

#define	_CMU_HFPERCLKEN1_WTIMER2_MASK 0x4UL

#define	_CMU_HFPERCLKEN1_WTIMER2_SHIFT 2

#define	_CMU_HFPERCLKEN1_WTIMER3_DEFAULT 0x00000000UL

#define	_CMU_HFPERCLKEN1_WTIMER3_MASK 0x8UL

#define	_CMU_HFPERCLKEN1_WTIMER3_SHIFT 3

#define	_CMU_HFPERPRESC_MASK 0x0001FF00UL

#define	_CMU_HFPERPRESC_PRESC_DEFAULT 0x00000000UL

#define	_CMU_HFPERPRESC_PRESC_MASK 0x1FF00UL

#define	_CMU_HFPERPRESC_PRESC_NODIVISION 0x00000000UL

#define	_CMU_HFPERPRESC_PRESC_SHIFT 8

#define	_CMU_HFPERPRESC_RESETVALUE 0x00000000UL

#define	_CMU_HFPERPRESCB_MASK 0x0001FF00UL

#define	_CMU_HFPERPRESCB_PRESC_DEFAULT 0x00000000UL

#define	_CMU_HFPERPRESCB_PRESC_MASK 0x1FF00UL

#define	_CMU_HFPERPRESCB_PRESC_NODIVISION 0x00000000UL

#define	_CMU_HFPERPRESCB_PRESC_SHIFT 8

#define	_CMU_HFPERPRESCB_RESETVALUE 0x00000000UL

#define	_CMU_HFPERPRESCC_MASK 0x0001FF00UL

#define	_CMU_HFPERPRESCC_PRESC_DEFAULT 0x00000000UL

#define	_CMU_HFPERPRESCC_PRESC_MASK 0x1FF00UL

#define	_CMU_HFPERPRESCC_PRESC_NODIVISION 0x00000000UL

#define	_CMU_HFPERPRESCC_PRESC_SHIFT 8

#define	_CMU_HFPERPRESCC_RESETVALUE 0x00000000UL

#define	_CMU_HFPRESC_HFCLKLEPRESC_DEFAULT 0x00000000UL

#define	_CMU_HFPRESC_HFCLKLEPRESC_DIV2 0x00000000UL

#define	_CMU_HFPRESC_HFCLKLEPRESC_DIV4 0x00000001UL

#define	_CMU_HFPRESC_HFCLKLEPRESC_DIV8 0x00000002UL

#define	_CMU_HFPRESC_HFCLKLEPRESC_MASK 0x3000000UL

#define	_CMU_HFPRESC_HFCLKLEPRESC_SHIFT 24

#define	_CMU_HFPRESC_MASK 0x03001F00UL

#define	_CMU_HFPRESC_PRESC_DEFAULT 0x00000000UL

#define	_CMU_HFPRESC_PRESC_MASK 0x1F00UL

#define	_CMU_HFPRESC_PRESC_NODIVISION 0x00000000UL

#define	_CMU_HFPRESC_PRESC_SHIFT 8

#define	_CMU_HFPRESC_RESETVALUE 0x00000000UL

#define	_CMU_HFRCOCTRL_CLKDIV_DEFAULT 0x00000000UL

#define	_CMU_HFRCOCTRL_CLKDIV_DIV1 0x00000000UL

#define	_CMU_HFRCOCTRL_CLKDIV_DIV2 0x00000001UL

#define	_CMU_HFRCOCTRL_CLKDIV_DIV4 0x00000002UL

#define	_CMU_HFRCOCTRL_CLKDIV_MASK 0x6000000UL

#define	_CMU_HFRCOCTRL_CLKDIV_SHIFT 25

#define	_CMU_HFRCOCTRL_CMPBIAS_DEFAULT 0x00000002UL

#define	_CMU_HFRCOCTRL_CMPBIAS_MASK 0xE00000UL

#define	_CMU_HFRCOCTRL_CMPBIAS_SHIFT 21

#define	_CMU_HFRCOCTRL_FINETUNING_DEFAULT 0x0000001FUL

#define	_CMU_HFRCOCTRL_FINETUNING_MASK 0x3F00UL

#define	_CMU_HFRCOCTRL_FINETUNING_SHIFT 8

#define	_CMU_HFRCOCTRL_FINETUNINGEN_DEFAULT 0x00000000UL

#define	_CMU_HFRCOCTRL_FINETUNINGEN_MASK 0x8000000UL

#define	_CMU_HFRCOCTRL_FINETUNINGEN_SHIFT 27

#define	_CMU_HFRCOCTRL_FREQRANGE_DEFAULT 0x00000008UL

#define	_CMU_HFRCOCTRL_FREQRANGE_MASK 0x1F0000UL

#define	_CMU_HFRCOCTRL_FREQRANGE_SHIFT 16

#define	_CMU_HFRCOCTRL_LDOHP_DEFAULT 0x00000001UL

#define	_CMU_HFRCOCTRL_LDOHP_MASK 0x1000000UL

#define	_CMU_HFRCOCTRL_LDOHP_SHIFT 24

#define	_CMU_HFRCOCTRL_MASK 0xFFFF3F7FUL

#define	_CMU_HFRCOCTRL_RESETVALUE 0xB1481F7FUL

#define	_CMU_HFRCOCTRL_TUNING_DEFAULT 0x0000007FUL

#define	_CMU_HFRCOCTRL_TUNING_MASK 0x7FUL

#define	_CMU_HFRCOCTRL_TUNING_SHIFT 0

#define	_CMU_HFRCOCTRL_VREFTC_DEFAULT 0x0000000BUL

#define	_CMU_HFRCOCTRL_VREFTC_MASK 0xF0000000UL

#define	_CMU_HFRCOCTRL_VREFTC_SHIFT 28

#define	_CMU_HFRCOSS_MASK 0x00001F07UL

#define	_CMU_HFRCOSS_RESETVALUE 0x00000000UL

#define	_CMU_HFRCOSS_SSAMP_DEFAULT 0x00000000UL

#define	_CMU_HFRCOSS_SSAMP_MASK 0x7UL

#define	_CMU_HFRCOSS_SSAMP_SHIFT 0

#define	_CMU_HFRCOSS_SSINV_DEFAULT 0x00000000UL

#define	_CMU_HFRCOSS_SSINV_MASK 0x1F00UL

#define	_CMU_HFRCOSS_SSINV_SHIFT 8

#define	_CMU_HFXOCTRL_AUTOSTARTEM0EM1_DEFAULT 0x00000000UL

#define	_CMU_HFXOCTRL_AUTOSTARTEM0EM1_MASK 0x10000000UL

#define	_CMU_HFXOCTRL_AUTOSTARTEM0EM1_SHIFT 28

#define	_CMU_HFXOCTRL_AUTOSTARTSELEM0EM1_DEFAULT 0x00000000UL

#define	_CMU_HFXOCTRL_AUTOSTARTSELEM0EM1_MASK 0x20000000UL

#define	_CMU_HFXOCTRL_AUTOSTARTSELEM0EM1_SHIFT 29

#define	_CMU_HFXOCTRL_HFXOX2EN_DEFAULT 0x00000001UL

#define	_CMU_HFXOCTRL_HFXOX2EN_MASK 0x8UL

#define	_CMU_HFXOCTRL_HFXOX2EN_SHIFT 3

#define	_CMU_HFXOCTRL_LFTIMEOUT_0CYCLES 0x00000000UL

#define	_CMU_HFXOCTRL_LFTIMEOUT_16CYCLES 0x00000003UL

#define	_CMU_HFXOCTRL_LFTIMEOUT_1KCYCLES 0x00000006UL

#define	_CMU_HFXOCTRL_LFTIMEOUT_2CYCLES 0x00000001UL

#define	_CMU_HFXOCTRL_LFTIMEOUT_32CYCLES 0x00000004UL

#define	_CMU_HFXOCTRL_LFTIMEOUT_4CYCLES 0x00000002UL

#define	_CMU_HFXOCTRL_LFTIMEOUT_4KCYCLES 0x00000007UL

#define	_CMU_HFXOCTRL_LFTIMEOUT_64CYCLES 0x00000005UL

#define	_CMU_HFXOCTRL_LFTIMEOUT_DEFAULT 0x00000000UL

#define	_CMU_HFXOCTRL_LFTIMEOUT_MASK 0x7000000UL

#define	_CMU_HFXOCTRL_LFTIMEOUT_SHIFT 24

#define	_CMU_HFXOCTRL_MASK 0x3700003BUL

#define	_CMU_HFXOCTRL_MODE_ACBUFEXTCLK 0x00000001UL

#define	_CMU_HFXOCTRL_MODE_DCBUFEXTCLK 0x00000002UL

#define	_CMU_HFXOCTRL_MODE_DEFAULT 0x00000000UL

#define	_CMU_HFXOCTRL_MODE_DIGEXTCLK 0x00000003UL

#define	_CMU_HFXOCTRL_MODE_MASK 0x3UL

#define	_CMU_HFXOCTRL_MODE_SHIFT 0

#define	_CMU_HFXOCTRL_MODE_XTAL 0x00000000UL

#define	_CMU_HFXOCTRL_PEAKDETMODE_AUTOCMD 0x00000001UL

#define	_CMU_HFXOCTRL_PEAKDETMODE_CMD 0x00000002UL

#define	_CMU_HFXOCTRL_PEAKDETMODE_DEFAULT 0x00000000UL

#define	_CMU_HFXOCTRL_PEAKDETMODE_MANUAL 0x00000003UL

#define	_CMU_HFXOCTRL_PEAKDETMODE_MASK 0x30UL

#define	_CMU_HFXOCTRL_PEAKDETMODE_ONCECMD 0x00000000UL

#define	_CMU_HFXOCTRL_PEAKDETMODE_SHIFT 4

#define	_CMU_HFXOCTRL_RESETVALUE 0x00000008UL

#define	_CMU_HFXOSTARTUPCTRL_CTUNE_DEFAULT 0x00000000UL

#define	_CMU_HFXOSTARTUPCTRL_CTUNE_MASK 0xFF800UL

#define	_CMU_HFXOSTARTUPCTRL_CTUNE_SHIFT 11

#define	_CMU_HFXOSTARTUPCTRL_IBTRIMXOCORE_DEFAULT 0x00000600UL

#define	_CMU_HFXOSTARTUPCTRL_IBTRIMXOCORE_MASK 0x7FFUL

#define	_CMU_HFXOSTARTUPCTRL_IBTRIMXOCORE_SHIFT 0

#define	_CMU_HFXOSTARTUPCTRL_MASK 0x000FFFFFUL

#define	_CMU_HFXOSTARTUPCTRL_RESETVALUE 0x00000600UL

#define	_CMU_HFXOSTEADYSTATECTRL_CTUNE_DEFAULT 0x00000000UL

#define	_CMU_HFXOSTEADYSTATECTRL_CTUNE_MASK 0xFF800UL

#define	_CMU_HFXOSTEADYSTATECTRL_CTUNE_SHIFT 11

#define	_CMU_HFXOSTEADYSTATECTRL_IBTRIMXOCORE_DEFAULT 0x00000100UL

#define	_CMU_HFXOSTEADYSTATECTRL_IBTRIMXOCORE_MASK 0x7FFUL

#define	_CMU_HFXOSTEADYSTATECTRL_IBTRIMXOCORE_SHIFT 0

#define	_CMU_HFXOSTEADYSTATECTRL_MASK 0x0C0FFFFFUL

#define	_CMU_HFXOSTEADYSTATECTRL_PEAKDETEN_DEFAULT 0x00000000UL

#define	_CMU_HFXOSTEADYSTATECTRL_PEAKDETEN_MASK 0x4000000UL

#define	_CMU_HFXOSTEADYSTATECTRL_PEAKDETEN_SHIFT 26

#define	_CMU_HFXOSTEADYSTATECTRL_PEAKMONEN_DEFAULT 0x00000001UL

#define	_CMU_HFXOSTEADYSTATECTRL_PEAKMONEN_MASK 0x8000000UL

#define	_CMU_HFXOSTEADYSTATECTRL_PEAKMONEN_SHIFT 27

#define	_CMU_HFXOSTEADYSTATECTRL_RESETVALUE 0x08000100UL

#define	_CMU_HFXOTIMEOUTCTRL_MASK 0x0000F0FFUL

#define	_CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_128CYCLES 0x00000005UL

#define	_CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_128KCYCLES 0x0000000EUL

#define	_CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_16CYCLES 0x00000002UL

#define	_CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_16KCYCLES 0x0000000BUL

#define	_CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_1KCYCLES 0x00000007UL

#define	_CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_256CYCLES 0x00000006UL

#define	_CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_2CYCLES 0x00000000UL

#define	_CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_2KCYCLES 0x00000008UL

#define	_CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_32CYCLES 0x00000003UL

#define	_CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_32KCYCLES 0x0000000CUL

#define	_CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_4CYCLES 0x00000001UL

#define	_CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_4KCYCLES 0x00000009UL

#define	_CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_64CYCLES 0x00000004UL

#define	_CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_64KCYCLES 0x0000000DUL

#define	_CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_8KCYCLES 0x0000000AUL

#define	_CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_DEFAULT 0x0000000DUL

#define	_CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_MASK 0xF000UL

#define	_CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_SHIFT 12

#define	_CMU_HFXOTIMEOUTCTRL_RESETVALUE 0x0000D04EUL

#define	_CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_128CYCLES 0x00000005UL

#define	_CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_128KCYCLES 0x0000000EUL

#define	_CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_16CYCLES 0x00000002UL

#define	_CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_16KCYCLES 0x0000000BUL

#define	_CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_1KCYCLES 0x00000007UL

#define	_CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_256CYCLES 0x00000006UL

#define	_CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_2CYCLES 0x00000000UL

#define	_CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_2KCYCLES 0x00000008UL

#define	_CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_32CYCLES 0x00000003UL

#define	_CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_32KCYCLES 0x0000000CUL

#define	_CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_4CYCLES 0x00000001UL

#define	_CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_4KCYCLES 0x00000009UL

#define	_CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_64CYCLES 0x00000004UL

#define	_CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_64KCYCLES 0x0000000DUL

#define	_CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_8KCYCLES 0x0000000AUL

#define	_CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_DEFAULT 0x0000000EUL

#define	_CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_MASK 0xFUL

#define	_CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_SHIFT 0

#define	_CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_128CYCLES 0x00000005UL

#define	_CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_128KCYCLES 0x0000000EUL

#define	_CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_16CYCLES 0x00000002UL

#define	_CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_16KCYCLES 0x0000000BUL

#define	_CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_1KCYCLES 0x00000007UL

#define	_CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_256CYCLES 0x00000006UL

#define	_CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_2CYCLES 0x00000000UL

#define	_CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_2KCYCLES 0x00000008UL

#define	_CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_32CYCLES 0x00000003UL

#define	_CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_32KCYCLES 0x0000000CUL

#define	_CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_4CYCLES 0x00000001UL

#define	_CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_4KCYCLES 0x00000009UL

#define	_CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_64CYCLES 0x00000004UL

#define	_CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_64KCYCLES 0x0000000DUL

#define	_CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_8KCYCLES 0x0000000AUL

#define	_CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_DEFAULT 0x00000004UL

#define	_CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_MASK 0xF0UL

#define	_CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_SHIFT 4

#define	_CMU_HFXOTRIMSTATUS_IBTRIMXOCORE_DEFAULT 0x00000000UL

#define	_CMU_HFXOTRIMSTATUS_IBTRIMXOCORE_MASK 0x7FFUL

#define	_CMU_HFXOTRIMSTATUS_IBTRIMXOCORE_SHIFT 0

#define	_CMU_HFXOTRIMSTATUS_IBTRIMXOCOREMON_DEFAULT 0x00000000UL

#define	_CMU_HFXOTRIMSTATUS_IBTRIMXOCOREMON_MASK 0x7FF0000UL

#define	_CMU_HFXOTRIMSTATUS_IBTRIMXOCOREMON_SHIFT 16

#define	_CMU_HFXOTRIMSTATUS_MASK 0xC7FF07FFUL

#define	_CMU_HFXOTRIMSTATUS_MONVALID_DEFAULT 0x00000000UL

#define	_CMU_HFXOTRIMSTATUS_MONVALID_MASK 0x80000000UL

#define	_CMU_HFXOTRIMSTATUS_MONVALID_SHIFT 31

#define	_CMU_HFXOTRIMSTATUS_RESETVALUE 0x00000000UL

#define	_CMU_HFXOTRIMSTATUS_VALID_DEFAULT 0x00000000UL

#define	_CMU_HFXOTRIMSTATUS_VALID_MASK 0x40000000UL

#define	_CMU_HFXOTRIMSTATUS_VALID_SHIFT 30

#define	_CMU_IEN_AUXHFRCORDY_DEFAULT 0x00000000UL

#define	_CMU_IEN_AUXHFRCORDY_MASK 0x10UL

#define	_CMU_IEN_AUXHFRCORDY_SHIFT 4

#define	_CMU_IEN_CALOF_DEFAULT 0x00000000UL

#define	_CMU_IEN_CALOF_MASK 0x40UL

#define	_CMU_IEN_CALOF_SHIFT 6

#define	_CMU_IEN_CALRDY_DEFAULT 0x00000000UL

#define	_CMU_IEN_CALRDY_MASK 0x20UL

#define	_CMU_IEN_CALRDY_SHIFT 5

#define	_CMU_IEN_CMUERR_DEFAULT 0x00000000UL

#define	_CMU_IEN_CMUERR_MASK 0x80000000UL

#define	_CMU_IEN_CMUERR_SHIFT 31

#define	_CMU_IEN_DPLLLOCKFAILHIGH_DEFAULT 0x00000000UL

#define	_CMU_IEN_DPLLLOCKFAILHIGH_MASK 0x20000UL

#define	_CMU_IEN_DPLLLOCKFAILHIGH_SHIFT 17

#define	_CMU_IEN_DPLLLOCKFAILLOW_DEFAULT 0x00000000UL

#define	_CMU_IEN_DPLLLOCKFAILLOW_MASK 0x10000UL

#define	_CMU_IEN_DPLLLOCKFAILLOW_SHIFT 16

#define	_CMU_IEN_DPLLRDY_DEFAULT 0x00000000UL

#define	_CMU_IEN_DPLLRDY_MASK 0x8000UL

#define	_CMU_IEN_DPLLRDY_SHIFT 15

#define	_CMU_IEN_HFRCODIS_DEFAULT 0x00000000UL

#define	_CMU_IEN_HFRCODIS_MASK 0x2000UL

#define	_CMU_IEN_HFRCODIS_SHIFT 13

#define	_CMU_IEN_HFRCORDY_DEFAULT 0x00000000UL

#define	_CMU_IEN_HFRCORDY_MASK 0x1UL

#define	_CMU_IEN_HFRCORDY_SHIFT 0

#define	_CMU_IEN_HFXOAUTOSW_DEFAULT 0x00000000UL

#define	_CMU_IEN_HFXOAUTOSW_MASK 0x200UL

#define	_CMU_IEN_HFXOAUTOSW_SHIFT 9

#define	_CMU_IEN_HFXODISERR_DEFAULT 0x00000000UL

#define	_CMU_IEN_HFXODISERR_MASK 0x100UL

#define	_CMU_IEN_HFXODISERR_SHIFT 8

#define	_CMU_IEN_HFXOPEAKDETRDY_DEFAULT 0x00000000UL

#define	_CMU_IEN_HFXOPEAKDETRDY_MASK 0x800UL

#define	_CMU_IEN_HFXOPEAKDETRDY_SHIFT 11

#define	_CMU_IEN_HFXORDY_DEFAULT 0x00000000UL

#define	_CMU_IEN_HFXORDY_MASK 0x2UL

#define	_CMU_IEN_HFXORDY_SHIFT 1

#define	_CMU_IEN_LFRCOEDGE_DEFAULT 0x00000000UL

#define	_CMU_IEN_LFRCOEDGE_MASK 0x10000000UL

#define	_CMU_IEN_LFRCOEDGE_SHIFT 28

#define	_CMU_IEN_LFRCORDY_DEFAULT 0x00000000UL

#define	_CMU_IEN_LFRCORDY_MASK 0x4UL

#define	_CMU_IEN_LFRCORDY_SHIFT 2

#define	_CMU_IEN_LFTIMEOUTERR_DEFAULT 0x00000000UL

#define	_CMU_IEN_LFTIMEOUTERR_MASK 0x4000UL

#define	_CMU_IEN_LFTIMEOUTERR_SHIFT 14

#define	_CMU_IEN_LFXOEDGE_DEFAULT 0x00000000UL

#define	_CMU_IEN_LFXOEDGE_MASK 0x8000000UL

#define	_CMU_IEN_LFXOEDGE_SHIFT 27

#define	_CMU_IEN_LFXORDY_DEFAULT 0x00000000UL

#define	_CMU_IEN_LFXORDY_MASK 0x8UL

#define	_CMU_IEN_LFXORDY_SHIFT 3

#define	_CMU_IEN_MASK 0xB803EBFFUL

#define	_CMU_IEN_RESETVALUE 0x00000000UL

#define	_CMU_IEN_ULFRCOEDGE_DEFAULT 0x00000000UL

#define	_CMU_IEN_ULFRCOEDGE_MASK 0x20000000UL

#define	_CMU_IEN_ULFRCOEDGE_SHIFT 29

#define	_CMU_IEN_USHFRCORDY_DEFAULT 0x00000000UL

#define	_CMU_IEN_USHFRCORDY_MASK 0x80UL

#define	_CMU_IEN_USHFRCORDY_SHIFT 7

#define	_CMU_IF_AUXHFRCORDY_DEFAULT 0x00000000UL

#define	_CMU_IF_AUXHFRCORDY_MASK 0x10UL

#define	_CMU_IF_AUXHFRCORDY_SHIFT 4

#define	_CMU_IF_CALOF_DEFAULT 0x00000000UL

#define	_CMU_IF_CALOF_MASK 0x40UL

#define	_CMU_IF_CALOF_SHIFT 6

#define	_CMU_IF_CALRDY_DEFAULT 0x00000000UL

#define	_CMU_IF_CALRDY_MASK 0x20UL

#define	_CMU_IF_CALRDY_SHIFT 5

#define	_CMU_IF_CMUERR_DEFAULT 0x00000000UL

#define	_CMU_IF_CMUERR_MASK 0x80000000UL

#define	_CMU_IF_CMUERR_SHIFT 31

#define	_CMU_IF_DPLLLOCKFAILHIGH_DEFAULT 0x00000000UL

#define	_CMU_IF_DPLLLOCKFAILHIGH_MASK 0x20000UL

#define	_CMU_IF_DPLLLOCKFAILHIGH_SHIFT 17

#define	_CMU_IF_DPLLLOCKFAILLOW_DEFAULT 0x00000000UL

#define	_CMU_IF_DPLLLOCKFAILLOW_MASK 0x10000UL

#define	_CMU_IF_DPLLLOCKFAILLOW_SHIFT 16

#define	_CMU_IF_DPLLRDY_DEFAULT 0x00000000UL

#define	_CMU_IF_DPLLRDY_MASK 0x8000UL

#define	_CMU_IF_DPLLRDY_SHIFT 15

#define	_CMU_IF_HFRCODIS_DEFAULT 0x00000000UL

#define	_CMU_IF_HFRCODIS_MASK 0x2000UL

#define	_CMU_IF_HFRCODIS_SHIFT 13

#define	_CMU_IF_HFRCORDY_DEFAULT 0x00000001UL

#define	_CMU_IF_HFRCORDY_MASK 0x1UL

#define	_CMU_IF_HFRCORDY_SHIFT 0

#define	_CMU_IF_HFXOAUTOSW_DEFAULT 0x00000000UL

#define	_CMU_IF_HFXOAUTOSW_MASK 0x200UL

#define	_CMU_IF_HFXOAUTOSW_SHIFT 9

#define	_CMU_IF_HFXODISERR_DEFAULT 0x00000000UL

#define	_CMU_IF_HFXODISERR_MASK 0x100UL

#define	_CMU_IF_HFXODISERR_SHIFT 8

#define	_CMU_IF_HFXOPEAKDETRDY_DEFAULT 0x00000000UL

#define	_CMU_IF_HFXOPEAKDETRDY_MASK 0x800UL

#define	_CMU_IF_HFXOPEAKDETRDY_SHIFT 11

#define	_CMU_IF_HFXORDY_DEFAULT 0x00000000UL

#define	_CMU_IF_HFXORDY_MASK 0x2UL

#define	_CMU_IF_HFXORDY_SHIFT 1

#define	_CMU_IF_LFRCOEDGE_DEFAULT 0x00000000UL

#define	_CMU_IF_LFRCOEDGE_MASK 0x10000000UL

#define	_CMU_IF_LFRCOEDGE_SHIFT 28

#define	_CMU_IF_LFRCORDY_DEFAULT 0x00000000UL

#define	_CMU_IF_LFRCORDY_MASK 0x4UL

#define	_CMU_IF_LFRCORDY_SHIFT 2

#define	_CMU_IF_LFTIMEOUTERR_DEFAULT 0x00000000UL

#define	_CMU_IF_LFTIMEOUTERR_MASK 0x4000UL

#define	_CMU_IF_LFTIMEOUTERR_SHIFT 14

#define	_CMU_IF_LFXOEDGE_DEFAULT 0x00000000UL

#define	_CMU_IF_LFXOEDGE_MASK 0x8000000UL

#define	_CMU_IF_LFXOEDGE_SHIFT 27

#define	_CMU_IF_LFXORDY_DEFAULT 0x00000000UL

#define	_CMU_IF_LFXORDY_MASK 0x8UL

#define	_CMU_IF_LFXORDY_SHIFT 3

#define	_CMU_IF_MASK 0xB803EBFFUL

#define	_CMU_IF_RESETVALUE 0x00000001UL

#define	_CMU_IF_ULFRCOEDGE_DEFAULT 0x00000000UL

#define	_CMU_IF_ULFRCOEDGE_MASK 0x20000000UL

#define	_CMU_IF_ULFRCOEDGE_SHIFT 29

#define	_CMU_IF_USHFRCORDY_DEFAULT 0x00000000UL

#define	_CMU_IF_USHFRCORDY_MASK 0x80UL

#define	_CMU_IF_USHFRCORDY_SHIFT 7

#define	_CMU_IFC_AUXHFRCORDY_DEFAULT 0x00000000UL

#define	_CMU_IFC_AUXHFRCORDY_MASK 0x10UL

#define	_CMU_IFC_AUXHFRCORDY_SHIFT 4

#define	_CMU_IFC_CALOF_DEFAULT 0x00000000UL

#define	_CMU_IFC_CALOF_MASK 0x40UL

#define	_CMU_IFC_CALOF_SHIFT 6

#define	_CMU_IFC_CALRDY_DEFAULT 0x00000000UL

#define	_CMU_IFC_CALRDY_MASK 0x20UL

#define	_CMU_IFC_CALRDY_SHIFT 5

#define	_CMU_IFC_CMUERR_DEFAULT 0x00000000UL

#define	_CMU_IFC_CMUERR_MASK 0x80000000UL

#define	_CMU_IFC_CMUERR_SHIFT 31

#define	_CMU_IFC_DPLLLOCKFAILHIGH_DEFAULT 0x00000000UL

#define	_CMU_IFC_DPLLLOCKFAILHIGH_MASK 0x20000UL

#define	_CMU_IFC_DPLLLOCKFAILHIGH_SHIFT 17

#define	_CMU_IFC_DPLLLOCKFAILLOW_DEFAULT 0x00000000UL

#define	_CMU_IFC_DPLLLOCKFAILLOW_MASK 0x10000UL

#define	_CMU_IFC_DPLLLOCKFAILLOW_SHIFT 16

#define	_CMU_IFC_DPLLRDY_DEFAULT 0x00000000UL

#define	_CMU_IFC_DPLLRDY_MASK 0x8000UL

#define	_CMU_IFC_DPLLRDY_SHIFT 15

#define	_CMU_IFC_HFRCODIS_DEFAULT 0x00000000UL

#define	_CMU_IFC_HFRCODIS_MASK 0x2000UL

#define	_CMU_IFC_HFRCODIS_SHIFT 13

#define	_CMU_IFC_HFRCORDY_DEFAULT 0x00000000UL

#define	_CMU_IFC_HFRCORDY_MASK 0x1UL

#define	_CMU_IFC_HFRCORDY_SHIFT 0

#define	_CMU_IFC_HFXOAUTOSW_DEFAULT 0x00000000UL

#define	_CMU_IFC_HFXOAUTOSW_MASK 0x200UL

#define	_CMU_IFC_HFXOAUTOSW_SHIFT 9

#define	_CMU_IFC_HFXODISERR_DEFAULT 0x00000000UL

#define	_CMU_IFC_HFXODISERR_MASK 0x100UL

#define	_CMU_IFC_HFXODISERR_SHIFT 8

#define	_CMU_IFC_HFXOPEAKDETRDY_DEFAULT 0x00000000UL

#define	_CMU_IFC_HFXOPEAKDETRDY_MASK 0x800UL

#define	_CMU_IFC_HFXOPEAKDETRDY_SHIFT 11

#define	_CMU_IFC_HFXORDY_DEFAULT 0x00000000UL

#define	_CMU_IFC_HFXORDY_MASK 0x2UL

#define	_CMU_IFC_HFXORDY_SHIFT 1

#define	_CMU_IFC_LFRCOEDGE_DEFAULT 0x00000000UL

#define	_CMU_IFC_LFRCOEDGE_MASK 0x10000000UL

#define	_CMU_IFC_LFRCOEDGE_SHIFT 28

#define	_CMU_IFC_LFRCORDY_DEFAULT 0x00000000UL

#define	_CMU_IFC_LFRCORDY_MASK 0x4UL

#define	_CMU_IFC_LFRCORDY_SHIFT 2

#define	_CMU_IFC_LFTIMEOUTERR_DEFAULT 0x00000000UL

#define	_CMU_IFC_LFTIMEOUTERR_MASK 0x4000UL

#define	_CMU_IFC_LFTIMEOUTERR_SHIFT 14

#define	_CMU_IFC_LFXOEDGE_DEFAULT 0x00000000UL

#define	_CMU_IFC_LFXOEDGE_MASK 0x8000000UL

#define	_CMU_IFC_LFXOEDGE_SHIFT 27

#define	_CMU_IFC_LFXORDY_DEFAULT 0x00000000UL

#define	_CMU_IFC_LFXORDY_MASK 0x8UL

#define	_CMU_IFC_LFXORDY_SHIFT 3

#define	_CMU_IFC_MASK 0xB803EBFFUL

#define	_CMU_IFC_RESETVALUE 0x00000000UL

#define	_CMU_IFC_ULFRCOEDGE_DEFAULT 0x00000000UL

#define	_CMU_IFC_ULFRCOEDGE_MASK 0x20000000UL

#define	_CMU_IFC_ULFRCOEDGE_SHIFT 29

#define	_CMU_IFC_USHFRCORDY_DEFAULT 0x00000000UL

#define	_CMU_IFC_USHFRCORDY_MASK 0x80UL

#define	_CMU_IFC_USHFRCORDY_SHIFT 7

#define	_CMU_IFS_AUXHFRCORDY_DEFAULT 0x00000000UL

#define	_CMU_IFS_AUXHFRCORDY_MASK 0x10UL

#define	_CMU_IFS_AUXHFRCORDY_SHIFT 4

#define	_CMU_IFS_CALOF_DEFAULT 0x00000000UL

#define	_CMU_IFS_CALOF_MASK 0x40UL

#define	_CMU_IFS_CALOF_SHIFT 6

#define	_CMU_IFS_CALRDY_DEFAULT 0x00000000UL

#define	_CMU_IFS_CALRDY_MASK 0x20UL

#define	_CMU_IFS_CALRDY_SHIFT 5

#define	_CMU_IFS_CMUERR_DEFAULT 0x00000000UL

#define	_CMU_IFS_CMUERR_MASK 0x80000000UL

#define	_CMU_IFS_CMUERR_SHIFT 31

#define	_CMU_IFS_DPLLLOCKFAILHIGH_DEFAULT 0x00000000UL

#define	_CMU_IFS_DPLLLOCKFAILHIGH_MASK 0x20000UL

#define	_CMU_IFS_DPLLLOCKFAILHIGH_SHIFT 17

#define	_CMU_IFS_DPLLLOCKFAILLOW_DEFAULT 0x00000000UL

#define	_CMU_IFS_DPLLLOCKFAILLOW_MASK 0x10000UL

#define	_CMU_IFS_DPLLLOCKFAILLOW_SHIFT 16

#define	_CMU_IFS_DPLLRDY_DEFAULT 0x00000000UL

#define	_CMU_IFS_DPLLRDY_MASK 0x8000UL

#define	_CMU_IFS_DPLLRDY_SHIFT 15

#define	_CMU_IFS_HFRCODIS_DEFAULT 0x00000000UL

#define	_CMU_IFS_HFRCODIS_MASK 0x2000UL

#define	_CMU_IFS_HFRCODIS_SHIFT 13

#define	_CMU_IFS_HFRCORDY_DEFAULT 0x00000000UL

#define	_CMU_IFS_HFRCORDY_MASK 0x1UL

#define	_CMU_IFS_HFRCORDY_SHIFT 0

#define	_CMU_IFS_HFXOAUTOSW_DEFAULT 0x00000000UL

#define	_CMU_IFS_HFXOAUTOSW_MASK 0x200UL

#define	_CMU_IFS_HFXOAUTOSW_SHIFT 9

#define	_CMU_IFS_HFXODISERR_DEFAULT 0x00000000UL

#define	_CMU_IFS_HFXODISERR_MASK 0x100UL

#define	_CMU_IFS_HFXODISERR_SHIFT 8

#define	_CMU_IFS_HFXOPEAKDETRDY_DEFAULT 0x00000000UL

#define	_CMU_IFS_HFXOPEAKDETRDY_MASK 0x800UL

#define	_CMU_IFS_HFXOPEAKDETRDY_SHIFT 11

#define	_CMU_IFS_HFXORDY_DEFAULT 0x00000000UL

#define	_CMU_IFS_HFXORDY_MASK 0x2UL

#define	_CMU_IFS_HFXORDY_SHIFT 1

#define	_CMU_IFS_LFRCOEDGE_DEFAULT 0x00000000UL

#define	_CMU_IFS_LFRCOEDGE_MASK 0x10000000UL

#define	_CMU_IFS_LFRCOEDGE_SHIFT 28

#define	_CMU_IFS_LFRCORDY_DEFAULT 0x00000000UL

#define	_CMU_IFS_LFRCORDY_MASK 0x4UL

#define	_CMU_IFS_LFRCORDY_SHIFT 2

#define	_CMU_IFS_LFTIMEOUTERR_DEFAULT 0x00000000UL

#define	_CMU_IFS_LFTIMEOUTERR_MASK 0x4000UL

#define	_CMU_IFS_LFTIMEOUTERR_SHIFT 14

#define	_CMU_IFS_LFXOEDGE_DEFAULT 0x00000000UL

#define	_CMU_IFS_LFXOEDGE_MASK 0x8000000UL

#define	_CMU_IFS_LFXOEDGE_SHIFT 27

#define	_CMU_IFS_LFXORDY_DEFAULT 0x00000000UL

#define	_CMU_IFS_LFXORDY_MASK 0x8UL

#define	_CMU_IFS_LFXORDY_SHIFT 3

#define	_CMU_IFS_MASK 0xB803EBFFUL

#define	_CMU_IFS_RESETVALUE 0x00000000UL

#define	_CMU_IFS_ULFRCOEDGE_DEFAULT 0x00000000UL

#define	_CMU_IFS_ULFRCOEDGE_MASK 0x20000000UL

#define	_CMU_IFS_ULFRCOEDGE_SHIFT 29

#define	_CMU_IFS_USHFRCORDY_DEFAULT 0x00000000UL

#define	_CMU_IFS_USHFRCORDY_MASK 0x80UL

#define	_CMU_IFS_USHFRCORDY_SHIFT 7

#define	_CMU_LFACLKEN0_LCD_DEFAULT 0x00000000UL

#define	_CMU_LFACLKEN0_LCD_MASK 0x8UL

#define	_CMU_LFACLKEN0_LCD_SHIFT 3

#define	_CMU_LFACLKEN0_LESENSE_DEFAULT 0x00000000UL

#define	_CMU_LFACLKEN0_LESENSE_MASK 0x4UL

#define	_CMU_LFACLKEN0_LESENSE_SHIFT 2

#define	_CMU_LFACLKEN0_LETIMER0_DEFAULT 0x00000000UL

#define	_CMU_LFACLKEN0_LETIMER0_MASK 0x1UL

#define	_CMU_LFACLKEN0_LETIMER0_SHIFT 0

#define	_CMU_LFACLKEN0_LETIMER1_DEFAULT 0x00000000UL

#define	_CMU_LFACLKEN0_LETIMER1_MASK 0x2UL

#define	_CMU_LFACLKEN0_LETIMER1_SHIFT 1

#define	_CMU_LFACLKEN0_MASK 0x0000001FUL

#define	_CMU_LFACLKEN0_RESETVALUE 0x00000000UL

#define	_CMU_LFACLKEN0_RTC_DEFAULT 0x00000000UL

#define	_CMU_LFACLKEN0_RTC_MASK 0x10UL

#define	_CMU_LFACLKEN0_RTC_SHIFT 4

#define	_CMU_LFACLKSEL_LFA_DEFAULT 0x00000000UL

#define	_CMU_LFACLKSEL_LFA_DISABLED 0x00000000UL

#define	_CMU_LFACLKSEL_LFA_LFRCO 0x00000001UL

#define	_CMU_LFACLKSEL_LFA_LFXO 0x00000002UL

#define	_CMU_LFACLKSEL_LFA_MASK 0x7UL

#define	_CMU_LFACLKSEL_LFA_SHIFT 0

#define	_CMU_LFACLKSEL_LFA_ULFRCO 0x00000004UL

#define	_CMU_LFACLKSEL_MASK 0x00000007UL

#define	_CMU_LFACLKSEL_RESETVALUE 0x00000000UL

#define	_CMU_LFAPRESC0_LCD_DIV1 0x00000000UL

#define	_CMU_LFAPRESC0_LCD_DIV128 0x00000007UL

#define	_CMU_LFAPRESC0_LCD_DIV16 0x00000004UL

#define	_CMU_LFAPRESC0_LCD_DIV2 0x00000001UL

#define	_CMU_LFAPRESC0_LCD_DIV32 0x00000005UL

#define	_CMU_LFAPRESC0_LCD_DIV4 0x00000002UL

#define	_CMU_LFAPRESC0_LCD_DIV64 0x00000006UL

#define	_CMU_LFAPRESC0_LCD_DIV8 0x00000003UL

#define	_CMU_LFAPRESC0_LCD_MASK 0x7000UL

#define	_CMU_LFAPRESC0_LCD_SHIFT 12

#define	_CMU_LFAPRESC0_LESENSE_DIV1 0x00000000UL

#define	_CMU_LFAPRESC0_LESENSE_DIV2 0x00000001UL

#define	_CMU_LFAPRESC0_LESENSE_DIV4 0x00000002UL

#define	_CMU_LFAPRESC0_LESENSE_DIV8 0x00000003UL

#define	_CMU_LFAPRESC0_LESENSE_MASK 0x300UL

#define	_CMU_LFAPRESC0_LESENSE_SHIFT 8

#define	_CMU_LFAPRESC0_LETIMER0_DIV1 0x00000000UL

#define	_CMU_LFAPRESC0_LETIMER0_DIV1024 0x0000000AUL

#define	_CMU_LFAPRESC0_LETIMER0_DIV128 0x00000007UL

#define	_CMU_LFAPRESC0_LETIMER0_DIV16 0x00000004UL

#define	_CMU_LFAPRESC0_LETIMER0_DIV16384 0x0000000EUL

#define	_CMU_LFAPRESC0_LETIMER0_DIV2 0x00000001UL

#define	_CMU_LFAPRESC0_LETIMER0_DIV2048 0x0000000BUL

#define	_CMU_LFAPRESC0_LETIMER0_DIV256 0x00000008UL

#define	_CMU_LFAPRESC0_LETIMER0_DIV32 0x00000005UL

#define	_CMU_LFAPRESC0_LETIMER0_DIV32768 0x0000000FUL

#define	_CMU_LFAPRESC0_LETIMER0_DIV4 0x00000002UL

#define	_CMU_LFAPRESC0_LETIMER0_DIV4096 0x0000000CUL

#define	_CMU_LFAPRESC0_LETIMER0_DIV512 0x00000009UL

#define	_CMU_LFAPRESC0_LETIMER0_DIV64 0x00000006UL

#define	_CMU_LFAPRESC0_LETIMER0_DIV8 0x00000003UL

#define	_CMU_LFAPRESC0_LETIMER0_DIV8192 0x0000000DUL

#define	_CMU_LFAPRESC0_LETIMER0_MASK 0xFUL

#define	_CMU_LFAPRESC0_LETIMER0_SHIFT 0

#define	_CMU_LFAPRESC0_LETIMER1_DIV1 0x00000000UL

#define	_CMU_LFAPRESC0_LETIMER1_DIV1024 0x0000000AUL

#define	_CMU_LFAPRESC0_LETIMER1_DIV128 0x00000007UL

#define	_CMU_LFAPRESC0_LETIMER1_DIV16 0x00000004UL

#define	_CMU_LFAPRESC0_LETIMER1_DIV16384 0x0000000EUL

#define	_CMU_LFAPRESC0_LETIMER1_DIV2 0x00000001UL

#define	_CMU_LFAPRESC0_LETIMER1_DIV2048 0x0000000BUL

#define	_CMU_LFAPRESC0_LETIMER1_DIV256 0x00000008UL

#define	_CMU_LFAPRESC0_LETIMER1_DIV32 0x00000005UL

#define	_CMU_LFAPRESC0_LETIMER1_DIV32768 0x0000000FUL

#define	_CMU_LFAPRESC0_LETIMER1_DIV4 0x00000002UL

#define	_CMU_LFAPRESC0_LETIMER1_DIV4096 0x0000000CUL

#define	_CMU_LFAPRESC0_LETIMER1_DIV512 0x00000009UL

#define	_CMU_LFAPRESC0_LETIMER1_DIV64 0x00000006UL

#define	_CMU_LFAPRESC0_LETIMER1_DIV8 0x00000003UL

#define	_CMU_LFAPRESC0_LETIMER1_DIV8192 0x0000000DUL

#define	_CMU_LFAPRESC0_LETIMER1_MASK 0xF0UL

#define	_CMU_LFAPRESC0_LETIMER1_SHIFT 4

#define	_CMU_LFAPRESC0_MASK 0x000F73FFUL

#define	_CMU_LFAPRESC0_RESETVALUE 0x00000000UL

#define	_CMU_LFAPRESC0_RTC_DIV1 0x00000000UL

#define	_CMU_LFAPRESC0_RTC_DIV1024 0x0000000AUL

#define	_CMU_LFAPRESC0_RTC_DIV128 0x00000007UL

#define	_CMU_LFAPRESC0_RTC_DIV16 0x00000004UL

#define	_CMU_LFAPRESC0_RTC_DIV16384 0x0000000EUL

#define	_CMU_LFAPRESC0_RTC_DIV2 0x00000001UL

#define	_CMU_LFAPRESC0_RTC_DIV2048 0x0000000BUL

#define	_CMU_LFAPRESC0_RTC_DIV256 0x00000008UL

#define	_CMU_LFAPRESC0_RTC_DIV32 0x00000005UL

#define	_CMU_LFAPRESC0_RTC_DIV32768 0x0000000FUL

#define	_CMU_LFAPRESC0_RTC_DIV4 0x00000002UL

#define	_CMU_LFAPRESC0_RTC_DIV4096 0x0000000CUL

#define	_CMU_LFAPRESC0_RTC_DIV512 0x00000009UL

#define	_CMU_LFAPRESC0_RTC_DIV64 0x00000006UL

#define	_CMU_LFAPRESC0_RTC_DIV8 0x00000003UL

#define	_CMU_LFAPRESC0_RTC_DIV8192 0x0000000DUL

#define	_CMU_LFAPRESC0_RTC_MASK 0xF0000UL

#define	_CMU_LFAPRESC0_RTC_SHIFT 16

#define

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