EMU Bit FieldsDevices > EMU

Macros

#define _EMU_BUCTRL_BUACTPWRCON_BUMAIN 0x00000002UL
#define _EMU_BUCTRL_BUACTPWRCON_DEFAULT 0x00000000UL
#define _EMU_BUCTRL_BUACTPWRCON_MAINBU 0x00000001UL
#define _EMU_BUCTRL_BUACTPWRCON_MASK 0x30000UL
#define _EMU_BUCTRL_BUACTPWRCON_NODIODE 0x00000003UL
#define _EMU_BUCTRL_BUACTPWRCON_NONE 0x00000000UL
#define _EMU_BUCTRL_BUACTPWRCON_SHIFT 16
#define _EMU_BUCTRL_BUINACTPWRCON_BUMAIN 0x00000002UL
#define _EMU_BUCTRL_BUINACTPWRCON_DEFAULT 0x00000000UL
#define _EMU_BUCTRL_BUINACTPWRCON_MAINBU 0x00000001UL
#define _EMU_BUCTRL_BUINACTPWRCON_MASK 0x300000UL
#define _EMU_BUCTRL_BUINACTPWRCON_NODIODE 0x00000003UL
#define _EMU_BUCTRL_BUINACTPWRCON_NONE 0x00000000UL
#define _EMU_BUCTRL_BUINACTPWRCON_SHIFT 20
#define _EMU_BUCTRL_BUVINPROBEEN_DEFAULT 0x00000000UL
#define _EMU_BUCTRL_BUVINPROBEEN_MASK 0x4UL
#define _EMU_BUCTRL_BUVINPROBEEN_SHIFT 2
#define _EMU_BUCTRL_DISMAXCOMP_DEFAULT 0x00000000UL
#define _EMU_BUCTRL_DISMAXCOMP_MASK 0x80000000UL
#define _EMU_BUCTRL_DISMAXCOMP_SHIFT 31
#define _EMU_BUCTRL_EN_DEFAULT 0x00000000UL
#define _EMU_BUCTRL_EN_MASK 0x1UL
#define _EMU_BUCTRL_EN_SHIFT 0
#define _EMU_BUCTRL_MASK 0x80333307UL
#define _EMU_BUCTRL_PWRRES_DEFAULT 0x00000000UL
#define _EMU_BUCTRL_PWRRES_MASK 0x3000UL
#define _EMU_BUCTRL_PWRRES_RES0 0x00000000UL
#define _EMU_BUCTRL_PWRRES_RES1 0x00000001UL
#define _EMU_BUCTRL_PWRRES_RES2 0x00000002UL
#define _EMU_BUCTRL_PWRRES_RES3 0x00000003UL
#define _EMU_BUCTRL_PWRRES_SHIFT 12
#define _EMU_BUCTRL_RESETVALUE 0x00000000UL
#define _EMU_BUCTRL_STATEN_DEFAULT 0x00000000UL
#define _EMU_BUCTRL_STATEN_MASK 0x2UL
#define _EMU_BUCTRL_STATEN_SHIFT 1
#define _EMU_BUCTRL_VOUTRES_DEFAULT 0x00000000UL
#define _EMU_BUCTRL_VOUTRES_DIS 0x00000000UL
#define _EMU_BUCTRL_VOUTRES_MASK 0x300UL
#define _EMU_BUCTRL_VOUTRES_MED 0x00000002UL
#define _EMU_BUCTRL_VOUTRES_SHIFT 8
#define _EMU_BUCTRL_VOUTRES_STRONG 0x00000003UL
#define _EMU_BUCTRL_VOUTRES_WEAK 0x00000001UL
#define _EMU_CMD_EM01VSCALE0_DEFAULT 0x00000000UL
#define _EMU_CMD_EM01VSCALE0_MASK 0x10UL
#define _EMU_CMD_EM01VSCALE0_SHIFT 4
#define _EMU_CMD_EM01VSCALE2_DEFAULT 0x00000000UL
#define _EMU_CMD_EM01VSCALE2_MASK 0x40UL
#define _EMU_CMD_EM01VSCALE2_SHIFT 6
#define _EMU_CMD_EM4UNLATCH_DEFAULT 0x00000000UL
#define _EMU_CMD_EM4UNLATCH_MASK 0x1UL
#define _EMU_CMD_EM4UNLATCH_SHIFT 0
#define _EMU_CMD_MASK 0x00000051UL
#define _EMU_CMD_RESETVALUE 0x00000000UL
#define _EMU_CTRL_EM01LD_DEFAULT 0x00000000UL
#define _EMU_CTRL_EM01LD_MASK 0x8UL
#define _EMU_CTRL_EM01LD_SHIFT 3
#define _EMU_CTRL_EM23VSCALE_DEFAULT 0x00000000UL
#define _EMU_CTRL_EM23VSCALE_MASK 0x300UL
#define _EMU_CTRL_EM23VSCALE_RESV 0x00000003UL
#define _EMU_CTRL_EM23VSCALE_SHIFT 8
#define _EMU_CTRL_EM23VSCALE_VSCALE0 0x00000002UL
#define _EMU_CTRL_EM23VSCALE_VSCALE2 0x00000000UL
#define _EMU_CTRL_EM23VSCALEAUTOWSEN_DEFAULT 0x00000000UL
#define _EMU_CTRL_EM23VSCALEAUTOWSEN_MASK 0x10UL
#define _EMU_CTRL_EM23VSCALEAUTOWSEN_SHIFT 4
#define _EMU_CTRL_EM2BLOCK_DEFAULT 0x00000000UL
#define _EMU_CTRL_EM2BLOCK_MASK 0x2UL
#define _EMU_CTRL_EM2BLOCK_SHIFT 1
#define _EMU_CTRL_EM2BODDIS_DEFAULT 0x00000000UL
#define _EMU_CTRL_EM2BODDIS_MASK 0x4UL
#define _EMU_CTRL_EM2BODDIS_SHIFT 2
#define _EMU_CTRL_EM4HVSCALE_DEFAULT 0x00000000UL
#define _EMU_CTRL_EM4HVSCALE_MASK 0x30000UL
#define _EMU_CTRL_EM4HVSCALE_RESV 0x00000003UL
#define _EMU_CTRL_EM4HVSCALE_SHIFT 16
#define _EMU_CTRL_EM4HVSCALE_VSCALE0 0x00000002UL
#define _EMU_CTRL_EM4HVSCALE_VSCALE2 0x00000000UL
#define _EMU_CTRL_MASK 0x0003031EUL
#define _EMU_CTRL_RESETVALUE 0x00000000UL
#define _EMU_DCDCCLIMCTRL_BYPLIMEN_DEFAULT 0x00000000UL
#define _EMU_DCDCCLIMCTRL_BYPLIMEN_MASK 0x2000UL
#define _EMU_DCDCCLIMCTRL_BYPLIMEN_SHIFT 13
#define _EMU_DCDCCLIMCTRL_CLIMBLANKDLY_DEFAULT 0x00000001UL
#define _EMU_DCDCCLIMCTRL_CLIMBLANKDLY_MASK 0x300UL
#define _EMU_DCDCCLIMCTRL_CLIMBLANKDLY_SHIFT 8
#define _EMU_DCDCCLIMCTRL_MASK 0x00002300UL
#define _EMU_DCDCCLIMCTRL_RESETVALUE 0x00000100UL
#define _EMU_DCDCCTRL_DCDCMODE_BYPASS 0x00000000UL
#define _EMU_DCDCCTRL_DCDCMODE_DEFAULT 0x00000003UL
#define _EMU_DCDCCTRL_DCDCMODE_LOWNOISE 0x00000001UL
#define _EMU_DCDCCTRL_DCDCMODE_LOWPOWER 0x00000002UL
#define _EMU_DCDCCTRL_DCDCMODE_MASK 0x3UL
#define _EMU_DCDCCTRL_DCDCMODE_OFF 0x00000003UL
#define _EMU_DCDCCTRL_DCDCMODE_SHIFT 0
#define _EMU_DCDCCTRL_DCDCMODEEM23_DEFAULT 0x00000001UL
#define _EMU_DCDCCTRL_DCDCMODEEM23_EM23LOWPOWER 0x00000001UL
#define _EMU_DCDCCTRL_DCDCMODEEM23_EM23SW 0x00000000UL
#define _EMU_DCDCCTRL_DCDCMODEEM23_MASK 0x10UL
#define _EMU_DCDCCTRL_DCDCMODEEM23_SHIFT 4
#define _EMU_DCDCCTRL_DCDCMODEEM4_DEFAULT 0x00000001UL
#define _EMU_DCDCCTRL_DCDCMODEEM4_EM4LOWPOWER 0x00000001UL
#define _EMU_DCDCCTRL_DCDCMODEEM4_EM4SW 0x00000000UL
#define _EMU_DCDCCTRL_DCDCMODEEM4_MASK 0x20UL
#define _EMU_DCDCCTRL_DCDCMODEEM4_SHIFT 5
#define _EMU_DCDCCTRL_MASK 0x00000033UL
#define _EMU_DCDCCTRL_RESETVALUE 0x00000033UL
#define _EMU_DCDCLNCOMPCTRL_COMPENC1_DEFAULT 0x00000002UL
#define _EMU_DCDCLNCOMPCTRL_COMPENC1_MASK 0x300000UL
#define _EMU_DCDCLNCOMPCTRL_COMPENC1_SHIFT 20
#define _EMU_DCDCLNCOMPCTRL_COMPENC2_DEFAULT 0x00000007UL
#define _EMU_DCDCLNCOMPCTRL_COMPENC2_MASK 0x7000000UL
#define _EMU_DCDCLNCOMPCTRL_COMPENC2_SHIFT 24
#define _EMU_DCDCLNCOMPCTRL_COMPENC3_DEFAULT 0x00000005UL
#define _EMU_DCDCLNCOMPCTRL_COMPENC3_MASK 0xF0000000UL
#define _EMU_DCDCLNCOMPCTRL_COMPENC3_SHIFT 28
#define _EMU_DCDCLNCOMPCTRL_COMPENR1_DEFAULT 0x00000007UL
#define _EMU_DCDCLNCOMPCTRL_COMPENR1_MASK 0x7UL
#define _EMU_DCDCLNCOMPCTRL_COMPENR1_SHIFT 0
#define _EMU_DCDCLNCOMPCTRL_COMPENR2_DEFAULT 0x00000007UL
#define _EMU_DCDCLNCOMPCTRL_COMPENR2_MASK 0x1F0UL
#define _EMU_DCDCLNCOMPCTRL_COMPENR2_SHIFT 4
#define _EMU_DCDCLNCOMPCTRL_COMPENR3_DEFAULT 0x00000004UL
#define _EMU_DCDCLNCOMPCTRL_COMPENR3_MASK 0xF000UL
#define _EMU_DCDCLNCOMPCTRL_COMPENR3_SHIFT 12
#define _EMU_DCDCLNCOMPCTRL_MASK 0xF730F1F7UL
#define _EMU_DCDCLNCOMPCTRL_RESETVALUE 0x57204077UL
#define _EMU_DCDCLNFREQCTRL_MASK 0x1F000007UL
#define _EMU_DCDCLNFREQCTRL_RCOBAND_DEFAULT 0x00000000UL
#define _EMU_DCDCLNFREQCTRL_RCOBAND_MASK 0x7UL
#define _EMU_DCDCLNFREQCTRL_RCOBAND_SHIFT 0
#define _EMU_DCDCLNFREQCTRL_RCOTRIM_DEFAULT 0x00000010UL
#define _EMU_DCDCLNFREQCTRL_RCOTRIM_MASK 0x1F000000UL
#define _EMU_DCDCLNFREQCTRL_RCOTRIM_SHIFT 24
#define _EMU_DCDCLNFREQCTRL_RESETVALUE 0x10000000UL
#define _EMU_DCDCLNVCTRL_LNATT_DEFAULT 0x00000000UL
#define _EMU_DCDCLNVCTRL_LNATT_DIV3 0x00000000UL
#define _EMU_DCDCLNVCTRL_LNATT_DIV6 0x00000001UL
#define _EMU_DCDCLNVCTRL_LNATT_MASK 0x2UL
#define _EMU_DCDCLNVCTRL_LNATT_SHIFT 1
#define _EMU_DCDCLNVCTRL_LNVREF_DEFAULT 0x00000071UL
#define _EMU_DCDCLNVCTRL_LNVREF_MASK 0x7F00UL
#define _EMU_DCDCLNVCTRL_LNVREF_SHIFT 8
#define _EMU_DCDCLNVCTRL_MASK 0x00007F02UL
#define _EMU_DCDCLNVCTRL_RESETVALUE 0x00007100UL
#define _EMU_DCDCLPCTRL_LPBLANK_DEFAULT 0x00000001UL
#define _EMU_DCDCLPCTRL_LPBLANK_MASK 0x6000000UL
#define _EMU_DCDCLPCTRL_LPBLANK_SHIFT 25
#define _EMU_DCDCLPCTRL_LPCMPHYSSELEM234H_DEFAULT 0x00000000UL
#define _EMU_DCDCLPCTRL_LPCMPHYSSELEM234H_MASK 0xF000UL
#define _EMU_DCDCLPCTRL_LPCMPHYSSELEM234H_SHIFT 12
#define _EMU_DCDCLPCTRL_LPVREFDUTYEN_DEFAULT 0x00000001UL
#define _EMU_DCDCLPCTRL_LPVREFDUTYEN_MASK 0x1000000UL
#define _EMU_DCDCLPCTRL_LPVREFDUTYEN_SHIFT 24
#define _EMU_DCDCLPCTRL_MASK 0x0700F000UL
#define _EMU_DCDCLPCTRL_RESETVALUE 0x03000000UL
#define _EMU_DCDCLPEM01CFG_LPCMPBIASEM01_BIAS0 0x00000000UL
#define _EMU_DCDCLPEM01CFG_LPCMPBIASEM01_BIAS1 0x00000001UL
#define _EMU_DCDCLPEM01CFG_LPCMPBIASEM01_BIAS2 0x00000002UL
#define _EMU_DCDCLPEM01CFG_LPCMPBIASEM01_BIAS3 0x00000003UL
#define _EMU_DCDCLPEM01CFG_LPCMPBIASEM01_DEFAULT 0x00000003UL
#define _EMU_DCDCLPEM01CFG_LPCMPBIASEM01_MASK 0x300UL
#define _EMU_DCDCLPEM01CFG_LPCMPBIASEM01_SHIFT 8
#define _EMU_DCDCLPEM01CFG_LPCMPHYSSELEM01_DEFAULT 0x00000000UL
#define _EMU_DCDCLPEM01CFG_LPCMPHYSSELEM01_MASK 0xF000UL
#define _EMU_DCDCLPEM01CFG_LPCMPHYSSELEM01_SHIFT 12
#define _EMU_DCDCLPEM01CFG_MASK 0x0000F300UL
#define _EMU_DCDCLPEM01CFG_RESETVALUE 0x00000300UL
#define _EMU_DCDCLPVCTRL_LPATT_DEFAULT 0x00000000UL
#define _EMU_DCDCLPVCTRL_LPATT_DIV4 0x00000000UL
#define _EMU_DCDCLPVCTRL_LPATT_DIV8 0x00000001UL
#define _EMU_DCDCLPVCTRL_LPATT_MASK 0x1UL
#define _EMU_DCDCLPVCTRL_LPATT_SHIFT 0
#define _EMU_DCDCLPVCTRL_LPVREF_DEFAULT 0x000000B4UL
#define _EMU_DCDCLPVCTRL_LPVREF_MASK 0x1FEUL
#define _EMU_DCDCLPVCTRL_LPVREF_SHIFT 1
#define _EMU_DCDCLPVCTRL_MASK 0x000001FFUL
#define _EMU_DCDCLPVCTRL_RESETVALUE 0x00000168UL
#define _EMU_DCDCMISCCTRL_BYPLIMSEL_DEFAULT 0x00000000UL
#define _EMU_DCDCMISCCTRL_BYPLIMSEL_MASK 0xF0000UL
#define _EMU_DCDCMISCCTRL_BYPLIMSEL_SHIFT 16
#define _EMU_DCDCMISCCTRL_LNCLIMILIMSEL_DEFAULT 0x00000003UL
#define _EMU_DCDCMISCCTRL_LNCLIMILIMSEL_MASK 0x7000000UL
#define _EMU_DCDCMISCCTRL_LNCLIMILIMSEL_SHIFT 24
#define _EMU_DCDCMISCCTRL_LNFORCECCM_DEFAULT 0x00000000UL
#define _EMU_DCDCMISCCTRL_LNFORCECCM_MASK 0x1UL
#define _EMU_DCDCMISCCTRL_LNFORCECCM_SHIFT 0
#define _EMU_DCDCMISCCTRL_LNFORCECCMIMM_DEFAULT 0x00000000UL
#define _EMU_DCDCMISCCTRL_LNFORCECCMIMM_MASK 0x20UL
#define _EMU_DCDCMISCCTRL_LNFORCECCMIMM_SHIFT 5
#define _EMU_DCDCMISCCTRL_LPCLIMILIMSEL_DEFAULT 0x00000001UL
#define _EMU_DCDCMISCCTRL_LPCLIMILIMSEL_MASK 0x700000UL
#define _EMU_DCDCMISCCTRL_LPCLIMILIMSEL_SHIFT 20
#define _EMU_DCDCMISCCTRL_LPCMPBIASEM234H_BIAS0 0x00000000UL
#define _EMU_DCDCMISCCTRL_LPCMPBIASEM234H_BIAS1 0x00000001UL
#define _EMU_DCDCMISCCTRL_LPCMPBIASEM234H_BIAS2 0x00000002UL
#define _EMU_DCDCMISCCTRL_LPCMPBIASEM234H_BIAS3 0x00000003UL
#define _EMU_DCDCMISCCTRL_LPCMPBIASEM234H_DEFAULT 0x00000000UL
#define _EMU_DCDCMISCCTRL_LPCMPBIASEM234H_MASK 0x30000000UL
#define _EMU_DCDCMISCCTRL_LPCMPBIASEM234H_SHIFT 28
#define _EMU_DCDCMISCCTRL_LPCMPHYSDIS_DEFAULT 0x00000001UL
#define _EMU_DCDCMISCCTRL_LPCMPHYSDIS_MASK 0x2UL
#define _EMU_DCDCMISCCTRL_LPCMPHYSDIS_SHIFT 1
#define _EMU_DCDCMISCCTRL_LPCMPHYSHI_DEFAULT 0x00000001UL
#define _EMU_DCDCMISCCTRL_LPCMPHYSHI_MASK 0x4UL
#define _EMU_DCDCMISCCTRL_LPCMPHYSHI_SHIFT 2
#define _EMU_DCDCMISCCTRL_MASK 0x377FFF27UL
#define _EMU_DCDCMISCCTRL_NFETCNT_DEFAULT 0x00000007UL
#define _EMU_DCDCMISCCTRL_NFETCNT_MASK 0xF000UL
#define _EMU_DCDCMISCCTRL_NFETCNT_SHIFT 12
#define _EMU_DCDCMISCCTRL_PFETCNT_DEFAULT 0x00000007UL
#define _EMU_DCDCMISCCTRL_PFETCNT_MASK 0xF00UL
#define _EMU_DCDCMISCCTRL_PFETCNT_SHIFT 8
#define _EMU_DCDCMISCCTRL_RESETVALUE 0x03107706UL
#define _EMU_DCDCSYNC_DCDCCTRLBUSY_DEFAULT 0x00000000UL
#define _EMU_DCDCSYNC_DCDCCTRLBUSY_MASK 0x1UL
#define _EMU_DCDCSYNC_DCDCCTRLBUSY_SHIFT 0
#define _EMU_DCDCSYNC_MASK 0x00000001UL
#define _EMU_DCDCSYNC_RESETVALUE 0x00000000UL
#define _EMU_DCDCZDETCTRL_MASK 0x00000370UL
#define _EMU_DCDCZDETCTRL_RESETVALUE 0x00000150UL
#define _EMU_DCDCZDETCTRL_ZDETBLANKDLY_DEFAULT 0x00000001UL
#define _EMU_DCDCZDETCTRL_ZDETBLANKDLY_MASK 0x300UL
#define _EMU_DCDCZDETCTRL_ZDETBLANKDLY_SHIFT 8
#define _EMU_DCDCZDETCTRL_ZDETILIMSEL_DEFAULT 0x00000005UL
#define _EMU_DCDCZDETCTRL_ZDETILIMSEL_MASK 0x70UL
#define _EMU_DCDCZDETCTRL_ZDETILIMSEL_SHIFT 4
#define _EMU_EM23PERNORETAINCMD_ACMP0UNLOCK_DEFAULT 0x00000000UL
#define _EMU_EM23PERNORETAINCMD_ACMP0UNLOCK_MASK 0x1UL
#define _EMU_EM23PERNORETAINCMD_ACMP0UNLOCK_SHIFT 0
#define _EMU_EM23PERNORETAINCMD_ACMP1UNLOCK_DEFAULT 0x00000000UL
#define _EMU_EM23PERNORETAINCMD_ACMP1UNLOCK_MASK 0x2UL
#define _EMU_EM23PERNORETAINCMD_ACMP1UNLOCK_SHIFT 1
#define _EMU_EM23PERNORETAINCMD_ACMP2UNLOCK_DEFAULT 0x00000000UL
#define _EMU_EM23PERNORETAINCMD_ACMP2UNLOCK_MASK 0x200000UL
#define _EMU_EM23PERNORETAINCMD_ACMP2UNLOCK_SHIFT 21
#define _EMU_EM23PERNORETAINCMD_ACMP3UNLOCK_DEFAULT 0x00000000UL
#define _EMU_EM23PERNORETAINCMD_ACMP3UNLOCK_MASK 0x400000UL
#define _EMU_EM23PERNORETAINCMD_ACMP3UNLOCK_SHIFT 22
#define _EMU_EM23PERNORETAINCMD_ADC0UNLOCK_DEFAULT 0x00000000UL
#define _EMU_EM23PERNORETAINCMD_ADC0UNLOCK_MASK 0x200UL
#define _EMU_EM23PERNORETAINCMD_ADC0UNLOCK_SHIFT 9
#define _EMU_EM23PERNORETAINCMD_ADC1UNLOCK_DEFAULT 0x00000000UL
#define _EMU_EM23PERNORETAINCMD_ADC1UNLOCK_MASK 0x100000UL
#define _EMU_EM23PERNORETAINCMD_ADC1UNLOCK_SHIFT 20
#define _EMU_EM23PERNORETAINCMD_CSENUNLOCK_DEFAULT 0x00000000UL
#define _EMU_EM23PERNORETAINCMD_CSENUNLOCK_MASK 0x4000UL
#define _EMU_EM23PERNORETAINCMD_CSENUNLOCK_SHIFT 14
#define _EMU_EM23PERNORETAINCMD_DAC0UNLOCK_DEFAULT 0x00000000UL
#define _EMU_EM23PERNORETAINCMD_DAC0UNLOCK_MASK 0x80UL
#define _EMU_EM23PERNORETAINCMD_DAC0UNLOCK_SHIFT 7
#define _EMU_EM23PERNORETAINCMD_I2C0UNLOCK_DEFAULT 0x00000000UL
#define _EMU_EM23PERNORETAINCMD_I2C0UNLOCK_MASK 0x20UL
#define _EMU_EM23PERNORETAINCMD_I2C0UNLOCK_SHIFT 5
#define _EMU_EM23PERNORETAINCMD_I2C1UNLOCK_DEFAULT 0x00000000UL
#define _EMU_EM23PERNORETAINCMD_I2C1UNLOCK_MASK 0x40UL
#define _EMU_EM23PERNORETAINCMD_I2C1UNLOCK_SHIFT 6
#define _EMU_EM23PERNORETAINCMD_I2C2UNLOCK_DEFAULT 0x00000000UL
#define _EMU_EM23PERNORETAINCMD_I2C2UNLOCK_MASK 0x80000UL
#define _EMU_EM23PERNORETAINCMD_I2C2UNLOCK_SHIFT 19
#define _EMU_EM23PERNORETAINCMD_IDAC0UNLOCK_DEFAULT 0x00000000UL
#define _EMU_EM23PERNORETAINCMD_IDAC0UNLOCK_MASK 0x100UL
#define _EMU_EM23PERNORETAINCMD_IDAC0UNLOCK_SHIFT 8
#define _EMU_EM23PERNORETAINCMD_LCDUNLOCK_DEFAULT 0x00000000UL
#define _EMU_EM23PERNORETAINCMD_LCDUNLOCK_MASK 0x20000UL
#define _EMU_EM23PERNORETAINCMD_LCDUNLOCK_SHIFT 17
#define _EMU_EM23PERNORETAINCMD_LESENSE0UNLOCK_DEFAULT 0x00000000UL
#define _EMU_EM23PERNORETAINCMD_LESENSE0UNLOCK_MASK 0x2000UL
#define _EMU_EM23PERNORETAINCMD_LESENSE0UNLOCK_SHIFT 13
#define _EMU_EM23PERNORETAINCMD_LETIMER0UNLOCK_DEFAULT 0x00000000UL
#define _EMU_EM23PERNORETAINCMD_LETIMER0UNLOCK_MASK 0x400UL
#define _EMU_EM23PERNORETAINCMD_LETIMER0UNLOCK_SHIFT 10
#define _EMU_EM23PERNORETAINCMD_LETIMER1UNLOCK_DEFAULT 0x00000000UL
#define _EMU_EM23PERNORETAINCMD_LETIMER1UNLOCK_MASK 0x40000UL
#define _EMU_EM23PERNORETAINCMD_LETIMER1UNLOCK_SHIFT 18
#define _EMU_EM23PERNORETAINCMD_LEUART0UNLOCK_DEFAULT 0x00000000UL
#define _EMU_EM23PERNORETAINCMD_LEUART0UNLOCK_MASK 0x8000UL
#define _EMU_EM23PERNORETAINCMD_LEUART0UNLOCK_SHIFT 15
#define _EMU_EM23PERNORETAINCMD_LEUART1UNLOCK_DEFAULT 0x00000000UL
#define _EMU_EM23PERNORETAINCMD_LEUART1UNLOCK_MASK 0x10000UL
#define _EMU_EM23PERNORETAINCMD_LEUART1UNLOCK_SHIFT 16
#define _EMU_EM23PERNORETAINCMD_MASK 0x01FFFFFFUL
#define _EMU_EM23PERNORETAINCMD_PCNT0UNLOCK_DEFAULT 0x00000000UL
#define _EMU_EM23PERNORETAINCMD_PCNT0UNLOCK_MASK 0x4UL
#define _EMU_EM23PERNORETAINCMD_PCNT0UNLOCK_SHIFT 2
#define _EMU_EM23PERNORETAINCMD_PCNT1UNLOCK_DEFAULT 0x00000000UL
#define _EMU_EM23PERNORETAINCMD_PCNT1UNLOCK_MASK 0x8UL
#define _EMU_EM23PERNORETAINCMD_PCNT1UNLOCK_SHIFT 3
#define _EMU_EM23PERNORETAINCMD_PCNT2UNLOCK_DEFAULT 0x00000000UL
#define _EMU_EM23PERNORETAINCMD_PCNT2UNLOCK_MASK 0x10UL
#define _EMU_EM23PERNORETAINCMD_PCNT2UNLOCK_SHIFT 4
#define _EMU_EM23PERNORETAINCMD_RESETVALUE 0x00000000UL
#define _EMU_EM23PERNORETAINCMD_RTCUNLOCK_DEFAULT 0x00000000UL
#define _EMU_EM23PERNORETAINCMD_RTCUNLOCK_MASK 0x800000UL
#define _EMU_EM23PERNORETAINCMD_RTCUNLOCK_SHIFT 23
#define _EMU_EM23PERNORETAINCMD_USBUNLOCK_DEFAULT 0x00000000UL
#define _EMU_EM23PERNORETAINCMD_USBUNLOCK_MASK 0x1000000UL
#define _EMU_EM23PERNORETAINCMD_USBUNLOCK_SHIFT 24
#define _EMU_EM23PERNORETAINCMD_WDOG0UNLOCK_DEFAULT 0x00000000UL
#define _EMU_EM23PERNORETAINCMD_WDOG0UNLOCK_MASK 0x800UL
#define _EMU_EM23PERNORETAINCMD_WDOG0UNLOCK_SHIFT 11
#define _EMU_EM23PERNORETAINCMD_WDOG1UNLOCK_DEFAULT 0x00000000UL
#define _EMU_EM23PERNORETAINCMD_WDOG1UNLOCK_MASK 0x1000UL
#define _EMU_EM23PERNORETAINCMD_WDOG1UNLOCK_SHIFT 12
#define _EMU_EM23PERNORETAINCTRL_ACMP0DIS_DEFAULT 0x00000000UL
#define _EMU_EM23PERNORETAINCTRL_ACMP0DIS_MASK 0x1UL
#define _EMU_EM23PERNORETAINCTRL_ACMP0DIS_SHIFT 0
#define _EMU_EM23PERNORETAINCTRL_ACMP1DIS_DEFAULT 0x00000000UL
#define _EMU_EM23PERNORETAINCTRL_ACMP1DIS_MASK 0x2UL
#define _EMU_EM23PERNORETAINCTRL_ACMP1DIS_SHIFT 1
#define _EMU_EM23PERNORETAINCTRL_ACMP2DIS_DEFAULT 0x00000000UL
#define _EMU_EM23PERNORETAINCTRL_ACMP2DIS_MASK 0x200000UL
#define _EMU_EM23PERNORETAINCTRL_ACMP2DIS_SHIFT 21
#define _EMU_EM23PERNORETAINCTRL_ACMP3DIS_DEFAULT 0x00000000UL
#define _EMU_EM23PERNORETAINCTRL_ACMP3DIS_MASK 0x400000UL
#define _EMU_EM23PERNORETAINCTRL_ACMP3DIS_SHIFT 22
#define _EMU_EM23PERNORETAINCTRL_ADC0DIS_DEFAULT 0x00000000UL
#define _EMU_EM23PERNORETAINCTRL_ADC0DIS_MASK 0x200UL
#define _EMU_EM23PERNORETAINCTRL_ADC0DIS_SHIFT 9
#define _EMU_EM23PERNORETAINCTRL_ADC1DIS_DEFAULT 0x00000000UL
#define _EMU_EM23PERNORETAINCTRL_ADC1DIS_MASK 0x100000UL
#define _EMU_EM23PERNORETAINCTRL_ADC1DIS_SHIFT 20
#define _EMU_EM23PERNORETAINCTRL_CSENDIS_DEFAULT 0x00000000UL
#define _EMU_EM23PERNORETAINCTRL_CSENDIS_MASK 0x4000UL
#define _EMU_EM23PERNORETAINCTRL_CSENDIS_SHIFT 14
#define _EMU_EM23PERNORETAINCTRL_DAC0DIS_DEFAULT 0x00000000UL
#define _EMU_EM23PERNORETAINCTRL_DAC0DIS_MASK 0x80UL
#define _EMU_EM23PERNORETAINCTRL_DAC0DIS_SHIFT 7
#define _EMU_EM23PERNORETAINCTRL_I2C0DIS_DEFAULT 0x00000000UL
#define _EMU_EM23PERNORETAINCTRL_I2C0DIS_MASK 0x20UL
#define _EMU_EM23PERNORETAINCTRL_I2C0DIS_SHIFT 5
#define _EMU_EM23PERNORETAINCTRL_I2C1DIS_DEFAULT 0x00000000UL
#define _EMU_EM23PERNORETAINCTRL_I2C1DIS_MASK 0x40UL
#define _EMU_EM23PERNORETAINCTRL_I2C1DIS_SHIFT 6
#define _EMU_EM23PERNORETAINCTRL_I2C2DIS_DEFAULT 0x00000000UL
#define _EMU_EM23PERNORETAINCTRL_I2C2DIS_MASK 0x80000UL
#define _EMU_EM23PERNORETAINCTRL_I2C2DIS_SHIFT 19
#define _EMU_EM23PERNORETAINCTRL_IDAC0DIS_DEFAULT 0x00000000UL
#define _EMU_EM23PERNORETAINCTRL_IDAC0DIS_MASK 0x100UL
#define _EMU_EM23PERNORETAINCTRL_IDAC0DIS_SHIFT 8
#define _EMU_EM23PERNORETAINCTRL_LCDDIS_DEFAULT 0x00000000UL
#define _EMU_EM23PERNORETAINCTRL_LCDDIS_MASK 0x20000UL
#define _EMU_EM23PERNORETAINCTRL_LCDDIS_SHIFT 17
#define _EMU_EM23PERNORETAINCTRL_LESENSE0DIS_DEFAULT 0x00000000UL
#define _EMU_EM23PERNORETAINCTRL_LESENSE0DIS_MASK 0x2000UL
#define _EMU_EM23PERNORETAINCTRL_LESENSE0DIS_SHIFT 13
#define _EMU_EM23PERNORETAINCTRL_LETIMER0DIS_DEFAULT 0x00000000UL
#define _EMU_EM23PERNORETAINCTRL_LETIMER0DIS_MASK 0x400UL
#define _EMU_EM23PERNORETAINCTRL_LETIMER0DIS_SHIFT 10
#define _EMU_EM23PERNORETAINCTRL_LETIMER1DIS_DEFAULT 0x00000000UL
#define _EMU_EM23PERNORETAINCTRL_LETIMER1DIS_MASK 0x40000UL
#define _EMU_EM23PERNORETAINCTRL_LETIMER1DIS_SHIFT 18
#define _EMU_EM23PERNORETAINCTRL_LEUART0DIS_DEFAULT 0x00000000UL
#define _EMU_EM23PERNORETAINCTRL_LEUART0DIS_MASK 0x8000UL
#define _EMU_EM23PERNORETAINCTRL_LEUART0DIS_SHIFT 15
#define _EMU_EM23PERNORETAINCTRL_LEUART1DIS_DEFAULT 0x00000000UL
#define _EMU_EM23PERNORETAINCTRL_LEUART1DIS_MASK 0x10000UL
#define _EMU_EM23PERNORETAINCTRL_LEUART1DIS_SHIFT 16
#define _EMU_EM23PERNORETAINCTRL_MASK 0x01FFFFFFUL
#define _EMU_EM23PERNORETAINCTRL_PCNT0DIS_DEFAULT 0x00000000UL
#define _EMU_EM23PERNORETAINCTRL_PCNT0DIS_MASK 0x4UL
#define _EMU_EM23PERNORETAINCTRL_PCNT0DIS_SHIFT 2
#define _EMU_EM23PERNORETAINCTRL_PCNT1DIS_DEFAULT 0x00000000UL
#define _EMU_EM23PERNORETAINCTRL_PCNT1DIS_MASK 0x8UL
#define _EMU_EM23PERNORETAINCTRL_PCNT1DIS_SHIFT 3
#define _EMU_EM23PERNORETAINCTRL_PCNT2DIS_DEFAULT 0x00000000UL
#define _EMU_EM23PERNORETAINCTRL_PCNT2DIS_MASK 0x10UL
#define _EMU_EM23PERNORETAINCTRL_PCNT2DIS_SHIFT 4
#define _EMU_EM23PERNORETAINCTRL_RESETVALUE 0x00000000UL
#define _EMU_EM23PERNORETAINCTRL_RTCDIS_DEFAULT 0x00000000UL
#define _EMU_EM23PERNORETAINCTRL_RTCDIS_MASK 0x800000UL
#define _EMU_EM23PERNORETAINCTRL_RTCDIS_SHIFT 23
#define _EMU_EM23PERNORETAINCTRL_USBDIS_DEFAULT 0x00000000UL
#define _EMU_EM23PERNORETAINCTRL_USBDIS_MASK 0x1000000UL
#define _EMU_EM23PERNORETAINCTRL_USBDIS_SHIFT 24
#define _EMU_EM23PERNORETAINCTRL_WDOG0DIS_DEFAULT 0x00000000UL
#define _EMU_EM23PERNORETAINCTRL_WDOG0DIS_MASK 0x800UL
#define _EMU_EM23PERNORETAINCTRL_WDOG0DIS_SHIFT 11
#define _EMU_EM23PERNORETAINCTRL_WDOG1DIS_DEFAULT 0x00000000UL
#define _EMU_EM23PERNORETAINCTRL_WDOG1DIS_MASK 0x1000UL
#define _EMU_EM23PERNORETAINCTRL_WDOG1DIS_SHIFT 12
#define _EMU_EM23PERNORETAINSTATUS_ACMP0LOCKED_DEFAULT 0x00000000UL
#define _EMU_EM23PERNORETAINSTATUS_ACMP0LOCKED_MASK 0x1UL
#define _EMU_EM23PERNORETAINSTATUS_ACMP0LOCKED_SHIFT 0
#define _EMU_EM23PERNORETAINSTATUS_ACMP1LOCKED_DEFAULT 0x00000000UL
#define _EMU_EM23PERNORETAINSTATUS_ACMP1LOCKED_MASK 0x2UL
#define _EMU_EM23PERNORETAINSTATUS_ACMP1LOCKED_SHIFT 1
#define _EMU_EM23PERNORETAINSTATUS_ACMP2LOCKED_DEFAULT 0x00000000UL
#define _EMU_EM23PERNORETAINSTATUS_ACMP2LOCKED_MASK 0x200000UL
#define _EMU_EM23PERNORETAINSTATUS_ACMP2LOCKED_SHIFT 21
#define _EMU_EM23PERNORETAINSTATUS_ACMP3LOCKED_DEFAULT 0x00000000UL
#define _EMU_EM23PERNORETAINSTATUS_ACMP3LOCKED_MASK 0x400000UL
#define _EMU_EM23PERNORETAINSTATUS_ACMP3LOCKED_SHIFT 22
#define _EMU_EM23PERNORETAINSTATUS_ADC0LOCKED_DEFAULT 0x00000000UL
#define _EMU_EM23PERNORETAINSTATUS_ADC0LOCKED_MASK 0x200UL
#define _EMU_EM23PERNORETAINSTATUS_ADC0LOCKED_SHIFT 9
#define _EMU_EM23PERNORETAINSTATUS_ADC1LOCKED_DEFAULT 0x00000000UL
#define _EMU_EM23PERNORETAINSTATUS_ADC1LOCKED_MASK 0x100000UL
#define _EMU_EM23PERNORETAINSTATUS_ADC1LOCKED_SHIFT 20
#define _EMU_EM23PERNORETAINSTATUS_CSENLOCKED_DEFAULT 0x00000000UL
#define _EMU_EM23PERNORETAINSTATUS_CSENLOCKED_MASK 0x4000UL
#define _EMU_EM23PERNORETAINSTATUS_CSENLOCKED_SHIFT 14
#define _EMU_EM23PERNORETAINSTATUS_DAC0LOCKED_DEFAULT 0x00000000UL
#define _EMU_EM23PERNORETAINSTATUS_DAC0LOCKED_MASK 0x80UL
#define _EMU_EM23PERNORETAINSTATUS_DAC0LOCKED_SHIFT 7
#define _EMU_EM23PERNORETAINSTATUS_I2C0LOCKED_DEFAULT 0x00000000UL
#define _EMU_EM23PERNORETAINSTATUS_I2C0LOCKED_MASK 0x20UL
#define _EMU_EM23PERNORETAINSTATUS_I2C0LOCKED_SHIFT 5
#define _EMU_EM23PERNORETAINSTATUS_I2C1LOCKED_DEFAULT 0x00000000UL
#define _EMU_EM23PERNORETAINSTATUS_I2C1LOCKED_MASK 0x40UL
#define _EMU_EM23PERNORETAINSTATUS_I2C1LOCKED_SHIFT 6
#define _EMU_EM23PERNORETAINSTATUS_I2C2LOCKED_DEFAULT 0x00000000UL
#define _EMU_EM23PERNORETAINSTATUS_I2C2LOCKED_MASK 0x80000UL
#define _EMU_EM23PERNORETAINSTATUS_I2C2LOCKED_SHIFT 19
#define _EMU_EM23PERNORETAINSTATUS_IDAC0LOCKED_DEFAULT 0x00000000UL
#define _EMU_EM23PERNORETAINSTATUS_IDAC0LOCKED_MASK 0x100UL
#define _EMU_EM23PERNORETAINSTATUS_IDAC0LOCKED_SHIFT 8
#define _EMU_EM23PERNORETAINSTATUS_LCDLOCKED_DEFAULT 0x00000000UL
#define _EMU_EM23PERNORETAINSTATUS_LCDLOCKED_MASK 0x20000UL
#define _EMU_EM23PERNORETAINSTATUS_LCDLOCKED_SHIFT 17
#define _EMU_EM23PERNORETAINSTATUS_LESENSE0LOCKED_DEFAULT 0x00000000UL
#define _EMU_EM23PERNORETAINSTATUS_LESENSE0LOCKED_MASK 0x2000UL
#define _EMU_EM23PERNORETAINSTATUS_LESENSE0LOCKED_SHIFT 13
#define _EMU_EM23PERNORETAINSTATUS_LETIMER0LOCKED_DEFAULT 0x00000000UL
#define _EMU_EM23PERNORETAINSTATUS_LETIMER0LOCKED_MASK 0x400UL
#define _EMU_EM23PERNORETAINSTATUS_LETIMER0LOCKED_SHIFT 10
#define _EMU_EM23PERNORETAINSTATUS_LETIMER1LOCKED_DEFAULT 0x00000000UL
#define _EMU_EM23PERNORETAINSTATUS_LETIMER1LOCKED_MASK 0x40000UL
#define _EMU_EM23PERNORETAINSTATUS_LETIMER1LOCKED_SHIFT 18
#define _EMU_EM23PERNORETAINSTATUS_LEUART0LOCKED_DEFAULT 0x00000000UL
#define _EMU_EM23PERNORETAINSTATUS_LEUART0LOCKED_MASK 0x8000UL
#define _EMU_EM23PERNORETAINSTATUS_LEUART0LOCKED_SHIFT 15
#define _EMU_EM23PERNORETAINSTATUS_LEUART1LOCKED_DEFAULT 0x00000000UL
#define _EMU_EM23PERNORETAINSTATUS_LEUART1LOCKED_MASK 0x10000UL
#define _EMU_EM23PERNORETAINSTATUS_LEUART1LOCKED_SHIFT 16
#define _EMU_EM23PERNORETAINSTATUS_MASK 0x01FFFFFFUL
#define _EMU_EM23PERNORETAINSTATUS_PCNT0LOCKED_DEFAULT 0x00000000UL
#define _EMU_EM23PERNORETAINSTATUS_PCNT0LOCKED_MASK 0x4UL
#define _EMU_EM23PERNORETAINSTATUS_PCNT0LOCKED_SHIFT 2
#define _EMU_EM23PERNORETAINSTATUS_PCNT1LOCKED_DEFAULT 0x00000000UL
#define _EMU_EM23PERNORETAINSTATUS_PCNT1LOCKED_MASK 0x8UL
#define _EMU_EM23PERNORETAINSTATUS_PCNT1LOCKED_SHIFT 3
#define _EMU_EM23PERNORETAINSTATUS_PCNT2LOCKED_DEFAULT 0x00000000UL
#define _EMU_EM23PERNORETAINSTATUS_PCNT2LOCKED_MASK 0x10UL
#define _EMU_EM23PERNORETAINSTATUS_PCNT2LOCKED_SHIFT 4
#define _EMU_EM23PERNORETAINSTATUS_RESETVALUE 0x00000000UL
#define _EMU_EM23PERNORETAINSTATUS_RTCLOCKED_DEFAULT 0x00000000UL
#define _EMU_EM23PERNORETAINSTATUS_RTCLOCKED_MASK 0x800000UL
#define _EMU_EM23PERNORETAINSTATUS_RTCLOCKED_SHIFT 23
#define _EMU_EM23PERNORETAINSTATUS_USBLOCKED_DEFAULT 0x00000000UL
#define _EMU_EM23PERNORETAINSTATUS_USBLOCKED_MASK 0x1000000UL
#define _EMU_EM23PERNORETAINSTATUS_USBLOCKED_SHIFT 24
#define _EMU_EM23PERNORETAINSTATUS_WDOG0LOCKED_DEFAULT 0x00000000UL
#define _EMU_EM23PERNORETAINSTATUS_WDOG0LOCKED_MASK 0x800UL
#define _EMU_EM23PERNORETAINSTATUS_WDOG0LOCKED_SHIFT 11
#define _EMU_EM23PERNORETAINSTATUS_WDOG1LOCKED_DEFAULT 0x00000000UL
#define _EMU_EM23PERNORETAINSTATUS_WDOG1LOCKED_MASK 0x1000UL
#define _EMU_EM23PERNORETAINSTATUS_WDOG1LOCKED_SHIFT 12
#define _EMU_EM4CTRL_EM4ENTRY_DEFAULT 0x00000000UL
#define _EMU_EM4CTRL_EM4ENTRY_MASK 0x30000UL
#define _EMU_EM4CTRL_EM4ENTRY_SHIFT 16
#define _EMU_EM4CTRL_EM4IORETMODE_DEFAULT 0x00000000UL
#define _EMU_EM4CTRL_EM4IORETMODE_DISABLE 0x00000000UL
#define _EMU_EM4CTRL_EM4IORETMODE_EM4EXIT 0x00000001UL
#define _EMU_EM4CTRL_EM4IORETMODE_MASK 0x30UL
#define _EMU_EM4CTRL_EM4IORETMODE_SHIFT 4
#define _EMU_EM4CTRL_EM4IORETMODE_SWUNLATCH 0x00000002UL
#define _EMU_EM4CTRL_EM4STATE_DEFAULT 0x00000000UL
#define _EMU_EM4CTRL_EM4STATE_EM4H 0x00000001UL
#define _EMU_EM4CTRL_EM4STATE_EM4S 0x00000000UL
#define _EMU_EM4CTRL_EM4STATE_MASK 0x1UL
#define _EMU_EM4CTRL_EM4STATE_SHIFT 0
#define _EMU_EM4CTRL_MASK 0x0003003FUL
#define _EMU_EM4CTRL_RESETVALUE 0x00000000UL
#define _EMU_EM4CTRL_RETAINLFRCO_DEFAULT 0x00000000UL
#define _EMU_EM4CTRL_RETAINLFRCO_MASK 0x2UL
#define _EMU_EM4CTRL_RETAINLFRCO_SHIFT 1
#define _EMU_EM4CTRL_RETAINLFXO_DEFAULT 0x00000000UL
#define _EMU_EM4CTRL_RETAINLFXO_MASK 0x4UL
#define _EMU_EM4CTRL_RETAINLFXO_SHIFT 2
#define _EMU_EM4CTRL_RETAINULFRCO_DEFAULT 0x00000000UL
#define _EMU_EM4CTRL_RETAINULFRCO_MASK 0x8UL
#define _EMU_EM4CTRL_RETAINULFRCO_SHIFT 3
#define _EMU_IEN_BURDY_DEFAULT 0x00000000UL
#define _EMU_IEN_BURDY_MASK 0x400000UL
#define _EMU_IEN_BURDY_SHIFT 22
#define _EMU_IEN_DCDCINBYPASS_DEFAULT 0x00000000UL
#define _EMU_IEN_DCDCINBYPASS_MASK 0x100000UL
#define _EMU_IEN_DCDCINBYPASS_SHIFT 20
#define _EMU_IEN_DCDCLNRUNNING_DEFAULT 0x00000000UL
#define _EMU_IEN_DCDCLNRUNNING_MASK 0x80000UL
#define _EMU_IEN_DCDCLNRUNNING_SHIFT 19
#define _EMU_IEN_DCDCLPRUNNING_DEFAULT 0x00000000UL
#define _EMU_IEN_DCDCLPRUNNING_MASK 0x40000UL
#define _EMU_IEN_DCDCLPRUNNING_SHIFT 18
#define _EMU_IEN_EM23WAKEUP_DEFAULT 0x00000000UL
#define _EMU_IEN_EM23WAKEUP_MASK 0x1000000UL
#define _EMU_IEN_EM23WAKEUP_SHIFT 24
#define _EMU_IEN_MASK 0xE3DF37FFUL
#define _EMU_IEN_NFETOVERCURRENTLIMIT_DEFAULT 0x00000000UL
#define _EMU_IEN_NFETOVERCURRENTLIMIT_MASK 0x20000UL
#define _EMU_IEN_NFETOVERCURRENTLIMIT_SHIFT 17
#define _EMU_IEN_PFETOVERCURRENTLIMIT_DEFAULT 0x00000000UL
#define _EMU_IEN_PFETOVERCURRENTLIMIT_MASK 0x10000UL
#define _EMU_IEN_PFETOVERCURRENTLIMIT_SHIFT 16
#define _EMU_IEN_R5VREADY_DEFAULT 0x00000000UL
#define _EMU_IEN_R5VREADY_MASK 0x400UL
#define _EMU_IEN_R5VREADY_SHIFT 10
#define _EMU_IEN_R5VVSINT_DEFAULT 0x00000000UL
#define _EMU_IEN_R5VVSINT_MASK 0x800000UL
#define _EMU_IEN_R5VVSINT_SHIFT 23
#define _EMU_IEN_RESETVALUE 0x00000000UL
#define _EMU_IEN_TEMP_DEFAULT 0x00000000UL
#define _EMU_IEN_TEMP_MASK 0x20000000UL
#define _EMU_IEN_TEMP_SHIFT 29
#define _EMU_IEN_TEMPHIGH_DEFAULT 0x00000000UL
#define _EMU_IEN_TEMPHIGH_MASK 0x80000000UL
#define _EMU_IEN_TEMPHIGH_SHIFT 31
#define _EMU_IEN_TEMPLOW_DEFAULT 0x00000000UL
#define _EMU_IEN_TEMPLOW_MASK 0x40000000UL
#define _EMU_IEN_TEMPLOW_SHIFT 30
#define _EMU_IEN_VMONALTAVDDFALL_DEFAULT 0x00000000UL
#define _EMU_IEN_VMONALTAVDDFALL_MASK 0x4UL
#define _EMU_IEN_VMONALTAVDDFALL_SHIFT 2
#define _EMU_IEN_VMONALTAVDDRISE_DEFAULT 0x00000000UL
#define _EMU_IEN_VMONALTAVDDRISE_MASK 0x8UL
#define _EMU_IEN_VMONALTAVDDRISE_SHIFT 3
#define _EMU_IEN_VMONAVDDFALL_DEFAULT 0x00000000UL
#define _EMU_IEN_VMONAVDDFALL_MASK 0x1UL
#define _EMU_IEN_VMONAVDDFALL_SHIFT 0
#define _EMU_IEN_VMONAVDDRISE_DEFAULT 0x00000000UL
#define _EMU_IEN_VMONAVDDRISE_MASK 0x2UL
#define _EMU_IEN_VMONAVDDRISE_SHIFT 1
#define _EMU_IEN_VMONBUVDDFALL_DEFAULT 0x00000000UL
#define _EMU_IEN_VMONBUVDDFALL_MASK 0x1000UL
#define _EMU_IEN_VMONBUVDDFALL_SHIFT 12
#define _EMU_IEN_VMONBUVDDRISE_DEFAULT 0x00000000UL
#define _EMU_IEN_VMONBUVDDRISE_MASK 0x2000UL
#define _EMU_IEN_VMONBUVDDRISE_SHIFT 13
#define _EMU_IEN_VMONDVDDFALL_DEFAULT 0x00000000UL
#define _EMU_IEN_VMONDVDDFALL_MASK 0x10UL
#define _EMU_IEN_VMONDVDDFALL_SHIFT 4
#define _EMU_IEN_VMONDVDDRISE_DEFAULT 0x00000000UL
#define _EMU_IEN_VMONDVDDRISE_MASK 0x20UL
#define _EMU_IEN_VMONDVDDRISE_SHIFT 5
#define _EMU_IEN_VMONIO0FALL_DEFAULT 0x00000000UL
#define _EMU_IEN_VMONIO0FALL_MASK 0x40UL
#define _EMU_IEN_VMONIO0FALL_SHIFT 6
#define _EMU_IEN_VMONIO0RISE_DEFAULT 0x00000000UL
#define _EMU_IEN_VMONIO0RISE_MASK 0x80UL
#define _EMU_IEN_VMONIO0RISE_SHIFT 7
#define _EMU_IEN_VMONIO1FALL_DEFAULT 0x00000000UL
#define _EMU_IEN_VMONIO1FALL_MASK 0x100UL
#define _EMU_IEN_VMONIO1FALL_SHIFT 8
#define _EMU_IEN_VMONIO1RISE_DEFAULT 0x00000000UL
#define _EMU_IEN_VMONIO1RISE_MASK 0x200UL
#define _EMU_IEN_VMONIO1RISE_SHIFT 9
#define _EMU_IEN_VSCALEDONE_DEFAULT 0x00000000UL
#define _EMU_IEN_VSCALEDONE_MASK 0x2000000UL
#define _EMU_IEN_VSCALEDONE_SHIFT 25
#define _EMU_IF_BURDY_DEFAULT 0x00000000UL
#define _EMU_IF_BURDY_MASK 0x400000UL
#define _EMU_IF_BURDY_SHIFT 22
#define _EMU_IF_DCDCINBYPASS_DEFAULT 0x00000000UL
#define _EMU_IF_DCDCINBYPASS_MASK 0x100000UL
#define _EMU_IF_DCDCINBYPASS_SHIFT 20
#define _EMU_IF_DCDCLNRUNNING_DEFAULT 0x00000000UL
#define _EMU_IF_DCDCLNRUNNING_MASK 0x80000UL
#define _EMU_IF_DCDCLNRUNNING_SHIFT 19
#define _EMU_IF_DCDCLPRUNNING_DEFAULT 0x00000000UL
#define _EMU_IF_DCDCLPRUNNING_MASK 0x40000UL
#define _EMU_IF_DCDCLPRUNNING_SHIFT 18
#define _EMU_IF_EM23WAKEUP_DEFAULT 0x00000000UL
#define _EMU_IF_EM23WAKEUP_MASK 0x1000000UL
#define _EMU_IF_EM23WAKEUP_SHIFT 24
#define _EMU_IF_MASK 0xE3DF37FFUL
#define _EMU_IF_NFETOVERCURRENTLIMIT_DEFAULT 0x00000000UL
#define _EMU_IF_NFETOVERCURRENTLIMIT_MASK 0x20000UL
#define _EMU_IF_NFETOVERCURRENTLIMIT_SHIFT 17
#define _EMU_IF_PFETOVERCURRENTLIMIT_DEFAULT 0x00000000UL
#define _EMU_IF_PFETOVERCURRENTLIMIT_MASK 0x10000UL
#define _EMU_IF_PFETOVERCURRENTLIMIT_SHIFT 16
#define _EMU_IF_R5VREADY_DEFAULT 0x00000000UL
#define _EMU_IF_R5VREADY_MASK 0x400UL
#define _EMU_IF_R5VREADY_SHIFT 10
#define _EMU_IF_R5VVSINT_DEFAULT 0x00000000UL
#define _EMU_IF_R5VVSINT_MASK 0x800000UL
#define _EMU_IF_R5VVSINT_SHIFT 23
#define _EMU_IF_RESETVALUE 0x00000000UL
#define _EMU_IF_TEMP_DEFAULT 0x00000000UL
#define _EMU_IF_TEMP_MASK 0x20000000UL
#define _EMU_IF_TEMP_SHIFT 29
#define _EMU_IF_TEMPHIGH_DEFAULT 0x00000000UL
#define _EMU_IF_TEMPHIGH_MASK 0x80000000UL
#define _EMU_IF_TEMPHIGH_SHIFT 31
#define _EMU_IF_TEMPLOW_DEFAULT 0x00000000UL
#define _EMU_IF_TEMPLOW_MASK 0x40000000UL
#define _EMU_IF_TEMPLOW_SHIFT 30
#define _EMU_IF_VMONALTAVDDFALL_DEFAULT 0x00000000UL
#define _EMU_IF_VMONALTAVDDFALL_MASK 0x4UL
#define _EMU_IF_VMONALTAVDDFALL_SHIFT 2
#define _EMU_IF_VMONALTAVDDRISE_DEFAULT 0x00000000UL
#define _EMU_IF_VMONALTAVDDRISE_MASK 0x8UL
#define _EMU_IF_VMONALTAVDDRISE_SHIFT 3
#define _EMU_IF_VMONAVDDFALL_DEFAULT 0x00000000UL
#define _EMU_IF_VMONAVDDFALL_MASK 0x1UL
#define _EMU_IF_VMONAVDDFALL_SHIFT 0
#define _EMU_IF_VMONAVDDRISE_DEFAULT 0x00000000UL
#define _EMU_IF_VMONAVDDRISE_MASK 0x2UL
#define _EMU_IF_VMONAVDDRISE_SHIFT 1
#define _EMU_IF_VMONBUVDDFALL_DEFAULT 0x00000000UL
#define _EMU_IF_VMONBUVDDFALL_MASK 0x1000UL
#define _EMU_IF_VMONBUVDDFALL_SHIFT 12
#define _EMU_IF_VMONBUVDDRISE_DEFAULT 0x00000000UL
#define _EMU_IF_VMONBUVDDRISE_MASK 0x2000UL
#define _EMU_IF_VMONBUVDDRISE_SHIFT 13
#define _EMU_IF_VMONDVDDFALL_DEFAULT 0x00000000UL
#define _EMU_IF_VMONDVDDFALL_MASK 0x10UL
#define _EMU_IF_VMONDVDDFALL_SHIFT 4
#define _EMU_IF_VMONDVDDRISE_DEFAULT 0x00000000UL
#define _EMU_IF_VMONDVDDRISE_MASK 0x20UL
#define _EMU_IF_VMONDVDDRISE_SHIFT 5
#define _EMU_IF_VMONIO0FALL_DEFAULT 0x00000000UL
#define _EMU_IF_VMONIO0FALL_MASK 0x40UL
#define _EMU_IF_VMONIO0FALL_SHIFT 6
#define _EMU_IF_VMONIO0RISE_DEFAULT 0x00000000UL
#define _EMU_IF_VMONIO0RISE_MASK 0x80UL
#define _EMU_IF_VMONIO0RISE_SHIFT 7
#define _EMU_IF_VMONIO1FALL_DEFAULT 0x00000000UL
#define _EMU_IF_VMONIO1FALL_MASK 0x100UL
#define _EMU_IF_VMONIO1FALL_SHIFT 8
#define _EMU_IF_VMONIO1RISE_DEFAULT 0x00000000UL
#define _EMU_IF_VMONIO1RISE_MASK 0x200UL
#define _EMU_IF_VMONIO1RISE_SHIFT 9
#define _EMU_IF_VSCALEDONE_DEFAULT 0x00000000UL
#define _EMU_IF_VSCALEDONE_MASK 0x2000000UL
#define _EMU_IF_VSCALEDONE_SHIFT 25
#define _EMU_IFC_BURDY_DEFAULT 0x00000000UL
#define _EMU_IFC_BURDY_MASK 0x400000UL
#define _EMU_IFC_BURDY_SHIFT 22
#define _EMU_IFC_DCDCINBYPASS_DEFAULT 0x00000000UL
#define _EMU_IFC_DCDCINBYPASS_MASK 0x100000UL
#define _EMU_IFC_DCDCINBYPASS_SHIFT 20
#define _EMU_IFC_DCDCLNRUNNING_DEFAULT 0x00000000UL
#define _EMU_IFC_DCDCLNRUNNING_MASK 0x80000UL
#define _EMU_IFC_DCDCLNRUNNING_SHIFT 19
#define _EMU_IFC_DCDCLPRUNNING_DEFAULT 0x00000000UL
#define _EMU_IFC_DCDCLPRUNNING_MASK 0x40000UL
#define _EMU_IFC_DCDCLPRUNNING_SHIFT 18
#define _EMU_IFC_EM23WAKEUP_DEFAULT 0x00000000UL
#define _EMU_IFC_EM23WAKEUP_MASK 0x1000000UL
#define _EMU_IFC_EM23WAKEUP_SHIFT 24
#define _EMU_IFC_MASK 0xE3DF37FFUL
#define _EMU_IFC_NFETOVERCURRENTLIMIT_DEFAULT 0x00000000UL
#define _EMU_IFC_NFETOVERCURRENTLIMIT_MASK 0x20000UL
#define _EMU_IFC_NFETOVERCURRENTLIMIT_SHIFT 17
#define _EMU_IFC_PFETOVERCURRENTLIMIT_DEFAULT 0x00000000UL
#define _EMU_IFC_PFETOVERCURRENTLIMIT_MASK 0x10000UL
#define _EMU_IFC_PFETOVERCURRENTLIMIT_SHIFT 16
#define _EMU_IFC_R5VREADY_DEFAULT 0x00000000UL
#define _EMU_IFC_R5VREADY_MASK 0x400UL
#define _EMU_IFC_R5VREADY_SHIFT 10
#define _EMU_IFC_R5VVSINT_DEFAULT 0x00000000UL
#define _EMU_IFC_R5VVSINT_MASK 0x800000UL
#define _EMU_IFC_R5VVSINT_SHIFT 23
#define _EMU_IFC_RESETVALUE 0x00000000UL
#define _EMU_IFC_TEMP_DEFAULT 0x00000000UL
#define _EMU_IFC_TEMP_MASK 0x20000000UL
#define _EMU_IFC_TEMP_SHIFT 29
#define _EMU_IFC_TEMPHIGH_DEFAULT 0x00000000UL
#define _EMU_IFC_TEMPHIGH_MASK 0x80000000UL
#define _EMU_IFC_TEMPHIGH_SHIFT 31
#define _EMU_IFC_TEMPLOW_DEFAULT 0x00000000UL
#define _EMU_IFC_TEMPLOW_MASK 0x40000000UL
#define _EMU_IFC_TEMPLOW_SHIFT 30
#define _EMU_IFC_VMONALTAVDDFALL_DEFAULT 0x00000000UL
#define _EMU_IFC_VMONALTAVDDFALL_MASK 0x4UL
#define _EMU_IFC_VMONALTAVDDFALL_SHIFT 2
#define _EMU_IFC_VMONALTAVDDRISE_DEFAULT 0x00000000UL
#define _EMU_IFC_VMONALTAVDDRISE_MASK 0x8UL
#define _EMU_IFC_VMONALTAVDDRISE_SHIFT 3
#define _EMU_IFC_VMONAVDDFALL_DEFAULT 0x00000000UL
#define _EMU_IFC_VMONAVDDFALL_MASK 0x1UL
#define _EMU_IFC_VMONAVDDFALL_SHIFT 0
#define _EMU_IFC_VMONAVDDRISE_DEFAULT 0x00000000UL
#define _EMU_IFC_VMONAVDDRISE_MASK 0x2UL
#define _EMU_IFC_VMONAVDDRISE_SHIFT 1
#define _EMU_IFC_VMONBUVDDFALL_DEFAULT 0x00000000UL
#define _EMU_IFC_VMONBUVDDFALL_MASK 0x1000UL
#define _EMU_IFC_VMONBUVDDFALL_SHIFT 12
#define _EMU_IFC_VMONBUVDDRISE_DEFAULT 0x00000000UL
#define _EMU_IFC_VMONBUVDDRISE_MASK 0x2000UL
#define _EMU_IFC_VMONBUVDDRISE_SHIFT 13
#define _EMU_IFC_VMONDVDDFALL_DEFAULT 0x00000000UL
#define _EMU_IFC_VMONDVDDFALL_MASK 0x10UL
#define _EMU_IFC_VMONDVDDFALL_SHIFT 4
#define _EMU_IFC_VMONDVDDRISE_DEFAULT 0x00000000UL
#define _EMU_IFC_VMONDVDDRISE_MASK 0x20UL
#define _EMU_IFC_VMONDVDDRISE_SHIFT 5
#define _EMU_IFC_VMONIO0FALL_DEFAULT 0x00000000UL
#define _EMU_IFC_VMONIO0FALL_MASK 0x40UL
#define _EMU_IFC_VMONIO0FALL_SHIFT 6
#define _EMU_IFC_VMONIO0RISE_DEFAULT 0x00000000UL
#define _EMU_IFC_VMONIO0RISE_MASK 0x80UL
#define _EMU_IFC_VMONIO0RISE_SHIFT 7
#define _EMU_IFC_VMONIO1FALL_DEFAULT 0x00000000UL
#define _EMU_IFC_VMONIO1FALL_MASK 0x100UL
#define _EMU_IFC_VMONIO1FALL_SHIFT 8
#define _EMU_IFC_VMONIO1RISE_DEFAULT 0x00000000UL
#define _EMU_IFC_VMONIO1RISE_MASK 0x200UL
#define _EMU_IFC_VMONIO1RISE_SHIFT 9
#define _EMU_IFC_VSCALEDONE_DEFAULT 0x00000000UL
#define _EMU_IFC_VSCALEDONE_MASK 0x2000000UL
#define _EMU_IFC_VSCALEDONE_SHIFT 25
#define _EMU_IFS_BURDY_DEFAULT 0x00000000UL
#define _EMU_IFS_BURDY_MASK 0x400000UL
#define _EMU_IFS_BURDY_SHIFT 22
#define _EMU_IFS_DCDCINBYPASS_DEFAULT 0x00000000UL
#define _EMU_IFS_DCDCINBYPASS_MASK 0x100000UL
#define _EMU_IFS_DCDCINBYPASS_SHIFT 20
#define _EMU_IFS_DCDCLNRUNNING_DEFAULT 0x00000000UL
#define _EMU_IFS_DCDCLNRUNNING_MASK 0x80000UL
#define _EMU_IFS_DCDCLNRUNNING_SHIFT 19
#define _EMU_IFS_DCDCLPRUNNING_DEFAULT 0x00000000UL
#define _EMU_IFS_DCDCLPRUNNING_MASK 0x40000UL
#define _EMU_IFS_DCDCLPRUNNING_SHIFT 18
#define _EMU_IFS_EM23WAKEUP_DEFAULT 0x00000000UL
#define _EMU_IFS_EM23WAKEUP_MASK 0x1000000UL
#define _EMU_IFS_EM23WAKEUP_SHIFT 24
#define _EMU_IFS_MASK 0xE3DF37FFUL
#define _EMU_IFS_NFETOVERCURRENTLIMIT_DEFAULT 0x00000000UL
#define _EMU_IFS_NFETOVERCURRENTLIMIT_MASK 0x20000UL
#define _EMU_IFS_NFETOVERCURRENTLIMIT_SHIFT 17
#define _EMU_IFS_PFETOVERCURRENTLIMIT_DEFAULT 0x00000000UL
#define _EMU_IFS_PFETOVERCURRENTLIMIT_MASK 0x10000UL
#define _EMU_IFS_PFETOVERCURRENTLIMIT_SHIFT 16
#define _EMU_IFS_R5VREADY_DEFAULT 0x00000000UL
#define _EMU_IFS_R5VREADY_MASK 0x400UL
#define _EMU_IFS_R5VREADY_SHIFT 10
#define _EMU_IFS_R5VVSINT_DEFAULT 0x00000000UL
#define _EMU_IFS_R5VVSINT_MASK 0x800000UL
#define _EMU_IFS_R5VVSINT_SHIFT 23
#define _EMU_IFS_RESETVALUE 0x00000000UL
#define _EMU_IFS_TEMP_DEFAULT 0x00000000UL
#define _EMU_IFS_TEMP_MASK 0x20000000UL
#define _EMU_IFS_TEMP_SHIFT 29
#define _EMU_IFS_TEMPHIGH_DEFAULT 0x00000000UL
#define _EMU_IFS_TEMPHIGH_MASK 0x80000000UL
#define _EMU_IFS_TEMPHIGH_SHIFT 31
#define _EMU_IFS_TEMPLOW_DEFAULT 0x00000000UL
#define _EMU_IFS_TEMPLOW_MASK 0x40000000UL
#define _EMU_IFS_TEMPLOW_SHIFT 30
#define _EMU_IFS_VMONALTAVDDFALL_DEFAULT 0x00000000UL
#define _EMU_IFS_VMONALTAVDDFALL_MASK 0x4UL
#define _EMU_IFS_VMONALTAVDDFALL_SHIFT 2
#define _EMU_IFS_VMONALTAVDDRISE_DEFAULT 0x00000000UL
#define _EMU_IFS_VMONALTAVDDRISE_MASK 0x8UL
#define _EMU_IFS_VMONALTAVDDRISE_SHIFT 3
#define _EMU_IFS_VMONAVDDFALL_DEFAULT 0x00000000UL
#define _EMU_IFS_VMONAVDDFALL_MASK 0x1UL
#define _EMU_IFS_VMONAVDDFALL_SHIFT 0
#define _EMU_IFS_VMONAVDDRISE_DEFAULT 0x00000000UL
#define _EMU_IFS_VMONAVDDRISE_MASK 0x2UL
#define _EMU_IFS_VMONAVDDRISE_SHIFT 1
#define _EMU_IFS_VMONBUVDDFALL_DEFAULT 0x00000000UL
#define _EMU_IFS_VMONBUVDDFALL_MASK 0x1000UL
#define _EMU_IFS_VMONBUVDDFALL_SHIFT 12
#define _EMU_IFS_VMONBUVDDRISE_DEFAULT 0x00000000UL
#define _EMU_IFS_VMONBUVDDRISE_MASK 0x2000UL
#define _EMU_IFS_VMONBUVDDRISE_SHIFT 13
#define _EMU_IFS_VMONDVDDFALL_DEFAULT 0x00000000UL
#define _EMU_IFS_VMONDVDDFALL_MASK 0x10UL
#define _EMU_IFS_VMONDVDDFALL_SHIFT 4
#define _EMU_IFS_VMONDVDDRISE_DEFAULT 0x00000000UL
#define _EMU_IFS_VMONDVDDRISE_MASK 0x20UL
#define _EMU_IFS_VMONDVDDRISE_SHIFT 5
#define _EMU_IFS_VMONIO0FALL_DEFAULT 0x00000000UL
#define _EMU_IFS_VMONIO0FALL_MASK 0x40UL
#define _EMU_IFS_VMONIO0FALL_SHIFT 6
#define _EMU_IFS_VMONIO0RISE_DEFAULT 0x00000000UL
#define _EMU_IFS_VMONIO0RISE_MASK 0x80UL
#define _EMU_IFS_VMONIO0RISE_SHIFT 7
#define _EMU_IFS_VMONIO1FALL_DEFAULT 0x00000000UL
#define _EMU_IFS_VMONIO1FALL_MASK 0x100UL
#define _EMU_IFS_VMONIO1FALL_SHIFT 8
#define _EMU_IFS_VMONIO1RISE_DEFAULT 0x00000000UL
#define _EMU_IFS_VMONIO1RISE_MASK 0x200UL
#define _EMU_IFS_VMONIO1RISE_SHIFT 9
#define _EMU_IFS_VSCALEDONE_DEFAULT 0x00000000UL
#define _EMU_IFS_VSCALEDONE_MASK 0x2000000UL
#define _EMU_IFS_VSCALEDONE_SHIFT 25
#define _EMU_LOCK_LOCKKEY_DEFAULT 0x00000000UL
#define _EMU_LOCK_LOCKKEY_LOCK 0x00000000UL
#define _EMU_LOCK_LOCKKEY_LOCKED 0x00000001UL
#define _EMU_LOCK_LOCKKEY_MASK 0xFFFFUL
#define _EMU_LOCK_LOCKKEY_SHIFT 0
#define _EMU_LOCK_LOCKKEY_UNLOCK 0x0000ADE8UL
#define _EMU_LOCK_LOCKKEY_UNLOCKED 0x00000000UL
#define _EMU_LOCK_MASK 0x0000FFFFUL
#define _EMU_LOCK_RESETVALUE 0x00000000UL
#define _EMU_PWRCTRL_ANASW_AVDD 0x00000000UL
#define _EMU_PWRCTRL_ANASW_DEFAULT 0x00000000UL
#define _EMU_PWRCTRL_ANASW_DVDD 0x00000001UL
#define _EMU_PWRCTRL_ANASW_MASK 0x20UL
#define _EMU_PWRCTRL_ANASW_SHIFT 5
#define _EMU_PWRCTRL_IMMEDIATEPWRSWITCH_DEFAULT 0x00000000UL
#define _EMU_PWRCTRL_IMMEDIATEPWRSWITCH_MASK 0x2000UL
#define _EMU_PWRCTRL_IMMEDIATEPWRSWITCH_SHIFT 13
#define _EMU_PWRCTRL_MASK 0x00002420UL
#define _EMU_PWRCTRL_REGPWRSEL_AVDD 0x00000000UL
#define _EMU_PWRCTRL_REGPWRSEL_DEFAULT 0x00000000UL
#define _EMU_PWRCTRL_REGPWRSEL_DVDD 0x00000001UL
#define _EMU_PWRCTRL_REGPWRSEL_MASK 0x400UL
#define _EMU_PWRCTRL_REGPWRSEL_SHIFT 10
#define _EMU_PWRCTRL_RESETVALUE 0x00000000UL
#define _EMU_PWRLOCK_LOCKKEY_DEFAULT 0x00000000UL
#define _EMU_PWRLOCK_LOCKKEY_LOCK 0x00000000UL
#define _EMU_PWRLOCK_LOCKKEY_LOCKED 0x00000001UL
#define _EMU_PWRLOCK_LOCKKEY_MASK 0xFFFFUL
#define _EMU_PWRLOCK_LOCKKEY_SHIFT 0
#define _EMU_PWRLOCK_LOCKKEY_UNLOCK 0x0000ADE8UL
#define _EMU_PWRLOCK_LOCKKEY_UNLOCKED 0x00000000UL
#define _EMU_PWRLOCK_MASK 0x0000FFFFUL
#define _EMU_PWRLOCK_RESETVALUE 0x00000000UL
#define _EMU_R5VADCCTRL_AMUXSEL_DEFAULT 0x00000000UL
#define _EMU_R5VADCCTRL_AMUXSEL_MASK 0xF000UL
#define _EMU_R5VADCCTRL_AMUXSEL_SHIFT 12
#define _EMU_R5VADCCTRL_AMUXSEL_VBUSDIV10 0x00000000UL
#define _EMU_R5VADCCTRL_AMUXSEL_VBUSIMON 0x00000004UL
#define _EMU_R5VADCCTRL_AMUXSEL_VREGIDIV10 0x00000001UL
#define _EMU_R5VADCCTRL_AMUXSEL_VREGIIMON 0x00000003UL
#define _EMU_R5VADCCTRL_AMUXSEL_VREGODIV6 0x00000002UL
#define _EMU_R5VADCCTRL_ENAMUX_DEFAULT 0x00000000UL
#define _EMU_R5VADCCTRL_ENAMUX_MASK 0x1UL
#define _EMU_R5VADCCTRL_ENAMUX_SHIFT 0
#define _EMU_R5VADCCTRL_MASK 0x0000F001UL
#define _EMU_R5VADCCTRL_RESETVALUE 0x00000000UL
#define _EMU_R5VCTRL_BYPASS_DEFAULT 0x00000000UL
#define _EMU_R5VCTRL_BYPASS_MASK 0x1UL
#define _EMU_R5VCTRL_BYPASS_SHIFT 0
#define _EMU_R5VCTRL_EM4WUEN_DEFAULT 0x00000000UL
#define _EMU_R5VCTRL_EM4WUEN_MASK 0x2UL
#define _EMU_R5VCTRL_EM4WUEN_SHIFT 1
#define _EMU_R5VCTRL_IMONEN_DEFAULT 0x00000000UL
#define _EMU_R5VCTRL_IMONEN_MASK 0x4UL
#define _EMU_R5VCTRL_IMONEN_SHIFT 2
#define _EMU_R5VCTRL_INPUTMODE_AUTO 0x00000000UL
#define _EMU_R5VCTRL_INPUTMODE_DEFAULT 0x00000000UL
#define _EMU_R5VCTRL_INPUTMODE_MASK 0x300UL
#define _EMU_R5VCTRL_INPUTMODE_SHIFT 8
#define _EMU_R5VCTRL_INPUTMODE_VBUS 0x00000001UL
#define _EMU_R5VCTRL_INPUTMODE_VREGI 0x00000002UL
#define _EMU_R5VCTRL_MASK 0x00000307UL
#define _EMU_R5VCTRL_RESETVALUE 0x00000000UL
#define _EMU_R5VDETCTRL_MASK 0x00000007UL
#define _EMU_R5VDETCTRL_RESETVALUE 0x00000000UL
#define _EMU_R5VDETCTRL_VBUSDETDIS_DEFAULT 0x00000000UL
#define _EMU_R5VDETCTRL_VBUSDETDIS_MASK 0x2UL
#define _EMU_R5VDETCTRL_VBUSDETDIS_SHIFT 1
#define _EMU_R5VDETCTRL_VREGIDETDIS_DEFAULT 0x00000000UL
#define _EMU_R5VDETCTRL_VREGIDETDIS_MASK 0x1UL
#define _EMU_R5VDETCTRL_VREGIDETDIS_SHIFT 0
#define _EMU_R5VDETCTRL_VREGODETDIS_DEFAULT 0x00000000UL
#define _EMU_R5VDETCTRL_VREGODETDIS_MASK 0x4UL
#define _EMU_R5VDETCTRL_VREGODETDIS_SHIFT 2
#define _EMU_R5VOUTLEVEL_MASK 0x0000000FUL
#define _EMU_R5VOUTLEVEL_OUTLEVEL_DEFAULT 0x00000001UL
#define _EMU_R5VOUTLEVEL_OUTLEVEL_MASK 0xFUL
#define _EMU_R5VOUTLEVEL_OUTLEVEL_SHIFT 0
#define _EMU_R5VOUTLEVEL_RESETVALUE 0x00000001UL
#define _EMU_R5VSTATUS_COLDSTART_DEFAULT 0x00000001UL
#define _EMU_R5VSTATUS_COLDSTART_MASK 0x20UL
#define _EMU_R5VSTATUS_COLDSTART_SHIFT 5
#define _EMU_R5VSTATUS_LDODROPOUTDET_DEFAULT 0x00000000UL
#define _EMU_R5VSTATUS_LDODROPOUTDET_MASK 0x10UL
#define _EMU_R5VSTATUS_LDODROPOUTDET_SHIFT 4
#define _EMU_R5VSTATUS_MASK 0x0000003FUL
#define _EMU_R5VSTATUS_RESETVALUE 0x00000020UL
#define _EMU_R5VSTATUS_VBUSDET_DEFAULT 0x00000000UL
#define _EMU_R5VSTATUS_VBUSDET_MASK 0x2UL
#define _EMU_R5VSTATUS_VBUSDET_SHIFT 1
#define _EMU_R5VSTATUS_VBUSGTVREGI_DEFAULT 0x00000000UL
#define _EMU_R5VSTATUS_VBUSGTVREGI_MASK 0x8UL
#define _EMU_R5VSTATUS_VBUSGTVREGI_SHIFT 3
#define _EMU_R5VSTATUS_VREGIDET_DEFAULT 0x00000000UL
#define _EMU_R5VSTATUS_VREGIDET_MASK 0x1UL
#define _EMU_R5VSTATUS_VREGIDET_SHIFT 0
#define _EMU_R5VSTATUS_VREGODET_DEFAULT 0x00000000UL
#define _EMU_R5VSTATUS_VREGODET_MASK 0x4UL
#define _EMU_R5VSTATUS_VREGODET_SHIFT 2
#define _EMU_R5VSYNC_MASK 0x00000001UL
#define _EMU_R5VSYNC_OUTLEVELBUSY_DEFAULT 0x00000000UL
#define _EMU_R5VSYNC_OUTLEVELBUSY_MASK 0x1UL
#define _EMU_R5VSYNC_OUTLEVELBUSY_SHIFT 0
#define _EMU_R5VSYNC_RESETVALUE 0x00000000UL
#define _EMU_RAM0CTRL_MASK 0x0000007FUL
#define _EMU_RAM0CTRL_RAMPOWERDOWN_BLK1TO7 0x0000007FUL
#define _EMU_RAM0CTRL_RAMPOWERDOWN_BLK2TO7 0x0000007EUL
#define _EMU_RAM0CTRL_RAMPOWERDOWN_BLK3TO7 0x0000007CUL
#define _EMU_RAM0CTRL_RAMPOWERDOWN_BLK4TO7 0x00000078UL
#define _EMU_RAM0CTRL_RAMPOWERDOWN_BLK5TO7 0x00000070UL
#define _EMU_RAM0CTRL_RAMPOWERDOWN_BLK6TO7 0x00000060UL
#define _EMU_RAM0CTRL_RAMPOWERDOWN_BLK7 0x00000040UL
#define _EMU_RAM0CTRL_RAMPOWERDOWN_DEFAULT 0x00000000UL
#define _EMU_RAM0CTRL_RAMPOWERDOWN_MASK 0x7FUL
#define _EMU_RAM0CTRL_RAMPOWERDOWN_NONE 0x00000000UL
#define _EMU_RAM0CTRL_RAMPOWERDOWN_SHIFT 0
#define _EMU_RAM0CTRL_RESETVALUE 0x00000000UL
#define _EMU_RAM1CTRL_MASK 0x000000FFUL
#define _EMU_RAM1CTRL_RAMPOWERDOWN_BLK0TO7 0x000000FFUL
#define _EMU_RAM1CTRL_RAMPOWERDOWN_BLK1TO7 0x000000FEUL
#define _EMU_RAM1CTRL_RAMPOWERDOWN_BLK2TO7 0x000000FCUL
#define _EMU_RAM1CTRL_RAMPOWERDOWN_BLK3TO7 0x000000F8UL
#define _EMU_RAM1CTRL_RAMPOWERDOWN_BLK4TO7 0x000000F0UL
#define _EMU_RAM1CTRL_RAMPOWERDOWN_BLK5TO7 0x000000E0UL
#define _EMU_RAM1CTRL_RAMPOWERDOWN_BLK6TO7 0x000000C0UL
#define _EMU_RAM1CTRL_RAMPOWERDOWN_BLK7 0x00000080UL
#define _EMU_RAM1CTRL_RAMPOWERDOWN_DEFAULT 0x00000000UL
#define _EMU_RAM1CTRL_RAMPOWERDOWN_MASK 0xFFUL
#define _EMU_RAM1CTRL_RAMPOWERDOWN_NONE 0x00000000UL
#define _EMU_RAM1CTRL_RAMPOWERDOWN_SHIFT 0
#define _EMU_RAM1CTRL_RESETVALUE 0x00000000UL
#define _EMU_RAM2CTRL_MASK 0x0000000FUL
#define _EMU_RAM2CTRL_RAMPOWERDOWN_BLK0TO3 0x0000000FUL
#define _EMU_RAM2CTRL_RAMPOWERDOWN_BLK1TO3 0x0000000EUL
#define _EMU_RAM2CTRL_RAMPOWERDOWN_BLK2TO3 0x0000000CUL
#define _EMU_RAM2CTRL_RAMPOWERDOWN_BLK3 0x00000008UL
#define _EMU_RAM2CTRL_RAMPOWERDOWN_DEFAULT 0x00000000UL
#define _EMU_RAM2CTRL_RAMPOWERDOWN_MASK 0xFUL
#define _EMU_RAM2CTRL_RAMPOWERDOWN_NONE 0x00000000UL
#define _EMU_RAM2CTRL_RAMPOWERDOWN_SHIFT 0
#define _EMU_RAM2CTRL_RESETVALUE 0x00000000UL
#define _EMU_STATUS_BURDY_DEFAULT 0x00000000UL
#define _EMU_STATUS_BURDY_MASK 0x1000UL
#define _EMU_STATUS_BURDY_SHIFT 12
#define _EMU_STATUS_EM4IORET_DEFAULT 0x00000000UL
#define _EMU_STATUS_EM4IORET_DISABLED 0x00000000UL
#define _EMU_STATUS_EM4IORET_ENABLED 0x00000001UL
#define _EMU_STATUS_EM4IORET_MASK 0x100000UL
#define _EMU_STATUS_EM4IORET_SHIFT 20
#define _EMU_STATUS_MASK 0x041710BFUL
#define _EMU_STATUS_RESETVALUE 0x00000000UL
#define _EMU_STATUS_TEMPACTIVE_DEFAULT 0x00000000UL
#define _EMU_STATUS_TEMPACTIVE_MASK 0x4000000UL
#define _EMU_STATUS_TEMPACTIVE_SHIFT 26
#define _EMU_STATUS_VMONALTAVDD_DEFAULT 0x00000000UL
#define _EMU_STATUS_VMONALTAVDD_MASK 0x4UL
#define _EMU_STATUS_VMONALTAVDD_SHIFT 2
#define _EMU_STATUS_VMONAVDD_DEFAULT 0x00000000UL
#define _EMU_STATUS_VMONAVDD_MASK 0x2UL
#define _EMU_STATUS_VMONAVDD_SHIFT 1
#define _EMU_STATUS_VMONBUVDD_DEFAULT 0x00000000UL
#define _EMU_STATUS_VMONBUVDD_MASK 0x80UL
#define _EMU_STATUS_VMONBUVDD_SHIFT 7
#define _EMU_STATUS_VMONDVDD_DEFAULT 0x00000000UL
#define _EMU_STATUS_VMONDVDD_MASK 0x8UL
#define _EMU_STATUS_VMONDVDD_SHIFT 3
#define _EMU_STATUS_VMONIO0_DEFAULT 0x00000000UL
#define _EMU_STATUS_VMONIO0_MASK 0x10UL
#define _EMU_STATUS_VMONIO0_SHIFT 4
#define _EMU_STATUS_VMONIO1_DEFAULT 0x00000000UL
#define _EMU_STATUS_VMONIO1_MASK 0x20UL
#define _EMU_STATUS_VMONIO1_SHIFT 5
#define _EMU_STATUS_VMONRDY_DEFAULT 0x00000000UL
#define _EMU_STATUS_VMONRDY_MASK 0x1UL
#define _EMU_STATUS_VMONRDY_SHIFT 0
#define _EMU_STATUS_VSCALE_DEFAULT 0x00000000UL
#define _EMU_STATUS_VSCALE_MASK 0x30000UL
#define _EMU_STATUS_VSCALE_RESV 0x00000003UL
#define _EMU_STATUS_VSCALE_SHIFT 16
#define _EMU_STATUS_VSCALE_VSCALE0 0x00000002UL
#define _EMU_STATUS_VSCALE_VSCALE2 0x00000000UL
#define _EMU_STATUS_VSCALEBUSY_DEFAULT 0x00000000UL
#define _EMU_STATUS_VSCALEBUSY_MASK 0x40000UL
#define _EMU_STATUS_VSCALEBUSY_SHIFT 18
#define _EMU_TEMP_MASK 0x000000FFUL
#define _EMU_TEMP_RESETVALUE 0x00000000UL
#define _EMU_TEMP_TEMP_DEFAULT 0x00000000UL
#define _EMU_TEMP_TEMP_MASK 0xFFUL
#define _EMU_TEMP_TEMP_SHIFT 0
#define _EMU_TEMPLIMITS_EM4WUEN_DEFAULT 0x00000000UL
#define _EMU_TEMPLIMITS_EM4WUEN_MASK 0x10000UL
#define _EMU_TEMPLIMITS_EM4WUEN_SHIFT 16
#define _EMU_TEMPLIMITS_MASK 0x0001FFFFUL
#define _EMU_TEMPLIMITS_RESETVALUE 0x0000FF00UL
#define _EMU_TEMPLIMITS_TEMPHIGH_DEFAULT 0x000000FFUL
#define _EMU_TEMPLIMITS_TEMPHIGH_MASK 0xFF00UL
#define _EMU_TEMPLIMITS_TEMPHIGH_SHIFT 8