QSPIEMLIB

Detailed Description

QSPI Octal-SPI Controller API.

These QSPI functions provide basic support for using the QSPI peripheral in the following configurations:

  • Direct Read/Write, used for memory mapped access to external memory.
  • STIG Command, used for configuring and executing commands on the external memory device.

Indirect read/write, PHY configuration and Execute-In-Place (XIP) configuration is not supported.

The example below shows how to set up the QSPI for direct read and write operation:

CMU_ClockEnable ( cmuClock_GPIO , true );
CMU_ClockEnable ( cmuClock_QSPI0 , true );
QSPI_Init_TypeDef initQspi = QSPI_INIT_DEFAULT ;
QSPI_Init ( QSPI0 , &initQspi);
// Configure QSPI pins
GPIO_PinModeSet (EXTFLASH_PORT_CS, EXTFLASH_PIN_CS, gpioModePushPull , 0);
GPIO_PinModeSet (EXTFLASH_PORT_SCLK, EXTFLASH_PIN_SCLK, gpioModePushPull , 0);
GPIO_PinModeSet (EXTFLASH_PORT_DQ0, EXTFLASH_PIN_DQ0, gpioModePushPull , 0);
GPIO_PinModeSet (EXTFLASH_PORT_DQ1, EXTFLASH_PIN_DQ1, gpioModePushPull , 0);
GPIO_PinModeSet (EXTFLASH_PORT_DQ2, EXTFLASH_PIN_DQ2, gpioModePushPull , 0);
GPIO_PinModeSet (EXTFLASH_PORT_DQ3, EXTFLASH_PIN_DQ3, gpioModePushPull , 0);
// Configure QSPI routing to GPIO
QSPI0 ->ROUTELOC0 = EXTFLASH_QSPI_LOC;
QSPI0 ->ROUTEPEN = QSPI_ROUTEPEN_SCLKPEN
| EXTFLASH_QSPI_CSPEN
| QSPI_ROUTEPEN_DQ0PEN
| QSPI_ROUTEPEN_DQ1PEN
| QSPI_ROUTEPEN_DQ2PEN
| QSPI_ROUTEPEN_DQ3PEN ;
// Configure direct read
QSPI_ReadConfig_TypeDef readConfig = QSPI_READCONFIG_DEFAULT ;
readConfig. dummyCycles = 8;
readConfig. opCode = 0x6B;
readConfig. instTransfer = qspiTransferSingle ;
readConfig. addrTransfer = qspiTransferSingle ;
readConfig. dataTransfer = qspiTransferQuad ;
QSPI_ReadConfig ( QSPI0 , &readConfig);
// Configure direct write
QSPI_WriteConfig_TypeDef writeConfig = QSPI_WRITECONFIG_DEFAULT ;
writeConfig. dummyCycles = 0;
writeConfig. opCode = 0x38;
writeConfig. addrTransfer = qspiTransferQuad ;
writeConfig. dataTransfer = qspiTransferQuad ;
writeConfig. autoWEL = true ;
QSPI_WriteConfig ( QSPI0 , &writeConfig);

To configure an external flash, commands can set up and executed using the Software Triggered Instruction Generator (STIG) function of the QSPI, as shown in the example below:

uint8_t status;
QSPI_StigCmd_TypeDef stigCmd = {0};
stigCmd. cmdOpcode = EXTFLASH_OPCODE_READ_STATUS;
stigCmd. readDataSize = 1;
stigCmd. readBuffer = &status;
QSPI_ExecStigCmd ( QSPI0 , &stigCmd);

Data Structures

struct QSPI_DelayConfig_TypeDef
struct QSPI_Init_TypeDef
struct QSPI_ReadConfig_TypeDef
struct QSPI_StigCmd_TypeDef
struct QSPI_WriteConfig_TypeDef

Macros

#define QSPI_INIT_DEFAULT
#define QSPI_READCONFIG_DEFAULT
#define QSPI_WRITECONFIG_DEFAULT

Enumerations

enum QSPI_TransferType_TypeDef {
qspiTransferSingle = 0,
qspiTransferDual = 1,
qspiTransferQuad = 2,
qspiTransferOctal = 3
}

Functions

__STATIC_INLINE void QSPI_Enable ( QSPI_TypeDef *qspi, bool enable)
Enable/disable Quad SPI.
void QSPI_ExecStigCmd ( QSPI_TypeDef *qspi, const QSPI_StigCmd_TypeDef *stigCmd)
Execute a STIG command.
__STATIC_INLINE uint16_t QSPI_GetReadLevel ( QSPI_TypeDef *qspi)
Get the fill level of the read partition of the QSPI internal SRAM.
__STATIC_INLINE uint16_t QSPI_GetWriteLevel ( QSPI_TypeDef *qspi)
Get the fill level of the write partition of the QSPI internal SRAM.
void QSPI_Init ( QSPI_TypeDef *qspi, const QSPI_Init_TypeDef *init)
Initialize QSPI.
__STATIC_INLINE void QSPI_IntClear ( QSPI_TypeDef *qspi, uint32_t flags)
Clear interrupt flags.
__STATIC_INLINE void QSPI_IntDisable ( QSPI_TypeDef *qspi, uint32_t flags)
Disable interrupts.
__STATIC_INLINE void QSPI_IntEnable ( QSPI_TypeDef *qspi, uint32_t flags)
Enable interrupts.
__STATIC_INLINE uint32_t QSPI_IntGet ( QSPI_TypeDef *qspi)
Get the current interrupt flags.
void QSPI_ReadConfig ( QSPI_TypeDef *qspi, const QSPI_ReadConfig_TypeDef *config)
Configure Read Operations.
__STATIC_INLINE void QSPI_WaitForIdle ( QSPI_TypeDef *qspi)
Wait for the QSPI to go into idle state.
void QSPI_WriteConfig ( QSPI_TypeDef *qspi, const QSPI_WriteConfig_TypeDef *config)
Configure Write Operations.

Macro Definition Documentation

#define QSPI_INIT_DEFAULT
Value:
{ \
true, /* Enable Quad SPI. */ \
32, /* Divide QSPI clock by 32. */ \
}

Default configuration for QSPI_Init_TypeDef structure.

Definition at line 200 of file em_qspi.h .

#define QSPI_READCONFIG_DEFAULT
Value:
{ \
0x03, /* 0x03 is the standard read opcode. */ \
0, /* 0 dummy cycles. */ \
qspiTransferSingle, /* Single I/O mode. */ \
qspiTransferSingle, /* Single I/O mode. */ \
qspiTransferSingle, /* Single I/O mode. */ \
}

Default read configuration structure.

Definition at line 102 of file em_qspi.h .

#define QSPI_WRITECONFIG_DEFAULT
Value:
{ \
0x02, /* 0x02 is the standard write opcode. */ \
0, /* 0 dummy cycles. */ \
qspiTransferSingle, /* Single I/O mode. */ \
qspiTransferSingle, /* Single I/O mode. */ \
true, /* Send WEL command automatically. */ \
}

Default write configuration structure.

Definition at line 140 of file em_qspi.h .

Enumeration Type Documentation

enum QSPI_TransferType_TypeDef

Transfer type.

Enumerator
qspiTransferSingle

Single IO mode. DQ0 used for output and DQ1 as input.

qspiTransferDual

Dual I/O transfer. DQ0 and DQ1 are used as both inputs and outputs.

qspiTransferQuad

Quad I/O transfer. DQ0, DQ1, DQ2 and DQ3 are used as both inputs and outputs.

qspiTransferOctal

Octal I/O transfer. DQ[7:0] are used as both inputs and outputs.

Definition at line 65 of file em_qspi.h .

Function Documentation

__STATIC_INLINE void QSPI_Enable ( QSPI_TypeDef * qspi,
bool enable
)

Enable/disable Quad SPI.

Parameters
[in] qspi Pointer to QSPI peripheral register block.
[in] enable true to enable quad spi, false to disable quad spi.

Definition at line 272 of file em_qspi.h .

References _QSPI_CONFIG_ENBSPI_SHIFT , BUS_RegBitWrite() , and QSPI_TypeDef::CONFIG .

Referenced by QSPI_Init() .

void QSPI_ExecStigCmd ( QSPI_TypeDef * qspi,
const QSPI_StigCmd_TypeDef * stigCmd
)

Execute a STIG command.

STIG means "software triggered instruction generator" and is used when the application needs to access status registers, configuration registers or perform erase functions. The STIG commands can be used to perform any instruction that the flash device supports.

Parameters
[in] qspi Pointer to the QSPI peripheral register block.
[in] stigCmd Pointer to a structure that describes the STIG command.

Definition at line 207 of file em_qspi.c .

References _QSPI_FLASHCMDCTRL_CMDOPCODE_SHIFT , _QSPI_FLASHCMDCTRL_NUMADDRBYTES_SHIFT , _QSPI_FLASHCMDCTRL_NUMDUMMYCYCLES_SHIFT , _QSPI_FLASHCMDCTRL_NUMRDDATABYTES_SHIFT , _QSPI_FLASHCMDCTRL_NUMWRDATABYTES_SHIFT , QSPI_StigCmd_TypeDef::address , QSPI_StigCmd_TypeDef::addrSize , QSPI_StigCmd_TypeDef::cmdOpcode , QSPI_StigCmd_TypeDef::dummyCycles , QSPI_TypeDef::FLASHCMDADDR , QSPI_TypeDef::FLASHCMDCTRL , QSPI_TypeDef::FLASHRDDATALOWER , QSPI_TypeDef::FLASHRDDATAUPPER , QSPI_TypeDef::FLASHWRDATALOWER , QSPI_TypeDef::FLASHWRDATAUPPER , QSPI_StigCmd_TypeDef::modeBitEnable , QSPI_FLASHCMDCTRL_CMDEXEC , QSPI_FLASHCMDCTRL_CMDEXECSTATUS , QSPI_FLASHCMDCTRL_ENBCOMDADDR , QSPI_FLASHCMDCTRL_ENBMODEBIT , QSPI_FLASHCMDCTRL_ENBREADDATA , QSPI_FLASHCMDCTRL_ENBWRITEDATA , QSPI_WaitForIdle() , QSPI_StigCmd_TypeDef::readBuffer , QSPI_StigCmd_TypeDef::readDataSize , QSPI_StigCmd_TypeDef::writeBuffer , and QSPI_StigCmd_TypeDef::writeDataSize .

__STATIC_INLINE uint16_t QSPI_GetReadLevel ( QSPI_TypeDef * qspi )

Get the fill level of the read partition of the QSPI internal SRAM.

Parameters
[in] qspi Pointer to QSPI peripheral register block.
Returns
SRAM fill level of the read partition. The value is the number of 4 byte words in the read partition.

Definition at line 256 of file em_qspi.h .

References _QSPI_SRAMFILL_SRAMFILLINDACREAD_MASK , _QSPI_SRAMFILL_SRAMFILLINDACREAD_SHIFT , and QSPI_TypeDef::SRAMFILL .

__STATIC_INLINE uint16_t QSPI_GetWriteLevel ( QSPI_TypeDef * qspi )

Get the fill level of the write partition of the QSPI internal SRAM.

Parameters
[in] qspi Pointer to QSPI peripheral register block.
Returns
SRAM fill level of the write partition. The value is the number of 4 byte words in the write partition.

Definition at line 239 of file em_qspi.h .

References _QSPI_SRAMFILL_SRAMFILLINDACWRITE_MASK , _QSPI_SRAMFILL_SRAMFILLINDACWRITE_SHIFT , and QSPI_TypeDef::SRAMFILL .

void QSPI_Init ( QSPI_TypeDef * qspi,
const QSPI_Init_TypeDef * init
)

Initialize QSPI.

Parameters
[in] qspi Pointer to the QSPI peripheral register block.
[in] init Pointer to initialization structure used to configure QSPI.

Definition at line 135 of file em_qspi.c .

References _QSPI_CONFIG_MSTRBAUDDIV_MASK , _QSPI_CONFIG_MSTRBAUDDIV_SHIFT , QSPI_TypeDef::CONFIG , QSPI_Init_TypeDef::divisor , QSPI_Init_TypeDef::enable , and QSPI_Enable() .

__STATIC_INLINE void QSPI_IntClear ( QSPI_TypeDef * qspi,
uint32_t flags
)

Clear interrupt flags.

Parameters
[in] qspi Pointer to QSPI peripheral register block.
[in] flags The interrupt flags to clear.

Definition at line 302 of file em_qspi.h .

References QSPI_TypeDef::IRQSTATUS .

__STATIC_INLINE void QSPI_IntDisable ( QSPI_TypeDef * qspi,
uint32_t flags
)

Disable interrupts.

Parameters
[in] qspi Pointer to QSPI peripheral register block.
[in] flags The interrupt flags to disable.

Definition at line 332 of file em_qspi.h .

References _QSPI_IRQMASK_MASK , and QSPI_TypeDef::IRQMASK .

__STATIC_INLINE void QSPI_IntEnable ( QSPI_TypeDef * qspi,
uint32_t flags
)

Enable interrupts.

Parameters
[in] qspi Pointer to QSPI peripheral register block.
[in] flags The interrupt flags to enable.

Definition at line 317 of file em_qspi.h .

References _QSPI_IRQMASK_MASK , and QSPI_TypeDef::IRQMASK .

__STATIC_INLINE uint32_t QSPI_IntGet ( QSPI_TypeDef * qspi )

Get the current interrupt flags.

Parameters
[in] qspi Pointer to QSPI peripheral register block.
Returns
This functions returns the current interrupt flags that are set.

Definition at line 287 of file em_qspi.h .

References QSPI_TypeDef::IRQSTATUS .

void QSPI_ReadConfig ( QSPI_TypeDef * qspi,
const QSPI_ReadConfig_TypeDef * config
)

Configure Read Operations.

Parameters
[in] qspi Pointer to the QSPI peripheral register block.
[in] config Pointer to configuration structure for QSPI read operations.

Definition at line 157 of file em_qspi.c .

References _QSPI_DEVINSTRRDCONFIG_ADDRXFERTYPESTDMODE_SHIFT , _QSPI_DEVINSTRRDCONFIG_DATAXFERTYPEEXTMODE_SHIFT , _QSPI_DEVINSTRRDCONFIG_DUMMYRDCLKCYCLES_SHIFT , _QSPI_DEVINSTRRDCONFIG_INSTRTYPE_SHIFT , _QSPI_DEVINSTRRDCONFIG_RDOPCODENONXIP_SHIFT , QSPI_ReadConfig_TypeDef::addrTransfer , QSPI_ReadConfig_TypeDef::dataTransfer , QSPI_TypeDef::DEVINSTRRDCONFIG , QSPI_ReadConfig_TypeDef::dummyCycles , QSPI_ReadConfig_TypeDef::instTransfer , QSPI_ReadConfig_TypeDef::opCode , and QSPI_WaitForIdle() .

__STATIC_INLINE void QSPI_WaitForIdle ( QSPI_TypeDef * qspi )

Wait for the QSPI to go into idle state.

Parameters
[in] qspi Pointer to QSPI peripheral register block.

Definition at line 222 of file em_qspi.h .

References _QSPI_CONFIG_IDLE_MASK , and QSPI_TypeDef::CONFIG .

Referenced by QSPI_ExecStigCmd() , QSPI_ReadConfig() , and QSPI_WriteConfig() .

void QSPI_WriteConfig ( QSPI_TypeDef * qspi,
const QSPI_WriteConfig_TypeDef * config
)

Configure Write Operations.

Parameters
[in] qspi Pointer to the QSPI peripheral register block.
[in] config Pointer to configuration structure for QSPI write operations.

Definition at line 179 of file em_qspi.c .

References _QSPI_DEVINSTRWRCONFIG_ADDRXFERTYPESTDMODE_SHIFT , _QSPI_DEVINSTRWRCONFIG_DATAXFERTYPEEXTMODE_SHIFT , _QSPI_DEVINSTRWRCONFIG_DUMMYWRCLKCYCLES_SHIFT , _QSPI_DEVINSTRWRCONFIG_WELDIS_SHIFT , _QSPI_DEVINSTRWRCONFIG_WROPCODE_SHIFT , QSPI_WriteConfig_TypeDef::addrTransfer , QSPI_WriteConfig_TypeDef::autoWEL , QSPI_WriteConfig_TypeDef::dataTransfer , QSPI_TypeDef::DEVINSTRWRCONFIG , QSPI_WriteConfig_TypeDef::dummyCycles , QSPI_WriteConfig_TypeDef::opCode , and QSPI_WaitForIdle() .