MSC Bit FieldsDevices > MSC
Macro Definition Documentation
#define _MSC_AAPUNLOCKCMD_MASK 0x00000001UL |
Mask for MSC_AAPUNLOCKCMD
Definition at line 738
of file efm32gg11b_msc.h
.
#define _MSC_AAPUNLOCKCMD_RESETVALUE 0x00000000UL |
Default value for MSC_AAPUNLOCKCMD
Definition at line 737
of file efm32gg11b_msc.h
.
#define _MSC_AAPUNLOCKCMD_UNLOCKAAP_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_AAPUNLOCKCMD
Definition at line 742
of file efm32gg11b_msc.h
.
#define _MSC_AAPUNLOCKCMD_UNLOCKAAP_MASK 0x1UL |
Bit mask for MSC_UNLOCKAAP
Definition at line 741
of file efm32gg11b_msc.h
.
#define _MSC_AAPUNLOCKCMD_UNLOCKAAP_SHIFT 0 |
Shift value for MSC_UNLOCKAAP
Definition at line 740
of file efm32gg11b_msc.h
.
#define _MSC_ADDRB_ADDRB_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_ADDRB
Definition at line 275
of file efm32gg11b_msc.h
.
#define _MSC_ADDRB_ADDRB_MASK 0xFFFFFFFFUL |
Bit mask for MSC_ADDRB
Definition at line 274
of file efm32gg11b_msc.h
.
#define _MSC_ADDRB_ADDRB_SHIFT 0 |
Shift value for MSC_ADDRB
Definition at line 273
of file efm32gg11b_msc.h
.
#define _MSC_ADDRB_MASK 0xFFFFFFFFUL |
Mask for MSC_ADDRB
Definition at line 272
of file efm32gg11b_msc.h
.
#define _MSC_ADDRB_RESETVALUE 0x00000000UL |
Default value for MSC_ADDRB
Definition at line 271
of file efm32gg11b_msc.h
.
#define _MSC_BANKSWITCHLOCK_BANKSWITCHLOCKKEY_DEFAULT 0x00000001UL |
Mode DEFAULT for MSC_BANKSWITCHLOCK
Definition at line 699
of file efm32gg11b_msc.h
.
#define _MSC_BANKSWITCHLOCK_BANKSWITCHLOCKKEY_LOCK 0x00000000UL |
Mode LOCK for MSC_BANKSWITCHLOCK
Definition at line 697
of file efm32gg11b_msc.h
.
#define _MSC_BANKSWITCHLOCK_BANKSWITCHLOCKKEY_LOCKED 0x00000001UL |
Mode LOCKED for MSC_BANKSWITCHLOCK
Definition at line 700
of file efm32gg11b_msc.h
.
#define _MSC_BANKSWITCHLOCK_BANKSWITCHLOCKKEY_MASK 0xFFFFUL |
Bit mask for MSC_BANKSWITCHLOCKKEY
Definition at line 696
of file efm32gg11b_msc.h
.
#define _MSC_BANKSWITCHLOCK_BANKSWITCHLOCKKEY_SHIFT 0 |
Shift value for MSC_BANKSWITCHLOCKKEY
Definition at line 695
of file efm32gg11b_msc.h
.
#define _MSC_BANKSWITCHLOCK_BANKSWITCHLOCKKEY_UNLOCK 0x00007C2BUL |
Mode UNLOCK for MSC_BANKSWITCHLOCK
Definition at line 701
of file efm32gg11b_msc.h
.
#define _MSC_BANKSWITCHLOCK_BANKSWITCHLOCKKEY_UNLOCKED 0x00000000UL |
Mode UNLOCKED for MSC_BANKSWITCHLOCK
Definition at line 698
of file efm32gg11b_msc.h
.
#define _MSC_BANKSWITCHLOCK_MASK 0x0000FFFFUL |
Mask for MSC_BANKSWITCHLOCK
Definition at line 694
of file efm32gg11b_msc.h
.
#define _MSC_BANKSWITCHLOCK_RESETVALUE 0x00000001UL |
Default value for MSC_BANKSWITCHLOCK
Definition at line 693
of file efm32gg11b_msc.h
.
#define _MSC_BOOTLOADERCTRL_BLRDIS_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_BOOTLOADERCTRL
Definition at line 728
of file efm32gg11b_msc.h
.
#define _MSC_BOOTLOADERCTRL_BLRDIS_MASK 0x1UL |
Bit mask for MSC_BLRDIS
Definition at line 727
of file efm32gg11b_msc.h
.
#define _MSC_BOOTLOADERCTRL_BLRDIS_SHIFT 0 |
Shift value for MSC_BLRDIS
Definition at line 726
of file efm32gg11b_msc.h
.
#define _MSC_BOOTLOADERCTRL_BLWDIS_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_BOOTLOADERCTRL
Definition at line 733
of file efm32gg11b_msc.h
.
#define _MSC_BOOTLOADERCTRL_BLWDIS_MASK 0x2UL |
Bit mask for MSC_BLWDIS
Definition at line 732
of file efm32gg11b_msc.h
.
#define _MSC_BOOTLOADERCTRL_BLWDIS_SHIFT 1 |
Shift value for MSC_BLWDIS
Definition at line 731
of file efm32gg11b_msc.h
.
#define _MSC_BOOTLOADERCTRL_MASK 0x00000003UL |
Mask for MSC_BOOTLOADERCTRL
Definition at line 724
of file efm32gg11b_msc.h
.
#define _MSC_BOOTLOADERCTRL_RESETVALUE 0x00000000UL |
Default value for MSC_BOOTLOADERCTRL
Definition at line 723
of file efm32gg11b_msc.h
.
#define _MSC_CACHECMD_INVCACHE_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_CACHECMD
Definition at line 616
of file efm32gg11b_msc.h
.
#define _MSC_CACHECMD_INVCACHE_MASK 0x1UL |
Bit mask for MSC_INVCACHE
Definition at line 615
of file efm32gg11b_msc.h
.
#define _MSC_CACHECMD_INVCACHE_SHIFT 0 |
Shift value for MSC_INVCACHE
Definition at line 614
of file efm32gg11b_msc.h
.
#define _MSC_CACHECMD_MASK 0x00000007UL |
Mask for MSC_CACHECMD
Definition at line 612
of file efm32gg11b_msc.h
.
#define _MSC_CACHECMD_RESETVALUE 0x00000000UL |
Default value for MSC_CACHECMD
Definition at line 611
of file efm32gg11b_msc.h
.
#define _MSC_CACHECMD_STARTPC_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_CACHECMD
Definition at line 621
of file efm32gg11b_msc.h
.
#define _MSC_CACHECMD_STARTPC_MASK 0x2UL |
Bit mask for MSC_STARTPC
Definition at line 620
of file efm32gg11b_msc.h
.
#define _MSC_CACHECMD_STARTPC_SHIFT 1 |
Shift value for MSC_STARTPC
Definition at line 619
of file efm32gg11b_msc.h
.
#define _MSC_CACHECMD_STOPPC_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_CACHECMD
Definition at line 626
of file efm32gg11b_msc.h
.
#define _MSC_CACHECMD_STOPPC_MASK 0x4UL |
Bit mask for MSC_STOPPC
Definition at line 625
of file efm32gg11b_msc.h
.
#define _MSC_CACHECMD_STOPPC_SHIFT 2 |
Shift value for MSC_STOPPC
Definition at line 624
of file efm32gg11b_msc.h
.
#define _MSC_CACHECONFIG0_CACHELPLEVEL_ADVANCED 0x00000001UL |
Mode ADVANCED for MSC_CACHECONFIG0
Definition at line 751
of file efm32gg11b_msc.h
.
#define _MSC_CACHECONFIG0_CACHELPLEVEL_BASE 0x00000000UL |
Mode BASE for MSC_CACHECONFIG0
Definition at line 750
of file efm32gg11b_msc.h
.
#define _MSC_CACHECONFIG0_CACHELPLEVEL_DEFAULT 0x00000003UL |
Mode DEFAULT for MSC_CACHECONFIG0
Definition at line 752
of file efm32gg11b_msc.h
.
#define _MSC_CACHECONFIG0_CACHELPLEVEL_MASK 0x3UL |
Bit mask for MSC_CACHELPLEVEL
Definition at line 749
of file efm32gg11b_msc.h
.
#define _MSC_CACHECONFIG0_CACHELPLEVEL_MINACTIVITY 0x00000003UL |
Mode MINACTIVITY for MSC_CACHECONFIG0
Definition at line 753
of file efm32gg11b_msc.h
.
#define _MSC_CACHECONFIG0_CACHELPLEVEL_SHIFT 0 |
Shift value for MSC_CACHELPLEVEL
Definition at line 748
of file efm32gg11b_msc.h
.
#define _MSC_CACHECONFIG0_MASK 0x00000003UL |
Mask for MSC_CACHECONFIG0
Definition at line 747
of file efm32gg11b_msc.h
.
#define _MSC_CACHECONFIG0_RESETVALUE 0x00000003UL |
Default value for MSC_CACHECONFIG0
Definition at line 746
of file efm32gg11b_msc.h
.
#define _MSC_CACHEHITS_CACHEHITS_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_CACHEHITS
Definition at line 634
of file efm32gg11b_msc.h
.
#define _MSC_CACHEHITS_CACHEHITS_MASK 0xFFFFFUL |
Bit mask for MSC_CACHEHITS
Definition at line 633
of file efm32gg11b_msc.h
.
#define _MSC_CACHEHITS_CACHEHITS_SHIFT 0 |
Shift value for MSC_CACHEHITS
Definition at line 632
of file efm32gg11b_msc.h
.
#define _MSC_CACHEHITS_MASK 0x000FFFFFUL |
Mask for MSC_CACHEHITS
Definition at line 631
of file efm32gg11b_msc.h
.
#define _MSC_CACHEHITS_RESETVALUE 0x00000000UL |
Default value for MSC_CACHEHITS
Definition at line 630
of file efm32gg11b_msc.h
.
#define _MSC_CACHEMISSES_CACHEMISSES_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_CACHEMISSES
Definition at line 642
of file efm32gg11b_msc.h
.
#define _MSC_CACHEMISSES_CACHEMISSES_MASK 0xFFFFFUL |
Bit mask for MSC_CACHEMISSES
Definition at line 641
of file efm32gg11b_msc.h
.
#define _MSC_CACHEMISSES_CACHEMISSES_SHIFT 0 |
Shift value for MSC_CACHEMISSES
Definition at line 640
of file efm32gg11b_msc.h
.
#define _MSC_CACHEMISSES_MASK 0x000FFFFFUL |
Mask for MSC_CACHEMISSES
Definition at line 639
of file efm32gg11b_msc.h
.
#define _MSC_CACHEMISSES_RESETVALUE 0x00000000UL |
Default value for MSC_CACHEMISSES
Definition at line 638
of file efm32gg11b_msc.h
.
#define _MSC_CMD_MASK 0x00000003UL |
Mask for MSC_CMD
Definition at line 710
of file efm32gg11b_msc.h
.
#define _MSC_CMD_PWRUP_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_CMD
Definition at line 714
of file efm32gg11b_msc.h
.
#define _MSC_CMD_PWRUP_MASK 0x1UL |
Bit mask for MSC_PWRUP
Definition at line 713
of file efm32gg11b_msc.h
.
#define _MSC_CMD_PWRUP_SHIFT 0 |
Shift value for MSC_PWRUP
Definition at line 712
of file efm32gg11b_msc.h
.
#define _MSC_CMD_RESETVALUE 0x00000000UL |
Default value for MSC_CMD
Definition at line 709
of file efm32gg11b_msc.h
.
#define _MSC_CMD_SWITCHINGBANK_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_CMD
Definition at line 719
of file efm32gg11b_msc.h
.
#define _MSC_CMD_SWITCHINGBANK_MASK 0x2UL |
Bit mask for MSC_SWITCHINGBANK
Definition at line 718
of file efm32gg11b_msc.h
.
#define _MSC_CMD_SWITCHINGBANK_SHIFT 1 |
Shift value for MSC_SWITCHINGBANK
Definition at line 717
of file efm32gg11b_msc.h
.
#define _MSC_CTRL_ADDRFAULTEN_DEFAULT 0x00000001UL |
Mode DEFAULT for MSC_CTRL
Definition at line 104
of file efm32gg11b_msc.h
.
#define _MSC_CTRL_ADDRFAULTEN_MASK 0x1UL |
Bit mask for MSC_ADDRFAULTEN
Definition at line 103
of file efm32gg11b_msc.h
.
#define _MSC_CTRL_ADDRFAULTEN_SHIFT 0 |
Shift value for MSC_ADDRFAULTEN
Definition at line 102
of file efm32gg11b_msc.h
.
#define _MSC_CTRL_CLKDISFAULTEN_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_CTRL
Definition at line 109
of file efm32gg11b_msc.h
.
#define _MSC_CTRL_CLKDISFAULTEN_MASK 0x2UL |
Bit mask for MSC_CLKDISFAULTEN
Definition at line 108
of file efm32gg11b_msc.h
.
#define _MSC_CTRL_CLKDISFAULTEN_SHIFT 1 |
Shift value for MSC_CLKDISFAULTEN
Definition at line 107
of file efm32gg11b_msc.h
.
#define _MSC_CTRL_EBIFAULTEN_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_CTRL
Definition at line 134
of file efm32gg11b_msc.h
.
#define _MSC_CTRL_EBIFAULTEN_MASK 0x40UL |
Bit mask for MSC_EBIFAULTEN
Definition at line 133
of file efm32gg11b_msc.h
.
#define _MSC_CTRL_EBIFAULTEN_SHIFT 6 |
Shift value for MSC_EBIFAULTEN
Definition at line 132
of file efm32gg11b_msc.h
.
#define _MSC_CTRL_IFCREADCLEAR_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_CTRL
Definition at line 119
of file efm32gg11b_msc.h
.
#define _MSC_CTRL_IFCREADCLEAR_MASK 0x8UL |
Bit mask for MSC_IFCREADCLEAR
Definition at line 118
of file efm32gg11b_msc.h
.
#define _MSC_CTRL_IFCREADCLEAR_SHIFT 3 |
Shift value for MSC_IFCREADCLEAR
Definition at line 117
of file efm32gg11b_msc.h
.
#define _MSC_CTRL_MASK 0x0000107FUL |
Mask for MSC_CTRL
Definition at line 100
of file efm32gg11b_msc.h
.
#define _MSC_CTRL_PWRUPONDEMAND_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_CTRL
Definition at line 114
of file efm32gg11b_msc.h
.
#define _MSC_CTRL_PWRUPONDEMAND_MASK 0x4UL |
Bit mask for MSC_PWRUPONDEMAND
Definition at line 113
of file efm32gg11b_msc.h
.
#define _MSC_CTRL_PWRUPONDEMAND_SHIFT 2 |
Shift value for MSC_PWRUPONDEMAND
Definition at line 112
of file efm32gg11b_msc.h
.
#define _MSC_CTRL_RAMECCERRFAULTEN_DEFAULT 0x00000001UL |
Mode DEFAULT for MSC_CTRL
Definition at line 129
of file efm32gg11b_msc.h
.
#define _MSC_CTRL_RAMECCERRFAULTEN_MASK 0x20UL |
Bit mask for MSC_RAMECCERRFAULTEN
Definition at line 128
of file efm32gg11b_msc.h
.
#define _MSC_CTRL_RAMECCERRFAULTEN_SHIFT 5 |
Shift value for MSC_RAMECCERRFAULTEN
Definition at line 127
of file efm32gg11b_msc.h
.
#define _MSC_CTRL_RESETVALUE 0x00000021UL |
Default value for MSC_CTRL
Definition at line 99
of file efm32gg11b_msc.h
.
#define _MSC_CTRL_TIMEOUTFAULTEN_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_CTRL
Definition at line 124
of file efm32gg11b_msc.h
.
#define _MSC_CTRL_TIMEOUTFAULTEN_MASK 0x10UL |
Bit mask for MSC_TIMEOUTFAULTEN
Definition at line 123
of file efm32gg11b_msc.h
.
#define _MSC_CTRL_TIMEOUTFAULTEN_SHIFT 4 |
Shift value for MSC_TIMEOUTFAULTEN
Definition at line 122
of file efm32gg11b_msc.h
.
#define _MSC_CTRL_WAITMODE_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_CTRL
Definition at line 139
of file efm32gg11b_msc.h
.
#define _MSC_CTRL_WAITMODE_MASK 0x1000UL |
Bit mask for MSC_WAITMODE
Definition at line 138
of file efm32gg11b_msc.h
.
#define _MSC_CTRL_WAITMODE_SHIFT 12 |
Shift value for MSC_WAITMODE
Definition at line 137
of file efm32gg11b_msc.h
.
#define _MSC_CTRL_WAITMODE_WS0 0x00000000UL |
Mode WS0 for MSC_CTRL
Definition at line 140
of file efm32gg11b_msc.h
.
#define _MSC_CTRL_WAITMODE_WS1 0x00000001UL |
Mode WS1 for MSC_CTRL
Definition at line 141
of file efm32gg11b_msc.h
.
#define _MSC_ECCCTRL_MASK 0x0000000FUL |
Mask for MSC_ECCCTRL
Definition at line 810
of file efm32gg11b_msc.h
.
#define _MSC_ECCCTRL_RAM1ECCCHKEN_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_ECCCTRL
Definition at line 829
of file efm32gg11b_msc.h
.
#define _MSC_ECCCTRL_RAM1ECCCHKEN_MASK 0x8UL |
Bit mask for MSC_RAM1ECCCHKEN
Definition at line 828
of file efm32gg11b_msc.h
.
#define _MSC_ECCCTRL_RAM1ECCCHKEN_SHIFT 3 |
Shift value for MSC_RAM1ECCCHKEN
Definition at line 827
of file efm32gg11b_msc.h
.
#define _MSC_ECCCTRL_RAM1ECCEWEN_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_ECCCTRL
Definition at line 824
of file efm32gg11b_msc.h
.
#define _MSC_ECCCTRL_RAM1ECCEWEN_MASK 0x4UL |
Bit mask for MSC_RAM1ECCEWEN
Definition at line 823
of file efm32gg11b_msc.h
.
#define _MSC_ECCCTRL_RAM1ECCEWEN_SHIFT 2 |
Shift value for MSC_RAM1ECCEWEN
Definition at line 822
of file efm32gg11b_msc.h
.
#define _MSC_ECCCTRL_RAMECCCHKEN_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_ECCCTRL
Definition at line 819
of file efm32gg11b_msc.h
.
#define _MSC_ECCCTRL_RAMECCCHKEN_MASK 0x2UL |
Bit mask for MSC_RAMECCCHKEN
Definition at line 818
of file efm32gg11b_msc.h
.
#define _MSC_ECCCTRL_RAMECCCHKEN_SHIFT 1 |
Shift value for MSC_RAMECCCHKEN
Definition at line 817
of file efm32gg11b_msc.h
.
#define _MSC_ECCCTRL_RAMECCEWEN_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_ECCCTRL
Definition at line 814
of file efm32gg11b_msc.h
.
#define _MSC_ECCCTRL_RAMECCEWEN_MASK 0x1UL |
Bit mask for MSC_RAMECCEWEN
Definition at line 813
of file efm32gg11b_msc.h
.
#define _MSC_ECCCTRL_RAMECCEWEN_SHIFT 0 |
Shift value for MSC_RAMECCEWEN
Definition at line 812
of file efm32gg11b_msc.h
.
#define _MSC_ECCCTRL_RESETVALUE 0x00000000UL |
Default value for MSC_ECCCTRL
Definition at line 809
of file efm32gg11b_msc.h
.
#define _MSC_IEN_CHOF_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_IEN
Definition at line 546
of file efm32gg11b_msc.h
.
#define _MSC_IEN_CHOF_MASK 0x4UL |
Bit mask for MSC_CHOF
Definition at line 545
of file efm32gg11b_msc.h
.
#define _MSC_IEN_CHOF_SHIFT 2 |
Shift value for MSC_CHOF
Definition at line 544
of file efm32gg11b_msc.h
.
#define _MSC_IEN_CMOF_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_IEN
Definition at line 551
of file efm32gg11b_msc.h
.
#define _MSC_IEN_CMOF_MASK 0x8UL |
Bit mask for MSC_CMOF
Definition at line 550
of file efm32gg11b_msc.h
.
#define _MSC_IEN_CMOF_SHIFT 3 |
Shift value for MSC_CMOF
Definition at line 549
of file efm32gg11b_msc.h
.
#define _MSC_IEN_ERASE_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_IEN
Definition at line 536
of file efm32gg11b_msc.h
.
#define _MSC_IEN_ERASE_MASK 0x1UL |
Bit mask for MSC_ERASE
Definition at line 535
of file efm32gg11b_msc.h
.
#define _MSC_IEN_ERASE_SHIFT 0 |
Shift value for MSC_ERASE
Definition at line 534
of file efm32gg11b_msc.h
.
#define _MSC_IEN_ICACHERR_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_IEN
Definition at line 561
of file efm32gg11b_msc.h
.
#define _MSC_IEN_ICACHERR_MASK 0x20UL |
Bit mask for MSC_ICACHERR
Definition at line 560
of file efm32gg11b_msc.h
.
#define _MSC_IEN_ICACHERR_SHIFT 5 |
Shift value for MSC_ICACHERR
Definition at line 559
of file efm32gg11b_msc.h
.
#define _MSC_IEN_LVEWRITE_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_IEN
Definition at line 571
of file efm32gg11b_msc.h
.
#define _MSC_IEN_LVEWRITE_MASK 0x100UL |
Bit mask for MSC_LVEWRITE
Definition at line 570
of file efm32gg11b_msc.h
.
#define _MSC_IEN_LVEWRITE_SHIFT 8 |
Shift value for MSC_LVEWRITE
Definition at line 569
of file efm32gg11b_msc.h
.
#define _MSC_IEN_MASK 0x000F017FUL |
Mask for MSC_IEN
Definition at line 532
of file efm32gg11b_msc.h
.
#define _MSC_IEN_PWRUPF_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_IEN
Definition at line 556
of file efm32gg11b_msc.h
.
#define _MSC_IEN_PWRUPF_MASK 0x10UL |
Bit mask for MSC_PWRUPF
Definition at line 555
of file efm32gg11b_msc.h
.
#define _MSC_IEN_PWRUPF_SHIFT 4 |
Shift value for MSC_PWRUPF
Definition at line 554
of file efm32gg11b_msc.h
.
#define _MSC_IEN_RAM1ERR1B_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_IEN
Definition at line 586
of file efm32gg11b_msc.h
.
#define _MSC_IEN_RAM1ERR1B_MASK 0x40000UL |
Bit mask for MSC_RAM1ERR1B
Definition at line 585
of file efm32gg11b_msc.h
.
#define _MSC_IEN_RAM1ERR1B_SHIFT 18 |
Shift value for MSC_RAM1ERR1B
Definition at line 584
of file efm32gg11b_msc.h
.
#define _MSC_IEN_RAM1ERR2B_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_IEN
Definition at line 591
of file efm32gg11b_msc.h
.
#define _MSC_IEN_RAM1ERR2B_MASK 0x80000UL |
Bit mask for MSC_RAM1ERR2B
Definition at line 590
of file efm32gg11b_msc.h
.
#define _MSC_IEN_RAM1ERR2B_SHIFT 19 |
Shift value for MSC_RAM1ERR2B
Definition at line 589
of file efm32gg11b_msc.h
.
#define _MSC_IEN_RAMERR1B_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_IEN
Definition at line 576
of file efm32gg11b_msc.h
.
#define _MSC_IEN_RAMERR1B_MASK 0x10000UL |
Bit mask for MSC_RAMERR1B
Definition at line 575
of file efm32gg11b_msc.h
.
#define _MSC_IEN_RAMERR1B_SHIFT 16 |
Shift value for MSC_RAMERR1B
Definition at line 574
of file efm32gg11b_msc.h
.
#define _MSC_IEN_RAMERR2B_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_IEN
Definition at line 581
of file efm32gg11b_msc.h
.
#define _MSC_IEN_RAMERR2B_MASK 0x20000UL |
Bit mask for MSC_RAMERR2B
Definition at line 580
of file efm32gg11b_msc.h
.
#define _MSC_IEN_RAMERR2B_SHIFT 17 |
Shift value for MSC_RAMERR2B
Definition at line 579
of file efm32gg11b_msc.h
.
#define _MSC_IEN_RESETVALUE 0x00000000UL |
Default value for MSC_IEN
Definition at line 531
of file efm32gg11b_msc.h
.
#define _MSC_IEN_WDATAOV_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_IEN
Definition at line 566
of file efm32gg11b_msc.h
.
#define _MSC_IEN_WDATAOV_MASK 0x40UL |
Bit mask for MSC_WDATAOV
Definition at line 565
of file efm32gg11b_msc.h
.
#define _MSC_IEN_WDATAOV_SHIFT 6 |
Shift value for MSC_WDATAOV
Definition at line 564
of file efm32gg11b_msc.h
.
#define _MSC_IEN_WRITE_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_IEN
Definition at line 541
of file efm32gg11b_msc.h
.
#define _MSC_IEN_WRITE_MASK 0x2UL |
Bit mask for MSC_WRITE
Definition at line 540
of file efm32gg11b_msc.h
.
#define _MSC_IEN_WRITE_SHIFT 1 |
Shift value for MSC_WRITE
Definition at line 539
of file efm32gg11b_msc.h
.
#define _MSC_IF_CHOF_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_IF
Definition at line 354
of file efm32gg11b_msc.h
.
#define _MSC_IF_CHOF_MASK 0x4UL |
Bit mask for MSC_CHOF
Definition at line 353
of file efm32gg11b_msc.h
.
#define _MSC_IF_CHOF_SHIFT 2 |
Shift value for MSC_CHOF
Definition at line 352
of file efm32gg11b_msc.h
.
#define _MSC_IF_CMOF_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_IF
Definition at line 359
of file efm32gg11b_msc.h
.
#define _MSC_IF_CMOF_MASK 0x8UL |
Bit mask for MSC_CMOF
Definition at line 358
of file efm32gg11b_msc.h
.
#define _MSC_IF_CMOF_SHIFT 3 |
Shift value for MSC_CMOF
Definition at line 357
of file efm32gg11b_msc.h
.
#define _MSC_IF_ERASE_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_IF
Definition at line 344
of file efm32gg11b_msc.h
.
#define _MSC_IF_ERASE_MASK 0x1UL |
Bit mask for MSC_ERASE
Definition at line 343
of file efm32gg11b_msc.h
.
#define _MSC_IF_ERASE_SHIFT 0 |
Shift value for MSC_ERASE
Definition at line 342
of file efm32gg11b_msc.h
.
#define _MSC_IF_ICACHERR_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_IF
Definition at line 369
of file efm32gg11b_msc.h
.
#define _MSC_IF_ICACHERR_MASK 0x20UL |
Bit mask for MSC_ICACHERR
Definition at line 368
of file efm32gg11b_msc.h
.
#define _MSC_IF_ICACHERR_SHIFT 5 |
Shift value for MSC_ICACHERR
Definition at line 367
of file efm32gg11b_msc.h
.
#define _MSC_IF_LVEWRITE_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_IF
Definition at line 379
of file efm32gg11b_msc.h
.
#define _MSC_IF_LVEWRITE_MASK 0x100UL |
Bit mask for MSC_LVEWRITE
Definition at line 378
of file efm32gg11b_msc.h
.
#define _MSC_IF_LVEWRITE_SHIFT 8 |
Shift value for MSC_LVEWRITE
Definition at line 377
of file efm32gg11b_msc.h
.
#define _MSC_IF_MASK 0x000F017FUL |
Mask for MSC_IF
Definition at line 340
of file efm32gg11b_msc.h
.
#define _MSC_IF_PWRUPF_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_IF
Definition at line 364
of file efm32gg11b_msc.h
.
#define _MSC_IF_PWRUPF_MASK 0x10UL |
Bit mask for MSC_PWRUPF
Definition at line 363
of file efm32gg11b_msc.h
.
#define _MSC_IF_PWRUPF_SHIFT 4 |
Shift value for MSC_PWRUPF
Definition at line 362
of file efm32gg11b_msc.h
.
#define _MSC_IF_RAM1ERR1B_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_IF
Definition at line 394
of file efm32gg11b_msc.h
.
#define _MSC_IF_RAM1ERR1B_MASK 0x40000UL |
Bit mask for MSC_RAM1ERR1B
Definition at line 393
of file efm32gg11b_msc.h
.
#define _MSC_IF_RAM1ERR1B_SHIFT 18 |
Shift value for MSC_RAM1ERR1B
Definition at line 392
of file efm32gg11b_msc.h
.
#define _MSC_IF_RAM1ERR2B_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_IF
Definition at line 399
of file efm32gg11b_msc.h
.
#define _MSC_IF_RAM1ERR2B_MASK 0x80000UL |
Bit mask for MSC_RAM1ERR2B
Definition at line 398
of file efm32gg11b_msc.h
.
#define _MSC_IF_RAM1ERR2B_SHIFT 19 |
Shift value for MSC_RAM1ERR2B
Definition at line 397
of file efm32gg11b_msc.h
.
#define _MSC_IF_RAMERR1B_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_IF
Definition at line 384
of file efm32gg11b_msc.h
.
#define _MSC_IF_RAMERR1B_MASK 0x10000UL |
Bit mask for MSC_RAMERR1B
Definition at line 383
of file efm32gg11b_msc.h
.
#define _MSC_IF_RAMERR1B_SHIFT 16 |
Shift value for MSC_RAMERR1B
Definition at line 382
of file efm32gg11b_msc.h
.
#define _MSC_IF_RAMERR2B_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_IF
Definition at line 389
of file efm32gg11b_msc.h
.
#define _MSC_IF_RAMERR2B_MASK 0x20000UL |
Bit mask for MSC_RAMERR2B
Definition at line 388
of file efm32gg11b_msc.h
.
#define _MSC_IF_RAMERR2B_SHIFT 17 |
Shift value for MSC_RAMERR2B
Definition at line 387
of file efm32gg11b_msc.h
.
#define _MSC_IF_RESETVALUE 0x00000000UL |
Default value for MSC_IF
Definition at line 339
of file efm32gg11b_msc.h
.
#define _MSC_IF_WDATAOV_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_IF
Definition at line 374
of file efm32gg11b_msc.h
.
#define _MSC_IF_WDATAOV_MASK 0x40UL |
Bit mask for MSC_WDATAOV
Definition at line 373
of file efm32gg11b_msc.h
.
#define _MSC_IF_WDATAOV_SHIFT 6 |
Shift value for MSC_WDATAOV
Definition at line 372
of file efm32gg11b_msc.h
.
#define _MSC_IF_WRITE_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_IF
Definition at line 349
of file efm32gg11b_msc.h
.
#define _MSC_IF_WRITE_MASK 0x2UL |
Bit mask for MSC_WRITE
Definition at line 348
of file efm32gg11b_msc.h
.
#define _MSC_IF_WRITE_SHIFT 1 |
Shift value for MSC_WRITE
Definition at line 347
of file efm32gg11b_msc.h
.
#define _MSC_IFC_CHOF_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_IFC
Definition at line 482
of file efm32gg11b_msc.h
.
#define _MSC_IFC_CHOF_MASK 0x4UL |
Bit mask for MSC_CHOF
Definition at line 481
of file efm32gg11b_msc.h
.
#define _MSC_IFC_CHOF_SHIFT 2 |
Shift value for MSC_CHOF
Definition at line 480
of file efm32gg11b_msc.h
.
#define _MSC_IFC_CMOF_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_IFC
Definition at line 487
of file efm32gg11b_msc.h
.
#define _MSC_IFC_CMOF_MASK 0x8UL |
Bit mask for MSC_CMOF
Definition at line 486
of file efm32gg11b_msc.h
.
#define _MSC_IFC_CMOF_SHIFT 3 |
Shift value for MSC_CMOF
Definition at line 485
of file efm32gg11b_msc.h
.
#define _MSC_IFC_ERASE_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_IFC
Definition at line 472
of file efm32gg11b_msc.h
.
#define _MSC_IFC_ERASE_MASK 0x1UL |
Bit mask for MSC_ERASE
Definition at line 471
of file efm32gg11b_msc.h
.
#define _MSC_IFC_ERASE_SHIFT 0 |
Shift value for MSC_ERASE
Definition at line 470
of file efm32gg11b_msc.h
.
#define _MSC_IFC_ICACHERR_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_IFC
Definition at line 497
of file efm32gg11b_msc.h
.
#define _MSC_IFC_ICACHERR_MASK 0x20UL |
Bit mask for MSC_ICACHERR
Definition at line 496
of file efm32gg11b_msc.h
.
#define _MSC_IFC_ICACHERR_SHIFT 5 |
Shift value for MSC_ICACHERR
Definition at line 495
of file efm32gg11b_msc.h
.
#define _MSC_IFC_LVEWRITE_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_IFC
Definition at line 507
of file efm32gg11b_msc.h
.
#define _MSC_IFC_LVEWRITE_MASK 0x100UL |
Bit mask for MSC_LVEWRITE
Definition at line 506
of file efm32gg11b_msc.h
.
#define _MSC_IFC_LVEWRITE_SHIFT 8 |
Shift value for MSC_LVEWRITE
Definition at line 505
of file efm32gg11b_msc.h
.
#define _MSC_IFC_MASK 0x000F017FUL |
Mask for MSC_IFC
Definition at line 468
of file efm32gg11b_msc.h
.
#define _MSC_IFC_PWRUPF_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_IFC
Definition at line 492
of file efm32gg11b_msc.h
.
#define _MSC_IFC_PWRUPF_MASK 0x10UL |
Bit mask for MSC_PWRUPF
Definition at line 491
of file efm32gg11b_msc.h
.
#define _MSC_IFC_PWRUPF_SHIFT 4 |
Shift value for MSC_PWRUPF
Definition at line 490
of file efm32gg11b_msc.h
.
#define _MSC_IFC_RAM1ERR1B_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_IFC
Definition at line 522
of file efm32gg11b_msc.h
.
#define _MSC_IFC_RAM1ERR1B_MASK 0x40000UL |
Bit mask for MSC_RAM1ERR1B
Definition at line 521
of file efm32gg11b_msc.h
.
#define _MSC_IFC_RAM1ERR1B_SHIFT 18 |
Shift value for MSC_RAM1ERR1B
Definition at line 520
of file efm32gg11b_msc.h
.
#define _MSC_IFC_RAM1ERR2B_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_IFC
Definition at line 527
of file efm32gg11b_msc.h
.
#define _MSC_IFC_RAM1ERR2B_MASK 0x80000UL |
Bit mask for MSC_RAM1ERR2B
Definition at line 526
of file efm32gg11b_msc.h
.
#define _MSC_IFC_RAM1ERR2B_SHIFT 19 |
Shift value for MSC_RAM1ERR2B
Definition at line 525
of file efm32gg11b_msc.h
.
#define _MSC_IFC_RAMERR1B_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_IFC
Definition at line 512
of file efm32gg11b_msc.h
.
#define _MSC_IFC_RAMERR1B_MASK 0x10000UL |
Bit mask for MSC_RAMERR1B
Definition at line 511
of file efm32gg11b_msc.h
.
#define _MSC_IFC_RAMERR1B_SHIFT 16 |
Shift value for MSC_RAMERR1B
Definition at line 510
of file efm32gg11b_msc.h
.
#define _MSC_IFC_RAMERR2B_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_IFC
Definition at line 517
of file efm32gg11b_msc.h
.
#define _MSC_IFC_RAMERR2B_MASK 0x20000UL |
Bit mask for MSC_RAMERR2B
Definition at line 516
of file efm32gg11b_msc.h
.
#define _MSC_IFC_RAMERR2B_SHIFT 17 |
Shift value for MSC_RAMERR2B
Definition at line 515
of file efm32gg11b_msc.h
.
#define _MSC_IFC_RESETVALUE 0x00000000UL |
Default value for MSC_IFC
Definition at line 467
of file efm32gg11b_msc.h
.
#define _MSC_IFC_WDATAOV_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_IFC
Definition at line 502
of file efm32gg11b_msc.h
.
#define _MSC_IFC_WDATAOV_MASK 0x40UL |
Bit mask for MSC_WDATAOV
Definition at line 501
of file efm32gg11b_msc.h
.
#define _MSC_IFC_WDATAOV_SHIFT 6 |
Shift value for MSC_WDATAOV
Definition at line 500
of file efm32gg11b_msc.h
.
#define _MSC_IFC_WRITE_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_IFC
Definition at line 477
of file efm32gg11b_msc.h
.
#define _MSC_IFC_WRITE_MASK 0x2UL |
Bit mask for MSC_WRITE
Definition at line 476
of file efm32gg11b_msc.h
.
#define _MSC_IFC_WRITE_SHIFT 1 |
Shift value for MSC_WRITE
Definition at line 475
of file efm32gg11b_msc.h
.
#define _MSC_IFS_CHOF_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_IFS
Definition at line 418
of file efm32gg11b_msc.h
.
#define _MSC_IFS_CHOF_MASK 0x4UL |
Bit mask for MSC_CHOF
Definition at line 417
of file efm32gg11b_msc.h
.
#define _MSC_IFS_CHOF_SHIFT 2 |
Shift value for MSC_CHOF
Definition at line 416
of file efm32gg11b_msc.h
.
#define _MSC_IFS_CMOF_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_IFS
Definition at line 423
of file efm32gg11b_msc.h
.
#define _MSC_IFS_CMOF_MASK 0x8UL |
Bit mask for MSC_CMOF
Definition at line 422
of file efm32gg11b_msc.h
.
#define _MSC_IFS_CMOF_SHIFT 3 |
Shift value for MSC_CMOF
Definition at line 421
of file efm32gg11b_msc.h
.
#define _MSC_IFS_ERASE_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_IFS
Definition at line 408
of file efm32gg11b_msc.h
.
#define _MSC_IFS_ERASE_MASK 0x1UL |
Bit mask for MSC_ERASE
Definition at line 407
of file efm32gg11b_msc.h
.
#define _MSC_IFS_ERASE_SHIFT 0 |
Shift value for MSC_ERASE
Definition at line 406
of file efm32gg11b_msc.h
.
#define _MSC_IFS_ICACHERR_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_IFS
Definition at line 433
of file efm32gg11b_msc.h
.
#define _MSC_IFS_ICACHERR_MASK 0x20UL |
Bit mask for MSC_ICACHERR
Definition at line 432
of file efm32gg11b_msc.h
.
#define _MSC_IFS_ICACHERR_SHIFT 5 |
Shift value for MSC_ICACHERR
Definition at line 431
of file efm32gg11b_msc.h
.
#define _MSC_IFS_LVEWRITE_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_IFS
Definition at line 443
of file efm32gg11b_msc.h
.
#define _MSC_IFS_LVEWRITE_MASK 0x100UL |
Bit mask for MSC_LVEWRITE
Definition at line 442
of file efm32gg11b_msc.h
.
#define _MSC_IFS_LVEWRITE_SHIFT 8 |
Shift value for MSC_LVEWRITE
Definition at line 441
of file efm32gg11b_msc.h
.
#define _MSC_IFS_MASK 0x000F017FUL |
Mask for MSC_IFS
Definition at line 404
of file efm32gg11b_msc.h
.
#define _MSC_IFS_PWRUPF_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_IFS
Definition at line 428
of file efm32gg11b_msc.h
.
#define _MSC_IFS_PWRUPF_MASK 0x10UL |
Bit mask for MSC_PWRUPF
Definition at line 427
of file efm32gg11b_msc.h
.
#define _MSC_IFS_PWRUPF_SHIFT 4 |
Shift value for MSC_PWRUPF
Definition at line 426
of file efm32gg11b_msc.h
.
#define _MSC_IFS_RAM1ERR1B_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_IFS
Definition at line 458
of file efm32gg11b_msc.h
.
#define _MSC_IFS_RAM1ERR1B_MASK 0x40000UL |
Bit mask for MSC_RAM1ERR1B
Definition at line 457
of file efm32gg11b_msc.h
.
#define _MSC_IFS_RAM1ERR1B_SHIFT 18 |
Shift value for MSC_RAM1ERR1B
Definition at line 456
of file efm32gg11b_msc.h
.
#define _MSC_IFS_RAM1ERR2B_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_IFS
Definition at line 463
of file efm32gg11b_msc.h
.
#define _MSC_IFS_RAM1ERR2B_MASK 0x80000UL |
Bit mask for MSC_RAM1ERR2B
Definition at line 462
of file efm32gg11b_msc.h
.
#define _MSC_IFS_RAM1ERR2B_SHIFT 19 |
Shift value for MSC_RAM1ERR2B
Definition at line 461
of file efm32gg11b_msc.h
.
#define _MSC_IFS_RAMERR1B_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_IFS
Definition at line 448
of file efm32gg11b_msc.h
.
#define _MSC_IFS_RAMERR1B_MASK 0x10000UL |
Bit mask for MSC_RAMERR1B
Definition at line 447
of file efm32gg11b_msc.h
.
#define _MSC_IFS_RAMERR1B_SHIFT 16 |
Shift value for MSC_RAMERR1B
Definition at line 446
of file efm32gg11b_msc.h
.
#define _MSC_IFS_RAMERR2B_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_IFS
Definition at line 453
of file efm32gg11b_msc.h
.
#define _MSC_IFS_RAMERR2B_MASK 0x20000UL |
Bit mask for MSC_RAMERR2B
Definition at line 452
of file efm32gg11b_msc.h
.
#define _MSC_IFS_RAMERR2B_SHIFT 17 |
Shift value for MSC_RAMERR2B
Definition at line 451
of file efm32gg11b_msc.h
.
#define _MSC_IFS_RESETVALUE 0x00000000UL |
Default value for MSC_IFS
Definition at line 403
of file efm32gg11b_msc.h
.
#define _MSC_IFS_WDATAOV_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_IFS
Definition at line 438
of file efm32gg11b_msc.h
.
#define _MSC_IFS_WDATAOV_MASK 0x40UL |
Bit mask for MSC_WDATAOV
Definition at line 437
of file efm32gg11b_msc.h
.
#define _MSC_IFS_WDATAOV_SHIFT 6 |
Shift value for MSC_WDATAOV
Definition at line 436
of file efm32gg11b_msc.h
.
#define _MSC_IFS_WRITE_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_IFS
Definition at line 413
of file efm32gg11b_msc.h
.
#define _MSC_IFS_WRITE_MASK 0x2UL |
Bit mask for MSC_WRITE
Definition at line 412
of file efm32gg11b_msc.h
.
#define _MSC_IFS_WRITE_SHIFT 1 |
Shift value for MSC_WRITE
Definition at line 411
of file efm32gg11b_msc.h
.
#define _MSC_LOCK_LOCKKEY_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_LOCK
Definition at line 599
of file efm32gg11b_msc.h
.
#define _MSC_LOCK_LOCKKEY_LOCK 0x00000000UL |
Mode LOCK for MSC_LOCK
Definition at line 600
of file efm32gg11b_msc.h
.
#define _MSC_LOCK_LOCKKEY_LOCKED 0x00000001UL |
Mode LOCKED for MSC_LOCK
Definition at line 602
of file efm32gg11b_msc.h
.
#define _MSC_LOCK_LOCKKEY_MASK 0xFFFFUL |
Bit mask for MSC_LOCKKEY
Definition at line 598
of file efm32gg11b_msc.h
.
#define _MSC_LOCK_LOCKKEY_SHIFT 0 |
Shift value for MSC_LOCKKEY
Definition at line 597
of file efm32gg11b_msc.h
.
#define _MSC_LOCK_LOCKKEY_UNLOCK 0x00001B71UL |
Mode UNLOCK for MSC_LOCK
Definition at line 603
of file efm32gg11b_msc.h
.
#define _MSC_LOCK_LOCKKEY_UNLOCKED 0x00000000UL |
Mode UNLOCKED for MSC_LOCK
Definition at line 601
of file efm32gg11b_msc.h
.
#define _MSC_LOCK_MASK 0x0000FFFFUL |
Mask for MSC_LOCK
Definition at line 596
of file efm32gg11b_msc.h
.
#define _MSC_LOCK_RESETVALUE 0x00000000UL |
Default value for MSC_LOCK
Definition at line 595
of file efm32gg11b_msc.h
.
#define _MSC_MASSLOCK_LOCKKEY_DEFAULT 0x00000001UL |
Mode DEFAULT for MSC_MASSLOCK
Definition at line 652
of file efm32gg11b_msc.h
.
#define _MSC_MASSLOCK_LOCKKEY_LOCK 0x00000000UL |
Mode LOCK for MSC_MASSLOCK
Definition at line 650
of file efm32gg11b_msc.h
.
#define _MSC_MASSLOCK_LOCKKEY_LOCKED 0x00000001UL |
Mode LOCKED for MSC_MASSLOCK
Definition at line 653
of file efm32gg11b_msc.h
.
#define _MSC_MASSLOCK_LOCKKEY_MASK 0xFFFFUL |
Bit mask for MSC_LOCKKEY
Definition at line 649
of file efm32gg11b_msc.h
.
#define _MSC_MASSLOCK_LOCKKEY_SHIFT 0 |
Shift value for MSC_LOCKKEY
Definition at line 648
of file efm32gg11b_msc.h
.
#define _MSC_MASSLOCK_LOCKKEY_UNLOCK 0x0000631AUL |
Mode UNLOCK for MSC_MASSLOCK
Definition at line 654
of file efm32gg11b_msc.h
.
#define _MSC_MASSLOCK_LOCKKEY_UNLOCKED 0x00000000UL |
Mode UNLOCKED for MSC_MASSLOCK
Definition at line 651
of file efm32gg11b_msc.h
.
#define _MSC_MASSLOCK_MASK 0x0000FFFFUL |
Mask for MSC_MASSLOCK
Definition at line 647
of file efm32gg11b_msc.h
.
#define _MSC_MASSLOCK_RESETVALUE 0x00000001UL |
Default value for MSC_MASSLOCK
Definition at line 646
of file efm32gg11b_msc.h
.
#define _MSC_RAM1ECCADDR_MASK 0xFFFFFFFFUL |
Mask for MSC_RAM1ECCADDR
Definition at line 842
of file efm32gg11b_msc.h
.
#define _MSC_RAM1ECCADDR_RAM1ECCADDR_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_RAM1ECCADDR
Definition at line 845
of file efm32gg11b_msc.h
.
#define _MSC_RAM1ECCADDR_RAM1ECCADDR_MASK 0xFFFFFFFFUL |
Bit mask for MSC_RAM1ECCADDR
Definition at line 844
of file efm32gg11b_msc.h
.
#define _MSC_RAM1ECCADDR_RAM1ECCADDR_SHIFT 0 |
Shift value for MSC_RAM1ECCADDR
Definition at line 843
of file efm32gg11b_msc.h
.
#define _MSC_RAM1ECCADDR_RESETVALUE 0x00000000UL |
Default value for MSC_RAM1ECCADDR
Definition at line 841
of file efm32gg11b_msc.h
.
#define _MSC_RAMCTRL_MASK 0x00070707UL |
Mask for MSC_RAMCTRL
Definition at line 761
of file efm32gg11b_msc.h
.
#define _MSC_RAMCTRL_RAM1CACHEEN_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_RAMCTRL
Definition at line 780
of file efm32gg11b_msc.h
.
#define _MSC_RAMCTRL_RAM1CACHEEN_MASK 0x100UL |
Bit mask for MSC_RAM1CACHEEN
Definition at line 779
of file efm32gg11b_msc.h
.
#define _MSC_RAMCTRL_RAM1CACHEEN_SHIFT 8 |
Shift value for MSC_RAM1CACHEEN
Definition at line 778
of file efm32gg11b_msc.h
.
#define _MSC_RAMCTRL_RAM1PREFETCHEN_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_RAMCTRL
Definition at line 790
of file efm32gg11b_msc.h
.
#define _MSC_RAMCTRL_RAM1PREFETCHEN_MASK 0x400UL |
Bit mask for MSC_RAM1PREFETCHEN
Definition at line 789
of file efm32gg11b_msc.h
.
#define _MSC_RAMCTRL_RAM1PREFETCHEN_SHIFT 10 |
Shift value for MSC_RAM1PREFETCHEN
Definition at line 788
of file efm32gg11b_msc.h
.
#define _MSC_RAMCTRL_RAM1WSEN_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_RAMCTRL
Definition at line 785
of file efm32gg11b_msc.h
.
#define _MSC_RAMCTRL_RAM1WSEN_MASK 0x200UL |
Bit mask for MSC_RAM1WSEN
Definition at line 784
of file efm32gg11b_msc.h
.
#define _MSC_RAMCTRL_RAM1WSEN_SHIFT 9 |
Shift value for MSC_RAM1WSEN
Definition at line 783
of file efm32gg11b_msc.h
.
#define _MSC_RAMCTRL_RAM2CACHEEN_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_RAMCTRL
Definition at line 795
of file efm32gg11b_msc.h
.
#define _MSC_RAMCTRL_RAM2CACHEEN_MASK 0x10000UL |
Bit mask for MSC_RAM2CACHEEN
Definition at line 794
of file efm32gg11b_msc.h
.
#define _MSC_RAMCTRL_RAM2CACHEEN_SHIFT 16 |
Shift value for MSC_RAM2CACHEEN
Definition at line 793
of file efm32gg11b_msc.h
.
#define _MSC_RAMCTRL_RAM2PREFETCHEN_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_RAMCTRL
Definition at line 805
of file efm32gg11b_msc.h
.
#define _MSC_RAMCTRL_RAM2PREFETCHEN_MASK 0x40000UL |
Bit mask for MSC_RAM2PREFETCHEN
Definition at line 804
of file efm32gg11b_msc.h
.
#define _MSC_RAMCTRL_RAM2PREFETCHEN_SHIFT 18 |
Shift value for MSC_RAM2PREFETCHEN
Definition at line 803
of file efm32gg11b_msc.h
.
#define _MSC_RAMCTRL_RAM2WSEN_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_RAMCTRL
Definition at line 800
of file efm32gg11b_msc.h
.
#define _MSC_RAMCTRL_RAM2WSEN_MASK 0x20000UL |
Bit mask for MSC_RAM2WSEN
Definition at line 799
of file efm32gg11b_msc.h
.
#define _MSC_RAMCTRL_RAM2WSEN_SHIFT 17 |
Shift value for MSC_RAM2WSEN
Definition at line 798
of file efm32gg11b_msc.h
.
#define _MSC_RAMCTRL_RAMCACHEEN_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_RAMCTRL
Definition at line 765
of file efm32gg11b_msc.h
.
#define _MSC_RAMCTRL_RAMCACHEEN_MASK 0x1UL |
Bit mask for MSC_RAMCACHEEN
Definition at line 764
of file efm32gg11b_msc.h
.
#define _MSC_RAMCTRL_RAMCACHEEN_SHIFT 0 |
Shift value for MSC_RAMCACHEEN
Definition at line 763
of file efm32gg11b_msc.h
.
#define _MSC_RAMCTRL_RAMPREFETCHEN_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_RAMCTRL
Definition at line 775
of file efm32gg11b_msc.h
.
#define _MSC_RAMCTRL_RAMPREFETCHEN_MASK 0x4UL |
Bit mask for MSC_RAMPREFETCHEN
Definition at line 774
of file efm32gg11b_msc.h
.
#define _MSC_RAMCTRL_RAMPREFETCHEN_SHIFT 2 |
Shift value for MSC_RAMPREFETCHEN
Definition at line 773
of file efm32gg11b_msc.h
.
#define _MSC_RAMCTRL_RAMWSEN_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_RAMCTRL
Definition at line 770
of file efm32gg11b_msc.h
.
#define _MSC_RAMCTRL_RAMWSEN_MASK 0x2UL |
Bit mask for MSC_RAMWSEN
Definition at line 769
of file efm32gg11b_msc.h
.
#define _MSC_RAMCTRL_RAMWSEN_SHIFT 1 |
Shift value for MSC_RAMWSEN
Definition at line 768
of file efm32gg11b_msc.h
.
#define _MSC_RAMCTRL_RESETVALUE 0x00000000UL |
Default value for MSC_RAMCTRL
Definition at line 760
of file efm32gg11b_msc.h
.
#define _MSC_RAMECCADDR_MASK 0xFFFFFFFFUL |
Mask for MSC_RAMECCADDR
Definition at line 834
of file efm32gg11b_msc.h
.
#define _MSC_RAMECCADDR_RAMECCADDR_DEFAULT 0x20000000UL |
Mode DEFAULT for MSC_RAMECCADDR
Definition at line 837
of file efm32gg11b_msc.h
.
#define _MSC_RAMECCADDR_RAMECCADDR_MASK 0xFFFFFFFFUL |
Bit mask for MSC_RAMECCADDR
Definition at line 836
of file efm32gg11b_msc.h
.
#define _MSC_RAMECCADDR_RAMECCADDR_SHIFT 0 |
Shift value for MSC_RAMECCADDR
Definition at line 835
of file efm32gg11b_msc.h
.
#define _MSC_RAMECCADDR_RESETVALUE 0x20000000UL |
Default value for MSC_RAMECCADDR
Definition at line 833
of file efm32gg11b_msc.h
.
#define _MSC_READCTRL_AIDIS_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_READCTRL
Definition at line 157
of file efm32gg11b_msc.h
.
#define _MSC_READCTRL_AIDIS_MASK 0x10UL |
Bit mask for MSC_AIDIS
Definition at line 156
of file efm32gg11b_msc.h
.
#define _MSC_READCTRL_AIDIS_SHIFT 4 |
Shift value for MSC_AIDIS
Definition at line 155
of file efm32gg11b_msc.h
.
Referenced by MSC_EnableAutoCacheFlush().
#define _MSC_READCTRL_EBICDIS_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_READCTRL
Definition at line 167
of file efm32gg11b_msc.h
.
#define _MSC_READCTRL_EBICDIS_MASK 0x40UL |
Bit mask for MSC_EBICDIS
Definition at line 166
of file efm32gg11b_msc.h
.
#define _MSC_READCTRL_EBICDIS_SHIFT 6 |
Shift value for MSC_EBICDIS
Definition at line 165
of file efm32gg11b_msc.h
.
#define _MSC_READCTRL_ICCDIS_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_READCTRL
Definition at line 162
of file efm32gg11b_msc.h
.
#define _MSC_READCTRL_ICCDIS_MASK 0x20UL |
Bit mask for MSC_ICCDIS
Definition at line 161
of file efm32gg11b_msc.h
.
#define _MSC_READCTRL_ICCDIS_SHIFT 5 |
Shift value for MSC_ICCDIS
Definition at line 160
of file efm32gg11b_msc.h
.
Referenced by MSC_EnableCacheIRQs().
#define _MSC_READCTRL_IFCDIS_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_READCTRL
Definition at line 152
of file efm32gg11b_msc.h
.
#define _MSC_READCTRL_IFCDIS_MASK 0x8UL |
Bit mask for MSC_IFCDIS
Definition at line 151
of file efm32gg11b_msc.h
.
#define _MSC_READCTRL_IFCDIS_SHIFT 3 |
Shift value for MSC_IFCDIS
Definition at line 150
of file efm32gg11b_msc.h
.
Referenced by MSC_EnableCache().
#define _MSC_READCTRL_MASK 0x13000778UL |
Mask for MSC_READCTRL
Definition at line 148
of file efm32gg11b_msc.h
.
#define _MSC_READCTRL_MODE_DEFAULT 0x00000001UL |
Mode DEFAULT for MSC_READCTRL
Definition at line 187
of file efm32gg11b_msc.h
.
#define _MSC_READCTRL_MODE_MASK 0x3000000UL |
Bit mask for MSC_MODE
Definition at line 185
of file efm32gg11b_msc.h
.
Referenced by MSC_ExecConfigSet().
#define _MSC_READCTRL_MODE_SHIFT 24 |
Shift value for MSC_MODE
Definition at line 184
of file efm32gg11b_msc.h
.
#define _MSC_READCTRL_MODE_WS0 0x00000000UL |
Mode WS0 for MSC_READCTRL
Definition at line 186
of file efm32gg11b_msc.h
.
#define _MSC_READCTRL_MODE_WS1 0x00000001UL |
Mode WS1 for MSC_READCTRL
Definition at line 188
of file efm32gg11b_msc.h
.
#define _MSC_READCTRL_MODE_WS2 0x00000002UL |
Mode WS2 for MSC_READCTRL
Definition at line 189
of file efm32gg11b_msc.h
.
#define _MSC_READCTRL_MODE_WS3 0x00000003UL |
Mode WS3 for MSC_READCTRL
Definition at line 190
of file efm32gg11b_msc.h
.
#define _MSC_READCTRL_PREFETCH_DEFAULT 0x00000001UL |
Mode DEFAULT for MSC_READCTRL
Definition at line 172
of file efm32gg11b_msc.h
.
#define _MSC_READCTRL_PREFETCH_MASK 0x100UL |
Bit mask for MSC_PREFETCH
Definition at line 171
of file efm32gg11b_msc.h
.
#define _MSC_READCTRL_PREFETCH_SHIFT 8 |
Shift value for MSC_PREFETCH
Definition at line 170
of file efm32gg11b_msc.h
.
#define _MSC_READCTRL_QSPICDIS_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_READCTRL
Definition at line 182
of file efm32gg11b_msc.h
.
#define _MSC_READCTRL_QSPICDIS_MASK 0x400UL |
Bit mask for MSC_QSPICDIS
Definition at line 181
of file efm32gg11b_msc.h
.
#define _MSC_READCTRL_QSPICDIS_SHIFT 10 |
Shift value for MSC_QSPICDIS
Definition at line 180
of file efm32gg11b_msc.h
.
#define _MSC_READCTRL_RESETVALUE 0x01000100UL |
Default value for MSC_READCTRL
Definition at line 147
of file efm32gg11b_msc.h
.
#define _MSC_READCTRL_SCBTP_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_READCTRL
Definition at line 199
of file efm32gg11b_msc.h
.
#define _MSC_READCTRL_SCBTP_MASK 0x10000000UL |
Bit mask for MSC_SCBTP
Definition at line 198
of file efm32gg11b_msc.h
.
#define _MSC_READCTRL_SCBTP_SHIFT 28 |
Shift value for MSC_SCBTP
Definition at line 197
of file efm32gg11b_msc.h
.
#define _MSC_READCTRL_USEHPROT_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_READCTRL
Definition at line 177
of file efm32gg11b_msc.h
.
#define _MSC_READCTRL_USEHPROT_MASK 0x200UL |
Bit mask for MSC_USEHPROT
Definition at line 176
of file efm32gg11b_msc.h
.
#define _MSC_READCTRL_USEHPROT_SHIFT 9 |
Shift value for MSC_USEHPROT
Definition at line 175
of file efm32gg11b_msc.h
.
#define _MSC_STARTUP_ASTWAIT_DEFAULT 0x00000001UL |
Mode DEFAULT for MSC_STARTUP
Definition at line 675
of file efm32gg11b_msc.h
.
#define _MSC_STARTUP_ASTWAIT_MASK 0x1000000UL |
Bit mask for MSC_ASTWAIT
Definition at line 674
of file efm32gg11b_msc.h
.
#define _MSC_STARTUP_ASTWAIT_SHIFT 24 |
Shift value for MSC_ASTWAIT
Definition at line 673
of file efm32gg11b_msc.h
.
#define _MSC_STARTUP_MASK 0x773FF3FFUL |
Mask for MSC_STARTUP
Definition at line 663
of file efm32gg11b_msc.h
.
#define _MSC_STARTUP_RESETVALUE 0x13001054UL |
Default value for MSC_STARTUP
Definition at line 662
of file efm32gg11b_msc.h
.
#define _MSC_STARTUP_STDLY0_DEFAULT 0x00000054UL |
Mode DEFAULT for MSC_STARTUP
Definition at line 666
of file efm32gg11b_msc.h
.
#define _MSC_STARTUP_STDLY0_MASK 0x3FFUL |
Bit mask for MSC_STDLY0
Definition at line 665
of file efm32gg11b_msc.h
.
#define _MSC_STARTUP_STDLY0_SHIFT 0 |
Shift value for MSC_STDLY0
Definition at line 664
of file efm32gg11b_msc.h
.
#define _MSC_STARTUP_STDLY1_DEFAULT 0x00000001UL |
Mode DEFAULT for MSC_STARTUP
Definition at line 670
of file efm32gg11b_msc.h
.
#define _MSC_STARTUP_STDLY1_MASK 0x3FF000UL |
Bit mask for MSC_STDLY1
Definition at line 669
of file efm32gg11b_msc.h
.
#define _MSC_STARTUP_STDLY1_SHIFT 12 |
Shift value for MSC_STDLY1
Definition at line 668
of file efm32gg11b_msc.h
.
#define _MSC_STARTUP_STWS_DEFAULT 0x00000001UL |
Mode DEFAULT for MSC_STARTUP
Definition at line 689
of file efm32gg11b_msc.h
.
#define _MSC_STARTUP_STWS_MASK 0x70000000UL |
Bit mask for MSC_STWS
Definition at line 688
of file efm32gg11b_msc.h
.
#define _MSC_STARTUP_STWS_SHIFT 28 |
Shift value for MSC_STWS
Definition at line 687
of file efm32gg11b_msc.h
.
#define _MSC_STARTUP_STWSAEN_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_STARTUP
Definition at line 685
of file efm32gg11b_msc.h
.
#define _MSC_STARTUP_STWSAEN_MASK 0x4000000UL |
Bit mask for MSC_STWSAEN
Definition at line 684
of file efm32gg11b_msc.h
.
#define _MSC_STARTUP_STWSAEN_SHIFT 26 |
Shift value for MSC_STWSAEN
Definition at line 683
of file efm32gg11b_msc.h
.
#define _MSC_STARTUP_STWSEN_DEFAULT 0x00000001UL |
Mode DEFAULT for MSC_STARTUP
Definition at line 680
of file efm32gg11b_msc.h
.
#define _MSC_STARTUP_STWSEN_MASK 0x2000000UL |
Bit mask for MSC_STWSEN
Definition at line 679
of file efm32gg11b_msc.h
.
#define _MSC_STARTUP_STWSEN_SHIFT 25 |
Shift value for MSC_STWSEN
Definition at line 678
of file efm32gg11b_msc.h
.
#define _MSC_STATUS_BANKSWITCHED_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_STATUS
Definition at line 327
of file efm32gg11b_msc.h
.
#define _MSC_STATUS_BANKSWITCHED_MASK 0x80UL |
Bit mask for MSC_BANKSWITCHED
Definition at line 326
of file efm32gg11b_msc.h
.
#define _MSC_STATUS_BANKSWITCHED_SHIFT 7 |
Shift value for MSC_BANKSWITCHED
Definition at line 325
of file efm32gg11b_msc.h
.
#define _MSC_STATUS_BUSY_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_STATUS
Definition at line 292
of file efm32gg11b_msc.h
.
#define _MSC_STATUS_BUSY_MASK 0x1UL |
Bit mask for MSC_BUSY
Definition at line 291
of file efm32gg11b_msc.h
.
#define _MSC_STATUS_BUSY_SHIFT 0 |
Shift value for MSC_BUSY
Definition at line 290
of file efm32gg11b_msc.h
.
#define _MSC_STATUS_ERASEABORTED_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_STATUS
Definition at line 317
of file efm32gg11b_msc.h
.
#define _MSC_STATUS_ERASEABORTED_MASK 0x20UL |
Bit mask for MSC_ERASEABORTED
Definition at line 316
of file efm32gg11b_msc.h
.
#define _MSC_STATUS_ERASEABORTED_SHIFT 5 |
Shift value for MSC_ERASEABORTED
Definition at line 315
of file efm32gg11b_msc.h
.
#define _MSC_STATUS_INVADDR_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_STATUS
Definition at line 302
of file efm32gg11b_msc.h
.
#define _MSC_STATUS_INVADDR_MASK 0x4UL |
Bit mask for MSC_INVADDR
Definition at line 301
of file efm32gg11b_msc.h
.
#define _MSC_STATUS_INVADDR_SHIFT 2 |
Shift value for MSC_INVADDR
Definition at line 300
of file efm32gg11b_msc.h
.
#define _MSC_STATUS_LOCKED_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_STATUS
Definition at line 297
of file efm32gg11b_msc.h
.
#define _MSC_STATUS_LOCKED_MASK 0x2UL |
Bit mask for MSC_LOCKED
Definition at line 296
of file efm32gg11b_msc.h
.
#define _MSC_STATUS_LOCKED_SHIFT 1 |
Shift value for MSC_LOCKED
Definition at line 295
of file efm32gg11b_msc.h
.
#define _MSC_STATUS_MASK 0xFF0000FFUL |
Mask for MSC_STATUS
Definition at line 288
of file efm32gg11b_msc.h
.
#define _MSC_STATUS_PCRUNNING_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_STATUS
Definition at line 322
of file efm32gg11b_msc.h
.
#define _MSC_STATUS_PCRUNNING_MASK 0x40UL |
Bit mask for MSC_PCRUNNING
Definition at line 321
of file efm32gg11b_msc.h
.
#define _MSC_STATUS_PCRUNNING_SHIFT 6 |
Shift value for MSC_PCRUNNING
Definition at line 320
of file efm32gg11b_msc.h
.
#define _MSC_STATUS_PWRUPCKBDFAILCOUNT_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_STATUS
Definition at line 335
of file efm32gg11b_msc.h
.
#define _MSC_STATUS_PWRUPCKBDFAILCOUNT_MASK 0xF0000000UL |
Bit mask for MSC_PWRUPCKBDFAILCOUNT
Definition at line 334
of file efm32gg11b_msc.h
.
#define _MSC_STATUS_PWRUPCKBDFAILCOUNT_SHIFT 28 |
Shift value for MSC_PWRUPCKBDFAILCOUNT
Definition at line 333
of file efm32gg11b_msc.h
.
#define _MSC_STATUS_RESETVALUE 0x00000008UL |
Default value for MSC_STATUS
Definition at line 287
of file efm32gg11b_msc.h
.
#define _MSC_STATUS_WDATAREADY_DEFAULT 0x00000001UL |
Mode DEFAULT for MSC_STATUS
Definition at line 307
of file efm32gg11b_msc.h
.
#define _MSC_STATUS_WDATAREADY_MASK 0x8UL |
Bit mask for MSC_WDATAREADY
Definition at line 306
of file efm32gg11b_msc.h
.
#define _MSC_STATUS_WDATAREADY_SHIFT 3 |
Shift value for MSC_WDATAREADY
Definition at line 305
of file efm32gg11b_msc.h
.
#define _MSC_STATUS_WDATAVALID_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_STATUS
Definition at line 331
of file efm32gg11b_msc.h
.
#define _MSC_STATUS_WDATAVALID_MASK 0xF000000UL |
Bit mask for MSC_WDATAVALID
Definition at line 330
of file efm32gg11b_msc.h
.
#define _MSC_STATUS_WDATAVALID_SHIFT 24 |
Shift value for MSC_WDATAVALID
Definition at line 329
of file efm32gg11b_msc.h
.
#define _MSC_STATUS_WORDTIMEOUT_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_STATUS
Definition at line 312
of file efm32gg11b_msc.h
.
#define _MSC_STATUS_WORDTIMEOUT_MASK 0x10UL |
Bit mask for MSC_WORDTIMEOUT
Definition at line 311
of file efm32gg11b_msc.h
.
#define _MSC_STATUS_WORDTIMEOUT_SHIFT 4 |
Shift value for MSC_WORDTIMEOUT
Definition at line 310
of file efm32gg11b_msc.h
.
#define _MSC_WDATA_MASK 0xFFFFFFFFUL |
Mask for MSC_WDATA
Definition at line 280
of file efm32gg11b_msc.h
.
#define _MSC_WDATA_RESETVALUE 0x00000000UL |
Default value for MSC_WDATA
Definition at line 279
of file efm32gg11b_msc.h
.
#define _MSC_WDATA_WDATA_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_WDATA
Definition at line 283
of file efm32gg11b_msc.h
.
#define _MSC_WDATA_WDATA_MASK 0xFFFFFFFFUL |
Bit mask for MSC_WDATA
Definition at line 282
of file efm32gg11b_msc.h
.
#define _MSC_WDATA_WDATA_SHIFT 0 |
Shift value for MSC_WDATA
Definition at line 281
of file efm32gg11b_msc.h
.
#define _MSC_WRITECMD_CLEARWDATA_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_WRITECMD
Definition at line 267
of file efm32gg11b_msc.h
.
#define _MSC_WRITECMD_CLEARWDATA_MASK 0x1000UL |
Bit mask for MSC_CLEARWDATA
Definition at line 266
of file efm32gg11b_msc.h
.
#define _MSC_WRITECMD_CLEARWDATA_SHIFT 12 |
Shift value for MSC_CLEARWDATA
Definition at line 265
of file efm32gg11b_msc.h
.
#define _MSC_WRITECMD_ERASEABORT_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_WRITECMD
Definition at line 252
of file efm32gg11b_msc.h
.
#define _MSC_WRITECMD_ERASEABORT_MASK 0x20UL |
Bit mask for MSC_ERASEABORT
Definition at line 251
of file efm32gg11b_msc.h
.
#define _MSC_WRITECMD_ERASEABORT_SHIFT 5 |
Shift value for MSC_ERASEABORT
Definition at line 250
of file efm32gg11b_msc.h
.
#define _MSC_WRITECMD_ERASEMAIN0_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_WRITECMD
Definition at line 257
of file efm32gg11b_msc.h
.
#define _MSC_WRITECMD_ERASEMAIN0_MASK 0x100UL |
Bit mask for MSC_ERASEMAIN0
Definition at line 256
of file efm32gg11b_msc.h
.
#define _MSC_WRITECMD_ERASEMAIN0_SHIFT 8 |
Shift value for MSC_ERASEMAIN0
Definition at line 255
of file efm32gg11b_msc.h
.
#define _MSC_WRITECMD_ERASEMAIN1_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_WRITECMD
Definition at line 262
of file efm32gg11b_msc.h
.
#define _MSC_WRITECMD_ERASEMAIN1_MASK 0x200UL |
Bit mask for MSC_ERASEMAIN1
Definition at line 261
of file efm32gg11b_msc.h
.
#define _MSC_WRITECMD_ERASEMAIN1_SHIFT 9 |
Shift value for MSC_ERASEMAIN1
Definition at line 260
of file efm32gg11b_msc.h
.
#define _MSC_WRITECMD_ERASEPAGE_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_WRITECMD
Definition at line 232
of file efm32gg11b_msc.h
.
#define _MSC_WRITECMD_ERASEPAGE_MASK 0x2UL |
Bit mask for MSC_ERASEPAGE
Definition at line 231
of file efm32gg11b_msc.h
.
#define _MSC_WRITECMD_ERASEPAGE_SHIFT 1 |
Shift value for MSC_ERASEPAGE
Definition at line 230
of file efm32gg11b_msc.h
.
#define _MSC_WRITECMD_LADDRIM_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_WRITECMD
Definition at line 227
of file efm32gg11b_msc.h
.
#define _MSC_WRITECMD_LADDRIM_MASK 0x1UL |
Bit mask for MSC_LADDRIM
Definition at line 226
of file efm32gg11b_msc.h
.
#define _MSC_WRITECMD_LADDRIM_SHIFT 0 |
Shift value for MSC_LADDRIM
Definition at line 225
of file efm32gg11b_msc.h
.
#define _MSC_WRITECMD_MASK 0x0000133FUL |
Mask for MSC_WRITECMD
Definition at line 223
of file efm32gg11b_msc.h
.
#define _MSC_WRITECMD_RESETVALUE 0x00000000UL |
Default value for MSC_WRITECMD
Definition at line 222
of file efm32gg11b_msc.h
.
#define _MSC_WRITECMD_WRITEEND_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_WRITECMD
Definition at line 237
of file efm32gg11b_msc.h
.
#define _MSC_WRITECMD_WRITEEND_MASK 0x4UL |
Bit mask for MSC_WRITEEND
Definition at line 236
of file efm32gg11b_msc.h
.
#define _MSC_WRITECMD_WRITEEND_SHIFT 2 |
Shift value for MSC_WRITEEND
Definition at line 235
of file efm32gg11b_msc.h
.
#define _MSC_WRITECMD_WRITEONCE_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_WRITECMD
Definition at line 242
of file efm32gg11b_msc.h
.
#define _MSC_WRITECMD_WRITEONCE_MASK 0x8UL |
Bit mask for MSC_WRITEONCE
Definition at line 241
of file efm32gg11b_msc.h
.
#define _MSC_WRITECMD_WRITEONCE_SHIFT 3 |
Shift value for MSC_WRITEONCE
Definition at line 240
of file efm32gg11b_msc.h
.
#define _MSC_WRITECMD_WRITETRIG_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_WRITECMD
Definition at line 247
of file efm32gg11b_msc.h
.
#define _MSC_WRITECMD_WRITETRIG_MASK 0x10UL |
Bit mask for MSC_WRITETRIG
Definition at line 246
of file efm32gg11b_msc.h
.
#define _MSC_WRITECMD_WRITETRIG_SHIFT 4 |
Shift value for MSC_WRITETRIG
Definition at line 245
of file efm32gg11b_msc.h
.
#define _MSC_WRITECTRL_IRQERASEABORT_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_WRITECTRL
Definition at line 213
of file efm32gg11b_msc.h
.
#define _MSC_WRITECTRL_IRQERASEABORT_MASK 0x2UL |
Bit mask for MSC_IRQERASEABORT
Definition at line 212
of file efm32gg11b_msc.h
.
#define _MSC_WRITECTRL_IRQERASEABORT_SHIFT 1 |
Shift value for MSC_IRQERASEABORT
Definition at line 211
of file efm32gg11b_msc.h
.
#define _MSC_WRITECTRL_MASK 0x00000023UL |
Mask for MSC_WRITECTRL
Definition at line 204
of file efm32gg11b_msc.h
.
#define _MSC_WRITECTRL_RESETVALUE 0x00000000UL |
Default value for MSC_WRITECTRL
Definition at line 203
of file efm32gg11b_msc.h
.
#define _MSC_WRITECTRL_RWWEN_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_WRITECTRL
Definition at line 218
of file efm32gg11b_msc.h
.
#define _MSC_WRITECTRL_RWWEN_MASK 0x20UL |
Bit mask for MSC_RWWEN
Definition at line 217
of file efm32gg11b_msc.h
.
#define _MSC_WRITECTRL_RWWEN_SHIFT 5 |
Shift value for MSC_RWWEN
Definition at line 216
of file efm32gg11b_msc.h
.
#define _MSC_WRITECTRL_WREN_DEFAULT 0x00000000UL |
Mode DEFAULT for MSC_WRITECTRL
Definition at line 208
of file efm32gg11b_msc.h
.
#define _MSC_WRITECTRL_WREN_MASK 0x1UL |
Bit mask for MSC_WREN
Definition at line 207
of file efm32gg11b_msc.h
.
#define _MSC_WRITECTRL_WREN_SHIFT 0 |
Shift value for MSC_WREN
Definition at line 206
of file efm32gg11b_msc.h
.
#define MSC_AAPUNLOCKCMD_UNLOCKAAP (0x1UL << 0) |
Software Unlock AAP Command
Definition at line 739
of file efm32gg11b_msc.h
.
#define MSC_AAPUNLOCKCMD_UNLOCKAAP_DEFAULT (_MSC_AAPUNLOCKCMD_UNLOCKAAP_DEFAULT << 0) |
Shifted mode DEFAULT for MSC_AAPUNLOCKCMD
Definition at line 743
of file efm32gg11b_msc.h
.
#define MSC_ADDRB_ADDRB_DEFAULT (_MSC_ADDRB_ADDRB_DEFAULT << 0) |
Shifted mode DEFAULT for MSC_ADDRB
Definition at line 276
of file efm32gg11b_msc.h
.
#define MSC_BANKSWITCHLOCK_BANKSWITCHLOCKKEY_DEFAULT (_MSC_BANKSWITCHLOCK_BANKSWITCHLOCKKEY_DEFAULT << 0) |
Shifted mode DEFAULT for MSC_BANKSWITCHLOCK
Definition at line 704
of file efm32gg11b_msc.h
.
#define MSC_BANKSWITCHLOCK_BANKSWITCHLOCKKEY_LOCK (_MSC_BANKSWITCHLOCK_BANKSWITCHLOCKKEY_LOCK << 0) |
Shifted mode LOCK for MSC_BANKSWITCHLOCK
Definition at line 702
of file efm32gg11b_msc.h
.
#define MSC_BANKSWITCHLOCK_BANKSWITCHLOCKKEY_LOCKED (_MSC_BANKSWITCHLOCK_BANKSWITCHLOCKKEY_LOCKED << 0) |
Shifted mode LOCKED for MSC_BANKSWITCHLOCK
Definition at line 705
of file efm32gg11b_msc.h
.
#define MSC_BANKSWITCHLOCK_BANKSWITCHLOCKKEY_UNLOCK (_MSC_BANKSWITCHLOCK_BANKSWITCHLOCKKEY_UNLOCK << 0) |
Shifted mode UNLOCK for MSC_BANKSWITCHLOCK
Definition at line 706
of file efm32gg11b_msc.h
.
#define MSC_BANKSWITCHLOCK_BANKSWITCHLOCKKEY_UNLOCKED (_MSC_BANKSWITCHLOCK_BANKSWITCHLOCKKEY_UNLOCKED << 0) |
Shifted mode UNLOCKED for MSC_BANKSWITCHLOCK
Definition at line 703
of file efm32gg11b_msc.h
.
#define MSC_BOOTLOADERCTRL_BLRDIS (0x1UL << 0) |
Flash Bootloader Read Disable
Definition at line 725
of file efm32gg11b_msc.h
.
#define MSC_BOOTLOADERCTRL_BLRDIS_DEFAULT (_MSC_BOOTLOADERCTRL_BLRDIS_DEFAULT << 0) |
Shifted mode DEFAULT for MSC_BOOTLOADERCTRL
Definition at line 729
of file efm32gg11b_msc.h
.
#define MSC_BOOTLOADERCTRL_BLWDIS (0x1UL << 1) |
Flash Bootloader Write/Erase Disable
Definition at line 730
of file efm32gg11b_msc.h
.
#define MSC_BOOTLOADERCTRL_BLWDIS_DEFAULT (_MSC_BOOTLOADERCTRL_BLWDIS_DEFAULT << 1) |
Shifted mode DEFAULT for MSC_BOOTLOADERCTRL
Definition at line 734
of file efm32gg11b_msc.h
.
#define MSC_CACHECMD_INVCACHE (0x1UL << 0) |
Invalidate Instruction Cache
Definition at line 613
of file efm32gg11b_msc.h
.
Referenced by MSC_FlushCache().
#define MSC_CACHECMD_INVCACHE_DEFAULT (_MSC_CACHECMD_INVCACHE_DEFAULT << 0) |
Shifted mode DEFAULT for MSC_CACHECMD
Definition at line 617
of file efm32gg11b_msc.h
.
#define MSC_CACHECMD_STARTPC (0x1UL << 1) |
Start Performance Counters
Definition at line 618
of file efm32gg11b_msc.h
.
Referenced by MSC_StartCacheMeasurement().
#define MSC_CACHECMD_STARTPC_DEFAULT (_MSC_CACHECMD_STARTPC_DEFAULT << 1) |
Shifted mode DEFAULT for MSC_CACHECMD
Definition at line 622
of file efm32gg11b_msc.h
.
#define MSC_CACHECMD_STOPPC (0x1UL << 2) |
Stop Performance Counters
Definition at line 623
of file efm32gg11b_msc.h
.
Referenced by MSC_GetCacheMeasurement().
#define MSC_CACHECMD_STOPPC_DEFAULT (_MSC_CACHECMD_STOPPC_DEFAULT << 2) |
Shifted mode DEFAULT for MSC_CACHECMD
Definition at line 627
of file efm32gg11b_msc.h
.
#define MSC_CACHECONFIG0_CACHELPLEVEL_ADVANCED (_MSC_CACHECONFIG0_CACHELPLEVEL_ADVANCED << 0) |
Shifted mode ADVANCED for MSC_CACHECONFIG0
Definition at line 755
of file efm32gg11b_msc.h
.
#define MSC_CACHECONFIG0_CACHELPLEVEL_BASE (_MSC_CACHECONFIG0_CACHELPLEVEL_BASE << 0) |
Shifted mode BASE for MSC_CACHECONFIG0
Definition at line 754
of file efm32gg11b_msc.h
.
#define MSC_CACHECONFIG0_CACHELPLEVEL_DEFAULT (_MSC_CACHECONFIG0_CACHELPLEVEL_DEFAULT << 0) |
Shifted mode DEFAULT for MSC_CACHECONFIG0
Definition at line 756
of file efm32gg11b_msc.h
.
#define MSC_CACHECONFIG0_CACHELPLEVEL_MINACTIVITY (_MSC_CACHECONFIG0_CACHELPLEVEL_MINACTIVITY << 0) |
Shifted mode MINACTIVITY for MSC_CACHECONFIG0
Definition at line 757
of file efm32gg11b_msc.h
.
#define MSC_CACHEHITS_CACHEHITS_DEFAULT (_MSC_CACHEHITS_CACHEHITS_DEFAULT << 0) |
Shifted mode DEFAULT for MSC_CACHEHITS
Definition at line 635
of file efm32gg11b_msc.h
.
#define MSC_CACHEMISSES_CACHEMISSES_DEFAULT (_MSC_CACHEMISSES_CACHEMISSES_DEFAULT << 0) |
Shifted mode DEFAULT for MSC_CACHEMISSES
Definition at line 643
of file efm32gg11b_msc.h
.
#define MSC_CMD_PWRUP (0x1UL << 0) |
Flash Power Up Command
Definition at line 711
of file efm32gg11b_msc.h
.
#define MSC_CMD_PWRUP_DEFAULT (_MSC_CMD_PWRUP_DEFAULT << 0) |
Shifted mode DEFAULT for MSC_CMD
Definition at line 715
of file efm32gg11b_msc.h
.
#define MSC_CMD_SWITCHINGBANK (0x1UL << 1) |
BANK SWITCHING COMMAND
Definition at line 716
of file efm32gg11b_msc.h
.
#define MSC_CMD_SWITCHINGBANK_DEFAULT (_MSC_CMD_SWITCHINGBANK_DEFAULT << 1) |
Shifted mode DEFAULT for MSC_CMD
Definition at line 720
of file efm32gg11b_msc.h
.
#define MSC_CTRL_ADDRFAULTEN (0x1UL << 0) |
Invalid Address Bus Fault Response Enable
Definition at line 101
of file efm32gg11b_msc.h
.
#define MSC_CTRL_ADDRFAULTEN_DEFAULT (_MSC_CTRL_ADDRFAULTEN_DEFAULT << 0) |
Shifted mode DEFAULT for MSC_CTRL
Definition at line 105
of file efm32gg11b_msc.h
.
#define MSC_CTRL_CLKDISFAULTEN (0x1UL << 1) |
Clock-disabled Bus Fault Response Enable
Definition at line 106
of file efm32gg11b_msc.h
.
#define MSC_CTRL_CLKDISFAULTEN_DEFAULT (_MSC_CTRL_CLKDISFAULTEN_DEFAULT << 1) |
Shifted mode DEFAULT for MSC_CTRL
Definition at line 110
of file efm32gg11b_msc.h
.
#define MSC_CTRL_EBIFAULTEN (0x1UL << 6) |
EBI Bus Fault Response Enable
Definition at line 131
of file efm32gg11b_msc.h
.
#define MSC_CTRL_EBIFAULTEN_DEFAULT (_MSC_CTRL_EBIFAULTEN_DEFAULT << 6) |
Shifted mode DEFAULT for MSC_CTRL
Definition at line 135
of file efm32gg11b_msc.h
.
#define MSC_CTRL_IFCREADCLEAR (0x1UL << 3) |
IFC Read Clears IF
Definition at line 116
of file efm32gg11b_msc.h
.
#define MSC_CTRL_IFCREADCLEAR_DEFAULT (_MSC_CTRL_IFCREADCLEAR_DEFAULT << 3) |
Shifted mode DEFAULT for MSC_CTRL
Definition at line 120
of file efm32gg11b_msc.h
.
#define MSC_CTRL_PWRUPONDEMAND (0x1UL << 2) |
Power Up on Demand During Wake Up
Definition at line 111
of file efm32gg11b_msc.h
.
#define MSC_CTRL_PWRUPONDEMAND_DEFAULT (_MSC_CTRL_PWRUPONDEMAND_DEFAULT << 2) |
Shifted mode DEFAULT for MSC_CTRL
Definition at line 115
of file efm32gg11b_msc.h
.
#define MSC_CTRL_RAMECCERRFAULTEN (0x1UL << 5) |
Two Bit ECC Error Bus Fault Response Enable
Definition at line 126
of file efm32gg11b_msc.h
.
Referenced by MSC_EccConfigSet().
#define MSC_CTRL_RAMECCERRFAULTEN_DEFAULT (_MSC_CTRL_RAMECCERRFAULTEN_DEFAULT << 5) |
Shifted mode DEFAULT for MSC_CTRL
Definition at line 130
of file efm32gg11b_msc.h
.
#define MSC_CTRL_TIMEOUTFAULTEN (0x1UL << 4) |
Timeout Bus Fault Response Enable
Definition at line 121
of file efm32gg11b_msc.h
.
#define MSC_CTRL_TIMEOUTFAULTEN_DEFAULT (_MSC_CTRL_TIMEOUTFAULTEN_DEFAULT << 4) |
Shifted mode DEFAULT for MSC_CTRL
Definition at line 125
of file efm32gg11b_msc.h
.
#define MSC_CTRL_WAITMODE (0x1UL << 12) |
Peripheral Access Wait Mode
Definition at line 136
of file efm32gg11b_msc.h
.
#define MSC_CTRL_WAITMODE_DEFAULT (_MSC_CTRL_WAITMODE_DEFAULT << 12) |
Shifted mode DEFAULT for MSC_CTRL
Definition at line 142
of file efm32gg11b_msc.h
.
#define MSC_CTRL_WAITMODE_WS0 (_MSC_CTRL_WAITMODE_WS0 << 12) |
Shifted mode WS0 for MSC_CTRL
Definition at line 143
of file efm32gg11b_msc.h
.
#define MSC_CTRL_WAITMODE_WS1 (_MSC_CTRL_WAITMODE_WS1 << 12) |
Shifted mode WS1 for MSC_CTRL
Definition at line 144
of file efm32gg11b_msc.h
.
#define MSC_ECCCTRL_RAM1ECCCHKEN (0x1UL << 3) |
RAM1 ECC Check Enable
Definition at line 826
of file efm32gg11b_msc.h
.
#define MSC_ECCCTRL_RAM1ECCCHKEN_DEFAULT (_MSC_ECCCTRL_RAM1ECCCHKEN_DEFAULT << 3) |
Shifted mode DEFAULT for MSC_ECCCTRL
Definition at line 830
of file efm32gg11b_msc.h
.
#define MSC_ECCCTRL_RAM1ECCEWEN (0x1UL << 2) |
RAM1 ECC Write Enable
Definition at line 821
of file efm32gg11b_msc.h
.
#define MSC_ECCCTRL_RAM1ECCEWEN_DEFAULT (_MSC_ECCCTRL_RAM1ECCEWEN_DEFAULT << 2) |
Shifted mode DEFAULT for MSC_ECCCTRL
Definition at line 825
of file efm32gg11b_msc.h
.
#define MSC_ECCCTRL_RAMECCCHKEN (0x1UL << 1) |
RAM ECC Check Enable
Definition at line 816
of file efm32gg11b_msc.h
.
#define MSC_ECCCTRL_RAMECCCHKEN_DEFAULT (_MSC_ECCCTRL_RAMECCCHKEN_DEFAULT << 1) |
Shifted mode DEFAULT for MSC_ECCCTRL
Definition at line 820
of file efm32gg11b_msc.h
.
#define MSC_ECCCTRL_RAMECCEWEN (0x1UL << 0) |
RAM ECC Write Enable
Definition at line 811
of file efm32gg11b_msc.h
.
#define MSC_ECCCTRL_RAMECCEWEN_DEFAULT (_MSC_ECCCTRL_RAMECCEWEN_DEFAULT << 0) |
Shifted mode DEFAULT for MSC_ECCCTRL
Definition at line 815
of file efm32gg11b_msc.h
.
#define MSC_IEN_CHOF (0x1UL << 2) |
CHOF Interrupt Enable
Definition at line 543
of file efm32gg11b_msc.h
.
#define MSC_IEN_CHOF_DEFAULT (_MSC_IEN_CHOF_DEFAULT << 2) |
Shifted mode DEFAULT for MSC_IEN
Definition at line 547
of file efm32gg11b_msc.h
.
#define MSC_IEN_CMOF (0x1UL << 3) |
CMOF Interrupt Enable
Definition at line 548
of file efm32gg11b_msc.h
.
#define MSC_IEN_CMOF_DEFAULT (_MSC_IEN_CMOF_DEFAULT << 3) |
Shifted mode DEFAULT for MSC_IEN
Definition at line 552
of file efm32gg11b_msc.h
.
#define MSC_IEN_ERASE (0x1UL << 0) |
ERASE Interrupt Enable
Definition at line 533
of file efm32gg11b_msc.h
.
#define MSC_IEN_ERASE_DEFAULT (_MSC_IEN_ERASE_DEFAULT << 0) |
Shifted mode DEFAULT for MSC_IEN
Definition at line 537
of file efm32gg11b_msc.h
.
#define MSC_IEN_ICACHERR (0x1UL << 5) |
ICACHERR Interrupt Enable
Definition at line 558
of file efm32gg11b_msc.h
.
#define MSC_IEN_ICACHERR_DEFAULT (_MSC_IEN_ICACHERR_DEFAULT << 5) |
Shifted mode DEFAULT for MSC_IEN
Definition at line 562
of file efm32gg11b_msc.h
.
#define MSC_IEN_LVEWRITE (0x1UL << 8) |
LVEWRITE Interrupt Enable
Definition at line 568
of file efm32gg11b_msc.h
.
#define MSC_IEN_LVEWRITE_DEFAULT (_MSC_IEN_LVEWRITE_DEFAULT << 8) |
Shifted mode DEFAULT for MSC_IEN
Definition at line 572
of file efm32gg11b_msc.h
.
#define MSC_IEN_PWRUPF (0x1UL << 4) |
PWRUPF Interrupt Enable
Definition at line 553
of file efm32gg11b_msc.h
.
#define MSC_IEN_PWRUPF_DEFAULT (_MSC_IEN_PWRUPF_DEFAULT << 4) |
Shifted mode DEFAULT for MSC_IEN
Definition at line 557
of file efm32gg11b_msc.h
.
#define MSC_IEN_RAM1ERR1B (0x1UL << 18) |
RAM1ERR1B Interrupt Enable
Definition at line 583
of file efm32gg11b_msc.h
.
#define MSC_IEN_RAM1ERR1B_DEFAULT (_MSC_IEN_RAM1ERR1B_DEFAULT << 18) |
Shifted mode DEFAULT for MSC_IEN
Definition at line 587
of file efm32gg11b_msc.h
.
#define MSC_IEN_RAM1ERR2B (0x1UL << 19) |
RAM1ERR2B Interrupt Enable
Definition at line 588
of file efm32gg11b_msc.h
.
#define MSC_IEN_RAM1ERR2B_DEFAULT (_MSC_IEN_RAM1ERR2B_DEFAULT << 19) |
Shifted mode DEFAULT for MSC_IEN
Definition at line 592
of file efm32gg11b_msc.h
.
#define MSC_IEN_RAMERR1B (0x1UL << 16) |
RAMERR1B Interrupt Enable
Definition at line 573
of file efm32gg11b_msc.h
.
#define MSC_IEN_RAMERR1B_DEFAULT (_MSC_IEN_RAMERR1B_DEFAULT << 16) |
Shifted mode DEFAULT for MSC_IEN
Definition at line 577
of file efm32gg11b_msc.h
.
#define MSC_IEN_RAMERR2B (0x1UL << 17) |
RAMERR2B Interrupt Enable
Definition at line 578
of file efm32gg11b_msc.h
.
#define MSC_IEN_RAMERR2B_DEFAULT (_MSC_IEN_RAMERR2B_DEFAULT << 17) |
Shifted mode DEFAULT for MSC_IEN
Definition at line 582
of file efm32gg11b_msc.h
.
#define MSC_IEN_WDATAOV (0x1UL << 6) |
WDATAOV Interrupt Enable
Definition at line 563
of file efm32gg11b_msc.h
.
#define MSC_IEN_WDATAOV_DEFAULT (_MSC_IEN_WDATAOV_DEFAULT << 6) |
Shifted mode DEFAULT for MSC_IEN
Definition at line 567
of file efm32gg11b_msc.h
.
#define MSC_IEN_WRITE (0x1UL << 1) |
WRITE Interrupt Enable
Definition at line 538
of file efm32gg11b_msc.h
.
#define MSC_IEN_WRITE_DEFAULT (_MSC_IEN_WRITE_DEFAULT << 1) |
Shifted mode DEFAULT for MSC_IEN
Definition at line 542
of file efm32gg11b_msc.h
.
#define MSC_IF_CHOF (0x1UL << 2) |
Cache Hits Overflow Interrupt Flag
Definition at line 351
of file efm32gg11b_msc.h
.
Referenced by MSC_GetCacheMeasurement(), and MSC_StartCacheMeasurement().
#define MSC_IF_CHOF_DEFAULT (_MSC_IF_CHOF_DEFAULT << 2) |
Shifted mode DEFAULT for MSC_IF
Definition at line 355
of file efm32gg11b_msc.h
.
#define MSC_IF_CMOF (0x1UL << 3) |
Cache Misses Overflow Interrupt Flag
Definition at line 356
of file efm32gg11b_msc.h
.
Referenced by MSC_GetCacheMeasurement(), and MSC_StartCacheMeasurement().
#define MSC_IF_CMOF_DEFAULT (_MSC_IF_CMOF_DEFAULT << 3) |
Shifted mode DEFAULT for MSC_IF
Definition at line 360
of file efm32gg11b_msc.h
.
#define MSC_IF_ERASE (0x1UL << 0) |
Erase Done Interrupt Read Flag
Definition at line 341
of file efm32gg11b_msc.h
.
#define MSC_IF_ERASE_DEFAULT (_MSC_IF_ERASE_DEFAULT << 0) |
Shifted mode DEFAULT for MSC_IF
Definition at line 345
of file efm32gg11b_msc.h
.
#define MSC_IF_ICACHERR (0x1UL << 5) |
ICache RAM Parity Error Flag
Definition at line 366
of file efm32gg11b_msc.h
.
#define MSC_IF_ICACHERR_DEFAULT (_MSC_IF_ICACHERR_DEFAULT << 5) |
Shifted mode DEFAULT for MSC_IF
Definition at line 370
of file efm32gg11b_msc.h
.
#define MSC_IF_LVEWRITE (0x1UL << 8) |
Flash LVE Write Error Flag
Definition at line 376
of file efm32gg11b_msc.h
.
#define MSC_IF_LVEWRITE_DEFAULT (_MSC_IF_LVEWRITE_DEFAULT << 8) |
Shifted mode DEFAULT for MSC_IF
Definition at line 380
of file efm32gg11b_msc.h
.
#define MSC_IF_PWRUPF (0x1UL << 4) |
Flash Power Up Sequence Complete Flag
Definition at line 361
of file efm32gg11b_msc.h
.
#define MSC_IF_PWRUPF_DEFAULT (_MSC_IF_PWRUPF_DEFAULT << 4) |
Shifted mode DEFAULT for MSC_IF
Definition at line 365
of file efm32gg11b_msc.h
.
#define MSC_IF_RAM1ERR1B (0x1UL << 18) |
RAM1 1-bit ECC Error Interrupt Flag
Definition at line 391
of file efm32gg11b_msc.h
.
#define MSC_IF_RAM1ERR1B_DEFAULT (_MSC_IF_RAM1ERR1B_DEFAULT << 18) |
Shifted mode DEFAULT for MSC_IF
Definition at line 395
of file efm32gg11b_msc.h
.
#define MSC_IF_RAM1ERR2B (0x1UL << 19) |
RAM1 2-bit ECC Error Interrupt Flag
Definition at line 396
of file efm32gg11b_msc.h
.
#define MSC_IF_RAM1ERR2B_DEFAULT (_MSC_IF_RAM1ERR2B_DEFAULT << 19) |
Shifted mode DEFAULT for MSC_IF
Definition at line 400
of file efm32gg11b_msc.h
.
#define MSC_IF_RAMERR1B (0x1UL << 16) |
RAM 1-bit ECC Error Interrupt Flag
Definition at line 381
of file efm32gg11b_msc.h
.
#define MSC_IF_RAMERR1B_DEFAULT (_MSC_IF_RAMERR1B_DEFAULT << 16) |
Shifted mode DEFAULT for MSC_IF
Definition at line 385
of file efm32gg11b_msc.h
.
#define MSC_IF_RAMERR2B (0x1UL << 17) |
RAM 2-bit ECC Error Interrupt Flag
Definition at line 386
of file efm32gg11b_msc.h
.
#define MSC_IF_RAMERR2B_DEFAULT (_MSC_IF_RAMERR2B_DEFAULT << 17) |
Shifted mode DEFAULT for MSC_IF
Definition at line 390
of file efm32gg11b_msc.h
.
#define MSC_IF_WDATAOV (0x1UL << 6) |
Flash Controller Write Buffer Overflow
Definition at line 371
of file efm32gg11b_msc.h
.
#define MSC_IF_WDATAOV_DEFAULT (_MSC_IF_WDATAOV_DEFAULT << 6) |
Shifted mode DEFAULT for MSC_IF
Definition at line 375
of file efm32gg11b_msc.h
.
#define MSC_IF_WRITE (0x1UL << 1) |
Write Done Interrupt Read Flag
Definition at line 346
of file efm32gg11b_msc.h
.
#define MSC_IF_WRITE_DEFAULT (_MSC_IF_WRITE_DEFAULT << 1) |
Shifted mode DEFAULT for MSC_IF
Definition at line 350
of file efm32gg11b_msc.h
.
#define MSC_IFC_CHOF (0x1UL << 2) |
Clear CHOF Interrupt Flag
Definition at line 479
of file efm32gg11b_msc.h
.
#define MSC_IFC_CHOF_DEFAULT (_MSC_IFC_CHOF_DEFAULT << 2) |
Shifted mode DEFAULT for MSC_IFC
Definition at line 483
of file efm32gg11b_msc.h
.
#define MSC_IFC_CMOF (0x1UL << 3) |
Clear CMOF Interrupt Flag
Definition at line 484
of file efm32gg11b_msc.h
.
#define MSC_IFC_CMOF_DEFAULT (_MSC_IFC_CMOF_DEFAULT << 3) |
Shifted mode DEFAULT for MSC_IFC
Definition at line 488
of file efm32gg11b_msc.h
.
#define MSC_IFC_ERASE (0x1UL << 0) |
Clear ERASE Interrupt Flag
Definition at line 469
of file efm32gg11b_msc.h
.
#define MSC_IFC_ERASE_DEFAULT (_MSC_IFC_ERASE_DEFAULT << 0) |
Shifted mode DEFAULT for MSC_IFC
Definition at line 473
of file efm32gg11b_msc.h
.
#define MSC_IFC_ICACHERR (0x1UL << 5) |
Clear ICACHERR Interrupt Flag
Definition at line 494
of file efm32gg11b_msc.h
.
#define MSC_IFC_ICACHERR_DEFAULT (_MSC_IFC_ICACHERR_DEFAULT << 5) |
Shifted mode DEFAULT for MSC_IFC
Definition at line 498
of file efm32gg11b_msc.h
.
#define MSC_IFC_LVEWRITE (0x1UL << 8) |
Clear LVEWRITE Interrupt Flag
Definition at line 504
of file efm32gg11b_msc.h
.
#define MSC_IFC_LVEWRITE_DEFAULT (_MSC_IFC_LVEWRITE_DEFAULT << 8) |
Shifted mode DEFAULT for MSC_IFC
Definition at line 508
of file efm32gg11b_msc.h
.
#define MSC_IFC_PWRUPF (0x1UL << 4) |
Clear PWRUPF Interrupt Flag
Definition at line 489
of file efm32gg11b_msc.h
.
#define MSC_IFC_PWRUPF_DEFAULT (_MSC_IFC_PWRUPF_DEFAULT << 4) |
Shifted mode DEFAULT for MSC_IFC
Definition at line 493
of file efm32gg11b_msc.h
.
#define MSC_IFC_RAM1ERR1B (0x1UL << 18) |
Clear RAM1ERR1B Interrupt Flag
Definition at line 519
of file efm32gg11b_msc.h
.
#define MSC_IFC_RAM1ERR1B_DEFAULT (_MSC_IFC_RAM1ERR1B_DEFAULT << 18) |
Shifted mode DEFAULT for MSC_IFC
Definition at line 523
of file efm32gg11b_msc.h
.
#define MSC_IFC_RAM1ERR2B (0x1UL << 19) |
Clear RAM1ERR2B Interrupt Flag
Definition at line 524
of file efm32gg11b_msc.h
.
#define MSC_IFC_RAM1ERR2B_DEFAULT (_MSC_IFC_RAM1ERR2B_DEFAULT << 19) |
Shifted mode DEFAULT for MSC_IFC
Definition at line 528
of file efm32gg11b_msc.h
.
#define MSC_IFC_RAMERR1B (0x1UL << 16) |
Clear RAMERR1B Interrupt Flag
Definition at line 509
of file efm32gg11b_msc.h
.
#define MSC_IFC_RAMERR1B_DEFAULT (_MSC_IFC_RAMERR1B_DEFAULT << 16) |
Shifted mode DEFAULT for MSC_IFC
Definition at line 513
of file efm32gg11b_msc.h
.
#define MSC_IFC_RAMERR2B (0x1UL << 17) |
Clear RAMERR2B Interrupt Flag
Definition at line 514
of file efm32gg11b_msc.h
.
#define MSC_IFC_RAMERR2B_DEFAULT (_MSC_IFC_RAMERR2B_DEFAULT << 17) |
Shifted mode DEFAULT for MSC_IFC
Definition at line 518
of file efm32gg11b_msc.h
.
#define MSC_IFC_WDATAOV (0x1UL << 6) |
Clear WDATAOV Interrupt Flag
Definition at line 499
of file efm32gg11b_msc.h
.
#define MSC_IFC_WDATAOV_DEFAULT (_MSC_IFC_WDATAOV_DEFAULT << 6) |
Shifted mode DEFAULT for MSC_IFC
Definition at line 503
of file efm32gg11b_msc.h
.
#define MSC_IFC_WRITE (0x1UL << 1) |
Clear WRITE Interrupt Flag
Definition at line 474
of file efm32gg11b_msc.h
.
#define MSC_IFC_WRITE_DEFAULT (_MSC_IFC_WRITE_DEFAULT << 1) |
Shifted mode DEFAULT for MSC_IFC
Definition at line 478
of file efm32gg11b_msc.h
.
#define MSC_IFS_CHOF (0x1UL << 2) |
Set CHOF Interrupt Flag
Definition at line 415
of file efm32gg11b_msc.h
.
#define MSC_IFS_CHOF_DEFAULT (_MSC_IFS_CHOF_DEFAULT << 2) |
Shifted mode DEFAULT for MSC_IFS
Definition at line 419
of file efm32gg11b_msc.h
.
#define MSC_IFS_CMOF (0x1UL << 3) |
Set CMOF Interrupt Flag
Definition at line 420
of file efm32gg11b_msc.h
.
#define MSC_IFS_CMOF_DEFAULT (_MSC_IFS_CMOF_DEFAULT << 3) |
Shifted mode DEFAULT for MSC_IFS
Definition at line 424
of file efm32gg11b_msc.h
.
#define MSC_IFS_ERASE (0x1UL << 0) |
Set ERASE Interrupt Flag
Definition at line 405
of file efm32gg11b_msc.h
.
#define MSC_IFS_ERASE_DEFAULT (_MSC_IFS_ERASE_DEFAULT << 0) |
Shifted mode DEFAULT for MSC_IFS
Definition at line 409
of file efm32gg11b_msc.h
.
#define MSC_IFS_ICACHERR (0x1UL << 5) |
Set ICACHERR Interrupt Flag
Definition at line 430
of file efm32gg11b_msc.h
.
#define MSC_IFS_ICACHERR_DEFAULT (_MSC_IFS_ICACHERR_DEFAULT << 5) |
Shifted mode DEFAULT for MSC_IFS
Definition at line 434
of file efm32gg11b_msc.h
.
#define MSC_IFS_LVEWRITE (0x1UL << 8) |
Set LVEWRITE Interrupt Flag
Definition at line 440
of file efm32gg11b_msc.h
.
#define MSC_IFS_LVEWRITE_DEFAULT (_MSC_IFS_LVEWRITE_DEFAULT << 8) |
Shifted mode DEFAULT for MSC_IFS
Definition at line 444
of file efm32gg11b_msc.h
.
#define MSC_IFS_PWRUPF (0x1UL << 4) |
Set PWRUPF Interrupt Flag
Definition at line 425
of file efm32gg11b_msc.h
.
#define MSC_IFS_PWRUPF_DEFAULT (_MSC_IFS_PWRUPF_DEFAULT << 4) |
Shifted mode DEFAULT for MSC_IFS
Definition at line 429
of file efm32gg11b_msc.h
.
#define MSC_IFS_RAM1ERR1B (0x1UL << 18) |
Set RAM1ERR1B Interrupt Flag
Definition at line 455
of file efm32gg11b_msc.h
.
#define MSC_IFS_RAM1ERR1B_DEFAULT (_MSC_IFS_RAM1ERR1B_DEFAULT << 18) |
Shifted mode DEFAULT for MSC_IFS
Definition at line 459
of file efm32gg11b_msc.h
.
#define MSC_IFS_RAM1ERR2B (0x1UL << 19) |
Set RAM1ERR2B Interrupt Flag
Definition at line 460
of file efm32gg11b_msc.h
.
#define MSC_IFS_RAM1ERR2B_DEFAULT (_MSC_IFS_RAM1ERR2B_DEFAULT << 19) |
Shifted mode DEFAULT for MSC_IFS
Definition at line 464
of file efm32gg11b_msc.h
.
#define MSC_IFS_RAMERR1B (0x1UL << 16) |
Set RAMERR1B Interrupt Flag
Definition at line 445
of file efm32gg11b_msc.h
.
#define MSC_IFS_RAMERR1B_DEFAULT (_MSC_IFS_RAMERR1B_DEFAULT << 16) |
Shifted mode DEFAULT for MSC_IFS
Definition at line 449
of file efm32gg11b_msc.h
.
#define MSC_IFS_RAMERR2B (0x1UL << 17) |
Set RAMERR2B Interrupt Flag
Definition at line 450
of file efm32gg11b_msc.h
.
#define MSC_IFS_RAMERR2B_DEFAULT (_MSC_IFS_RAMERR2B_DEFAULT << 17) |
Shifted mode DEFAULT for MSC_IFS
Definition at line 454
of file efm32gg11b_msc.h
.
#define MSC_IFS_WDATAOV (0x1UL << 6) |
Set WDATAOV Interrupt Flag
Definition at line 435
of file efm32gg11b_msc.h
.
#define MSC_IFS_WDATAOV_DEFAULT (_MSC_IFS_WDATAOV_DEFAULT << 6) |
Shifted mode DEFAULT for MSC_IFS
Definition at line 439
of file efm32gg11b_msc.h
.
#define MSC_IFS_WRITE (0x1UL << 1) |
Set WRITE Interrupt Flag
Definition at line 410
of file efm32gg11b_msc.h
.
#define MSC_IFS_WRITE_DEFAULT (_MSC_IFS_WRITE_DEFAULT << 1) |
Shifted mode DEFAULT for MSC_IFS
Definition at line 414
of file efm32gg11b_msc.h
.
#define MSC_LOCK_LOCKKEY_DEFAULT (_MSC_LOCK_LOCKKEY_DEFAULT << 0) |
Shifted mode DEFAULT for MSC_LOCK
Definition at line 604
of file efm32gg11b_msc.h
.
#define MSC_LOCK_LOCKKEY_LOCK (_MSC_LOCK_LOCKKEY_LOCK << 0) |
Shifted mode LOCK for MSC_LOCK
Definition at line 605
of file efm32gg11b_msc.h
.
#define MSC_LOCK_LOCKKEY_LOCKED (_MSC_LOCK_LOCKKEY_LOCKED << 0) |
Shifted mode LOCKED for MSC_LOCK
Definition at line 607
of file efm32gg11b_msc.h
.
#define MSC_LOCK_LOCKKEY_UNLOCK (_MSC_LOCK_LOCKKEY_UNLOCK << 0) |
Shifted mode UNLOCK for MSC_LOCK
Definition at line 608
of file efm32gg11b_msc.h
.
#define MSC_LOCK_LOCKKEY_UNLOCKED (_MSC_LOCK_LOCKKEY_UNLOCKED << 0) |
Shifted mode UNLOCKED for MSC_LOCK
Definition at line 606
of file efm32gg11b_msc.h
.
#define MSC_MASSLOCK_LOCKKEY_DEFAULT (_MSC_MASSLOCK_LOCKKEY_DEFAULT << 0) |
Shifted mode DEFAULT for MSC_MASSLOCK
Definition at line 657
of file efm32gg11b_msc.h
.
#define MSC_MASSLOCK_LOCKKEY_LOCK (_MSC_MASSLOCK_LOCKKEY_LOCK << 0) |
Shifted mode LOCK for MSC_MASSLOCK
Definition at line 655
of file efm32gg11b_msc.h
.
Referenced by MSC_MassErase().
#define MSC_MASSLOCK_LOCKKEY_LOCKED (_MSC_MASSLOCK_LOCKKEY_LOCKED << 0) |
Shifted mode LOCKED for MSC_MASSLOCK
Definition at line 658
of file efm32gg11b_msc.h
.
#define MSC_MASSLOCK_LOCKKEY_UNLOCK (_MSC_MASSLOCK_LOCKKEY_UNLOCK << 0) |
Shifted mode UNLOCK for MSC_MASSLOCK
Definition at line 659
of file efm32gg11b_msc.h
.
Referenced by MSC_MassErase().
#define MSC_MASSLOCK_LOCKKEY_UNLOCKED (_MSC_MASSLOCK_LOCKKEY_UNLOCKED << 0) |
Shifted mode UNLOCKED for MSC_MASSLOCK
Definition at line 656
of file efm32gg11b_msc.h
.
#define MSC_RAM1ECCADDR_RAM1ECCADDR_DEFAULT (_MSC_RAM1ECCADDR_RAM1ECCADDR_DEFAULT << 0) |
Shifted mode DEFAULT for MSC_RAM1ECCADDR
Definition at line 846
of file efm32gg11b_msc.h
.
#define MSC_RAMCTRL_RAM1CACHEEN (0x1UL << 8) |
RAM1 CACHE Enable
Definition at line 777
of file efm32gg11b_msc.h
.
#define MSC_RAMCTRL_RAM1CACHEEN_DEFAULT (_MSC_RAMCTRL_RAM1CACHEEN_DEFAULT << 8) |
Shifted mode DEFAULT for MSC_RAMCTRL
Definition at line 781
of file efm32gg11b_msc.h
.
#define MSC_RAMCTRL_RAM1PREFETCHEN (0x1UL << 10) |
RAM1 Prfetch Enable
Definition at line 787
of file efm32gg11b_msc.h
.
#define MSC_RAMCTRL_RAM1PREFETCHEN_DEFAULT (_MSC_RAMCTRL_RAM1PREFETCHEN_DEFAULT << 10) |
Shifted mode DEFAULT for MSC_RAMCTRL
Definition at line 791
of file efm32gg11b_msc.h
.
#define MSC_RAMCTRL_RAM1WSEN (0x1UL << 9) |
RAM1 WAIT STATE Enable
Definition at line 782
of file efm32gg11b_msc.h
.
#define MSC_RAMCTRL_RAM1WSEN_DEFAULT (_MSC_RAMCTRL_RAM1WSEN_DEFAULT << 9) |
Shifted mode DEFAULT for MSC_RAMCTRL
Definition at line 786
of file efm32gg11b_msc.h
.
#define MSC_RAMCTRL_RAM2CACHEEN (0x1UL << 16) |
RAM2 CACHE Enable
Definition at line 792
of file efm32gg11b_msc.h
.
#define MSC_RAMCTRL_RAM2CACHEEN_DEFAULT (_MSC_RAMCTRL_RAM2CACHEEN_DEFAULT << 16) |
Shifted mode DEFAULT for MSC_RAMCTRL
Definition at line 796
of file efm32gg11b_msc.h
.
#define MSC_RAMCTRL_RAM2PREFETCHEN (0x1UL << 18) |
RAM2 Prfetch Enable
Definition at line 802
of file efm32gg11b_msc.h
.
#define MSC_RAMCTRL_RAM2PREFETCHEN_DEFAULT (_MSC_RAMCTRL_RAM2PREFETCHEN_DEFAULT << 18) |
Shifted mode DEFAULT for MSC_RAMCTRL
Definition at line 806
of file efm32gg11b_msc.h
.
#define MSC_RAMCTRL_RAM2WSEN (0x1UL << 17) |
RAM2 WAIT STATE Enable
Definition at line 797
of file efm32gg11b_msc.h
.
#define MSC_RAMCTRL_RAM2WSEN_DEFAULT (_MSC_RAMCTRL_RAM2WSEN_DEFAULT << 17) |
Shifted mode DEFAULT for MSC_RAMCTRL
Definition at line 801
of file efm32gg11b_msc.h
.
#define MSC_RAMCTRL_RAMCACHEEN (0x1UL << 0) |
RAM CACHE Enable
Definition at line 762
of file efm32gg11b_msc.h
.
#define MSC_RAMCTRL_RAMCACHEEN_DEFAULT (_MSC_RAMCTRL_RAMCACHEEN_DEFAULT << 0) |
Shifted mode DEFAULT for MSC_RAMCTRL
Definition at line 766
of file efm32gg11b_msc.h
.
#define MSC_RAMCTRL_RAMPREFETCHEN (0x1UL << 2) |
RAM Prfetch Enable
Definition at line 772
of file efm32gg11b_msc.h
.
#define MSC_RAMCTRL_RAMPREFETCHEN_DEFAULT (_MSC_RAMCTRL_RAMPREFETCHEN_DEFAULT << 2) |
Shifted mode DEFAULT for MSC_RAMCTRL
Definition at line 776
of file efm32gg11b_msc.h
.
#define MSC_RAMCTRL_RAMWSEN (0x1UL << 1) |
RAM WAIT STATE Enable
Definition at line 767
of file efm32gg11b_msc.h
.
#define MSC_RAMCTRL_RAMWSEN_DEFAULT (_MSC_RAMCTRL_RAMWSEN_DEFAULT << 1) |
Shifted mode DEFAULT for MSC_RAMCTRL
Definition at line 771
of file efm32gg11b_msc.h
.
#define MSC_RAMECCADDR_RAMECCADDR_DEFAULT (_MSC_RAMECCADDR_RAMECCADDR_DEFAULT << 0) |
Shifted mode DEFAULT for MSC_RAMECCADDR
Definition at line 838
of file efm32gg11b_msc.h
.
#define MSC_READCTRL_AIDIS (0x1UL << 4) |
Automatic Invalidate Disable
Definition at line 154
of file efm32gg11b_msc.h
.
Referenced by MSC_ExecConfigSet().
#define MSC_READCTRL_AIDIS_DEFAULT (_MSC_READCTRL_AIDIS_DEFAULT << 4) |
Shifted mode DEFAULT for MSC_READCTRL
Definition at line 158
of file efm32gg11b_msc.h
.
#define MSC_READCTRL_EBICDIS (0x1UL << 6) |
External Bus Interface Cache Disable
Definition at line 164
of file efm32gg11b_msc.h
.
#define MSC_READCTRL_EBICDIS_DEFAULT (_MSC_READCTRL_EBICDIS_DEFAULT << 6) |
Shifted mode DEFAULT for MSC_READCTRL
Definition at line 168
of file efm32gg11b_msc.h
.
#define MSC_READCTRL_ICCDIS (0x1UL << 5) |
Interrupt Context Cache Disable
Definition at line 159
of file efm32gg11b_msc.h
.
Referenced by MSC_ExecConfigSet().
#define MSC_READCTRL_ICCDIS_DEFAULT (_MSC_READCTRL_ICCDIS_DEFAULT << 5) |
Shifted mode DEFAULT for MSC_READCTRL
Definition at line 163
of file efm32gg11b_msc.h
.
#define MSC_READCTRL_IFCDIS (0x1UL << 3) |
Internal Flash Cache Disable
Definition at line 149
of file efm32gg11b_msc.h
.
Referenced by MSC_ExecConfigSet().
#define MSC_READCTRL_IFCDIS_DEFAULT (_MSC_READCTRL_IFCDIS_DEFAULT << 3) |
Shifted mode DEFAULT for MSC_READCTRL
Definition at line 153
of file efm32gg11b_msc.h
.
#define MSC_READCTRL_MODE_DEFAULT (_MSC_READCTRL_MODE_DEFAULT << 24) |
Shifted mode DEFAULT for MSC_READCTRL
Definition at line 192
of file efm32gg11b_msc.h
.
#define MSC_READCTRL_MODE_WS0 (_MSC_READCTRL_MODE_WS0 << 24) |
Shifted mode WS0 for MSC_READCTRL
Definition at line 191
of file efm32gg11b_msc.h
.
Referenced by MSC_ExecConfigSet().
#define MSC_READCTRL_MODE_WS1 (_MSC_READCTRL_MODE_WS1 << 24) |
Shifted mode WS1 for MSC_READCTRL
Definition at line 193
of file efm32gg11b_msc.h
.
Referenced by MSC_ExecConfigSet().
#define MSC_READCTRL_MODE_WS2 (_MSC_READCTRL_MODE_WS2 << 24) |
Shifted mode WS2 for MSC_READCTRL
Definition at line 194
of file efm32gg11b_msc.h
.
#define MSC_READCTRL_MODE_WS3 (_MSC_READCTRL_MODE_WS3 << 24) |
Shifted mode WS3 for MSC_READCTRL
Definition at line 195
of file efm32gg11b_msc.h
.
#define MSC_READCTRL_PREFETCH (0x1UL << 8) |
#define MSC_READCTRL_PREFETCH_DEFAULT (_MSC_READCTRL_PREFETCH_DEFAULT << 8) |
Shifted mode DEFAULT for MSC_READCTRL
Definition at line 173
of file efm32gg11b_msc.h
.
#define MSC_READCTRL_QSPICDIS (0x1UL << 10) |
QSPI Cache Disable
Definition at line 179
of file efm32gg11b_msc.h
.
#define MSC_READCTRL_QSPICDIS_DEFAULT (_MSC_READCTRL_QSPICDIS_DEFAULT << 10) |
Shifted mode DEFAULT for MSC_READCTRL
Definition at line 183
of file efm32gg11b_msc.h
.
#define MSC_READCTRL_SCBTP (0x1UL << 28) |
Suppress Conditional Branch Target Perfetch
Definition at line 196
of file efm32gg11b_msc.h
.
Referenced by MSC_ExecConfigSet().
#define MSC_READCTRL_SCBTP_DEFAULT (_MSC_READCTRL_SCBTP_DEFAULT << 28) |
Shifted mode DEFAULT for MSC_READCTRL
Definition at line 200
of file efm32gg11b_msc.h
.
#define MSC_READCTRL_USEHPROT (0x1UL << 9) |
#define MSC_READCTRL_USEHPROT_DEFAULT (_MSC_READCTRL_USEHPROT_DEFAULT << 9) |
Shifted mode DEFAULT for MSC_READCTRL
Definition at line 178
of file efm32gg11b_msc.h
.
#define MSC_STARTUP_ASTWAIT (0x1UL << 24) |
Active Startup Wait
Definition at line 672
of file efm32gg11b_msc.h
.
#define MSC_STARTUP_ASTWAIT_DEFAULT (_MSC_STARTUP_ASTWAIT_DEFAULT << 24) |
Shifted mode DEFAULT for MSC_STARTUP
Definition at line 676
of file efm32gg11b_msc.h
.
#define MSC_STARTUP_STDLY0_DEFAULT (_MSC_STARTUP_STDLY0_DEFAULT << 0) |
Shifted mode DEFAULT for MSC_STARTUP
Definition at line 667
of file efm32gg11b_msc.h
.
#define MSC_STARTUP_STDLY1_DEFAULT (_MSC_STARTUP_STDLY1_DEFAULT << 12) |
Shifted mode DEFAULT for MSC_STARTUP
Definition at line 671
of file efm32gg11b_msc.h
.
#define MSC_STARTUP_STWS_DEFAULT (_MSC_STARTUP_STWS_DEFAULT << 28) |
Shifted mode DEFAULT for MSC_STARTUP
Definition at line 690
of file efm32gg11b_msc.h
.
#define MSC_STARTUP_STWSAEN (0x1UL << 26) |
Startup Waitstates Always Enable
Definition at line 682
of file efm32gg11b_msc.h
.
#define MSC_STARTUP_STWSAEN_DEFAULT (_MSC_STARTUP_STWSAEN_DEFAULT << 26) |
Shifted mode DEFAULT for MSC_STARTUP
Definition at line 686
of file efm32gg11b_msc.h
.
#define MSC_STARTUP_STWSEN (0x1UL << 25) |
Startup Waitstates Enable
Definition at line 677
of file efm32gg11b_msc.h
.
#define MSC_STARTUP_STWSEN_DEFAULT (_MSC_STARTUP_STWSEN_DEFAULT << 25) |
Shifted mode DEFAULT for MSC_STARTUP
Definition at line 681
of file efm32gg11b_msc.h
.
#define MSC_STATUS_BANKSWITCHED (0x1UL << 7) |
BANK SWITCHING STATUS
Definition at line 324
of file efm32gg11b_msc.h
.
#define MSC_STATUS_BANKSWITCHED_DEFAULT (_MSC_STATUS_BANKSWITCHED_DEFAULT << 7) |
Shifted mode DEFAULT for MSC_STATUS
Definition at line 328
of file efm32gg11b_msc.h
.
#define MSC_STATUS_BUSY (0x1UL << 0) |
Erase/Write Busy
Definition at line 289
of file efm32gg11b_msc.h
.
Referenced by MSC_ErasePage(), and MSC_MassErase().
#define MSC_STATUS_BUSY_DEFAULT (_MSC_STATUS_BUSY_DEFAULT << 0) |
Shifted mode DEFAULT for MSC_STATUS
Definition at line 293
of file efm32gg11b_msc.h
.
#define MSC_STATUS_ERASEABORTED (0x1UL << 5) |
The Current Flash Erase Operation Aborted
Definition at line 314
of file efm32gg11b_msc.h
.
#define MSC_STATUS_ERASEABORTED_DEFAULT (_MSC_STATUS_ERASEABORTED_DEFAULT << 5) |
Shifted mode DEFAULT for MSC_STATUS
Definition at line 318
of file efm32gg11b_msc.h
.
#define MSC_STATUS_INVADDR (0x1UL << 2) |
Invalid Write Address or Erase Page
Definition at line 299
of file efm32gg11b_msc.h
.
Referenced by MSC_ErasePage().
#define MSC_STATUS_INVADDR_DEFAULT (_MSC_STATUS_INVADDR_DEFAULT << 2) |
Shifted mode DEFAULT for MSC_STATUS
Definition at line 303
of file efm32gg11b_msc.h
.
#define MSC_STATUS_LOCKED (0x1UL << 1) |
#define MSC_STATUS_LOCKED_DEFAULT (_MSC_STATUS_LOCKED_DEFAULT << 1) |
Shifted mode DEFAULT for MSC_STATUS
Definition at line 298
of file efm32gg11b_msc.h
.
#define MSC_STATUS_PCRUNNING (0x1UL << 6) |
Performance Counters Running
Definition at line 319
of file efm32gg11b_msc.h
.
#define MSC_STATUS_PCRUNNING_DEFAULT (_MSC_STATUS_PCRUNNING_DEFAULT << 6) |
Shifted mode DEFAULT for MSC_STATUS
Definition at line 323
of file efm32gg11b_msc.h
.
#define MSC_STATUS_PWRUPCKBDFAILCOUNT_DEFAULT (_MSC_STATUS_PWRUPCKBDFAILCOUNT_DEFAULT << 28) |
Shifted mode DEFAULT for MSC_STATUS
Definition at line 336
of file efm32gg11b_msc.h
.
#define MSC_STATUS_WDATAREADY (0x1UL << 3) |
WDATA Write Ready
Definition at line 304
of file efm32gg11b_msc.h
.
#define MSC_STATUS_WDATAREADY_DEFAULT (_MSC_STATUS_WDATAREADY_DEFAULT << 3) |
Shifted mode DEFAULT for MSC_STATUS
Definition at line 308
of file efm32gg11b_msc.h
.
#define MSC_STATUS_WDATAVALID_DEFAULT (_MSC_STATUS_WDATAVALID_DEFAULT << 24) |
Shifted mode DEFAULT for MSC_STATUS
Definition at line 332
of file efm32gg11b_msc.h
.
#define MSC_STATUS_WORDTIMEOUT (0x1UL << 4) |
Flash Write Word Timeout
Definition at line 309
of file efm32gg11b_msc.h
.
#define MSC_STATUS_WORDTIMEOUT_DEFAULT (_MSC_STATUS_WORDTIMEOUT_DEFAULT << 4) |
Shifted mode DEFAULT for MSC_STATUS
Definition at line 313
of file efm32gg11b_msc.h
.
#define MSC_WDATA_WDATA_DEFAULT (_MSC_WDATA_WDATA_DEFAULT << 0) |
Shifted mode DEFAULT for MSC_WDATA
Definition at line 284
of file efm32gg11b_msc.h
.
#define MSC_WRITECMD_CLEARWDATA (0x1UL << 12) |
Clear WDATA State
Definition at line 264
of file efm32gg11b_msc.h
.
#define MSC_WRITECMD_CLEARWDATA_DEFAULT (_MSC_WRITECMD_CLEARWDATA_DEFAULT << 12) |
Shifted mode DEFAULT for MSC_WRITECMD
Definition at line 268
of file efm32gg11b_msc.h
.
#define MSC_WRITECMD_ERASEABORT (0x1UL << 5) |
Abort Erase Sequence
Definition at line 249
of file efm32gg11b_msc.h
.
#define MSC_WRITECMD_ERASEABORT_DEFAULT (_MSC_WRITECMD_ERASEABORT_DEFAULT << 5) |
Shifted mode DEFAULT for MSC_WRITECMD
Definition at line 253
of file efm32gg11b_msc.h
.
#define MSC_WRITECMD_ERASEMAIN0 (0x1UL << 8) |
#define MSC_WRITECMD_ERASEMAIN0_DEFAULT (_MSC_WRITECMD_ERASEMAIN0_DEFAULT << 8) |
Shifted mode DEFAULT for MSC_WRITECMD
Definition at line 258
of file efm32gg11b_msc.h
.
#define MSC_WRITECMD_ERASEMAIN1 (0x1UL << 9) |
#define MSC_WRITECMD_ERASEMAIN1_DEFAULT (_MSC_WRITECMD_ERASEMAIN1_DEFAULT << 9) |
Shifted mode DEFAULT for MSC_WRITECMD
Definition at line 263
of file efm32gg11b_msc.h
.
#define MSC_WRITECMD_ERASEPAGE (0x1UL << 1) |
#define MSC_WRITECMD_ERASEPAGE_DEFAULT (_MSC_WRITECMD_ERASEPAGE_DEFAULT << 1) |
Shifted mode DEFAULT for MSC_WRITECMD
Definition at line 233
of file efm32gg11b_msc.h
.
#define MSC_WRITECMD_LADDRIM (0x1UL << 0) |
Load MSC_ADDRB Into ADDR
Definition at line 224
of file efm32gg11b_msc.h
.
Referenced by MSC_ErasePage().
#define MSC_WRITECMD_LADDRIM_DEFAULT (_MSC_WRITECMD_LADDRIM_DEFAULT << 0) |
Shifted mode DEFAULT for MSC_WRITECMD
Definition at line 228
of file efm32gg11b_msc.h
.
#define MSC_WRITECMD_WRITEEND (0x1UL << 2) |
End Write Mode
Definition at line 234
of file efm32gg11b_msc.h
.
#define MSC_WRITECMD_WRITEEND_DEFAULT (_MSC_WRITECMD_WRITEEND_DEFAULT << 2) |
Shifted mode DEFAULT for MSC_WRITECMD
Definition at line 238
of file efm32gg11b_msc.h
.
#define MSC_WRITECMD_WRITEONCE (0x1UL << 3) |
Word Write-Once Trigger
Definition at line 239
of file efm32gg11b_msc.h
.
#define MSC_WRITECMD_WRITEONCE_DEFAULT (_MSC_WRITECMD_WRITEONCE_DEFAULT << 3) |
Shifted mode DEFAULT for MSC_WRITECMD
Definition at line 243
of file efm32gg11b_msc.h
.
#define MSC_WRITECMD_WRITETRIG (0x1UL << 4) |
Word Write Sequence Trigger
Definition at line 244
of file efm32gg11b_msc.h
.
#define MSC_WRITECMD_WRITETRIG_DEFAULT (_MSC_WRITECMD_WRITETRIG_DEFAULT << 4) |
Shifted mode DEFAULT for MSC_WRITECMD
Definition at line 248
of file efm32gg11b_msc.h
.
#define MSC_WRITECTRL_IRQERASEABORT (0x1UL << 1) |
Abort Page Erase on Interrupt
Definition at line 210
of file efm32gg11b_msc.h
.
#define MSC_WRITECTRL_IRQERASEABORT_DEFAULT (_MSC_WRITECTRL_IRQERASEABORT_DEFAULT << 1) |
Shifted mode DEFAULT for MSC_WRITECTRL
Definition at line 214
of file efm32gg11b_msc.h
.
#define MSC_WRITECTRL_RWWEN (0x1UL << 5) |
Read-While-Write Enable
Definition at line 215
of file efm32gg11b_msc.h
.
#define MSC_WRITECTRL_RWWEN_DEFAULT (_MSC_WRITECTRL_RWWEN_DEFAULT << 5) |
Shifted mode DEFAULT for MSC_WRITECTRL
Definition at line 219
of file efm32gg11b_msc.h
.
#define MSC_WRITECTRL_WREN (0x1UL << 0) |
Enable Write/Erase Controller
Definition at line 205
of file efm32gg11b_msc.h
.
Referenced by MSC_Deinit(), MSC_ErasePage(), MSC_Init(), and MSC_MassErase().
#define MSC_WRITECTRL_WREN_DEFAULT (_MSC_WRITECTRL_WREN_DEFAULT << 0) |
Shifted mode DEFAULT for MSC_WRITECTRL
Definition at line 209
of file efm32gg11b_msc.h
.