Macros
#define	_LDMA_CH_CFG_ARBSLOTS_DEFAULT 0x00000000UL

#define	_LDMA_CH_CFG_ARBSLOTS_EIGHT 0x00000003UL

#define	_LDMA_CH_CFG_ARBSLOTS_FOUR 0x00000002UL

#define	_LDMA_CH_CFG_ARBSLOTS_MASK 0x30000UL

#define	_LDMA_CH_CFG_ARBSLOTS_ONE 0x00000000UL

#define	_LDMA_CH_CFG_ARBSLOTS_SHIFT 16

#define	_LDMA_CH_CFG_ARBSLOTS_TWO 0x00000001UL

#define	_LDMA_CH_CFG_DSTINCSIGN_DEFAULT 0x00000000UL

#define	_LDMA_CH_CFG_DSTINCSIGN_MASK 0x200000UL

#define	_LDMA_CH_CFG_DSTINCSIGN_NEGATIVE 0x00000001UL

#define	_LDMA_CH_CFG_DSTINCSIGN_POSITIVE 0x00000000UL

#define	_LDMA_CH_CFG_DSTINCSIGN_SHIFT 21

#define	_LDMA_CH_CFG_MASK 0x00330000UL

#define	_LDMA_CH_CFG_RESETVALUE 0x00000000UL

#define	_LDMA_CH_CFG_SRCINCSIGN_DEFAULT 0x00000000UL

#define	_LDMA_CH_CFG_SRCINCSIGN_MASK 0x100000UL

#define	_LDMA_CH_CFG_SRCINCSIGN_NEGATIVE 0x00000001UL

#define	_LDMA_CH_CFG_SRCINCSIGN_POSITIVE 0x00000000UL

#define	_LDMA_CH_CFG_SRCINCSIGN_SHIFT 20

#define	_LDMA_CH_CTRL_BLOCKSIZE_ALL 0x0000000FUL

#define	_LDMA_CH_CTRL_BLOCKSIZE_DEFAULT 0x00000000UL

#define	_LDMA_CH_CTRL_BLOCKSIZE_MASK 0xF0000UL

#define	_LDMA_CH_CTRL_BLOCKSIZE_SHIFT 16

#define	_LDMA_CH_CTRL_BLOCKSIZE_UNIT1 0x00000000UL

#define	_LDMA_CH_CTRL_BLOCKSIZE_UNIT1024 0x0000000EUL

#define	_LDMA_CH_CTRL_BLOCKSIZE_UNIT128 0x0000000BUL

#define	_LDMA_CH_CTRL_BLOCKSIZE_UNIT16 0x00000007UL

#define	_LDMA_CH_CTRL_BLOCKSIZE_UNIT2 0x00000001UL

#define	_LDMA_CH_CTRL_BLOCKSIZE_UNIT256 0x0000000CUL

#define	_LDMA_CH_CTRL_BLOCKSIZE_UNIT3 0x00000002UL

#define	_LDMA_CH_CTRL_BLOCKSIZE_UNIT32 0x00000009UL

#define	_LDMA_CH_CTRL_BLOCKSIZE_UNIT4 0x00000003UL

#define	_LDMA_CH_CTRL_BLOCKSIZE_UNIT512 0x0000000DUL

#define	_LDMA_CH_CTRL_BLOCKSIZE_UNIT6 0x00000004UL

#define	_LDMA_CH_CTRL_BLOCKSIZE_UNIT64 0x0000000AUL

#define	_LDMA_CH_CTRL_BLOCKSIZE_UNIT8 0x00000005UL

#define	_LDMA_CH_CTRL_BYTESWAP_DEFAULT 0x00000000UL

#define	_LDMA_CH_CTRL_BYTESWAP_MASK 0x8000UL

#define	_LDMA_CH_CTRL_BYTESWAP_SHIFT 15

#define	_LDMA_CH_CTRL_DECLOOPCNT_DEFAULT 0x00000000UL

#define	_LDMA_CH_CTRL_DECLOOPCNT_MASK 0x400000UL

#define	_LDMA_CH_CTRL_DECLOOPCNT_SHIFT 22

#define	_LDMA_CH_CTRL_DONEIFSEN_DEFAULT 0x00000000UL

#define	_LDMA_CH_CTRL_DONEIFSEN_MASK 0x100000UL

#define	_LDMA_CH_CTRL_DONEIFSEN_SHIFT 20

#define	_LDMA_CH_CTRL_DSTINC_DEFAULT 0x00000000UL

#define	_LDMA_CH_CTRL_DSTINC_FOUR 0x00000002UL

#define	_LDMA_CH_CTRL_DSTINC_MASK 0x30000000UL

#define	_LDMA_CH_CTRL_DSTINC_NONE 0x00000003UL

#define	_LDMA_CH_CTRL_DSTINC_ONE 0x00000000UL

#define	_LDMA_CH_CTRL_DSTINC_SHIFT 28

#define	_LDMA_CH_CTRL_DSTINC_TWO 0x00000001UL

#define	_LDMA_CH_CTRL_DSTMODE_ABSOLUTE 0x00000000UL

#define	_LDMA_CH_CTRL_DSTMODE_DEFAULT 0x00000000UL

#define	_LDMA_CH_CTRL_DSTMODE_MASK 0x80000000UL

#define	_LDMA_CH_CTRL_DSTMODE_RELATIVE 0x00000001UL

#define	_LDMA_CH_CTRL_DSTMODE_SHIFT 31

#define	_LDMA_CH_CTRL_IGNORESREQ_DEFAULT 0x00000000UL

#define	_LDMA_CH_CTRL_IGNORESREQ_MASK 0x800000UL

#define	_LDMA_CH_CTRL_IGNORESREQ_SHIFT 23

#define	_LDMA_CH_CTRL_MASK 0xFFFFFFFBUL

#define	_LDMA_CH_CTRL_REQMODE_ALL 0x00000001UL

#define	_LDMA_CH_CTRL_REQMODE_BLOCK 0x00000000UL

#define	_LDMA_CH_CTRL_REQMODE_DEFAULT 0x00000000UL

#define	_LDMA_CH_CTRL_REQMODE_MASK 0x200000UL

#define	_LDMA_CH_CTRL_REQMODE_SHIFT 21

#define	_LDMA_CH_CTRL_RESETVALUE 0x00000000UL

#define	_LDMA_CH_CTRL_SIZE_BYTE 0x00000000UL

#define	_LDMA_CH_CTRL_SIZE_DEFAULT 0x00000000UL

#define	_LDMA_CH_CTRL_SIZE_HALFWORD 0x00000001UL

#define	_LDMA_CH_CTRL_SIZE_MASK 0xC000000UL

#define	_LDMA_CH_CTRL_SIZE_SHIFT 26

#define	_LDMA_CH_CTRL_SIZE_WORD 0x00000002UL

#define	_LDMA_CH_CTRL_SRCINC_DEFAULT 0x00000000UL

#define	_LDMA_CH_CTRL_SRCINC_FOUR 0x00000002UL

#define	_LDMA_CH_CTRL_SRCINC_MASK 0x3000000UL

#define	_LDMA_CH_CTRL_SRCINC_NONE 0x00000003UL

#define	_LDMA_CH_CTRL_SRCINC_ONE 0x00000000UL

#define	_LDMA_CH_CTRL_SRCINC_SHIFT 24

#define	_LDMA_CH_CTRL_SRCINC_TWO 0x00000001UL

#define	_LDMA_CH_CTRL_SRCMODE_ABSOLUTE 0x00000000UL

#define	_LDMA_CH_CTRL_SRCMODE_DEFAULT 0x00000000UL

#define	_LDMA_CH_CTRL_SRCMODE_MASK 0x40000000UL

#define	_LDMA_CH_CTRL_SRCMODE_RELATIVE 0x00000001UL

#define	_LDMA_CH_CTRL_SRCMODE_SHIFT 30

#define	_LDMA_CH_CTRL_STRUCTREQ_DEFAULT 0x00000000UL

#define	_LDMA_CH_CTRL_STRUCTREQ_MASK 0x8UL

#define	_LDMA_CH_CTRL_STRUCTREQ_SHIFT 3

#define	_LDMA_CH_CTRL_STRUCTTYPE_DEFAULT 0x00000000UL

#define	_LDMA_CH_CTRL_STRUCTTYPE_MASK 0x3UL

#define	_LDMA_CH_CTRL_STRUCTTYPE_SHIFT 0

#define	_LDMA_CH_CTRL_STRUCTTYPE_SYNCHRONIZE 0x00000001UL

#define	_LDMA_CH_CTRL_STRUCTTYPE_TRANSFER 0x00000000UL

#define	_LDMA_CH_CTRL_STRUCTTYPE_WRITE 0x00000002UL

#define	_LDMA_CH_CTRL_XFERCNT_DEFAULT 0x00000000UL

#define	_LDMA_CH_CTRL_XFERCNT_MASK 0x7FF0UL

#define	_LDMA_CH_CTRL_XFERCNT_SHIFT 4

#define	_LDMA_CH_DST_DSTADDR_DEFAULT 0x00000000UL

#define	_LDMA_CH_DST_DSTADDR_MASK 0xFFFFFFFFUL

#define	_LDMA_CH_DST_DSTADDR_SHIFT 0

#define	_LDMA_CH_DST_MASK 0xFFFFFFFFUL

#define	_LDMA_CH_DST_RESETVALUE 0x00000000UL

#define	_LDMA_CH_LINK_LINK_DEFAULT 0x00000000UL

#define	_LDMA_CH_LINK_LINK_MASK 0x2UL

#define	_LDMA_CH_LINK_LINK_SHIFT 1

#define	_LDMA_CH_LINK_LINKADDR_DEFAULT 0x00000000UL

#define	_LDMA_CH_LINK_LINKADDR_MASK 0xFFFFFFFCUL

#define	_LDMA_CH_LINK_LINKADDR_SHIFT 2

#define	_LDMA_CH_LINK_LINKMODE_ABSOLUTE 0x00000000UL

#define	_LDMA_CH_LINK_LINKMODE_DEFAULT 0x00000000UL

#define	_LDMA_CH_LINK_LINKMODE_MASK 0x1UL

#define	_LDMA_CH_LINK_LINKMODE_RELATIVE 0x00000001UL

#define	_LDMA_CH_LINK_LINKMODE_SHIFT 0

#define	_LDMA_CH_LINK_MASK 0xFFFFFFFFUL

#define	_LDMA_CH_LINK_RESETVALUE 0x00000000UL

#define	_LDMA_CH_LOOP_LOOPCNT_DEFAULT 0x00000000UL

#define	_LDMA_CH_LOOP_LOOPCNT_MASK 0xFFUL

#define	_LDMA_CH_LOOP_LOOPCNT_SHIFT 0

#define	_LDMA_CH_LOOP_MASK 0x000000FFUL

#define	_LDMA_CH_LOOP_RESETVALUE 0x00000000UL

#define	_LDMA_CH_REQSEL_MASK 0x003F000FUL

#define	_LDMA_CH_REQSEL_RESETVALUE 0x00000000UL

#define	_LDMA_CH_REQSEL_SIGSEL_ADC0SCAN 0x00000001UL

#define	_LDMA_CH_REQSEL_SIGSEL_ADC0SINGLE 0x00000000UL

#define	_LDMA_CH_REQSEL_SIGSEL_ADC1SCAN 0x00000001UL

#define	_LDMA_CH_REQSEL_SIGSEL_ADC1SINGLE 0x00000000UL

#define	_LDMA_CH_REQSEL_SIGSEL_CRYPTO0DATA0RD 0x00000002UL

#define	_LDMA_CH_REQSEL_SIGSEL_CRYPTO0DATA0WR 0x00000000UL

#define	_LDMA_CH_REQSEL_SIGSEL_CRYPTO0DATA0XWR 0x00000001UL

#define	_LDMA_CH_REQSEL_SIGSEL_CRYPTO0DATA1RD 0x00000004UL

#define	_LDMA_CH_REQSEL_SIGSEL_CRYPTO0DATA1WR 0x00000003UL

#define	_LDMA_CH_REQSEL_SIGSEL_CSENBSLN 0x00000001UL

#define	_LDMA_CH_REQSEL_SIGSEL_CSENDATA 0x00000000UL

#define	_LDMA_CH_REQSEL_SIGSEL_EBIDDEMPTY 0x00000003UL

#define	_LDMA_CH_REQSEL_SIGSEL_EBIHSYNC 0x00000005UL

#define	_LDMA_CH_REQSEL_SIGSEL_EBIPXL0EMPTY 0x00000000UL

#define	_LDMA_CH_REQSEL_SIGSEL_EBIPXL1EMPTY 0x00000001UL

#define	_LDMA_CH_REQSEL_SIGSEL_EBIPXLFULL 0x00000002UL

#define	_LDMA_CH_REQSEL_SIGSEL_EBIVSYNC 0x00000004UL

#define	_LDMA_CH_REQSEL_SIGSEL_I2C0RXDATAV 0x00000000UL

#define	_LDMA_CH_REQSEL_SIGSEL_I2C0TXBL 0x00000001UL

#define	_LDMA_CH_REQSEL_SIGSEL_I2C1RXDATAV 0x00000000UL

#define	_LDMA_CH_REQSEL_SIGSEL_I2C1TXBL 0x00000001UL

#define	_LDMA_CH_REQSEL_SIGSEL_I2C2RXDATAV 0x00000000UL

#define	_LDMA_CH_REQSEL_SIGSEL_I2C2TXBL 0x00000001UL

#define	_LDMA_CH_REQSEL_SIGSEL_LESENSEBUFDATAV 0x00000000UL

#define	_LDMA_CH_REQSEL_SIGSEL_LEUART0RXDATAV 0x00000000UL

#define	_LDMA_CH_REQSEL_SIGSEL_LEUART0TXBL 0x00000001UL

#define	_LDMA_CH_REQSEL_SIGSEL_LEUART0TXEMPTY 0x00000002UL

#define	_LDMA_CH_REQSEL_SIGSEL_LEUART1RXDATAV 0x00000000UL

#define	_LDMA_CH_REQSEL_SIGSEL_LEUART1TXBL 0x00000001UL

#define	_LDMA_CH_REQSEL_SIGSEL_LEUART1TXEMPTY 0x00000002UL

#define	_LDMA_CH_REQSEL_SIGSEL_MASK 0xFUL

#define	_LDMA_CH_REQSEL_SIGSEL_MSCWDATA 0x00000000UL

#define	_LDMA_CH_REQSEL_SIGSEL_PRSREQ0 0x00000000UL

#define	_LDMA_CH_REQSEL_SIGSEL_PRSREQ1 0x00000001UL

#define	_LDMA_CH_REQSEL_SIGSEL_SHIFT 0

#define	_LDMA_CH_REQSEL_SIGSEL_TIMER0CC0 0x00000001UL

#define	_LDMA_CH_REQSEL_SIGSEL_TIMER0CC1 0x00000002UL

#define	_LDMA_CH_REQSEL_SIGSEL_TIMER0CC2 0x00000003UL

#define	_LDMA_CH_REQSEL_SIGSEL_TIMER0UFOF 0x00000000UL

#define	_LDMA_CH_REQSEL_SIGSEL_TIMER1CC0 0x00000001UL

#define	_LDMA_CH_REQSEL_SIGSEL_TIMER1CC1 0x00000002UL

#define	_LDMA_CH_REQSEL_SIGSEL_TIMER1CC2 0x00000003UL

#define	_LDMA_CH_REQSEL_SIGSEL_TIMER1CC3 0x00000004UL

#define	_LDMA_CH_REQSEL_SIGSEL_TIMER1UFOF 0x00000000UL

#define	_LDMA_CH_REQSEL_SIGSEL_TIMER2CC0 0x00000001UL

#define	_LDMA_CH_REQSEL_SIGSEL_TIMER2CC1 0x00000002UL

#define	_LDMA_CH_REQSEL_SIGSEL_TIMER2CC2 0x00000003UL

#define	_LDMA_CH_REQSEL_SIGSEL_TIMER2UFOF 0x00000000UL

#define	_LDMA_CH_REQSEL_SIGSEL_TIMER3CC0 0x00000001UL

#define	_LDMA_CH_REQSEL_SIGSEL_TIMER3CC1 0x00000002UL

#define	_LDMA_CH_REQSEL_SIGSEL_TIMER3CC2 0x00000003UL

#define	_LDMA_CH_REQSEL_SIGSEL_TIMER3UFOF 0x00000000UL

#define	_LDMA_CH_REQSEL_SIGSEL_TIMER4CC0 0x00000001UL

#define	_LDMA_CH_REQSEL_SIGSEL_TIMER4CC1 0x00000002UL

#define	_LDMA_CH_REQSEL_SIGSEL_TIMER4CC2 0x00000003UL

#define	_LDMA_CH_REQSEL_SIGSEL_TIMER4UFOF 0x00000000UL

#define	_LDMA_CH_REQSEL_SIGSEL_TIMER5CC0 0x00000001UL

#define	_LDMA_CH_REQSEL_SIGSEL_TIMER5CC1 0x00000002UL

#define	_LDMA_CH_REQSEL_SIGSEL_TIMER5CC2 0x00000003UL

#define	_LDMA_CH_REQSEL_SIGSEL_TIMER5UFOF 0x00000000UL

#define	_LDMA_CH_REQSEL_SIGSEL_TIMER6CC0 0x00000001UL

#define	_LDMA_CH_REQSEL_SIGSEL_TIMER6CC1 0x00000002UL

#define	_LDMA_CH_REQSEL_SIGSEL_TIMER6CC2 0x00000003UL

#define	_LDMA_CH_REQSEL_SIGSEL_TIMER6UFOF 0x00000000UL

#define	_LDMA_CH_REQSEL_SIGSEL_UART0RXDATAV 0x00000000UL

#define	_LDMA_CH_REQSEL_SIGSEL_UART0TXBL 0x00000001UL

#define	_LDMA_CH_REQSEL_SIGSEL_UART0TXEMPTY 0x00000002UL

#define	_LDMA_CH_REQSEL_SIGSEL_UART1RXDATAV 0x00000000UL

#define	_LDMA_CH_REQSEL_SIGSEL_UART1TXBL 0x00000001UL

#define	_LDMA_CH_REQSEL_SIGSEL_UART1TXEMPTY 0x00000002UL

#define	_LDMA_CH_REQSEL_SIGSEL_USART0RXDATAV 0x00000000UL

#define	_LDMA_CH_REQSEL_SIGSEL_USART0TXBL 0x00000001UL

#define	_LDMA_CH_REQSEL_SIGSEL_USART0TXEMPTY 0x00000002UL

#define	_LDMA_CH_REQSEL_SIGSEL_USART1RXDATAV 0x00000000UL

#define	_LDMA_CH_REQSEL_SIGSEL_USART1RXDATAVRIGHT 0x00000003UL

#define	_LDMA_CH_REQSEL_SIGSEL_USART1TXBL 0x00000001UL

#define	_LDMA_CH_REQSEL_SIGSEL_USART1TXBLRIGHT 0x00000004UL

#define	_LDMA_CH_REQSEL_SIGSEL_USART1TXEMPTY 0x00000002UL

#define	_LDMA_CH_REQSEL_SIGSEL_USART2RXDATAV 0x00000000UL

#define	_LDMA_CH_REQSEL_SIGSEL_USART2TXBL 0x00000001UL

#define	_LDMA_CH_REQSEL_SIGSEL_USART2TXEMPTY 0x00000002UL

#define	_LDMA_CH_REQSEL_SIGSEL_USART3RXDATAV 0x00000000UL

#define	_LDMA_CH_REQSEL_SIGSEL_USART3RXDATAVRIGHT 0x00000003UL

#define	_LDMA_CH_REQSEL_SIGSEL_USART3TXBL 0x00000001UL

#define	_LDMA_CH_REQSEL_SIGSEL_USART3TXBLRIGHT 0x00000004UL

#define	_LDMA_CH_REQSEL_SIGSEL_USART3TXEMPTY 0x00000002UL

#define	_LDMA_CH_REQSEL_SIGSEL_USART4RXDATAV 0x00000000UL

#define	_LDMA_CH_REQSEL_SIGSEL_USART4RXDATAVRIGHT 0x00000003UL

#define	_LDMA_CH_REQSEL_SIGSEL_USART4TXBL 0x00000001UL

#define	_LDMA_CH_REQSEL_SIGSEL_USART4TXBLRIGHT 0x00000004UL

#define	_LDMA_CH_REQSEL_SIGSEL_USART4TXEMPTY 0x00000002UL

#define	_LDMA_CH_REQSEL_SIGSEL_USART5RXDATAV 0x00000000UL

#define	_LDMA_CH_REQSEL_SIGSEL_USART5TXBL 0x00000001UL

#define	_LDMA_CH_REQSEL_SIGSEL_USART5TXEMPTY 0x00000002UL

#define	_LDMA_CH_REQSEL_SIGSEL_VDAC0CH0 0x00000000UL

#define	_LDMA_CH_REQSEL_SIGSEL_VDAC0CH1 0x00000001UL

#define	_LDMA_CH_REQSEL_SIGSEL_WTIMER0CC0 0x00000001UL

#define	_LDMA_CH_REQSEL_SIGSEL_WTIMER0CC1 0x00000002UL

#define	_LDMA_CH_REQSEL_SIGSEL_WTIMER0CC2 0x00000003UL

#define	_LDMA_CH_REQSEL_SIGSEL_WTIMER0UFOF 0x00000000UL

#define	_LDMA_CH_REQSEL_SIGSEL_WTIMER1CC0 0x00000001UL

#define	_LDMA_CH_REQSEL_SIGSEL_WTIMER1CC1 0x00000002UL

#define	_LDMA_CH_REQSEL_SIGSEL_WTIMER1CC2 0x00000003UL

#define	_LDMA_CH_REQSEL_SIGSEL_WTIMER1CC3 0x00000004UL

#define	_LDMA_CH_REQSEL_SIGSEL_WTIMER1UFOF 0x00000000UL

#define	_LDMA_CH_REQSEL_SIGSEL_WTIMER2CC0 0x00000001UL

#define	_LDMA_CH_REQSEL_SIGSEL_WTIMER2CC1 0x00000002UL

#define	_LDMA_CH_REQSEL_SIGSEL_WTIMER2CC2 0x00000003UL

#define	_LDMA_CH_REQSEL_SIGSEL_WTIMER2UFOF 0x00000000UL

#define	_LDMA_CH_REQSEL_SIGSEL_WTIMER3CC0 0x00000001UL

#define	_LDMA_CH_REQSEL_SIGSEL_WTIMER3CC1 0x00000002UL

#define	_LDMA_CH_REQSEL_SIGSEL_WTIMER3CC2 0x00000003UL

#define	_LDMA_CH_REQSEL_SIGSEL_WTIMER3UFOF 0x00000000UL

#define	_LDMA_CH_REQSEL_SOURCESEL_ADC0 0x00000008UL

#define	_LDMA_CH_REQSEL_SOURCESEL_ADC1 0x00000009UL

#define	_LDMA_CH_REQSEL_SOURCESEL_CRYPTO0 0x00000031UL

#define	_LDMA_CH_REQSEL_SOURCESEL_CSEN 0x0000003DUL

#define	_LDMA_CH_REQSEL_SOURCESEL_EBI 0x00000032UL

#define	_LDMA_CH_REQSEL_SOURCESEL_I2C0 0x00000016UL

#define	_LDMA_CH_REQSEL_SOURCESEL_I2C1 0x00000017UL

#define	_LDMA_CH_REQSEL_SOURCESEL_I2C2 0x00000018UL

#define	_LDMA_CH_REQSEL_SOURCESEL_LESENSE 0x0000003EUL

#define	_LDMA_CH_REQSEL_SOURCESEL_LEUART0 0x00000014UL

#define	_LDMA_CH_REQSEL_SOURCESEL_LEUART1 0x00000015UL

#define	_LDMA_CH_REQSEL_SOURCESEL_MASK 0x3F0000UL

#define	_LDMA_CH_REQSEL_SOURCESEL_MSC 0x00000030UL

#define	_LDMA_CH_REQSEL_SOURCESEL_NONE 0x00000000UL

#define	_LDMA_CH_REQSEL_SOURCESEL_PRS 0x00000001UL

#define	_LDMA_CH_REQSEL_SOURCESEL_SHIFT 16

#define	_LDMA_CH_REQSEL_SOURCESEL_TIMER0 0x00000019UL

#define	_LDMA_CH_REQSEL_SOURCESEL_TIMER1 0x0000001AUL

#define	_LDMA_CH_REQSEL_SOURCESEL_TIMER2 0x0000001BUL

#define	_LDMA_CH_REQSEL_SOURCESEL_TIMER3 0x0000001CUL

#define	_LDMA_CH_REQSEL_SOURCESEL_TIMER4 0x0000001DUL

#define	_LDMA_CH_REQSEL_SOURCESEL_TIMER5 0x0000001EUL

#define	_LDMA_CH_REQSEL_SOURCESEL_TIMER6 0x0000001FUL

#define	_LDMA_CH_REQSEL_SOURCESEL_UART0 0x00000012UL

#define	_LDMA_CH_REQSEL_SOURCESEL_UART1 0x00000013UL

#define	_LDMA_CH_REQSEL_SOURCESEL_USART0 0x0000000CUL

#define	_LDMA_CH_REQSEL_SOURCESEL_USART1 0x0000000DUL

#define	_LDMA_CH_REQSEL_SOURCESEL_USART2 0x0000000EUL

#define	_LDMA_CH_REQSEL_SOURCESEL_USART3 0x0000000FUL

#define	_LDMA_CH_REQSEL_SOURCESEL_USART4 0x00000010UL

#define	_LDMA_CH_REQSEL_SOURCESEL_USART5 0x00000011UL

#define	_LDMA_CH_REQSEL_SOURCESEL_VDAC0 0x0000000AUL

#define	_LDMA_CH_REQSEL_SOURCESEL_WTIMER0 0x00000020UL

#define	_LDMA_CH_REQSEL_SOURCESEL_WTIMER1 0x00000021UL

#define	_LDMA_CH_REQSEL_SOURCESEL_WTIMER2 0x00000022UL

#define	_LDMA_CH_REQSEL_SOURCESEL_WTIMER3 0x00000023UL

#define	_LDMA_CH_SRC_MASK 0xFFFFFFFFUL

#define	_LDMA_CH_SRC_RESETVALUE 0x00000000UL

#define	_LDMA_CH_SRC_SRCADDR_DEFAULT 0x00000000UL

#define	_LDMA_CH_SRC_SRCADDR_MASK 0xFFFFFFFFUL

#define	_LDMA_CH_SRC_SRCADDR_SHIFT 0

#define	_LDMA_CHBUSY_BUSY_DEFAULT 0x00000000UL

#define	_LDMA_CHBUSY_BUSY_MASK 0xFFFFFFUL

#define	_LDMA_CHBUSY_BUSY_SHIFT 0

#define	_LDMA_CHBUSY_MASK 0x00FFFFFFUL

#define	_LDMA_CHBUSY_RESETVALUE 0x00000000UL

#define	_LDMA_CHDONE_CHDONE_DEFAULT 0x00000000UL

#define	_LDMA_CHDONE_CHDONE_MASK 0xFFFFFFUL

#define	_LDMA_CHDONE_CHDONE_SHIFT 0

#define	_LDMA_CHDONE_MASK 0x00FFFFFFUL

#define	_LDMA_CHDONE_RESETVALUE 0x00000000UL

#define	_LDMA_CHEN_CHEN_DEFAULT 0x00000000UL

#define	_LDMA_CHEN_CHEN_MASK 0xFFFFFFUL

#define	_LDMA_CHEN_CHEN_SHIFT 0

#define	_LDMA_CHEN_MASK 0x00FFFFFFUL

#define	_LDMA_CHEN_RESETVALUE 0x00000000UL

#define	_LDMA_CTRL_MASK 0x1F00FFFFUL

#define	_LDMA_CTRL_NUMFIXED_DEFAULT 0x00000017UL

#define	_LDMA_CTRL_NUMFIXED_MASK 0x1F000000UL

#define	_LDMA_CTRL_NUMFIXED_SHIFT 24

#define	_LDMA_CTRL_RESETVALUE 0x17000000UL

#define	_LDMA_CTRL_SYNCPRSCLREN_DEFAULT 0x00000000UL

#define	_LDMA_CTRL_SYNCPRSCLREN_MASK 0xFF00UL

#define	_LDMA_CTRL_SYNCPRSCLREN_SHIFT 8

#define	_LDMA_CTRL_SYNCPRSSETEN_DEFAULT 0x00000000UL

#define	_LDMA_CTRL_SYNCPRSSETEN_MASK 0xFFUL

#define	_LDMA_CTRL_SYNCPRSSETEN_SHIFT 0

#define	_LDMA_DBGHALT_DBGHALT_DEFAULT 0x00000000UL

#define	_LDMA_DBGHALT_DBGHALT_MASK 0xFFFFFFUL

#define	_LDMA_DBGHALT_DBGHALT_SHIFT 0

#define	_LDMA_DBGHALT_MASK 0x00FFFFFFUL

#define	_LDMA_DBGHALT_RESETVALUE 0x00000000UL

#define	_LDMA_IEN_DONE_DEFAULT 0x00000000UL

#define	_LDMA_IEN_DONE_MASK 0xFFFFFFUL

#define	_LDMA_IEN_DONE_SHIFT 0

#define	_LDMA_IEN_ERROR_DEFAULT 0x00000000UL

#define	_LDMA_IEN_ERROR_MASK 0x80000000UL

#define	_LDMA_IEN_ERROR_SHIFT 31

#define	_LDMA_IEN_MASK 0x80FFFFFFUL

#define	_LDMA_IEN_RESETVALUE 0x00000000UL

#define	_LDMA_IF_DONE_DEFAULT 0x00000000UL

#define	_LDMA_IF_DONE_MASK 0xFFFFFFUL

#define	_LDMA_IF_DONE_SHIFT 0

#define	_LDMA_IF_ERROR_DEFAULT 0x00000000UL

#define	_LDMA_IF_ERROR_MASK 0x80000000UL

#define	_LDMA_IF_ERROR_SHIFT 31

#define	_LDMA_IF_MASK 0x80FFFFFFUL

#define	_LDMA_IF_RESETVALUE 0x00000000UL

#define	_LDMA_IFC_DONE_DEFAULT 0x00000000UL

#define	_LDMA_IFC_DONE_MASK 0xFFFFFFUL

#define	_LDMA_IFC_DONE_SHIFT 0

#define	_LDMA_IFC_ERROR_DEFAULT 0x00000000UL

#define	_LDMA_IFC_ERROR_MASK 0x80000000UL

#define	_LDMA_IFC_ERROR_SHIFT 31

#define	_LDMA_IFC_MASK 0x80FFFFFFUL

#define	_LDMA_IFC_RESETVALUE 0x00000000UL

#define	_LDMA_IFS_DONE_DEFAULT 0x00000000UL

#define	_LDMA_IFS_DONE_MASK 0xFFFFFFUL

#define	_LDMA_IFS_DONE_SHIFT 0

#define	_LDMA_IFS_ERROR_DEFAULT 0x00000000UL

#define	_LDMA_IFS_ERROR_MASK 0x80000000UL

#define	_LDMA_IFS_ERROR_SHIFT 31

#define	_LDMA_IFS_MASK 0x80FFFFFFUL

#define	_LDMA_IFS_RESETVALUE 0x00000000UL

#define	_LDMA_LINKLOAD_LINKLOAD_DEFAULT 0x00000000UL

#define	_LDMA_LINKLOAD_LINKLOAD_MASK 0xFFFFFFUL

#define	_LDMA_LINKLOAD_LINKLOAD_SHIFT 0

#define	_LDMA_LINKLOAD_MASK 0x00FFFFFFUL

#define	_LDMA_LINKLOAD_RESETVALUE 0x00000000UL

#define	_LDMA_REQCLEAR_MASK 0x00FFFFFFUL

#define	_LDMA_REQCLEAR_REQCLEAR_DEFAULT 0x00000000UL

#define	_LDMA_REQCLEAR_REQCLEAR_MASK 0xFFFFFFUL

#define	_LDMA_REQCLEAR_REQCLEAR_SHIFT 0

#define	_LDMA_REQCLEAR_RESETVALUE 0x00000000UL

#define	_LDMA_REQDIS_MASK 0x00FFFFFFUL

#define	_LDMA_REQDIS_REQDIS_DEFAULT 0x00000000UL

#define	_LDMA_REQDIS_REQDIS_MASK 0xFFFFFFUL

#define	_LDMA_REQDIS_REQDIS_SHIFT 0

#define	_LDMA_REQDIS_RESETVALUE 0x00000000UL

#define	_LDMA_REQPEND_MASK 0x00FFFFFFUL

#define	_LDMA_REQPEND_REQPEND_DEFAULT 0x00000000UL

#define	_LDMA_REQPEND_REQPEND_MASK 0xFFFFFFUL

#define	_LDMA_REQPEND_REQPEND_SHIFT 0

#define	_LDMA_REQPEND_RESETVALUE 0x00000000UL

#define	_LDMA_STATUS_ANYBUSY_DEFAULT 0x00000000UL

#define	_LDMA_STATUS_ANYBUSY_MASK 0x1UL

#define	_LDMA_STATUS_ANYBUSY_SHIFT 0

#define	_LDMA_STATUS_ANYREQ_DEFAULT 0x00000000UL

#define	_LDMA_STATUS_ANYREQ_MASK 0x2UL

#define	_LDMA_STATUS_ANYREQ_SHIFT 1

#define	_LDMA_STATUS_CHERROR_DEFAULT 0x00000000UL

#define	_LDMA_STATUS_CHERROR_MASK 0x1F00UL

#define	_LDMA_STATUS_CHERROR_SHIFT 8

#define	_LDMA_STATUS_CHGRANT_DEFAULT 0x00000000UL

#define	_LDMA_STATUS_CHGRANT_MASK 0xF8UL

#define	_LDMA_STATUS_CHGRANT_SHIFT 3

#define	_LDMA_STATUS_CHNUM_DEFAULT 0x00000018UL

#define	_LDMA_STATUS_CHNUM_MASK 0x1F000000UL

#define	_LDMA_STATUS_CHNUM_SHIFT 24

#define	_LDMA_STATUS_FIFOLEVEL_DEFAULT 0x00000010UL

#define	_LDMA_STATUS_FIFOLEVEL_MASK 0x1F0000UL

#define	_LDMA_STATUS_FIFOLEVEL_SHIFT 16

#define	_LDMA_STATUS_MASK 0x1F1F1FFBUL

#define	_LDMA_STATUS_RESETVALUE 0x18100000UL

#define	_LDMA_SWREQ_MASK 0x00FFFFFFUL

#define	_LDMA_SWREQ_RESETVALUE 0x00000000UL

#define	_LDMA_SWREQ_SWREQ_DEFAULT 0x00000000UL

#define	_LDMA_SWREQ_SWREQ_MASK 0xFFFFFFUL

#define	_LDMA_SWREQ_SWREQ_SHIFT 0

#define	_LDMA_SYNC_MASK 0x000000FFUL

#define	_LDMA_SYNC_RESETVALUE 0x00000000UL

#define	_LDMA_SYNC_SYNCTRIG_DEFAULT 0x00000000UL

#define	_LDMA_SYNC_SYNCTRIG_MASK 0xFFUL

#define	_LDMA_SYNC_SYNCTRIG_SHIFT 0

#define	LDMA_CH_CFG_ARBSLOTS_DEFAULT ( _LDMA_CH_CFG_ARBSLOTS_DEFAULT << 16)

#define	LDMA_CH_CFG_ARBSLOTS_EIGHT ( _LDMA_CH_CFG_ARBSLOTS_EIGHT << 16)

#define	LDMA_CH_CFG_ARBSLOTS_FOUR ( _LDMA_CH_CFG_ARBSLOTS_FOUR << 16)

#define	LDMA_CH_CFG_ARBSLOTS_ONE ( _LDMA_CH_CFG_ARBSLOTS_ONE << 16)

#define	LDMA_CH_CFG_ARBSLOTS_TWO ( _LDMA_CH_CFG_ARBSLOTS_TWO << 16)

#define	LDMA_CH_CFG_DSTINCSIGN (0x1UL << 21)

#define	LDMA_CH_CFG_DSTINCSIGN_DEFAULT ( _LDMA_CH_CFG_DSTINCSIGN_DEFAULT << 21)

#define	LDMA_CH_CFG_DSTINCSIGN_NEGATIVE ( _LDMA_CH_CFG_DSTINCSIGN_NEGATIVE << 21)

#define	LDMA_CH_CFG_DSTINCSIGN_POSITIVE ( _LDMA_CH_CFG_DSTINCSIGN_POSITIVE << 21)

#define	LDMA_CH_CFG_SRCINCSIGN (0x1UL << 20)

#define	LDMA_CH_CFG_SRCINCSIGN_DEFAULT ( _LDMA_CH_CFG_SRCINCSIGN_DEFAULT << 20)

#define	LDMA_CH_CFG_SRCINCSIGN_NEGATIVE ( _LDMA_CH_CFG_SRCINCSIGN_NEGATIVE << 20)

#define	LDMA_CH_CFG_SRCINCSIGN_POSITIVE ( _LDMA_CH_CFG_SRCINCSIGN_POSITIVE << 20)

#define	LDMA_CH_CTRL_BLOCKSIZE_ALL ( _LDMA_CH_CTRL_BLOCKSIZE_ALL << 16)

#define	LDMA_CH_CTRL_BLOCKSIZE_DEFAULT ( _LDMA_CH_CTRL_BLOCKSIZE_DEFAULT << 16)

#define	LDMA_CH_CTRL_BLOCKSIZE_UNIT1 ( _LDMA_CH_CTRL_BLOCKSIZE_UNIT1 << 16)

#define	LDMA_CH_CTRL_BLOCKSIZE_UNIT1024 ( _LDMA_CH_CTRL_BLOCKSIZE_UNIT1024 << 16)

#define	LDMA_CH_CTRL_BLOCKSIZE_UNIT128 ( _LDMA_CH_CTRL_BLOCKSIZE_UNIT128 << 16)

#define	LDMA_CH_CTRL_BLOCKSIZE_UNIT16 ( _LDMA_CH_CTRL_BLOCKSIZE_UNIT16 << 16)

#define	LDMA_CH_CTRL_BLOCKSIZE_UNIT2 ( _LDMA_CH_CTRL_BLOCKSIZE_UNIT2 << 16)

#define	LDMA_CH_CTRL_BLOCKSIZE_UNIT256 ( _LDMA_CH_CTRL_BLOCKSIZE_UNIT256 << 16)

#define	LDMA_CH_CTRL_BLOCKSIZE_UNIT3 ( _LDMA_CH_CTRL_BLOCKSIZE_UNIT3 << 16)

#define	LDMA_CH_CTRL_BLOCKSIZE_UNIT32 ( _LDMA_CH_CTRL_BLOCKSIZE_UNIT32 << 16)

#define	LDMA_CH_CTRL_BLOCKSIZE_UNIT4 ( _LDMA_CH_CTRL_BLOCKSIZE_UNIT4 << 16)

#define	LDMA_CH_CTRL_BLOCKSIZE_UNIT512 ( _LDMA_CH_CTRL_BLOCKSIZE_UNIT512 << 16)

#define	LDMA_CH_CTRL_BLOCKSIZE_UNIT6 ( _LDMA_CH_CTRL_BLOCKSIZE_UNIT6 << 16)

#define	LDMA_CH_CTRL_BLOCKSIZE_UNIT64 ( _LDMA_CH_CTRL_BLOCKSIZE_UNIT64 << 16)

#define	LDMA_CH_CTRL_BLOCKSIZE_UNIT8 ( _LDMA_CH_CTRL_BLOCKSIZE_UNIT8 << 16)

#define	LDMA_CH_CTRL_BYTESWAP (0x1UL << 15)

#define	LDMA_CH_CTRL_BYTESWAP_DEFAULT ( _LDMA_CH_CTRL_BYTESWAP_DEFAULT << 15)

#define	LDMA_CH_CTRL_DECLOOPCNT (0x1UL << 22)

#define	LDMA_CH_CTRL_DECLOOPCNT_DEFAULT ( _LDMA_CH_CTRL_DECLOOPCNT_DEFAULT << 22)

#define	LDMA_CH_CTRL_DONEIFSEN (0x1UL << 20)

#define	LDMA_CH_CTRL_DONEIFSEN_DEFAULT ( _LDMA_CH_CTRL_DONEIFSEN_DEFAULT << 20)

#define	LDMA_CH_CTRL_DSTINC_DEFAULT ( _LDMA_CH_CTRL_DSTINC_DEFAULT << 28)

#define	LDMA_CH_CTRL_DSTINC_FOUR ( _LDMA_CH_CTRL_DSTINC_FOUR << 28)

#define	LDMA_CH_CTRL_DSTINC_NONE ( _LDMA_CH_CTRL_DSTINC_NONE << 28)

#define	LDMA_CH_CTRL_DSTINC_ONE ( _LDMA_CH_CTRL_DSTINC_ONE << 28)

#define	LDMA_CH_CTRL_DSTINC_TWO ( _LDMA_CH_CTRL_DSTINC_TWO << 28)

#define	LDMA_CH_CTRL_DSTMODE (0x1UL << 31)

#define	LDMA_CH_CTRL_DSTMODE_ABSOLUTE ( _LDMA_CH_CTRL_DSTMODE_ABSOLUTE << 31)

#define	LDMA_CH_CTRL_DSTMODE_DEFAULT ( _LDMA_CH_CTRL_DSTMODE_DEFAULT << 31)

#define	LDMA_CH_CTRL_DSTMODE_RELATIVE ( _LDMA_CH_CTRL_DSTMODE_RELATIVE << 31)

#define	LDMA_CH_CTRL_IGNORESREQ (0x1UL << 23)

#define	LDMA_CH_CTRL_IGNORESREQ_DEFAULT ( _LDMA_CH_CTRL_IGNORESREQ_DEFAULT << 23)

#define	LDMA_CH_CTRL_REQMODE (0x1UL << 21)

#define	LDMA_CH_CTRL_REQMODE_ALL ( _LDMA_CH_CTRL_REQMODE_ALL << 21)

#define	LDMA_CH_CTRL_REQMODE_BLOCK ( _LDMA_CH_CTRL_REQMODE_BLOCK << 21)

#define	LDMA_CH_CTRL_REQMODE_DEFAULT ( _LDMA_CH_CTRL_REQMODE_DEFAULT << 21)

#define	LDMA_CH_CTRL_SIZE_BYTE ( _LDMA_CH_CTRL_SIZE_BYTE << 26)

#define	LDMA_CH_CTRL_SIZE_DEFAULT ( _LDMA_CH_CTRL_SIZE_DEFAULT << 26)

#define	LDMA_CH_CTRL_SIZE_HALFWORD ( _LDMA_CH_CTRL_SIZE_HALFWORD << 26)

#define	LDMA_CH_CTRL_SIZE_WORD ( _LDMA_CH_CTRL_SIZE_WORD << 26)

#define	LDMA_CH_CTRL_SRCINC_DEFAULT ( _LDMA_CH_CTRL_SRCINC_DEFAULT << 24)

#define	LDMA_CH_CTRL_SRCINC_FOUR ( _LDMA_CH_CTRL_SRCINC_FOUR << 24)

#define	LDMA_CH_CTRL_SRCINC_NONE ( _LDMA_CH_CTRL_SRCINC_NONE << 24)

#define	LDMA_CH_CTRL_SRCINC_ONE ( _LDMA_CH_CTRL_SRCINC_ONE << 24)

#define	LDMA_CH_CTRL_SRCINC_TWO ( _LDMA_CH_CTRL_SRCINC_TWO << 24)

#define	LDMA_CH_CTRL_SRCMODE (0x1UL << 30)

#define	LDMA_CH_CTRL_SRCMODE_ABSOLUTE ( _LDMA_CH_CTRL_SRCMODE_ABSOLUTE << 30)

#define	LDMA_CH_CTRL_SRCMODE_DEFAULT ( _LDMA_CH_CTRL_SRCMODE_DEFAULT << 30)

#define	LDMA_CH_CTRL_SRCMODE_RELATIVE ( _LDMA_CH_CTRL_SRCMODE_RELATIVE << 30)

#define	LDMA_CH_CTRL_STRUCTREQ (0x1UL << 3)

#define	LDMA_CH_CTRL_STRUCTREQ_DEFAULT ( _LDMA_CH_CTRL_STRUCTREQ_DEFAULT << 3)

#define	LDMA_CH_CTRL_STRUCTTYPE_DEFAULT ( _LDMA_CH_CTRL_STRUCTTYPE_DEFAULT << 0)

#define	LDMA_CH_CTRL_STRUCTTYPE_SYNCHRONIZE ( _LDMA_CH_CTRL_STRUCTTYPE_SYNCHRONIZE << 0)

#define	LDMA_CH_CTRL_STRUCTTYPE_TRANSFER ( _LDMA_CH_CTRL_STRUCTTYPE_TRANSFER << 0)

#define	LDMA_CH_CTRL_STRUCTTYPE_WRITE ( _LDMA_CH_CTRL_STRUCTTYPE_WRITE << 0)

#define	LDMA_CH_CTRL_XFERCNT_DEFAULT ( _LDMA_CH_CTRL_XFERCNT_DEFAULT << 4)

#define	LDMA_CH_DST_DSTADDR_DEFAULT ( _LDMA_CH_DST_DSTADDR_DEFAULT << 0)

#define	LDMA_CH_LINK_LINK (0x1UL << 1)

#define	LDMA_CH_LINK_LINK_DEFAULT ( _LDMA_CH_LINK_LINK_DEFAULT << 1)

#define	LDMA_CH_LINK_LINKADDR_DEFAULT ( _LDMA_CH_LINK_LINKADDR_DEFAULT << 2)

#define	LDMA_CH_LINK_LINKMODE (0x1UL << 0)

#define	LDMA_CH_LINK_LINKMODE_ABSOLUTE ( _LDMA_CH_LINK_LINKMODE_ABSOLUTE << 0)

#define	LDMA_CH_LINK_LINKMODE_DEFAULT ( _LDMA_CH_LINK_LINKMODE_DEFAULT << 0)

#define	LDMA_CH_LINK_LINKMODE_RELATIVE ( _LDMA_CH_LINK_LINKMODE_RELATIVE << 0)

#define	LDMA_CH_LOOP_LOOPCNT_DEFAULT ( _LDMA_CH_LOOP_LOOPCNT_DEFAULT << 0)

#define	LDMA_CH_REQSEL_SIGSEL_ADC0SCAN ( _LDMA_CH_REQSEL_SIGSEL_ADC0SCAN << 0)

#define	LDMA_CH_REQSEL_SIGSEL_ADC0SINGLE ( _LDMA_CH_REQSEL_SIGSEL_ADC0SINGLE << 0)

#define	LDMA_CH_REQSEL_SIGSEL_ADC1SCAN ( _LDMA_CH_REQSEL_SIGSEL_ADC1SCAN << 0)

#define	LDMA_CH_REQSEL_SIGSEL_ADC1SINGLE ( _LDMA_CH_REQSEL_SIGSEL_ADC1SINGLE << 0)

#define	LDMA_CH_REQSEL_SIGSEL_CRYPTO0DATA0RD ( _LDMA_CH_REQSEL_SIGSEL_CRYPTO0DATA0RD << 0)

#define	LDMA_CH_REQSEL_SIGSEL_CRYPTO0DATA0WR ( _LDMA_CH_REQSEL_SIGSEL_CRYPTO0DATA0WR << 0)

#define	LDMA_CH_REQSEL_SIGSEL_CRYPTO0DATA0XWR ( _LDMA_CH_REQSEL_SIGSEL_CRYPTO0DATA0XWR << 0)

#define	LDMA_CH_REQSEL_SIGSEL_CRYPTO0DATA1RD ( _LDMA_CH_REQSEL_SIGSEL_CRYPTO0DATA1RD << 0)

#define	LDMA_CH_REQSEL_SIGSEL_CRYPTO0DATA1WR ( _LDMA_CH_REQSEL_SIGSEL_CRYPTO0DATA1WR << 0)

#define	LDMA_CH_REQSEL_SIGSEL_CSENBSLN ( _LDMA_CH_REQSEL_SIGSEL_CSENBSLN << 0)

#define	LDMA_CH_REQSEL_SIGSEL_CSENDATA ( _LDMA_CH_REQSEL_SIGSEL_CSENDATA << 0)

#define	LDMA_CH_REQSEL_SIGSEL_EBIDDEMPTY ( _LDMA_CH_REQSEL_SIGSEL_EBIDDEMPTY << 0)

#define	LDMA_CH_REQSEL_SIGSEL_EBIHSYNC ( _LDMA_CH_REQSEL_SIGSEL_EBIHSYNC << 0)

#define	LDMA_CH_REQSEL_SIGSEL_EBIPXL0EMPTY ( _LDMA_CH_REQSEL_SIGSEL_EBIPXL0EMPTY << 0)

#define	LDMA_CH_REQSEL_SIGSEL_EBIPXL1EMPTY ( _LDMA_CH_REQSEL_SIGSEL_EBIPXL1EMPTY << 0)

#define	LDMA_CH_REQSEL_SIGSEL_EBIPXLFULL ( _LDMA_CH_REQSEL_SIGSEL_EBIPXLFULL << 0)

#define	LDMA_CH_REQSEL_SIGSEL_EBIVSYNC ( _LDMA_CH_REQSEL_SIGSEL_EBIVSYNC << 0)

#define	LDMA_CH_REQSEL_SIGSEL_I2C0RXDATAV ( _LDMA_CH_REQSEL_SIGSEL_I2C0RXDATAV << 0)

#define	LDMA_CH_REQSEL_SIGSEL_I2C0TXBL ( _LDMA_CH_REQSEL_SIGSEL_I2C0TXBL << 0)

#define	LDMA_CH_REQSEL_SIGSEL_I2C1RXDATAV ( _LDMA_CH_REQSEL_SIGSEL_I2C1RXDATAV << 0)

#define	LDMA_CH_REQSEL_SIGSEL_I2C1TXBL ( _LDMA_CH_REQSEL_SIGSEL_I2C1TXBL << 0)

#define	LDMA_CH_REQSEL_SIGSEL_I2C2RXDATAV ( _LDMA_CH_REQSEL_SIGSEL_I2C2RXDATAV << 0)

#define	LDMA_CH_REQSEL_SIGSEL_I2C2TXBL ( _LDMA_CH_REQSEL_SIGSEL_I2C2TXBL << 0)

#define	LDMA_CH_REQSEL_SIGSEL_LESENSEBUFDATAV ( _LDMA_CH_REQSEL_SIGSEL_LESENSEBUFDATAV << 0)

#define	LDMA_CH_REQSEL_SIGSEL_LEUART0RXDATAV ( _LDMA_CH_REQSEL_SIGSEL_LEUART0RXDATAV << 0)

#define	LDMA_CH_REQSEL_SIGSEL_LEUART0TXBL ( _LDMA_CH_REQSEL_SIGSEL_LEUART0TXBL << 0)

#define	LDMA_CH_REQSEL_SIGSEL_LEUART0TXEMPTY ( _LDMA_CH_REQSEL_SIGSEL_LEUART0TXEMPTY << 0)

#define	LDMA_CH_REQSEL_SIGSEL_LEUART1RXDATAV ( _LDMA_CH_REQSEL_SIGSEL_LEUART1RXDATAV << 0)

#define	LDMA_CH_REQSEL_SIGSEL_LEUART1TXBL ( _LDMA_CH_REQSEL_SIGSEL_LEUART1TXBL << 0)

#define	LDMA_CH_REQSEL_SIGSEL_LEUART1TXEMPTY ( _LDMA_CH_REQSEL_SIGSEL_LEUART1TXEMPTY << 0)

#define	LDMA_CH_REQSEL_SIGSEL_MSCWDATA ( _LDMA_CH_REQSEL_SIGSEL_MSCWDATA << 0)

#define	LDMA_CH_REQSEL_SIGSEL_PRSREQ0 ( _LDMA_CH_REQSEL_SIGSEL_PRSREQ0 << 0)

#define	LDMA_CH_REQSEL_SIGSEL_PRSREQ1 ( _LDMA_CH_REQSEL_SIGSEL_PRSREQ1 << 0)

#define	LDMA_CH_REQSEL_SIGSEL_TIMER0CC0 ( _LDMA_CH_REQSEL_SIGSEL_TIMER0CC0 << 0)

#define	LDMA_CH_REQSEL_SIGSEL_TIMER0CC1 ( _LDMA_CH_REQSEL_SIGSEL_TIMER0CC1 << 0)

#define	LDMA_CH_REQSEL_SIGSEL_TIMER0CC2 ( _LDMA_CH_REQSEL_SIGSEL_TIMER0CC2 << 0)

#define	LDMA_CH_REQSEL_SIGSEL_TIMER0UFOF ( _LDMA_CH_REQSEL_SIGSEL_TIMER0UFOF << 0)

#define	LDMA_CH_REQSEL_SIGSEL_TIMER1CC0 ( _LDMA_CH_REQSEL_SIGSEL_TIMER1CC0 << 0)

#define	LDMA_CH_REQSEL_SIGSEL_TIMER1CC1 ( _LDMA_CH_REQSEL_SIGSEL_TIMER1CC1 << 0)

#define	LDMA_CH_REQSEL_SIGSEL_TIMER1CC2 ( _LDMA_CH_REQSEL_SIGSEL_TIMER1CC2 << 0)

#define	LDMA_CH_REQSEL_SIGSEL_TIMER1CC3 ( _LDMA_CH_REQSEL_SIGSEL_TIMER1CC3 << 0)

#define	LDMA_CH_REQSEL_SIGSEL_TIMER1UFOF ( _LDMA_CH_REQSEL_SIGSEL_TIMER1UFOF << 0)

#define	LDMA_CH_REQSEL_SIGSEL_TIMER2CC0 ( _LDMA_CH_REQSEL_SIGSEL_TIMER2CC0 << 0)

#define	LDMA_CH_REQSEL_SIGSEL_TIMER2CC1 ( _LDMA_CH_REQSEL_SIGSEL_TIMER2CC1 << 0)

#define	LDMA_CH_REQSEL_SIGSEL_TIMER2CC2 ( _LDMA_CH_REQSEL_SIGSEL_TIMER2CC2 << 0)

#define	LDMA_CH_REQSEL_SIGSEL_TIMER2UFOF ( _LDMA_CH_REQSEL_SIGSEL_TIMER2UFOF << 0)

#define	LDMA_CH_REQSEL_SIGSEL_TIMER3CC0 ( _LDMA_CH_REQSEL_SIGSEL_TIMER3CC0 << 0)

#define	LDMA_CH_REQSEL_SIGSEL_TIMER3CC1 ( _LDMA_CH_REQSEL_SIGSEL_TIMER3CC1 << 0)

#define	LDMA_CH_REQSEL_SIGSEL_TIMER3CC2 ( _LDMA_CH_REQSEL_SIGSEL_TIMER3CC2 << 0)

#define	LDMA_CH_REQSEL_SIGSEL_TIMER3UFOF ( _LDMA_CH_REQSEL_SIGSEL_TIMER3UFOF << 0)

#define	LDMA_CH_REQSEL_SIGSEL_TIMER4CC0 ( _LDMA_CH_REQSEL_SIGSEL_TIMER4CC0 << 0)

#define	LDMA_CH_REQSEL_SIGSEL_TIMER4CC1 ( _LDMA_CH_REQSEL_SIGSEL_TIMER4CC1 << 0)

#define	LDMA_CH_REQSEL_SIGSEL_TIMER4CC2 ( _LDMA_CH_REQSEL_SIGSEL_TIMER4CC2 << 0)

#define	LDMA_CH_REQSEL_SIGSEL_TIMER4UFOF ( _LDMA_CH_REQSEL_SIGSEL_TIMER4UFOF << 0)

#define	LDMA_CH_REQSEL_SIGSEL_TIMER5CC0 ( _LDMA_CH_REQSEL_SIGSEL_TIMER5CC0 << 0)

#define	LDMA_CH_REQSEL_SIGSEL_TIMER5CC1 ( _LDMA_CH_REQSEL_SIGSEL_TIMER5CC1 << 0)

#define	LDMA_CH_REQSEL_SIGSEL_TIMER5CC2 ( _LDMA_CH_REQSEL_SIGSEL_TIMER5CC2 << 0)

#define	LDMA_CH_REQSEL_SIGSEL_TIMER5UFOF ( _LDMA_CH_REQSEL_SIGSEL_TIMER5UFOF << 0)

#define	LDMA_CH_REQSEL_SIGSEL_TIMER6CC0 ( _LDMA_CH_REQSEL_SIGSEL_TIMER6CC0 << 0)

#define	LDMA_CH_REQSEL_SIGSEL_TIMER6CC1 ( _LDMA_CH_REQSEL_SIGSEL_TIMER6CC1 << 0)

#define	LDMA_CH_REQSEL_SIGSEL_TIMER6CC2 ( _LDMA_CH_REQSEL_SIGSEL_TIMER6CC2 << 0)

#define	LDMA_CH_REQSEL_SIGSEL_TIMER6UFOF ( _LDMA_CH_REQSEL_SIGSEL_TIMER6UFOF << 0)

#define	LDMA_CH_REQSEL_SIGSEL_UART0RXDATAV ( _LDMA_CH_REQSEL_SIGSEL_UART0RXDATAV << 0)

#define	LDMA_CH_REQSEL_SIGSEL_UART0TXBL ( _LDMA_CH_REQSEL_SIGSEL_UART0TXBL << 0)

#define	LDMA_CH_REQSEL_SIGSEL_UART0TXEMPTY ( _LDMA_CH_REQSEL_SIGSEL_UART0TXEMPTY << 0)

#define	LDMA_CH_REQSEL_SIGSEL_UART1RXDATAV ( _LDMA_CH_REQSEL_SIGSEL_UART1RXDATAV << 0)

#define	LDMA_CH_REQSEL_SIGSEL_UART1TXBL ( _LDMA_CH_REQSEL_SIGSEL_UART1TXBL << 0)

#define	LDMA_CH_REQSEL_SIGSEL_UART1TXEMPTY ( _LDMA_CH_REQSEL_SIGSEL_UART1TXEMPTY << 0)

#define	LDMA_CH_REQSEL_SIGSEL_USART0RXDATAV ( _LDMA_CH_REQSEL_SIGSEL_USART0RXDATAV << 0)

#define	LDMA_CH_REQSEL_SIGSEL_USART0TXBL ( _LDMA_CH_REQSEL_SIGSEL_USART0TXBL << 0)

#define	LDMA_CH_REQSEL_SIGSEL_USART0TXEMPTY ( _LDMA_CH_REQSEL_SIGSEL_USART0TXEMPTY << 0)

#define	LDMA_CH_REQSEL_SIGSEL_USART1RXDATAV ( _LDMA_CH_REQSEL_SIGSEL_USART1RXDATAV << 0)

#define	LDMA_CH_REQSEL_SIGSEL_USART1RXDATAVRIGHT ( _LDMA_CH_REQSEL_SIGSEL_USART1RXDATAVRIGHT << 0)

#define	LDMA_CH_REQSEL_SIGSEL_USART1TXBL ( _LDMA_CH_REQSEL_SIGSEL_USART1TXBL << 0)

#define	LDMA_CH_REQSEL_SIGSEL_USART1TXBLRIGHT ( _LDMA_CH_REQSEL_SIGSEL_USART1TXBLRIGHT << 0)

#define	LDMA_CH_REQSEL_SIGSEL_USART1TXEMPTY ( _LDMA_CH_REQSEL_SIGSEL_USART1TXEMPTY << 0)

#define	LDMA_CH_REQSEL_SIGSEL_USART2RXDATAV ( _LDMA_CH_REQSEL_SIGSEL_USART2RXDATAV << 0)

#define	LDMA_CH_REQSEL_SIGSEL_USART2TXBL ( _LDMA_CH_REQSEL_SIGSEL_USART2TXBL << 0)

#define	LDMA_CH_REQSEL_SIGSEL_USART2TXEMPTY ( _LDMA_CH_REQSEL_SIGSEL_USART2TXEMPTY << 0)

#define	LDMA_CH_REQSEL_SIGSEL_USART3RXDATAV ( _LDMA_CH_REQSEL_SIGSEL_USART3RXDATAV << 0)

#define	LDMA_CH_REQSEL_SIGSEL_USART3RXDATAVRIGHT ( _LDMA_CH_REQSEL_SIGSEL_USART3RXDATAVRIGHT << 0)

#define	LDMA_CH_REQSEL_SIGSEL_USART3TXBL ( _LDMA_CH_REQSEL_SIGSEL_USART3TXBL << 0)

#define	LDMA_CH_REQSEL_SIGSEL_USART3TXBLRIGHT ( _LDMA_CH_REQSEL_SIGSEL_USART3TXBLRIGHT << 0)

#define	LDMA_CH_REQSEL_SIGSEL_USART3TXEMPTY ( _LDMA_CH_REQSEL_SIGSEL_USART3TXEMPTY << 0)

#define	LDMA_CH_REQSEL_SIGSEL_USART4RXDATAV ( _LDMA_CH_REQSEL_SIGSEL_USART4RXDATAV << 0)

#define	LDMA_CH_REQSEL_SIGSEL_USART4RXDATAVRIGHT ( _LDMA_CH_REQSEL_SIGSEL_USART4RXDATAVRIGHT << 0)

#define	LDMA_CH_REQSEL_SIGSEL_USART4TXBL ( _LDMA_CH_REQSEL_SIGSEL_USART4TXBL << 0)

#define	LDMA_CH_REQSEL_SIGSEL_USART4TXBLRIGHT ( _LDMA_CH_REQSEL_SIGSEL_USART4TXBLRIGHT << 0)

#define	LDMA_CH_REQSEL_SIGSEL_USART4TXEMPTY ( _LDMA_CH_REQSEL_SIGSEL_USART4TXEMPTY << 0)

#define	LDMA_CH_REQSEL_SIGSEL_USART5RXDATAV ( _LDMA_CH_REQSEL_SIGSEL_USART5RXDATAV << 0)

#define	LDMA_CH_REQSEL_SIGSEL_USART5TXBL ( _LDMA_CH_REQSEL_SIGSEL_USART5TXBL << 0)

#define	LDMA_CH_REQSEL_SIGSEL_USART5TXEMPTY ( _LDMA_CH_REQSEL_SIGSEL_USART5TXEMPTY << 0)

#define	LDMA_CH_REQSEL_SIGSEL_VDAC0CH0 ( _LDMA_CH_REQSEL_SIGSEL_VDAC0CH0 << 0)

#define	LDMA_CH_REQSEL_SIGSEL_VDAC0CH1 ( _LDMA_CH_REQSEL_SIGSEL_VDAC0CH1 << 0)

#define	LDMA_CH_REQSEL_SIGSEL_WTIMER0CC0 ( _LDMA_CH_REQSEL_SIGSEL_WTIMER0CC0 << 0)

#define	LDMA_CH_REQSEL_SIGSEL_WTIMER0CC1 ( _LDMA_CH_REQSEL_SIGSEL_WTIMER0CC1 << 0)

#define	LDMA_CH_REQSEL_SIGSEL_WTIMER0CC2 ( _LDMA_CH_REQSEL_SIGSEL_WTIMER0CC2 << 0)

#define	LDMA_CH_REQSEL_SIGSEL_WTIMER0UFOF ( _LDMA_CH_REQSEL_SIGSEL_WTIMER0UFOF << 0)

#define	LDMA_CH_REQSEL_SIGSEL_WTIMER1CC0 ( _LDMA_CH_REQSEL_SIGSEL_WTIMER1CC0 << 0)

#define	LDMA_CH_REQSEL_SIGSEL_WTIMER1CC1 ( _LDMA_CH_REQSEL_SIGSEL_WTIMER1CC1 << 0)

#define	LDMA_CH_REQSEL_SIGSEL_WTIMER1CC2 ( _LDMA_CH_REQSEL_SIGSEL_WTIMER1CC2 << 0)

#define	LDMA_CH_REQSEL_SIGSEL_WTIMER1CC3 ( _LDMA_CH_REQSEL_SIGSEL_WTIMER1CC3 << 0)

#define	LDMA_CH_REQSEL_SIGSEL_WTIMER1UFOF ( _LDMA_CH_REQSEL_SIGSEL_WTIMER1UFOF << 0)

#define	LDMA_CH_REQSEL_SIGSEL_WTIMER2CC0 ( _LDMA_CH_REQSEL_SIGSEL_WTIMER2CC0 << 0)

#define	LDMA_CH_REQSEL_SIGSEL_WTIMER2CC1 ( _LDMA_CH_REQSEL_SIGSEL_WTIMER2CC1 << 0)

#define	LDMA_CH_REQSEL_SIGSEL_WTIMER2CC2 ( _LDMA_CH_REQSEL_SIGSEL_WTIMER2CC2 << 0)

#define	LDMA_CH_REQSEL_SIGSEL_WTIMER2UFOF ( _LDMA_CH_REQSEL_SIGSEL_WTIMER2UFOF << 0)

#define	LDMA_CH_REQSEL_SIGSEL_WTIMER3CC0 ( _LDMA_CH_REQSEL_SIGSEL_WTIMER3CC0 << 0)

#define	LDMA_CH_REQSEL_SIGSEL_WTIMER3CC1 ( _LDMA_CH_REQSEL_SIGSEL_WTIMER3CC1 << 0)

#define	LDMA_CH_REQSEL_SIGSEL_WTIMER3CC2 ( _LDMA_CH_REQSEL_SIGSEL_WTIMER3CC2 << 0)

#define	LDMA_CH_REQSEL_SIGSEL_WTIMER3UFOF ( _LDMA_CH_REQSEL_SIGSEL_WTIMER3UFOF << 0)

#define	LDMA_CH_REQSEL_SOURCESEL_ADC0 ( _LDMA_CH_REQSEL_SOURCESEL_ADC0 << 16)

#define	LDMA_CH_REQSEL_SOURCESEL_ADC1 ( _LDMA_CH_REQSEL_SOURCESEL_ADC1 << 16)

#define	LDMA_CH_REQSEL_SOURCESEL_CRYPTO0 ( _LDMA_CH_REQSEL_SOURCESEL_CRYPTO0 << 16)

#define	LDMA_CH_REQSEL_SOURCESEL_CSEN ( _LDMA_CH_REQSEL_SOURCESEL_CSEN << 16)

#define	LDMA_CH_REQSEL_SOURCESEL_EBI ( _LDMA_CH_REQSEL_SOURCESEL_EBI << 16)

#define	LDMA_CH_REQSEL_SOURCESEL_I2C0 ( _LDMA_CH_REQSEL_SOURCESEL_I2C0 << 16)

#define	LDMA_CH_REQSEL_SOURCESEL_I2C1 ( _LDMA_CH_REQSEL_SOURCESEL_I2C1 << 16)

#define	LDMA_CH_REQSEL_SOURCESEL_I2C2 ( _LDMA_CH_REQSEL_SOURCESEL_I2C2 << 16)

#define	LDMA_CH_REQSEL_SOURCESEL_LESENSE ( _LDMA_CH_REQSEL_SOURCESEL_LESENSE << 16)

#define	LDMA_CH_REQSEL_SOURCESEL_LEUART0 ( _LDMA_CH_REQSEL_SOURCESEL_LEUART0 << 16)

#define	LDMA_CH_REQSEL_SOURCESEL_LEUART1 ( _LDMA_CH_REQSEL_SOURCESEL_LEUART1 << 16)

#define	LDMA_CH_REQSEL_SOURCESEL_MSC ( _LDMA_CH_REQSEL_SOURCESEL_MSC << 16)

#define	LDMA_CH_REQSEL_SOURCESEL_NONE ( _LDMA_CH_REQSEL_SOURCESEL_NONE << 16)

#define	LDMA_CH_REQSEL_SOURCESEL_PRS ( _LDMA_CH_REQSEL_SOURCESEL_PRS << 16)

#define	LDMA_CH_REQSEL_SOURCESEL_TIMER0 ( _LDMA_CH_REQSEL_SOURCESEL_TIMER0 << 16)

#define	LDMA_CH_REQSEL_SOURCESEL_TIMER1 ( _LDMA_CH_REQSEL_SOURCESEL_TIMER1 << 16)

#define	LDMA_CH_REQSEL_SOURCESEL_TIMER2 ( _LDMA_CH_REQSEL_SOURCESEL_TIMER2 << 16)

#define	LDMA_CH_REQSEL_SOURCESEL_TIMER3 ( _LDMA_CH_REQSEL_SOURCESEL_TIMER3 << 16)

#define	LDMA_CH_REQSEL_SOURCESEL_TIMER4 ( _LDMA_CH_REQSEL_SOURCESEL_TIMER4 << 16)

#define	LDMA_CH_REQSEL_SOURCESEL_TIMER5 ( _LDMA_CH_REQSEL_SOURCESEL_TIMER5 << 16)

#define	LDMA_CH_REQSEL_SOURCESEL_TIMER6 ( _LDMA_CH_REQSEL_SOURCESEL_TIMER6 << 16)

#define	LDMA_CH_REQSEL_SOURCESEL_UART0 ( _LDMA_CH_REQSEL_SOURCESEL_UART0 << 16)

#define	LDMA_CH_REQSEL_SOURCESEL_UART1 ( _LDMA_CH_REQSEL_SOURCESEL_UART1 << 16)

#define	LDMA_CH_REQSEL_SOURCESEL_USART0 ( _LDMA_CH_REQSEL_SOURCESEL_USART0 << 16)

#define	LDMA_CH_REQSEL_SOURCESEL_USART1 ( _LDMA_CH_REQSEL_SOURCESEL_USART1 << 16)

#define	LDMA_CH_REQSEL_SOURCESEL_USART2 ( _LDMA_CH_REQSEL_SOURCESEL_USART2 << 16)

#define	LDMA_CH_REQSEL_SOURCESEL_USART3 ( _LDMA_CH_REQSEL_SOURCESEL_USART3 << 16)

#define	LDMA_CH_REQSEL_SOURCESEL_USART4 ( _LDMA_CH_REQSEL_SOURCESEL_USART4 << 16)

#define	LDMA_CH_REQSEL_SOURCESEL_USART5 ( _LDMA_CH_REQSEL_SOURCESEL_USART5 << 16)

#define	LDMA_CH_REQSEL_SOURCESEL_VDAC0 ( _LDMA_CH_REQSEL_SOURCESEL_VDAC0 << 16)

#define	LDMA_CH_REQSEL_SOURCESEL_WTIMER0 ( _LDMA_CH_REQSEL_SOURCESEL_WTIMER0 << 16)

#define	LDMA_CH_REQSEL_SOURCESEL_WTIMER1 ( _LDMA_CH_REQSEL_SOURCESEL_WTIMER1 << 16)

#define	LDMA_CH_REQSEL_SOURCESEL_WTIMER2 ( _LDMA_CH_REQSEL_SOURCESEL_WTIMER2 << 16)

#define	LDMA_CH_REQSEL_SOURCESEL_WTIMER3 ( _LDMA_CH_REQSEL_SOURCESEL_WTIMER3 << 16)

#define	LDMA_CH_SRC_SRCADDR_DEFAULT ( _LDMA_CH_SRC_SRCADDR_DEFAULT << 0)

#define	LDMA_CHBUSY_BUSY_DEFAULT ( _LDMA_CHBUSY_BUSY_DEFAULT << 0)

#define	LDMA_CHDONE_CHDONE_DEFAULT ( _LDMA_CHDONE_CHDONE_DEFAULT << 0)

#define	LDMA_CHEN_CHEN_DEFAULT ( _LDMA_CHEN_CHEN_DEFAULT << 0)

#define	LDMA_CTRL_NUMFIXED_DEFAULT ( _LDMA_CTRL_NUMFIXED_DEFAULT << 24)

#define	LDMA_CTRL_SYNCPRSCLREN_DEFAULT ( _LDMA_CTRL_SYNCPRSCLREN_DEFAULT << 8)

#define	LDMA_CTRL_SYNCPRSSETEN_DEFAULT ( _LDMA_CTRL_SYNCPRSSETEN_DEFAULT << 0)

#define	LDMA_DBGHALT_DBGHALT_DEFAULT ( _LDMA_DBGHALT_DBGHALT_DEFAULT << 0)

#define	LDMA_IEN_DONE_DEFAULT ( _LDMA_IEN_DONE_DEFAULT << 0)

#define	LDMA_IEN_ERROR (0x1UL << 31)

#define	LDMA_IEN_ERROR_DEFAULT ( _LDMA_IEN_ERROR_DEFAULT << 31)

#define	LDMA_IF_DONE_DEFAULT ( _LDMA_IF_DONE_DEFAULT << 0)

#define	LDMA_IF_ERROR (0x1UL << 31)

#define	LDMA_IF_ERROR_DEFAULT ( _LDMA_IF_ERROR_DEFAULT << 31)

#define	LDMA_IFC_DONE_DEFAULT ( _LDMA_IFC_DONE_DEFAULT << 0)

#define	LDMA_IFC_ERROR (0x1UL << 31)

#define	LDMA_IFC_ERROR_DEFAULT ( _LDMA_IFC_ERROR_DEFAULT << 31)

#define	LDMA_IFS_DONE_DEFAULT ( _LDMA_IFS_DONE_DEFAULT << 0)

#define	LDMA_IFS_ERROR (0x1UL << 31)

#define	LDMA_IFS_ERROR_DEFAULT ( _LDMA_IFS_ERROR_DEFAULT << 31)

#define	LDMA_LINKLOAD_LINKLOAD_DEFAULT ( _LDMA_LINKLOAD_LINKLOAD_DEFAULT << 0)

#define	LDMA_REQCLEAR_REQCLEAR_DEFAULT ( _LDMA_REQCLEAR_REQCLEAR_DEFAULT << 0)

#define	LDMA_REQDIS_REQDIS_DEFAULT ( _LDMA_REQDIS_REQDIS_DEFAULT << 0)

#define	LDMA_REQPEND_REQPEND_DEFAULT ( _LDMA_REQPEND_REQPEND_DEFAULT << 0)

#define	LDMA_STATUS_ANYBUSY (0x1UL << 0)

#define	LDMA_STATUS_ANYBUSY_DEFAULT ( _LDMA_STATUS_ANYBUSY_DEFAULT << 0)

#define	LDMA_STATUS_ANYREQ (0x1UL << 1)

#define	LDMA_STATUS_ANYREQ_DEFAULT ( _LDMA_STATUS_ANYREQ_DEFAULT << 1)

#define	LDMA_STATUS_CHERROR_DEFAULT ( _LDMA_STATUS_CHERROR_DEFAULT << 8)

#define	LDMA_STATUS_CHGRANT_DEFAULT ( _LDMA_STATUS_CHGRANT_DEFAULT << 3)

#define	LDMA_STATUS_CHNUM_DEFAULT ( _LDMA_STATUS_CHNUM_DEFAULT << 24)

#define	LDMA_STATUS_FIFOLEVEL_DEFAULT ( _LDMA_STATUS_FIFOLEVEL_DEFAULT << 16)

#define	LDMA_SWREQ_SWREQ_DEFAULT ( _LDMA_SWREQ_SWREQ_DEFAULT << 0)

#define	LDMA_SYNC_SYNCTRIG_DEFAULT ( _LDMA_SYNC_SYNCTRIG_DEFAULT << 0)

Macro Definition Documentation

#define _LDMA_CH_CFG_ARBSLOTS_DEFAULT 0x00000000UL

Mode DEFAULT for LDMA_CH_CFG

Definition at line 561 of file efm32gg11b_ldma.h .

#define _LDMA_CH_CFG_ARBSLOTS_EIGHT 0x00000003UL

Mode EIGHT for LDMA_CH_CFG

Definition at line 565 of file efm32gg11b_ldma.h .

#define _LDMA_CH_CFG_ARBSLOTS_FOUR 0x00000002UL

Mode FOUR for LDMA_CH_CFG

Definition at line 564 of file efm32gg11b_ldma.h .

#define _LDMA_CH_CFG_ARBSLOTS_MASK 0x30000UL

Bit mask for LDMA_ARBSLOTS

Definition at line 560 of file efm32gg11b_ldma.h .

Referenced by LDMA_StartTransfer() .

#define _LDMA_CH_CFG_ARBSLOTS_ONE 0x00000000UL

Mode ONE for LDMA_CH_CFG

Definition at line 562 of file efm32gg11b_ldma.h .

#define _LDMA_CH_CFG_ARBSLOTS_SHIFT 16

Shift value for LDMA_ARBSLOTS

Definition at line 559 of file efm32gg11b_ldma.h .

Referenced by LDMA_StartTransfer() .

#define _LDMA_CH_CFG_ARBSLOTS_TWO 0x00000001UL

Mode TWO for LDMA_CH_CFG

Definition at line 563 of file efm32gg11b_ldma.h .

#define _LDMA_CH_CFG_DSTINCSIGN_DEFAULT 0x00000000UL

Mode DEFAULT for LDMA_CH_CFG

Definition at line 583 of file efm32gg11b_ldma.h .

#define _LDMA_CH_CFG_DSTINCSIGN_MASK 0x200000UL

Bit mask for LDMA_DSTINCSIGN

Definition at line 582 of file efm32gg11b_ldma.h .

Referenced by LDMA_StartTransfer() .

#define _LDMA_CH_CFG_DSTINCSIGN_NEGATIVE 0x00000001UL

Mode NEGATIVE for LDMA_CH_CFG

Definition at line 585 of file efm32gg11b_ldma.h .

#define _LDMA_CH_CFG_DSTINCSIGN_POSITIVE 0x00000000UL

Mode POSITIVE for LDMA_CH_CFG

Definition at line 584 of file efm32gg11b_ldma.h .

#define _LDMA_CH_CFG_DSTINCSIGN_SHIFT 21

Shift value for LDMA_DSTINCSIGN

Definition at line 581 of file efm32gg11b_ldma.h .

Referenced by LDMA_StartTransfer() .

#define _LDMA_CH_CFG_MASK 0x00330000UL

Mask for LDMA_CH_CFG

Definition at line 558 of file efm32gg11b_ldma.h .

#define _LDMA_CH_CFG_RESETVALUE 0x00000000UL

Default value for LDMA_CH_CFG

Definition at line 557 of file efm32gg11b_ldma.h .

#define _LDMA_CH_CFG_SRCINCSIGN_DEFAULT 0x00000000UL

Mode DEFAULT for LDMA_CH_CFG

Definition at line 574 of file efm32gg11b_ldma.h .

#define _LDMA_CH_CFG_SRCINCSIGN_MASK 0x100000UL

Bit mask for LDMA_SRCINCSIGN

Definition at line 573 of file efm32gg11b_ldma.h .

Referenced by LDMA_StartTransfer() .

#define _LDMA_CH_CFG_SRCINCSIGN_NEGATIVE 0x00000001UL

Mode NEGATIVE for LDMA_CH_CFG

Definition at line 576 of file efm32gg11b_ldma.h .

#define _LDMA_CH_CFG_SRCINCSIGN_POSITIVE 0x00000000UL

Mode POSITIVE for LDMA_CH_CFG

Definition at line 575 of file efm32gg11b_ldma.h .

#define _LDMA_CH_CFG_SRCINCSIGN_SHIFT 20

Shift value for LDMA_SRCINCSIGN

Definition at line 572 of file efm32gg11b_ldma.h .

Referenced by LDMA_StartTransfer() .

#define _LDMA_CH_CTRL_BLOCKSIZE_ALL 0x0000000FUL

Mode ALL for LDMA_CH_CTRL

Definition at line 641 of file efm32gg11b_ldma.h .

#define _LDMA_CH_CTRL_BLOCKSIZE_DEFAULT 0x00000000UL

Mode DEFAULT for LDMA_CH_CTRL

Definition at line 627 of file efm32gg11b_ldma.h .

#define _LDMA_CH_CTRL_BLOCKSIZE_MASK 0xF0000UL

Bit mask for LDMA_BLOCKSIZE

Definition at line 626 of file efm32gg11b_ldma.h .

#define _LDMA_CH_CTRL_BLOCKSIZE_SHIFT 16

Shift value for LDMA_BLOCKSIZE

Definition at line 625 of file efm32gg11b_ldma.h .

#define _LDMA_CH_CTRL_BLOCKSIZE_UNIT1 0x00000000UL

Mode UNIT1 for LDMA_CH_CTRL

Definition at line 628 of file efm32gg11b_ldma.h .

#define _LDMA_CH_CTRL_BLOCKSIZE_UNIT1024 0x0000000EUL

Mode UNIT1024 for LDMA_CH_CTRL

Definition at line 640 of file efm32gg11b_ldma.h .

#define _LDMA_CH_CTRL_BLOCKSIZE_UNIT128 0x0000000BUL

Mode UNIT128 for LDMA_CH_CTRL

Definition at line 637 of file efm32gg11b_ldma.h .

#define _LDMA_CH_CTRL_BLOCKSIZE_UNIT16 0x00000007UL

Mode UNIT16 for LDMA_CH_CTRL

Definition at line 634 of file efm32gg11b_ldma.h .

#define _LDMA_CH_CTRL_BLOCKSIZE_UNIT2 0x00000001UL

Mode UNIT2 for LDMA_CH_CTRL

Definition at line 629 of file efm32gg11b_ldma.h .

#define _LDMA_CH_CTRL_BLOCKSIZE_UNIT256 0x0000000CUL

Mode UNIT256 for LDMA_CH_CTRL

Definition at line 638 of file efm32gg11b_ldma.h .

#define _LDMA_CH_CTRL_BLOCKSIZE_UNIT3 0x00000002UL

Mode UNIT3 for LDMA_CH_CTRL

Definition at line 630 of file efm32gg11b_ldma.h .

#define _LDMA_CH_CTRL_BLOCKSIZE_UNIT32 0x00000009UL

Mode UNIT32 for LDMA_CH_CTRL

Definition at line 635 of file efm32gg11b_ldma.h .

#define _LDMA_CH_CTRL_BLOCKSIZE_UNIT4 0x00000003UL

Mode UNIT4 for LDMA_CH_CTRL

Definition at line 631 of file efm32gg11b_ldma.h .

#define _LDMA_CH_CTRL_BLOCKSIZE_UNIT512 0x0000000DUL

Mode UNIT512 for LDMA_CH_CTRL

Definition at line 639 of file efm32gg11b_ldma.h .

#define _LDMA_CH_CTRL_BLOCKSIZE_UNIT6 0x00000004UL

Mode UNIT6 for LDMA_CH_CTRL

Definition at line 632 of file efm32gg11b_ldma.h .

#define _LDMA_CH_CTRL_BLOCKSIZE_UNIT64 0x0000000AUL

Mode UNIT64 for LDMA_CH_CTRL

Definition at line 636 of file efm32gg11b_ldma.h .

#define _LDMA_CH_CTRL_BLOCKSIZE_UNIT8 0x00000005UL

Mode UNIT8 for LDMA_CH_CTRL

Definition at line 633 of file efm32gg11b_ldma.h .

#define _LDMA_CH_CTRL_BYTESWAP_DEFAULT 0x00000000UL

Mode DEFAULT for LDMA_CH_CTRL

Definition at line 623 of file efm32gg11b_ldma.h .

#define _LDMA_CH_CTRL_BYTESWAP_MASK 0x8000UL

Bit mask for LDMA_BYTESWAP

Definition at line 622 of file efm32gg11b_ldma.h .

#define _LDMA_CH_CTRL_BYTESWAP_SHIFT 15

Shift value for LDMA_BYTESWAP

Definition at line 621 of file efm32gg11b_ldma.h .

#define _LDMA_CH_CTRL_DECLOOPCNT_DEFAULT 0x00000000UL

Mode DEFAULT for LDMA_CH_CTRL

Definition at line 674 of file efm32gg11b_ldma.h .

#define _LDMA_CH_CTRL_DECLOOPCNT_MASK 0x400000UL

Bit mask for LDMA_DECLOOPCNT

Definition at line 673 of file efm32gg11b_ldma.h .

#define _LDMA_CH_CTRL_DECLOOPCNT_SHIFT 22

Shift value for LDMA_DECLOOPCNT

Definition at line 672 of file efm32gg11b_ldma.h .

#define _LDMA_CH_CTRL_DONEIFSEN_DEFAULT 0x00000000UL

Mode DEFAULT for LDMA_CH_CTRL

Definition at line 660 of file efm32gg11b_ldma.h .

#define _LDMA_CH_CTRL_DONEIFSEN_MASK 0x100000UL

Bit mask for LDMA_DONEIFSEN

Definition at line 659 of file efm32gg11b_ldma.h .

#define _LDMA_CH_CTRL_DONEIFSEN_SHIFT 20

Shift value for LDMA_DONEIFSEN

Definition at line 658 of file efm32gg11b_ldma.h .

#define _LDMA_CH_CTRL_DSTINC_DEFAULT 0x00000000UL

Mode DEFAULT for LDMA_CH_CTRL

Definition at line 705 of file efm32gg11b_ldma.h .

#define _LDMA_CH_CTRL_DSTINC_FOUR 0x00000002UL

Mode FOUR for LDMA_CH_CTRL

Definition at line 708 of file efm32gg11b_ldma.h .

#define _LDMA_CH_CTRL_DSTINC_MASK 0x30000000UL

Bit mask for LDMA_DSTINC

Definition at line 704 of file efm32gg11b_ldma.h .

#define _LDMA_CH_CTRL_DSTINC_NONE 0x00000003UL

Mode NONE for LDMA_CH_CTRL

Definition at line 709 of file efm32gg11b_ldma.h .

#define _LDMA_CH_CTRL_DSTINC_ONE 0x00000000UL

Mode ONE for LDMA_CH_CTRL

Definition at line 706 of file efm32gg11b_ldma.h .

#define _LDMA_CH_CTRL_DSTINC_SHIFT 28

Shift value for LDMA_DSTINC

Definition at line 703 of file efm32gg11b_ldma.h .

#define _LDMA_CH_CTRL_DSTINC_TWO 0x00000001UL

Mode TWO for LDMA_CH_CTRL

Definition at line 707 of file efm32gg11b_ldma.h .

#define _LDMA_CH_CTRL_DSTMODE_ABSOLUTE 0x00000000UL

Mode ABSOLUTE for LDMA_CH_CTRL

Definition at line 728 of file efm32gg11b_ldma.h .

#define _LDMA_CH_CTRL_DSTMODE_DEFAULT 0x00000000UL

Mode DEFAULT for LDMA_CH_CTRL

Definition at line 727 of file efm32gg11b_ldma.h .

#define _LDMA_CH_CTRL_DSTMODE_MASK 0x80000000UL

Bit mask for LDMA_DSTMODE

Definition at line 726 of file efm32gg11b_ldma.h .

#define _LDMA_CH_CTRL_DSTMODE_RELATIVE 0x00000001UL

Mode RELATIVE for LDMA_CH_CTRL

Definition at line 729 of file efm32gg11b_ldma.h .

#define _LDMA_CH_CTRL_DSTMODE_SHIFT 31

Shift value for LDMA_DSTMODE

Definition at line 725 of file efm32gg11b_ldma.h .

#define _LDMA_CH_CTRL_IGNORESREQ_DEFAULT 0x00000000UL

Mode DEFAULT for LDMA_CH_CTRL

Definition at line 679 of file efm32gg11b_ldma.h .

#define _LDMA_CH_CTRL_IGNORESREQ_MASK 0x800000UL

Bit mask for LDMA_IGNORESREQ

Definition at line 678 of file efm32gg11b_ldma.h .

#define _LDMA_CH_CTRL_IGNORESREQ_SHIFT 23

Shift value for LDMA_IGNORESREQ

Definition at line 677 of file efm32gg11b_ldma.h .

#define _LDMA_CH_CTRL_MASK 0xFFFFFFFBUL

Mask for LDMA_CH_CTRL

Definition at line 600 of file efm32gg11b_ldma.h .

#define _LDMA_CH_CTRL_REQMODE_ALL 0x00000001UL

Mode ALL for LDMA_CH_CTRL

Definition at line 667 of file efm32gg11b_ldma.h .

#define _LDMA_CH_CTRL_REQMODE_BLOCK 0x00000000UL

Mode BLOCK for LDMA_CH_CTRL

Definition at line 666 of file efm32gg11b_ldma.h .

#define _LDMA_CH_CTRL_REQMODE_DEFAULT 0x00000000UL

Mode DEFAULT for LDMA_CH_CTRL

Definition at line 665 of file efm32gg11b_ldma.h .

#define _LDMA_CH_CTRL_REQMODE_MASK 0x200000UL

Bit mask for LDMA_REQMODE

Definition at line 664 of file efm32gg11b_ldma.h .

#define _LDMA_CH_CTRL_REQMODE_SHIFT 21

Shift value for LDMA_REQMODE

Definition at line 663 of file efm32gg11b_ldma.h .

#define _LDMA_CH_CTRL_RESETVALUE 0x00000000UL

Default value for LDMA_CH_CTRL

Definition at line 599 of file efm32gg11b_ldma.h .

#define _LDMA_CH_CTRL_SIZE_BYTE 0x00000000UL

Mode BYTE for LDMA_CH_CTRL

Definition at line 696 of file efm32gg11b_ldma.h .

#define _LDMA_CH_CTRL_SIZE_DEFAULT 0x00000000UL

Mode DEFAULT for LDMA_CH_CTRL

Definition at line 695 of file efm32gg11b_ldma.h .

#define _LDMA_CH_CTRL_SIZE_HALFWORD 0x00000001UL

Mode HALFWORD for LDMA_CH_CTRL

Definition at line 697 of file efm32gg11b_ldma.h .

#define _LDMA_CH_CTRL_SIZE_MASK 0xC000000UL

Bit mask for LDMA_SIZE

Definition at line 694 of file efm32gg11b_ldma.h .

#define _LDMA_CH_CTRL_SIZE_SHIFT 26

Shift value for LDMA_SIZE

Definition at line 693 of file efm32gg11b_ldma.h .

#define _LDMA_CH_CTRL_SIZE_WORD 0x00000002UL

Mode WORD for LDMA_CH_CTRL

Definition at line 698 of file efm32gg11b_ldma.h .

#define _LDMA_CH_CTRL_SRCINC_DEFAULT 0x00000000UL

Mode DEFAULT for LDMA_CH_CTRL

Definition at line 683 of file efm32gg11b_ldma.h .

#define _LDMA_CH_CTRL_SRCINC_FOUR 0x00000002UL

Mode FOUR for LDMA_CH_CTRL

Definition at line 686 of file efm32gg11b_ldma.h .

#define _LDMA_CH_CTRL_SRCINC_MASK 0x3000000UL

Bit mask for LDMA_SRCINC

Definition at line 682 of file efm32gg11b_ldma.h .

#define _LDMA_CH_CTRL_SRCINC_NONE 0x00000003UL

Mode NONE for LDMA_CH_CTRL

Definition at line 687 of file efm32gg11b_ldma.h .

#define _LDMA_CH_CTRL_SRCINC_ONE 0x00000000UL

Mode ONE for LDMA_CH_CTRL

Definition at line 684 of file efm32gg11b_ldma.h .

#define _LDMA_CH_CTRL_SRCINC_SHIFT 24

Shift value for LDMA_SRCINC

Definition at line 681 of file efm32gg11b_ldma.h .

#define _LDMA_CH_CTRL_SRCINC_TWO 0x00000001UL

Mode TWO for LDMA_CH_CTRL

Definition at line 685 of file efm32gg11b_ldma.h .

#define _LDMA_CH_CTRL_SRCMODE_ABSOLUTE 0x00000000UL

Mode ABSOLUTE for LDMA_CH_CTRL

Definition at line 719 of file efm32gg11b_ldma.h .

#define _LDMA_CH_CTRL_SRCMODE_DEFAULT 0x00000000UL

Mode DEFAULT for LDMA_CH_CTRL

Definition at line 718 of file efm32gg11b_ldma.h .

#define _LDMA_CH_CTRL_SRCMODE_MASK 0x40000000UL

Bit mask for LDMA_SRCMODE

Definition at line 717 of file efm32gg11b_ldma.h .

#define _LDMA_CH_CTRL_SRCMODE_RELATIVE 0x00000001UL

Mode RELATIVE for LDMA_CH_CTRL

Definition at line 720 of file efm32gg11b_ldma.h .

#define _LDMA_CH_CTRL_SRCMODE_SHIFT 30

Shift value for LDMA_SRCMODE

Definition at line 716 of file efm32gg11b_ldma.h .

#define _LDMA_CH_CTRL_STRUCTREQ_DEFAULT 0x00000000UL

Mode DEFAULT for LDMA_CH_CTRL

Definition at line 614 of file efm32gg11b_ldma.h .

#define _LDMA_CH_CTRL_STRUCTREQ_MASK 0x8UL

Bit mask for LDMA_STRUCTREQ

Definition at line 613 of file efm32gg11b_ldma.h .

#define _LDMA_CH_CTRL_STRUCTREQ_SHIFT 3

Shift value for LDMA_STRUCTREQ

Definition at line 612 of file efm32gg11b_ldma.h .

#define _LDMA_CH_CTRL_STRUCTTYPE_DEFAULT 0x00000000UL

Mode DEFAULT for LDMA_CH_CTRL

Definition at line 603 of file efm32gg11b_ldma.h .

#define _LDMA_CH_CTRL_STRUCTTYPE_MASK 0x3UL

Bit mask for LDMA_STRUCTTYPE

Definition at line 602 of file efm32gg11b_ldma.h .

#define _LDMA_CH_CTRL_STRUCTTYPE_SHIFT 0

Shift value for LDMA_STRUCTTYPE

Definition at line 601 of file efm32gg11b_ldma.h .

#define _LDMA_CH_CTRL_STRUCTTYPE_SYNCHRONIZE 0x00000001UL

Mode SYNCHRONIZE for LDMA_CH_CTRL

Definition at line 605 of file efm32gg11b_ldma.h .

#define _LDMA_CH_CTRL_STRUCTTYPE_TRANSFER 0x00000000UL

Mode TRANSFER for LDMA_CH_CTRL

Definition at line 604 of file efm32gg11b_ldma.h .

#define _LDMA_CH_CTRL_STRUCTTYPE_WRITE 0x00000002UL

Mode WRITE for LDMA_CH_CTRL

Definition at line 606 of file efm32gg11b_ldma.h .

#define _LDMA_CH_CTRL_XFERCNT_DEFAULT 0x00000000UL

Mode DEFAULT for LDMA_CH_CTRL

Definition at line 618 of file efm32gg11b_ldma.h .

#define _LDMA_CH_CTRL_XFERCNT_MASK 0x7FF0UL

Bit mask for LDMA_XFERCNT

Definition at line 617 of file efm32gg11b_ldma.h .

Referenced by LDMA_TransferRemainingCount() , and mscEccReadWriteExistingDma() .

#define _LDMA_CH_CTRL_XFERCNT_SHIFT 4

Shift value for LDMA_XFERCNT

Definition at line 616 of file efm32gg11b_ldma.h .

Referenced by LDMA_TransferRemainingCount() .

#define _LDMA_CH_DST_DSTADDR_DEFAULT 0x00000000UL

Mode DEFAULT for LDMA_CH_DST

Definition at line 747 of file efm32gg11b_ldma.h .

#define _LDMA_CH_DST_DSTADDR_MASK 0xFFFFFFFFUL

Bit mask for LDMA_DSTADDR

Definition at line 746 of file efm32gg11b_ldma.h .

#define _LDMA_CH_DST_DSTADDR_SHIFT 0

Shift value for LDMA_DSTADDR

Definition at line 745 of file efm32gg11b_ldma.h .

#define _LDMA_CH_DST_MASK 0xFFFFFFFFUL

Mask for LDMA_CH_DST

Definition at line 744 of file efm32gg11b_ldma.h .

#define _LDMA_CH_DST_RESETVALUE 0x00000000UL

Default value for LDMA_CH_DST

Definition at line 743 of file efm32gg11b_ldma.h .

#define _LDMA_CH_LINK_LINK_DEFAULT 0x00000000UL

Mode DEFAULT for LDMA_CH_LINK

Definition at line 765 of file efm32gg11b_ldma.h .

#define _LDMA_CH_LINK_LINK_MASK 0x2UL

Bit mask for LDMA_LINK

Definition at line 764 of file efm32gg11b_ldma.h .

#define _LDMA_CH_LINK_LINK_SHIFT 1

Shift value for LDMA_LINK

Definition at line 763 of file efm32gg11b_ldma.h .

#define _LDMA_CH_LINK_LINKADDR_DEFAULT 0x00000000UL

Mode DEFAULT for LDMA_CH_LINK

Definition at line 769 of file efm32gg11b_ldma.h .

#define _LDMA_CH_LINK_LINKADDR_MASK 0xFFFFFFFCUL

Bit mask for LDMA_LINKADDR

Definition at line 768 of file efm32gg11b_ldma.h .

Referenced by LDMA_StartTransfer() , and mscEccReadWriteExistingDma() .

#define _LDMA_CH_LINK_LINKADDR_SHIFT 2

Shift value for LDMA_LINKADDR

Definition at line 767 of file efm32gg11b_ldma.h .

#define _LDMA_CH_LINK_LINKMODE_ABSOLUTE 0x00000000UL

Mode ABSOLUTE for LDMA_CH_LINK

Definition at line 757 of file efm32gg11b_ldma.h .

#define _LDMA_CH_LINK_LINKMODE_DEFAULT 0x00000000UL

Mode DEFAULT for LDMA_CH_LINK

Definition at line 756 of file efm32gg11b_ldma.h .

#define _LDMA_CH_LINK_LINKMODE_MASK 0x1UL

Bit mask for LDMA_LINKMODE

Definition at line 755 of file efm32gg11b_ldma.h .

#define _LDMA_CH_LINK_LINKMODE_RELATIVE 0x00000001UL

Mode RELATIVE for LDMA_CH_LINK

Definition at line 758 of file efm32gg11b_ldma.h .

#define _LDMA_CH_LINK_LINKMODE_SHIFT 0

Shift value for LDMA_LINKMODE

Definition at line 754 of file efm32gg11b_ldma.h .

#define _LDMA_CH_LINK_MASK 0xFFFFFFFFUL

Mask for LDMA_CH_LINK

Definition at line 752 of file efm32gg11b_ldma.h .

#define _LDMA_CH_LINK_RESETVALUE 0x00000000UL

Default value for LDMA_CH_LINK

Definition at line 751 of file efm32gg11b_ldma.h .

#define _LDMA_CH_LOOP_LOOPCNT_DEFAULT 0x00000000UL

Mode DEFAULT for LDMA_CH_LOOP

Definition at line 595 of file efm32gg11b_ldma.h .

#define _LDMA_CH_LOOP_LOOPCNT_MASK 0xFFUL

Bit mask for LDMA_LOOPCNT

Definition at line 594 of file efm32gg11b_ldma.h .

Referenced by LDMA_StartTransfer() .

#define _LDMA_CH_LOOP_LOOPCNT_SHIFT 0

Shift value for LDMA_LOOPCNT

Definition at line 593 of file efm32gg11b_ldma.h .

Referenced by LDMA_StartTransfer() .

#define _LDMA_CH_LOOP_MASK 0x000000FFUL

Mask for LDMA_CH_LOOP

Definition at line 592 of file efm32gg11b_ldma.h .

#define _LDMA_CH_LOOP_RESETVALUE 0x00000000UL

Default value for LDMA_CH_LOOP

Definition at line 591 of file efm32gg11b_ldma.h .

#define _LDMA_CH_REQSEL_MASK 0x003F000FUL

Mask for LDMA_CH_REQSEL

Definition at line 260 of file efm32gg11b_ldma.h .

Referenced by LDMA_StartTransfer() .

#define _LDMA_CH_REQSEL_RESETVALUE 0x00000000UL

Default value for LDMA_CH_REQSEL

Definition at line 259 of file efm32gg11b_ldma.h .

#define _LDMA_CH_REQSEL_SIGSEL_ADC0SCAN 0x00000001UL

Mode ADC0SCAN for LDMA_CH_REQSEL

Definition at line 297 of file efm32gg11b_ldma.h .

#define _LDMA_CH_REQSEL_SIGSEL_ADC0SINGLE 0x00000000UL

Mode ADC0SINGLE for LDMA_CH_REQSEL

Definition at line 264 of file efm32gg11b_ldma.h .

#define _LDMA_CH_REQSEL_SIGSEL_ADC1SCAN 0x00000001UL

Mode ADC1SCAN for LDMA_CH_REQSEL

Definition at line 298 of file efm32gg11b_ldma.h .

#define _LDMA_CH_REQSEL_SIGSEL_ADC1SINGLE 0x00000000UL

Mode ADC1SINGLE for LDMA_CH_REQSEL

Definition at line 265 of file efm32gg11b_ldma.h .

#define _LDMA_CH_REQSEL_SIGSEL_CRYPTO0DATA0RD 0x00000002UL

Mode CRYPTO0DATA0RD for LDMA_CH_REQSEL

Definition at line 348 of file efm32gg11b_ldma.h .

#define _LDMA_CH_REQSEL_SIGSEL_CRYPTO0DATA0WR 0x00000000UL

Mode CRYPTO0DATA0WR for LDMA_CH_REQSEL

Definition at line 292 of file efm32gg11b_ldma.h .

#define _LDMA_CH_REQSEL_SIGSEL_CRYPTO0DATA0XWR 0x00000001UL

Mode CRYPTO0DATA0XWR for LDMA_CH_REQSEL

Definition at line 324 of file efm32gg11b_ldma.h .

#define _LDMA_CH_REQSEL_SIGSEL_CRYPTO0DATA1RD 0x00000004UL

Mode CRYPTO0DATA1RD for LDMA_CH_REQSEL

Definition at line 371 of file efm32gg11b_ldma.h .

#define _LDMA_CH_REQSEL_SIGSEL_CRYPTO0DATA1WR 0x00000003UL

Mode CRYPTO0DATA1WR for LDMA_CH_REQSEL

Definition at line 364 of file efm32gg11b_ldma.h .

#define _LDMA_CH_REQSEL_SIGSEL_CSENBSLN 0x00000001UL

Mode CSENBSLN for LDMA_CH_REQSEL

Definition at line 326 of file efm32gg11b_ldma.h .

#define _LDMA_CH_REQSEL_SIGSEL_CSENDATA 0x00000000UL

Mode CSENDATA for LDMA_CH_REQSEL

Definition at line 294 of file efm32gg11b_ldma.h .

#define _LDMA_CH_REQSEL_SIGSEL_EBIDDEMPTY 0x00000003UL

Mode EBIDDEMPTY for LDMA_CH_REQSEL

Definition at line 365 of file efm32gg11b_ldma.h .

#define _LDMA_CH_REQSEL_SIGSEL_EBIHSYNC 0x00000005UL

Mode EBIHSYNC for LDMA_CH_REQSEL

Definition at line 373 of file efm32gg11b_ldma.h .

#define _LDMA_CH_REQSEL_SIGSEL_EBIPXL0EMPTY 0x00000000UL

Mode EBIPXL0EMPTY for LDMA_CH_REQSEL

Definition at line 293 of file efm32gg11b_ldma.h .

#define _LDMA_CH_REQSEL_SIGSEL_EBIPXL1EMPTY 0x00000001UL

Mode EBIPXL1EMPTY for LDMA_CH_REQSEL

Definition at line 325 of file efm32gg11b_ldma.h .

#define _LDMA_CH_REQSEL_SIGSEL_EBIPXLFULL 0x00000002UL

Mode EBIPXLFULL for LDMA_CH_REQSEL

Definition at line 349 of file efm32gg11b_ldma.h .

#define _LDMA_CH_REQSEL_SIGSEL_EBIVSYNC 0x00000004UL

Mode EBIVSYNC for LDMA_CH_REQSEL

Definition at line 372 of file efm32gg11b_ldma.h .

#define _LDMA_CH_REQSEL_SIGSEL_I2C0RXDATAV 0x00000000UL

Mode I2C0RXDATAV for LDMA_CH_REQSEL

Definition at line 277 of file efm32gg11b_ldma.h .

#define _LDMA_CH_REQSEL_SIGSEL_I2C0TXBL 0x00000001UL

Mode I2C0TXBL for LDMA_CH_REQSEL

Definition at line 310 of file efm32gg11b_ldma.h .

#define _LDMA_CH_REQSEL_SIGSEL_I2C1RXDATAV 0x00000000UL

Mode I2C1RXDATAV for LDMA_CH_REQSEL

Definition at line 278 of file efm32gg11b_ldma.h .

#define _LDMA_CH_REQSEL_SIGSEL_I2C1TXBL 0x00000001UL

Mode I2C1TXBL for LDMA_CH_REQSEL

Definition at line 311 of file efm32gg11b_ldma.h .

#define _LDMA_CH_REQSEL_SIGSEL_I2C2RXDATAV 0x00000000UL

Mode I2C2RXDATAV for LDMA_CH_REQSEL

Definition at line 279 of file efm32gg11b_ldma.h .

#define _LDMA_CH_REQSEL_SIGSEL_I2C2TXBL 0x00000001UL

Mode I2C2TXBL for LDMA_CH_REQSEL

Definition at line 312 of file efm32gg11b_ldma.h .

#define _LDMA_CH_REQSEL_SIGSEL_LESENSEBUFDATAV 0x00000000UL

Mode LESENSEBUFDATAV for LDMA_CH_REQSEL

Definition at line 295 of file efm32gg11b_ldma.h .

#define _LDMA_CH_REQSEL_SIGSEL_LEUART0RXDATAV 0x00000000UL

Mode LEUART0RXDATAV for LDMA_CH_REQSEL

Definition at line 275 of file efm32gg11b_ldma.h .

#define _LDMA_CH_REQSEL_SIGSEL_LEUART0TXBL 0x00000001UL

Mode LEUART0TXBL for LDMA_CH_REQSEL

Definition at line 308 of file efm32gg11b_ldma.h .

#define _LDMA_CH_REQSEL_SIGSEL_LEUART0TXEMPTY 0x00000002UL

Mode LEUART0TXEMPTY for LDMA_CH_REQSEL

Definition at line 335 of file efm32gg11b_ldma.h .

#define _LDMA_CH_REQSEL_SIGSEL_LEUART1RXDATAV 0x00000000UL

Mode LEUART1RXDATAV for LDMA_CH_REQSEL

Definition at line 276 of file efm32gg11b_ldma.h .

#define _LDMA_CH_REQSEL_SIGSEL_LEUART1TXBL 0x00000001UL

Mode LEUART1TXBL for LDMA_CH_REQSEL

Definition at line 309 of file efm32gg11b_ldma.h .

#define _LDMA_CH_REQSEL_SIGSEL_LEUART1TXEMPTY 0x00000002UL

Mode LEUART1TXEMPTY for LDMA_CH_REQSEL

Definition at line 336 of file efm32gg11b_ldma.h .

#define _LDMA_CH_REQSEL_SIGSEL_MASK 0xFUL

Bit mask for LDMA_SIGSEL

Definition at line 262 of file efm32gg11b_ldma.h .

#define _LDMA_CH_REQSEL_SIGSEL_MSCWDATA 0x00000000UL

Mode MSCWDATA for LDMA_CH_REQSEL

Definition at line 291 of file efm32gg11b_ldma.h .

#define _LDMA_CH_REQSEL_SIGSEL_PRSREQ0 0x00000000UL

Mode PRSREQ0 for LDMA_CH_REQSEL

Definition at line 263 of file efm32gg11b_ldma.h .

#define _LDMA_CH_REQSEL_SIGSEL_PRSREQ1 0x00000001UL

Mode PRSREQ1 for LDMA_CH_REQSEL

Definition at line 296 of file efm32gg11b_ldma.h .

#define _LDMA_CH_REQSEL_SIGSEL_SHIFT 0

Shift value for LDMA_SIGSEL

Definition at line 261 of file efm32gg11b_ldma.h .

#define _LDMA_CH_REQSEL_SIGSEL_TIMER0CC0 0x00000001UL

Mode TIMER0CC0 for LDMA_CH_REQSEL

Definition at line 313 of file efm32gg11b_ldma.h .

#define _LDMA_CH_REQSEL_SIGSEL_TIMER0CC1 0x00000002UL

Mode TIMER0CC1 for LDMA_CH_REQSEL

Definition at line 337 of file efm32gg11b_ldma.h .

#define _LDMA_CH_REQSEL_SIGSEL_TIMER0CC2 0x00000003UL

Mode TIMER0CC2 for LDMA_CH_REQSEL

Definition at line 353 of file efm32gg11b_ldma.h .

#define _LDMA_CH_REQSEL_SIGSEL_TIMER0UFOF 0x00000000UL

Mode TIMER0UFOF for LDMA_CH_REQSEL

Definition at line 280 of file efm32gg11b_ldma.h .

#define _LDMA_CH_REQSEL_SIGSEL_TIMER1CC0 0x00000001UL

Mode TIMER1CC0 for LDMA_CH_REQSEL

Definition at line 314 of file efm32gg11b_ldma.h .

#define _LDMA_CH_REQSEL_SIGSEL_TIMER1CC1 0x00000002UL

Mode TIMER1CC1 for LDMA_CH_REQSEL

Definition at line 338 of file efm32gg11b_ldma.h .

#define _LDMA_CH_REQSEL_SIGSEL_TIMER1CC2 0x00000003UL

Mode TIMER1CC2 for LDMA_CH_REQSEL

Definition at line 354 of file efm32gg11b_ldma.h .

#define _LDMA_CH_REQSEL_SIGSEL_TIMER1CC3 0x00000004UL

Mode TIMER1CC3 for LDMA_CH_REQSEL

Definition at line 369 of file efm32gg11b_ldma.h .

#define _LDMA_CH_REQSEL_SIGSEL_TIMER1UFOF 0x00000000UL

Mode TIMER1UFOF for LDMA_CH_REQSEL

Definition at line 281 of file efm32gg11b_ldma.h .

#define _LDMA_CH_REQSEL_SIGSEL_TIMER2CC0 0x00000001UL

Mode TIMER2CC0 for LDMA_CH_REQSEL

Definition at line 315 of file efm32gg11b_ldma.h .

#define _LDMA_CH_REQSEL_SIGSEL_TIMER2CC1 0x00000002UL

Mode TIMER2CC1 for LDMA_CH_REQSEL

Definition at line 339 of file efm32gg11b_ldma.h .

#define _LDMA_CH_REQSEL_SIGSEL_TIMER2CC2 0x00000003UL

Mode TIMER2CC2 for LDMA_CH_REQSEL

Definition at line 355 of file efm32gg11b_ldma.h .

#define _LDMA_CH_REQSEL_SIGSEL_TIMER2UFOF 0x00000000UL

Mode TIMER2UFOF for LDMA_CH_REQSEL

Definition at line 282 of file efm32gg11b_ldma.h .

#define _LDMA_CH_REQSEL_SIGSEL_TIMER3CC0 0x00000001UL

Mode TIMER3CC0 for LDMA_CH_REQSEL

Definition at line 316 of file efm32gg11b_ldma.h .

#define _LDMA_CH_REQSEL_SIGSEL_TIMER3CC1 0x00000002UL

Mode TIMER3CC1 for LDMA_CH_REQSEL

Definition at line 340 of file efm32gg11b_ldma.h .

#define _LDMA_CH_REQSEL_SIGSEL_TIMER3CC2 0x00000003UL

Mode TIMER3CC2 for LDMA_CH_REQSEL

Definition at line 356 of file efm32gg11b_ldma.h .

#define _LDMA_CH_REQSEL_SIGSEL_TIMER3UFOF 0x00000000UL

Mode TIMER3UFOF for LDMA_CH_REQSEL

Definition at line 283 of file efm32gg11b_ldma.h .

#define _LDMA_CH_REQSEL_SIGSEL_TIMER4CC0 0x00000001UL

Mode TIMER4CC0 for LDMA_CH_REQSEL

Definition at line 317 of file efm32gg11b_ldma.h .

#define _LDMA_CH_REQSEL_SIGSEL_TIMER4CC1 0x00000002UL

Mode TIMER4CC1 for LDMA_CH_REQSEL

Definition at line 341 of file efm32gg11b_ldma.h .

#define _LDMA_CH_REQSEL_SIGSEL_TIMER4CC2 0x00000003UL

Mode TIMER4CC2 for LDMA_CH_REQSEL

Definition at line 357 of file efm32gg11b_ldma.h .

#define _LDMA_CH_REQSEL_SIGSEL_TIMER4UFOF 0x00000000UL

Mode TIMER4UFOF for LDMA_CH_REQSEL

Definition at line 284 of file efm32gg11b_ldma.h .

#define _LDMA_CH_REQSEL_SIGSEL_TIMER5CC0 0x00000001UL

LDMA Bit FieldsDevices > LDMA

Macros

Macro Definition Documentation