ETH_TypeDef Struct ReferenceDevices > ETH

ETH Register Declaration

Definition at line 49 of file efm32gg11b_eth.h .

#include < efm32gg11b_eth.h >

Data Fields

__IOM uint32_t ALIGNERRS
__IOM uint32_t AUTOFLUSHEDPKTS
__IOM uint32_t BROADCASTRXED
__IOM uint32_t BROADCASTTXED
__IOM uint32_t CRSERRS
__IOM uint32_t CTRL
__IOM uint32_t DEFERREDFRAMES
__IOM uint32_t DMACFG
__IOM uint32_t EXCESSCOLS
__IOM uint32_t EXCESSIVERXLEN
__IOM uint32_t FCSERRS
__IOM uint32_t FRAMESRXED1024
__IOM uint32_t FRAMESRXED128
__IOM uint32_t FRAMESRXED1519
__IOM uint32_t FRAMESRXED256
__IOM uint32_t FRAMESRXED512
__IOM uint32_t FRAMESRXED64
__IOM uint32_t FRAMESRXED65
__IOM uint32_t FRAMESRXEDOK
__IOM uint32_t FRAMESTXED1024
__IOM uint32_t FRAMESTXED128
__IOM uint32_t FRAMESTXED1519
__IOM uint32_t FRAMESTXED256
__IOM uint32_t FRAMESTXED512
__IOM uint32_t FRAMESTXED64
__IOM uint32_t FRAMESTXED65
__IOM uint32_t FRAMESTXEDOK
__IOM uint32_t HASHBOTTOM
__IOM uint32_t HASHTOP
__IOM uint32_t IENC
__IOM uint32_t IENRO
__IOM uint32_t IENS
__IOM uint32_t IFCR
__IOM uint32_t IMOD
__IOM uint32_t JUMBOMAXLEN
__IOM uint32_t LATECOLS
__IOM uint32_t MASKADD1BOTTOM
__IOM uint32_t MASKADD1TOP
__IOM uint32_t MULTICASTRXED
__IOM uint32_t MULTICASTTXED
__IOM uint32_t MULTICOLS
__IOM uint32_t NETWORKCFG
__IOM uint32_t NETWORKCTRL
__IM uint32_t NETWORKSTATUS
__IOM uint32_t OCTETSRXEDBOTTOM
__IOM uint32_t OCTETSRXEDTOP
__IOM uint32_t OCTETSTXEDBOTTOM
__IOM uint32_t OCTETSTXEDTOP
__IOM uint32_t PBUFRXCUTTHRU
__IOM uint32_t PBUFTXCUTTHRU
__IOM uint32_t PFRAMESRXED
__IOM uint32_t PFRAMESTXED
__IOM uint32_t PHYMNGMNT
uint32_t RESERVED0 [1]
uint32_t RESERVED1 [4]
uint32_t RESERVED10 [459]
uint32_t RESERVED11 [1]
uint32_t RESERVED2 [7]
uint32_t RESERVED3 [1]
uint32_t RESERVED4 [2]
uint32_t RESERVED5 [1]
uint32_t RESERVED6 [3]
uint32_t RESERVED7 [24]
uint32_t RESERVED8 [1]
uint32_t RESERVED9 [147]
__IOM uint32_t ROUTELOC0
__IOM uint32_t ROUTELOC1
__IOM uint32_t ROUTEPEN
__IOM uint32_t RXBDCTRL
__IOM uint32_t RXIPCKERRS
__IOM uint32_t RXJABBERS
__IOM uint32_t RXLENERRS
__IOM uint32_t RXLPI
__IOM uint32_t RXLPITIME
__IOM uint32_t RXOVERRUNS
__IM uint32_t RXPAUSEQUANT
__IOM uint32_t RXPTPUNICAST
__IOM uint32_t RXQPTR
__IOM uint32_t RXRESOURCEERRS
__IOM uint32_t RXSTATUS
__IOM uint32_t RXSYMBOLERRS
__IOM uint32_t RXTCPCKERRS
__IOM uint32_t RXUDPCKERRS
__IOM uint32_t SINGLECOLS
__IOM uint32_t SPECADDR1BOTTOM
__IOM uint32_t SPECADDR1TOP
__IOM uint32_t SPECADDR2BOTTOM
__IOM uint32_t SPECADDR2TOP
__IOM uint32_t SPECADDR3BOTTOM
__IOM uint32_t SPECADDR3TOP
__IOM uint32_t SPECADDR4BOTTOM
__IOM uint32_t SPECADDR4TOP
__IOM uint32_t SPECTYPE1
__IOM uint32_t SPECTYPE2
__IOM uint32_t SPECTYPE3
__IOM uint32_t SPECTYPE4
__IOM uint32_t STACKEDVLAN
__IOM uint32_t STRETCHRATIO
__IOM uint32_t SYSWAKETIME
__IOM uint32_t TSUMSBSECCMP
__IOM uint32_t TSUNSECCMP
__IM uint32_t TSUPEERRXMSBSEC
__IM uint32_t TSUPEERRXNSEC
__IM uint32_t TSUPEERRXSEC
__IM uint32_t TSUPEERTXMSBSEC
__IM uint32_t TSUPEERTXNSEC
__IM uint32_t TSUPEERTXSEC
__IM uint32_t TSUPTPRXMSBSEC
__IM uint32_t TSUPTPRXNSEC
__IM uint32_t TSUPTPRXSEC
__IM uint32_t TSUPTPTXMSBSEC
__IM uint32_t TSUPTPTXNSEC
__IM uint32_t TSUPTPTXSEC
__IOM uint32_t TSUSECCMP
__IOM uint32_t TSUTIMERADJUST
__IOM uint32_t TSUTIMERINCR
__IOM uint32_t TSUTIMERINCRSUBNSEC
__IOM uint32_t TSUTIMERMSBSEC
__IOM uint32_t TSUTIMERNSEC
__IOM uint32_t TSUTIMERSEC
__IOM uint32_t TXBDCTRL
__IOM uint32_t TXLPI
__IOM uint32_t TXLPITIME
__IOM uint32_t TXPAUSEQUANT
__IOM uint32_t TXPAUSEQUANT1
__IOM uint32_t TXPAUSEQUANT2
__IOM uint32_t TXPAUSEQUANT3
__IOM uint32_t TXPFCPAUSE
__IOM uint32_t TXPTPUNICAST
__IOM uint32_t TXQPTR
__IOM uint32_t TXSTATUS
__IOM uint32_t TXUNDERRUNS
__IOM uint32_t UNDERSIZEFRAMES
__IOM uint32_t WOLREG

Field Documentation

__IOM uint32_t ETH_TypeDef::ALIGNERRS

Alignment Errors

Definition at line 147 of file efm32gg11b_eth.h .

__IOM uint32_t ETH_TypeDef::AUTOFLUSHEDPKTS

Receive DMA Flushed Packets

Definition at line 153 of file efm32gg11b_eth.h .

__IOM uint32_t ETH_TypeDef::BROADCASTRXED

Broadcast Frames Received

Definition at line 131 of file efm32gg11b_eth.h .

__IOM uint32_t ETH_TypeDef::BROADCASTTXED

Broadcast Frames Transmitted

Definition at line 111 of file efm32gg11b_eth.h .

__IOM uint32_t ETH_TypeDef::CRSERRS

Carrier Sense Errors

Definition at line 127 of file efm32gg11b_eth.h .

__IOM uint32_t ETH_TypeDef::CTRL

Ethernet control register

Definition at line 191 of file efm32gg11b_eth.h .

__IOM uint32_t ETH_TypeDef::DEFERREDFRAMES

Deferred Transmission Frames

Definition at line 126 of file efm32gg11b_eth.h .

__IOM uint32_t ETH_TypeDef::DMACFG

DMA Configuration Register

Definition at line 55 of file efm32gg11b_eth.h .

__IOM uint32_t ETH_TypeDef::EXCESSCOLS

Excessive Collisions

Definition at line 124 of file efm32gg11b_eth.h .

__IOM uint32_t ETH_TypeDef::EXCESSIVERXLEN

Oversize Frames Received

Definition at line 142 of file efm32gg11b_eth.h .

__IOM uint32_t ETH_TypeDef::FCSERRS

Frame Check Sequence Errors

Definition at line 144 of file efm32gg11b_eth.h .

__IOM uint32_t ETH_TypeDef::FRAMESRXED1024

1024 to 1518 Byte Frames Received

Definition at line 139 of file efm32gg11b_eth.h .

__IOM uint32_t ETH_TypeDef::FRAMESRXED128

128 to 255 Byte Frames Received

Definition at line 136 of file efm32gg11b_eth.h .

__IOM uint32_t ETH_TypeDef::FRAMESRXED1519

1519 to maximum Byte Frames Received

Definition at line 140 of file efm32gg11b_eth.h .

__IOM uint32_t ETH_TypeDef::FRAMESRXED256

256 to 511 Byte Frames Received

Definition at line 137 of file efm32gg11b_eth.h .

__IOM uint32_t ETH_TypeDef::FRAMESRXED512

512 to 1023 Byte Frames Received

Definition at line 138 of file efm32gg11b_eth.h .

__IOM uint32_t ETH_TypeDef::FRAMESRXED64

64 Byte Frames Received

Definition at line 134 of file efm32gg11b_eth.h .

__IOM uint32_t ETH_TypeDef::FRAMESRXED65

65 to 127 Byte Frames Received

Definition at line 135 of file efm32gg11b_eth.h .

__IOM uint32_t ETH_TypeDef::FRAMESRXEDOK

Frames Received

Definition at line 130 of file efm32gg11b_eth.h .

__IOM uint32_t ETH_TypeDef::FRAMESTXED1024

1024 to 1518 Byte Frames Transmitted

Definition at line 119 of file efm32gg11b_eth.h .

__IOM uint32_t ETH_TypeDef::FRAMESTXED128

128 to 255 Byte Frames Transmitted

Definition at line 116 of file efm32gg11b_eth.h .

__IOM uint32_t ETH_TypeDef::FRAMESTXED1519

Greater Than 1518 Byte Frames Transmitted

Definition at line 120 of file efm32gg11b_eth.h .

__IOM uint32_t ETH_TypeDef::FRAMESTXED256

256 to 511 Byte Frames Transmitted

Definition at line 117 of file efm32gg11b_eth.h .

__IOM uint32_t ETH_TypeDef::FRAMESTXED512

512 to 1023 Byte Frames Transmitted

Definition at line 118 of file efm32gg11b_eth.h .

__IOM uint32_t ETH_TypeDef::FRAMESTXED64

64 Byte Frames Transmitted

Definition at line 114 of file efm32gg11b_eth.h .

__IOM uint32_t ETH_TypeDef::FRAMESTXED65

65 to 127 Byte Frames Transmitted

Definition at line 115 of file efm32gg11b_eth.h .

__IOM uint32_t ETH_TypeDef::FRAMESTXEDOK

Frames Transmitted

Definition at line 110 of file efm32gg11b_eth.h .

__IOM uint32_t ETH_TypeDef::HASHBOTTOM

Hash Register Bottom [31:0]

Definition at line 75 of file efm32gg11b_eth.h .

__IOM uint32_t ETH_TypeDef::HASHTOP

Hash Register Top [63:32]

Definition at line 76 of file efm32gg11b_eth.h .

__IOM uint32_t ETH_TypeDef::IENC

Interrupt Disable Register

Definition at line 62 of file efm32gg11b_eth.h .

__IOM uint32_t ETH_TypeDef::IENRO

Interrupt mask register

Definition at line 63 of file efm32gg11b_eth.h .

__IOM uint32_t ETH_TypeDef::IENS

Interrupt Enable Register

Definition at line 61 of file efm32gg11b_eth.h .

__IOM uint32_t ETH_TypeDef::IFCR

Interrupt status register

Definition at line 60 of file efm32gg11b_eth.h .

__IOM uint32_t ETH_TypeDef::IMOD

Interrupt moderation register

Definition at line 72 of file efm32gg11b_eth.h .

__IOM uint32_t ETH_TypeDef::JUMBOMAXLEN

Maximum Jumbo Frame Size.

Definition at line 69 of file efm32gg11b_eth.h .

__IOM uint32_t ETH_TypeDef::LATECOLS

Late Collisions

Definition at line 125 of file efm32gg11b_eth.h .

__IOM uint32_t ETH_TypeDef::MASKADD1BOTTOM

Specific Address Mask 1 Bottom 31:0

Definition at line 93 of file efm32gg11b_eth.h .

__IOM uint32_t ETH_TypeDef::MASKADD1TOP

Specific Address Mask 1 Top 47:32

Definition at line 94 of file efm32gg11b_eth.h .

__IOM uint32_t ETH_TypeDef::MULTICASTRXED

Multicast Frames Received

Definition at line 132 of file efm32gg11b_eth.h .

__IOM uint32_t ETH_TypeDef::MULTICASTTXED

Multicast Frames Transmitted

Definition at line 112 of file efm32gg11b_eth.h .

__IOM uint32_t ETH_TypeDef::MULTICOLS

Multiple Collision Frames

Definition at line 123 of file efm32gg11b_eth.h .

__IOM uint32_t ETH_TypeDef::NETWORKCFG

Network configuration register

Definition at line 51 of file efm32gg11b_eth.h .

__IOM uint32_t ETH_TypeDef::NETWORKCTRL

Network control register

Definition at line 50 of file efm32gg11b_eth.h .

__IM uint32_t ETH_TypeDef::NETWORKSTATUS

Network status register

Definition at line 52 of file efm32gg11b_eth.h .

__IOM uint32_t ETH_TypeDef::OCTETSRXEDBOTTOM

Octets Received 31:0

Definition at line 128 of file efm32gg11b_eth.h .

__IOM uint32_t ETH_TypeDef::OCTETSRXEDTOP

Octets Received 47:32

Definition at line 129 of file efm32gg11b_eth.h .

__IOM uint32_t ETH_TypeDef::OCTETSTXEDBOTTOM

Octets transmitted 31:0

Definition at line 108 of file efm32gg11b_eth.h .

__IOM uint32_t ETH_TypeDef::OCTETSTXEDTOP

Octets Transmitted 47:32

Definition at line 109 of file efm32gg11b_eth.h .

__IOM uint32_t ETH_TypeDef::PBUFRXCUTTHRU

RX Partial Store and Forward

Definition at line 68 of file efm32gg11b_eth.h .

__IOM uint32_t ETH_TypeDef::PBUFTXCUTTHRU

TX Partial Store and Forward

Definition at line 67 of file efm32gg11b_eth.h .

__IOM uint32_t ETH_TypeDef::PFRAMESRXED

Pause Frames Received

Definition at line 133 of file efm32gg11b_eth.h .

__IOM uint32_t ETH_TypeDef::PFRAMESTXED

Pause Frames Transmitted

Definition at line 113 of file efm32gg11b_eth.h .

__IOM uint32_t ETH_TypeDef::PHYMNGMNT

PHY management register

Definition at line 64 of file efm32gg11b_eth.h .

uint32_t ETH_TypeDef::RESERVED0[1]

Reserved for future use

Definition at line 54 of file efm32gg11b_eth.h .

uint32_t ETH_TypeDef::RESERVED1[4]

Reserved for future use

Definition at line 71 of file efm32gg11b_eth.h .

uint32_t ETH_TypeDef::RESERVED10[459]

Reserved for future use

Definition at line 186 of file efm32gg11b_eth.h .

uint32_t ETH_TypeDef::RESERVED11[1]

Reserved for future use

Definition at line 189 of file efm32gg11b_eth.h .

uint32_t ETH_TypeDef::RESERVED2[7]

Reserved for future use

Definition at line 74 of file efm32gg11b_eth.h .

uint32_t ETH_TypeDef::RESERVED3[1]

Reserved for future use

Definition at line 96 of file efm32gg11b_eth.h .

uint32_t ETH_TypeDef::RESERVED4[2]

Reserved for future use

Definition at line 107 of file efm32gg11b_eth.h .

uint32_t ETH_TypeDef::RESERVED5[1]

Reserved for future use

Definition at line 154 of file efm32gg11b_eth.h .

uint32_t ETH_TypeDef::RESERVED6[3]

Reserved for future use

Definition at line 158 of file efm32gg11b_eth.h .

uint32_t ETH_TypeDef::RESERVED7[24]

Reserved for future use

Definition at line 172 of file efm32gg11b_eth.h .

uint32_t ETH_TypeDef::RESERVED8[1]

Reserved for future use

Definition at line 176 of file efm32gg11b_eth.h .

uint32_t ETH_TypeDef::RESERVED9[147]

Reserved for future use

Definition at line 182 of file efm32gg11b_eth.h .

__IOM uint32_t ETH_TypeDef::ROUTELOC0

I/O Route Location Register 0

Definition at line 188 of file efm32gg11b_eth.h .

__IOM uint32_t ETH_TypeDef::ROUTELOC1

I/O Route Location Register 1

Definition at line 190 of file efm32gg11b_eth.h .

__IOM uint32_t ETH_TypeDef::ROUTEPEN

I/O Route Enable Register

Definition at line 187 of file efm32gg11b_eth.h .

__IOM uint32_t ETH_TypeDef::RXBDCTRL

RX BD control register

Definition at line 184 of file efm32gg11b_eth.h .

__IOM uint32_t ETH_TypeDef::RXIPCKERRS

IP Header Checksum Errors

Definition at line 150 of file efm32gg11b_eth.h .

__IOM uint32_t ETH_TypeDef::RXJABBERS

Jabbers Received

Definition at line 143 of file efm32gg11b_eth.h .

__IOM uint32_t ETH_TypeDef::RXLENERRS

Length Field Frame Errors

Definition at line 145 of file efm32gg11b_eth.h .

__IOM uint32_t ETH_TypeDef::RXLPI

Received LPI transitions

Definition at line 177 of file efm32gg11b_eth.h .

__IOM uint32_t ETH_TypeDef::RXLPITIME

Received LPI time

Definition at line 178 of file efm32gg11b_eth.h .

__IOM uint32_t ETH_TypeDef::RXOVERRUNS

Receive Overruns

Definition at line 149 of file efm32gg11b_eth.h .

__IM uint32_t ETH_TypeDef::RXPAUSEQUANT

Received Pause Quantum Register

Definition at line 65 of file efm32gg11b_eth.h .

__IOM uint32_t ETH_TypeDef::RXPTPUNICAST

PTP RX unicast IP destination address

Definition at line 97 of file efm32gg11b_eth.h .

__IOM uint32_t ETH_TypeDef::RXQPTR

Start address of the receive buffer queue

Definition at line 57 of file efm32gg11b_eth.h .

__IOM uint32_t ETH_TypeDef::RXRESOURCEERRS

Receive Resource Errors

Definition at line 148 of file efm32gg11b_eth.h .

__IOM uint32_t ETH_TypeDef::RXSTATUS

Receive status register

Definition at line 59 of file efm32gg11b_eth.h .

__IOM uint32_t ETH_TypeDef::RXSYMBOLERRS

Receive Symbol Errors

Definition at line 146 of file efm32gg11b_eth.h .

__IOM uint32_t ETH_TypeDef::RXTCPCKERRS

TCP Checksum Errors

Definition at line 151 of file efm32gg11b_eth.h .

__IOM uint32_t ETH_TypeDef::RXUDPCKERRS

UDP Checksum Errors

Definition at line 152 of file efm32gg11b_eth.h .

__IOM uint32_t ETH_TypeDef::SINGLECOLS

Single Collision Frames

Definition at line 122 of file efm32gg11b_eth.h .

__IOM uint32_t ETH_TypeDef::SPECADDR1BOTTOM

Specific Address 1 Bottom

Definition at line 77 of file efm32gg11b_eth.h .

__IOM uint32_t ETH_TypeDef::SPECADDR1TOP

Specific Address 1 Top

Definition at line 78 of file efm32gg11b_eth.h .

__IOM uint32_t ETH_TypeDef::SPECADDR2BOTTOM

Specific Address 2 Bottom

Definition at line 79 of file efm32gg11b_eth.h .

__IOM uint32_t ETH_TypeDef::SPECADDR2TOP

Specific Address 2 Top

Definition at line 80 of file efm32gg11b_eth.h .

__IOM uint32_t ETH_TypeDef::SPECADDR3BOTTOM

Specific Address 3 Bottom

Definition at line 81 of file efm32gg11b_eth.h .

__IOM uint32_t ETH_TypeDef::SPECADDR3TOP

Specific Address 3 Top

Definition at line 82 of file efm32gg11b_eth.h .

__IOM uint32_t ETH_TypeDef::SPECADDR4BOTTOM

Specific Address 4 Bottom

Definition at line 83 of file efm32gg11b_eth.h .

__IOM uint32_t ETH_TypeDef::SPECADDR4TOP

Specific Address 4 Top

Definition at line 84 of file efm32gg11b_eth.h .

__IOM uint32_t ETH_TypeDef::SPECTYPE1

Type ID Match 1

Definition at line 85 of file efm32gg11b_eth.h .

__IOM uint32_t ETH_TypeDef::SPECTYPE2

Type ID Match 2

Definition at line 86 of file efm32gg11b_eth.h .

__IOM uint32_t ETH_TypeDef::SPECTYPE3

Type ID Match 3

Definition at line 87 of file efm32gg11b_eth.h .

__IOM uint32_t ETH_TypeDef::SPECTYPE4

Type ID Match 4

Definition at line 88 of file efm32gg11b_eth.h .

__IOM uint32_t ETH_TypeDef::STACKEDVLAN

Stacked VLAN Register

Definition at line 91 of file efm32gg11b_eth.h .

__IOM uint32_t ETH_TypeDef::STRETCHRATIO

IPG stretch register

Definition at line 90 of file efm32gg11b_eth.h .

__IOM uint32_t ETH_TypeDef::SYSWAKETIME

System wake time

Definition at line 73 of file efm32gg11b_eth.h .

__IOM uint32_t ETH_TypeDef::TSUMSBSECCMP

TSU timer comparison value seconds [47:32]

Definition at line 101 of file efm32gg11b_eth.h .

__IOM uint32_t ETH_TypeDef::TSUNSECCMP

TSU timer comparison value nanoseconds

Definition at line 99 of file efm32gg11b_eth.h .

__IM uint32_t ETH_TypeDef::TSUPEERRXMSBSEC

PTP Peer Event Frame Received Seconds Register 47:32

Definition at line 105 of file efm32gg11b_eth.h .

__IM uint32_t ETH_TypeDef::TSUPEERRXNSEC

PTP Peer Event Frame Received Nanoseconds Register

Definition at line 170 of file efm32gg11b_eth.h .

__IM uint32_t ETH_TypeDef::TSUPEERRXSEC

PTP Peer Event Frame Received Seconds Register 31:0

Definition at line 169 of file efm32gg11b_eth.h .

__IM uint32_t ETH_TypeDef::TSUPEERTXMSBSEC

PTP Peer Event Frame Transmitted Seconds Register 47:32

Definition at line 104 of file efm32gg11b_eth.h .

__IM uint32_t ETH_TypeDef::TSUPEERTXNSEC

PTP Peer Event Frame Transmitted Nanoseconds Register

Definition at line 168 of file efm32gg11b_eth.h .

__IM uint32_t ETH_TypeDef::TSUPEERTXSEC

PTP Peer Event Frame Transmitted Seconds Register 31:0

Definition at line 167 of file efm32gg11b_eth.h .

__IM uint32_t ETH_TypeDef::TSUPTPRXMSBSEC

PTP Event Frame Received Seconds Register 47:32

Definition at line 103 of file efm32gg11b_eth.h .

__IM uint32_t ETH_TypeDef::TSUPTPRXNSEC

PTP Event Frame Received Nanoseconds Register

Definition at line 166 of file efm32gg11b_eth.h .

__IM uint32_t ETH_TypeDef::TSUPTPRXSEC

PTP Event Frame Received Seconds Register 31:0

Definition at line 165 of file efm32gg11b_eth.h .

__IM uint32_t ETH_TypeDef::TSUPTPTXMSBSEC

PTP Event Frame Transmitted Seconds Register 47:32

Definition at line 102 of file efm32gg11b_eth.h .

__IM uint32_t ETH_TypeDef::TSUPTPTXNSEC

PTP Event Frame Transmitted Nanoseconds Register

Definition at line 164 of file efm32gg11b_eth.h .

__IM uint32_t ETH_TypeDef::TSUPTPTXSEC

PTP Event Frame Transmitted Seconds Register 31:0

Definition at line 163 of file efm32gg11b_eth.h .

__IOM uint32_t ETH_TypeDef::TSUSECCMP

TSU timer comparison value seconds [31:0]

Definition at line 100 of file efm32gg11b_eth.h .

__IOM uint32_t ETH_TypeDef::TSUTIMERADJUST

This register returns all zeroes when read.

Definition at line 161 of file efm32gg11b_eth.h .

__IOM uint32_t ETH_TypeDef::TSUTIMERINCR

1588 Timer Increment Register

Definition at line 162 of file efm32gg11b_eth.h .

__IOM uint32_t ETH_TypeDef::TSUTIMERINCRSUBNSEC

1588 Timer Increment Register subscript nsec

Definition at line 155 of file efm32gg11b_eth.h .

__IOM uint32_t ETH_TypeDef::TSUTIMERMSBSEC

1588 Timer Seconds Register 47:32

Definition at line 156 of file efm32gg11b_eth.h .

__IOM uint32_t ETH_TypeDef::TSUTIMERNSEC

1588 Timer Nanoseconds Register

Definition at line 160 of file efm32gg11b_eth.h .

__IOM uint32_t ETH_TypeDef::TSUTIMERSEC

1588 Timer Seconds Register 31:0

Definition at line 159 of file efm32gg11b_eth.h .

__IOM uint32_t ETH_TypeDef::TXBDCTRL

TX BD control register

Definition at line 183 of file efm32gg11b_eth.h .

__IOM uint32_t ETH_TypeDef::TXLPI

Transmit LPI transitions

Definition at line 179 of file efm32gg11b_eth.h .

__IOM uint32_t ETH_TypeDef::TXLPITIME

Transmit LPI time

Definition at line 180 of file efm32gg11b_eth.h .

__IOM uint32_t ETH_TypeDef::TXPAUSEQUANT

Transmit Pause Quantum Register

Definition at line 66 of file efm32gg11b_eth.h .

__IOM uint32_t ETH_TypeDef::TXPAUSEQUANT1

Transmit Pause Quantum Register 1

Definition at line 173 of file efm32gg11b_eth.h .

__IOM uint32_t ETH_TypeDef::TXPAUSEQUANT2

Transmit Pause Quantum Register 2

Definition at line 174 of file efm32gg11b_eth.h .

__IOM uint32_t ETH_TypeDef::TXPAUSEQUANT3

Transmit Pause Quantum Register 3

Definition at line 175 of file efm32gg11b_eth.h .

__IOM uint32_t ETH_TypeDef::TXPFCPAUSE

Transmit PFC Pause Register

Definition at line 92 of file efm32gg11b_eth.h .

__IOM uint32_t ETH_TypeDef::TXPTPUNICAST

PTP TX unicast IP destination address

Definition at line 98 of file efm32gg11b_eth.h .

__IOM uint32_t ETH_TypeDef::TXQPTR

Start address of the transmit buffer queue

Definition at line 58 of file efm32gg11b_eth.h .

__IOM uint32_t ETH_TypeDef::TXSTATUS

Transmit status register

Definition at line 56 of file efm32gg11b_eth.h .

__IOM uint32_t ETH_TypeDef::TXUNDERRUNS

Transmit Under Runs

Definition at line 121 of file efm32gg11b_eth.h .

__IOM uint32_t ETH_TypeDef::UNDERSIZEFRAMES

Undersized Frames Received

Definition at line 141 of file efm32gg11b_eth.h .

__IOM uint32_t ETH_TypeDef::WOLREG

Wake on LAN Register

Definition at line 89 of file efm32gg11b_eth.h .

The documentation for this struct was generated from the following file:
  • C:/repos/embsw_super_h1/platform/Device/SiliconLabs/EFM32GG11B/Include/ efm32gg11b_eth.h