DPLL Bit FieldsDevices > DPLL

Macros

#define _DPLL_CFG1_M_DEFAULT 0x00000000UL
#define _DPLL_CFG1_M_MASK 0xFFFUL
#define _DPLL_CFG1_M_SHIFT 0
#define _DPLL_CFG1_MASK 0x0FFF0FFFUL
#define _DPLL_CFG1_N_DEFAULT 0x00000000UL
#define _DPLL_CFG1_N_MASK 0xFFF0000UL
#define _DPLL_CFG1_N_SHIFT 16
#define _DPLL_CFG1_RESETVALUE 0x00000000UL
#define _DPLL_CFG_AUTORECOVER_DEFAULT 0x00000000UL
#define _DPLL_CFG_AUTORECOVER_MASK 0x4UL
#define _DPLL_CFG_AUTORECOVER_SHIFT 2
#define _DPLL_CFG_DITHEN_DEFAULT 0x00000000UL
#define _DPLL_CFG_DITHEN_MASK 0x40UL
#define _DPLL_CFG_DITHEN_SHIFT 6
#define _DPLL_CFG_EDGESEL_DEFAULT 0x00000000UL
#define _DPLL_CFG_EDGESEL_MASK 0x2UL
#define _DPLL_CFG_EDGESEL_SHIFT 1
#define _DPLL_CFG_MASK 0x00000047UL
#define _DPLL_CFG_MODE_DEFAULT 0x00000000UL
#define _DPLL_CFG_MODE_FLL 0x00000000UL
#define _DPLL_CFG_MODE_MASK 0x1UL
#define _DPLL_CFG_MODE_PLL 0x00000001UL
#define _DPLL_CFG_MODE_SHIFT 0
#define _DPLL_CFG_RESETVALUE 0x00000000UL
#define _DPLL_EN_EN_DEFAULT 0x00000000UL
#define _DPLL_EN_EN_MASK 0x1UL
#define _DPLL_EN_EN_SHIFT 0
#define _DPLL_EN_MASK 0x00000001UL
#define _DPLL_EN_RESETVALUE 0x00000000UL
#define _DPLL_IEN_LOCK_DEFAULT 0x00000000UL
#define _DPLL_IEN_LOCK_MASK 0x1UL
#define _DPLL_IEN_LOCK_SHIFT 0
#define _DPLL_IEN_LOCKFAILHIGH_DEFAULT 0x00000000UL
#define _DPLL_IEN_LOCKFAILHIGH_MASK 0x4UL
#define _DPLL_IEN_LOCKFAILHIGH_SHIFT 2
#define _DPLL_IEN_LOCKFAILLOW_DEFAULT 0x00000000UL
#define _DPLL_IEN_LOCKFAILLOW_MASK 0x2UL
#define _DPLL_IEN_LOCKFAILLOW_SHIFT 1
#define _DPLL_IEN_MASK 0x00000007UL
#define _DPLL_IEN_RESETVALUE 0x00000000UL
#define _DPLL_IF_LOCK_DEFAULT 0x00000000UL
#define _DPLL_IF_LOCK_MASK 0x1UL
#define _DPLL_IF_LOCK_SHIFT 0
#define _DPLL_IF_LOCKFAILHIGH_DEFAULT 0x00000000UL
#define _DPLL_IF_LOCKFAILHIGH_MASK 0x4UL
#define _DPLL_IF_LOCKFAILHIGH_SHIFT 2
#define _DPLL_IF_LOCKFAILLOW_DEFAULT 0x00000000UL
#define _DPLL_IF_LOCKFAILLOW_MASK 0x2UL
#define _DPLL_IF_LOCKFAILLOW_SHIFT 1
#define _DPLL_IF_MASK 0x00000007UL
#define _DPLL_IF_RESETVALUE 0x00000000UL
#define _DPLL_IPVERSION_IPVERSION_DEFAULT 0x00000000UL
#define _DPLL_IPVERSION_IPVERSION_MASK 0xFFFFFFFFUL
#define _DPLL_IPVERSION_IPVERSION_SHIFT 0
#define _DPLL_IPVERSION_MASK 0xFFFFFFFFUL
#define _DPLL_IPVERSION_RESETVALUE 0x00000000UL
#define _DPLL_LOCK_LOCKKEY_DEFAULT 0x00007102UL
#define _DPLL_LOCK_LOCKKEY_MASK 0xFFFFUL
#define _DPLL_LOCK_LOCKKEY_SHIFT 0
#define _DPLL_LOCK_LOCKKEY_UNLOCK 0x00007102UL
#define _DPLL_LOCK_MASK 0x0000FFFFUL
#define _DPLL_LOCK_RESETVALUE 0x00007102UL
#define _DPLL_STATUS_ENS_DEFAULT 0x00000000UL
#define _DPLL_STATUS_ENS_MASK 0x2UL
#define _DPLL_STATUS_ENS_SHIFT 1
#define _DPLL_STATUS_LOCK_DEFAULT 0x00000000UL
#define _DPLL_STATUS_LOCK_LOCKED 0x00000001UL
#define _DPLL_STATUS_LOCK_MASK 0x80000000UL
#define _DPLL_STATUS_LOCK_SHIFT 31
#define _DPLL_STATUS_LOCK_UNLOCKED 0x00000000UL
#define _DPLL_STATUS_MASK 0x80000003UL
#define _DPLL_STATUS_RDY_DEFAULT 0x00000000UL
#define _DPLL_STATUS_RDY_MASK 0x1UL
#define _DPLL_STATUS_RDY_SHIFT 0
#define _DPLL_STATUS_RESETVALUE 0x00000000UL
#define DPLL_CFG1_M_DEFAULT ( _DPLL_CFG1_M_DEFAULT << 0)
#define DPLL_CFG1_N_DEFAULT ( _DPLL_CFG1_N_DEFAULT << 16)
#define DPLL_CFG_AUTORECOVER (0x1UL << 2)
#define DPLL_CFG_AUTORECOVER_DEFAULT ( _DPLL_CFG_AUTORECOVER_DEFAULT << 2)
#define DPLL_CFG_DITHEN (0x1UL << 6)
#define DPLL_CFG_DITHEN_DEFAULT ( _DPLL_CFG_DITHEN_DEFAULT << 6)
#define DPLL_CFG_EDGESEL (0x1UL << 1)
#define DPLL_CFG_EDGESEL_DEFAULT ( _DPLL_CFG_EDGESEL_DEFAULT << 1)
#define DPLL_CFG_MODE (0x1UL << 0)
#define DPLL_CFG_MODE_DEFAULT ( _DPLL_CFG_MODE_DEFAULT << 0)
#define DPLL_CFG_MODE_FLL ( _DPLL_CFG_MODE_FLL << 0)
#define DPLL_CFG_MODE_PLL ( _DPLL_CFG_MODE_PLL << 0)
#define DPLL_EN_EN (0x1UL << 0)
#define DPLL_EN_EN_DEFAULT ( _DPLL_EN_EN_DEFAULT << 0)
#define DPLL_IEN_LOCK (0x1UL << 0)
#define DPLL_IEN_LOCK_DEFAULT ( _DPLL_IEN_LOCK_DEFAULT << 0)
#define DPLL_IEN_LOCKFAILHIGH (0x1UL << 2)
#define DPLL_IEN_LOCKFAILHIGH_DEFAULT ( _DPLL_IEN_LOCKFAILHIGH_DEFAULT << 2)
#define DPLL_IEN_LOCKFAILLOW (0x1UL << 1)
#define DPLL_IEN_LOCKFAILLOW_DEFAULT ( _DPLL_IEN_LOCKFAILLOW_DEFAULT << 1)
#define DPLL_IF_LOCK (0x1UL << 0)
#define DPLL_IF_LOCK_DEFAULT ( _DPLL_IF_LOCK_DEFAULT << 0)
#define DPLL_IF_LOCKFAILHIGH (0x1UL << 2)
#define DPLL_IF_LOCKFAILHIGH_DEFAULT ( _DPLL_IF_LOCKFAILHIGH_DEFAULT << 2)
#define DPLL_IF_LOCKFAILLOW (0x1UL << 1)
#define DPLL_IF_LOCKFAILLOW_DEFAULT ( _DPLL_IF_LOCKFAILLOW_DEFAULT << 1)
#define DPLL_IPVERSION_IPVERSION_DEFAULT ( _DPLL_IPVERSION_IPVERSION_DEFAULT << 0)
#define DPLL_LOCK_LOCKKEY_DEFAULT ( _DPLL_LOCK_LOCKKEY_DEFAULT << 0)
#define DPLL_LOCK_LOCKKEY_UNLOCK ( _DPLL_LOCK_LOCKKEY_UNLOCK << 0)
#define DPLL_STATUS_ENS (0x1UL << 1)
#define DPLL_STATUS_ENS_DEFAULT ( _DPLL_STATUS_ENS_DEFAULT << 1)
#define DPLL_STATUS_LOCK (0x1UL << 31)
#define DPLL_STATUS_LOCK_DEFAULT ( _DPLL_STATUS_LOCK_DEFAULT << 31)
#define DPLL_STATUS_LOCK_LOCKED ( _DPLL_STATUS_LOCK_LOCKED << 31)
#define DPLL_STATUS_LOCK_UNLOCKED ( _DPLL_STATUS_LOCK_UNLOCKED << 31)
#define DPLL_STATUS_RDY (0x1UL << 0)
#define DPLL_STATUS_RDY_DEFAULT ( _DPLL_STATUS_RDY_DEFAULT << 0)

Macro Definition Documentation

#define _DPLL_CFG1_M_DEFAULT   0x00000000UL

Mode DEFAULT for DPLL_CFG1

Definition at line 148 of file efr32mg21_dpll.h .

#define _DPLL_CFG1_M_MASK   0xFFFUL

Bit mask for DPLL_M

Definition at line 147 of file efr32mg21_dpll.h .

Referenced by CMU_DPLLLock() .

#define _DPLL_CFG1_M_SHIFT   0

Shift value for DPLL_M

Definition at line 146 of file efr32mg21_dpll.h .

Referenced by CMU_DPLLLock() .

#define _DPLL_CFG1_MASK   0x0FFF0FFFUL

Mask for DPLL_CFG1

Definition at line 145 of file efr32mg21_dpll.h .

#define _DPLL_CFG1_N_DEFAULT   0x00000000UL

Mode DEFAULT for DPLL_CFG1

Definition at line 152 of file efr32mg21_dpll.h .

#define _DPLL_CFG1_N_MASK   0xFFF0000UL

Bit mask for DPLL_N

Definition at line 151 of file efr32mg21_dpll.h .

Referenced by CMU_DPLLLock() .

#define _DPLL_CFG1_N_SHIFT   16

Shift value for DPLL_N

Definition at line 150 of file efr32mg21_dpll.h .

Referenced by CMU_DPLLLock() .

#define _DPLL_CFG1_RESETVALUE   0x00000000UL

Default value for DPLL_CFG1

Definition at line 144 of file efr32mg21_dpll.h .

#define _DPLL_CFG_AUTORECOVER_DEFAULT   0x00000000UL

Mode DEFAULT for DPLL_CFG

Definition at line 135 of file efr32mg21_dpll.h .

#define _DPLL_CFG_AUTORECOVER_MASK   0x4UL

Bit mask for DPLL_AUTORECOVER

Definition at line 134 of file efr32mg21_dpll.h .

#define _DPLL_CFG_AUTORECOVER_SHIFT   2

Shift value for DPLL_AUTORECOVER

Definition at line 133 of file efr32mg21_dpll.h .

Referenced by CMU_DPLLLock() .

#define _DPLL_CFG_DITHEN_DEFAULT   0x00000000UL

Mode DEFAULT for DPLL_CFG

Definition at line 140 of file efr32mg21_dpll.h .

#define _DPLL_CFG_DITHEN_MASK   0x40UL

Bit mask for DPLL_DITHEN

Definition at line 139 of file efr32mg21_dpll.h .

#define _DPLL_CFG_DITHEN_SHIFT   6

Shift value for DPLL_DITHEN

Definition at line 138 of file efr32mg21_dpll.h .

Referenced by CMU_DPLLLock() .

#define _DPLL_CFG_EDGESEL_DEFAULT   0x00000000UL

Mode DEFAULT for DPLL_CFG

Definition at line 130 of file efr32mg21_dpll.h .

#define _DPLL_CFG_EDGESEL_MASK   0x2UL

Bit mask for DPLL_EDGESEL

Definition at line 129 of file efr32mg21_dpll.h .

#define _DPLL_CFG_EDGESEL_SHIFT   1

Shift value for DPLL_EDGESEL

Definition at line 128 of file efr32mg21_dpll.h .

Referenced by CMU_DPLLLock() .

#define _DPLL_CFG_MASK   0x00000047UL

Mask for DPLL_CFG

Definition at line 117 of file efr32mg21_dpll.h .

#define _DPLL_CFG_MODE_DEFAULT   0x00000000UL

Mode DEFAULT for DPLL_CFG

Definition at line 121 of file efr32mg21_dpll.h .

#define _DPLL_CFG_MODE_FLL   0x00000000UL

Mode FLL for DPLL_CFG

Definition at line 122 of file efr32mg21_dpll.h .

#define _DPLL_CFG_MODE_MASK   0x1UL

Bit mask for DPLL_MODE

Definition at line 120 of file efr32mg21_dpll.h .

#define _DPLL_CFG_MODE_PLL   0x00000001UL

Mode PLL for DPLL_CFG

Definition at line 123 of file efr32mg21_dpll.h .

#define _DPLL_CFG_MODE_SHIFT   0

Shift value for DPLL_MODE

Definition at line 119 of file efr32mg21_dpll.h .

Referenced by CMU_DPLLLock() .

#define _DPLL_CFG_RESETVALUE   0x00000000UL

Default value for DPLL_CFG

Definition at line 116 of file efr32mg21_dpll.h .

#define _DPLL_EN_EN_DEFAULT   0x00000000UL

Mode DEFAULT for DPLL_EN

Definition at line 112 of file efr32mg21_dpll.h .

#define _DPLL_EN_EN_MASK   0x1UL

Bit mask for DPLL_EN

Definition at line 111 of file efr32mg21_dpll.h .

#define _DPLL_EN_EN_SHIFT   0

Shift value for DPLL_EN

Definition at line 110 of file efr32mg21_dpll.h .

#define _DPLL_EN_MASK   0x00000001UL

Mask for DPLL_EN

Definition at line 108 of file efr32mg21_dpll.h .

#define _DPLL_EN_RESETVALUE   0x00000000UL

Default value for DPLL_EN

Definition at line 107 of file efr32mg21_dpll.h .

#define _DPLL_IEN_LOCK_DEFAULT   0x00000000UL

Mode DEFAULT for DPLL_IEN

Definition at line 180 of file efr32mg21_dpll.h .

#define _DPLL_IEN_LOCK_MASK   0x1UL

Bit mask for DPLL_LOCK

Definition at line 179 of file efr32mg21_dpll.h .

#define _DPLL_IEN_LOCK_SHIFT   0

Shift value for DPLL_LOCK

Definition at line 178 of file efr32mg21_dpll.h .

#define _DPLL_IEN_LOCKFAILHIGH_DEFAULT   0x00000000UL

Mode DEFAULT for DPLL_IEN

Definition at line 190 of file efr32mg21_dpll.h .

#define _DPLL_IEN_LOCKFAILHIGH_MASK   0x4UL

Bit mask for DPLL_LOCKFAILHIGH

Definition at line 189 of file efr32mg21_dpll.h .

#define _DPLL_IEN_LOCKFAILHIGH_SHIFT   2

Shift value for DPLL_LOCKFAILHIGH

Definition at line 188 of file efr32mg21_dpll.h .

#define _DPLL_IEN_LOCKFAILLOW_DEFAULT   0x00000000UL

Mode DEFAULT for DPLL_IEN

Definition at line 185 of file efr32mg21_dpll.h .

#define _DPLL_IEN_LOCKFAILLOW_MASK   0x2UL

Bit mask for DPLL_LOCKFAILLOW

Definition at line 184 of file efr32mg21_dpll.h .

#define _DPLL_IEN_LOCKFAILLOW_SHIFT   1

Shift value for DPLL_LOCKFAILLOW

Definition at line 183 of file efr32mg21_dpll.h .

#define _DPLL_IEN_MASK   0x00000007UL

Mask for DPLL_IEN

Definition at line 176 of file efr32mg21_dpll.h .

#define _DPLL_IEN_RESETVALUE   0x00000000UL

Default value for DPLL_IEN

Definition at line 175 of file efr32mg21_dpll.h .

#define _DPLL_IF_LOCK_DEFAULT   0x00000000UL

Mode DEFAULT for DPLL_IF

Definition at line 161 of file efr32mg21_dpll.h .

#define _DPLL_IF_LOCK_MASK   0x1UL

Bit mask for DPLL_LOCK

Definition at line 160 of file efr32mg21_dpll.h .

#define _DPLL_IF_LOCK_SHIFT   0

Shift value for DPLL_LOCK

Definition at line 159 of file efr32mg21_dpll.h .

#define _DPLL_IF_LOCKFAILHIGH_DEFAULT   0x00000000UL

Mode DEFAULT for DPLL_IF

Definition at line 171 of file efr32mg21_dpll.h .

#define _DPLL_IF_LOCKFAILHIGH_MASK   0x4UL

Bit mask for DPLL_LOCKFAILHIGH

Definition at line 170 of file efr32mg21_dpll.h .

#define _DPLL_IF_LOCKFAILHIGH_SHIFT   2

Shift value for DPLL_LOCKFAILHIGH

Definition at line 169 of file efr32mg21_dpll.h .

#define _DPLL_IF_LOCKFAILLOW_DEFAULT   0x00000000UL

Mode DEFAULT for DPLL_IF

Definition at line 166 of file efr32mg21_dpll.h .

#define _DPLL_IF_LOCKFAILLOW_MASK   0x2UL

Bit mask for DPLL_LOCKFAILLOW

Definition at line 165 of file efr32mg21_dpll.h .

#define _DPLL_IF_LOCKFAILLOW_SHIFT   1

Shift value for DPLL_LOCKFAILLOW

Definition at line 164 of file efr32mg21_dpll.h .

#define _DPLL_IF_MASK   0x00000007UL

Mask for DPLL_IF

Definition at line 157 of file efr32mg21_dpll.h .

#define _DPLL_IF_RESETVALUE   0x00000000UL

Default value for DPLL_IF

Definition at line 156 of file efr32mg21_dpll.h .

#define _DPLL_IPVERSION_IPVERSION_DEFAULT   0x00000000UL

Mode DEFAULT for DPLL_IPVERSION

Definition at line 103 of file efr32mg21_dpll.h .

#define _DPLL_IPVERSION_IPVERSION_MASK   0xFFFFFFFFUL

Bit mask for DPLL_IPVERSION

Definition at line 102 of file efr32mg21_dpll.h .

#define _DPLL_IPVERSION_IPVERSION_SHIFT   0

Shift value for DPLL_IPVERSION

Definition at line 101 of file efr32mg21_dpll.h .

#define _DPLL_IPVERSION_MASK   0xFFFFFFFFUL

Mask for DPLL_IPVERSION

Definition at line 100 of file efr32mg21_dpll.h .

#define _DPLL_IPVERSION_RESETVALUE   0x00000000UL

Default value for DPLL_IPVERSION

Definition at line 99 of file efr32mg21_dpll.h .

#define _DPLL_LOCK_LOCKKEY_DEFAULT   0x00007102UL

Mode DEFAULT for DPLL_LOCK

Definition at line 221 of file efr32mg21_dpll.h .

#define _DPLL_LOCK_LOCKKEY_MASK   0xFFFFUL

Bit mask for DPLL_LOCKKEY

Definition at line 220 of file efr32mg21_dpll.h .

#define _DPLL_LOCK_LOCKKEY_SHIFT   0

Shift value for DPLL_LOCKKEY

Definition at line 219 of file efr32mg21_dpll.h .

#define _DPLL_LOCK_LOCKKEY_UNLOCK   0x00007102UL

Mode UNLOCK for DPLL_LOCK

Definition at line 222 of file efr32mg21_dpll.h .

#define _DPLL_LOCK_MASK   0x0000FFFFUL

Mask for DPLL_LOCK

Definition at line 218 of file efr32mg21_dpll.h .

#define _DPLL_LOCK_RESETVALUE   0x00007102UL

Default value for DPLL_LOCK

Definition at line 217 of file efr32mg21_dpll.h .

#define _DPLL_STATUS_ENS_DEFAULT   0x00000000UL

Mode DEFAULT for DPLL_STATUS

Definition at line 204 of file efr32mg21_dpll.h .

#define _DPLL_STATUS_ENS_MASK   0x2UL

Bit mask for DPLL_ENS

Definition at line 203 of file efr32mg21_dpll.h .

#define _DPLL_STATUS_ENS_SHIFT   1

Shift value for DPLL_ENS

Definition at line 202 of file efr32mg21_dpll.h .

#define _DPLL_STATUS_LOCK_DEFAULT   0x00000000UL

Mode DEFAULT for DPLL_STATUS

Definition at line 209 of file efr32mg21_dpll.h .

#define _DPLL_STATUS_LOCK_LOCKED   0x00000001UL

Mode LOCKED for DPLL_STATUS

Definition at line 211 of file efr32mg21_dpll.h .

#define _DPLL_STATUS_LOCK_MASK   0x80000000UL

Bit mask for DPLL_LOCK

Definition at line 208 of file efr32mg21_dpll.h .

#define _DPLL_STATUS_LOCK_SHIFT   31

Shift value for DPLL_LOCK

Definition at line 207 of file efr32mg21_dpll.h .

#define _DPLL_STATUS_LOCK_UNLOCKED   0x00000000UL

Mode UNLOCKED for DPLL_STATUS

Definition at line 210 of file efr32mg21_dpll.h .

#define _DPLL_STATUS_MASK   0x80000003UL

Mask for DPLL_STATUS

Definition at line 195 of file efr32mg21_dpll.h .

#define _DPLL_STATUS_RDY_DEFAULT   0x00000000UL

Mode DEFAULT for DPLL_STATUS

Definition at line 199 of file efr32mg21_dpll.h .

#define _DPLL_STATUS_RDY_MASK   0x1UL

Bit mask for DPLL_RDY

Definition at line 198 of file efr32mg21_dpll.h .

#define _DPLL_STATUS_RDY_SHIFT   0

Shift value for DPLL_RDY

Definition at line 197 of file efr32mg21_dpll.h .

#define _DPLL_STATUS_RESETVALUE   0x00000000UL

Default value for DPLL_STATUS

Definition at line 194 of file efr32mg21_dpll.h .

#define DPLL_CFG1_M_DEFAULT   ( _DPLL_CFG1_M_DEFAULT << 0)

Shifted mode DEFAULT for DPLL_CFG1

Definition at line 149 of file efr32mg21_dpll.h .

#define DPLL_CFG1_N_DEFAULT   ( _DPLL_CFG1_N_DEFAULT << 16)

Shifted mode DEFAULT for DPLL_CFG1

Definition at line 153 of file efr32mg21_dpll.h .

#define DPLL_CFG_AUTORECOVER   (0x1UL << 2)

Automatic Recovery Control

Definition at line 132 of file efr32mg21_dpll.h .

#define DPLL_CFG_AUTORECOVER_DEFAULT   ( _DPLL_CFG_AUTORECOVER_DEFAULT << 2)

Shifted mode DEFAULT for DPLL_CFG

Definition at line 136 of file efr32mg21_dpll.h .

#define DPLL_CFG_DITHEN   (0x1UL << 6)

Dither Enable Control

Definition at line 137 of file efr32mg21_dpll.h .

#define DPLL_CFG_DITHEN_DEFAULT   ( _DPLL_CFG_DITHEN_DEFAULT << 6)

Shifted mode DEFAULT for DPLL_CFG

Definition at line 141 of file efr32mg21_dpll.h .

#define DPLL_CFG_EDGESEL   (0x1UL << 1)

Reference Edge Select

Definition at line 127 of file efr32mg21_dpll.h .

#define DPLL_CFG_EDGESEL_DEFAULT   ( _DPLL_CFG_EDGESEL_DEFAULT << 1)

Shifted mode DEFAULT for DPLL_CFG

Definition at line 131 of file efr32mg21_dpll.h .

#define DPLL_CFG_MODE   (0x1UL << 0)

Operating Mode Control

Definition at line 118 of file efr32mg21_dpll.h .

#define DPLL_CFG_MODE_DEFAULT   ( _DPLL_CFG_MODE_DEFAULT << 0)

Shifted mode DEFAULT for DPLL_CFG

Definition at line 124 of file efr32mg21_dpll.h .

#define DPLL_CFG_MODE_FLL   ( _DPLL_CFG_MODE_FLL << 0)

Shifted mode FLL for DPLL_CFG

Definition at line 125 of file efr32mg21_dpll.h .

#define DPLL_CFG_MODE_PLL   ( _DPLL_CFG_MODE_PLL << 0)

Shifted mode PLL for DPLL_CFG

Definition at line 126 of file efr32mg21_dpll.h .

#define DPLL_EN_EN   (0x1UL << 0)

Module Enable

Definition at line 109 of file efr32mg21_dpll.h .

Referenced by CMU_DPLLLock() , CMU_DPLLUnlock() , and CMU_HFRCODPLLBandSet() .

#define DPLL_EN_EN_DEFAULT   ( _DPLL_EN_EN_DEFAULT << 0)

Shifted mode DEFAULT for DPLL_EN

Definition at line 113 of file efr32mg21_dpll.h .

#define DPLL_IEN_LOCK   (0x1UL << 0)

New BitField

Definition at line 177 of file efr32mg21_dpll.h .

#define DPLL_IEN_LOCK_DEFAULT   ( _DPLL_IEN_LOCK_DEFAULT << 0)

Shifted mode DEFAULT for DPLL_IEN

Definition at line 181 of file efr32mg21_dpll.h .

#define DPLL_IEN_LOCKFAILHIGH   (0x1UL << 2)

New BitField

Definition at line 187 of file efr32mg21_dpll.h .

#define DPLL_IEN_LOCKFAILHIGH_DEFAULT   ( _DPLL_IEN_LOCKFAILHIGH_DEFAULT << 2)

Shifted mode DEFAULT for DPLL_IEN

Definition at line 191 of file efr32mg21_dpll.h .

#define DPLL_IEN_LOCKFAILLOW   (0x1UL << 1)

New BitField

Definition at line 182 of file efr32mg21_dpll.h .

#define DPLL_IEN_LOCKFAILLOW_DEFAULT   ( _DPLL_IEN_LOCKFAILLOW_DEFAULT << 1)

Shifted mode DEFAULT for DPLL_IEN

Definition at line 186 of file efr32mg21_dpll.h .

#define DPLL_IF_LOCK   (0x1UL << 0)

Lock Interrupt Flag

Definition at line 158 of file efr32mg21_dpll.h .

Referenced by CMU_DPLLLock() .

#define DPLL_IF_LOCK_DEFAULT   ( _DPLL_IF_LOCK_DEFAULT << 0)

Shifted mode DEFAULT for DPLL_IF

Definition at line 162 of file efr32mg21_dpll.h .

#define DPLL_IF_LOCKFAILHIGH   (0x1UL << 2)

Lock Failure High Interrupt Flag

Definition at line 168 of file efr32mg21_dpll.h .

Referenced by CMU_DPLLLock() .

#define DPLL_IF_LOCKFAILHIGH_DEFAULT   ( _DPLL_IF_LOCKFAILHIGH_DEFAULT << 2)

Shifted mode DEFAULT for DPLL_IF

Definition at line 172 of file efr32mg21_dpll.h .

#define DPLL_IF_LOCKFAILLOW   (0x1UL << 1)

Lock Failure Low Interrupt Flag

Definition at line 163 of file efr32mg21_dpll.h .

Referenced by CMU_DPLLLock() .

#define DPLL_IF_LOCKFAILLOW_DEFAULT   ( _DPLL_IF_LOCKFAILLOW_DEFAULT << 1)

Shifted mode DEFAULT for DPLL_IF

Definition at line 167 of file efr32mg21_dpll.h .

#define DPLL_IPVERSION_IPVERSION_DEFAULT   ( _DPLL_IPVERSION_IPVERSION_DEFAULT << 0)

Shifted mode DEFAULT for DPLL_IPVERSION

Definition at line 104 of file efr32mg21_dpll.h .

#define DPLL_LOCK_LOCKKEY_DEFAULT   ( _DPLL_LOCK_LOCKKEY_DEFAULT << 0)

Shifted mode DEFAULT for DPLL_LOCK

Definition at line 223 of file efr32mg21_dpll.h .

#define DPLL_LOCK_LOCKKEY_UNLOCK   ( _DPLL_LOCK_LOCKKEY_UNLOCK << 0)

Shifted mode UNLOCK for DPLL_LOCK

Definition at line 224 of file efr32mg21_dpll.h .

#define DPLL_STATUS_ENS   (0x1UL << 1)

Enable Status

Definition at line 201 of file efr32mg21_dpll.h .

Referenced by CMU_DPLLLock() , and CMU_HFRCODPLLBandSet() .

#define DPLL_STATUS_ENS_DEFAULT   ( _DPLL_STATUS_ENS_DEFAULT << 1)

Shifted mode DEFAULT for DPLL_STATUS

Definition at line 205 of file efr32mg21_dpll.h .

#define DPLL_STATUS_LOCK   (0x1UL << 31)

Lock Status

Definition at line 206 of file efr32mg21_dpll.h .

#define DPLL_STATUS_LOCK_DEFAULT   ( _DPLL_STATUS_LOCK_DEFAULT << 31)

Shifted mode DEFAULT for DPLL_STATUS

Definition at line 212 of file efr32mg21_dpll.h .

#define DPLL_STATUS_LOCK_LOCKED   ( _DPLL_STATUS_LOCK_LOCKED << 31)

Shifted mode LOCKED for DPLL_STATUS

Definition at line 214 of file efr32mg21_dpll.h .

#define DPLL_STATUS_LOCK_UNLOCKED   ( _DPLL_STATUS_LOCK_UNLOCKED << 31)

Shifted mode UNLOCKED for DPLL_STATUS

Definition at line 213 of file efr32mg21_dpll.h .

#define DPLL_STATUS_RDY   (0x1UL << 0)

Ready Status

Definition at line 196 of file efr32mg21_dpll.h .

Referenced by CMU_DPLLLock() , and CMU_HFRCODPLLBandSet() .

#define DPLL_STATUS_RDY_DEFAULT   ( _DPLL_STATUS_RDY_DEFAULT << 0)

Shifted mode DEFAULT for DPLL_STATUS

Definition at line 200 of file efr32mg21_dpll.h .