SEMAILBOX_SE Bit FieldsDevices > SEMAILBOX_SE
Macros |
|
| #define | _SEMAILBOX_NEW_REG_MASK 0x00000001UL |
| #define | _SEMAILBOX_NEW_REG_NEWBIT_DEFAULT 0x00000000UL |
| #define | _SEMAILBOX_NEW_REG_NEWBIT_MASK 0x1UL |
| #define | _SEMAILBOX_NEW_REG_NEWBIT_SHIFT 0 |
| #define | _SEMAILBOX_NEW_REG_RESETVALUE 0x00000000UL |
| #define | SEMAILBOX_NEW_REG_NEWBIT (0x1UL << 0) |
| #define | SEMAILBOX_NEW_REG_NEWBIT_DEFAULT ( _SEMAILBOX_NEW_REG_NEWBIT_DEFAULT << 0) |
Macro Definition Documentation
| #define _SEMAILBOX_NEW_REG_MASK 0x00000001UL |
Mask for SEMAILBOX_NEW_REG
Definition at line
247
of file
efr32mg21_semailbox.h
.
| #define _SEMAILBOX_NEW_REG_NEWBIT_DEFAULT 0x00000000UL |
Mode DEFAULT for SEMAILBOX_NEW_REG
Definition at line
251
of file
efr32mg21_semailbox.h
.
| #define _SEMAILBOX_NEW_REG_NEWBIT_MASK 0x1UL |
Bit mask for SEMAILBOX_NEWBIT
Definition at line
250
of file
efr32mg21_semailbox.h
.
| #define _SEMAILBOX_NEW_REG_NEWBIT_SHIFT 0 |
Shift value for SEMAILBOX_NEWBIT
Definition at line
249
of file
efr32mg21_semailbox.h
.
| #define _SEMAILBOX_NEW_REG_RESETVALUE 0x00000000UL |
Default value for SEMAILBOX_NEW_REG
Definition at line
246
of file
efr32mg21_semailbox.h
.
| #define SEMAILBOX_NEW_REG_NEWBIT (0x1UL << 0) |
New BitField
Definition at line
248
of file
efr32mg21_semailbox.h
.
| #define SEMAILBOX_NEW_REG_NEWBIT_DEFAULT ( _SEMAILBOX_NEW_REG_NEWBIT_DEFAULT << 0) |
Shifted mode DEFAULT for SEMAILBOX_NEW_REG
Definition at line
252
of file
efr32mg21_semailbox.h
.