Macros
#define	_RAC_ANTDIV_EN_DEFAULT 0x00000000UL

#define	_RAC_ANTDIV_EN_LNAMIXEN1 0x00000002UL

#define	_RAC_ANTDIV_EN_LNAMIXEN2 0x00000020UL

#define	_RAC_ANTDIV_EN_LNAMIXRFPKDENRF1 0x00000004UL

#define	_RAC_ANTDIV_EN_LNAMIXRFPKDENRF2 0x00000040UL

#define	_RAC_ANTDIV_EN_MASK 0xFFUL

#define	_RAC_ANTDIV_EN_OFF 0x00000000UL

#define	_RAC_ANTDIV_EN_ON 0x000000FFUL

#define	_RAC_ANTDIV_EN_PAENANT1 0x00000001UL

#define	_RAC_ANTDIV_EN_PAENANT2 0x00000010UL

#define	_RAC_ANTDIV_EN_SHIFT 0

#define	_RAC_ANTDIV_EN_SYLODIVRLO12G4EN 0x00000008UL

#define	_RAC_ANTDIV_EN_SYLODIVRLO22G4EN 0x00000080UL

#define	_RAC_ANTDIV_MASK 0x000003FFUL

#define	_RAC_ANTDIV_RESETVALUE 0x00000000UL

#define	_RAC_ANTDIV_STATUS_ANT1 0x00000001UL

#define	_RAC_ANTDIV_STATUS_ANT2 0x00000002UL

#define	_RAC_ANTDIV_STATUS_BOTH 0x00000003UL

#define	_RAC_ANTDIV_STATUS_DEFAULT 0x00000000UL

#define	_RAC_ANTDIV_STATUS_MASK 0x300UL

#define	_RAC_ANTDIV_STATUS_OFF 0x00000000UL

#define	_RAC_ANTDIV_STATUS_SHIFT 8

#define	_RAC_APC_AMPCONTROLLIMITSW_DEFAULT 0x000000FFUL

#define	_RAC_APC_AMPCONTROLLIMITSW_MASK 0xFF000000UL

#define	_RAC_APC_AMPCONTROLLIMITSW_SHIFT 24

#define	_RAC_APC_ENAPCSW_DEFAULT 0x00000000UL

#define	_RAC_APC_ENAPCSW_DISABLE 0x00000000UL

#define	_RAC_APC_ENAPCSW_ENABLE 0x00000001UL

#define	_RAC_APC_ENAPCSW_MASK 0x4UL

#define	_RAC_APC_ENAPCSW_SHIFT 2

#define	_RAC_APC_MASK 0xFF000004UL

#define	_RAC_APC_RESETVALUE 0xFF000000UL

#define	_RAC_AUXADCCTRL0_CLRCOUNTER_DEFAULT 0x00000000UL

#define	_RAC_AUXADCCTRL0_CLRCOUNTER_MASK 0x1000UL

#define	_RAC_AUXADCCTRL0_CLRCOUNTER_SHIFT 12

#define	_RAC_AUXADCCTRL0_CLRFILTER_DEFAULT 0x00000000UL

#define	_RAC_AUXADCCTRL0_CLRFILTER_MASK 0x2000UL

#define	_RAC_AUXADCCTRL0_CLRFILTER_SHIFT 13

#define	_RAC_AUXADCCTRL0_CYCLES_DEFAULT 0x00000100UL

#define	_RAC_AUXADCCTRL0_CYCLES_MASK 0x3FFUL

#define	_RAC_AUXADCCTRL0_CYCLES_SHIFT 0

#define	_RAC_AUXADCCTRL0_INPUTRESSEL_DEFAULT 0x00000000UL

#define	_RAC_AUXADCCTRL0_INPUTRESSEL_MASK 0x3C000UL

#define	_RAC_AUXADCCTRL0_INPUTRESSEL_SHIFT 14

#define	_RAC_AUXADCCTRL0_MASK 0x0003FFFFUL

#define	_RAC_AUXADCCTRL0_MUXSEL_DEFAULT 0x00000000UL

#define	_RAC_AUXADCCTRL0_MUXSEL_MASK 0xC00UL

#define	_RAC_AUXADCCTRL0_MUXSEL_SHIFT 10

#define	_RAC_AUXADCCTRL0_RESETVALUE 0x00000100UL

#define	_RAC_AUXADCCTRL1_AUXADCINPUTRESSEL_DEFAULT 0x00000000UL

#define	_RAC_AUXADCCTRL1_AUXADCINPUTRESSEL_MASK 0xFUL

#define	_RAC_AUXADCCTRL1_AUXADCINPUTRESSEL_RES0p6kOhm 0x0000000AUL

#define	_RAC_AUXADCCTRL1_AUXADCINPUTRESSEL_RES10kOhm 0x00000006UL

#define	_RAC_AUXADCCTRL1_AUXADCINPUTRESSEL_RES160kOhm 0x00000002UL

#define	_RAC_AUXADCCTRL1_AUXADCINPUTRESSEL_RES1p25kOhm 0x00000009UL

#define	_RAC_AUXADCCTRL1_AUXADCINPUTRESSEL_RES20kOhm 0x00000005UL

#define	_RAC_AUXADCCTRL1_AUXADCINPUTRESSEL_RES2p5kOhm 0x00000008UL

#define	_RAC_AUXADCCTRL1_AUXADCINPUTRESSEL_RES320kOhm 0x00000001UL

#define	_RAC_AUXADCCTRL1_AUXADCINPUTRESSEL_RES40kOhm 0x00000004UL

#define	_RAC_AUXADCCTRL1_AUXADCINPUTRESSEL_RES5kOhm 0x00000007UL

#define	_RAC_AUXADCCTRL1_AUXADCINPUTRESSEL_RES640kOhm 0x00000000UL

#define	_RAC_AUXADCCTRL1_AUXADCINPUTRESSEL_RES80kOhm 0x00000003UL

#define	_RAC_AUXADCCTRL1_AUXADCINPUTRESSEL_RES_switch 0x0000000BUL

#define	_RAC_AUXADCCTRL1_AUXADCINPUTRESSEL_SHIFT 0

#define	_RAC_AUXADCCTRL1_AUXADCINPUTSELECT_DEFAULT 0x00000000UL

#define	_RAC_AUXADCCTRL1_AUXADCINPUTSELECT_MASK 0xF0UL

#define	_RAC_AUXADCCTRL1_AUXADCINPUTSELECT_SEL0 0x00000000UL

#define	_RAC_AUXADCCTRL1_AUXADCINPUTSELECT_SEL1 0x00000001UL

#define	_RAC_AUXADCCTRL1_AUXADCINPUTSELECT_SEL2 0x00000002UL

#define	_RAC_AUXADCCTRL1_AUXADCINPUTSELECT_SEL3 0x00000003UL

#define	_RAC_AUXADCCTRL1_AUXADCINPUTSELECT_SEL4 0x00000004UL

#define	_RAC_AUXADCCTRL1_AUXADCINPUTSELECT_SEL5 0x00000005UL

#define	_RAC_AUXADCCTRL1_AUXADCINPUTSELECT_SEL6 0x00000006UL

#define	_RAC_AUXADCCTRL1_AUXADCINPUTSELECT_SEL7 0x00000007UL

#define	_RAC_AUXADCCTRL1_AUXADCINPUTSELECT_SEL8 0x00000008UL

#define	_RAC_AUXADCCTRL1_AUXADCINPUTSELECT_SEL9 0x00000009UL

#define	_RAC_AUXADCCTRL1_AUXADCINPUTSELECT_SHIFT 4

#define	_RAC_AUXADCCTRL1_AUXADCPMONSELECT_DEFAULT 0x00000000UL

#define	_RAC_AUXADCCTRL1_AUXADCPMONSELECT_MASK 0xF00UL

#define	_RAC_AUXADCCTRL1_AUXADCPMONSELECT_SHIFT 8

#define	_RAC_AUXADCCTRL1_AUXADCRESET_DEFAULT 0x00000000UL

#define	_RAC_AUXADCCTRL1_AUXADCRESET_MASK 0x1000000UL

#define	_RAC_AUXADCCTRL1_AUXADCRESET_Reset_Disabled 0x00000001UL

#define	_RAC_AUXADCCTRL1_AUXADCRESET_Reset_Enabled 0x00000000UL

#define	_RAC_AUXADCCTRL1_AUXADCRESET_SHIFT 24

#define	_RAC_AUXADCCTRL1_AUXADCTSENSESELCURR_DEFAULT 0x00000000UL

#define	_RAC_AUXADCCTRL1_AUXADCTSENSESELCURR_MASK 0x1F0000UL

#define	_RAC_AUXADCCTRL1_AUXADCTSENSESELCURR_SHIFT 16

#define	_RAC_AUXADCCTRL1_AUXADCTSENSESELVBE_DEFAULT 0x00000000UL

#define	_RAC_AUXADCCTRL1_AUXADCTSENSESELVBE_MASK 0x2000000UL

#define	_RAC_AUXADCCTRL1_AUXADCTSENSESELVBE_SHIFT 25

#define	_RAC_AUXADCCTRL1_AUXADCTSENSESELVBE_VBE1 0x00000000UL

#define	_RAC_AUXADCCTRL1_AUXADCTSENSESELVBE_VBE2 0x00000001UL

#define	_RAC_AUXADCCTRL1_MASK 0x031F0FFFUL

#define	_RAC_AUXADCCTRL1_RESETVALUE 0x00000000UL

#define	_RAC_AUXADCEN_AUXADCENAUXADC_DEFAULT 0x00000000UL

#define	_RAC_AUXADCEN_AUXADCENAUXADC_Disabled 0x00000000UL

#define	_RAC_AUXADCEN_AUXADCENAUXADC_Enabled 0x00000001UL

#define	_RAC_AUXADCEN_AUXADCENAUXADC_MASK 0x1UL

#define	_RAC_AUXADCEN_AUXADCENAUXADC_SHIFT 0

#define	_RAC_AUXADCEN_AUXADCENINPUTBUFFER_DEFAULT 0x00000000UL

#define	_RAC_AUXADCEN_AUXADCENINPUTBUFFER_Disabled 0x00000000UL

#define	_RAC_AUXADCEN_AUXADCENINPUTBUFFER_Enabled 0x00000001UL

#define	_RAC_AUXADCEN_AUXADCENINPUTBUFFER_MASK 0x2UL

#define	_RAC_AUXADCEN_AUXADCENINPUTBUFFER_SHIFT 1

#define	_RAC_AUXADCEN_AUXADCENLDO_DEFAULT 0x00000000UL

#define	_RAC_AUXADCEN_AUXADCENLDO_Disabled 0x00000000UL

#define	_RAC_AUXADCEN_AUXADCENLDO_Enabled 0x00000001UL

#define	_RAC_AUXADCEN_AUXADCENLDO_MASK 0x4UL

#define	_RAC_AUXADCEN_AUXADCENLDO_SHIFT 2

#define	_RAC_AUXADCEN_AUXADCENOUTPUTDRV_DEFAULT 0x00000000UL

#define	_RAC_AUXADCEN_AUXADCENOUTPUTDRV_Disabled 0x00000000UL

#define	_RAC_AUXADCEN_AUXADCENOUTPUTDRV_Enabled 0x00000001UL

#define	_RAC_AUXADCEN_AUXADCENOUTPUTDRV_MASK 0x8UL

#define	_RAC_AUXADCEN_AUXADCENOUTPUTDRV_SHIFT 3

#define	_RAC_AUXADCEN_AUXADCENPMON_DEFAULT 0x00000000UL

#define	_RAC_AUXADCEN_AUXADCENPMON_Disabled 0x00000000UL

#define	_RAC_AUXADCEN_AUXADCENPMON_Enabled 0x00000001UL

#define	_RAC_AUXADCEN_AUXADCENPMON_MASK 0x10UL

#define	_RAC_AUXADCEN_AUXADCENPMON_SHIFT 4

#define	_RAC_AUXADCEN_AUXADCENRESONDIAGA_DEFAULT 0x00000000UL

#define	_RAC_AUXADCEN_AUXADCENRESONDIAGA_Disabled 0x00000000UL

#define	_RAC_AUXADCEN_AUXADCENRESONDIAGA_Enabled 0x00000001UL

#define	_RAC_AUXADCEN_AUXADCENRESONDIAGA_MASK 0x20UL

#define	_RAC_AUXADCEN_AUXADCENRESONDIAGA_SHIFT 5

#define	_RAC_AUXADCEN_AUXADCENTSENSE_DEFAULT 0x00000000UL

#define	_RAC_AUXADCEN_AUXADCENTSENSE_Disabled 0x00000000UL

#define	_RAC_AUXADCEN_AUXADCENTSENSE_Enabled 0x00000001UL

#define	_RAC_AUXADCEN_AUXADCENTSENSE_MASK 0x40UL

#define	_RAC_AUXADCEN_AUXADCENTSENSE_SHIFT 6

#define	_RAC_AUXADCEN_AUXADCENTSENSECAL_DEFAULT 0x00000000UL

#define	_RAC_AUXADCEN_AUXADCENTSENSECAL_Disabled 0x00000000UL

#define	_RAC_AUXADCEN_AUXADCENTSENSECAL_Enabled 0x00000001UL

#define	_RAC_AUXADCEN_AUXADCENTSENSECAL_MASK 0x80UL

#define	_RAC_AUXADCEN_AUXADCENTSENSECAL_SHIFT 7

#define	_RAC_AUXADCEN_AUXADCINPUTBUFFERBYPASS_Bypassed 0x00000001UL

#define	_RAC_AUXADCEN_AUXADCINPUTBUFFERBYPASS_DEFAULT 0x00000000UL

#define	_RAC_AUXADCEN_AUXADCINPUTBUFFERBYPASS_MASK 0x100UL

#define	_RAC_AUXADCEN_AUXADCINPUTBUFFERBYPASS_Not_Bypassed 0x00000000UL

#define	_RAC_AUXADCEN_AUXADCINPUTBUFFERBYPASS_SHIFT 8

#define	_RAC_AUXADCEN_MASK 0x000001FFUL

#define	_RAC_AUXADCEN_RESETVALUE 0x00000000UL

#define	_RAC_AUXADCOUT_AUXADCOUT_DEFAULT 0x00000000UL

#define	_RAC_AUXADCOUT_AUXADCOUT_MASK 0xFFFFFFFUL

#define	_RAC_AUXADCOUT_AUXADCOUT_SHIFT 0

#define	_RAC_AUXADCOUT_MASK 0x0FFFFFFFUL

#define	_RAC_AUXADCOUT_RESETVALUE 0x00000000UL

#define	_RAC_AUXADCTRIM_AUXADCCLKINVERT_DEFAULT 0x00000000UL

#define	_RAC_AUXADCTRIM_AUXADCCLKINVERT_Disable_Invert 0x00000000UL

#define	_RAC_AUXADCTRIM_AUXADCCLKINVERT_Enable_Invert 0x00000001UL

#define	_RAC_AUXADCTRIM_AUXADCCLKINVERT_MASK 0x1UL

#define	_RAC_AUXADCTRIM_AUXADCCLKINVERT_SHIFT 0

#define	_RAC_AUXADCTRIM_AUXADCLDOVREFTRIM_DEFAULT 0x00000001UL

#define	_RAC_AUXADCTRIM_AUXADCLDOVREFTRIM_MASK 0x6UL

#define	_RAC_AUXADCTRIM_AUXADCLDOVREFTRIM_SHIFT 1

#define	_RAC_AUXADCTRIM_AUXADCLDOVREFTRIM_TRIM1p27 0x00000000UL

#define	_RAC_AUXADCTRIM_AUXADCLDOVREFTRIM_TRIM1p3 0x00000001UL

#define	_RAC_AUXADCTRIM_AUXADCLDOVREFTRIM_TRIM1p35 0x00000002UL

#define	_RAC_AUXADCTRIM_AUXADCLDOVREFTRIM_TRIM1p4 0x00000003UL

#define	_RAC_AUXADCTRIM_AUXADCOUTPUTINVERT_DEFAULT 0x00000000UL

#define	_RAC_AUXADCTRIM_AUXADCOUTPUTINVERT_Disabled 0x00000000UL

#define	_RAC_AUXADCTRIM_AUXADCOUTPUTINVERT_Enabled 0x00000001UL

#define	_RAC_AUXADCTRIM_AUXADCOUTPUTINVERT_MASK 0x8UL

#define	_RAC_AUXADCTRIM_AUXADCOUTPUTINVERT_SHIFT 3

#define	_RAC_AUXADCTRIM_AUXADCRCTUNE_DEFAULT 0x00000010UL

#define	_RAC_AUXADCTRIM_AUXADCRCTUNE_MASK 0x1F0UL

#define	_RAC_AUXADCTRIM_AUXADCRCTUNE_SHIFT 4

#define	_RAC_AUXADCTRIM_AUXADCTRIMADCINPUTRES_DEFAULT 0x00000002UL

#define	_RAC_AUXADCTRIM_AUXADCTRIMADCINPUTRES_MASK 0x600UL

#define	_RAC_AUXADCTRIM_AUXADCTRIMADCINPUTRES_RES200k 0x00000000UL

#define	_RAC_AUXADCTRIM_AUXADCTRIMADCINPUTRES_RES250k 0x00000001UL

#define	_RAC_AUXADCTRIM_AUXADCTRIMADCINPUTRES_RES300k 0x00000002UL

#define	_RAC_AUXADCTRIM_AUXADCTRIMADCINPUTRES_RES350k 0x00000003UL

#define	_RAC_AUXADCTRIM_AUXADCTRIMADCINPUTRES_SHIFT 9

#define	_RAC_AUXADCTRIM_AUXADCTRIMCURRINPUTBUF_DEFAULT 0x00000002UL

#define	_RAC_AUXADCTRIM_AUXADCTRIMCURRINPUTBUF_MASK 0x1800UL

#define	_RAC_AUXADCTRIM_AUXADCTRIMCURRINPUTBUF_SHIFT 11

#define	_RAC_AUXADCTRIM_AUXADCTRIMCURRINPUTBUF_Typ 0x00000002UL

#define	_RAC_AUXADCTRIM_AUXADCTRIMCURRINPUTBUF_Typ_minus_20pct 0x00000001UL

#define	_RAC_AUXADCTRIM_AUXADCTRIMCURRINPUTBUF_Typ_minus_40pct 0x00000000UL

#define	_RAC_AUXADCTRIM_AUXADCTRIMCURRINPUTBUF_Typ_plus_20pct 0x00000003UL

#define	_RAC_AUXADCTRIM_AUXADCTRIMCURROPA1_DEFAULT 0x00000002UL

#define	_RAC_AUXADCTRIM_AUXADCTRIMCURROPA1_MASK 0x6000UL

#define	_RAC_AUXADCTRIM_AUXADCTRIMCURROPA1_SHIFT 13

#define	_RAC_AUXADCTRIM_AUXADCTRIMCURROPA1_Typ 0x00000002UL

#define	_RAC_AUXADCTRIM_AUXADCTRIMCURROPA1_Typ_minus_20pct 0x00000001UL

#define	_RAC_AUXADCTRIM_AUXADCTRIMCURROPA1_Typ_minus_40pct 0x00000000UL

#define	_RAC_AUXADCTRIM_AUXADCTRIMCURROPA1_Typ_plus_20pct 0x00000003UL

#define	_RAC_AUXADCTRIM_AUXADCTRIMCURROPA2_DEFAULT 0x00000002UL

#define	_RAC_AUXADCTRIM_AUXADCTRIMCURROPA2_MASK 0x18000UL

#define	_RAC_AUXADCTRIM_AUXADCTRIMCURROPA2_SHIFT 15

#define	_RAC_AUXADCTRIM_AUXADCTRIMCURROPA2_Typ 0x00000002UL

#define	_RAC_AUXADCTRIM_AUXADCTRIMCURROPA2_Typ_minus_20pct 0x00000001UL

#define	_RAC_AUXADCTRIM_AUXADCTRIMCURROPA2_Typ_minus_40pct 0x00000000UL

#define	_RAC_AUXADCTRIM_AUXADCTRIMCURROPA2_Typ_plus_20pct 0x00000003UL

#define	_RAC_AUXADCTRIM_AUXADCTRIMCURRREFBUF_DEFAULT 0x00000002UL

#define	_RAC_AUXADCTRIM_AUXADCTRIMCURRREFBUF_MASK 0x60000UL

#define	_RAC_AUXADCTRIM_AUXADCTRIMCURRREFBUF_SHIFT 17

#define	_RAC_AUXADCTRIM_AUXADCTRIMCURRREFBUF_Typ 0x00000002UL

#define	_RAC_AUXADCTRIM_AUXADCTRIMCURRREFBUF_Typ_minus_20pct 0x00000001UL

#define	_RAC_AUXADCTRIM_AUXADCTRIMCURRREFBUF_Typ_minus_40pct 0x00000000UL

#define	_RAC_AUXADCTRIM_AUXADCTRIMCURRREFBUF_Typ_plus_20pct 0x00000003UL

#define	_RAC_AUXADCTRIM_AUXADCTRIMCURRTSENSE_DEFAULT 0x00000002UL

#define	_RAC_AUXADCTRIM_AUXADCTRIMCURRTSENSE_MASK 0x180000UL

#define	_RAC_AUXADCTRIM_AUXADCTRIMCURRTSENSE_SHIFT 19

#define	_RAC_AUXADCTRIM_AUXADCTRIMCURRTSENSE_Typ 0x00000002UL

#define	_RAC_AUXADCTRIM_AUXADCTRIMCURRTSENSE_Typ_minus_20pct 0x00000001UL

#define	_RAC_AUXADCTRIM_AUXADCTRIMCURRTSENSE_Typ_minus_40pct 0x00000000UL

#define	_RAC_AUXADCTRIM_AUXADCTRIMCURRTSENSE_Typ_plus_20pct 0x00000003UL

#define	_RAC_AUXADCTRIM_AUXADCTRIMCURRVCMBUF_DEFAULT 0x00000002UL

#define	_RAC_AUXADCTRIM_AUXADCTRIMCURRVCMBUF_MASK 0x600000UL

#define	_RAC_AUXADCTRIM_AUXADCTRIMCURRVCMBUF_SHIFT 21

#define	_RAC_AUXADCTRIM_AUXADCTRIMCURRVCMBUF_Typ 0x00000002UL

#define	_RAC_AUXADCTRIM_AUXADCTRIMCURRVCMBUF_Typ_minus_20pct 0x00000001UL

#define	_RAC_AUXADCTRIM_AUXADCTRIMCURRVCMBUF_Typ_minus_40pct 0x00000000UL

#define	_RAC_AUXADCTRIM_AUXADCTRIMCURRVCMBUF_Typ_plus_20pct 0x00000003UL

#define	_RAC_AUXADCTRIM_AUXADCTRIMLDOHIGHCURRENT_DEFAULT 0x00000001UL

#define	_RAC_AUXADCTRIM_AUXADCTRIMLDOHIGHCURRENT_HighCurrentMode 0x00000001UL

#define	_RAC_AUXADCTRIM_AUXADCTRIMLDOHIGHCURRENT_LowCurrentMode 0x00000000UL

#define	_RAC_AUXADCTRIM_AUXADCTRIMLDOHIGHCURRENT_MASK 0x800000UL

#define	_RAC_AUXADCTRIM_AUXADCTRIMLDOHIGHCURRENT_SHIFT 23

#define	_RAC_AUXADCTRIM_AUXADCTRIMREFP_DEFAULT 0x00000002UL

#define	_RAC_AUXADCTRIM_AUXADCTRIMREFP_MASK 0x3000000UL

#define	_RAC_AUXADCTRIM_AUXADCTRIMREFP_REF1p05 0x00000000UL

#define	_RAC_AUXADCTRIM_AUXADCTRIMREFP_REF1p16 0x00000001UL

#define	_RAC_AUXADCTRIM_AUXADCTRIMREFP_REF1p2 0x00000002UL

#define	_RAC_AUXADCTRIM_AUXADCTRIMREFP_REF1p25 0x00000003UL

#define	_RAC_AUXADCTRIM_AUXADCTRIMREFP_SHIFT 24

#define	_RAC_AUXADCTRIM_AUXADCTRIMVREFVCM_DEFAULT 0x00000001UL

#define	_RAC_AUXADCTRIM_AUXADCTRIMVREFVCM_MASK 0xC000000UL

#define	_RAC_AUXADCTRIM_AUXADCTRIMVREFVCM_SHIFT 26

#define	_RAC_AUXADCTRIM_AUXADCTRIMVREFVCM_Trim0p6 0x00000000UL

#define	_RAC_AUXADCTRIM_AUXADCTRIMVREFVCM_Trim0p65 0x00000001UL

#define	_RAC_AUXADCTRIM_AUXADCTRIMVREFVCM_Trim0p7 0x00000002UL

#define	_RAC_AUXADCTRIM_AUXADCTRIMVREFVCM_Trim0p75 0x00000003UL

#define	_RAC_AUXADCTRIM_AUXADCTSENSETRIMVBE2_DEFAULT 0x00000000UL

#define	_RAC_AUXADCTRIM_AUXADCTSENSETRIMVBE2_MASK 0x10000000UL

#define	_RAC_AUXADCTRIM_AUXADCTSENSETRIMVBE2_SHIFT 28

#define	_RAC_AUXADCTRIM_AUXADCTSENSETRIMVBE2_VBE_16uA 0x00000000UL

#define	_RAC_AUXADCTRIM_AUXADCTSENSETRIMVBE2_VBE_32uA 0x00000001UL

#define	_RAC_AUXADCTRIM_MASK 0x1FFFFFFFUL

#define	_RAC_AUXADCTRIM_RESETVALUE 0x06D55502UL

#define	_RAC_BREAKPOINT_BKPADDR_DEFAULT 0x00000000UL

#define	_RAC_BREAKPOINT_BKPADDR_MASK 0xFFFFFFFFUL

#define	_RAC_BREAKPOINT_BKPADDR_SHIFT 0

#define	_RAC_BREAKPOINT_MASK 0xFFFFFFFFUL

#define	_RAC_BREAKPOINT_RESETVALUE 0x00000000UL

#define	_RAC_CLKMULTCTRL_CLKMULTDIVN_DEFAULT 0x00000040UL

#define	_RAC_CLKMULTCTRL_CLKMULTDIVN_MASK 0x7FUL

#define	_RAC_CLKMULTCTRL_CLKMULTDIVN_SHIFT 0

#define	_RAC_CLKMULTCTRL_CLKMULTDIVR_DEFAULT 0x00000001UL

#define	_RAC_CLKMULTCTRL_CLKMULTDIVR_MASK 0x380UL

#define	_RAC_CLKMULTCTRL_CLKMULTDIVR_SHIFT 7

#define	_RAC_CLKMULTCTRL_CLKMULTDIVX_DEFAULT 0x00000000UL

#define	_RAC_CLKMULTCTRL_CLKMULTDIVX_div10 0x00000005UL

#define	_RAC_CLKMULTCTRL_CLKMULTDIVX_div12 0x00000006UL

#define	_RAC_CLKMULTCTRL_CLKMULTDIVX_div14 0x00000007UL

#define	_RAC_CLKMULTCTRL_CLKMULTDIVX_div_1 0x00000000UL

#define	_RAC_CLKMULTCTRL_CLKMULTDIVX_div_2 0x00000001UL

#define	_RAC_CLKMULTCTRL_CLKMULTDIVX_div_4 0x00000002UL

#define	_RAC_CLKMULTCTRL_CLKMULTDIVX_div_6 0x00000003UL

#define	_RAC_CLKMULTCTRL_CLKMULTDIVX_div_8 0x00000004UL

#define	_RAC_CLKMULTCTRL_CLKMULTDIVX_MASK 0x1C00UL

#define	_RAC_CLKMULTCTRL_CLKMULTDIVX_SHIFT 10

#define	_RAC_CLKMULTCTRL_CLKMULTENRESYNC_DEFAULT 0x00000000UL

#define	_RAC_CLKMULTCTRL_CLKMULTENRESYNC_disable_sync 0x00000000UL

#define	_RAC_CLKMULTCTRL_CLKMULTENRESYNC_enable_sync 0x00000001UL

#define	_RAC_CLKMULTCTRL_CLKMULTENRESYNC_MASK 0x2000UL

#define	_RAC_CLKMULTCTRL_CLKMULTENRESYNC_SHIFT 13

#define	_RAC_CLKMULTCTRL_CLKMULTVALID_DEFAULT 0x00000000UL

#define	_RAC_CLKMULTCTRL_CLKMULTVALID_invalid 0x00000000UL

#define	_RAC_CLKMULTCTRL_CLKMULTVALID_MASK 0x4000UL

#define	_RAC_CLKMULTCTRL_CLKMULTVALID_SHIFT 14

#define	_RAC_CLKMULTCTRL_CLKMULTVALID_valid 0x00000001UL

#define	_RAC_CLKMULTCTRL_MASK 0x00007FFFUL

#define	_RAC_CLKMULTCTRL_RESETVALUE 0x000000C0UL

#define	_RAC_CLKMULTEN0_CLKMULTBWCAL_bw_1lsb 0x00000000UL

#define	_RAC_CLKMULTEN0_CLKMULTBWCAL_bw_2lsb 0x00000001UL

#define	_RAC_CLKMULTEN0_CLKMULTBWCAL_bw_3lsb 0x00000002UL

#define	_RAC_CLKMULTEN0_CLKMULTBWCAL_bw_4lsb 0x00000003UL

#define	_RAC_CLKMULTEN0_CLKMULTBWCAL_DEFAULT 0x00000001UL

#define	_RAC_CLKMULTEN0_CLKMULTBWCAL_MASK 0x3UL

#define	_RAC_CLKMULTEN0_CLKMULTBWCAL_SHIFT 0

#define	_RAC_CLKMULTEN0_CLKMULTDISICO_DEFAULT 0x00000001UL

#define	_RAC_CLKMULTEN0_CLKMULTDISICO_disable 0x00000001UL

#define	_RAC_CLKMULTEN0_CLKMULTDISICO_enable 0x00000000UL

#define	_RAC_CLKMULTEN0_CLKMULTDISICO_MASK 0x4UL

#define	_RAC_CLKMULTEN0_CLKMULTDISICO_SHIFT 2

#define	_RAC_CLKMULTEN0_CLKMULTENBBDET_DEFAULT 0x00000000UL

#define	_RAC_CLKMULTEN0_CLKMULTENBBDET_disable 0x00000000UL

#define	_RAC_CLKMULTEN0_CLKMULTENBBDET_enable 0x00000001UL

#define	_RAC_CLKMULTEN0_CLKMULTENBBDET_MASK 0x8UL

#define	_RAC_CLKMULTEN0_CLKMULTENBBDET_SHIFT 3

#define	_RAC_CLKMULTEN0_CLKMULTENBBXLDET_DEFAULT 0x00000000UL

#define	_RAC_CLKMULTEN0_CLKMULTENBBXLDET_disable 0x00000000UL

#define	_RAC_CLKMULTEN0_CLKMULTENBBXLDET_enable 0x00000001UL

#define	_RAC_CLKMULTEN0_CLKMULTENBBXLDET_MASK 0x10UL

#define	_RAC_CLKMULTEN0_CLKMULTENBBXLDET_SHIFT 4

#define	_RAC_CLKMULTEN0_CLKMULTENBBXMDET_DEFAULT 0x00000000UL

#define	_RAC_CLKMULTEN0_CLKMULTENBBXMDET_disable 0x00000000UL

#define	_RAC_CLKMULTEN0_CLKMULTENBBXMDET_enable 0x00000001UL

#define	_RAC_CLKMULTEN0_CLKMULTENBBXMDET_MASK 0x20UL

#define	_RAC_CLKMULTEN0_CLKMULTENBBXMDET_SHIFT 5

#define	_RAC_CLKMULTEN0_CLKMULTENCFDET_DEFAULT 0x00000000UL

#define	_RAC_CLKMULTEN0_CLKMULTENCFDET_disable 0x00000000UL

#define	_RAC_CLKMULTEN0_CLKMULTENCFDET_enable 0x00000001UL

#define	_RAC_CLKMULTEN0_CLKMULTENCFDET_MASK 0x40UL

#define	_RAC_CLKMULTEN0_CLKMULTENCFDET_SHIFT 6

#define	_RAC_CLKMULTEN0_CLKMULTENDITHER_DEFAULT 0x00000000UL

#define	_RAC_CLKMULTEN0_CLKMULTENDITHER_disable 0x00000000UL

#define	_RAC_CLKMULTEN0_CLKMULTENDITHER_enable 0x00000001UL

#define	_RAC_CLKMULTEN0_CLKMULTENDITHER_MASK 0x80UL

#define	_RAC_CLKMULTEN0_CLKMULTENDITHER_SHIFT 7

#define	_RAC_CLKMULTEN0_CLKMULTENDRVADC_DEFAULT 0x00000000UL

#define	_RAC_CLKMULTEN0_CLKMULTENDRVADC_disable 0x00000000UL

#define	_RAC_CLKMULTEN0_CLKMULTENDRVADC_enable 0x00000001UL

#define	_RAC_CLKMULTEN0_CLKMULTENDRVADC_MASK 0x100UL

#define	_RAC_CLKMULTEN0_CLKMULTENDRVADC_SHIFT 8

#define	_RAC_CLKMULTEN0_CLKMULTENDRVDIFF_DEFAULT 0x00000000UL

#define	_RAC_CLKMULTEN0_CLKMULTENDRVDIFF_Differential 0x00000001UL

#define	_RAC_CLKMULTEN0_CLKMULTENDRVDIFF_MASK 0x200UL

#define	_RAC_CLKMULTEN0_CLKMULTENDRVDIFF_SHIFT 9

#define	_RAC_CLKMULTEN0_CLKMULTENDRVDIFF_Single_ended 0x00000000UL

#define	_RAC_CLKMULTEN0_CLKMULTENDRVRX2P4G_DEFAULT 0x00000000UL

#define	_RAC_CLKMULTEN0_CLKMULTENDRVRX2P4G_disable 0x00000000UL

#define	_RAC_CLKMULTEN0_CLKMULTENDRVRX2P4G_enable 0x00000001UL

#define	_RAC_CLKMULTEN0_CLKMULTENDRVRX2P4G_MASK 0x400UL

#define	_RAC_CLKMULTEN0_CLKMULTENDRVRX2P4G_SHIFT 10

#define	_RAC_CLKMULTEN0_CLKMULTENFBDIV_DEFAULT 0x00000000UL

#define	_RAC_CLKMULTEN0_CLKMULTENFBDIV_disable 0x00000000UL

#define	_RAC_CLKMULTEN0_CLKMULTENFBDIV_enable 0x00000001UL

#define	_RAC_CLKMULTEN0_CLKMULTENFBDIV_MASK 0x2000UL

#define	_RAC_CLKMULTEN0_CLKMULTENFBDIV_SHIFT 13

#define	_RAC_CLKMULTEN0_CLKMULTENREFDIV_DEFAULT 0x00000000UL

#define	_RAC_CLKMULTEN0_CLKMULTENREFDIV_disable 0x00000000UL

#define	_RAC_CLKMULTEN0_CLKMULTENREFDIV_enable 0x00000001UL

#define	_RAC_CLKMULTEN0_CLKMULTENREFDIV_MASK 0x4000UL

#define	_RAC_CLKMULTEN0_CLKMULTENREFDIV_SHIFT 14

#define	_RAC_CLKMULTEN0_CLKMULTENREG1_DEFAULT 0x00000000UL

#define	_RAC_CLKMULTEN0_CLKMULTENREG1_disable 0x00000000UL

#define	_RAC_CLKMULTEN0_CLKMULTENREG1_enable 0x00000001UL

#define	_RAC_CLKMULTEN0_CLKMULTENREG1_MASK 0x8000UL

#define	_RAC_CLKMULTEN0_CLKMULTENREG1_SHIFT 15

#define	_RAC_CLKMULTEN0_CLKMULTENREG2_DEFAULT 0x00000000UL

#define	_RAC_CLKMULTEN0_CLKMULTENREG2_disable 0x00000000UL

#define	_RAC_CLKMULTEN0_CLKMULTENREG2_enable 0x00000001UL

#define	_RAC_CLKMULTEN0_CLKMULTENREG2_MASK 0x10000UL

#define	_RAC_CLKMULTEN0_CLKMULTENREG2_SHIFT 16

#define	_RAC_CLKMULTEN0_CLKMULTENROTDET_DEFAULT 0x00000000UL

#define	_RAC_CLKMULTEN0_CLKMULTENROTDET_disable 0x00000000UL

#define	_RAC_CLKMULTEN0_CLKMULTENROTDET_enable 0x00000001UL

#define	_RAC_CLKMULTEN0_CLKMULTENROTDET_MASK 0x20000UL

#define	_RAC_CLKMULTEN0_CLKMULTENROTDET_SHIFT 17

#define	_RAC_CLKMULTEN0_CLKMULTFREQCAL_DEFAULT 0x00000001UL

#define	_RAC_CLKMULTEN0_CLKMULTFREQCAL_MASK 0xC0000UL

#define	_RAC_CLKMULTEN0_CLKMULTFREQCAL_pedes_14uA 0x00000000UL

#define	_RAC_CLKMULTEN0_CLKMULTFREQCAL_pedes_22uA 0x00000001UL

#define	_RAC_CLKMULTEN0_CLKMULTFREQCAL_pedes_30uA 0x00000002UL

#define	_RAC_CLKMULTEN0_CLKMULTFREQCAL_pedes_38uA 0x00000003UL

#define	_RAC_CLKMULTEN0_CLKMULTFREQCAL_SHIFT 18

#define	_RAC_CLKMULTEN0_CLKMULTREG1ADJV_DEFAULT 0x00000002UL

#define	_RAC_CLKMULTEN0_CLKMULTREG1ADJV_MASK 0x300000UL

#define	_RAC_CLKMULTEN0_CLKMULTREG1ADJV_SHIFT 20

#define	_RAC_CLKMULTEN0_CLKMULTREG1ADJV_v1p28 0x00000000UL

#define	_RAC_CLKMULTEN0_CLKMULTREG1ADJV_v1p32 0x00000001UL

#define	_RAC_CLKMULTEN0_CLKMULTREG1ADJV_v1p33 0x00000002UL

#define	_RAC_CLKMULTEN0_CLKMULTREG1ADJV_v1p38 0x00000003UL

#define	_RAC_CLKMULTEN0_CLKMULTREG2ADJI_DEFAULT 0x00000002UL

#define	_RAC_CLKMULTEN0_CLKMULTREG2ADJI_I_1040uA 0x00000003UL

#define	_RAC_CLKMULTEN0_CLKMULTREG2ADJI_I_200uA 0x00000000UL

#define	_RAC_CLKMULTEN0_CLKMULTREG2ADJI_I_480uA 0x00000001UL

#define	_RAC_CLKMULTEN0_CLKMULTREG2ADJI_I_760uA 0x00000002UL

#define	_RAC_CLKMULTEN0_CLKMULTREG2ADJI_MASK 0xC00000UL

#define	_RAC_CLKMULTEN0_CLKMULTREG2ADJI_SHIFT 22

#define	_RAC_CLKMULTEN0_CLKMULTREG2ADJV_DEFAULT 0x00000002UL

#define	_RAC_CLKMULTEN0_CLKMULTREG2ADJV_MASK 0x3000000UL

#define	_RAC_CLKMULTEN0_CLKMULTREG2ADJV_SHIFT 24

#define	_RAC_CLKMULTEN0_CLKMULTREG2ADJV_v1p03 0x00000000UL

#define	_RAC_CLKMULTEN0_CLKMULTREG2ADJV_v1p09 0x00000001UL

#define	_RAC_CLKMULTEN0_CLKMULTREG2ADJV_v1p10 0x00000002UL

#define	_RAC_CLKMULTEN0_CLKMULTREG2ADJV_v1p16 0x00000003UL

#define	_RAC_CLKMULTEN0_MASK 0x03FFFFFFUL

#define	_RAC_CLKMULTEN0_RESETVALUE 0x02A40005UL

#define	_RAC_CLKMULTEN1_CLKMULTINNIBBLE_DEFAULT 0x00000008UL

#define	_RAC_CLKMULTEN1_CLKMULTINNIBBLE_MASK 0xFUL

#define	_RAC_CLKMULTEN1_CLKMULTINNIBBLE_SHIFT 0

#define	_RAC_CLKMULTEN1_CLKMULTLDCNIB_DEFAULT 0x00000000UL

#define	_RAC_CLKMULTEN1_CLKMULTLDCNIB_disable 0x00000000UL

#define	_RAC_CLKMULTEN1_CLKMULTLDCNIB_enable 0x00000001UL

#define	_RAC_CLKMULTEN1_CLKMULTLDCNIB_MASK 0x10UL

#define	_RAC_CLKMULTEN1_CLKMULTLDCNIB_SHIFT 4

#define	_RAC_CLKMULTEN1_CLKMULTLDFNIB_DEFAULT 0x00000000UL

#define	_RAC_CLKMULTEN1_CLKMULTLDFNIB_disable 0x00000000UL

#define	_RAC_CLKMULTEN1_CLKMULTLDFNIB_enable 0x00000001UL

#define	_RAC_CLKMULTEN1_CLKMULTLDFNIB_MASK 0x20UL

#define	_RAC_CLKMULTEN1_CLKMULTLDFNIB_SHIFT 5

#define	_RAC_CLKMULTEN1_CLKMULTLDMNIB_DEFAULT 0x00000000UL

#define	_RAC_CLKMULTEN1_CLKMULTLDMNIB_disable 0x00000000UL

#define	_RAC_CLKMULTEN1_CLKMULTLDMNIB_enable 0x00000001UL

#define	_RAC_CLKMULTEN1_CLKMULTLDMNIB_MASK 0x40UL

#define	_RAC_CLKMULTEN1_CLKMULTLDMNIB_SHIFT 6

#define	_RAC_CLKMULTEN1_CLKMULTRDNIBBLE_coarse_nibble 0x00000003UL

#define	_RAC_CLKMULTEN1_CLKMULTRDNIBBLE_DEFAULT 0x00000003UL

#define	_RAC_CLKMULTEN1_CLKMULTRDNIBBLE_fine_nibble 0x00000001UL

#define	_RAC_CLKMULTEN1_CLKMULTRDNIBBLE_MASK 0x180UL

#define	_RAC_CLKMULTEN1_CLKMULTRDNIBBLE_moderate_nibble 0x00000002UL

#define	_RAC_CLKMULTEN1_CLKMULTRDNIBBLE_quarter_nibble 0x00000000UL

#define	_RAC_CLKMULTEN1_CLKMULTRDNIBBLE_SHIFT 7

#define	_RAC_CLKMULTEN1_MASK 0x000001FFUL

#define	_RAC_CLKMULTEN1_RESETVALUE 0x00000188UL

#define	_RAC_CLKMULTSTATUS_CLKMULTACKVALID_DEFAULT 0x00000000UL

#define	_RAC_CLKMULTSTATUS_CLKMULTACKVALID_invalid 0x00000000UL

#define	_RAC_CLKMULTSTATUS_CLKMULTACKVALID_MASK 0x10UL

#define	_RAC_CLKMULTSTATUS_CLKMULTACKVALID_SHIFT 4

#define	_RAC_CLKMULTSTATUS_CLKMULTACKVALID_valid 0x00000001UL

#define	_RAC_CLKMULTSTATUS_CLKMULTOUTNIBBLE_DEFAULT 0x00000000UL

#define	_RAC_CLKMULTSTATUS_CLKMULTOUTNIBBLE_MASK 0xFUL

#define	_RAC_CLKMULTSTATUS_CLKMULTOUTNIBBLE_SHIFT 0

#define	_RAC_CLKMULTSTATUS_MASK 0x0000001FUL

#define	_RAC_CLKMULTSTATUS_RESETVALUE 0x00000000UL

#define	_RAC_CMD_CLEARRXOVERFLOW_DEFAULT 0x00000000UL

#define	_RAC_CMD_CLEARRXOVERFLOW_MASK 0x40UL

#define	_RAC_CMD_CLEARRXOVERFLOW_SHIFT 6

#define	_RAC_CMD_CLEARTXEN_DEFAULT 0x00000000UL

#define	_RAC_CMD_CLEARTXEN_MASK 0x8UL

#define	_RAC_CMD_CLEARTXEN_SHIFT 3

#define	_RAC_CMD_FORCETX_DEFAULT 0x00000000UL

#define	_RAC_CMD_FORCETX_MASK 0x2UL

#define	_RAC_CMD_FORCETX_SHIFT 1

#define	_RAC_CMD_LNAENCLEAR_DEFAULT 0x00000000UL

#define	_RAC_CMD_LNAENCLEAR_MASK 0x8000UL

#define	_RAC_CMD_LNAENCLEAR_SHIFT 15

#define	_RAC_CMD_LNAENSET_DEFAULT 0x00000000UL

#define	_RAC_CMD_LNAENSET_MASK 0x4000UL

#define	_RAC_CMD_LNAENSET_SHIFT 14

#define	_RAC_CMD_MASK 0xC000F1FFUL

#define	_RAC_CMD_PAENCLEAR_DEFAULT 0x00000000UL

#define	_RAC_CMD_PAENCLEAR_MASK 0x2000UL

#define	_RAC_CMD_PAENCLEAR_SHIFT 13

#define	_RAC_CMD_PAENSET_DEFAULT 0x00000000UL

#define	_RAC_CMD_PAENSET_MASK 0x1000UL

#define	_RAC_CMD_PAENSET_SHIFT 12

#define	_RAC_CMD_RESETVALUE 0x00000000UL

#define	_RAC_CMD_RXCAL_DEFAULT 0x00000000UL

#define	_RAC_CMD_RXCAL_MASK 0x80UL

#define	_RAC_CMD_RXCAL_SHIFT 7

#define	_RAC_CMD_RXDIS_DEFAULT 0x00000000UL

#define	_RAC_CMD_RXDIS_MASK 0x100UL

#define	_RAC_CMD_RXDIS_SHIFT 8

#define	_RAC_CMD_TXAFTERFRAME_DEFAULT 0x00000000UL

#define	_RAC_CMD_TXAFTERFRAME_MASK 0x10UL

#define	_RAC_CMD_TXAFTERFRAME_SHIFT 4

#define	_RAC_CMD_TXDIS_DEFAULT 0x00000000UL

#define	_RAC_CMD_TXDIS_MASK 0x20UL

#define	_RAC_CMD_TXDIS_SHIFT 5

#define	_RAC_CMD_TXEN_DEFAULT 0x00000000UL

#define	_RAC_CMD_TXEN_MASK 0x1UL

#define	_RAC_CMD_TXEN_SHIFT 0

#define	_RAC_CMD_TXONCCA_DEFAULT 0x00000000UL

#define	_RAC_CMD_TXONCCA_MASK 0x4UL

#define	_RAC_CMD_TXONCCA_SHIFT 2

#define	_RAC_CTRL_ACTIVEPOL_DEFAULT 0x00000000UL

#define	_RAC_CTRL_ACTIVEPOL_MASK 0x80UL

#define	_RAC_CTRL_ACTIVEPOL_SHIFT 7

#define	_RAC_CTRL_ACTIVEPOL_X0 0x00000000UL

#define	_RAC_CTRL_ACTIVEPOL_X1 0x00000001UL

#define	_RAC_CTRL_FORCEDISABLE_DEFAULT 0x00000000UL

#define	_RAC_CTRL_FORCEDISABLE_MASK 0x1UL

#define	_RAC_CTRL_FORCEDISABLE_SHIFT 0

#define	_RAC_CTRL_LNAENPOL_DEFAULT 0x00000000UL

#define	_RAC_CTRL_LNAENPOL_MASK 0x200UL

#define	_RAC_CTRL_LNAENPOL_SHIFT 9

#define	_RAC_CTRL_LNAENPOL_X0 0x00000000UL

#define	_RAC_CTRL_LNAENPOL_X1 0x00000001UL

#define	_RAC_CTRL_MASK 0x000107EFUL

#define	_RAC_CTRL_PAENPOL_DEFAULT 0x00000000UL

#define	_RAC_CTRL_PAENPOL_MASK 0x100UL

#define	_RAC_CTRL_PAENPOL_SHIFT 8

#define	_RAC_CTRL_PAENPOL_X0 0x00000000UL

#define	_RAC_CTRL_PAENPOL_X1 0x00000001UL

#define	_RAC_CTRL_PRSCLR_DEFAULT 0x00000000UL

#define	_RAC_CTRL_PRSCLR_MASK 0x20UL

#define	_RAC_CTRL_PRSCLR_PRSCH 0x00000001UL

#define	_RAC_CTRL_PRSCLR_RXSEARCH 0x00000000UL

#define	_RAC_CTRL_PRSCLR_SHIFT 5

#define	_RAC_CTRL_PRSFORCETX_DEFAULT 0x00000000UL

#define	_RAC_CTRL_PRSFORCETX_MASK 0x10000UL

#define	_RAC_CTRL_PRSFORCETX_SHIFT 16

#define	_RAC_CTRL_PRSFORCETX_X0 0x00000000UL

#define	_RAC_CTRL_PRSFORCETX_X1 0x00000001UL

#define	_RAC_CTRL_PRSMODE_DEFAULT 0x00000000UL

#define	_RAC_CTRL_PRSMODE_DIRECT 0x00000000UL

#define	_RAC_CTRL_PRSMODE_MASK 0x8UL

#define	_RAC_CTRL_PRSMODE_PULSE 0x00000001UL

#define	_RAC_CTRL_PRSMODE_SHIFT 3

#define	_RAC_CTRL_PRSRXDIS_DEFAULT 0x00000000UL

#define	_RAC_CTRL_PRSRXDIS_MASK 0x400UL

#define	_RAC_CTRL_PRSRXDIS_SHIFT 10

#define	_RAC_CTRL_PRSRXDIS_X0 0x00000000UL

#define	_RAC_CTRL_PRSRXDIS_X1 0x00000001UL

#define	_RAC_CTRL_PRSTXEN_DEFAULT 0x00000000UL

#define	_RAC_CTRL_PRSTXEN_MASK 0x2UL

#define	_RAC_CTRL_PRSTXEN_SHIFT 1

#define	_RAC_CTRL_RESETVALUE 0x00000000UL

#define	_RAC_CTRL_TXAFTERRX_DEFAULT 0x00000000UL

#define	_RAC_CTRL_TXAFTERRX_MASK 0x4UL

#define	_RAC_CTRL_TXAFTERRX_SHIFT 2

#define	_RAC_CTRL_TXAFTERRX_X0 0x00000000UL

#define	_RAC_CTRL_TXAFTERRX_X1 0x00000001UL

#define	_RAC_CTRL_TXPOSTPONE_DEFAULT 0x00000000UL

#define	_RAC_CTRL_TXPOSTPONE_MASK 0x40UL

#define	_RAC_CTRL_TXPOSTPONE_SHIFT 6

#define	_RAC_CTRL_TXPOSTPONE_X0 0x00000000UL

#define	_RAC_CTRL_TXPOSTPONE_X1 0x00000001UL

#define	_RAC_DIGCLKRETIMECTRL_DIGCLKRETIMEDISRETIME_DEFAULT 0x00000000UL

#define	_RAC_DIGCLKRETIMECTRL_DIGCLKRETIMEDISRETIME_disable_retime 0x00000001UL

#define	_RAC_DIGCLKRETIMECTRL_DIGCLKRETIMEDISRETIME_enable_retime 0x00000000UL

#define	_RAC_DIGCLKRETIMECTRL_DIGCLKRETIMEDISRETIME_MASK 0x2UL

#define	_RAC_DIGCLKRETIMECTRL_DIGCLKRETIMEDISRETIME_SHIFT 1

#define	_RAC_DIGCLKRETIMECTRL_DIGCLKRETIMEENRETIME_DEFAULT 0x00000000UL

#define	_RAC_DIGCLKRETIMECTRL_DIGCLKRETIMEENRETIME_disable 0x00000000UL

#define	_RAC_DIGCLKRETIMECTRL_DIGCLKRETIMEENRETIME_enable 0x00000001UL

#define	_RAC_DIGCLKRETIMECTRL_DIGCLKRETIMEENRETIME_MASK 0x1UL

#define	_RAC_DIGCLKRETIMECTRL_DIGCLKRETIMEENRETIME_SHIFT 0

#define	_RAC_DIGCLKRETIMECTRL_DIGCLKRETIMELIMITH_DEFAULT 0x00000000UL

#define	_RAC_DIGCLKRETIMECTRL_DIGCLKRETIMELIMITH_MASK 0x70UL

#define	_RAC_DIGCLKRETIMECTRL_DIGCLKRETIMELIMITH_SHIFT 4

#define	_RAC_DIGCLKRETIMECTRL_DIGCLKRETIMELIMITL_DEFAULT 0x00000000UL

#define	_RAC_DIGCLKRETIMECTRL_DIGCLKRETIMELIMITL_MASK 0x700UL

#define	_RAC_DIGCLKRETIMECTRL_DIGCLKRETIMELIMITL_SHIFT 8

#define	_RAC_DIGCLKRETIMECTRL_DIGCLKRETIMERESETN_DEFAULT 0x00000000UL

#define	_RAC_DIGCLKRETIMECTRL_DIGCLKRETIMERESETN_MASK 0x4UL

#define	_RAC_DIGCLKRETIMECTRL_DIGCLKRETIMERESETN_operate 0x00000000UL

#define	_RAC_DIGCLKRETIMECTRL_DIGCLKRETIMERESETN_reset 0x00000001UL

#define	_RAC_DIGCLKRETIMECTRL_DIGCLKRETIMERESETN_SHIFT 2

#define	_RAC_DIGCLKRETIMECTRL_MASK 0x00000777UL

#define	_RAC_DIGCLKRETIMECTRL_RESETVALUE 0x00000000UL

#define	_RAC_DIGCLKRETIMESTATUS_DIGCLKRETIMECLKSEL_DEFAULT 0x00000000UL

#define	_RAC_DIGCLKRETIMESTATUS_DIGCLKRETIMECLKSEL_MASK 0x1UL

#define	_RAC_DIGCLKRETIMESTATUS_DIGCLKRETIMECLKSEL_SHIFT 0

#define	_RAC_DIGCLKRETIMESTATUS_DIGCLKRETIMECLKSEL_use_raw_clk 0x00000000UL

#define	_RAC_DIGCLKRETIMESTATUS_DIGCLKRETIMECLKSEL_use_retimed_clk 0x00000001UL

#define	_RAC_DIGCLKRETIMESTATUS_DIGCLKRETIMERESETNLO_DEFAULT 0x00000000UL

#define	_RAC_DIGCLKRETIMESTATUS_DIGCLKRETIMERESETNLO_hi 0x00000001UL

#define	_RAC_DIGCLKRETIMESTATUS_DIGCLKRETIMERESETNLO_lo 0x00000000UL

#define	_RAC_DIGCLKRETIMESTATUS_DIGCLKRETIMERESETNLO_MASK 0x2UL

#define	_RAC_DIGCLKRETIMESTATUS_DIGCLKRETIMERESETNLO_SHIFT 1

#define	_RAC_DIGCLKRETIMESTATUS_MASK 0x00000003UL

#define	_RAC_DIGCLKRETIMESTATUS_RESETVALUE 0x00000000UL

#define	_RAC_EN_EN_DEFAULT 0x00000000UL

#define	_RAC_EN_EN_MASK 0x1UL

#define	_RAC_EN_EN_SHIFT 0

#define	_RAC_EN_MASK 0x00000001UL

#define	_RAC_EN_RESETVALUE 0x00000000UL

#define	_RAC_FORCESTATE_FORCESTATE_DEFAULT 0x00000000UL

#define	_RAC_FORCESTATE_FORCESTATE_MASK 0xFUL

#define	_RAC_FORCESTATE_FORCESTATE_SHIFT 0

#define	_RAC_FORCESTATE_MASK 0x0000000FUL

#define	_RAC_FORCESTATE_RESETVALUE 0x00000000UL

#define	_RAC_IEN_BUSERROR_DEFAULT 0x00000000UL

#define	_RAC_IEN_BUSERROR_MASK 0x4UL

#define	_RAC_IEN_BUSERROR_SHIFT 2

#define	_RAC_IEN_MASK 0x00FF0007UL

#define	_RAC_IEN_RESETVALUE 0x00000000UL

#define	_RAC_IEN_SEQ_DEFAULT 0x00000000UL

#define	_RAC_IEN_SEQ_MASK 0xFF0000UL

#define	_RAC_IEN_SEQ_SHIFT 16

#define	_RAC_IEN_STATECHANGE_DEFAULT 0x00000000UL

#define	_RAC_IEN_STATECHANGE_MASK 0x1UL

#define	_RAC_IEN_STATECHANGE_SHIFT 0

#define	_RAC_IEN_STIMCMPEV_DEFAULT 0x00000000UL

#define	_RAC_IEN_STIMCMPEV_MASK 0x2UL

#define	_RAC_IEN_STIMCMPEV_SHIFT 1

#define	_RAC_IF_BUSERROR_DEFAULT 0x00000000UL

#define	_RAC_IF_BUSERROR_MASK 0x4UL

#define	_RAC_IF_BUSERROR_SHIFT 2

#define	_RAC_IF_MASK 0x00FF0007UL

#define	_RAC_IF_RESETVALUE 0x00000000UL

#define	_RAC_IF_SEQ_DEFAULT 0x00000000UL

#define	_RAC_IF_SEQ_MASK 0xFF0000UL

#define	_RAC_IF_SEQ_SHIFT 16

#define	_RAC_IF_STATECHANGE_DEFAULT 0x00000000UL

#define	_RAC_IF_STATECHANGE_MASK 0x1UL

#define	_RAC_IF_STATECHANGE_SHIFT 0

#define	_RAC_IF_STIMCMPEV_DEFAULT 0x00000000UL

#define	_RAC_IF_STIMCMPEV_MASK 0x2UL

#define	_RAC_IF_STIMCMPEV_SHIFT 1

#define	_RAC_IFADCCAL_IFADCENRCCAL_DEFAULT 0x00000000UL

#define	_RAC_IFADCCAL_IFADCENRCCAL_MASK 0x1UL

#define	_RAC_IFADCCAL_IFADCENRCCAL_rccal_disable 0x00000000UL

#define	_RAC_IFADCCAL_IFADCENRCCAL_rccal_enable 0x00000001UL

#define	_RAC_IFADCCAL_IFADCENRCCAL_SHIFT 0

#define	_RAC_IFADCCAL_IFADCTUNERC_DEFAULT 0x00000010UL

#define	_RAC_IFADCCAL_IFADCTUNERC_MASK 0x1F00UL

#define	_RAC_IFADCCAL_IFADCTUNERC_SHIFT 8

#define	_RAC_IFADCCAL_IFADCTUNERCCALMODE_ADCmode 0x00000001UL

#define	_RAC_IFADCCAL_IFADCTUNERCCALMODE_DEFAULT 0x00000000UL

#define	_RAC_IFADCCAL_IFADCTUNERCCALMODE_MASK 0x2UL

#define	_RAC_IFADCCAL_IFADCTUNERCCALMODE_SHIFT 1

#define	_RAC_IFADCCAL_IFADCTUNERCCALMODE_SYmode 0x00000000UL

#define	_RAC_IFADCCAL_MASK 0x00001F03UL

#define	_RAC_IFADCCAL_RESETVALUE 0x00001000UL

#define	_RAC_IFADCSTATUS_IFADCRCCALOUT_DEFAULT 0x00000000UL

#define	_RAC_IFADCSTATUS_IFADCRCCALOUT_hi 0x00000001UL

#define	_RAC_IFADCSTATUS_IFADCRCCALOUT_lo 0x00000000UL

#define	_RAC_IFADCSTATUS_IFADCRCCALOUT_MASK 0x1UL

#define	_RAC_IFADCSTATUS_IFADCRCCALOUT_SHIFT 0

#define	_RAC_IFADCSTATUS_MASK 0x00000001UL

#define	_RAC_IFADCSTATUS_RESETVALUE 0x00000000UL

#define	_RAC_IFADCTRIM_IFADCCLKSEL_clk_2p4g 0x00000000UL

#define	_RAC_IFADCTRIM_IFADCCLKSEL_clk_subg 0x00000001UL

#define	_RAC_IFADCTRIM_IFADCCLKSEL_DEFAULT 0x00000000UL

#define	_RAC_IFADCTRIM_IFADCCLKSEL_MASK 0x1UL

#define	_RAC_IFADCTRIM_IFADCCLKSEL_SHIFT 0

#define	_RAC_IFADCTRIM_IFADCENHALFMODE_DEFAULT 0x00000000UL

#define	_RAC_IFADCTRIM_IFADCENHALFMODE_full_speed_mode 0x00000000UL

#define	_RAC_IFADCTRIM_IFADCENHALFMODE_half_speed_mode 0x00000001UL

#define	_RAC_IFADCTRIM_IFADCENHALFMODE_MASK 0x2UL

#define	_RAC_IFADCTRIM_IFADCENHALFMODE_SHIFT 1

#define	_RAC_IFADCTRIM_IFADCLDOSERIESAMPLVL_DEFAULT 0x00000004UL

#define	_RAC_IFADCTRIM_IFADCLDOSERIESAMPLVL_MASK 0x1CUL

#define	_RAC_IFADCTRIM_IFADCLDOSERIESAMPLVL_SHIFT 2

#define	_RAC_IFADCTRIM_IFADCLDOSERIESAMPLVL_v1p20 0x00000000UL

#define	_RAC_IFADCTRIM_IFADCLDOSERIESAMPLVL_v1p24 0x00000001UL

#define	_RAC_IFADCTRIM_IFADCLDOSERIESAMPLVL_v1p28 0x00000002UL

#define	_RAC_IFADCTRIM_IFADCLDOSERIESAMPLVL_v1p32 0x00000003UL

#define	_RAC_IFADCTRIM_IFADCLDOSERIESAMPLVL_v1p35 0x00000004UL

#define	_RAC_IFADCTRIM_IFADCLDOSERIESAMPLVL_v1p39 0x00000005UL

#define	_RAC_IFADCTRIM_IFADCLDOSERIESAMPLVL_v1p42 0x00000006UL

#define	_RAC_IFADCTRIM_IFADCLDOSERIESAMPLVL_v1p46 0x00000007UL

#define	_RAC_IFADCTRIM_IFADCLDOSHUNTAMPLVL_DEFAULT 0x00000004UL

#define	_RAC_IFADCTRIM_IFADCLDOSHUNTAMPLVL_MASK 0xE0UL

#define	_RAC_IFADCTRIM_IFADCLDOSHUNTAMPLVL_SHIFT 5

#define	_RAC_IFADCTRIM_IFADCLDOSHUNTAMPLVL_v1p20 0x00000000UL

#define	_RAC_IFADCTRIM_IFADCLDOSHUNTAMPLVL_v1p24 0x00000001UL

#define	_RAC_IFADCTRIM_IFADCLDOSHUNTAMPLVL_v1p28 0x00000002UL

#define	_RAC_IFADCTRIM_IFADCLDOSHUNTAMPLVL_v1p32 0x00000003UL

#define	_RAC_IFADCTRIM_IFADCLDOSHUNTAMPLVL_v1p35 0x00000004UL

#define	_RAC_IFADCTRIM_IFADCLDOSHUNTAMPLVL_v1p39 0x00000005UL

#define	_RAC_IFADCTRIM_IFADCLDOSHUNTAMPLVL_v1p42 0x00000006UL

#define	_RAC_IFADCTRIM_IFADCLDOSHUNTAMPLVL_v1p46 0x00000007UL

#define	_RAC_IFADCTRIM_IFADCLDOSHUNTCURLP_DEFAULT 0x00000000UL

#define	_RAC_IFADCTRIM_IFADCLDOSHUNTCURLP_low_power_disabled 0x00000000UL

#define	_RAC_IFADCTRIM_IFADCLDOSHUNTCURLP_low_power_enabled 0x00000001UL

#define	_RAC_IFADCTRIM_IFADCLDOSHUNTCURLP_MASK 0x100UL

#define	_RAC_IFADCTRIM_IFADCLDOSHUNTCURLP_SHIFT 8

#define	_RAC_IFADCTRIM_IFADCLDOSHUNTCURLVL_current_180uA 0x00000000UL

#define	_RAC_IFADCTRIM_IFADCLDOSHUNTCURLVL_current_190uA 0x00000001UL

#define	_RAC_IFADCTRIM_IFADCLDOSHUNTCURLVL_current_200uA 0x00000002UL

#define	_RAC_IFADCTRIM_IFADCLDOSHUNTCURLVL_current_210uA 0x00000003UL

#define	_RAC_IFADCTRIM_IFADCLDOSHUNTCURLVL_DEFAULT 0x00000001UL

#define	_RAC_IFADCTRIM_IFADCLDOSHUNTCURLVL_MASK 0x600UL

#define	_RAC_IFADCTRIM_IFADCLDOSHUNTCURLVL_SHIFT 9

#define	_RAC_IFADCTRIM_IFADCOTAST1CURRENT_DEFAULT 0x00000002UL

#define	_RAC_IFADCTRIM_IFADCOTAST1CURRENT_MASK 0x1800UL

#define	_RAC_IFADCTRIM_IFADCOTAST1CURRENT_negative_11p 0x00000001UL

#define	_RAC_IFADCTRIM_IFADCOTAST1CURRENT_negative_20p 0x00000000UL

#define	_RAC_IFADCTRIM_IFADCOTAST1CURRENT_nominal 0x00000002UL

#define	_RAC_IFADCTRIM_IFADCOTAST1CURRENT_positive_15p 0x00000003UL

#define	_RAC_IFADCTRIM_IFADCOTAST1CURRENT_SHIFT 11

#define	_RAC_IFADCTRIM_IFADCOTAST2CURRENT_DEFAULT 0x00000002UL

#define	_RAC_IFADCTRIM_IFADCOTAST2CURRENT_MASK 0x6000UL

#define	_RAC_IFADCTRIM_IFADCOTAST2CURRENT_negative_11p 0x00000001UL

#define	_RAC_IFADCTRIM_IFADCOTAST2CURRENT_negative_20p 0x00000000UL

#define	_RAC_IFADCTRIM_IFADCOTAST2CURRENT_nominal 0x00000002UL

#define	_RAC_IFADCTRIM_IFADCOTAST2CURRENT_positive_15p 0x00000003UL

#define	_RAC_IFADCTRIM_IFADCOTAST2CURRENT_SHIFT 13

#define	_RAC_IFADCTRIM_IFADCREFBUFAMPLVL_DEFAULT 0x00000004UL

#define	_RAC_IFADCTRIM_IFADCREFBUFAMPLVL_MASK 0x38000UL

#define	_RAC_IFADCTRIM_IFADCREFBUFAMPLVL_SHIFT 15

#define	_RAC_IFADCTRIM_IFADCREFBUFAMPLVL_v0p88 0x00000000UL

#define	_RAC_IFADCTRIM_IFADCREFBUFAMPLVL_v0p91 0x00000001UL

#define	_RAC_IFADCTRIM_IFADCREFBUFAMPLVL_v0p94 0x00000002UL

#define	_RAC_IFADCTRIM_IFADCREFBUFAMPLVL_v0p97 0x00000003UL

#define	_RAC_IFADCTRIM_IFADCREFBUFAMPLVL_v1p00 0x00000004UL

#define	_RAC_IFADCTRIM_IFADCREFBUFAMPLVL_v1p03 0x00000005UL

#define	_RAC_IFADCTRIM_IFADCREFBUFAMPLVL_v1p06 0x00000006UL

#define	_RAC_IFADCTRIM_IFADCREFBUFAMPLVL_v1p09 0x00000007UL

#define	_RAC_IFADCTRIM_IFADCREFBUFCURLVL_current_65uA 0x00000000UL

#define	_RAC_IFADCTRIM_IFADCREFBUFCURLVL_current_75uA 0x00000001UL

#define	_RAC_IFADCTRIM_IFADCREFBUFCURLVL_current_85uA 0x00000002UL

#define	_RAC_IFADCTRIM_IFADCREFBUFCURLVL_current_95uA 0x00000003UL

#define	_RAC_IFADCTRIM_IFADCREFBUFCURLVL_DEFAULT 0x00000001UL

#define	_RAC_IFADCTRIM_IFADCREFBUFCURLVL_MASK 0xC0000UL

#define	_RAC_IFADCTRIM_IFADCREFBUFCURLVL_SHIFT 18

#define	_RAC_IFADCTRIM_IFADCSIDETONEAMP_DEFAULT 0x00000001UL

#define	_RAC_IFADCTRIM_IFADCSIDETONEAMP_diff_pk_100mV 0x00000003UL

#define	_RAC_IFADCTRIM_IFADCSIDETONEAMP_diff_pk_10mV 0x00000000UL

#define	_RAC_IFADCTRIM_IFADCSIDETONEAMP_diff_pk_20mV 0x00000001UL

#define	_RAC_IFADCTRIM_IFADCSIDETONEAMP_diff_pk_50mV 0x00000002UL

#define	_RAC_IFADCTRIM_IFADCSIDETONEAMP_MASK 0x300000UL

#define	_RAC_IFADCTRIM_IFADCSIDETONEAMP_SHIFT 20

#define	_RAC_IFADCTRIM_IFADCSIDETONEFREQ_DEFAULT 0x00000002UL

#define	_RAC_IFADCTRIM_IFADCSIDETONEFREQ_div_128 0x00000001UL

#define	_RAC_IFADCTRIM_IFADCSIDETONEFREQ_div_16 0x00000004UL

#define	_RAC_IFADCTRIM_IFADCSIDETONEFREQ_div_32 0x00000003UL

#define	_RAC_IFADCTRIM_IFADCSIDETONEFREQ_div_4 0x00000006UL

#define	_RAC_IFADCTRIM_IFADCSIDETONEFREQ_div_64 0x00000002UL

#define	_RAC_IFADCTRIM_IFADCSIDETONEFREQ_div_8 0x00000005UL

#define	_RAC_IFADCTRIM_IFADCSIDETONEFREQ_MASK 0x1C00000UL

#define	_RAC_IFADCTRIM_IFADCSIDETONEFREQ_na0 0x00000000UL

#define	_RAC_IFADCTRIM_IFADCSIDETONEFREQ_na7 0x00000007UL

#define	_RAC_IFADCTRIM_IFADCSIDETONEFREQ_SHIFT 22

#define	_RAC_IFADCTRIM_IFADCTUNEZERO_DEFAULT 0x00000000UL

#define	_RAC_IFADCTRIM_IFADCTUNEZERO_half_freq_zero 0x00000001UL

#define	_RAC_IFADCTRIM_IFADCTUNEZERO_MASK 0x2000000UL

#define	_RAC_IFADCTRIM_IFADCTUNEZERO_nominal_zero 0x00000000UL

#define	_RAC_IFADCTRIM_IFADCTUNEZERO_SHIFT 25

#define	_RAC_IFADCTRIM_IFADCVCMLVL_DEFAULT 0x00000002UL

#define	_RAC_IFADCTRIM_IFADCVCMLVL_MASK 0xC000000UL

#define	_RAC_IFADCTRIM_IFADCVCMLVL_ratio_0p48 0x00000000UL

#define	_RAC_IFADCTRIM_IFADCVCMLVL_ratio_0p49 0x00000001UL

#define	_RAC_IFADCTRIM_IFADCVCMLVL_ratio_0p5 0x00000002UL

#define	_RAC_IFADCTRIM_IFADCVCMLVL_ratio_0p52 0x00000003UL

#define	_RAC_IFADCTRIM_IFADCVCMLVL_SHIFT 26

#define	_RAC_IFADCTRIM_MASK 0x0FFFFFFFUL

#define	_RAC_IFADCTRIM_RESETVALUE 0x08965290UL

#define	_RAC_IFPGACTRL_DCCALDCGEAR_DEFAULT 0x00000000UL

#define	_RAC_IFPGACTRL_DCCALDCGEAR_MASK 0xE000000UL

#define	_RAC_IFPGACTRL_DCCALDCGEAR_SHIFT 25

#define	_RAC_IFPGACTRL_DCCALDEC0_DEFAULT 0x00000000UL

#define	_RAC_IFPGACTRL_DCCALDEC0_DF3 0x00000000UL

#define	_RAC_IFPGACTRL_DCCALDEC0_DF4NARROW 0x00000002UL

#define	_RAC_IFPGACTRL_DCCALDEC0_DF4WIDE 0x00000001UL

#define	_RAC_IFPGACTRL_DCCALDEC0_DF8NARROW 0x00000004UL

#define	_RAC_IFPGACTRL_DCCALDEC0_DF8WIDE 0x00000003UL

#define	_RAC_IFPGACTRL_DCCALDEC0_MASK 0x1C00000UL

#define	_RAC_IFPGACTRL_DCCALDEC0_SHIFT 22

#define	_RAC_IFPGACTRL_DCCALON_DEFAULT 0x00000000UL

#define	_RAC_IFPGACTRL_DCCALON_DISABLE 0x00000000UL

#define	_RAC_IFPGACTRL_DCCALON_ENABLE 0x00000001UL

#define	_RAC_IFPGACTRL_DCCALON_MASK 0x80000UL

#define	_RAC_IFPGACTRL_DCCALON_SHIFT 19

#define	_RAC_IFPGACTRL_DCESTIEN_DEFAULT 0x00000000UL

#define	_RAC_IFPGACTRL_DCESTIEN_DISABLE 0x00000000UL

#define	_RAC_IFPGACTRL_DCESTIEN_ENABLE 0x00000001UL

#define	_RAC_IFPGACTRL_DCESTIEN_MASK 0x200000UL

#define	_RAC_IFPGACTRL_DCESTIEN_SHIFT 21

#define	_RAC_IFPGACTRL_DCRSTEN_DEFAULT 0x00000000UL

#define	_RAC_IFPGACTRL_DCRSTEN_DISABLE 0x00000000UL

#define	_RAC_IFPGACTRL_DCRSTEN_ENABLE 0x00000001UL

#define	_RAC_IFPGACTRL_DCRSTEN_MASK 0x100000UL

#define	_RAC_IFPGACTRL_DCRSTEN_SHIFT 20

#define	_RAC_IFPGACTRL_MASK 0x0FF80000UL

#define	_RAC_IFPGACTRL_RESETVALUE 0x00000000UL

#define	_RAC_IPVERSION_IPVERSION_DEFAULT 0x00000000UL

#define	_RAC_IPVERSION_IPVERSION_MASK 0xFFFFFFFFUL

#define	_RAC_IPVERSION_IPVERSION_SHIFT 0

#define	_RAC_IPVERSION_MASK 0xFFFFFFFFUL

#define	_RAC_IPVERSION_RESETVALUE 0x00000000UL

#define	_RAC_LNAMIXCAL_LNAMIXCALEN_cal_disable 0x00000000UL

#define	_RAC_LNAMIXCAL_LNAMIXCALEN_cal_enable 0x00000001UL

#define	_RAC_LNAMIXCAL_LNAMIXCALEN_DEFAULT 0x00000000UL

#define	_RAC_LNAMIXCAL_LNAMIXCALEN_MASK 0x1UL

#define	_RAC_LNAMIXCAL_LNAMIXCALEN_SHIFT 0

#define	_RAC_LNAMIXCAL_LNAMIXCALVMODE_current_mode 0x00000000UL

#define	_RAC_LNAMIXCAL_LNAMIXCALVMODE_DEFAULT 0x00000000UL

#define	_RAC_LNAMIXCAL_LNAMIXCALVMODE_MASK 0x2UL

#define	_RAC_LNAMIXCAL_LNAMIXCALVMODE_SHIFT 1

#define	_RAC_LNAMIXCAL_LNAMIXCALVMODE_voltage_mode 0x00000001UL

#define	_RAC_LNAMIXCAL_LNAMIXENIRCAL1_DEFAULT 0x00000000UL

#define	_RAC_LNAMIXCAL_LNAMIXENIRCAL1_disable 0x00000000UL

#define	_RAC_LNAMIXCAL_LNAMIXENIRCAL1_enable 0x00000001UL

#define	_RAC_LNAMIXCAL_LNAMIXENIRCAL1_MASK 0x4UL

#define	_RAC_LNAMIXCAL_LNAMIXENIRCAL1_SHIFT 2

#define	_RAC_LNAMIXCAL_LNAMIXENIRCAL2_DEFAULT 0x00000000UL

#define	_RAC_LNAMIXCAL_LNAMIXENIRCAL2_disable 0x00000000UL

#define	_RAC_LNAMIXCAL_LNAMIXENIRCAL2_enable 0x00000001UL

#define	_RAC_LNAMIXCAL_LNAMIXENIRCAL2_MASK 0x8UL

#define	_RAC_LNAMIXCAL_LNAMIXENIRCAL2_SHIFT 3

#define	_RAC_LNAMIXCAL_LNAMIXIRCAL1AMP_DEFAULT 0x00000007UL

#define	_RAC_LNAMIXCAL_LNAMIXIRCAL1AMP_MASK 0x70UL

#define	_RAC_LNAMIXCAL_LNAMIXIRCAL1AMP_SHIFT 4

#define	_RAC_LNAMIXCAL_LNAMIXIRCAL2AMP_DEFAULT 0x00000007UL

#define	_RAC_LNAMIXCAL_LNAMIXIRCAL2AMP_MASK 0x380UL

#define	_RAC_LNAMIXCAL_LNAMIXIRCAL2AMP_SHIFT 7

#define	_RAC_LNAMIXCAL_MASK 0x000003FFUL

#define	_RAC_LNAMIXCAL_RESETVALUE 0x000003F0UL

#define	_RAC_LNAMIXEN_LNAMIXENLDO_DEFAULT 0x00000000UL

#define	_RAC_LNAMIXEN_LNAMIXENLDO_disable 0x00000000UL

#define	_RAC_LNAMIXEN_LNAMIXENLDO_enable 0x00000001UL

#define	_RAC_LNAMIXEN_LNAMIXENLDO_MASK 0x1UL

#define	_RAC_LNAMIXEN_LNAMIXENLDO_SHIFT 0

#define	_RAC_LNAMIXEN_MASK 0x00000001UL

#define	_RAC_LNAMIXEN_RESETVALUE 0x00000000UL

#define	_RAC_LNAMIXTRIM0_LNAMIXCURCTRL_DEFAULT 0x0000003DUL

#define	_RAC_LNAMIXTRIM0_LNAMIXCURCTRL_MASK 0x3FUL

#define	_RAC_LNAMIXTRIM0_LNAMIXCURCTRL_SHIFT 0

#define	_RAC_LNAMIXTRIM0_LNAMIXHIGHCUR_current_470uA 0x00000000UL

#define	_RAC_LNAMIXTRIM0_LNAMIXHIGHCUR_current_530uA 0x00000001UL

#define	_RAC_LNAMIXTRIM0_LNAMIXHIGHCUR_current_590uA 0x00000003UL

#define	_RAC_LNAMIXTRIM0_LNAMIXHIGHCUR_DEFAULT 0x00000000UL

#define	_RAC_LNAMIXTRIM0_LNAMIXHIGHCUR_MASK 0xC0UL

#define	_RAC_LNAMIXTRIM0_LNAMIXHIGHCUR_SHIFT 6

#define	_RAC_LNAMIXTRIM0_LNAMIXHIGHCUR_unused 0x00000002UL

#define	_RAC_LNAMIXTRIM0_LNAMIXLOWCUR_current_60percent 0x00000003UL

#define	_RAC_LNAMIXTRIM0_LNAMIXLOWCUR_current_80percent 0x00000002UL

#define	_RAC_LNAMIXTRIM0_LNAMIXLOWCUR_current_nom 0x00000000UL

#define	_RAC_LNAMIXTRIM0_LNAMIXLOWCUR_DEFAULT 0x00000001UL

#define	_RAC_LNAMIXTRIM0_LNAMIXLOWCUR_MASK 0x300UL

#define	_RAC_LNAMIXTRIM0_LNAMIXLOWCUR_SHIFT 8

#define	_RAC_LNAMIXTRIM0_LNAMIXLOWCUR_unused 0x00000001UL

#define	_RAC_LNAMIXTRIM0_LNAMIXRFPKDBWSEL_DEFAULT 0x00000002UL

#define	_RAC_LNAMIXTRIM0_LNAMIXRFPKDBWSEL_MASK 0xC00UL

#define	_RAC_LNAMIXTRIM0_LNAMIXRFPKDBWSEL_SHIFT 10

#define	_RAC_LNAMIXTRIM0_LNAMIXRFPKDCALCM_DEFAULT 0x00000020UL

#define	_RAC_LNAMIXTRIM0_LNAMIXRFPKDCALCM_MASK 0x3F000UL

#define	_RAC_LNAMIXTRIM0_LNAMIXRFPKDCALCM_SHIFT 12

#define	_RAC_LNAMIXTRIM0_LNAMIXRFPKDCALDM_DEFAULT 0x00000010UL

#define	_RAC_LNAMIXTRIM0_LNAMIXRFPKDCALDM_MASK 0x7C0000UL

#define	_RAC_LNAMIXTRIM0_LNAMIXRFPKDCALDM_SHIFT 18

#define	_RAC_LNAMIXTRIM0_LNAMIXTRIMVREG_DEFAULT 0x00000008UL

#define	_RAC_LNAMIXTRIM0_LNAMIXTRIMVREG_MASK 0x7800000UL

#define	_RAC_LNAMIXTRIM0_LNAMIXTRIMVREG_SHIFT 23

#define	_RAC_LNAMIXTRIM0_MASK 0x07FFFFFFUL

#define	_RAC_LNAMIXTRIM0_RESETVALUE 0x0442093DUL

#define	_RAC_LNAMIXTRIM1_LNAMIXIBIAS1ADJ_DEFAULT 0x00000008UL

#define	_RAC_LNAMIXTRIM1_LNAMIXIBIAS1ADJ_MASK 0xFUL

#define	_RAC_LNAMIXTRIM1_LNAMIXIBIAS1ADJ_SHIFT 0

#define	_RAC_LNAMIXTRIM1_LNAMIXLNA1CAPSEL_DEFAULT 0x00000000UL

#define	_RAC_LNAMIXTRIM1_LNAMIXLNA1CAPSEL_MASK 0x70UL

#define	_RAC_LNAMIXTRIM1_LNAMIXLNA1CAPSEL_SHIFT 4

#define	_RAC_LNAMIXTRIM1_LNAMIXMXRBIAS1_bias_1V 0x00000000UL

#define	_RAC_LNAMIXTRIM1_LNAMIXMXRBIAS1_bias_800m 0x00000003UL

#define	_RAC_LNAMIXTRIM1_LNAMIXMXRBIAS1_bias_900m 0x00000002UL

#define	_RAC_LNAMIXTRIM1_LNAMIXMXRBIAS1_DEFAULT 0x00000002UL

#define	_RAC_LNAMIXTRIM1_LNAMIXMXRBIAS1_MASK 0x180UL

#define	_RAC_LNAMIXTRIM1_LNAMIXMXRBIAS1_SHIFT 7

#define	_RAC_LNAMIXTRIM1_LNAMIXMXRBIAS1_unused 0x00000001UL

#define	_RAC_LNAMIXTRIM1_LNAMIXNCAS1ADJ_DEFAULT 0x00000002UL

#define	_RAC_LNAMIXTRIM1_LNAMIXNCAS1ADJ_MASK 0x600UL

#define	_RAC_LNAMIXTRIM1_LNAMIXNCAS1ADJ_ncas_1V 0x00000000UL

#define	_RAC_LNAMIXTRIM1_LNAMIXNCAS1ADJ_ncas_900m 0x00000003UL

#define	_RAC_LNAMIXTRIM1_LNAMIXNCAS1ADJ_ncas_950m 0x00000002UL

#define	_RAC_LNAMIXTRIM1_LNAMIXNCAS1ADJ_SHIFT 9

#define	_RAC_LNAMIXTRIM1_LNAMIXNCAS1ADJ_unused 0x00000001UL

#define	_RAC_LNAMIXTRIM1_LNAMIXPCAS1ADJ_DEFAULT 0x00000002UL

#define	_RAC_LNAMIXTRIM1_LNAMIXPCAS1ADJ_MASK 0x1800UL

#define	_RAC_LNAMIXTRIM1_LNAMIXPCAS1ADJ_pcas_250m 0x00000000UL

#define	_RAC_LNAMIXTRIM1_LNAMIXPCAS1ADJ_pcas_300m 0x00000002UL

#define	_RAC_LNAMIXTRIM1_LNAMIXPCAS1ADJ_pcas_350m 0x00000003UL

#define	_RAC_LNAMIXTRIM1_LNAMIXPCAS1ADJ_SHIFT 11

#define	_RAC_LNAMIXTRIM1_LNAMIXPCAS1ADJ_unused 0x00000001UL

#define	_RAC_LNAMIXTRIM1_LNAMIXVOUT1ADJ_DEFAULT 0x00000008UL

#define	_RAC_LNAMIXTRIM1_LNAMIXVOUT1ADJ_MASK 0x1E000UL

#define	_RAC_LNAMIXTRIM1_LNAMIXVOUT1ADJ_SHIFT 13

#define	_RAC_LNAMIXTRIM1_MASK 0x0001FFFFUL

#define	_RAC_LNAMIXTRIM1_RESETVALUE 0x00011508UL

#define	_RAC_LNAMIXTRIM2_LNAMIXIBIAS2ADJ_DEFAULT 0x00000008UL

#define	_RAC_LNAMIXTRIM2_LNAMIXIBIAS2ADJ_MASK 0xFUL

#define	_RAC_LNAMIXTRIM2_LNAMIXIBIAS2ADJ_SHIFT 0

#define	_RAC_LNAMIXTRIM2_LNAMIXLNA2CAPSEL_DEFAULT 0x00000000UL

#define	_RAC_LNAMIXTRIM2_LNAMIXLNA2CAPSEL_MASK 0x70UL

#define	_RAC_LNAMIXTRIM2_LNAMIXLNA2CAPSEL_SHIFT 4

#define	_RAC_LNAMIXTRIM2_LNAMIXMXRBIAS2_bias_1V 0x00000000UL

#define	_RAC_LNAMIXTRIM2_LNAMIXMXRBIAS2_bias_800m 0x00000003UL

#define	_RAC_LNAMIXTRIM2_LNAMIXMXRBIAS2_bias_900m 0x00000002UL

#define	_RAC_LNAMIXTRIM2_LNAMIXMXRBIAS2_DEFAULT 0x00000002UL

#define	_RAC_LNAMIXTRIM2_LNAMIXMXRBIAS2_MASK 0x180UL

#define	_RAC_LNAMIXTRIM2_LNAMIXMXRBIAS2_SHIFT 7

#define	_RAC_LNAMIXTRIM2_LNAMIXMXRBIAS2_unused 0x00000001UL

#define	_RAC_LNAMIXTRIM2_LNAMIXNCAS2ADJ_DEFAULT 0x00000002UL

#define	_RAC_LNAMIXTRIM2_LNAMIXNCAS2ADJ_MASK 0x600UL

#define	_RAC_LNAMIXTRIM2_LNAMIXNCAS2ADJ_ncas_1V 0x00000000UL

#define	_RAC_LNAMIXTRIM2_LNAMIXNCAS2ADJ_ncas_900m 0x00000003UL

#define	_RAC_LNAMIXTRIM2_LNAMIXNCAS2ADJ_ncas_950m 0x00000002UL

#define	_RAC_LNAMIXTRIM2_LNAMIXNCAS2ADJ_SHIFT 9

#define	_RAC_LNAMIXTRIM2_LNAMIXNCAS2ADJ_unused 0x00000001UL

#define	_RAC_LNAMIXTRIM2_LNAMIXPCAS2ADJ_DEFAULT 0x00000002UL

#define	_RAC_LNAMIXTRIM2_LNAMIXPCAS2ADJ_MASK 0x1800UL

#define	_RAC_LNAMIXTRIM2_LNAMIXPCAS2ADJ_pcas_250m 0x00000000UL

#define	_RAC_LNAMIXTRIM2_LNAMIXPCAS2ADJ_pcas_300m 0x00000002UL

#define	_RAC_LNAMIXTRIM2_LNAMIXPCAS2ADJ_pcas_350m 0x00000003UL

#define	_RAC_LNAMIXTRIM2_LNAMIXPCAS2ADJ_SHIFT 11

#define	_RAC_LNAMIXTRIM2_LNAMIXPCAS2ADJ_unused 0x00000001UL

#define	_RAC_LNAMIXTRIM2_LNAMIXVOUT2ADJ_DEFAULT 0x00000008UL

#define	_RAC_LNAMIXTRIM2_LNAMIXVOUT2ADJ_MASK 0x1E000UL

#define	_RAC_LNAMIXTRIM2_LNAMIXVOUT2ADJ_SHIFT 13

#define	_RAC_LNAMIXTRIM2_MASK 0x0001FFFFUL

#define	_RAC_LNAMIXTRIM2_RESETVALUE 0x00011508UL

#define	_RAC_PACTRL_MASK 0x00FF07FFUL

#define	_RAC_PACTRL_PAEN10DBMVMID_DEFAULT 0x00000000UL

#define	_RAC_PACTRL_PAEN10DBMVMID_disable 0x00000000UL

#define	_RAC_PACTRL_PAEN10DBMVMID_enable 0x00000001UL

#define	_RAC_PACTRL_PAEN10DBMVMID_MASK 0x1UL

#define	_RAC_PACTRL_PAEN10DBMVMID_SHIFT 0

#define	_RAC_PACTRL_PAEN20DBMVMID_DEFAULT 0x00000000UL

#define	_RAC_PACTRL_PAEN20DBMVMID_disable 0x00000000UL

#define	_RAC_PACTRL_PAEN20DBMVMID_enable 0x00000001UL

#define	_RAC_PACTRL_PAEN20DBMVMID_MASK 0x2UL

#define	_RAC_PACTRL_PAEN20DBMVMID_SHIFT 1

#define	_RAC_PACTRL_PAENCAPATT_DEFAULT 0x00000000UL

#define	_RAC_PACTRL_PAENCAPATT_disable 0x00000000UL

#define	_RAC_PACTRL_PAENCAPATT_enable 0x00000001UL

#define	_RAC_PACTRL_PAENCAPATT_MASK 0x4UL

#define	_RAC_PACTRL_PAENCAPATT_SHIFT 2

#define	_RAC_PACTRL_PAENLATCHBYPASS_DEFAULT 0x00000000UL

#define	_RAC_PACTRL_PAENLATCHBYPASS_disable 0x00000000UL

#define	_RAC_PACTRL_PAENLATCHBYPASS_enable 0x00000001UL

#define	_RAC_PACTRL_PAENLATCHBYPASS_MASK 0x8UL

#define	_RAC_PACTRL_PAENLATCHBYPASS_SHIFT 3

#define	_RAC_PACTRL_PAENPOWERRAMPINGCLK_DEFAULT 0x00000000UL

#define	_RAC_PACTRL_PAENPOWERRAMPINGCLK_en_clk 0x00000001UL

#define	_RAC_PACTRL_PAENPOWERRAMPINGCLK_MASK 0x10UL

#define	_RAC_PACTRL_PAENPOWERRAMPINGCLK_SHIFT 4

#define	_RAC_PACTRL_PAENPOWERRAMPINGCLK_silence_clk 0x00000000UL

#define	_RAC_PACTRL_PAPOWER_DEFAULT 0x00000000UL

#define	_RAC_PACTRL_PAPOWER_MASK 0xF0000UL

#define	_RAC_PACTRL_PAPOWER_SHIFT 16

#define	_RAC_PACTRL_PAPOWER_t0stripeon 0x00000000UL

#define	_RAC_PACTRL_PAPOWER_t10stripeon 0x0000000AUL

#define	_RAC_PACTRL_PAPOWER_t11stripeon 0x0000000BUL

#define	_RAC_PACTRL_PAPOWER_t12stripeon 0x0000000CUL

#define	_RAC_PACTRL_PAPOWER_t13stripeon 0x0000000DUL

#define	_RAC_PACTRL_PAPOWER_t14stripeon 0x0000000EUL

#define	_RAC_PACTRL_PAPOWER_t15stripeon 0x0000000FUL

#define	_RAC_PACTRL_PAPOWER_t1stripeon 0x00000001UL

#define	_RAC_PACTRL_PAPOWER_t2stripeon 0x00000002UL

#define	_RAC_PACTRL_PAPOWER_t3stripeon 0x00000003UL

#define	_RAC_PACTRL_PAPOWER_t4stripeon 0x00000004UL

#define	_RAC_PACTRL_PAPOWER_t5stripeon 0x00000005UL

#define	_RAC_PACTRL_PAPOWER_t6stripeon 0x00000006UL

#define	_RAC_PACTRL_PAPOWER_t7stripeon 0x00000007UL

#define	_RAC_PACTRL_PAPOWER_t8stripeon 0x00000008UL

#define	_RAC_PACTRL_PAPOWER_t9stripeon 0x00000009UL

#define	_RAC_PACTRL_PAPULLDOWNVDDPA_DEFAULT 0x00000000UL

#define	_RAC_PACTRL_PAPULLDOWNVDDPA_MASK 0x20UL

#define	_RAC_PACTRL_PAPULLDOWNVDDPA_not_pull_down 0x00000000UL

#define	_RAC_PACTRL_PAPULLDOWNVDDPA_pull_down_vddpa 0x00000001UL

#define	_RAC_PACTRL_PAPULLDOWNVDDPA_SHIFT 5

#define	_RAC_PACTRL_PAREGBYPASSPDRVLDO_bypass 0x00000001UL

#define	_RAC_PACTRL_PAREGBYPASSPDRVLDO_DEFAULT 0x00000000UL

#define	_RAC_PACTRL_PAREGBYPASSPDRVLDO_MASK 0x40UL

#define	_RAC_PACTRL_PAREGBYPASSPDRVLDO_not_bypass 0x00000000UL

#define	_RAC_PACTRL_PAREGBYPASSPDRVLDO_SHIFT 6

#define	_RAC_PACTRL_PAREGBYPASSPREREG_bypass 0x00000001UL

#define	_RAC_PACTRL_PAREGBYPASSPREREG_DEFAULT 0x00000000UL

#define	_RAC_PACTRL_PAREGBYPASSPREREG_MASK 0x80UL

#define	_RAC_PACTRL_PAREGBYPASSPREREG_not_bypass 0x00000000UL

#define	_RAC_PACTRL_PAREGBYPASSPREREG_SHIFT 7

#define	_RAC_PACTRL_PASELLDOVDDPA_DEFAULT 0x00000000UL

#define	_RAC_PACTRL_PASELLDOVDDPA_MASK 0x100UL

#define	_RAC_PACTRL_PASELLDOVDDPA_not_selected 0x00000000UL

#define	_RAC_PACTRL_PASELLDOVDDPA_selected 0x00000001UL

#define	_RAC_PACTRL_PASELLDOVDDPA_SHIFT 8

#define	_RAC_PACTRL_PASELLDOVDDRF_DEFAULT 0x00000000UL

#define	_RAC_PACTRL_PASELLDOVDDRF_MASK 0x200UL

#define	_RAC_PACTRL_PASELLDOVDDRF_not_selected 0x00000000UL

#define	_RAC_PACTRL_PASELLDOVDDRF_selected 0x00000001UL

#define	_RAC_PACTRL_PASELLDOVDDRF_SHIFT 9

#define	_RAC_PACTRL_PASELSLICE_DEFAULT 0x00000000UL

#define	_RAC_PACTRL_PASELSLICE_MASK 0xF00000UL

#define	_RAC_PACTRL_PASELSLICE_SHIFT 20

#define	_RAC_PACTRL_PASLICERST_DEFAULT 0x00000000UL

#define	_RAC_PACTRL_PASLICERST_disable 0x00000000UL

#define	_RAC_PACTRL_PASLICERST_enable 0x00000001UL

#define	_RAC_PACTRL_PASLICERST_MASK 0x400UL

#define	_RAC_PACTRL_PASLICERST_SHIFT 10

#define	_RAC_PACTRL_RESETVALUE 0x00000000UL

#define	_RAC_PAENCTRL_MASK 0x00000100UL

#define	_RAC_PAENCTRL_PARAMP_DEFAULT 0x00000000UL

#define	_RAC_PAENCTRL_PARAMP_MASK 0x100UL

#define	_RAC_PAENCTRL_PARAMP_SHIFT 8

#define	_RAC_PAENCTRL_RESETVALUE 0x00000000UL

#define	_RAC_PATRIM0_MASK 0x3FFFFFFFUL

#define	_RAC_PATRIM0_PATRIMDRVREGIBCORE0DBM_DEFAULT 0x00000003UL

#define	_RAC_PATRIM0_PATRIMDRVREGIBCORE0DBM_i_4u 0x00000000UL

#define	_RAC_PATRIM0_PATRIMDRVREGIBCORE0DBM_i_5u 0x00000001UL

#define	_RAC_PATRIM0_PATRIMDRVREGIBCORE0DBM_i_6u 0x00000002UL

#define	_RAC_PATRIM0_PATRIMDRVREGIBCORE0DBM_i_7u 0x00000003UL

#define	_RAC_PATRIM0_PATRIMDRVREGIBCORE0DBM_MASK 0x3UL

#define	_RAC_PATRIM0_PATRIMDRVREGIBCORE0DBM_SHIFT 0

#define	_RAC_PATRIM0_PATRIMDRVREGIBNDIO0DBM_DEFAULT 0x00000004UL

#define	_RAC_PATRIM0_PATRIMDRVREGIBNDIO0DBM_MASK 0x3CUL

#define	_RAC_PATRIM0_PATRIMDRVREGIBNDIO0DBM_NA_10 0x0000000AUL

#define	_RAC_PATRIM0_PATRIMDRVREGIBNDIO0DBM_NA_11 0x0000000BUL

#define	_RAC_PATRIM0_PATRIMDRVREGIBNDIO0DBM_NA_12 0x0000000CUL

#define	_RAC_PATRIM0_PATRIMDRVREGIBNDIO0DBM_NA_13 0x0000000DUL

#define	_RAC_PATRIM0_PATRIMDRVREGIBNDIO0DBM_NA_14 0x0000000EUL

#define	_RAC_PATRIM0_PATRIMDRVREGIBNDIO0DBM_NA_15 0x0000000FUL

#define	_RAC_PATRIM0_PATRIMDRVREGIBNDIO0DBM_SHIFT 2

#define	_RAC_PATRIM0_PATRIMDRVREGIBNDIO0DBM_vreg_1p09 0x00000000UL

#define	_RAC_PATRIM0_PATRIMDRVREGIBNDIO0DBM_vreg_1p13 0x00000001UL

#define	_RAC_PATRIM0_PATRIMDRVREGIBNDIO0DBM_vreg_1p16 0x00000002UL

#define	_RAC_PATRIM0_PATRIMDRVREGIBNDIO0DBM_vreg_1p20 0x00000003UL

#define	_RAC_PATRIM0_PATRIMDRVREGIBNDIO0DBM_vreg_1p23 0x00000004UL

#define	_RAC_PATRIM0_PATRIMDRVREGIBNDIO0DBM_vreg_1p25 0x00000005UL

#define	_RAC_PATRIM0_PATRIMDRVREGIBNDIO0DBM_vreg_1p28 0x00000006UL

#define	_RAC_PATRIM0_PATRIMDRVREGIBNDIO0DBM_vreg_1p31 0x00000007UL

#define	_RAC_PATRIM0_PATRIMDRVREGIBNDIO0DBM_vreg_1p33 0x00000008UL

#define	_RAC_PATRIM0_PATRIMDRVREGIBNDIO0DBM_vreg_1p36 0x00000009UL

#define	_RAC_PATRIM0_PATRIMDRVREGPSR0DBM_DEFAULT 0x00000000UL

#define	_RAC_PATRIM0_PATRIMDRVREGPSR0DBM_disable 0x00000000UL

#define	_RAC_PATRIM0_PATRIMDRVREGPSR0DBM_enable 0x00000001UL

#define	_RAC_PATRIM0_PATRIMDRVREGPSR0DBM_MASK 0x40UL

#define	_RAC_PATRIM0_PATRIMDRVREGPSR0DBM_SHIFT 6

#define	_RAC_PATRIM0_PATRIMDRVSLICE0DBM_DEFAULT 0x00000003UL

#define	_RAC_PATRIM0_PATRIMDRVSLICE0DBM_MASK 0x180UL

#define	_RAC_PATRIM0_PATRIMDRVSLICE0DBM_on_0_slice 0x00000000UL

#define	_RAC_PATRIM0_PATRIMDRVSLICE0DBM_on_1_slice 0x00000001UL

#define	_RAC_PATRIM0_PATRIMDRVSLICE0DBM_on_2_slice 0x00000002UL

#define	_RAC_PATRIM0_PATRIMDRVSLICE0DBM_on_3_slice 0x00000003UL

#define	_RAC_PATRIM0_PATRIMDRVSLICE0DBM_SHIFT 7

#define	_RAC_PATRIM0_PATRIMFB0DBM_DEFAULT 0x00000006UL

#define	_RAC_PATRIM0_PATRIMFB0DBM_MASK 0x1E00UL

#define	_RAC_PATRIM0_PATRIMFB0DBM_SHIFT 9

#define	_RAC_PATRIM0_PATRIMFB0DBM_vo_vi_0p475 0x00000000UL

#define	_RAC_PATRIM0_PATRIMFB0DBM_vo_vi_0p500 0x00000001UL

#define	_RAC_PATRIM0_PATRIMFB0DBM_vo_vi_0p525 0x00000002UL

#define	_RAC_PATRIM0_PATRIMFB0DBM_vo_vi_0p550 0x00000003UL

#define	_RAC_PATRIM0_PATRIMFB0DBM_vo_vi_0p575 0x00000004UL

#define	_RAC_PATRIM0_PATRIMFB0DBM_vo_vi_0p600 0x00000005UL

#define	_RAC_PATRIM0_PATRIMFB0DBM_vo_vi_0p625 0x00000006UL

#define	_RAC_PATRIM0_PATRIMFB0DBM_vo_vi_0p650 0x00000007UL

#define	_RAC_PATRIM0_PATRIMFB0DBM_vo_vi_0p675 0x00000008UL

#define	_RAC_PATRIM0_PATRIMFB0DBM_vo_vi_0p700 0x00000009UL

#define	_RAC_PATRIM0_PATRIMFB0DBM_vo_vi_0p725 0x0000000AUL

#define	_RAC_PATRIM0_PATRIMFB0DBM_vo_vi_0p750 0x0000000BUL

#define	_RAC_PATRIM0_PATRIMFB0DBM_vo_vi_0p775 0x0000000CUL

#define	_RAC_PATRIM0_PATRIMFB0DBM_vo_vi_0p80 0x0000000DUL

#define	_RAC_PATRIM0_PATRIMFB0DBM_vo_vi_0p825 0x0000000EUL

#define	_RAC_PATRIM0_PATRIMFB0DBM_vo_vi_0p85 0x0000000FUL

#define	_RAC_PATRIM0_PATRIMPABIASN0DBM_DEFAULT 0x00000004UL

#define	_RAC_PATRIM0_PATRIMPABIASN0DBM_MASK 0x1E000UL

#define	_RAC_PATRIM0_PATRIMPABIASN0DBM_SHIFT 13

#define	_RAC_PATRIM0_PATRIMPABIASN0DBM_v_450m 0x00000000UL

#define	_RAC_PATRIM0_PATRIMPABIASN0DBM_v_462p5m 0x00000001UL

#define	_RAC_PATRIM0_PATRIMPABIASN0DBM_v_475m 0x00000002UL

#define	_RAC_PATRIM0_PATRIMPABIASN0DBM_v_487p5m 0x00000003UL

#define	_RAC_PATRIM0_PATRIMPABIASN0DBM_v_500m 0x00000004UL

#define	_RAC_PATRIM0_PATRIMPABIASN0DBM_v_512p5m 0x00000005UL

#define	_RAC_PATRIM0_PATRIMPABIASN0DBM_v_525m 0x00000006UL

#define	_RAC_PATRIM0_PATRIMPABIASN0DBM_v_537p5m 0x00000007UL

#define	_RAC_PATRIM0_PATRIMPABIASN0DBM_v_550m 0x00000008UL

#define	_RAC_PATRIM0_PATRIMPABIASN0DBM_v_562p5m 0x00000009UL

#define	_RAC_PATRIM0_PATRIMPABIASN0DBM_v_575m 0x0000000AUL

#define	_RAC_PATRIM0_PATRIMPABIASN0DBM_v_587p5m 0x0000000BUL

#define	_RAC_PATRIM0_PATRIMPABIASN0DBM_v_600m 0x0000000CUL

#define	_RAC_PATRIM0_PATRIMPABIASN0DBM_v_612p5m 0x0000000DUL

#define	_RAC_PATRIM0_PATRIMPABIASN0DBM_v_625m 0x0000000EUL

#define	_RAC_PATRIM0_PATRIMPABIASN0DBM_v_637p5m 0x0000000FUL

#define	_RAC_PATRIM0_PATRIMPABIASP0DBM_DEFAULT 0x00000004UL

#define	_RAC_PATRIM0_PATRIMPABIASP0DBM_MASK 0x1E0000UL

#define	_RAC_PATRIM0_PATRIMPABIASP0DBM_SHIFT 17

#define	_RAC_PATRIM0_PATRIMPABIASP0DBM_v_450m 0x00000000UL

#define	_RAC_PATRIM0_PATRIMPABIASP0DBM_v_462p5m 0x00000001UL

#define	_RAC_PATRIM0_PATRIMPABIASP0DBM_v_475m 0x00000002UL

#define	_RAC_PATRIM0_PATRIMPABIASP0DBM_v_487p5m 0x00000003UL

#define	_RAC_PATRIM0_PATRIMPABIASP0DBM_v_500m 0x00000004UL

#define	_RAC_PATRIM0_PATRIMPABIASP0DBM_v_512p5m 0x00000005UL

#define	_RAC_PATRIM0_PATRIMPABIASP0DBM_v_525m 0x00000006UL

#define	_RAC_PATRIM0_PATRIMPABIASP0DBM_v_537p5m 0x00000007UL

#define	_RAC_PATRIM0_PATRIMPABIASP0DBM_v_550m 0x00000008UL

#define	_RAC_PATRIM0_PATRIMPABIASP0DBM_v_562p5m 0x00000009UL

#define	_RAC_PATRIM0_PATRIMPABIASP0DBM_v_575m 0x0000000AUL

#define	_RAC_PATRIM0_PATRIMPABIASP0DBM_v_587p5m 0x0000000BUL

#define	_RAC_PATRIM0_PATRIMPABIASP0DBM_v_600m 0x0000000CUL

#define	_RAC_PATRIM0_PATRIMPABIASP0DBM_v_612p5m 0x0000000DUL

#define	_RAC_PATRIM0_PATRIMPABIASP0DBM_v_625m 0x0000000EUL

#define	_RAC_PATRIM0_PATRIMPABIASP0DBM_v_637p5m 0x0000000FUL

#define	_RAC_PATRIM0_PATRIMPASLICE0DBM_DEFAULT 0x00000000UL

#define	_RAC_PATRIM0_PATRIMPASLICE0DBM_MASK 0x7E00000UL

#define	_RAC_PATRIM0_PATRIMPASLICE0DBM_on_slice_0 0x00000000UL

#define	_RAC_PATRIM0_PATRIMPASLICE0DBM_on_slice_63 0x0000003FUL

#define	_RAC_PATRIM0_PATRIMPASLICE0DBM_SHIFT 21

#define	_RAC_PATRIM0_PATRIMVREF0DBM_DEFAULT 0x00000004UL

#define	_RAC_PATRIM0_PATRIMVREF0DBM_MASK 0x38000000UL

#define	_RAC_PATRIM0_PATRIMVREF0DBM_SHIFT 27

#define	_RAC_PATRIM0_PATRIMVREF0DBM_v_900m 0x00000000UL

#define	_RAC_PATRIM0_PATRIMVREF0DBM_v_912p5m 0x00000001UL

#define	_RAC_PATRIM0_PATRIMVREF0DBM_v_925m 0x00000002UL

#define	_RAC_PATRIM0_PATRIMVREF0DBM_v_937p5m 0x00000003UL

#define	_RAC_PATRIM0_PATRIMVREF0DBM_v_950m 0x00000004UL

#define	_RAC_PATRIM0_PATRIMVREF0DBM_v_962p5m 0x00000005UL

#define	_RAC_PATRIM0_PATRIMVREF0DBM_v_975m 0x00000006UL

#define	_RAC_PATRIM0_PATRIMVREF0DBM_v_987p5m 0x00000007UL

#define	_RAC_PATRIM0_RESETVALUE 0x20088D93UL

#define	_RAC_PATRIM1_MASK 0x7FFFFFFFUL

#define	_RAC_PATRIM1_PATRIM10DBMDUTYCYN_DEFAULT 0x00000000UL

#define	_RAC_PATRIM1_PATRIM10DBMDUTYCYN_MASK 0x7UL

#define	_RAC_PATRIM1_PATRIM10DBMDUTYCYN_na 0x00000007UL

#define	_RAC_PATRIM1_PATRIM10DBMDUTYCYN_SHIFT 0

#define	_RAC_PATRIM1_PATRIM10DBMDUTYCYN_up_0pct 0x00000000UL

#define	_RAC_PATRIM1_PATRIM10DBMDUTYCYN_up_1pct 0x00000001UL

#define	_RAC_PATRIM1_PATRIM10DBMDUTYCYN_up_2pct 0x00000002UL

#define	_RAC_PATRIM1_PATRIM10DBMDUTYCYN_up_3pct 0x00000003UL

#define	_RAC_PATRIM1_PATRIM10DBMDUTYCYN_up_4pct 0x00000004UL

#define	_RAC_PATRIM1_PATRIM10DBMDUTYCYN_up_5pct 0x00000005UL

#define	_RAC_PATRIM1_PATRIM10DBMDUTYCYN_up_6pct 0x00000006UL

#define	_RAC_PATRIM1_PATRIM10DBMDUTYCYP_DEFAULT 0x00000000UL

#define	_RAC_PATRIM1_PATRIM10DBMDUTYCYP_dn_0pct 0x00000000UL

#define	_RAC_PATRIM1_PATRIM10DBMDUTYCYP_dn_1pct 0x00000001UL

#define	_RAC_PATRIM1_PATRIM10DBMDUTYCYP_dn_2pct 0x00000002UL

#define	_RAC_PATRIM1_PATRIM10DBMDUTYCYP_dn_3pct 0x00000003UL

#define	_RAC_PATRIM1_PATRIM10DBMDUTYCYP_dn_4pct 0x00000004UL

#define	_RAC_PATRIM1_PATRIM10DBMDUTYCYP_dn_5pct 0x00000005UL

#define	_RAC_PATRIM1_PATRIM10DBMDUTYCYP_dn_6pct 0x00000006UL

#define	_RAC_PATRIM1_PATRIM10DBMDUTYCYP_MASK 0x38UL

#define	_RAC_PATRIM1_PATRIM10DBMDUTYCYP_na 0x00000007UL

#define	_RAC_PATRIM1_PATRIM10DBMDUTYCYP_SHIFT 3

#define	_RAC_PATRIM1_PATRIM20DBMPREDRV_DEFAULT 0x00000006UL

#define	_RAC_PATRIM1_PATRIM20DBMPREDRV_MASK 0x1C0UL

#define	_RAC_PATRIM1_PATRIM20DBMPREDRV_SHIFT 6

#define	_RAC_PATRIM1_PATRIM20DBMPREDRV_trise_110ps 0x00000003UL

#define	_RAC_PATRIM1_PATRIM20DBMPREDRV_trise_117ps 0x00000002UL

#define	_RAC_PATRIM1_PATRIM20DBMPREDRV_trise_127ps 0x00000001UL

#define	_RAC_PATRIM1_PATRIM20DBMPREDRV_trise_137ps 0x00000000UL

#define	_RAC_PATRIM1_PATRIM20DBMPREDRV_trise_70ps 0x00000007UL

#define	_RAC_PATRIM1_PATRIM20DBMPREDRV_trise_71ps 0x00000006UL

#define	_RAC_PATRIM1_PATRIM20DBMPREDRV_trise_73ps 0x00000005UL

#define	_RAC_PATRIM1_PATRIM20DBMPREDRV_trise_75ps 0x00000004UL

#define	_RAC_PATRIM1_PATRIMANTSWBIAS_DEFAULT 0x00000000UL

#define	_RAC_PATRIM1_PATRIMANTSWBIAS_MASK 0x600UL

#define	_RAC_PATRIM1_PATRIMANTSWBIAS_SHIFT 9

#define	_RAC_PATRIM1_PATRIMANTSWBIAS_vb_at_vdd 0x00000000UL

#define	_RAC_PATRIM1_PATRIMANTSWBIAS_vb_at_vdd_m1p2v 0x00000002UL

#define	_RAC_PATRIM1_PATRIMANTSWBIAS_vb_at_vdd_m1p8v 0x00000003UL

#define	_RAC_PATRIM1_PATRIMANTSWBIAS_vb_at_vdd_mp6v 0x00000001UL

#define	_RAC_PATRIM1_PATRIMBLEEDAUTOPREREG_automatic 0x00000001UL

#define	_RAC_PATRIM1_PATRIMBLEEDAUTOPREREG_DEFAULT 0x00000001UL

#define	_RAC_PATRIM1_PATRIMBLEEDAUTOPREREG_MASK 0x800UL

#define	_RAC_PATRIM1_PATRIMBLEEDAUTOPREREG_not_automatic 0x00000000UL

#define	_RAC_PATRIM1_PATRIMBLEEDAUTOPREREG_SHIFT 11

#define	_RAC_PATRIM1_PATRIMCAPPAOUTM_DEFAULT 0x00000000UL

#define	_RAC_PATRIM1_PATRIMCAPPAOUTM_MASK 0xF000UL

#define	_RAC_PATRIM1_PATRIMCAPPAOUTM_SHIFT 12

#define	_RAC_PATRIM1_PATRIMCAPPAOUTP_DEFAULT 0x00000000UL

#define	_RAC_PATRIM1_PATRIMCAPPAOUTP_MASK 0xF0000UL

#define	_RAC_PATRIM1_PATRIMCAPPAOUTP_SHIFT 16

#define	_RAC_PATRIM1_PATRIMCMGAIN_DEFAULT 0x00000000UL

#define	_RAC_PATRIM1_PATRIMCMGAIN_MASK 0x300000UL

#define	_RAC_PATRIM1_PATRIMCMGAIN_SHIFT 20

#define	_RAC_PATRIM1_PATRIMDLY0_DEFAULT 0x00000000UL

#define	_RAC_PATRIM1_PATRIMDLY0_MASK 0x1C00000UL

#define	_RAC_PATRIM1_PATRIMDLY0_SHIFT 22

#define	_RAC_PATRIM1_PATRIMDLY0_tdly_0ps 0x00000000UL

#define	_RAC_PATRIM1_PATRIMDLY0_tdly_64ps 0x00000001UL

#define	_RAC_PATRIM1_PATRIMDLY0_tdly_65ps 0x00000002UL

#define	_RAC_PATRIM1_PATRIMDLY0_tdly_66ps 0x00000003UL

#define	_RAC_PATRIM1_PATRIMDLY0_tdly_68ps 0x00000004UL

#define	_RAC_PATRIM1_PATRIMDLY0_tdly_70ps 0x00000005UL

#define	_RAC_PATRIM1_PATRIMDLY0_tdly_75ps 0x00000006UL

#define	_RAC_PATRIM1_PATRIMDLY0_tdly_83ps 0x00000007UL

#define	_RAC_PATRIM1_PATRIMDLY1_DEFAULT 0x00000000UL

#define	_RAC_PATRIM1_PATRIMDLY1_MASK 0xE000000UL

#define	_RAC_PATRIM1_PATRIMDLY1_SHIFT 25

#define	_RAC_PATRIM1_PATRIMDLY1_tdly_0ps 0x00000000UL

#define	_RAC_PATRIM1_PATRIMDLY1_tdly_64ps 0x00000001UL

#define	_RAC_PATRIM1_PATRIMDLY1_tdly_65ps 0x00000002UL

#define	_RAC_PATRIM1_PATRIMDLY1_tdly_66ps 0x00000003UL

#define	_RAC_PATRIM1_PATRIMDLY1_tdly_68ps 0x00000004UL

#define	_RAC_PATRIM1_PATRIMDLY1_tdly_70ps 0x00000005UL

#define	_RAC_PATRIM1_PATRIMDLY1_tdly_75ps 0x00000006UL

#define	_RAC_PATRIM1_PATRIMDLY1_tdly_83ps 0x00000007UL

#define	_RAC_PATRIM1_PATRIMFBKATTPDRVLDO_DEFAULT 0x00000000UL

#define	_RAC_PATRIM1_PATRIMFBKATTPDRVLDO_less_bw 0x00000000UL

#define	_RAC_PATRIM1_PATRIMFBKATTPDRVLDO_MASK 0x10000000UL

#define	_RAC_PATRIM1_PATRIMFBKATTPDRVLDO_more_bw 0x00000001UL

#define	_RAC_PATRIM1_PATRIMFBKATTPDRVLDO_SHIFT 28

#define	_RAC_PATRIM1_PATRIMIBIASMASTER_DEFAULT 0x00000002UL

#define	_RAC_PATRIM1_PATRIMIBIASMASTER_Ibias_is_45u 0x00000000UL

#define	_RAC_PATRIM1_PATRIMIBIASMASTER_Ibias_is_47p5u 0x00000001UL

#define	_RAC_PATRIM1_PATRIMIBIASMASTER_Ibias_is_50u 0x00000002UL

#define	_RAC_PATRIM1_PATRIMIBIASMASTER_Ibias_is_52p5u 0x00000003UL

#define	_RAC_PATRIM1_PATRIMIBIASMASTER_MASK 0x60000000UL

#define	_RAC_PATRIM1_PATRIMIBIASMASTER_SHIFT 29

#define	_RAC_PATRIM1_RESETVALUE 0x40000980UL

#define	_RAC_PATRIM2_MASK 0x7FFFFFFFUL

#define	_RAC_PATRIM2_PATRIMLDOFBHVPDRVLDO_DEFAULT 0x00000002UL

#define	_RAC_PATRIM2_PATRIMLDOFBHVPDRVLDO_MASK 0x3UL

#define	_RAC_PATRIM2_PATRIMLDOFBHVPDRVLDO_SHIFT 0

#define	_RAC_PATRIM2_PATRIMLDOFBHVPDRVLDO_vreg_1p22 0x00000000UL

#define	_RAC_PATRIM2_PATRIMLDOFBHVPDRVLDO_vreg_1p28 0x00000001UL

#define	_RAC_PATRIM2_PATRIMLDOFBHVPDRVLDO_vreg_1p35 0x00000002UL

#define	_RAC_PATRIM2_PATRIMLDOFBHVPDRVLDO_vreg_1p44 0x00000003UL

#define	_RAC_PATRIM2_PATRIMLDOFBHVPREREG_DEFAULT 0x00000006UL

#define	_RAC_PATRIM2_PATRIMLDOFBHVPREREG_MASK 0x1CUL

#define	_RAC_PATRIM2_PATRIMLDOFBHVPREREG_SHIFT 2

#define	_RAC_PATRIM2_PATRIMLDOFBHVPREREG_vreg_1p678 0x00000000UL

#define	_RAC_PATRIM2_PATRIMLDOFBHVPREREG_vreg_1p735 0x00000001UL

#define	_RAC_PATRIM2_PATRIMLDOFBHVPREREG_vreg_1p801 0x00000002UL

#define	_RAC_PATRIM2_PATRIMLDOFBHVPREREG_vreg_1p875 0x00000003UL

#define	_RAC_PATRIM2_PATRIMLDOFBHVPREREG_vreg_3p00 0x00000004UL

#define	_RAC_PATRIM2_PATRIMLDOFBHVPREREG_vreg_3p14 0x00000005UL

#define	_RAC_PATRIM2_PATRIMLDOFBHVPREREG_vreg_3p3 0x00000006UL

#define	_RAC_PATRIM2_PATRIMLDOFBHVPREREG_vreg_3p477 0x00000007UL

#define	_RAC_PATRIM2_PATRIMLDOHVPDRVLDO_DEFAULT 0x00000003UL

#define	_RAC_PATRIM2_PATRIMLDOHVPDRVLDO_MASK 0xE0UL

#define	_RAC_PATRIM2_PATRIMLDOHVPDRVLDO_SHIFT 5

#define	_RAC_PATRIM2_PATRIMLDOHVPDRVLDO_vref_0p675 0x00000000UL

#define	_RAC_PATRIM2_PATRIMLDOHVPDRVLDO_vref_0p700 0x00000001UL

#define	_RAC_PATRIM2_PATRIMLDOHVPDRVLDO_vref_0p725 0x00000002UL

#define	_RAC_PATRIM2_PATRIMLDOHVPDRVLDO_vref_0p750 0x00000003UL

#define	_RAC_PATRIM2_PATRIMLDOHVPDRVLDO_vref_0p775 0x00000004UL

#define	_RAC_PATRIM2_PATRIMLDOHVPDRVLDO_vref_0p800 0x00000005UL

#define	_RAC_PATRIM2_PATRIMLDOHVPDRVLDO_vref_0p825 0x00000006UL

#define	_RAC_PATRIM2_PATRIMLDOHVPDRVLDO_vref_0p850 0x00000007UL

#define	_RAC_PATRIM2_PATRIMLDOHVPREREG_DEFAULT 0x00000008UL

#define	_RAC_PATRIM2_PATRIMLDOHVPREREG_MASK 0xF00UL

#define	_RAC_PATRIM2_PATRIMLDOHVPREREG_SHIFT 8

#define	_RAC_PATRIM2_PATRIMLDOHVPREREG_vref_0p651 0x00000000UL

#define	_RAC_PATRIM2_PATRIMLDOHVPREREG_vref_0p663 0x00000001UL

#define	_RAC_PATRIM2_PATRIMLDOHVPREREG_vref_0p676 0x00000002UL

#define	_RAC_PATRIM2_PATRIMLDOHVPREREG_vref_0p688 0x00000003UL

#define	_RAC_PATRIM2_PATRIMLDOHVPREREG_vref_0p701 0x00000004UL

#define	_RAC_PATRIM2_PATRIMLDOHVPREREG_vref_0p713 0x00000005UL

#define	_RAC_PATRIM2_PATRIMLDOHVPREREG_vref_0p726 0x00000006UL

#define	_RAC_PATRIM2_PATRIMLDOHVPREREG_vref_0p738 0x00000007UL

#define	_RAC_PATRIM2_PATRIMLDOHVPREREG_vref_0p751 0x00000008UL

#define	_RAC_PATRIM2_PATRIMLDOHVPREREG_vref_0p763 0x00000009UL

#define	_RAC_PATRIM2_PATRIMLDOHVPREREG_vref_0p776 0x0000000AUL

#define	_RAC_PATRIM2_PATRIMLDOHVPREREG_vref_0p788 0x0000000BUL

#define	_RAC_PATRIM2_PATRIMLDOHVPREREG_vref_0p801 0x0000000CUL

#define	_RAC_PATRIM2_PATRIMLDOHVPREREG_vref_0p813 0x0000000DUL

#define	_RAC_PATRIM2_PATRIMLDOHVPREREG_vref_0p826 0x0000000EUL

#define	_RAC_PATRIM2_PATRIMLDOHVPREREG_vref_0p838 0x0000000FUL

#define	_RAC_PATRIM2_PATRIMLDOPSRPDRVLDO_DEFAULT 0x00000001UL

#define	_RAC_PATRIM2_PATRIMLDOPSRPDRVLDO_high_psr 0x00000001UL

#define	_RAC_PATRIM2_PATRIMLDOPSRPDRVLDO_low_psr 0x00000000UL

#define	_RAC_PATRIM2_PATRIMLDOPSRPDRVLDO_MASK 0x1000UL

#define	_RAC_PATRIM2_PATRIMLDOPSRPDRVLDO_SHIFT 12

#define	_RAC_PATRIM2_PATRIMLDOPSRPREREG_DEFAULT 0x00000001UL

#define	_RAC_PATRIM2_PATRIMLDOPSRPREREG_high_psr 0x00000001UL

#define	_RAC_PATRIM2_PATRIMLDOPSRPREREG_low_psr 0x00000000UL

#define	_RAC_PATRIM2_PATRIMLDOPSRPREREG_MASK 0x2000UL

#define	_RAC_PATRIM2_PATRIMLDOPSRPREREG_SHIFT 13

#define	_RAC_PATRIM2_PATRIMLDOSLICESPDRVLDO_DEFAULT 0x00000003UL

#define	_RAC_PATRIM2_PATRIMLDOSLICESPDRVLDO_iload_15mA 0x00000001UL

#define	_RAC_PATRIM2_PATRIMLDOSLICESPDRVLDO_iload_22p5mA 0x00000002UL

#define	_RAC_PATRIM2_PATRIMLDOSLICESPDRVLDO_iload_30mA 0x00000003UL

#define	_RAC_PATRIM2_PATRIMLDOSLICESPDRVLDO_iload_7p5mA 0x00000000UL

#define	_RAC_PATRIM2_PATRIMLDOSLICESPDRVLDO_MASK 0xC000UL

#define	_RAC_PATRIM2_PATRIMLDOSLICESPDRVLDO_SHIFT 14

#define	_RAC_PATRIM2_PATRIMLDOSLICESPREREG_DEFAULT 0x00000000UL

#define	_RAC_PATRIM2_PATRIMLDOSLICESPREREG_MASK 0x30000UL

#define	_RAC_PATRIM2_PATRIMLDOSLICESPREREG_SHIFT 16

#define	_RAC_PATRIM2_PATRIMLDOSLICESPREREG_spare1 0x00000000UL

#define	_RAC_PATRIM2_PATRIMLDOSLICESPREREG_spare2 0x00000001UL

#define	_RAC_PATRIM2_PATRIMLDOSLICESPREREG_spare3 0x00000002UL

#define	_RAC_PATRIM2_PATRIMLDOSLICESPREREG_spare4 0x00000003UL

#define	_RAC_PATRIM2_PATRIMNBIAS_DEFAULT 0x00000008UL

#define	_RAC_PATRIM2_PATRIMNBIAS_MASK 0x780000UL

#define	_RAC_PATRIM2_PATRIMNBIAS_SHIFT 19

#define	_RAC_PATRIM2_PATRIMNBIAS_vnbias_default 0x00000008UL

#define	_RAC_PATRIM2_PATRIMNBIAS_vnbias_dn104mv 0x00000000UL

#define	_RAC_PATRIM2_PATRIMNBIAS_vnbias_dn13mv 0x00000007UL

#define	_RAC_PATRIM2_PATRIMNBIAS_vnbias_dn26mv 0x00000006UL

#define	_RAC_PATRIM2_PATRIMNBIAS_vnbias_dn39mv 0x00000005UL

#define	_RAC_PATRIM2_PATRIMNBIAS_vnbias_dn52mv 0x00000004UL

#define	_RAC_PATRIM2_PATRIMNBIAS_vnbias_dn65mv 0x00000003UL

#define	_RAC_PATRIM2_PATRIMNBIAS_vnbias_dn78mv 0x00000002UL

#define	_RAC_PATRIM2_PATRIMNBIAS_vnbias_dn91mv 0x00000001UL

#define	_RAC_PATRIM2_PATRIMNBIAS_vnbias_up13mv 0x00000009UL

#define	_RAC_PATRIM2_PATRIMNBIAS_vnbias_up26mv 0x0000000AUL

#define	_RAC_PATRIM2_PATRIMNBIAS_vnbias_up39mv 0x0000000BUL

#define	_RAC_PATRIM2_PATRIMNBIAS_vnbias_up52mv 0x0000000CUL

#define	_RAC_PATRIM2_PATRIMNBIAS_vnbias_up65mv 0x0000000DUL

#define	_RAC_PATRIM2_PATRIMNBIAS_vnbias_up78mv 0x0000000EUL

#define	_RAC_PATRIM2_PATRIMNBIAS_vnbias_up91mv 0x0000000FUL

#define	_RAC_PATRIM2_PATRIMNCASC_DEFAULT 0x00000001UL

#define	_RAC_PATRIM2_PATRIMNCASC_MASK 0x1800000UL

#define	_RAC_PATRIM2_PATRIMNCASC_ncbias_default 0x00000001UL

#define	_RAC_PATRIM2_PATRIMNCASC_ncbias_m50mv 0x00000000UL

#define	_RAC_PATRIM2_PATRIMNCASC_ncbias_p100mv 0x00000003UL

#define	_RAC_PATRIM2_PATRIMNCASC_ncbias_p50mv 0x00000002UL

#define	_RAC_PATRIM2_PATRIMNCASC_SHIFT 23

#define	_RAC_PATRIM2_PATRIMPADACGLITCH_DEFAULT 0x00000000UL

#define	_RAC_PATRIM2_PATRIMPADACGLITCH_larger_glitch 0x00000000UL

#define	_RAC_PATRIM2_PATRIMPADACGLITCH_MASK 0x40000UL

#define	_RAC_PATRIM2_PATRIMPADACGLITCH_SHIFT 18

#define	_RAC_PATRIM2_PATRIMPADACGLITCH_smaller_glitch 0x00000001UL

#define	_RAC_PATRIM2_PATRIMPBIAS_DEFAULT 0x00000008UL

#define	_RAC_PATRIM2_PATRIMPBIAS_MASK 0x1E000000UL

#define	_RAC_PATRIM2_PATRIMPBIAS_SHIFT 25

#define	_RAC_PATRIM2_PATRIMPBIAS_vpbias_default 0x00000008UL

#define	_RAC_PATRIM2_PATRIMPBIAS_vpbias_dn13mv 0x00000009UL

#define	_RAC_PATRIM2_PATRIMPBIAS_vpbias_dn26mv 0x0000000AUL

#define	_RAC_PATRIM2_PATRIMPBIAS_vpbias_dn38mv 0x0000000BUL

#define	_RAC_PATRIM2_PATRIMPBIAS_vpbias_dn52mv 0x0000000CUL

#define	_RAC_PATRIM2_PATRIMPBIAS_vpbias_dn65mv 0x0000000DUL

#define	_RAC_PATRIM2_PATRIMPBIAS_vpbias_dn78mv 0x0000000EUL

#define	_RAC_PATRIM2_PATRIMPBIAS_vpbias_dn91mv 0x0000000FUL

#define	_RAC_PATRIM2_PATRIMPBIAS_vpbias_up104mv 0x00000000UL

#define	_RAC_PATRIM2_PATRIMPBIAS_vpbias_up13mv 0x00000007UL

#define	_RAC_PATRIM2_PATRIMPBIAS_vpbias_up26mv 0x00000006UL

#define	_RAC_PATRIM2_PATRIMPBIAS_vpbias_up39mv 0x00000005UL

#define	_RAC_PATRIM2_PATRIMPBIAS_vpbias_up52mv 0x00000004UL

#define	_RAC_PATRIM2_PATRIMPBIAS_vpbias_up65mv 0x00000003UL

#define	_RAC_PATRIM2_PATRIMPBIAS_vpbias_up78mv 0x00000002UL

#define	_RAC_PATRIM2_PATRIMPBIAS_vpbias_up91mv 0x00000001UL

#define	_RAC_PATRIM2_PATRIMPCASC_DEFAULT 0x00000001UL

#define	_RAC_PATRIM2_PATRIMPCASC_MASK 0x60000000UL

#define	_RAC_PATRIM2_PATRIMPCASC_pcbias_default 0x00000001UL

#define	_RAC_PATRIM2_PATRIMPCASC_pcbias_m100mv 0x00000003UL

#define	_RAC_PATRIM2_PATRIMPCASC_pcbias_m50mv 0x00000002UL

#define	_RAC_PATRIM2_PATRIMPCASC_pcbias_p50mv 0x00000000UL

#define	_RAC_PATRIM2_PATRIMPCASC_SHIFT 29

#define	_RAC_PATRIM2_RESETVALUE 0x30C0F87AUL

#define	_RAC_PGACAL_MASK 0x3F3F3F3FUL

#define	_RAC_PGACAL_PGAOFFNCALI_DEFAULT 0x00000020UL

#define	_RAC_PGACAL_PGAOFFNCALI_MASK 0x3FUL

#define	_RAC_PGACAL_PGAOFFNCALI_offset_m_300mv 0x00000000UL

#define	_RAC_PGACAL_PGAOFFNCALI_offset_p_300mv 0x0000003FUL

#define	_RAC_PGACAL_PGAOFFNCALI_SHIFT 0

#define	_RAC_PGACAL_PGAOFFNCALQ_DEFAULT 0x00000020UL

#define	_RAC_PGACAL_PGAOFFNCALQ_MASK 0x3F00UL

#define	_RAC_PGACAL_PGAOFFNCALQ_offset_m_300mv 0x00000000UL

#define	_RAC_PGACAL_PGAOFFNCALQ_offset_p_300mv 0x0000003FUL

#define	_RAC_PGACAL_PGAOFFNCALQ_SHIFT 8

#define	_RAC_PGACAL_PGAOFFPCALI_DEFAULT 0x00000020UL

#define	_RAC_PGACAL_PGAOFFPCALI_MASK 0x3F0000UL

#define	_RAC_PGACAL_PGAOFFPCALI_offset_m_300mv 0x00000000UL

#define	_RAC_PGACAL_PGAOFFPCALI_offset_p_300mv 0x0000003FUL

#define	_RAC_PGACAL_PGAOFFPCALI_SHIFT 16

#define	_RAC_PGACAL_PGAOFFPCALQ_DEFAULT 0x00000020UL

#define	_RAC_PGACAL_PGAOFFPCALQ_MASK 0x3F000000UL

#define	_RAC_PGACAL_PGAOFFPCALQ_offset_m_300mv 0x00000000UL

#define	_RAC_PGACAL_PGAOFFPCALQ_offset_p_300mv 0x0000003FUL

#define	_RAC_PGACAL_PGAOFFPCALQ_SHIFT 24

#define	_RAC_PGACAL_RESETVALUE 0x20202020UL

#define	_RAC_PGACTRL_LNAMIXRFPKDTHRESHSEL_DEFAULT 0x00000004UL

#define	_RAC_PGACTRL_LNAMIXRFPKDTHRESHSEL_MASK 0x7000000UL

#define	_RAC_PGACTRL_LNAMIXRFPKDTHRESHSEL_SHIFT 24

#define	_RAC_PGACTRL_MASK 0x07FFFFFFUL

#define	_RAC_PGACTRL_PGABWMODE_bw_1p25MHz 0x00000003UL

#define	_RAC_PGACTRL_PGABWMODE_bw_1p67MHz 0x00000002UL

#define	_RAC_PGACTRL_PGABWMODE_bw_2p5MHz 0x00000001UL

#define	_RAC_PGACTRL_PGABWMODE_bw_5MHz 0x00000000UL

#define	_RAC_PGACTRL_PGABWMODE_DEFAULT 0x00000000UL

#define	_RAC_PGACTRL_PGABWMODE_MASK 0x3UL

#define	_RAC_PGACTRL_PGABWMODE_SHIFT 0

#define	_RAC_PGACTRL_PGAENBIAS_bias_disable 0x00000000UL

#define	_RAC_PGACTRL_PGAENBIAS_bias_enable 0x00000001UL

#define	_RAC_PGACTRL_PGAENBIAS_DEFAULT 0x00000000UL

#define	_RAC_PGACTRL_PGAENBIAS_MASK 0x4UL

#define	_RAC_PGACTRL_PGAENBIAS_SHIFT 2

#define	_RAC_PGACTRL_PGAENGHZ_DEFAULT 0x00000000UL

#define	_RAC_PGACTRL_PGAENGHZ_ghz_disable 0x00000000UL

#define	_RAC_PGACTRL_PGAENGHZ_ghz_enable 0x00000001UL

#define	_RAC_PGACTRL_PGAENGHZ_MASK 0x8UL

#define	_RAC_PGACTRL_PGAENGHZ_SHIFT 3

#define	_RAC_PGACTRL_PGAENHYST_DEFAULT 0x00000000UL

#define	_RAC_PGACTRL_PGAENHYST_MASK 0x10UL

#define	_RAC_PGACTRL_PGAENHYST_pkd_hyst_disable 0x00000000UL

#define	_RAC_PGACTRL_PGAENHYST_pkd_hyst_enable 0x00000001UL

#define	_RAC_PGACTRL_PGAENHYST_SHIFT 4

#define	_RAC_PGACTRL_PGAENLATCHI_DEFAULT 0x00000000UL

#define	_RAC_PGACTRL_PGAENLATCHI_MASK 0x20UL

#define	_RAC_PGACTRL_PGAENLATCHI_pkd_latch_i_disable 0x00000000UL

#define	_RAC_PGACTRL_PGAENLATCHI_pkd_latch_i_enable 0x00000001UL

#define	_RAC_PGACTRL_PGAENLATCHI_SHIFT 5

#define	_RAC_PGACTRL_PGAENLATCHQ_DEFAULT 0x00000000UL

#define	_RAC_PGACTRL_PGAENLATCHQ_MASK 0x40UL

#define	_RAC_PGACTRL_PGAENLATCHQ_pkd_latch_q_disable 0x00000000UL

#define	_RAC_PGACTRL_PGAENLATCHQ_pkd_latch_q_enable 0x00000001UL

#define	_RAC_PGACTRL_PGAENLATCHQ_SHIFT 6

#define	_RAC_PGACTRL_PGAENLDOLOAD_DEFAULT 0x00000000UL

#define	_RAC_PGACTRL_PGAENLDOLOAD_disable_ldo_load 0x00000000UL

#define	_RAC_PGACTRL_PGAENLDOLOAD_enable_ldo_load 0x00000001UL

#define	_RAC_PGACTRL_PGAENLDOLOAD_MASK 0x80UL

#define	_RAC_PGACTRL_PGAENLDOLOAD_SHIFT 7

#define	_RAC_PGACTRL_PGAENOFFD_DEFAULT 0x00000000UL

#define	_RAC_PGACTRL_PGAENOFFD_MASK 0x100UL

#define	_RAC_PGACTRL_PGAENOFFD_pkd_offd_disable 0x00000000UL

#define	_RAC_PGACTRL_PGAENOFFD_pkd_offd_enable 0x00000001UL

#define	_RAC_PGACTRL_PGAENOFFD_SHIFT 8

#define	_RAC_PGACTRL_PGAENPGAI_DEFAULT 0x00000000UL

#define	_RAC_PGACTRL_PGAENPGAI_MASK 0x200UL

#define	_RAC_PGACTRL_PGAENPGAI_pgai_disable 0x00000000UL

#define	_RAC_PGACTRL_PGAENPGAI_pgai_enable 0x00000001UL

#define	_RAC_PGACTRL_PGAENPGAI_SHIFT 9

#define	_RAC_PGACTRL_PGAENPGAQ_DEFAULT 0x00000000UL

#define	_RAC_PGACTRL_PGAENPGAQ_MASK 0x400UL

#define	_RAC_PGACTRL_PGAENPGAQ_pgaq_disable 0x00000000UL

#define	_RAC_PGACTRL_PGAENPGAQ_pgaq_enable 0x00000001UL

#define	_RAC_PGACTRL_PGAENPGAQ_SHIFT 10

#define	_RAC_PGACTRL_PGAENPKD_DEFAULT 0x00000000UL

#define	_RAC_PGACTRL_PGAENPKD_MASK 0x800UL

#define	_RAC_PGACTRL_PGAENPKD_pkd_disable 0x00000000UL

#define	_RAC_PGACTRL_PGAENPKD_pkd_enable 0x00000001UL

#define	_RAC_PGACTRL_PGAENPKD_SHIFT 11

#define	_RAC_PGACTRL_PGAENRCMOUT_DEFAULT 0x00000000UL

#define	_RAC_PGACTRL_PGAENRCMOUT_MASK 0x1000UL

#define	_RAC_PGACTRL_PGAENRCMOUT_rcm_out_disable 0x00000000UL

#define	_RAC_PGACTRL_PGAENRCMOUT_rcm_out_enable 0x00000001UL

#define	_RAC_PGACTRL_PGAENRCMOUT_SHIFT 12

#define	_RAC_PGACTRL_PGAPOWERMODE_DEFAULT 0x00000000UL

#define	_RAC_PGACTRL_PGAPOWERMODE_MASK 0xC000UL

#define	_RAC_PGACTRL_PGAPOWERMODE_pm_0p5 0x00000003UL

#define	_RAC_PGACTRL_PGAPOWERMODE_pm_0p8 0x00000001UL

#define	_RAC_PGACTRL_PGAPOWERMODE_pm_1p2 0x00000002UL

#define	_RAC_PGACTRL_PGAPOWERMODE_pm_typ 0x00000000UL

#define	_RAC_PGACTRL_PGAPOWERMODE_SHIFT 14

#define	_RAC_PGACTRL_PGATHRPKDHISEL_DEFAULT 0x00000000UL

#define	_RAC_PGACTRL_PGATHRPKDHISEL_MASK 0xF00000UL

#define	_RAC_PGACTRL_PGATHRPKDHISEL_SHIFT 20

#define	_RAC_PGACTRL_PGATHRPKDHISEL_verf150mv 0x00000004UL

#define	_RAC_PGACTRL_PGATHRPKDHISEL_vref100mv 0x00000002UL

#define	_RAC_PGACTRL_PGATHRPKDHISEL_vref125mv 0x00000003UL

#define	_RAC_PGACTRL_PGATHRPKDHISEL_vref175mv 0x00000005UL

#define	_RAC_PGACTRL_PGATHRPKDHISEL_vref200mv 0x00000006UL

#define	_RAC_PGACTRL_PGATHRPKDHISEL_vref225mv 0x00000007UL

#define	_RAC_PGACTRL_PGATHRPKDHISEL_vref250mv 0x00000008UL

#define	_RAC_PGACTRL_PGATHRPKDHISEL_vref275mv 0x00000009UL

#define	_RAC_PGACTRL_PGATHRPKDHISEL_vref300mv 0x0000000AUL

#define	_RAC_PGACTRL_PGATHRPKDHISEL_vref50mv 0x00000000UL

#define	_RAC_PGACTRL_PGATHRPKDHISEL_vref75mv 0x00000001UL

#define	_RAC_PGACTRL_PGATHRPKDLOSEL_DEFAULT 0x00000000UL

#define	_RAC_PGACTRL_PGATHRPKDLOSEL_MASK 0xF0000UL

#define	_RAC_PGACTRL_PGATHRPKDLOSEL_SHIFT 16

#define	_RAC_PGACTRL_PGATHRPKDLOSEL_vref100mv 0x00000002UL

#define	_RAC_PGACTRL_PGATHRPKDLOSEL_vref125mv 0x00000003UL

#define	_RAC_PGACTRL_PGATHRPKDLOSEL_vref150mv 0x00000004UL

#define	_RAC_PGACTRL_PGATHRPKDLOSEL_vref175mv 0x00000005UL

#define	_RAC_PGACTRL_PGATHRPKDLOSEL_vref200mv 0x00000006UL

#define	_RAC_PGACTRL_PGATHRPKDLOSEL_vref225mv 0x00000007UL

#define	_RAC_PGACTRL_PGATHRPKDLOSEL_vref250mv 0x00000008UL

#define	_RAC_PGACTRL_PGATHRPKDLOSEL_vref275mv 0x00000009UL

#define	_RAC_PGACTRL_PGATHRPKDLOSEL_vref300mv 0x0000000AUL

#define	_RAC_PGACTRL_PGATHRPKDLOSEL_vref50mv 0x00000000UL

#define	_RAC_PGACTRL_PGATHRPKDLOSEL_vref75mv 0x00000001UL

#define	_RAC_PGACTRL_RESETVALUE 0x04000000UL

#define	_RAC_PGATRIM_MASK 0x000007FFUL

#define	_RAC_PGATRIM_PGACTUNE_cfb_0p7 0x00000000UL

#define	_RAC_PGATRIM_PGACTUNE_cfb_1p32 0x0000000FUL

#define	_RAC_PGATRIM_PGACTUNE_cfb_nominal 0x00000007UL

#define	_RAC_PGATRIM_PGACTUNE_DEFAULT 0x00000007UL

#define	_RAC_PGATRIM_PGACTUNE_MASK 0xFUL

#define	_RAC_PGATRIM_PGACTUNE_SHIFT 0

#define	_RAC_PGATRIM_PGADISANTILOCK_antilock_disable 0x00000001UL

#define	_RAC_PGATRIM_PGADISANTILOCK_antilock_enable 0x00000000UL

#define	_RAC_PGATRIM_PGADISANTILOCK_DEFAULT 0x00000000UL

#define	_RAC_PGATRIM_PGADISANTILOCK_MASK 0x10UL

#define	_RAC_PGATRIM_PGADISANTILOCK_SHIFT 4

#define	_RAC_PGATRIM_PGAVCMOUTTRIM_DEFAULT 0x00000002UL

#define	_RAC_PGATRIM_PGAVCMOUTTRIM_MASK 0xE0UL

#define	_RAC_PGATRIM_PGAVCMOUTTRIM_SHIFT 5

#define	_RAC_PGATRIM_PGAVCMOUTTRIM_vcm_out_0p4 0x00000000UL

#define	_RAC_PGATRIM_PGAVCMOUTTRIM_vcm_out_0p45 0x00000001UL

#define	_RAC_PGATRIM_PGAVCMOUTTRIM_vcm_out_0p5 0x00000002UL

#define	_RAC_PGATRIM_PGAVCMOUTTRIM_vcm_out_0p55 0x00000003UL

#define	_RAC_PGATRIM_PGAVCMOUTTRIM_vcm_out_0p6 0x00000004UL

#define	_RAC_PGATRIM_PGAVCMOUTTRIM_vcm_out_0p65 0x00000005UL

#define	_RAC_PGATRIM_PGAVCMOUTTRIM_vcm_out_0p7 0x00000006UL

#define	_RAC_PGATRIM_PGAVCMOUTTRIM_vcm_out_0p75 0x00000007UL

#define	_RAC_PGATRIM_PGAVLDOTRIM_DEFAULT 0x00000005UL

#define	_RAC_PGATRIM_PGAVLDOTRIM_MASK 0x700UL

#define	_RAC_PGATRIM_PGAVLDOTRIM_SHIFT 8

#define	_RAC_PGATRIM_PGAVLDOTRIM_vdda_1p15 0x00000000UL

#define	_RAC_PGATRIM_PGAVLDOTRIM_vdda_1p2 0x00000001UL

#define	_RAC_PGATRIM_PGAVLDOTRIM_vdda_1p25 0x00000002UL

#define	_RAC_PGATRIM_PGAVLDOTRIM_vdda_1p3 0x00000003UL

#define	_RAC_PGATRIM_PGAVLDOTRIM_vdda_1p35 0x00000004UL

#define	_RAC_PGATRIM_PGAVLDOTRIM_vdda_1p4 0x00000005UL

#define	_RAC_PGATRIM_PGAVLDOTRIM_vdda_1p5 0x00000006UL

#define	_RAC_PGATRIM_PGAVLDOTRIM_vdda_1p55 0x00000007UL

#define	_RAC_PGATRIM_RESETVALUE 0x00000547UL

#define	_RAC_PRECTRL_MASK 0x0000003FUL

#define	_RAC_PRECTRL_PREBYPFORCE_DEFAULT 0x00000000UL

#define	_RAC_PRECTRL_PREBYPFORCE_forced 0x00000001UL

#define	_RAC_PRECTRL_PREBYPFORCE_MASK 0x1UL

#define	_RAC_PRECTRL_PREBYPFORCE_not_forced 0x00000000UL

#define	_RAC_PRECTRL_PREBYPFORCE_SHIFT 0

#define	_RAC_PRECTRL_PREREGTRIM_DEFAULT 0x00000003UL

#define	_RAC_PRECTRL_PREREGTRIM_MASK 0xEUL

#define	_RAC_PRECTRL_PREREGTRIM_SHIFT 1

#define	_RAC_PRECTRL_PREREGTRIM_v1p61 0x00000000UL

#define	_RAC_PRECTRL_PREREGTRIM_v1p68 0x00000001UL

#define	_RAC_PRECTRL_PREREGTRIM_v1p74 0x00000002UL

#define	_RAC_PRECTRL_PREREGTRIM_v1p80 0x00000003UL

#define	_RAC_PRECTRL_PREREGTRIM_v1p86 0x00000004UL

#define	_RAC_PRECTRL_PREREGTRIM_v1p91 0x00000005UL

#define	_RAC_PRECTRL_PREREGTRIM_v1p96 0x00000006UL

#define	_RAC_PRECTRL_PREREGTRIM_v2p00 0x00000007UL

#define	_RAC_PRECTRL_PREVREFTRIM_DEFAULT 0x00000002UL

#define	_RAC_PRECTRL_PREVREFTRIM_MASK 0x30UL

#define	_RAC_PRECTRL_PREVREFTRIM_SHIFT 4

#define	_RAC_PRECTRL_PREVREFTRIM_v0p675 0x00000000UL

#define	_RAC_PRECTRL_PREVREFTRIM_v0p688 0x00000001UL

#define	_RAC_PRECTRL_PREVREFTRIM_v0p700 0x00000002UL

#define	_RAC_PRECTRL_PREVREFTRIM_v0p713 0x00000003UL

#define	_RAC_PRECTRL_RESETVALUE 0x00000026UL

#define	_RAC_PRESC_MASK 0x0000007FUL

#define	_RAC_PRESC_RESETVALUE 0x00000007UL

#define	_RAC_PRESC_STIMER_DEFAULT 0x00000007UL

#define	_RAC_PRESC_STIMER_MASK 0x7FUL

#define	_RAC_PRESC_STIMER_SHIFT 0

#define	_RAC_R0_MASK 0xFFFFFFFFUL

#define	_RAC_R0_R0_DEFAULT 0x00000000UL

#define	_RAC_R0_R0_MASK 0xFFFFFFFFUL

#define	_RAC_R0_R0_SHIFT 0

#define	_RAC_R0_RESETVALUE 0x00000000UL

#define	_RAC_R1_MASK 0xFFFFFFFFUL

#define	_RAC_R1_R1_DEFAULT 0x00000000UL

#define	_RAC_R1_R1_MASK 0xFFFFFFFFUL

#define	_RAC_R1_R1_SHIFT 0

#define	_RAC_R1_RESETVALUE 0x00000000UL

#define	_RAC_R2_MASK 0xFFFFFFFFUL

#define	_RAC_R2_R2_DEFAULT 0x00000000UL

#define	_RAC_R2_R2_MASK 0xFFFFFFFFUL

#define	_RAC_R2_R2_SHIFT 0

#define	_RAC_R2_RESETVALUE 0x00000000UL

#define	_RAC_R3_MASK 0xFFFFFFFFUL

#define	_RAC_R3_R3_DEFAULT 0x00000000UL

#define	_RAC_R3_R3_MASK 0xFFFFFFFFUL

#define	_RAC_R3_R3_SHIFT 0

#define	_RAC_R3_RESETVALUE 0x00000000UL

#define	_RAC_R4_MASK 0xFFFFFFFFUL

#define	_RAC_R4_R4_DEFAULT 0x00000000UL

#define	_RAC_R4_R4_MASK 0xFFFFFFFFUL

#define	_RAC_R4_R4_SHIFT 0

#define	_RAC_R4_RESETVALUE 0x00000000UL

#define	_RAC_R5_MASK 0xFFFFFFFFUL

#define	_RAC_R5_R5_DEFAULT 0x00000000UL

#define	_RAC_R5_R5_MASK 0xFFFFFFFFUL

#define	_RAC_R5_R5_SHIFT 0

#define	_RAC_R5_RESETVALUE 0x00000000UL

#define	_RAC_R6_MASK 0xFFFFFFFFUL

#define	_RAC_R6_R6_DEFAULT 0x00000000UL

#define	_RAC_R6_R6_MASK 0xFFFFFFFFUL

#define	_RAC_R6_R6_SHIFT 0

#define	_RAC_R6_RESETVALUE 0x00000000UL

#define	_RAC_R7_MASK 0xFFFFFFFFUL

#define	_RAC_R7_R7_DEFAULT 0x00000000UL

#define	_RAC_R7_R7_MASK 0xFFFFFFFFUL

#define	_RAC_R7_R7_SHIFT 0

#define	_RAC_R7_RESETVALUE 0x00000000UL

#define	_RAC_RADIOEN_MASK 0x00000007UL

#define	_RAC_RADIOEN_PREEN_DEFAULT 0x00000000UL

#define	_RAC_RADIOEN_PREEN_MASK 0x1UL

#define	_RAC_RADIOEN_PREEN_powered_off 0x00000000UL

#define	_RAC_RADIOEN_PREEN_powered_on 0x00000001UL

#define	_RAC_RADIOEN_PREEN_SHIFT 0

#define	_RAC_RADIOEN_PRESTB100UDIS_DEFAULT 0x00000000UL

#define	_RAC_RADIOEN_PRESTB100UDIS_i100ua_disabled 0x00000001UL

#define	_RAC_RADIOEN_PRESTB100UDIS_i100ua_enabled 0x00000000UL

#define	_RAC_RADIOEN_PRESTB100UDIS_MASK 0x2UL

#define	_RAC_RADIOEN_PRESTB100UDIS_SHIFT 1

#define	_RAC_RADIOEN_RESETVALUE 0x00000000UL

#define	_RAC_RADIOEN_RFBIASEN_DEFAULT 0x00000000UL

#define	_RAC_RADIOEN_RFBIASEN_disable_dualbis_vtr 0x00000000UL

#define	_RAC_RADIOEN_RFBIASEN_enable_dualbis_vtr 0x00000001UL

#define	_RAC_RADIOEN_RFBIASEN_MASK 0x4UL

#define	_RAC_RADIOEN_RFBIASEN_SHIFT 2

#define	_RAC_RFBIASCAL_MASK 0x3F3F3F3FUL

#define	_RAC_RFBIASCAL_RESETVALUE 0x30202020UL

#define	_RAC_RFBIASCAL_RFBIASCALBIAS_DEFAULT 0x00000020UL

#define	_RAC_RFBIASCAL_RFBIASCALBIAS_MASK 0x3FUL

#define	_RAC_RFBIASCAL_RFBIASCALBIAS_SHIFT 0

#define	_RAC_RFBIASCAL_RFBIASCALTC_DEFAULT 0x00000020UL

#define	_RAC_RFBIASCAL_RFBIASCALTC_MASK 0x3F00UL

#define	_RAC_RFBIASCAL_RFBIASCALTC_SHIFT 8

#define	_RAC_RFBIASCAL_RFBIASCALVREF_DEFAULT 0x00000020UL

#define	_RAC_RFBIASCAL_RFBIASCALVREF_MASK 0x3F0000UL

#define	_RAC_RFBIASCAL_RFBIASCALVREF_SHIFT 16

#define	_RAC_RFBIASCAL_RFBIASCALVREFSTARTUP_DEFAULT 0x00000030UL

#define	_RAC_RFBIASCAL_RFBIASCALVREFSTARTUP_MASK 0x3F000000UL

#define	_RAC_RFBIASCAL_RFBIASCALVREFSTARTUP_SHIFT 24

#define	_RAC_RFBIASCTRL_MASK 0x000F001FUL

#define	_RAC_RFBIASCTRL_RESETVALUE 0x00040000UL

#define	_RAC_RFBIASCTRL_RFBIASDISABLEBOOTSTRAP_DEFAULT 0x00000000UL

#define	_RAC_RFBIASCTRL_RFBIASDISABLEBOOTSTRAP_disable_startup 0x00000001UL

#define	_RAC_RFBIASCTRL_RFBIASDISABLEBOOTSTRAP_enable_startup 0x00000000UL

#define	_RAC_RFBIASCTRL_RFBIASDISABLEBOOTSTRAP_MASK 0x1UL

#define	_RAC_RFBIASCTRL_RFBIASDISABLEBOOTSTRAP_SHIFT 0

#define	_RAC_RFBIASCTRL_RFBIASLDOHIGHCURRENT_DEFAULT 0x00000000UL

#define	_RAC_RFBIASCTRL_RFBIASLDOHIGHCURRENT_high_current 0x00000001UL

#define	_RAC_RFBIASCTRL_RFBIASLDOHIGHCURRENT_low_current 0x00000000UL

#define	_RAC_RFBIASCTRL_RFBIASLDOHIGHCURRENT_MASK 0x2UL

#define	_RAC_RFBIASCTRL_RFBIASLDOHIGHCURRENT_SHIFT 1

#define	_RAC_RFBIASCTRL_RFBIASLDOVREFTRIM_DEFAULT 0x00000004UL

#define	_RAC_RFBIASCTRL_RFBIASLDOVREFTRIM_MASK 0xF0000UL

#define	_RAC_RFBIASCTRL_RFBIASLDOVREFTRIM_SHIFT 16

#define	_RAC_RFBIASCTRL_RFBIASLDOVREFTRIM_vref_v0p800 0x00000000UL

#define	_RAC_RFBIASCTRL_RFBIASLDOVREFTRIM_vref_v0p813 0x00000001UL

#define	_RAC_RFBIASCTRL_RFBIASLDOVREFTRIM_vref_v0p825 0x00000002UL

#define	_RAC_RFBIASCTRL_RFBIASLDOVREFTRIM_vref_v0p837 0x00000003UL

#define	_RAC_RFBIASCTRL_RFBIASLDOVREFTRIM_vref_v0p850 0x00000004UL

#define	_RAC_RFBIASCTRL_RFBIASLDOVREFTRIM_vref_v0p863 0x00000005UL

#define	_RAC_RFBIASCTRL_RFBIASLDOVREFTRIM_vref_v0p875 0x00000006UL

#define	_RAC_RFBIASCTRL_RFBIASLDOVREFTRIM_vref_v0p887 0x00000007UL

#define	_RAC_RFBIASCTRL_RFBIASLDOVREFTRIM_vref_v0p900 0x00000008UL

#define	_RAC_RFBIASCTRL_RFBIASLDOVREFTRIM_vref_v0p913 0x00000009UL

#define	_RAC_RFBIASCTRL_RFBIASLDOVREFTRIM_vref_v0p925 0x0000000AUL

#define	_RAC_RFBIASCTRL_RFBIASLDOVREFTRIM_vref_v0p938 0x0000000BUL

#define	_RAC_RFBIASCTRL_RFBIASLDOVREFTRIM_vref_v0p950 0x0000000CUL

#define	_RAC_RFBIASCTRL_RFBIASLDOVREFTRIM_vref_v0p963 0x0000000DUL

#define	_RAC_RFBIASCTRL_RFBIASLDOVREFTRIM_vref_v0p975 0x0000000EUL

#define	_RAC_RFBIASCTRL_RFBIASLDOVREFTRIM_vref_v0p988 0x0000000FUL

#define	_RAC_RFBIASCTRL_RFBIASNONFLASHMODE_DEFAULT 0x00000000UL

#define	_RAC_RFBIASCTRL_RFBIASNONFLASHMODE_flash_process 0x00000000UL

#define	_RAC_RFBIASCTRL_RFBIASNONFLASHMODE_MASK 0x4UL

#define	_RAC_RFBIASCTRL_RFBIASNONFLASHMODE_non_flash_process 0x00000001UL

#define	_RAC_RFBIASCTRL_RFBIASNONFLASHMODE_SHIFT 2

#define	_RAC_RFBIASCTRL_RFBIASSTARTUPCORE_DEFAULT 0x00000000UL

#define	_RAC_RFBIASCTRL_RFBIASSTARTUPCORE_default 0x00000000UL

#define	_RAC_RFBIASCTRL_RFBIASSTARTUPCORE_force_start 0x00000001UL

#define	_RAC_RFBIASCTRL_RFBIASSTARTUPCORE_MASK 0x8UL

#define	_RAC_RFBIASCTRL_RFBIASSTARTUPCORE_SHIFT 3

#define	_RAC_RFBIASCTRL_RFBIASSTARTUPSUPPLY_DEFAULT 0x00000000UL

#define	_RAC_RFBIASCTRL_RFBIASSTARTUPSUPPLY_default 0x00000000UL

#define	_RAC_RFBIASCTRL_RFBIASSTARTUPSUPPLY_forc_start 0x00000001UL

#define	_RAC_RFBIASCTRL_RFBIASSTARTUPSUPPLY_MASK 0x10UL

#define	_RAC_RFBIASCTRL_RFBIASSTARTUPSUPPLY_SHIFT 4

#define	_RAC_RFPATHEN1_LNAMIXEN0DBMPA1_DEFAULT 0x00000000UL

#define	_RAC_RFPATHEN1_LNAMIXEN0DBMPA1_disable 0x00000000UL

#define	_RAC_RFPATHEN1_LNAMIXEN0DBMPA1_enable 0x00000001UL

#define	_RAC_RFPATHEN1_LNAMIXEN0DBMPA1_MASK 0x1UL

#define	_RAC_RFPATHEN1_LNAMIXEN0DBMPA1_SHIFT 0

#define	_RAC_RFPATHEN1_LNAMIXEN1_DEFAULT 0x00000000UL

#define	_RAC_RFPATHEN1_LNAMIXEN1_disable 0x00000000UL

#define	_RAC_RFPATHEN1_LNAMIXEN1_enable 0x00000001UL

#define	_RAC_RFPATHEN1_LNAMIXEN1_MASK 0x2UL

#define	_RAC_RFPATHEN1_LNAMIXEN1_SHIFT 1

#define	_RAC_RFPATHEN1_LNAMIXRFATTDCEN1_DEFAULT 0x00000001UL

#define	_RAC_RFPATHEN1_LNAMIXRFATTDCEN1_disable_dc 0x00000000UL

#define	_RAC_RFPATHEN1_LNAMIXRFATTDCEN1_enable_dc 0x00000001UL

#define	_RAC_RFPATHEN1_LNAMIXRFATTDCEN1_MASK 0x4UL

#define	_RAC_RFPATHEN1_LNAMIXRFATTDCEN1_SHIFT 2

#define	_RAC_RFPATHEN1_LNAMIXRFPKDENRF1_DEFAULT 0x00000000UL

#define	_RAC_RFPATHEN1_LNAMIXRFPKDENRF1_disable 0x00000000UL

#define	_RAC_RFPATHEN1_LNAMIXRFPKDENRF1_enable_path1 0x00000001UL

#define	_RAC_RFPATHEN1_LNAMIXRFPKDENRF1_MASK 0x8UL

#define	_RAC_RFPATHEN1_LNAMIXRFPKDENRF1_SHIFT 3

#define	_RAC_RFPATHEN1_LNAMIXTRSW1_DEFAULT 0x00000000UL

#define	_RAC_RFPATHEN1_LNAMIXTRSW1_disabled 0x00000000UL

#define	_RAC_RFPATHEN1_LNAMIXTRSW1_enabled 0x00000001UL

#define	_RAC_RFPATHEN1_LNAMIXTRSW1_MASK 0x10UL

#define	_RAC_RFPATHEN1_LNAMIXTRSW1_SHIFT 4

#define	_RAC_RFPATHEN1_MASK 0x000000FFUL

#define	_RAC_RFPATHEN1_PAENANT1_DEFAULT 0x00000000UL

#define	_RAC_RFPATHEN1_PAENANT1_disable 0x00000000UL

#define	_RAC_RFPATHEN1_PAENANT1_enable 0x00000001UL

#define	_RAC_RFPATHEN1_PAENANT1_MASK 0x20UL

#define	_RAC_RFPATHEN1_PAENANT1_SHIFT 5

#define	_RAC_RFPATHEN1_PAENPA10DBM_DEFAULT 0x00000000UL

#define	_RAC_RFPATHEN1_PAENPA10DBM_disable 0x00000000UL

#define	_RAC_RFPATHEN1_PAENPA10DBM_enable 0x00000001UL

#define	_RAC_RFPATHEN1_PAENPA10DBM_MASK 0x40UL

#define	_RAC_RFPATHEN1_PAENPA10DBM_SHIFT 6

#define	_RAC_RFPATHEN1_PAENPAPREDRV10DBM_DEFAULT 0x00000000UL

#define	_RAC_RFPATHEN1_PAENPAPREDRV10DBM_disable 0x00000000UL

#define	_RAC_RFPATHEN1_PAENPAPREDRV10DBM_enable 0x00000001UL

#define	_RAC_RFPATHEN1_PAENPAPREDRV10DBM_MASK 0x80UL

#define	_RAC_RFPATHEN1_PAENPAPREDRV10DBM_SHIFT 7

#define	_RAC_RFPATHEN1_RESETVALUE 0x00000004UL

#define	_RAC_RFPATHEN2_LNAMIXEN0DBMPA2_DEFAULT 0x00000000UL

#define	_RAC_RFPATHEN2_LNAMIXEN0DBMPA2_disable 0x00000000UL

#define	_RAC_RFPATHEN2_LNAMIXEN0DBMPA2_enable 0x00000001UL

#define	_RAC_RFPATHEN2_LNAMIXEN0DBMPA2_MASK 0x1UL

#define	_RAC_RFPATHEN2_LNAMIXEN0DBMPA2_SHIFT 0

#define	_RAC_RFPATHEN2_LNAMIXEN2_DEFAULT 0x00000000UL

#define	_RAC_RFPATHEN2_LNAMIXEN2_disable 0x00000000UL

#define	_RAC_RFPATHEN2_LNAMIXEN2_enable 0x00000001UL

#define	_RAC_RFPATHEN2_LNAMIXEN2_MASK 0x2UL

#define	_RAC_RFPATHEN2_LNAMIXEN2_SHIFT 1

#define	_RAC_RFPATHEN2_LNAMIXRFATTDCEN2_DEFAULT 0x00000001UL

#define	_RAC_RFPATHEN2_LNAMIXRFATTDCEN2_disable 0x00000000UL

#define	_RAC_RFPATHEN2_LNAMIXRFATTDCEN2_enable 0x00000001UL

#define	_RAC_RFPATHEN2_LNAMIXRFATTDCEN2_MASK 0x4UL

#define	_RAC_RFPATHEN2_LNAMIXRFATTDCEN2_SHIFT 2

#define	_RAC_RFPATHEN2_LNAMIXRFPKDENRF2_DEFAULT 0x00000000UL

#define	_RAC_RFPATHEN2_LNAMIXRFPKDENRF2_disable 0x00000000UL

#define	_RAC_RFPATHEN2_LNAMIXRFPKDENRF2_enable_path2 0x00000001UL

#define	_RAC_RFPATHEN2_LNAMIXRFPKDENRF2_MASK 0x8UL

#define	_RAC_RFPATHEN2_LNAMIXRFPKDENRF2_SHIFT 3

#define	_RAC_RFPATHEN2_LNAMIXTRSW2_DEFAULT 0x00000000UL

#define	_RAC_RFPATHEN2_LNAMIXTRSW2_disable 0x00000000UL

#define	_RAC_RFPATHEN2_LNAMIXTRSW2_enable 0x00000001UL

#define	_RAC_RFPATHEN2_LNAMIXTRSW2_MASK 0x10UL

#define	_RAC_RFPATHEN2_LNAMIXTRSW2_SHIFT 4

#define	_RAC_RFPATHEN2_MASK 0x000000FFUL

#define	_RAC_RFPATHEN2_PAENANT2_DEFAULT 0x00000000UL

#define	_RAC_RFPATHEN2_PAENANT2_disable 0x00000000UL

#define	_RAC_RFPATHEN2_PAENANT2_enable 0x00000001UL

#define	_RAC_RFPATHEN2_PAENANT2_MASK 0x20UL

#define	_RAC_RFPATHEN2_PAENANT2_SHIFT 5

#define	_RAC_RFPATHEN2_PAENPA20DBM_DEFAULT 0x00000000UL

#define	_RAC_RFPATHEN2_PAENPA20DBM_disable 0x00000000UL

#define	_RAC_RFPATHEN2_PAENPA20DBM_enable 0x00000001UL

#define	_RAC_RFPATHEN2_PAENPA20DBM_MASK 0x40UL

#define	_RAC_RFPATHEN2_PAENPA20DBM_SHIFT 6

#define	_RAC_RFPATHEN2_PAENPAPREDRV20DBM_DEFAULT 0x00000000UL

#define	_RAC_RFPATHEN2_PAENPAPREDRV20DBM_disable 0x00000000UL

#define	_RAC_RFPATHEN2_PAENPAPREDRV20DBM_enable 0x00000001UL

#define	_RAC_RFPATHEN2_PAENPAPREDRV20DBM_MASK 0x80UL

#define	_RAC_RFPATHEN2_PAENPAPREDRV20DBM_SHIFT 7

#define	_RAC_RFPATHEN2_RESETVALUE 0x00000004UL

#define	_RAC_RX_IFADCCAPRESET_cap_reset_disable 0x00000000UL

#define	_RAC_RX_IFADCCAPRESET_cap_reset_enable 0x00000001UL

#define	_RAC_RX_IFADCCAPRESET_DEFAULT 0x00000000UL

#define	_RAC_RX_IFADCCAPRESET_MASK 0x1UL

#define	_RAC_RX_IFADCCAPRESET_SHIFT 0

#define	_RAC_RX_IFADCENLDOSERIES_DEFAULT 0x00000000UL

#define	_RAC_RX_IFADCENLDOSERIES_MASK 0x2UL

#define	_RAC_RX_IFADCENLDOSERIES_series_ldo_disable 0x00000000UL

#define	_RAC_RX_IFADCENLDOSERIES_series_ldo_enable 0x00000001UL

#define	_RAC_RX_IFADCENLDOSERIES_SHIFT 1

#define	_RAC_RX_IFADCENLDOSHUNT_DEFAULT 0x00000000UL

#define	_RAC_RX_IFADCENLDOSHUNT_MASK 0x4UL

#define	_RAC_RX_IFADCENLDOSHUNT_SHIFT 2

#define	_RAC_RX_IFADCENLDOSHUNT_shunt_ldo_disable 0x00000000UL

#define	_RAC_RX_IFADCENLDOSHUNT_shunt_ldo_enable 0x00000001UL

#define	_RAC_RX_LNAMIXENRFPKD_DEFAULT 0x00000000UL

#define	_RAC_RX_LNAMIXENRFPKD_disable 0x00000000UL

#define	_RAC_RX_LNAMIXENRFPKD_enable 0x00000001UL

#define	_RAC_RX_LNAMIXENRFPKD_MASK 0x8UL

#define	_RAC_RX_LNAMIXENRFPKD_SHIFT 3

#define	_RAC_RX_LNAMIXLDOLOWCUR_DEFAULT 0x00000001UL

#define	_RAC_RX_LNAMIXLDOLOWCUR_low_current_mode 0x00000001UL

#define	_RAC_RX_LNAMIXLDOLOWCUR_MASK 0x10UL

#define	_RAC_RX_LNAMIXLDOLOWCUR_regular_mode 0x00000000UL

#define	_RAC_RX_LNAMIXLDOLOWCUR_SHIFT 4

#define	_RAC_RX_LNAMIXREGLOADEN_DEFAULT 0x00000000UL

#define	_RAC_RX_LNAMIXREGLOADEN_disable_resistor 0x00000000UL

#define	_RAC_RX_LNAMIXREGLOADEN_enable_resistor 0x00000001UL

#define	_RAC_RX_LNAMIXREGLOADEN_MASK 0x20UL

#define	_RAC_RX_LNAMIXREGLOADEN_SHIFT 5

#define	_RAC_RX_MASK 0x00003FFFUL

#define	_RAC_RX_PGAENLDO_DEFAULT 0x00000000UL

#define	_RAC_RX_PGAENLDO_disable_ldo 0x00000000UL

#define	_RAC_RX_PGAENLDO_enable_ldo 0x00000001UL

#define	_RAC_RX_PGAENLDO_MASK 0x40UL

#define	_RAC_RX_PGAENLDO_SHIFT 6

#define	_RAC_RX_RESETVALUE 0x00000410UL

#define	_RAC_RX_SYCHPBIASTRIMBUF_DEFAULT 0x00000000UL

#define	_RAC_RX_SYCHPBIASTRIMBUF_i_tail_10u 0x00000000UL

#define	_RAC_RX_SYCHPBIASTRIMBUF_i_tail_20u 0x00000001UL

#define	_RAC_RX_SYCHPBIASTRIMBUF_MASK 0x80UL

#define	_RAC_RX_SYCHPBIASTRIMBUF_SHIFT 7

#define	_RAC_RX_SYCHPQNC3EN_DEFAULT 0x00000000UL

#define	_RAC_RX_SYCHPQNC3EN_MASK 0x100UL

#define	_RAC_RX_SYCHPQNC3EN_qnc_2 0x00000000UL

#define	_RAC_RX_SYCHPQNC3EN_qnc_3 0x00000001UL

#define	_RAC_RX_SYCHPQNC3EN_SHIFT 8

#define	_RAC_RX_SYMMDMODE_DEFAULT 0x00000002UL

#define	_RAC_RX_SYMMDMODE_MASK 0xE00UL

#define	_RAC_RX_SYMMDMODE_notuse_5 0x00000005UL

#define	_RAC_RX_SYMMDMODE_notuse_6 0x00000006UL

#define	_RAC_RX_SYMMDMODE_notuse_7 0x00000007UL

#define	_RAC_RX_SYMMDMODE_qnc_dsm2 0x00000002UL

#define	_RAC_RX_SYMMDMODE_qnc_dsm3 0x00000003UL

#define	_RAC_RX_SYMMDMODE_rx_w_swctrl 0x00000000UL

#define	_RAC_RX_SYMMDMODE_rx_wo_swctrl 0x00000001UL

#define	_RAC_RX_SYMMDMODE_rxlp_wo_swctrl 0x00000004UL

#define	_RAC_RX_SYMMDMODE_SHIFT 9

#define	_RAC_RX_SYPFDCHPLPEN_DEFAULT 0x00000000UL

#define	_RAC_RX_SYPFDCHPLPEN_disable 0x00000000UL

#define	_RAC_RX_SYPFDCHPLPEN_enable 0x00000001UL

#define	_RAC_RX_SYPFDCHPLPEN_MASK 0x1000UL

#define	_RAC_RX_SYPFDCHPLPEN_SHIFT 12

#define	_RAC_RX_SYPFDFPWEN_DEFAULT 0x00000000UL

#define	_RAC_RX_SYPFDFPWEN_disable 0x00000000UL

#define	_RAC_RX_SYPFDFPWEN_enable 0x00000001UL

#define	_RAC_RX_SYPFDFPWEN_MASK 0x2000UL

#define	_RAC_RX_SYPFDFPWEN_SHIFT 13

#define	_RAC_RXENSRCEN_CHANNELBUSYEN_DEFAULT 0x00000000UL

#define	_RAC_RXENSRCEN_CHANNELBUSYEN_MASK 0x100UL

#define	_RAC_RXENSRCEN_CHANNELBUSYEN_SHIFT 8

#define	_RAC_RXENSRCEN_DEMODRXREQEN_DEFAULT 0x00000000UL

#define	_RAC_RXENSRCEN_DEMODRXREQEN_MASK 0x1000UL

#define	_RAC_RXENSRCEN_DEMODRXREQEN_SHIFT 12

#define	_RAC_RXENSRCEN_FRAMEDETEN_DEFAULT 0x00000000UL

#define	_RAC_RXENSRCEN_FRAMEDETEN_MASK 0x800UL

#define	_RAC_RXENSRCEN_FRAMEDETEN_SHIFT 11

#define	_RAC_RXENSRCEN_MASK 0x00003FFFUL

#define	_RAC_RXENSRCEN_PREDETEN_DEFAULT 0x00000000UL

#define	_RAC_RXENSRCEN_PREDETEN_MASK 0x400UL

#define	_RAC_RXENSRCEN_PREDETEN_SHIFT 10

#define	_RAC_RXENSRCEN_PRSRXEN_DEFAULT 0x00000000UL

#define	_RAC_RXENSRCEN_PRSRXEN_MASK 0x2000UL

#define	_RAC_RXENSRCEN_PRSRXEN_SHIFT 13

#define	_RAC_RXENSRCEN_RESETVALUE 0x00000000UL

#define	_RAC_RXENSRCEN_SWRXEN_DEFAULT 0x00000000UL

#define	_RAC_RXENSRCEN_SWRXEN_MASK 0xFFUL

#define	_RAC_RXENSRCEN_SWRXEN_SHIFT 0

#define	_RAC_RXENSRCEN_TIMDETEN_DEFAULT 0x00000000UL

#define	_RAC_RXENSRCEN_TIMDETEN_MASK 0x200UL

#define	_RAC_RXENSRCEN_TIMDETEN_SHIFT 9

#define	_RAC_SCRATCH0_MASK 0xFFFFFFFFUL

#define	_RAC_SCRATCH0_RESETVALUE 0x00000000UL

#define	_RAC_SCRATCH0_SCRATCH0_DEFAULT 0x00000000UL

#define	_RAC_SCRATCH0_SCRATCH0_MASK 0xFFFFFFFFUL

#define	_RAC_SCRATCH0_SCRATCH0_SHIFT 0

#define	_RAC_SCRATCH1_MASK 0xFFFFFFFFUL

#define	_RAC_SCRATCH1_RESETVALUE 0x00000000UL

#define	_RAC_SCRATCH1_SCRATCH1_DEFAULT 0x00000000UL

#define	_RAC_SCRATCH1_SCRATCH1_MASK 0xFFFFFFFFUL

#define	_RAC_SCRATCH1_SCRATCH1_SHIFT 0

#define	_RAC_SCRATCH2_MASK 0xFFFFFFFFUL

#define	_RAC_SCRATCH2_RESETVALUE 0x00000000UL

#define	_RAC_SCRATCH2_SCRATCH2_DEFAULT 0x00000000UL

#define	_RAC_SCRATCH2_SCRATCH2_MASK 0xFFFFFFFFUL

#define	_RAC_SCRATCH2_SCRATCH2_SHIFT 0

#define	_RAC_SCRATCH3_MASK 0xFFFFFFFFUL

#define	_RAC_SCRATCH3_RESETVALUE 0x00000000UL

#define	_RAC_SCRATCH3_SCRATCH3_DEFAULT 0x00000000UL

#define	_RAC_SCRATCH3_SCRATCH3_MASK 0xFFFFFFFFUL

#define	_RAC_SCRATCH3_SCRATCH3_SHIFT 0

#define	_RAC_SCRATCH4_MASK 0xFFFFFFFFUL

#define	_RAC_SCRATCH4_RESETVALUE 0x00000000UL

#define	_RAC_SCRATCH4_SCRATCH4_DEFAULT 0x00000000UL

#define	_RAC_SCRATCH4_SCRATCH4_MASK 0xFFFFFFFFUL

#define	_RAC_SCRATCH4_SCRATCH4_SHIFT 0

#define	_RAC_SCRATCH5_MASK 0xFFFFFFFFUL

#define	_RAC_SCRATCH5_RESETVALUE 0x00000000UL

#define	_RAC_SCRATCH5_SCRATCH5_DEFAULT 0x00000000UL

#define	_RAC_SCRATCH5_SCRATCH5_MASK 0xFFFFFFFFUL

#define	_RAC_SCRATCH5_SCRATCH5_SHIFT 0

#define	_RAC_SCRATCH6_MASK 0xFFFFFFFFUL

#define	_RAC_SCRATCH6_RESETVALUE 0x00000000UL

#define	_RAC_SCRATCH6_SCRATCH6_DEFAULT 0x00000000UL

#define	_RAC_SCRATCH6_SCRATCH6_MASK 0xFFFFFFFFUL

#define	_RAC_SCRATCH6_SCRATCH6_SHIFT 0

#define	_RAC_SCRATCH7_MASK 0xFFFFFFFFUL

#define	_RAC_SCRATCH7_RESETVALUE 0x00000000UL

#define	_RAC_SCRATCH7_SCRATCH7_DEFAULT 0x00000000UL

#define	_RAC_SCRATCH7_SCRATCH7_MASK 0xFFFFFFFFUL

#define	_RAC_SCRATCH7_SCRATCH7_SHIFT 0

#define	_RAC_SEQCMD_ABORT_DEFAULT 0x00000000UL

#define	_RAC_SEQCMD_ABORT_MASK 0x20UL

#define	_RAC_SEQCMD_ABORT_SHIFT 5

#define	_RAC_SEQCMD_ABORTENCLEAR_DEFAULT 0x00000000UL

#define	_RAC_SEQCMD_ABORTENCLEAR_MASK 0x80UL

#define	_RAC_SEQCMD_ABORTENCLEAR_SHIFT 7

#define	_RAC_SEQCMD_ABORTENSET_DEFAULT 0x00000000UL

#define	_RAC_SEQCMD_ABORTENSET_MASK 0x40UL

#define	_RAC_SEQCMD_ABORTENSET_SHIFT 6

#define	_RAC_SEQCMD_BKPTDIS_DEFAULT 0x00000000UL

#define	_RAC_SEQCMD_BKPTDIS_MASK 0x10UL

#define	_RAC_SEQCMD_BKPTDIS_SHIFT 4

#define	_RAC_SEQCMD_BKPTEN_DEFAULT 0x00000000UL

#define	_RAC_SEQCMD_BKPTEN_MASK 0x8UL

#define	_RAC_SEQCMD_BKPTEN_SHIFT 3

#define	_RAC_SEQCMD_HALT_DEFAULT 0x00000000UL

#define	_RAC_SEQCMD_HALT_MASK 0x1UL

#define	_RAC_SEQCMD_HALT_SHIFT 0

#define	_RAC_SEQCMD_MASK 0x000000FFUL

#define	_RAC_SEQCMD_RESETVALUE 0x00000000UL

#define	_RAC_SEQCMD_RESUME_DEFAULT 0x00000000UL

#define	_RAC_SEQCMD_RESUME_MASK 0x4UL

#define	_RAC_SEQCMD_RESUME_SHIFT 2

#define	_RAC_SEQCMD_STEP_DEFAULT 0x00000000UL

#define	_RAC_SEQCMD_STEP_MASK 0x2UL

#define	_RAC_SEQCMD_STEP_SHIFT 1

#define	_RAC_SEQCTRL_COMPACT_CONTINUE 0x00000001UL

#define	_RAC_SEQCTRL_COMPACT_DEFAULT 0x00000000UL

#define	_RAC_SEQCTRL_COMPACT_MASK 0x1UL

#define	_RAC_SEQCTRL_COMPACT_SHIFT 0

#define	_RAC_SEQCTRL_COMPACT_WRAP 0x00000000UL

#define	_RAC_SEQCTRL_COMPINVALMODE_COMPEVENT 0x00000002UL

#define	_RAC_SEQCTRL_COMPINVALMODE_DEFAULT 0x00000000UL

#define	_RAC_SEQCTRL_COMPINVALMODE_MASK 0x6UL

#define	_RAC_SEQCTRL_COMPINVALMODE_NEVER 0x00000000UL

#define	_RAC_SEQCTRL_COMPINVALMODE_SHIFT 1

#define	_RAC_SEQCTRL_COMPINVALMODE_STATECHANGE 0x00000001UL

#define	_RAC_SEQCTRL_COMPINVALMODE_STATECOMP 0x00000003UL

#define	_RAC_SEQCTRL_CPUHALTREQEN_DEFAULT 0x00000000UL

#define	_RAC_SEQCTRL_CPUHALTREQEN_MASK 0x800UL

#define	_RAC_SEQCTRL_CPUHALTREQEN_SHIFT 11

#define	_RAC_SEQCTRL_CPUHALTREQEN_X0 0x00000000UL

#define	_RAC_SEQCTRL_CPUHALTREQEN_X1 0x00000001UL

#define	_RAC_SEQCTRL_MASK 0x00001C07UL

#define	_RAC_SEQCTRL_RESETVALUE 0x00000000UL

#define	_RAC_SEQCTRL_SEQHALTUPONCPUHALTEN_DEFAULT 0x00000000UL

#define	_RAC_SEQCTRL_SEQHALTUPONCPUHALTEN_MASK 0x1000UL

#define	_RAC_SEQCTRL_SEQHALTUPONCPUHALTEN_SHIFT 12

#define	_RAC_SEQCTRL_SEQHALTUPONCPUHALTEN_X0 0x00000000UL

#define	_RAC_SEQCTRL_SEQHALTUPONCPUHALTEN_X1 0x00000001UL

#define	_RAC_SEQCTRL_STIMERDEBUGRUN_DEFAULT 0x00000000UL

#define	_RAC_SEQCTRL_STIMERDEBUGRUN_MASK 0x400UL

#define	_RAC_SEQCTRL_STIMERDEBUGRUN_SHIFT 10

#define	_RAC_SEQCTRL_STIMERDEBUGRUN_X0 0x00000000UL

#define	_RAC_SEQCTRL_STIMERDEBUGRUN_X1 0x00000001UL

#define	_RAC_SEQSTATUS_ABORTEN_DEFAULT 0x00000000UL

#define	_RAC_SEQSTATUS_ABORTEN_MASK 0x400UL

#define	_RAC_SEQSTATUS_ABORTEN_SHIFT 10

#define	_RAC_SEQSTATUS_ABORTEN_X0 0x00000000UL

#define	_RAC_SEQSTATUS_ABORTEN_X1 0x00000001UL

#define	_RAC_SEQSTATUS_BKPT_DEFAULT 0x00000000UL

#define	_RAC_SEQSTATUS_BKPT_MASK 0x2UL

#define	_RAC_SEQSTATUS_BKPT_SHIFT 1

#define	_RAC_SEQSTATUS_CARRY_DEFAULT 0x00000000UL

#define	_RAC_SEQSTATUS_CARRY_MASK 0x100UL

#define	_RAC_SEQSTATUS_CARRY_SHIFT 8

#define	_RAC_SEQSTATUS_DONE_DEFAULT 0x00000001UL

#define	_RAC_SEQSTATUS_DONE_MASK 0x10UL

#define	_RAC_SEQSTATUS_DONE_SHIFT 4

#define	_RAC_SEQSTATUS_MASK 0x000005FFUL

#define	_RAC_SEQSTATUS_NEG_DEFAULT 0x00000000UL

#define	_RAC_SEQSTATUS_NEG_MASK 0x20UL

#define	_RAC_SEQSTATUS_NEG_SHIFT 5

#define	_RAC_SEQSTATUS_POS_DEFAULT 0x00000000UL

#define	_RAC_SEQSTATUS_POS_MASK 0x40UL

#define	_RAC_SEQSTATUS_POS_SHIFT 6

#define	_RAC_SEQSTATUS_RESETVALUE 0x00000010UL

#define	_RAC_SEQSTATUS_STOPPED_DEFAULT 0x00000000UL

#define	_RAC_SEQSTATUS_STOPPED_MASK 0x1UL

#define	_RAC_SEQSTATUS_STOPPED_SHIFT 0

#define	_RAC_SEQSTATUS_WAITING_DEFAULT 0x00000000UL

#define	_RAC_SEQSTATUS_WAITING_MASK 0x4UL

#define	_RAC_SEQSTATUS_WAITING_SHIFT 2

#define	_RAC_SEQSTATUS_WAITMODE_ALL 0x00000001UL

#define	_RAC_SEQSTATUS_WAITMODE_ANY 0x00000000UL

#define	_RAC_SEQSTATUS_WAITMODE_DEFAULT 0x00000000UL

#define	_RAC_SEQSTATUS_WAITMODE_MASK 0x8UL

#define	_RAC_SEQSTATUS_WAITMODE_SHIFT 3

#define	_RAC_SEQSTATUS_ZERO_DEFAULT 0x00000000UL

#define	_RAC_SEQSTATUS_ZERO_MASK 0x80UL

#define	_RAC_SEQSTATUS_ZERO_SHIFT 7

#define	_RAC_SR0_MASK 0xFFFFFFFFUL

#define	_RAC_SR0_RESETVALUE 0x00000000UL

#define	_RAC_SR0_SR0_DEFAULT 0x00000000UL

#define	_RAC_SR0_SR0_MASK 0xFFFFFFFFUL

#define	_RAC_SR0_SR0_SHIFT 0

#define	_RAC_SR1_MASK 0xFFFFFFFFUL

#define	_RAC_SR1_RESETVALUE 0x00000000UL

#define	_RAC_SR1_SR1_DEFAULT 0x00000000UL

#define	_RAC_SR1_SR1_MASK 0xFFFFFFFFUL

#define	_RAC_SR1_SR1_SHIFT 0

#define	_RAC_SR2_MASK 0xFFFFFFFFUL

#define	_RAC_SR2_RESETVALUE 0x00000000UL

#define	_RAC_SR2_SR2_DEFAULT 0x00000000UL

#define	_RAC_SR2_SR2_MASK 0xFFFFFFFFUL

#define	_RAC_SR2_SR2_SHIFT 0

#define	_RAC_SR3_MASK 0xFFFFFFFFUL

#define	_RAC_SR3_RESETVALUE 0x00000000UL

#define	_RAC_SR3_SR3_DEFAULT 0x00000000UL

#define	_RAC_SR3_SR3_MASK 0xFFFFFFFFUL

#define	_RAC_SR3_SR3_SHIFT 0

#define	_RAC_STATUS2_MASK 0x00000FFFUL

#define	_RAC_STATUS2_PREVSTATE1_DEFAULT 0x00000000UL

#define	_RAC_STATUS2_PREVSTATE1_MASK 0xFUL

#define	_RAC_STATUS2_PREVSTATE1_OFF 0x00000000UL

#define	_RAC_STATUS2_PREVSTATE1_RX2RX 0x00000005UL

#define	_RAC_STATUS2_PREVSTATE1_RX2TX 0x00000007UL

#define	_RAC_STATUS2_PREVSTATE1_RXFRAME 0x00000003UL

#define	_RAC_STATUS2_PREVSTATE1_RXOVERFLOW 0x00000006UL

#define	_RAC_STATUS2_PREVSTATE1_RXPD 0x00000004UL

#define	_RAC_STATUS2_PREVSTATE1_RXSEARCH 0x00000002UL

#define	_RAC_STATUS2_PREVSTATE1_RXWARM 0x00000001UL

#define	_RAC_STATUS2_PREVSTATE1_SHIFT 0

#define	_RAC_STATUS2_PREVSTATE1_SHUTDOWN 0x0000000DUL

#define	_RAC_STATUS2_PREVSTATE1_TX 0x00000009UL

#define	_RAC_STATUS2_PREVSTATE1_TX2RX 0x0000000BUL

#define	_RAC_STATUS2_PREVSTATE1_TX2TX 0x0000000CUL

#define	_RAC_STATUS2_PREVSTATE1_TXPD 0x0000000AUL

#define	_RAC_STATUS2_PREVSTATE1_TXWARM 0x00000008UL

#define	_RAC_STATUS2_PREVSTATE2_DEFAULT 0x00000000UL

#define	_RAC_STATUS2_PREVSTATE2_MASK 0xF0UL

#define	_RAC_STATUS2_PREVSTATE2_OFF 0x00000000UL

#define	_RAC_STATUS2_PREVSTATE2_RX2RX 0x00000005UL

#define	_RAC_STATUS2_PREVSTATE2_RX2TX 0x00000007UL

#define	_RAC_STATUS2_PREVSTATE2_RXFRAME 0x00000003UL

#define	_RAC_STATUS2_PREVSTATE2_RXOVERFLOW 0x00000006UL

#define	_RAC_STATUS2_PREVSTATE2_RXPD 0x00000004UL

#define	_RAC_STATUS2_PREVSTATE2_RXSEARCH 0x00000002UL

#define	_RAC_STATUS2_PREVSTATE2_RXWARM 0x00000001UL

#define	_RAC_STATUS2_PREVSTATE2_SHIFT 4

#define	_RAC_STATUS2_PREVSTATE2_SHUTDOWN 0x0000000DUL

#define	_RAC_STATUS2_PREVSTATE2_TX 0x00000009UL

#define	_RAC_STATUS2_PREVSTATE2_TX2RX 0x0000000BUL

#define	_RAC_STATUS2_PREVSTATE2_TX2TX 0x0000000CUL

#define	_RAC_STATUS2_PREVSTATE2_TXPD 0x0000000AUL

#define	_RAC_STATUS2_PREVSTATE2_TXWARM 0x00000008UL

#define	_RAC_STATUS2_PREVSTATE3_DEFAULT 0x00000000UL

#define	_RAC_STATUS2_PREVSTATE3_MASK 0xF00UL

#define	_RAC_STATUS2_PREVSTATE3_OFF 0x00000000UL

#define	_RAC_STATUS2_PREVSTATE3_RX2RX 0x00000005UL

#define	_RAC_STATUS2_PREVSTATE3_RX2TX 0x00000007UL

#define	_RAC_STATUS2_PREVSTATE3_RXFRAME 0x00000003UL

#define	_RAC_STATUS2_PREVSTATE3_RXOVERFLOW 0x00000006UL

#define	_RAC_STATUS2_PREVSTATE3_RXPD 0x00000004UL

#define	_RAC_STATUS2_PREVSTATE3_RXSEARCH 0x00000002UL

#define	_RAC_STATUS2_PREVSTATE3_RXWARM 0x00000001UL

#define	_RAC_STATUS2_PREVSTATE3_SHIFT 8

#define	_RAC_STATUS2_PREVSTATE3_SHUTDOWN 0x0000000DUL

#define	_RAC_STATUS2_PREVSTATE3_TX 0x00000009UL

#define	_RAC_STATUS2_PREVSTATE3_TX2RX 0x0000000BUL

#define	_RAC_STATUS2_PREVSTATE3_TX2TX 0x0000000CUL

#define	_RAC_STATUS2_PREVSTATE3_TXPD 0x0000000AUL

#define	_RAC_STATUS2_PREVSTATE3_TXWARM 0x00000008UL

#define	_RAC_STATUS2_RESETVALUE 0x00000000UL

#define	_RAC_STATUS_FORCESTATEACTIVE_DEFAULT 0x00000000UL

#define	_RAC_STATUS_FORCESTATEACTIVE_MASK 0x80000UL

#define	_RAC_STATUS_FORCESTATEACTIVE_SHIFT 19

#define	_RAC_STATUS_FORCESTATEACTIVE_X0 0x00000000UL

#define	_RAC_STATUS_FORCESTATEACTIVE_X1 0x00000001UL

#define	_RAC_STATUS_MASK 0xEF38FFFFUL

#define	_RAC_STATUS_RESETVALUE 0x00000000UL

#define	_RAC_STATUS_RXENS_DEFAULT 0x00000000UL

#define	_RAC_STATUS_RXENS_MASK 0x80000000UL

#define	_RAC_STATUS_RXENS_SHIFT 31

#define	_RAC_STATUS_RXENS_X0 0x00000000UL

#define	_RAC_STATUS_RXENS_X1 0x00000001UL

#define	_RAC_STATUS_RXMASK_DEFAULT 0x00000000UL

#define	_RAC_STATUS_RXMASK_MASK 0xFFFFUL

#define	_RAC_STATUS_RXMASK_SHIFT 0

#define	_RAC_STATUS_STATE_DEFAULT 0x00000000UL

#define	_RAC_STATUS_STATE_MASK 0xF000000UL

#define	_RAC_STATUS_STATE_OFF 0x00000000UL

#define	_RAC_STATUS_STATE_RX2RX 0x00000005UL

#define	_RAC_STATUS_STATE_RX2TX 0x00000007UL

#define	_RAC_STATUS_STATE_RXFRAME 0x00000003UL

#define	_RAC_STATUS_STATE_RXOVERFLOW 0x00000006UL

#define	_RAC_STATUS_STATE_RXPD 0x00000004UL

#define	_RAC_STATUS_STATE_RXSEARCH 0x00000002UL

#define	_RAC_STATUS_STATE_RXWARM 0x00000001UL

#define	_RAC_STATUS_STATE_SHIFT 24

#define	_RAC_STATUS_STATE_SHUTDOWN 0x0000000DUL

#define	_RAC_STATUS_STATE_TX 0x00000009UL

#define	_RAC_STATUS_STATE_TX2RX 0x0000000BUL

#define	_RAC_STATUS_STATE_TX2TX 0x0000000CUL

#define	_RAC_STATUS_STATE_TXPD 0x0000000AUL

#define	_RAC_STATUS_STATE_TXWARM 0x00000008UL

#define	_RAC_STATUS_TXAFTERFRAMEACTIVE_DEFAULT 0x00000000UL

#define	_RAC_STATUS_TXAFTERFRAMEACTIVE_MASK 0x200000UL

#define	_RAC_STATUS_TXAFTERFRAMEACTIVE_SHIFT 21

#define	_RAC_STATUS_TXAFTERFRAMEACTIVE_X0 0x00000000UL

#define	_RAC_STATUS_TXAFTERFRAMEACTIVE_X1 0x00000001UL

#define	_RAC_STATUS_TXAFTERFRAMEPEND_DEFAULT 0x00000000UL

#define	_RAC_STATUS_TXAFTERFRAMEPEND_MASK 0x100000UL

#define	_RAC_STATUS_TXAFTERFRAMEPEND_SHIFT 20

#define	_RAC_STATUS_TXAFTERFRAMEPEND_X0 0x00000000UL

#define	_RAC_STATUS_TXAFTERFRAMEPEND_X1 0x00000001UL

#define	_RAC_STATUS_TXENS_DEFAULT 0x00000000UL

#define	_RAC_STATUS_TXENS_MASK 0x40000000UL

#define	_RAC_STATUS_TXENS_SHIFT 30

#define	_RAC_STATUS_TXENS_X0 0x00000000UL

#define	_RAC_STATUS_TXENS_X1 0x00000001UL

#define	_RAC_STIMER_MASK 0x0000FFFFUL

#define	_RAC_STIMER_RESETVALUE 0x00000000UL

#define	_RAC_STIMER_STIMER_DEFAULT 0x00000000UL

#define	_RAC_STIMER_STIMER_MASK 0xFFFFUL

#define	_RAC_STIMER_STIMER_SHIFT 0

#define	_RAC_STIMERCOMP_MASK 0x0000FFFFUL

#define	_RAC_STIMERCOMP_RESETVALUE 0x00000000UL

#define	_RAC_STIMERCOMP_STIMERCOMP_DEFAULT 0x00000000UL

#define	_RAC_STIMERCOMP_STIMERCOMP_MASK 0xFFFFUL

#define	_RAC_STIMERCOMP_STIMERCOMP_SHIFT 0

#define	_RAC_SYCAL_MASK 0x03018700UL

#define	_RAC_SYCAL_RESETVALUE 0x01008100UL

#define	_RAC_SYCAL_SYHILOADCHPREG_DEFAULT 0x00000001UL

#define	_RAC_SYCAL_SYHILOADCHPREG_i_350uA 0x00000000UL

#define	_RAC_SYCAL_SYHILOADCHPREG_i_500uA 0x00000001UL

#define	_RAC_SYCAL_SYHILOADCHPREG_i_550uA 0x00000002UL

#define	_RAC_SYCAL_SYHILOADCHPREG_i_700uA 0x00000003UL

#define	_RAC_SYCAL_SYHILOADCHPREG_MASK 0x3000000UL

#define	_RAC_SYCAL_SYHILOADCHPREG_SHIFT 24

#define	_RAC_SYCAL_SYVCOMODEPKD_DEFAULT 0x00000001UL

#define	_RAC_SYCAL_SYVCOMODEPKD_MASK 0x100UL

#define	_RAC_SYCAL_SYVCOMODEPKD_SHIFT 8

#define	_RAC_SYCAL_SYVCOMODEPKD_t_openloop_0 0x00000000UL

#define	_RAC_SYCAL_SYVCOMODEPKD_t_pkdetect_1 0x00000001UL

#define	_RAC_SYCAL_SYVCOMORECURRENT_DEFAULT 0x00000000UL

#define	_RAC_SYCAL_SYVCOMORECURRENT_MASK 0x200UL

#define	_RAC_SYCAL_SYVCOMORECURRENT_more_current_0 0x00000000UL

#define	_RAC_SYCAL_SYVCOMORECURRENT_more_current_1 0x00000001UL

#define	_RAC_SYCAL_SYVCOMORECURRENT_SHIFT 9

#define	_RAC_SYCAL_SYVCOSLOWNOISEFILTER_DEFAULT 0x00000000UL

#define	_RAC_SYCAL_SYVCOSLOWNOISEFILTER_MASK 0x400UL

#define	_RAC_SYCAL_SYVCOSLOWNOISEFILTER_SHIFT 10

#define	_RAC_SYCAL_SYVCOSLOWNOISEFILTER_slow_noise_filter_0 0x00000000UL

#define	_RAC_SYCAL_SYVCOSLOWNOISEFILTER_slow_noise_filter_1 0x00000001UL

#define	_RAC_SYCAL_SYVCOVCAPVCM_DEFAULT 0x00000001UL

#define	_RAC_SYCAL_SYVCOVCAPVCM_MASK 0x18000UL

#define	_RAC_SYCAL_SYVCOVCAPVCM_SHIFT 15

#define	_RAC_SYEN_MASK 0x00007FFFUL

#define	_RAC_SYEN_RESETVALUE 0x00000000UL

#define	_RAC_SYEN_SYCHPEN_DEFAULT 0x00000000UL

#define	_RAC_SYEN_SYCHPEN_disable 0x00000000UL

#define	_RAC_SYEN_SYCHPEN_enable 0x00000001UL

#define	_RAC_SYEN_SYCHPEN_MASK 0x1UL

#define	_RAC_SYEN_SYCHPEN_SHIFT 0

#define	_RAC_SYEN_SYCHPLPEN_DEFAULT 0x00000000UL

#define	_RAC_SYEN_SYCHPLPEN_disable 0x00000000UL

#define	_RAC_SYEN_SYCHPLPEN_enable 0x00000001UL

#define	_RAC_SYEN_SYCHPLPEN_MASK 0x2UL

#define	_RAC_SYEN_SYCHPLPEN_SHIFT 1

#define	_RAC_SYEN_SYENCHPREG_DEFAULT 0x00000000UL

#define	_RAC_SYEN_SYENCHPREG_Disable 0x00000000UL

#define	_RAC_SYEN_SYENCHPREG_Enable 0x00000001UL

#define	_RAC_SYEN_SYENCHPREG_MASK 0x4UL

#define	_RAC_SYEN_SYENCHPREG_SHIFT 2

#define	_RAC_SYEN_SYENCHPREPLICA_DEFAULT 0x00000000UL

#define	_RAC_SYEN_SYENCHPREPLICA_disable 0x00000000UL

#define	_RAC_SYEN_SYENCHPREPLICA_enable 0x00000001UL

#define	_RAC_SYEN_SYENCHPREPLICA_MASK 0x8UL

#define	_RAC_SYEN_SYENCHPREPLICA_SHIFT 3

#define	_RAC_SYEN_SYENMMDREG_DEFAULT 0x00000000UL

#define	_RAC_SYEN_SYENMMDREG_Disable 0x00000000UL

#define	_RAC_SYEN_SYENMMDREG_Enable 0x00000001UL

#define	_RAC_SYEN_SYENMMDREG_MASK 0x10UL

#define	_RAC_SYEN_SYENMMDREG_SHIFT 4

#define	_RAC_SYEN_SYENMMDREPLICA1_DEFAULT 0x00000000UL

#define	_RAC_SYEN_SYENMMDREPLICA1_disable 0x00000000UL

#define	_RAC_SYEN_SYENMMDREPLICA1_enable 0x00000001UL

#define	_RAC_SYEN_SYENMMDREPLICA1_MASK 0x20UL

#define	_RAC_SYEN_SYENMMDREPLICA1_SHIFT 5

#define	_RAC_SYEN_SYENMMDREPLICA2_DEFAULT 0x00000000UL

#define	_RAC_SYEN_SYENMMDREPLICA2_Disable 0x00000000UL

#define	_RAC_SYEN_SYENMMDREPLICA2_Enable 0x00000001UL

#define	_RAC_SYEN_SYENMMDREPLICA2_MASK 0x40UL

#define	_RAC_SYEN_SYENMMDREPLICA2_SHIFT 6

#define	_RAC_SYEN_SYENVCOBIAS_DEFAULT 0x00000000UL

#define	_RAC_SYEN_SYENVCOBIAS_en_vco_bias_0 0x00000000UL

#define	_RAC_SYEN_SYENVCOBIAS_en_vco_bias_1 0x00000001UL

#define	_RAC_SYEN_SYENVCOBIAS_MASK 0x80UL

#define	_RAC_SYEN_SYENVCOBIAS_SHIFT 7

#define	_RAC_SYEN_SYENVCOPFET_DEFAULT 0x00000000UL

#define	_RAC_SYEN_SYENVCOPFET_en_vco_pfet_0 0x00000000UL

#define	_RAC_SYEN_SYENVCOPFET_en_vco_pfet_1 0x00000001UL

#define	_RAC_SYEN_SYENVCOPFET_MASK 0x100UL

#define	_RAC_SYEN_SYENVCOPFET_SHIFT 8

#define	_RAC_SYEN_SYENVCOREG_DEFAULT 0x00000000UL

#define	_RAC_SYEN_SYENVCOREG_en_vco_reg_0 0x00000000UL

#define	_RAC_SYEN_SYENVCOREG_en_vco_reg_1 0x00000001UL

#define	_RAC_SYEN_SYENVCOREG_MASK 0x200UL

#define	_RAC_SYEN_SYENVCOREG_SHIFT 9

#define	_RAC_SYEN_SYLODIVEN_DEFAULT 0x00000000UL

#define	_RAC_SYEN_SYLODIVEN_disable 0x00000000UL

#define	_RAC_SYEN_SYLODIVEN_enable 0x00000001UL

#define	_RAC_SYEN_SYLODIVEN_MASK 0x400UL

#define	_RAC_SYEN_SYLODIVEN_SHIFT 10

#define	_RAC_SYEN_SYLODIVLDOBIASEN_DEFAULT 0x00000000UL

#define	_RAC_SYEN_SYLODIVLDOBIASEN_disable 0x00000000UL

#define	_RAC_SYEN_SYLODIVLDOBIASEN_enable 0x00000001UL

#define	_RAC_SYEN_SYLODIVLDOBIASEN_MASK 0x800UL

#define	_RAC_SYEN_SYLODIVLDOBIASEN_SHIFT 11

#define	_RAC_SYEN_SYLODIVLDOEN_DEFAULT 0x00000000UL

#define	_RAC_SYEN_SYLODIVLDOEN_disable 0x00000000UL

#define	_RAC_SYEN_SYLODIVLDOEN_enable 0x00000001UL

#define	_RAC_SYEN_SYLODIVLDOEN_MASK 0x1000UL

#define	_RAC_SYEN_SYLODIVLDOEN_SHIFT 12

#define	_RAC_SYEN_SYSTARTCHPREG_DEFAULT 0x00000000UL

#define	_RAC_SYEN_SYSTARTCHPREG_fast_startup 0x00000001UL

#define	_RAC_SYEN_SYSTARTCHPREG_MASK 0x2000UL

#define	_RAC_SYEN_SYSTARTCHPREG_no_fast_startup 0x00000000UL

#define	_RAC_SYEN_SYSTARTCHPREG_SHIFT 13

#define	_RAC_SYEN_SYSTARTMMDREG_DEFAULT 0x00000000UL

#define	_RAC_SYEN_SYSTARTMMDREG_fast_startup 0x00000001UL

#define	_RAC_SYEN_SYSTARTMMDREG_MASK 0x4000UL

#define	_RAC_SYEN_SYSTARTMMDREG_no_fast_startup 0x00000000UL

#define	_RAC_SYEN_SYSTARTMMDREG_SHIFT 14

#define	_RAC_SYLOEN_MASK 0x00001FFFUL

#define	_RAC_SYLOEN_RESETVALUE 0x00000000UL

#define	_RAC_SYLOEN_SYLODIVRLO12G4EN_DEFAULT 0x00000000UL

#define	_RAC_SYLOEN_SYLODIVRLO12G4EN_disable 0x00000000UL

#define	_RAC_SYLOEN_SYLODIVRLO12G4EN_enable 0x00000001UL

#define	_RAC_SYLOEN_SYLODIVRLO12G4EN_MASK 0x2UL

#define	_RAC_SYLOEN_SYLODIVRLO12G4EN_SHIFT 1

#define	_RAC_SYLOEN_SYLODIVRLO22G4EN_DEFAULT 0x00000000UL

#define	_RAC_SYLOEN_SYLODIVRLO22G4EN_disable 0x00000000UL

#define	_RAC_SYLOEN_SYLODIVRLO22G4EN_enable 0x00000001UL

#define	_RAC_SYLOEN_SYLODIVRLO22G4EN_MASK 0x8UL

#define	_RAC_SYLOEN_SYLODIVRLO22G4EN_SHIFT 3

#define	_RAC_SYLOEN_SYLODIVRLOADCCLK2G4EN_DEFAULT 0x00000000UL

#define	_RAC_SYLOEN_SYLODIVRLOADCCLK2G4EN_disable 0x00000000UL

#define	_RAC_SYLOEN_SYLODIVRLOADCCLK2G4EN_enable 0x00000001UL

#define	_RAC_SYLOEN_SYLODIVRLOADCCLK2G4EN_MASK 0x1UL

#define	_RAC_SYLOEN_SYLODIVRLOADCCLK2G4EN_SHIFT 0

#define	_RAC_SYLOEN_SYLODIVTLO0DBM2G4AUXEN_DEFAULT 0x00000000UL

#define	_RAC_SYLOEN_SYLODIVTLO0DBM2G4AUXEN_disable 0x00000000UL

#define	_RAC_SYLOEN_SYLODIVTLO0DBM2G4AUXEN_enable 0x00000001UL

#define	_RAC_SYLOEN_SYLODIVTLO0DBM2G4AUXEN_MASK 0x20UL

#define	_RAC_SYLOEN_SYLODIVTLO0DBM2G4AUXEN_SHIFT 5

#define	_RAC_SYLOEN_SYLODIVTLO0DBM2G4EN_DEFAULT 0x00000000UL

#define	_RAC_SYLOEN_SYLODIVTLO0DBM2G4EN_disable 0x00000000UL

#define	_RAC_SYLOEN_SYLODIVTLO0DBM2G4EN_enable 0x00000001UL

#define	_RAC_SYLOEN_SYLODIVTLO0DBM2G4EN_MASK 0x40UL

#define	_RAC_SYLOEN_SYLODIVTLO0DBM2G4EN_SHIFT 6

#define	_RAC_SYLOEN_SYLODIVTLO20DBM2G4AUXEN_DEFAULT 0x00000000UL

#define	_RAC_SYLOEN_SYLODIVTLO20DBM2G4AUXEN_disable 0x00000000UL

#define	_RAC_SYLOEN_SYLODIVTLO20DBM2G4AUXEN_enable 0x00000001UL

#define	_RAC_SYLOEN_SYLODIVTLO20DBM2G4AUXEN_MASK 0x200UL

#define	_RAC_SYLOEN_SYLODIVTLO20DBM2G4AUXEN_SHIFT 9

#define	_RAC_SYLOEN_SYLODIVTLO20DBM2G4EN_DEFAULT 0x00000000UL

#define	_RAC_SYLOEN_SYLODIVTLO20DBM2G4EN_disable 0x00000000UL

#define	_RAC_SYLOEN_SYLODIVTLO20DBM2G4EN_enable 0x00000001UL

#define	_RAC_SYLOEN_SYLODIVTLO20DBM2G4EN_MASK 0x400UL

#define	_RAC_SYLOEN_SYLODIVTLO20DBM2G4EN_SHIFT 10

#define	_RAC_SYMMDCTRL_MASK 0x00000007UL

#define	_RAC_SYMMDCTRL_RESETVALUE 0x00000000UL

#define	_RAC_SYMMDCTRL_SYMMDDIVRSDIG_DEFAULT 0x00000000UL

#define	_RAC_SYMMDCTRL_SYMMDDIVRSDIG_Divideby1 0x00000000UL

#define	_RAC_SYMMDCTRL_SYMMDDIVRSDIG_Divideby2 0x00000001UL

#define	_RAC_SYMMDCTRL_SYMMDDIVRSDIG_Divideby4 0x00000002UL

#define	_RAC_SYMMDCTRL_SYMMDDIVRSDIG_Divideby8 0x00000003UL

#define	_RAC_SYMMDCTRL_SYMMDDIVRSDIG_MASK 0x6UL

#define	_RAC_SYMMDCTRL_SYMMDDIVRSDIG_SHIFT 1

#define	_RAC_SYMMDCTRL_SYMMDENRSDIG_DEFAULT 0x00000000UL

#define	_RAC_SYMMDCTRL_SYMMDENRSDIG_disable 0x00000000UL

#define	_RAC_SYMMDCTRL_SYMMDENRSDIG_enable 0x00000001UL

#define	_RAC_SYMMDCTRL_SYMMDENRSDIG_MASK 0x1UL

#define	_RAC_SYMMDCTRL_SYMMDENRSDIG_SHIFT 0

#define	_RAC_SYNTHCTRL_MASK 0x00000400UL

#define	_RAC_SYNTHCTRL_MMDPOWERBALANCEDISABLE_DEFAULT 0x00000000UL

#define	_RAC_SYNTHCTRL_MMDPOWERBALANCEDISABLE_DisablePowerBleed 0x00000001UL

#define	_RAC_SYNTHCTRL_MMDPOWERBALANCEDISABLE_EnablePowerbleed 0x00000000UL

#define	_RAC_SYNTHCTRL_MMDPOWERBALANCEDISABLE_MASK 0x400UL

#define	_RAC_SYNTHCTRL_MMDPOWERBALANCEDISABLE_SHIFT 10

#define	_RAC_SYNTHCTRL_RESETVALUE 0x00000000UL

#define	_RAC_SYNTHENCTRL_LPFBWSEL_DEFAULT 0x00000000UL

#define	_RAC_SYNTHENCTRL_LPFBWSEL_LPFBWRX 0x00000000UL

#define	_RAC_SYNTHENCTRL_LPFBWSEL_LPFBWTX 0x00000001UL

#define	_RAC_SYNTHENCTRL_LPFBWSEL_MASK 0x100000UL

#define	_RAC_SYNTHENCTRL_LPFBWSEL_SHIFT 20

#define	_RAC_SYNTHENCTRL_MASK 0x00100282UL

#define	_RAC_SYNTHENCTRL_RESETVALUE 0x00000000UL

#define	_RAC_SYNTHENCTRL_VCBUFEN_DEFAULT 0x00000000UL

#define	_RAC_SYNTHENCTRL_VCBUFEN_Disabled 0x00000000UL

#define	_RAC_SYNTHENCTRL_VCBUFEN_Enabled 0x00000001UL

#define	_RAC_SYNTHENCTRL_VCBUFEN_MASK 0x80UL

#define	_RAC_SYNTHENCTRL_VCBUFEN_SHIFT 7

#define	_RAC_SYNTHENCTRL_VCOSTARTUP_DEFAULT 0x00000000UL

#define	_RAC_SYNTHENCTRL_VCOSTARTUP_fast_start_up_0 0x00000000UL

#define	_RAC_SYNTHENCTRL_VCOSTARTUP_fast_start_up_1 0x00000001UL

#define	_RAC_SYNTHENCTRL_VCOSTARTUP_MASK 0x2UL

#define	_RAC_SYNTHENCTRL_VCOSTARTUP_SHIFT 1

#define	_RAC_SYNTHREGCTRL_CHPLDOVREFTRIM_DEFAULT 0x00000004UL

#define	_RAC_SYNTHREGCTRL_CHPLDOVREFTRIM_MASK 0x7000000UL

#define	_RAC_SYNTHREGCTRL_CHPLDOVREFTRIM_SHIFT 24

#define	_RAC_SYNTHREGCTRL_CHPLDOVREFTRIM_vref0p6000 0x00000000UL

#define	_RAC_SYNTHREGCTRL_CHPLDOVREFTRIM_vref0p6125 0x00000001UL

#define	_RAC_SYNTHREGCTRL_CHPLDOVREFTRIM_vref0p6250 0x00000002UL

#define	_RAC_SYNTHREGCTRL_CHPLDOVREFTRIM_vref0p6375 0x00000003UL

#define	_RAC_SYNTHREGCTRL_CHPLDOVREFTRIM_vref0p6500 0x00000004UL

#define	_RAC_SYNTHREGCTRL_CHPLDOVREFTRIM_vref0p6625 0x00000005UL

#define	_RAC_SYNTHREGCTRL_CHPLDOVREFTRIM_vref0p6750 0x00000006UL

#define	_RAC_SYNTHREGCTRL_CHPLDOVREFTRIM_vref0p6875 0x00000007UL

#define	_RAC_SYNTHREGCTRL_MASK 0x07001C00UL

#define	_RAC_SYNTHREGCTRL_MMDLDOVREFTRIM_DEFAULT 0x00000000UL

#define	_RAC_SYNTHREGCTRL_MMDLDOVREFTRIM_MASK 0x1C00UL

#define	_RAC_SYNTHREGCTRL_MMDLDOVREFTRIM_SHIFT 10

#define	_RAC_SYNTHREGCTRL_MMDLDOVREFTRIM_vref0p6000 0x00000000UL

#define	_RAC_SYNTHREGCTRL_MMDLDOVREFTRIM_vref0p6125 0x00000001UL

#define	_RAC_SYNTHREGCTRL_MMDLDOVREFTRIM_vref0p6250 0x00000002UL

#define	_RAC_SYNTHREGCTRL_MMDLDOVREFTRIM_vref0p6375 0x00000003UL

#define	_RAC_SYNTHREGCTRL_MMDLDOVREFTRIM_vref0p6500 0x00000004UL

#define	_RAC_SYNTHREGCTRL_MMDLDOVREFTRIM_vref0p6625 0x00000005UL

#define	_RAC_SYNTHREGCTRL_MMDLDOVREFTRIM_vref0p6750 0x00000006UL

#define	_RAC_SYNTHREGCTRL_MMDLDOVREFTRIM_vref0p6875 0x00000007UL

#define	_RAC_SYNTHREGCTRL_RESETVALUE 0x04000000UL

#define	_RAC_SYTRIM0_MASK 0x003FEFFFUL

#define	_RAC_SYTRIM0_RESETVALUE 0x00062E29UL

#define	_RAC_SYTRIM0_SYCHPBIAS_bias_0 0x00000000UL

#define	_RAC_SYTRIM0_SYCHPBIAS_bias_1 0x00000001UL

#define	_RAC_SYTRIM0_SYCHPBIAS_bias_2 0x00000003UL

#define	_RAC_SYTRIM0_SYCHPBIAS_bias_3 0x00000007UL

#define	_RAC_SYTRIM0_SYCHPBIAS_DEFAULT 0x00000001UL

#define	_RAC_SYTRIM0_SYCHPBIAS_MASK 0x7UL

#define	_RAC_SYTRIM0_SYCHPBIAS_SHIFT 0

#define	_RAC_SYTRIM0_SYCHPCURR_curr_1p5uA 0x00000000UL

#define	_RAC_SYTRIM0_SYCHPCURR_curr_2p0uA 0x00000001UL

#define	_RAC_SYTRIM0_SYCHPCURR_curr_2p5uA 0x00000002UL

#define	_RAC_SYTRIM0_SYCHPCURR_curr_3p0uA 0x00000003UL

#define	_RAC_SYTRIM0_SYCHPCURR_curr_3p5uA 0x00000004UL

#define	_RAC_SYTRIM0_SYCHPCURR_curr_4p0uA 0x00000005UL

#define	_RAC_SYTRIM0_SYCHPCURR_curr_4p5uA 0x00000006UL

#define	_RAC_SYTRIM0_SYCHPCURR_curr_5p0uA 0x00000007UL

#define	_RAC_SYTRIM0_SYCHPCURR_DEFAULT 0x00000005UL

#define	_RAC_SYTRIM0_SYCHPCURR_MASK 0x38UL

#define	_RAC_SYTRIM0_SYCHPCURR_SHIFT 3

#define	_RAC_SYTRIM0_SYCHPLEVNSRC_DEFAULT 0x00000000UL

#define	_RAC_SYTRIM0_SYCHPLEVNSRC_MASK 0x1C0UL

#define	_RAC_SYTRIM0_SYCHPLEVNSRC_SHIFT 6

#define	_RAC_SYTRIM0_SYCHPLEVPSRC_DEFAULT 0x00000007UL

#define	_RAC_SYTRIM0_SYCHPLEVPSRC_MASK 0xE00UL

#define	_RAC_SYTRIM0_SYCHPLEVPSRC_SHIFT 9

#define	_RAC_SYTRIM0_SYCHPLEVPSRC_vsrcp_n0m 0x00000007UL

#define	_RAC_SYTRIM0_SYCHPLEVPSRC_vsrcp_n105m 0x00000000UL

#define	_RAC_SYTRIM0_SYCHPLEVPSRC_vsrcp_n15m 0x00000006UL

#define	_RAC_SYTRIM0_SYCHPLEVPSRC_vsrcp_n30m 0x00000005UL

#define	_RAC_SYTRIM0_SYCHPLEVPSRC_vsrcp_n45m 0x00000004UL

#define	_RAC_SYTRIM0_SYCHPLEVPSRC_vsrcp_n60m 0x00000003UL

#define	_RAC_SYTRIM0_SYCHPLEVPSRC_vsrcp_n75m 0x00000002UL

#define	_RAC_SYTRIM0_SYCHPLEVPSRC_vsrcp_n90m 0x00000001UL

#define	_RAC_SYTRIM0_SYCHPREPLICACURRADJ_DEFAULT 0x00000000UL

#define	_RAC_SYTRIM0_SYCHPREPLICACURRADJ_load_16ua 0x00000001UL

#define	_RAC_SYTRIM0_SYCHPREPLICACURRADJ_load_20ua 0x00000002UL

#define	_RAC_SYTRIM0_SYCHPREPLICACURRADJ_load_24ua 0x00000004UL

#define	_RAC_SYTRIM0_SYCHPREPLICACURRADJ_load_28ua 0x00000003UL

#define	_RAC_SYTRIM0_SYCHPREPLICACURRADJ_load_32ua 0x00000005UL

#define	_RAC_SYTRIM0_SYCHPREPLICACURRADJ_load_36ua 0x00000006UL

#define	_RAC_SYTRIM0_SYCHPREPLICACURRADJ_load_44ua 0x00000007UL

#define	_RAC_SYTRIM0_SYCHPREPLICACURRADJ_load_8ua 0x00000000UL

#define	_RAC_SYTRIM0_SYCHPREPLICACURRADJ_MASK 0x1C000UL

#define	_RAC_SYTRIM0_SYCHPREPLICACURRADJ_SHIFT 14

#define	_RAC_SYTRIM0_SYCHPSRCEN_DEFAULT 0x00000001UL

#define	_RAC_SYTRIM0_SYCHPSRCEN_disable 0x00000000UL

#define	_RAC_SYTRIM0_SYCHPSRCEN_enable 0x00000001UL

#define	_RAC_SYTRIM0_SYCHPSRCEN_MASK 0x2000UL

#define	_RAC_SYTRIM0_SYCHPSRCEN_SHIFT 13

#define	_RAC_SYTRIM0_SYTRIMCHPREGAMPBIAS_bias_14uA 0x00000000UL

#define	_RAC_SYTRIM0_SYTRIMCHPREGAMPBIAS_bias_20uA 0x00000001UL

#define	_RAC_SYTRIM0_SYTRIMCHPREGAMPBIAS_bias_26uA 0x00000002UL

#define	_RAC_SYTRIM0_SYTRIMCHPREGAMPBIAS_bias_32uA 0x00000003UL

#define	_RAC_SYTRIM0_SYTRIMCHPREGAMPBIAS_bias_38uA 0x00000004UL

#define	_RAC_SYTRIM0_SYTRIMCHPREGAMPBIAS_bias_44uA 0x00000005UL

#define	_RAC_SYTRIM0_SYTRIMCHPREGAMPBIAS_bias_50uA 0x00000006UL

#define	_RAC_SYTRIM0_SYTRIMCHPREGAMPBIAS_bias_56uA 0x00000007UL

#define	_RAC_SYTRIM0_SYTRIMCHPREGAMPBIAS_DEFAULT 0x00000003UL

#define	_RAC_SYTRIM0_SYTRIMCHPREGAMPBIAS_MASK 0xE0000UL

#define	_RAC_SYTRIM0_SYTRIMCHPREGAMPBIAS_SHIFT 17

#define	_RAC_SYTRIM0_SYTRIMCHPREGAMPBW_C_000f 0x00000000UL

#define	_RAC_SYTRIM0_SYTRIMCHPREGAMPBW_C_300f 0x00000001UL

#define	_RAC_SYTRIM0_SYTRIMCHPREGAMPBW_C_600f 0x00000002UL

#define	_RAC_SYTRIM0_SYTRIMCHPREGAMPBW_C_900f 0x00000003UL

#define	_RAC_SYTRIM0_SYTRIMCHPREGAMPBW_DEFAULT 0x00000000UL

#define	_RAC_SYTRIM0_SYTRIMCHPREGAMPBW_MASK 0x300000UL

#define	_RAC_SYTRIM0_SYTRIMCHPREGAMPBW_SHIFT 20

#define	_RAC_SYTRIM1_MASK 0x0001FFFFUL

#define	_RAC_SYTRIM1_RESETVALUE 0x00003FD0UL

#define	_RAC_SYTRIM1_SYLODIVLDOTRIMCORE_DEFAULT 0x00000000UL

#define	_RAC_SYTRIM1_SYLODIVLDOTRIMCORE_MASK 0x3UL

#define	_RAC_SYTRIM1_SYLODIVLDOTRIMCORE_RXLO 0x00000000UL

#define	_RAC_SYTRIM1_SYLODIVLDOTRIMCORE_SHIFT 0

#define	_RAC_SYTRIM1_SYLODIVLDOTRIMCORE_TXLO 0x00000003UL

#define	_RAC_SYTRIM1_SYLODIVLDOTRIMNDIO_DEFAULT 0x00000004UL

#define	_RAC_SYTRIM1_SYLODIVLDOTRIMNDIO_MASK 0x3CUL

#define	_RAC_SYTRIM1_SYLODIVLDOTRIMNDIO_SHIFT 2

#define	_RAC_SYTRIM1_SYLODIVLDOTRIMNDIO_vreg_1p08 0x00000000UL

#define	_RAC_SYTRIM1_SYLODIVLDOTRIMNDIO_vreg_1p11 0x00000001UL

#define	_RAC_SYTRIM1_SYLODIVLDOTRIMNDIO_vreg_1p15 0x00000002UL

#define	_RAC_SYTRIM1_SYLODIVLDOTRIMNDIO_vreg_1p18 0x00000003UL

#define	_RAC_SYTRIM1_SYLODIVLDOTRIMNDIO_vreg_1p21 0x00000004UL

#define	_RAC_SYTRIM1_SYLODIVLDOTRIMNDIO_vreg_1p24 0x00000005UL

#define	_RAC_SYTRIM1_SYLODIVLDOTRIMNDIO_vreg_1p27 0x00000006UL

#define	_RAC_SYTRIM1_SYLODIVLDOTRIMNDIO_vreg_1p29 0x00000007UL

#define	_RAC_SYTRIM1_SYLODIVLDOTRIMNDIO_vreg_1p32 0x00000008UL

#define	_RAC_SYTRIM1_SYLODIVLDOTRIMNDIO_vreg_1p34 0x00000009UL

#define	_RAC_SYTRIM1_SYMMDREPLICA1CURRADJ_DEFAULT 0x00000007UL

#define	_RAC_SYTRIM1_SYMMDREPLICA1CURRADJ_load_16u 0x00000001UL

#define	_RAC_SYTRIM1_SYMMDREPLICA1CURRADJ_load_20ua 0x00000002UL

#define	_RAC_SYTRIM1_SYMMDREPLICA1CURRADJ_load_24ua 0x00000004UL

#define	_RAC_SYTRIM1_SYMMDREPLICA1CURRADJ_load_28ua 0x00000003UL

#define	_RAC_SYTRIM1_SYMMDREPLICA1CURRADJ_load_32ua 0x00000005UL

#define	_RAC_SYTRIM1_SYMMDREPLICA1CURRADJ_load_36ua 0x00000006UL

#define	_RAC_SYTRIM1_SYMMDREPLICA1CURRADJ_load_44ua 0x00000007UL

#define	_RAC_SYTRIM1_SYMMDREPLICA1CURRADJ_load_8ua 0x00000000UL

#define	_RAC_SYTRIM1_SYMMDREPLICA1CURRADJ_MASK 0x1C0UL

#define	_RAC_SYTRIM1_SYMMDREPLICA1CURRADJ_SHIFT 6

#define	_RAC_SYTRIM1_SYMMDREPLICA2CURRADJ_DEFAULT 0x00000007UL

#define	_RAC_SYTRIM1_SYMMDREPLICA2CURRADJ_load_128u 0x00000003UL

#define	_RAC_SYTRIM1_SYMMDREPLICA2CURRADJ_load_160u 0x00000004UL

#define	_RAC_SYTRIM1_SYMMDREPLICA2CURRADJ_load_192u 0x00000005UL

#define	_RAC_SYTRIM1_SYMMDREPLICA2CURRADJ_load_224u 0x00000006UL

#define	_RAC_SYTRIM1_SYMMDREPLICA2CURRADJ_load_256u 0x00000007UL

#define	_RAC_SYTRIM1_SYMMDREPLICA2CURRADJ_load_32u 0x00000000UL

#define	_RAC_SYTRIM1_SYMMDREPLICA2CURRADJ_load_64u 0x00000001UL

#define	_RAC_SYTRIM1_SYMMDREPLICA2CURRADJ_load_96u 0x00000002UL

#define	_RAC_SYTRIM1_SYMMDREPLICA2CURRADJ_MASK 0xE00UL

#define	_RAC_SYTRIM1_SYMMDREPLICA2CURRADJ_SHIFT 9

#define	_RAC_SYTRIM1_SYTRIMMMDREGAMPBIAS_bias_14uA 0x00000000UL

#define	_RAC_SYTRIM1_SYTRIMMMDREGAMPBIAS_bias_20uA 0x00000001UL

#define	_RAC_SYTRIM1_SYTRIMMMDREGAMPBIAS_bias_26uA 0x00000002UL

#define	_RAC_SYTRIM1_SYTRIMMMDREGAMPBIAS_bias_32uA 0x00000003UL

#define	_RAC_SYTRIM1_SYTRIMMMDREGAMPBIAS_bias_38uA 0x00000004UL

#define	_RAC_SYTRIM1_SYTRIMMMDREGAMPBIAS_bias_44uA 0x00000005UL

#define	_RAC_SYTRIM1_SYTRIMMMDREGAMPBIAS_bias_50uA 0x00000006UL

#define	_RAC_SYTRIM1_SYTRIMMMDREGAMPBIAS_bias_56uA 0x00000007UL

#define	_RAC_SYTRIM1_SYTRIMMMDREGAMPBIAS_DEFAULT 0x00000003UL

#define	_RAC_SYTRIM1_SYTRIMMMDREGAMPBIAS_MASK 0x7000UL

#define	_RAC_SYTRIM1_SYTRIMMMDREGAMPBIAS_SHIFT 12

#define	_RAC_SYTRIM1_SYTRIMMMDREGAMPBW_C_000f 0x00000000UL

#define	_RAC_SYTRIM1_SYTRIMMMDREGAMPBW_C_300f 0x00000001UL

#define	_RAC_SYTRIM1_SYTRIMMMDREGAMPBW_C_600f 0x00000002UL

#define	_RAC_SYTRIM1_SYTRIMMMDREGAMPBW_C_900f 0x00000003UL

#define	_RAC_SYTRIM1_SYTRIMMMDREGAMPBW_DEFAULT 0x00000000UL

#define	_RAC_SYTRIM1_SYTRIMMMDREGAMPBW_MASK 0x18000UL

#define	_RAC_SYTRIM1_SYTRIMMMDREGAMPBW_SHIFT 15

#define	_RAC_TESTCTRL_AUX2RFSENSE_DEFAULT 0x00000000UL

#define	_RAC_TESTCTRL_AUX2RFSENSE_MASK 0x4UL

#define	_RAC_TESTCTRL_AUX2RFSENSE_SHIFT 2

#define	_RAC_TESTCTRL_AUX2RFSENSE_X0 0x00000000UL

#define	_RAC_TESTCTRL_AUX2RFSENSE_X1 0x00000001UL

#define	_RAC_TESTCTRL_DEMODEN_DEFAULT 0x00000000UL

#define	_RAC_TESTCTRL_DEMODEN_MASK 0x2UL

#define	_RAC_TESTCTRL_DEMODEN_SHIFT 1

#define	_RAC_TESTCTRL_LOOPBACK2LNAINPUT_DEFAULT 0x00000000UL

#define	_RAC_TESTCTRL_LOOPBACK2LNAINPUT_MASK 0x8UL

#define	_RAC_TESTCTRL_LOOPBACK2LNAINPUT_SHIFT 3

#define	_RAC_TESTCTRL_LOOPBACK2LNAOUTPUT_DEFAULT 0x00000000UL

#define	_RAC_TESTCTRL_LOOPBACK2LNAOUTPUT_MASK 0x10UL

#define	_RAC_TESTCTRL_LOOPBACK2LNAOUTPUT_SHIFT 4

#define	_RAC_TESTCTRL_MASK 0x0000001FUL

#define	_RAC_TESTCTRL_MODEN_DEFAULT 0x00000000UL

#define	_RAC_TESTCTRL_MODEN_MASK 0x1UL

#define	_RAC_TESTCTRL_MODEN_SHIFT 0

#define	_RAC_TESTCTRL_RESETVALUE 0x00000000UL

#define	_RAC_TX_ENPAPOWER_DEFAULT 0x00000000UL

#define	_RAC_TX_ENPAPOWER_MASK 0x40000000UL

#define	_RAC_TX_ENPAPOWER_SHIFT 30

#define	_RAC_TX_ENPASELSLICE_DEFAULT 0x00000000UL

#define	_RAC_TX_ENPASELSLICE_MASK 0x80000000UL

#define	_RAC_TX_ENPASELSLICE_SHIFT 31

#define	_RAC_TX_ENPATRIMPASLICE0DBM_DEFAULT 0x00000000UL

#define	_RAC_TX_ENPATRIMPASLICE0DBM_MASK 0x400UL

#define	_RAC_TX_ENPATRIMPASLICE0DBM_SHIFT 10

#define	_RAC_TX_ENXOSQBUFFILT_DEFAULT 0x00000000UL

#define	_RAC_TX_ENXOSQBUFFILT_MASK 0x20000000UL

#define	_RAC_TX_ENXOSQBUFFILT_SHIFT 29

#define	_RAC_TX_MASK 0xFF3707FFUL

#define	_RAC_TX_PABLEEDDRVREG0DBM_DEFAULT 0x00000000UL

#define	_RAC_TX_PABLEEDDRVREG0DBM_disable 0x00000000UL

#define	_RAC_TX_PABLEEDDRVREG0DBM_enable 0x00000001UL

#define	_RAC_TX_PABLEEDDRVREG0DBM_MASK 0x1UL

#define	_RAC_TX_PABLEEDDRVREG0DBM_SHIFT 0

#define	_RAC_TX_PABLEEDREG0DBM_DEFAULT 0x00000000UL

#define	_RAC_TX_PABLEEDREG0DBM_disable 0x00000000UL

#define	_RAC_TX_PABLEEDREG0DBM_enable 0x00000001UL

#define	_RAC_TX_PABLEEDREG0DBM_MASK 0x2UL

#define	_RAC_TX_PABLEEDREG0DBM_SHIFT 1

#define	_RAC_TX_PAEN10DBMM_DEFAULT 0x00000000UL

#define	_RAC_TX_PAEN10DBMM_disable 0x00000000UL

#define	_RAC_TX_PAEN10DBMM_enable 0x00000001UL

#define	_RAC_TX_PAEN10DBMM_MASK 0x10000UL

#define	_RAC_TX_PAEN10DBMM_SHIFT 16

#define	_RAC_TX_PAEN10DBMP_DEFAULT 0x00000000UL

#define	_RAC_TX_PAEN10DBMP_disable 0x00000000UL

#define	_RAC_TX_PAEN10DBMP_enable 0x00000001UL

#define	_RAC_TX_PAEN10DBMP_MASK 0x20000UL

#define	_RAC_TX_PAEN10DBMP_SHIFT 17

#define	_RAC_TX_PAEN10DBMPDRV_DEFAULT 0x00000000UL

#define	_RAC_TX_PAEN10DBMPDRV_disable 0x00000000UL

#define	_RAC_TX_PAEN10DBMPDRV_enable 0x00000001UL

#define	_RAC_TX_PAEN10DBMPDRV_MASK 0x40000UL

#define	_RAC_TX_PAEN10DBMPDRV_SHIFT 18

#define	_RAC_TX_PAEN20DBM_DEFAULT 0x00000000UL

#define	_RAC_TX_PAEN20DBM_disable 0x00000000UL

#define	_RAC_TX_PAEN20DBM_enable 0x00000001UL

#define	_RAC_TX_PAEN20DBM_MASK 0x100000UL

#define	_RAC_TX_PAEN20DBM_SHIFT 20

#define	_RAC_TX_PAEN20DBMPDRV_DEFAULT 0x00000000UL

#define	_RAC_TX_PAEN20DBMPDRV_disable 0x00000000UL

#define	_RAC_TX_PAEN20DBMPDRV_enable 0x00000001UL

#define	_RAC_TX_PAEN20DBMPDRV_MASK 0x200000UL

#define	_RAC_TX_PAEN20DBMPDRV_SHIFT 21

#define	_RAC_TX_PAENBIAS0DBM_DEFAULT 0x00000000UL

#define	_RAC_TX_PAENBIAS0DBM_disable 0x00000000UL

#define	_RAC_TX_PAENBIAS0DBM_enable 0x00000001UL

#define	_RAC_TX_PAENBIAS0DBM_MASK 0x4UL

#define	_RAC_TX_PAENBIAS0DBM_SHIFT 2

#define	_RAC_TX_PAENBLEEDPDRVLDO_DEFAULT 0x00000000UL

#define	_RAC_TX_PAENBLEEDPDRVLDO_disable 0x00000000UL

#define	_RAC_TX_PAENBLEEDPDRVLDO_enable 0x00000001UL

#define	_RAC_TX_PAENBLEEDPDRVLDO_MASK 0x1000000UL

#define	_RAC_TX_PAENBLEEDPDRVLDO_SHIFT 24

#define	_RAC_TX_PAENBLEEDPREREG_DEFAULT 0x00000000UL

#define	_RAC_TX_PAENBLEEDPREREG_disable 0x00000000UL

#define	_RAC_TX_PAENBLEEDPREREG_enable 0x00000001UL

#define	_RAC_TX_PAENBLEEDPREREG_MASK 0x2000000UL

#define	_RAC_TX_PAENBLEEDPREREG_SHIFT 25

#define	_RAC_TX_PAENDRVREG0DBM_DEFAULT 0x00000000UL

#define	_RAC_TX_PAENDRVREG0DBM_disable 0x00000000UL

#define	_RAC_TX_PAENDRVREG0DBM_enable 0x00000001UL

#define	_RAC_TX_PAENDRVREG0DBM_MASK 0x8UL

#define	_RAC_TX_PAENDRVREG0DBM_SHIFT 3

#define	_RAC_TX_PAENDRVREGBIAS0DBM_DEFAULT 0x00000000UL

#define	_RAC_TX_PAENDRVREGBIAS0DBM_disable 0x00000000UL

#define	_RAC_TX_PAENDRVREGBIAS0DBM_enable 0x00000001UL

#define	_RAC_TX_PAENDRVREGBIAS0DBM_MASK 0x10UL

#define	_RAC_TX_PAENDRVREGBIAS0DBM_SHIFT 4

#define	_RAC_TX_PAENLDOHVPDRVLDO_DEFAULT 0x00000000UL

#define	_RAC_TX_PAENLDOHVPDRVLDO_disable 0x00000000UL

#define	_RAC_TX_PAENLDOHVPDRVLDO_enable 0x00000001UL

#define	_RAC_TX_PAENLDOHVPDRVLDO_MASK 0x4000000UL

#define	_RAC_TX_PAENLDOHVPDRVLDO_SHIFT 26

#define	_RAC_TX_PAENLDOHVPREREG_DEFAULT 0x00000000UL

#define	_RAC_TX_PAENLDOHVPREREG_disable 0x00000000UL

#define	_RAC_TX_PAENLDOHVPREREG_enable 0x00000001UL

#define	_RAC_TX_PAENLDOHVPREREG_MASK 0x8000000UL

#define	_RAC_TX_PAENLDOHVPREREG_SHIFT 27

#define	_RAC_TX_PAENLO0DBM_DEFAULT 0x00000000UL

#define	_RAC_TX_PAENLO0DBM_disable 0x00000000UL

#define	_RAC_TX_PAENLO0DBM_enable 0x00000001UL

#define	_RAC_TX_PAENLO0DBM_MASK 0x20UL

#define	_RAC_TX_PAENLO0DBM_SHIFT 5

#define	_RAC_TX_PAENPAOUT_DEFAULT 0x00000000UL

#define	_RAC_TX_PAENPAOUT_disable 0x00000000UL

#define	_RAC_TX_PAENPAOUT_enable 0x00000001UL

#define	_RAC_TX_PAENPAOUT_MASK 0x10000000UL

#define	_RAC_TX_PAENPAOUT_SHIFT 28

#define	_RAC_TX_PAENREG0DBM_DEFAULT 0x00000000UL

#define	_RAC_TX_PAENREG0DBM_disable 0x00000000UL

#define	_RAC_TX_PAENREG0DBM_enable 0x00000001UL

#define	_RAC_TX_PAENREG0DBM_MASK 0x40UL

#define	_RAC_TX_PAENREG0DBM_SHIFT 6

#define	_RAC_TX_PAENTAPCAP0DBM_cap_0f 0x00000000UL

#define	_RAC_TX_PAENTAPCAP0DBM_cap_0p35pF 0x00000001UL

#define	_RAC_TX_PAENTAPCAP0DBM_cap_0p7pF 0x00000002UL

#define	_RAC_TX_PAENTAPCAP0DBM_cap_1p05pF 0x00000003UL

#define	_RAC_TX_PAENTAPCAP0DBM_cap_1p4pF 0x00000004UL

#define	_RAC_TX_PAENTAPCAP0DBM_cap_1p75pF 0x00000005UL

#define	_RAC_TX_PAENTAPCAP0DBM_cap_2p1pF 0x00000006UL

#define	_RAC_TX_PAENTAPCAP0DBM_cap_2p45pF 0x00000007UL

#define	_RAC_TX_PAENTAPCAP0DBM_DEFAULT 0x00000000UL

#define	_RAC_TX_PAENTAPCAP0DBM_MASK 0x380UL

#define	_RAC_TX_PAENTAPCAP0DBM_SHIFT 7

#define	_RAC_TX_RESETVALUE 0x00000000UL

#define	_RAC_VCOCTRL_MASK 0x000000FFUL

#define	_RAC_VCOCTRL_RESETVALUE 0x0000004CUL

#define	_RAC_VCOCTRL_VCOAMPLITUDE_DEFAULT 0x0000000CUL

#define	_RAC_VCOCTRL_VCOAMPLITUDE_MASK 0xFUL

#define	_RAC_VCOCTRL_VCOAMPLITUDE_SHIFT 0

#define	_RAC_VCOCTRL_VCODETAMPLITUDE_DEFAULT 0x00000004UL

#define	_RAC_VCOCTRL_VCODETAMPLITUDE_MASK 0xF0UL

#define	_RAC_VCOCTRL_VCODETAMPLITUDE_SHIFT 4

#define	_RAC_VECTADDR_MASK 0xFFFFFFFFUL

#define	_RAC_VECTADDR_RESETVALUE 0x00000000UL

#define	_RAC_VECTADDR_VECTADDR_DEFAULT 0x00000000UL

#define	_RAC_VECTADDR_VECTADDR_MASK 0xFFFFFFFFUL

#define	_RAC_VECTADDR_VECTADDR_SHIFT 0

#define	_RAC_WAITMASK_ANTSWITCH_DEFAULT 0x00000000UL

#define	_RAC_WAITMASK_ANTSWITCH_MASK 0x100UL

#define	_RAC_WAITMASK_ANTSWITCH_SHIFT 8

#define	_RAC_WAITMASK_DEMODRXREQCLR_DEFAULT 0x00000000UL

#define	_RAC_WAITMASK_DEMODRXREQCLR_MASK 0x10UL

#define	_RAC_WAITMASK_DEMODRXREQCLR_SHIFT 4

#define	_RAC_WAITMASK_FRCPAUSED_DEFAULT 0x00000000UL

#define	_RAC_WAITMASK_FRCPAUSED_MASK 0x80UL

#define	_RAC_WAITMASK_FRCPAUSED_SHIFT 7

#define	_RAC_WAITMASK_FRCRX_DEFAULT 0x00000000UL

#define	_RAC_WAITMASK_FRCRX_MASK 0x2UL

#define	_RAC_WAITMASK_FRCRX_SHIFT 1

#define	_RAC_WAITMASK_FRCTX_DEFAULT 0x00000000UL

#define	_RAC_WAITMASK_FRCTX_MASK 0x4UL

#define	_RAC_WAITMASK_FRCTX_SHIFT 2

#define	_RAC_WAITMASK_MASK 0x000001FFUL

#define	_RAC_WAITMASK_PRSEVENT_DEFAULT 0x00000000UL

#define	_RAC_WAITMASK_PRSEVENT_MASK 0x8UL

#define	_RAC_WAITMASK_PRSEVENT_SHIFT 3

#define	_RAC_WAITMASK_RAMPDONE_DEFAULT 0x00000000UL

#define	_RAC_WAITMASK_RAMPDONE_MASK 0x40UL

#define	_RAC_WAITMASK_RAMPDONE_SHIFT 6

#define	_RAC_WAITMASK_RESETVALUE 0x00000000UL

#define	_RAC_WAITMASK_STCMP_DEFAULT 0x00000000UL

#define	_RAC_WAITMASK_STCMP_MASK 0x1UL

#define	_RAC_WAITMASK_STCMP_SHIFT 0

#define	_RAC_WAITMASK_SYNTHRDY_DEFAULT 0x00000000UL

#define	_RAC_WAITMASK_SYNTHRDY_MASK 0x20UL

#define	_RAC_WAITMASK_SYNTHRDY_SHIFT 5

#define	_RAC_WAITSNSH_MASK 0x000003FFUL

#define	_RAC_WAITSNSH_RESETVALUE 0x00000000UL

#define	_RAC_WAITSNSH_WAITSNSH_DEFAULT 0x00000000UL

#define	_RAC_WAITSNSH_WAITSNSH_MASK 0x3FFUL

#define	_RAC_WAITSNSH_WAITSNSH_SHIFT 0

#define	_RAC_XORETIMECTRL_MASK 0x00000777UL

#define	_RAC_XORETIMECTRL_RESETVALUE 0x00000000UL

#define	_RAC_XORETIMECTRL_XORETIMEDISRETIME_DEFAULT 0x00000000UL

#define	_RAC_XORETIMECTRL_XORETIMEDISRETIME_disable_retime 0x00000001UL

#define	_RAC_XORETIMECTRL_XORETIMEDISRETIME_enable_retime 0x00000000UL

#define	_RAC_XORETIMECTRL_XORETIMEDISRETIME_MASK 0x2UL

#define	_RAC_XORETIMECTRL_XORETIMEDISRETIME_SHIFT 1

#define	_RAC_XORETIMECTRL_XORETIMEENRETIME_DEFAULT 0x00000000UL

#define	_RAC_XORETIMECTRL_XORETIMEENRETIME_disable 0x00000000UL

#define	_RAC_XORETIMECTRL_XORETIMEENRETIME_enable 0x00000001UL

#define	_RAC_XORETIMECTRL_XORETIMEENRETIME_MASK 0x1UL

#define	_RAC_XORETIMECTRL_XORETIMEENRETIME_SHIFT 0

#define	_RAC_XORETIMECTRL_XORETIMELIMITH_DEFAULT 0x00000000UL

#define	_RAC_XORETIMECTRL_XORETIMELIMITH_MASK 0x70UL

#define	_RAC_XORETIMECTRL_XORETIMELIMITH_SHIFT 4

#define	_RAC_XORETIMECTRL_XORETIMELIMITL_DEFAULT 0x00000000UL

#define	_RAC_XORETIMECTRL_XORETIMELIMITL_MASK 0x700UL

#define	_RAC_XORETIMECTRL_XORETIMELIMITL_SHIFT 8

#define	_RAC_XORETIMECTRL_XORETIMERESETN_DEFAULT 0x00000000UL

#define	_RAC_XORETIMECTRL_XORETIMERESETN_MASK 0x4UL

#define	_RAC_XORETIMECTRL_XORETIMERESETN_operate 0x00000000UL

#define	_RAC_XORETIMECTRL_XORETIMERESETN_reset 0x00000001UL

#define	_RAC_XORETIMECTRL_XORETIMERESETN_SHIFT 2

#define	_RAC_XORETIMESTATUS_MASK 0x00000003UL

#define	_RAC_XORETIMESTATUS_RESETVALUE 0x00000000UL

#define	_RAC_XORETIMESTATUS_XORETIMECLKSEL_DEFAULT 0x00000000UL

#define	_RAC_XORETIMESTATUS_XORETIMECLKSEL_MASK 0x1UL

#define	_RAC_XORETIMESTATUS_XORETIMECLKSEL_SHIFT 0

#define	_RAC_XORETIMESTATUS_XORETIMECLKSEL_use_raw_clk 0x00000000UL

#define	_RAC_XORETIMESTATUS_XORETIMECLKSEL_use_retimed_clk 0x00000001UL

#define	_RAC_XORETIMESTATUS_XORETIMERESETNLO_DEFAULT 0x00000000UL

#define	_RAC_XORETIMESTATUS_XORETIMERESETNLO_hi 0x00000001UL

#define	_RAC_XORETIMESTATUS_XORETIMERESETNLO_lo 0x00000000UL

#define	_RAC_XORETIMESTATUS_XORETIMERESETNLO_MASK 0x2UL

#define	_RAC_XORETIMESTATUS_XORETIMERESETNLO_SHIFT 1

#define	_RAC_XOSQBUFFILT_MASK 0x00000003UL

#define	_RAC_XOSQBUFFILT_RESETVALUE 0x00000000UL

#define	_RAC_XOSQBUFFILT_XOSQBUFFILT_bypass 0x00000000UL

#define	_RAC_XOSQBUFFILT_XOSQBUFFILT_DEFAULT 0x00000000UL

#define	_RAC_XOSQBUFFILT_XOSQBUFFILT_filter_1 0x00000001UL

#define	_RAC_XOSQBUFFILT_XOSQBUFFILT_filter_2 0x00000002UL

#define	_RAC_XOSQBUFFILT_XOSQBUFFILT_filter_3 0x00000003UL

#define	_RAC_XOSQBUFFILT_XOSQBUFFILT_MASK 0x3UL

#define	_RAC_XOSQBUFFILT_XOSQBUFFILT_SHIFT 0

#define	RAC_ANTDIV_EN_DEFAULT (_RAC_ANTDIV_EN_DEFAULT << 0)

#define	RAC_ANTDIV_EN_LNAMIXEN1 (_RAC_ANTDIV_EN_LNAMIXEN1 << 0)

#define	RAC_ANTDIV_EN_LNAMIXEN2 (_RAC_ANTDIV_EN_LNAMIXEN2 << 0)

#define	RAC_ANTDIV_EN_LNAMIXRFPKDENRF1 (_RAC_ANTDIV_EN_LNAMIXRFPKDENRF1 << 0)

#define	RAC_ANTDIV_EN_LNAMIXRFPKDENRF2 (_RAC_ANTDIV_EN_LNAMIXRFPKDENRF2 << 0)

#define	RAC_ANTDIV_EN_OFF (_RAC_ANTDIV_EN_OFF << 0)

#define	RAC_ANTDIV_EN_ON (_RAC_ANTDIV_EN_ON << 0)

#define	RAC_ANTDIV_EN_PAENANT1 (_RAC_ANTDIV_EN_PAENANT1 << 0)

#define	RAC_ANTDIV_EN_PAENANT2 (_RAC_ANTDIV_EN_PAENANT2 << 0)

#define	RAC_ANTDIV_EN_SYLODIVRLO12G4EN (_RAC_ANTDIV_EN_SYLODIVRLO12G4EN << 0)

#define	RAC_ANTDIV_EN_SYLODIVRLO22G4EN (_RAC_ANTDIV_EN_SYLODIVRLO22G4EN << 0)

#define	RAC_ANTDIV_STATUS_ANT1 (_RAC_ANTDIV_STATUS_ANT1 << 8)

#define	RAC_ANTDIV_STATUS_ANT2 (_RAC_ANTDIV_STATUS_ANT2 << 8)

#define	RAC_ANTDIV_STATUS_BOTH (_RAC_ANTDIV_STATUS_BOTH << 8)

#define	RAC_ANTDIV_STATUS_DEFAULT (_RAC_ANTDIV_STATUS_DEFAULT << 8)

#define	RAC_ANTDIV_STATUS_OFF (_RAC_ANTDIV_STATUS_OFF << 8)

#define	RAC_APC_AMPCONTROLLIMITSW_DEFAULT (_RAC_APC_AMPCONTROLLIMITSW_DEFAULT << 24)

#define	RAC_APC_ENAPCSW (0x1UL << 2)

#define	RAC_APC_ENAPCSW_DEFAULT (_RAC_APC_ENAPCSW_DEFAULT << 2)

#define	RAC_APC_ENAPCSW_DISABLE (_RAC_APC_ENAPCSW_DISABLE << 2)

#define	RAC_APC_ENAPCSW_ENABLE (_RAC_APC_ENAPCSW_ENABLE << 2)

#define	RAC_AUXADCCTRL0_CLRCOUNTER (0x1UL << 12)

#define	RAC_AUXADCCTRL0_CLRCOUNTER_DEFAULT (_RAC_AUXADCCTRL0_CLRCOUNTER_DEFAULT << 12)

#define	RAC_AUXADCCTRL0_CLRFILTER (0x1UL << 13)

#define	RAC_AUXADCCTRL0_CLRFILTER_DEFAULT (_RAC_AUXADCCTRL0_CLRFILTER_DEFAULT << 13)

#define	RAC_AUXADCCTRL0_CYCLES_DEFAULT (_RAC_AUXADCCTRL0_CYCLES_DEFAULT << 0)

#define	RAC_AUXADCCTRL0_INPUTRESSEL_DEFAULT (_RAC_AUXADCCTRL0_INPUTRESSEL_DEFAULT << 14)

#define	RAC_AUXADCCTRL0_MUXSEL_DEFAULT (_RAC_AUXADCCTRL0_MUXSEL_DEFAULT << 10)

#define

RAC Bit FieldsDevices > RAC

Macros