ICACHE_TypeDef Struct ReferenceDevices > ICACHE

ICACHE Register Declaration.

Definition at line 48 of file efr32mg21_icache.h .

#include < efr32mg21_icache.h >

Data Fields

__IOM uint32_t CMD
__IOM uint32_t CMD_CLR
__IOM uint32_t CMD_SET
__IOM uint32_t CMD_TGL
__IOM uint32_t CTRL
__IOM uint32_t CTRL_CLR
__IOM uint32_t CTRL_SET
__IOM uint32_t CTRL_TGL
__IOM uint32_t IEN
__IOM uint32_t IEN_CLR
__IOM uint32_t IEN_SET
__IOM uint32_t IEN_TGL
__IOM uint32_t IF
__IOM uint32_t IF_CLR
__IOM uint32_t IF_SET
__IOM uint32_t IF_TGL
__IM uint32_t IPVERSION
__IM uint32_t IPVERSION_CLR
__IM uint32_t IPVERSION_SET
__IM uint32_t IPVERSION_TGL
__IOM uint32_t LPMODE
__IOM uint32_t LPMODE_CLR
__IOM uint32_t LPMODE_SET
__IOM uint32_t LPMODE_TGL
__IM uint32_t PCAHITS
__IM uint32_t PCAHITS_CLR
__IM uint32_t PCAHITS_SET
__IM uint32_t PCAHITS_TGL
__IM uint32_t PCHITS
__IM uint32_t PCHITS_CLR
__IM uint32_t PCHITS_SET
__IM uint32_t PCHITS_TGL
__IM uint32_t PCMISSES
__IM uint32_t PCMISSES_CLR
__IM uint32_t PCMISSES_SET
__IM uint32_t PCMISSES_TGL
uint32_t RESERVED0 [1014U]
uint32_t RESERVED1 [1014U]
uint32_t RESERVED2 [1014U]
__IM uint32_t STATUS
__IM uint32_t STATUS_CLR
__IM uint32_t STATUS_SET
__IM uint32_t STATUS_TGL

Field Documentation

__IOM uint32_t ICACHE_TypeDef::CMD

Command Register

Definition at line 55 of file efr32mg21_icache.h .

__IOM uint32_t ICACHE_TypeDef::CMD_CLR

Command Register

Definition at line 77 of file efr32mg21_icache.h .

__IOM uint32_t ICACHE_TypeDef::CMD_SET

Command Register

Definition at line 66 of file efr32mg21_icache.h .

__IOM uint32_t ICACHE_TypeDef::CMD_TGL

Command Register

Definition at line 88 of file efr32mg21_icache.h .

__IOM uint32_t ICACHE_TypeDef::CTRL

Control Register

Definition at line 50 of file efr32mg21_icache.h .

__IOM uint32_t ICACHE_TypeDef::CTRL_CLR

Control Register

Definition at line 72 of file efr32mg21_icache.h .

__IOM uint32_t ICACHE_TypeDef::CTRL_SET

Control Register

Definition at line 61 of file efr32mg21_icache.h .

__IOM uint32_t ICACHE_TypeDef::CTRL_TGL

Control Register

Definition at line 83 of file efr32mg21_icache.h .

__IOM uint32_t ICACHE_TypeDef::IEN

Interrupt Enable

Definition at line 58 of file efr32mg21_icache.h .

__IOM uint32_t ICACHE_TypeDef::IEN_CLR

Interrupt Enable

Definition at line 80 of file efr32mg21_icache.h .

__IOM uint32_t ICACHE_TypeDef::IEN_SET

Interrupt Enable

Definition at line 69 of file efr32mg21_icache.h .

__IOM uint32_t ICACHE_TypeDef::IEN_TGL

Interrupt Enable

Definition at line 91 of file efr32mg21_icache.h .

__IOM uint32_t ICACHE_TypeDef::IF

Interrupt Flag

Definition at line 57 of file efr32mg21_icache.h .

__IOM uint32_t ICACHE_TypeDef::IF_CLR

Interrupt Flag

Definition at line 79 of file efr32mg21_icache.h .

__IOM uint32_t ICACHE_TypeDef::IF_SET

Interrupt Flag

Definition at line 68 of file efr32mg21_icache.h .

__IOM uint32_t ICACHE_TypeDef::IF_TGL

Interrupt Flag

Definition at line 90 of file efr32mg21_icache.h .

__IM uint32_t ICACHE_TypeDef::IPVERSION

IP Version

Definition at line 49 of file efr32mg21_icache.h .

__IM uint32_t ICACHE_TypeDef::IPVERSION_CLR

IP Version

Definition at line 71 of file efr32mg21_icache.h .

__IM uint32_t ICACHE_TypeDef::IPVERSION_SET

IP Version

Definition at line 60 of file efr32mg21_icache.h .

__IM uint32_t ICACHE_TypeDef::IPVERSION_TGL

IP Version

Definition at line 82 of file efr32mg21_icache.h .

__IOM uint32_t ICACHE_TypeDef::LPMODE

Low Power Mode

Definition at line 56 of file efr32mg21_icache.h .

__IOM uint32_t ICACHE_TypeDef::LPMODE_CLR

Low Power Mode

Definition at line 78 of file efr32mg21_icache.h .

__IOM uint32_t ICACHE_TypeDef::LPMODE_SET

Low Power Mode

Definition at line 67 of file efr32mg21_icache.h .

__IOM uint32_t ICACHE_TypeDef::LPMODE_TGL

Low Power Mode

Definition at line 89 of file efr32mg21_icache.h .

__IM uint32_t ICACHE_TypeDef::PCAHITS

Performance Counter Advanced Hits

Definition at line 53 of file efr32mg21_icache.h .

__IM uint32_t ICACHE_TypeDef::PCAHITS_CLR

Performance Counter Advanced Hits

Definition at line 75 of file efr32mg21_icache.h .

__IM uint32_t ICACHE_TypeDef::PCAHITS_SET

Performance Counter Advanced Hits

Definition at line 64 of file efr32mg21_icache.h .

__IM uint32_t ICACHE_TypeDef::PCAHITS_TGL

Performance Counter Advanced Hits

Definition at line 86 of file efr32mg21_icache.h .

__IM uint32_t ICACHE_TypeDef::PCHITS

Performance Counter Hits

Definition at line 51 of file efr32mg21_icache.h .

__IM uint32_t ICACHE_TypeDef::PCHITS_CLR

Performance Counter Hits

Definition at line 73 of file efr32mg21_icache.h .

__IM uint32_t ICACHE_TypeDef::PCHITS_SET

Performance Counter Hits

Definition at line 62 of file efr32mg21_icache.h .

__IM uint32_t ICACHE_TypeDef::PCHITS_TGL

Performance Counter Hits

Definition at line 84 of file efr32mg21_icache.h .

__IM uint32_t ICACHE_TypeDef::PCMISSES

Performance Counter Misses

Definition at line 52 of file efr32mg21_icache.h .

__IM uint32_t ICACHE_TypeDef::PCMISSES_CLR

Performance Counter Misses

Definition at line 74 of file efr32mg21_icache.h .

__IM uint32_t ICACHE_TypeDef::PCMISSES_SET

Performance Counter Misses

Definition at line 63 of file efr32mg21_icache.h .

__IM uint32_t ICACHE_TypeDef::PCMISSES_TGL

Performance Counter Misses

Definition at line 85 of file efr32mg21_icache.h .

uint32_t ICACHE_TypeDef::RESERVED0[1014U]

Reserved for future use

Definition at line 59 of file efr32mg21_icache.h .

uint32_t ICACHE_TypeDef::RESERVED1[1014U]

Reserved for future use

Definition at line 70 of file efr32mg21_icache.h .

uint32_t ICACHE_TypeDef::RESERVED2[1014U]

Reserved for future use

Definition at line 81 of file efr32mg21_icache.h .

__IM uint32_t ICACHE_TypeDef::STATUS

Status Register

Definition at line 54 of file efr32mg21_icache.h .

__IM uint32_t ICACHE_TypeDef::STATUS_CLR

Status Register

Definition at line 76 of file efr32mg21_icache.h .

__IM uint32_t ICACHE_TypeDef::STATUS_SET

Status Register

Definition at line 65 of file efr32mg21_icache.h .

__IM uint32_t ICACHE_TypeDef::STATUS_TGL

Status Register

Definition at line 87 of file efr32mg21_icache.h .

The documentation for this struct was generated from the following file:
  • C:/repos/super_h1/platform/Device/SiliconLabs/EFR32MG21/Include/ efr32mg21_icache.h