EFR32MG21A020F1024IM32 Peripheral Memory MapDevices > EFR32MG21A020F1024IM32

Macros

#define ACMP0_BASE (0x4A008000UL) /* ACMP0 base address */
#define ACMP0_NS_BASE (0x5A008000UL) /* ACMP0_NS base address */
#define ACMP1_BASE (0x4A00C000UL) /* ACMP1 base address */
#define ACMP1_NS_BASE (0x5A00C000UL) /* ACMP1_NS base address */
#define AGC_BASE (0xA800C000UL) /* AGC base address */
#define AGC_NS_BASE (0xB800C000UL) /* AGC_NS base address */
#define AMUXCP0_BASE (0x4A020000UL) /* AMUXCP0 base address */
#define AMUXCP0_NS_BASE (0x5A020000UL) /* AMUXCP0_NS base address */
#define BUFC_BASE (0x44004000UL) /* BUFC base address */
#define BUFC_NS_BASE (0x54004000UL) /* BUFC_NS base address */
#define BURAM_BASE (0x40080000UL) /* BURAM base address */
#define BURAM_NS_BASE (0x50080000UL) /* BURAM_NS base address */
#define BURTC_BASE (0x40064000UL) /* BURTC base address */
#define BURTC_NS_BASE (0x50064000UL) /* BURTC_NS base address */
#define CMU_BASE (0x40008000UL) /* CMU base address */
#define CMU_NS_BASE (0x50008000UL) /* CMU_NS base address */
#define DEVINFO_BASE (0x0FE08000UL) /* DEVINFO base address */
#define DPLL0_BASE (0x4001C000UL) /* DPLL0 base address */
#define DPLL0_NS_BASE (0x5001C000UL) /* DPLL0_NS base address */
#define EMU_BASE (0x40004000UL) /* EMU base address */
#define EMU_NS_BASE (0x50004000UL) /* EMU_NS base address */
#define FRC_BASE (0xA8004000UL) /* FRC base address */
#define FRC_NS_BASE (0xB8004000UL) /* FRC_NS base address */
#define FSRCO_BASE (0x40018000UL) /* FSRCO base address */
#define FSRCO_NS_BASE (0x50018000UL) /* FSRCO_NS base address */
#define GPCRC_BASE (0x40088000UL) /* GPCRC base address */
#define GPCRC_NS_BASE (0x50088000UL) /* GPCRC_NS base address */
#define GPIO_BASE (0x4003C000UL) /* GPIO base address */
#define GPIO_NS_BASE (0x5003C000UL) /* GPIO_NS base address */
#define HFRCO0_BASE (0x40010000UL) /* HFRCO0 base address */
#define HFRCO0_NS_BASE (0x50010000UL) /* HFRCO0_NS base address */
#define HFRCOEM23_BASE (0x4A014000UL) /* HFRCOEM23 base address */
#define HFRCOEM23_NS_BASE (0x5A014000UL) /* HFRCOEM23_NS base address */
#define HFXO0_BASE (0x4000C000UL) /* HFXO0 base address */
#define HFXO0_NS_BASE (0x5000C000UL) /* HFXO0_NS base address */
#define I2C0_BASE (0x4A010000UL) /* I2C0 base address */
#define I2C0_NS_BASE (0x5A010000UL) /* I2C0_NS base address */
#define I2C1_BASE (0x40068000UL) /* I2C1 base address */
#define I2C1_NS_BASE (0x50068000UL) /* I2C1_NS base address */
#define IADC0_BASE (0x4A004000UL) /* IADC0 base address */
#define IADC0_NS_BASE (0x5A004000UL) /* IADC0_NS base address */
#define ICACHE0_BASE (0x40034000UL) /* ICACHE0 base address */
#define ICACHE0_NS_BASE (0x50034000UL) /* ICACHE0_NS base address */
#define LDMA_BASE (0x40040000UL) /* LDMA base address */
#define LDMA_NS_BASE (0x50040000UL) /* LDMA_NS base address */
#define LDMAXBAR_BASE (0x40044000UL) /* LDMAXBAR base address */
#define LDMAXBAR_NS_BASE (0x50044000UL) /* LDMAXBAR_NS base address */
#define LETIMER0_BASE (0x4A000000UL) /* LETIMER0 base address */
#define LETIMER0_NS_BASE (0x5A000000UL) /* LETIMER0_NS base address */
#define LFRCO_BASE (0x40024000UL) /* LFRCO base address */
#define LFRCO_NS_BASE (0x50024000UL) /* LFRCO_NS base address */
#define LFXO_BASE (0x40020000UL) /* LFXO base address */
#define LFXO_NS_BASE (0x50020000UL) /* LFXO_NS base address */
#define LVGD_BASE (0x40074000UL) /* LVGD base address */
#define LVGD_NS_BASE (0x50074000UL) /* LVGD_NS base address */
#define MODEM_BASE (0xA8014000UL) /* MODEM base address */
#define MODEM_NS_BASE (0xB8014000UL) /* MODEM_NS base address */
#define MSC_BASE (0x40030000UL) /* MSC base address */
#define MSC_NS_BASE (0x50030000UL) /* MSC_NS base address */
#define PROTIMER_BASE (0xA801C000UL) /* PROTIMER base address */
#define PROTIMER_NS_BASE (0xB801C000UL) /* PROTIMER_NS base address */
#define PRS_BASE (0x40038000UL) /* PRS base address */
#define PRS_NS_BASE (0x50038000UL) /* PRS_NS base address */
#define RAC_BASE (0xA8020000UL) /* RAC base address */
#define RAC_NS_BASE (0xB8020000UL) /* RAC_NS base address */
#define RADIOAES_BASE (0x44000000UL) /* RADIOAES base address */
#define RADIOAES_NS_BASE (0x54000000UL) /* RADIOAES_NS base address */
#define RFCRC_BASE (0xA8010000UL) /* RFCRC base address */
#define RFCRC_NS_BASE (0xB8010000UL) /* RFCRC_NS base address */
#define RTCC_BASE (0x48000000UL) /* RTCC base address */
#define RTCC_NS_BASE (0x58000000UL) /* RTCC_NS base address */
#define SEMAILBOX_HOST_BASE (0x4C000000UL) /* SEMAILBOX_HOST base address */
#define SEMAILBOX_NS_HOST_BASE (0x5C000000UL) /* SEMAILBOX_NS_HOST base address */
#define SMU_BASE (0x44008000UL) /* SMU base address */
#define SMU_NS_BASE (0x54008000UL) /* SMU_NS base address */
#define SYNTH_BASE (0xA8018000UL) /* SYNTH base address */
#define SYNTH_NS_BASE (0xB8018000UL) /* SYNTH_NS base address */
#define SYSCFG_BASE (0x4007C000UL) /* SYSCFG base address */
#define SYSCFG_NS_BASE (0x5007C000UL) /* SYSCFG_NS base address */
#define TIMER0_BASE (0x40048000UL) /* TIMER0 base address */
#define TIMER0_NS_BASE (0x50048000UL) /* TIMER0_NS base address */
#define TIMER1_BASE (0x4004C000UL) /* TIMER1 base address */
#define TIMER1_NS_BASE (0x5004C000UL) /* TIMER1_NS base address */
#define TIMER2_BASE (0x40050000UL) /* TIMER2 base address */
#define TIMER2_NS_BASE (0x50050000UL) /* TIMER2_NS base address */
#define TIMER3_BASE (0x40054000UL) /* TIMER3 base address */
#define TIMER3_NS_BASE (0x50054000UL) /* TIMER3_NS base address */
#define ULFRCO_BASE (0x40028000UL) /* ULFRCO base address */
#define ULFRCO_NS_BASE (0x50028000UL) /* ULFRCO_NS base address */
#define USART0_BASE (0x40058000UL) /* USART0 base address */
#define USART0_NS_BASE (0x50058000UL) /* USART0_NS base address */
#define USART1_BASE (0x4005C000UL) /* USART1 base address */
#define USART1_NS_BASE (0x5005C000UL) /* USART1_NS base address */
#define USART2_BASE (0x40060000UL) /* USART2 base address */
#define USART2_NS_BASE (0x50060000UL) /* USART2_NS base address */
#define WDOG0_BASE (0x4A018000UL) /* WDOG0 base address */
#define WDOG0_NS_BASE (0x5A018000UL) /* WDOG0_NS base address */
#define WDOG1_BASE (0x4A01C000UL) /* WDOG1 base address */
#define WDOG1_NS_BASE (0x5A01C000UL) /* WDOG1_NS base address */