RTCC Bit FieldsDevices > RTCC
Macro Definition Documentation
| #define _RTCC_CC_CTRL_CMOA_CLEAR 0x00000002UL |
Mode CLEAR for RTCC_CC_CTRL
Definition at line
376
of file
efr32mg21_rtcc.h
.
| #define _RTCC_CC_CTRL_CMOA_DEFAULT 0x00000000UL |
Mode DEFAULT for RTCC_CC_CTRL
Definition at line
373
of file
efr32mg21_rtcc.h
.
| #define _RTCC_CC_CTRL_CMOA_MASK 0xCUL |
Bit mask for RTCC_CMOA
Definition at line
372
of file
efr32mg21_rtcc.h
.
| #define _RTCC_CC_CTRL_CMOA_PULSE 0x00000000UL |
Mode PULSE for RTCC_CC_CTRL
Definition at line
374
of file
efr32mg21_rtcc.h
.
| #define _RTCC_CC_CTRL_CMOA_SET 0x00000003UL |
Mode SET for RTCC_CC_CTRL
Definition at line
377
of file
efr32mg21_rtcc.h
.
| #define _RTCC_CC_CTRL_CMOA_SHIFT 2 |
Shift value for RTCC_CMOA
Definition at line
371
of file
efr32mg21_rtcc.h
.
Referenced by RTCC_ChannelInit() .
| #define _RTCC_CC_CTRL_CMOA_TOGGLE 0x00000001UL |
Mode TOGGLE for RTCC_CC_CTRL
Definition at line
375
of file
efr32mg21_rtcc.h
.
| #define _RTCC_CC_CTRL_COMPBASE_CNT 0x00000000UL |
Mode CNT for RTCC_CC_CTRL
Definition at line
387
of file
efr32mg21_rtcc.h
.
| #define _RTCC_CC_CTRL_COMPBASE_DEFAULT 0x00000000UL |
Mode DEFAULT for RTCC_CC_CTRL
Definition at line
386
of file
efr32mg21_rtcc.h
.
| #define _RTCC_CC_CTRL_COMPBASE_MASK 0x10UL |
Bit mask for RTCC_COMPBASE
Definition at line
385
of file
efr32mg21_rtcc.h
.
| #define _RTCC_CC_CTRL_COMPBASE_PRECNT 0x00000001UL |
Mode PRECNT for RTCC_CC_CTRL
Definition at line
388
of file
efr32mg21_rtcc.h
.
| #define _RTCC_CC_CTRL_COMPBASE_SHIFT 4 |
Shift value for RTCC_COMPBASE
Definition at line
384
of file
efr32mg21_rtcc.h
.
Referenced by RTCC_ChannelInit() .
| #define _RTCC_CC_CTRL_ICEDGE_BOTH 0x00000002UL |
Mode BOTH for RTCC_CC_CTRL
Definition at line
397
of file
efr32mg21_rtcc.h
.
| #define _RTCC_CC_CTRL_ICEDGE_DEFAULT 0x00000000UL |
Mode DEFAULT for RTCC_CC_CTRL
Definition at line
394
of file
efr32mg21_rtcc.h
.
| #define _RTCC_CC_CTRL_ICEDGE_FALLING 0x00000001UL |
Mode FALLING for RTCC_CC_CTRL
Definition at line
396
of file
efr32mg21_rtcc.h
.
| #define _RTCC_CC_CTRL_ICEDGE_MASK 0x60UL |
Bit mask for RTCC_ICEDGE
Definition at line
393
of file
efr32mg21_rtcc.h
.
| #define _RTCC_CC_CTRL_ICEDGE_NONE 0x00000003UL |
Mode NONE for RTCC_CC_CTRL
Definition at line
398
of file
efr32mg21_rtcc.h
.
| #define _RTCC_CC_CTRL_ICEDGE_RISING 0x00000000UL |
Mode RISING for RTCC_CC_CTRL
Definition at line
395
of file
efr32mg21_rtcc.h
.
| #define _RTCC_CC_CTRL_ICEDGE_SHIFT 5 |
Shift value for RTCC_ICEDGE
Definition at line
392
of file
efr32mg21_rtcc.h
.
Referenced by RTCC_ChannelInit() .
| #define _RTCC_CC_CTRL_MASK 0x0000007FUL |
Mask for RTCC_CC_CTRL
Definition at line
360
of file
efr32mg21_rtcc.h
.
| #define _RTCC_CC_CTRL_MODE_DEFAULT 0x00000000UL |
Mode DEFAULT for RTCC_CC_CTRL
Definition at line
363
of file
efr32mg21_rtcc.h
.
| #define _RTCC_CC_CTRL_MODE_INPUTCAPTURE 0x00000001UL |
Mode INPUTCAPTURE for RTCC_CC_CTRL
Definition at line
365
of file
efr32mg21_rtcc.h
.
| #define _RTCC_CC_CTRL_MODE_MASK 0x3UL |
Bit mask for RTCC_MODE
Definition at line
362
of file
efr32mg21_rtcc.h
.
| #define _RTCC_CC_CTRL_MODE_OFF 0x00000000UL |
Mode OFF for RTCC_CC_CTRL
Definition at line
364
of file
efr32mg21_rtcc.h
.
| #define _RTCC_CC_CTRL_MODE_OUTPUTCOMPARE 0x00000002UL |
Mode OUTPUTCOMPARE for RTCC_CC_CTRL
Definition at line
366
of file
efr32mg21_rtcc.h
.
| #define _RTCC_CC_CTRL_MODE_SHIFT 0 |
Shift value for RTCC_MODE
Definition at line
361
of file
efr32mg21_rtcc.h
.
Referenced by RTCC_ChannelInit() .
| #define _RTCC_CC_CTRL_RESETVALUE 0x00000000UL |
Default value for RTCC_CC_CTRL
Definition at line
359
of file
efr32mg21_rtcc.h
.
Referenced by RTCC_Reset() .
| #define _RTCC_CC_ICVALUE_IC_DEFAULT 0x00000000UL |
Mode DEFAULT for RTCC_CC_ICVALUE
Definition at line
418
of file
efr32mg21_rtcc.h
.
| #define _RTCC_CC_ICVALUE_IC_MASK 0xFFFFFFFFUL |
Bit mask for RTCC_IC
Definition at line
417
of file
efr32mg21_rtcc.h
.
| #define _RTCC_CC_ICVALUE_IC_SHIFT 0 |
Shift value for RTCC_IC
Definition at line
416
of file
efr32mg21_rtcc.h
.
| #define _RTCC_CC_ICVALUE_MASK 0xFFFFFFFFUL |
Mask for RTCC_CC_ICVALUE
Definition at line
415
of file
efr32mg21_rtcc.h
.
| #define _RTCC_CC_ICVALUE_RESETVALUE 0x00000000UL |
Default value for RTCC_CC_ICVALUE
Definition at line
414
of file
efr32mg21_rtcc.h
.
| #define _RTCC_CC_OCVALUE_MASK 0xFFFFFFFFUL |
Mask for RTCC_CC_OCVALUE
Definition at line
407
of file
efr32mg21_rtcc.h
.
| #define _RTCC_CC_OCVALUE_OC_DEFAULT 0x00000000UL |
Mode DEFAULT for RTCC_CC_OCVALUE
Definition at line
410
of file
efr32mg21_rtcc.h
.
| #define _RTCC_CC_OCVALUE_OC_MASK 0xFFFFFFFFUL |
Bit mask for RTCC_OC
Definition at line
409
of file
efr32mg21_rtcc.h
.
| #define _RTCC_CC_OCVALUE_OC_SHIFT 0 |
Shift value for RTCC_OC
Definition at line
408
of file
efr32mg21_rtcc.h
.
| #define _RTCC_CC_OCVALUE_RESETVALUE 0x00000000UL |
Default value for RTCC_CC_OCVALUE
Definition at line
406
of file
efr32mg21_rtcc.h
.
Referenced by RTCC_Reset() .
| #define _RTCC_CFG_CNTCCV1TOP_DEFAULT 0x00000000UL |
Mode DEFAULT for RTCC_CFG
Definition at line
158
of file
efr32mg21_rtcc.h
.
| #define _RTCC_CFG_CNTCCV1TOP_MASK 0x4UL |
Bit mask for RTCC_CNTCCV1TOP
Definition at line
157
of file
efr32mg21_rtcc.h
.
| #define _RTCC_CFG_CNTCCV1TOP_SHIFT 2 |
Shift value for RTCC_CNTCCV1TOP
Definition at line
156
of file
efr32mg21_rtcc.h
.
Referenced by RTCC_Init() .
| #define _RTCC_CFG_CNTPRESC_DEFAULT 0x00000000UL |
Mode DEFAULT for RTCC_CFG
Definition at line
171
of file
efr32mg21_rtcc.h
.
| #define _RTCC_CFG_CNTPRESC_DIV1 0x00000000UL |
Mode DIV1 for RTCC_CFG
Definition at line
172
of file
efr32mg21_rtcc.h
.
| #define _RTCC_CFG_CNTPRESC_DIV1024 0x0000000AUL |
Mode DIV1024 for RTCC_CFG
Definition at line
182
of file
efr32mg21_rtcc.h
.
| #define _RTCC_CFG_CNTPRESC_DIV128 0x00000007UL |
Mode DIV128 for RTCC_CFG
Definition at line
179
of file
efr32mg21_rtcc.h
.
| #define _RTCC_CFG_CNTPRESC_DIV16 0x00000004UL |
Mode DIV16 for RTCC_CFG
Definition at line
176
of file
efr32mg21_rtcc.h
.
| #define _RTCC_CFG_CNTPRESC_DIV16384 0x0000000EUL |
Mode DIV16384 for RTCC_CFG
Definition at line
186
of file
efr32mg21_rtcc.h
.
| #define _RTCC_CFG_CNTPRESC_DIV2 0x00000001UL |
Mode DIV2 for RTCC_CFG
Definition at line
173
of file
efr32mg21_rtcc.h
.
| #define _RTCC_CFG_CNTPRESC_DIV2048 0x0000000BUL |
Mode DIV2048 for RTCC_CFG
Definition at line
183
of file
efr32mg21_rtcc.h
.
| #define _RTCC_CFG_CNTPRESC_DIV256 0x00000008UL |
Mode DIV256 for RTCC_CFG
Definition at line
180
of file
efr32mg21_rtcc.h
.
| #define _RTCC_CFG_CNTPRESC_DIV32 0x00000005UL |
Mode DIV32 for RTCC_CFG
Definition at line
177
of file
efr32mg21_rtcc.h
.
| #define _RTCC_CFG_CNTPRESC_DIV32768 0x0000000FUL |
Mode DIV32768 for RTCC_CFG
Definition at line
187
of file
efr32mg21_rtcc.h
.
| #define _RTCC_CFG_CNTPRESC_DIV4 0x00000002UL |
Mode DIV4 for RTCC_CFG
Definition at line
174
of file
efr32mg21_rtcc.h
.
| #define _RTCC_CFG_CNTPRESC_DIV4096 0x0000000CUL |
Mode DIV4096 for RTCC_CFG
Definition at line
184
of file
efr32mg21_rtcc.h
.
| #define _RTCC_CFG_CNTPRESC_DIV512 0x00000009UL |
Mode DIV512 for RTCC_CFG
Definition at line
181
of file
efr32mg21_rtcc.h
.
| #define _RTCC_CFG_CNTPRESC_DIV64 0x00000006UL |
Mode DIV64 for RTCC_CFG
Definition at line
178
of file
efr32mg21_rtcc.h
.
| #define _RTCC_CFG_CNTPRESC_DIV8 0x00000003UL |
Mode DIV8 for RTCC_CFG
Definition at line
175
of file
efr32mg21_rtcc.h
.
| #define _RTCC_CFG_CNTPRESC_DIV8192 0x0000000DUL |
Mode DIV8192 for RTCC_CFG
Definition at line
185
of file
efr32mg21_rtcc.h
.
| #define _RTCC_CFG_CNTPRESC_MASK 0xF0UL |
Bit mask for RTCC_CNTPRESC
Definition at line
170
of file
efr32mg21_rtcc.h
.
| #define _RTCC_CFG_CNTPRESC_SHIFT 4 |
Shift value for RTCC_CNTPRESC
Definition at line
169
of file
efr32mg21_rtcc.h
.
Referenced by RTCC_Init() .
| #define _RTCC_CFG_CNTTICK_CCV0MATCH 0x00000001UL |
Mode CCV0MATCH for RTCC_CFG
Definition at line
165
of file
efr32mg21_rtcc.h
.
| #define _RTCC_CFG_CNTTICK_DEFAULT 0x00000000UL |
Mode DEFAULT for RTCC_CFG
Definition at line
163
of file
efr32mg21_rtcc.h
.
| #define _RTCC_CFG_CNTTICK_MASK 0x8UL |
Bit mask for RTCC_CNTTICK
Definition at line
162
of file
efr32mg21_rtcc.h
.
| #define _RTCC_CFG_CNTTICK_PRESC 0x00000000UL |
Mode PRESC for RTCC_CFG
Definition at line
164
of file
efr32mg21_rtcc.h
.
| #define _RTCC_CFG_CNTTICK_SHIFT 3 |
Shift value for RTCC_CNTTICK
Definition at line
161
of file
efr32mg21_rtcc.h
.
Referenced by RTCC_Init() .
| #define _RTCC_CFG_DEBUGRUN_DEFAULT 0x00000000UL |
Mode DEFAULT for RTCC_CFG
Definition at line
144
of file
efr32mg21_rtcc.h
.
| #define _RTCC_CFG_DEBUGRUN_MASK 0x1UL |
Bit mask for RTCC_DEBUGRUN
Definition at line
143
of file
efr32mg21_rtcc.h
.
| #define _RTCC_CFG_DEBUGRUN_SHIFT 0 |
Shift value for RTCC_DEBUGRUN
Definition at line
142
of file
efr32mg21_rtcc.h
.
Referenced by RTCC_Init() .
| #define _RTCC_CFG_DEBUGRUN_X0 0x00000000UL |
Mode X0 for RTCC_CFG
Definition at line
145
of file
efr32mg21_rtcc.h
.
| #define _RTCC_CFG_DEBUGRUN_X1 0x00000001UL |
Mode X1 for RTCC_CFG
Definition at line
146
of file
efr32mg21_rtcc.h
.
| #define _RTCC_CFG_MASK 0x000000FFUL |
Mask for RTCC_CFG
Definition at line
140
of file
efr32mg21_rtcc.h
.
| #define _RTCC_CFG_PRECNTCCV0TOP_DEFAULT 0x00000000UL |
Mode DEFAULT for RTCC_CFG
Definition at line
153
of file
efr32mg21_rtcc.h
.
| #define _RTCC_CFG_PRECNTCCV0TOP_MASK 0x2UL |
Bit mask for RTCC_PRECNTCCV0TOP
Definition at line
152
of file
efr32mg21_rtcc.h
.
| #define _RTCC_CFG_PRECNTCCV0TOP_SHIFT 1 |
Shift value for RTCC_PRECNTCCV0TOP
Definition at line
151
of file
efr32mg21_rtcc.h
.
Referenced by RTCC_Init() .
| #define _RTCC_CFG_RESETVALUE 0x00000000UL |
Default value for RTCC_CFG
Definition at line
139
of file
efr32mg21_rtcc.h
.
Referenced by RTCC_Reset() , and UDELAY_Calibrate() .
| #define _RTCC_CMD_MASK 0x00000003UL |
Mask for RTCC_CMD
Definition at line
208
of file
efr32mg21_rtcc.h
.
| #define _RTCC_CMD_RESETVALUE 0x00000000UL |
Default value for RTCC_CMD
Definition at line
207
of file
efr32mg21_rtcc.h
.
| #define _RTCC_CMD_START_DEFAULT 0x00000000UL |
Mode DEFAULT for RTCC_CMD
Definition at line
212
of file
efr32mg21_rtcc.h
.
| #define _RTCC_CMD_START_MASK 0x1UL |
Bit mask for RTCC_START
Definition at line
211
of file
efr32mg21_rtcc.h
.
| #define _RTCC_CMD_START_SHIFT 0 |
Shift value for RTCC_START
Definition at line
210
of file
efr32mg21_rtcc.h
.
| #define _RTCC_CMD_STOP_DEFAULT 0x00000000UL |
Mode DEFAULT for RTCC_CMD
Definition at line
217
of file
efr32mg21_rtcc.h
.
| #define _RTCC_CMD_STOP_MASK 0x2UL |
Bit mask for RTCC_STOP
Definition at line
216
of file
efr32mg21_rtcc.h
.
| #define _RTCC_CMD_STOP_SHIFT 1 |
Shift value for RTCC_STOP
Definition at line
215
of file
efr32mg21_rtcc.h
.
| #define _RTCC_CNT_CNT_DEFAULT 0x00000000UL |
Mode DEFAULT for RTCC_CNT
Definition at line
309
of file
efr32mg21_rtcc.h
.
| #define _RTCC_CNT_CNT_MASK 0xFFFFFFFFUL |
Bit mask for RTCC_CNT
Definition at line
308
of file
efr32mg21_rtcc.h
.
| #define _RTCC_CNT_CNT_SHIFT 0 |
Shift value for RTCC_CNT
Definition at line
307
of file
efr32mg21_rtcc.h
.
| #define _RTCC_CNT_MASK 0xFFFFFFFFUL |
Mask for RTCC_CNT
Definition at line
306
of file
efr32mg21_rtcc.h
.
| #define _RTCC_CNT_RESETVALUE 0x00000000UL |
Default value for RTCC_CNT
Definition at line
305
of file
efr32mg21_rtcc.h
.
Referenced by RTCC_Reset() .
| #define _RTCC_COMBCNT_CNTLSB_DEFAULT 0x00000000UL |
Mode DEFAULT for RTCC_COMBCNT
Definition at line
321
of file
efr32mg21_rtcc.h
.
| #define _RTCC_COMBCNT_CNTLSB_MASK 0xFFFF8000UL |
Bit mask for RTCC_CNTLSB
Definition at line
320
of file
efr32mg21_rtcc.h
.
| #define _RTCC_COMBCNT_CNTLSB_SHIFT 15 |
Shift value for RTCC_CNTLSB
Definition at line
319
of file
efr32mg21_rtcc.h
.
| #define _RTCC_COMBCNT_MASK 0xFFFFFFFFUL |
Mask for RTCC_COMBCNT
Definition at line
314
of file
efr32mg21_rtcc.h
.
| #define _RTCC_COMBCNT_PRECNT_DEFAULT 0x00000000UL |
Mode DEFAULT for RTCC_COMBCNT
Definition at line
317
of file
efr32mg21_rtcc.h
.
| #define _RTCC_COMBCNT_PRECNT_MASK 0x7FFFUL |
Bit mask for RTCC_PRECNT
Definition at line
316
of file
efr32mg21_rtcc.h
.
| #define _RTCC_COMBCNT_PRECNT_SHIFT 0 |
Shift value for RTCC_PRECNT
Definition at line
315
of file
efr32mg21_rtcc.h
.
| #define _RTCC_COMBCNT_RESETVALUE 0x00000000UL |
Default value for RTCC_COMBCNT
Definition at line
313
of file
efr32mg21_rtcc.h
.
| #define _RTCC_EN_EN_DEFAULT 0x00000000UL |
Mode DEFAULT for RTCC_EN
Definition at line
135
of file
efr32mg21_rtcc.h
.
| #define _RTCC_EN_EN_MASK 0x1UL |
Bit mask for RTCC_EN
Definition at line
134
of file
efr32mg21_rtcc.h
.
| #define _RTCC_EN_EN_SHIFT 0 |
Shift value for RTCC_EN
Definition at line
133
of file
efr32mg21_rtcc.h
.
| #define _RTCC_EN_MASK 0x00000001UL |
Mask for RTCC_EN
Definition at line
131
of file
efr32mg21_rtcc.h
.
| #define _RTCC_EN_RESETVALUE 0x00000000UL |
Default value for RTCC_EN
Definition at line
130
of file
efr32mg21_rtcc.h
.
| #define _RTCC_IEN_CC0_DEFAULT 0x00000000UL |
Mode DEFAULT for RTCC_IEN
Definition at line
283
of file
efr32mg21_rtcc.h
.
| #define _RTCC_IEN_CC0_MASK 0x4UL |
Bit mask for RTCC_CC0
Definition at line
282
of file
efr32mg21_rtcc.h
.
| #define _RTCC_IEN_CC0_SHIFT 2 |
Shift value for RTCC_CC0
Definition at line
281
of file
efr32mg21_rtcc.h
.
| #define _RTCC_IEN_CC1_DEFAULT 0x00000000UL |
Mode DEFAULT for RTCC_IEN
Definition at line
288
of file
efr32mg21_rtcc.h
.
| #define _RTCC_IEN_CC1_MASK 0x8UL |
Bit mask for RTCC_CC1
Definition at line
287
of file
efr32mg21_rtcc.h
.
| #define _RTCC_IEN_CC1_SHIFT 3 |
Shift value for RTCC_CC1
Definition at line
286
of file
efr32mg21_rtcc.h
.
| #define _RTCC_IEN_CC2_DEFAULT 0x00000000UL |
Mode DEFAULT for RTCC_IEN
Definition at line
293
of file
efr32mg21_rtcc.h
.
| #define _RTCC_IEN_CC2_MASK 0x10UL |
Bit mask for RTCC_CC2
Definition at line
292
of file
efr32mg21_rtcc.h
.
| #define _RTCC_IEN_CC2_SHIFT 4 |
Shift value for RTCC_CC2
Definition at line
291
of file
efr32mg21_rtcc.h
.
| #define _RTCC_IEN_CNTTICK_DEFAULT 0x00000000UL |
Mode DEFAULT for RTCC_IEN
Definition at line
278
of file
efr32mg21_rtcc.h
.
| #define _RTCC_IEN_CNTTICK_MASK 0x2UL |
Bit mask for RTCC_CNTTICK
Definition at line
277
of file
efr32mg21_rtcc.h
.
| #define _RTCC_IEN_CNTTICK_SHIFT 1 |
Shift value for RTCC_CNTTICK
Definition at line
276
of file
efr32mg21_rtcc.h
.
| #define _RTCC_IEN_MASK 0x0000001FUL |
Mask for RTCC_IEN
Definition at line
269
of file
efr32mg21_rtcc.h
.
Referenced by UDELAY_Calibrate() .
| #define _RTCC_IEN_OF_DEFAULT 0x00000000UL |
Mode DEFAULT for RTCC_IEN
Definition at line
273
of file
efr32mg21_rtcc.h
.
| #define _RTCC_IEN_OF_MASK 0x1UL |
Bit mask for RTCC_OF
Definition at line
272
of file
efr32mg21_rtcc.h
.
| #define _RTCC_IEN_OF_SHIFT 0 |
Shift value for RTCC_OF
Definition at line
271
of file
efr32mg21_rtcc.h
.
| #define _RTCC_IEN_RESETVALUE 0x00000000UL |
Default value for RTCC_IEN
Definition at line
268
of file
efr32mg21_rtcc.h
.
Referenced by RTCC_Reset() .
| #define _RTCC_IF_CC0_DEFAULT 0x00000000UL |
Mode DEFAULT for RTCC_IF
Definition at line
254
of file
efr32mg21_rtcc.h
.
| #define _RTCC_IF_CC0_MASK 0x4UL |
Bit mask for RTCC_CC0
Definition at line
253
of file
efr32mg21_rtcc.h
.
| #define _RTCC_IF_CC0_SHIFT 2 |
Shift value for RTCC_CC0
Definition at line
252
of file
efr32mg21_rtcc.h
.
| #define _RTCC_IF_CC1_DEFAULT 0x00000000UL |
Mode DEFAULT for RTCC_IF
Definition at line
259
of file
efr32mg21_rtcc.h
.
| #define _RTCC_IF_CC1_MASK 0x8UL |
Bit mask for RTCC_CC1
Definition at line
258
of file
efr32mg21_rtcc.h
.
| #define _RTCC_IF_CC1_SHIFT 3 |
Shift value for RTCC_CC1
Definition at line
257
of file
efr32mg21_rtcc.h
.
| #define _RTCC_IF_CC2_DEFAULT 0x00000000UL |
Mode DEFAULT for RTCC_IF
Definition at line
264
of file
efr32mg21_rtcc.h
.
| #define _RTCC_IF_CC2_MASK 0x10UL |
Bit mask for RTCC_CC2
Definition at line
263
of file
efr32mg21_rtcc.h
.
| #define _RTCC_IF_CC2_SHIFT 4 |
Shift value for RTCC_CC2
Definition at line
262
of file
efr32mg21_rtcc.h
.
| #define _RTCC_IF_CNTTICK_DEFAULT 0x00000000UL |
Mode DEFAULT for RTCC_IF
Definition at line
249
of file
efr32mg21_rtcc.h
.
| #define _RTCC_IF_CNTTICK_MASK 0x2UL |
Bit mask for RTCC_CNTTICK
Definition at line
248
of file
efr32mg21_rtcc.h
.
| #define _RTCC_IF_CNTTICK_SHIFT 1 |
Shift value for RTCC_CNTTICK
Definition at line
247
of file
efr32mg21_rtcc.h
.
| #define _RTCC_IF_MASK 0x0000001FUL |
Mask for RTCC_IF
Definition at line
240
of file
efr32mg21_rtcc.h
.
Referenced by RTCC_Reset() , and UDELAY_Calibrate() .
| #define _RTCC_IF_OF_DEFAULT 0x00000000UL |
Mode DEFAULT for RTCC_IF
Definition at line
244
of file
efr32mg21_rtcc.h
.
| #define _RTCC_IF_OF_MASK 0x1UL |
Bit mask for RTCC_OF
Definition at line
243
of file
efr32mg21_rtcc.h
.
| #define _RTCC_IF_OF_SHIFT 0 |
Shift value for RTCC_OF
Definition at line
242
of file
efr32mg21_rtcc.h
.
| #define _RTCC_IF_RESETVALUE 0x00000000UL |
Default value for RTCC_IF
Definition at line
239
of file
efr32mg21_rtcc.h
.
| #define _RTCC_IPVERSION_IPVERSION_DEFAULT 0x00000000UL |
Mode DEFAULT for RTCC_IPVERSION
Definition at line
126
of file
efr32mg21_rtcc.h
.
| #define _RTCC_IPVERSION_IPVERSION_MASK 0xFFFFFFFFUL |
Bit mask for RTCC_IPVERSION
Definition at line
125
of file
efr32mg21_rtcc.h
.
| #define _RTCC_IPVERSION_IPVERSION_SHIFT 0 |
Shift value for RTCC_IPVERSION
Definition at line
124
of file
efr32mg21_rtcc.h
.
| #define _RTCC_IPVERSION_MASK 0xFFFFFFFFUL |
Mask for RTCC_IPVERSION
Definition at line
123
of file
efr32mg21_rtcc.h
.
| #define _RTCC_IPVERSION_RESETVALUE 0x00000000UL |
Default value for RTCC_IPVERSION
Definition at line
122
of file
efr32mg21_rtcc.h
.
| #define _RTCC_LOCK_LOCKKEY_DEFAULT 0x00000000UL |
Mode DEFAULT for RTCC_LOCK
Definition at line
353
of file
efr32mg21_rtcc.h
.
| #define _RTCC_LOCK_LOCKKEY_MASK 0xFFFFUL |
Bit mask for RTCC_LOCKKEY
Definition at line
352
of file
efr32mg21_rtcc.h
.
| #define _RTCC_LOCK_LOCKKEY_SHIFT 0 |
Shift value for RTCC_LOCKKEY
Definition at line
351
of file
efr32mg21_rtcc.h
.
| #define _RTCC_LOCK_LOCKKEY_UNLOCK 0x0000AEE8UL |
Mode UNLOCK for RTCC_LOCK
Definition at line
354
of file
efr32mg21_rtcc.h
.
| #define _RTCC_LOCK_MASK 0x0000FFFFUL |
Mask for RTCC_LOCK
Definition at line
350
of file
efr32mg21_rtcc.h
.
| #define _RTCC_LOCK_RESETVALUE 0x00000000UL |
Default value for RTCC_LOCK
Definition at line
349
of file
efr32mg21_rtcc.h
.
| #define _RTCC_PRECNT_MASK 0x00007FFFUL |
Mask for RTCC_PRECNT
Definition at line
298
of file
efr32mg21_rtcc.h
.
| #define _RTCC_PRECNT_PRECNT_DEFAULT 0x00000000UL |
Mode DEFAULT for RTCC_PRECNT
Definition at line
301
of file
efr32mg21_rtcc.h
.
| #define _RTCC_PRECNT_PRECNT_MASK 0x7FFFUL |
Bit mask for RTCC_PRECNT
Definition at line
300
of file
efr32mg21_rtcc.h
.
| #define _RTCC_PRECNT_PRECNT_SHIFT 0 |
Shift value for RTCC_PRECNT
Definition at line
299
of file
efr32mg21_rtcc.h
.
| #define _RTCC_PRECNT_RESETVALUE 0x00000000UL |
Default value for RTCC_PRECNT
Definition at line
297
of file
efr32mg21_rtcc.h
.
Referenced by RTCC_Reset() .
| #define _RTCC_STATUS_MASK 0x00000003UL |
Mask for RTCC_STATUS
Definition at line
222
of file
efr32mg21_rtcc.h
.
| #define _RTCC_STATUS_RESETVALUE 0x00000000UL |
Default value for RTCC_STATUS
Definition at line
221
of file
efr32mg21_rtcc.h
.
| #define _RTCC_STATUS_RTCCLOCKSTATUS_DEFAULT 0x00000000UL |
Mode DEFAULT for RTCC_STATUS
Definition at line
231
of file
efr32mg21_rtcc.h
.
| #define _RTCC_STATUS_RTCCLOCKSTATUS_LOCKED 0x00000001UL |
Mode LOCKED for RTCC_STATUS
Definition at line
233
of file
efr32mg21_rtcc.h
.
| #define _RTCC_STATUS_RTCCLOCKSTATUS_MASK 0x2UL |
Bit mask for RTCC_RTCCLOCKSTATUS
Definition at line
230
of file
efr32mg21_rtcc.h
.
| #define _RTCC_STATUS_RTCCLOCKSTATUS_SHIFT 1 |
Shift value for RTCC_RTCCLOCKSTATUS
Definition at line
229
of file
efr32mg21_rtcc.h
.
| #define _RTCC_STATUS_RTCCLOCKSTATUS_UNLOCKED 0x00000000UL |
Mode UNLOCKED for RTCC_STATUS
Definition at line
232
of file
efr32mg21_rtcc.h
.
| #define _RTCC_STATUS_RUNNING_DEFAULT 0x00000000UL |
Mode DEFAULT for RTCC_STATUS
Definition at line
226
of file
efr32mg21_rtcc.h
.
| #define _RTCC_STATUS_RUNNING_MASK 0x1UL |
Bit mask for RTCC_RUNNING
Definition at line
225
of file
efr32mg21_rtcc.h
.
| #define _RTCC_STATUS_RUNNING_SHIFT 0 |
Shift value for RTCC_RUNNING
Definition at line
224
of file
efr32mg21_rtcc.h
.
| #define _RTCC_SYNCBUSY_CNT_DEFAULT 0x00000000UL |
Mode DEFAULT for RTCC_SYNCBUSY
Definition at line
345
of file
efr32mg21_rtcc.h
.
| #define _RTCC_SYNCBUSY_CNT_MASK 0x8UL |
Bit mask for RTCC_CNT
Definition at line
344
of file
efr32mg21_rtcc.h
.
| #define _RTCC_SYNCBUSY_CNT_SHIFT 3 |
Shift value for RTCC_CNT
Definition at line
343
of file
efr32mg21_rtcc.h
.
| #define _RTCC_SYNCBUSY_MASK 0x0000000FUL |
Mask for RTCC_SYNCBUSY
Definition at line
326
of file
efr32mg21_rtcc.h
.
| #define _RTCC_SYNCBUSY_PRECNT_DEFAULT 0x00000000UL |
Mode DEFAULT for RTCC_SYNCBUSY
Definition at line
340
of file
efr32mg21_rtcc.h
.
| #define _RTCC_SYNCBUSY_PRECNT_MASK 0x4UL |
Bit mask for RTCC_PRECNT
Definition at line
339
of file
efr32mg21_rtcc.h
.
| #define _RTCC_SYNCBUSY_PRECNT_SHIFT 2 |
Shift value for RTCC_PRECNT
Definition at line
338
of file
efr32mg21_rtcc.h
.
| #define _RTCC_SYNCBUSY_RESETVALUE 0x00000000UL |
Default value for RTCC_SYNCBUSY
Definition at line
325
of file
efr32mg21_rtcc.h
.
| #define _RTCC_SYNCBUSY_START_DEFAULT 0x00000000UL |
Mode DEFAULT for RTCC_SYNCBUSY
Definition at line
330
of file
efr32mg21_rtcc.h
.
| #define _RTCC_SYNCBUSY_START_MASK 0x1UL |
Bit mask for RTCC_START
Definition at line
329
of file
efr32mg21_rtcc.h
.
| #define _RTCC_SYNCBUSY_START_SHIFT 0 |
Shift value for RTCC_START
Definition at line
328
of file
efr32mg21_rtcc.h
.
| #define _RTCC_SYNCBUSY_STOP_DEFAULT 0x00000000UL |
Mode DEFAULT for RTCC_SYNCBUSY
Definition at line
335
of file
efr32mg21_rtcc.h
.
| #define _RTCC_SYNCBUSY_STOP_MASK 0x2UL |
Bit mask for RTCC_STOP
Definition at line
334
of file
efr32mg21_rtcc.h
.
| #define _RTCC_SYNCBUSY_STOP_SHIFT 1 |
Shift value for RTCC_STOP
Definition at line
333
of file
efr32mg21_rtcc.h
.
| #define RTCC_CC_CTRL_CMOA_CLEAR ( _RTCC_CC_CTRL_CMOA_CLEAR << 2) |
Shifted mode CLEAR for RTCC_CC_CTRL
Definition at line
381
of file
efr32mg21_rtcc.h
.
| #define RTCC_CC_CTRL_CMOA_DEFAULT ( _RTCC_CC_CTRL_CMOA_DEFAULT << 2) |
Shifted mode DEFAULT for RTCC_CC_CTRL
Definition at line
378
of file
efr32mg21_rtcc.h
.
| #define RTCC_CC_CTRL_CMOA_PULSE ( _RTCC_CC_CTRL_CMOA_PULSE << 2) |
Shifted mode PULSE for RTCC_CC_CTRL
Definition at line
379
of file
efr32mg21_rtcc.h
.
| #define RTCC_CC_CTRL_CMOA_SET ( _RTCC_CC_CTRL_CMOA_SET << 2) |
Shifted mode SET for RTCC_CC_CTRL
Definition at line
382
of file
efr32mg21_rtcc.h
.
| #define RTCC_CC_CTRL_CMOA_TOGGLE ( _RTCC_CC_CTRL_CMOA_TOGGLE << 2) |
Shifted mode TOGGLE for RTCC_CC_CTRL
Definition at line
380
of file
efr32mg21_rtcc.h
.
| #define RTCC_CC_CTRL_COMPBASE (0x1UL << 4) |
Capture compare channel comparison base.
Definition at line
383
of file
efr32mg21_rtcc.h
.
| #define RTCC_CC_CTRL_COMPBASE_CNT ( _RTCC_CC_CTRL_COMPBASE_CNT << 4) |
Shifted mode CNT for RTCC_CC_CTRL
Definition at line
390
of file
efr32mg21_rtcc.h
.
| #define RTCC_CC_CTRL_COMPBASE_DEFAULT ( _RTCC_CC_CTRL_COMPBASE_DEFAULT << 4) |
Shifted mode DEFAULT for RTCC_CC_CTRL
Definition at line
389
of file
efr32mg21_rtcc.h
.
| #define RTCC_CC_CTRL_COMPBASE_PRECNT ( _RTCC_CC_CTRL_COMPBASE_PRECNT << 4) |
Shifted mode PRECNT for RTCC_CC_CTRL
Definition at line
391
of file
efr32mg21_rtcc.h
.
| #define RTCC_CC_CTRL_ICEDGE_BOTH ( _RTCC_CC_CTRL_ICEDGE_BOTH << 5) |
Shifted mode BOTH for RTCC_CC_CTRL
Definition at line
402
of file
efr32mg21_rtcc.h
.
| #define RTCC_CC_CTRL_ICEDGE_DEFAULT ( _RTCC_CC_CTRL_ICEDGE_DEFAULT << 5) |
Shifted mode DEFAULT for RTCC_CC_CTRL
Definition at line
399
of file
efr32mg21_rtcc.h
.
| #define RTCC_CC_CTRL_ICEDGE_FALLING ( _RTCC_CC_CTRL_ICEDGE_FALLING << 5) |
Shifted mode FALLING for RTCC_CC_CTRL
Definition at line
401
of file
efr32mg21_rtcc.h
.
| #define RTCC_CC_CTRL_ICEDGE_NONE ( _RTCC_CC_CTRL_ICEDGE_NONE << 5) |
Shifted mode NONE for RTCC_CC_CTRL
Definition at line
403
of file
efr32mg21_rtcc.h
.
| #define RTCC_CC_CTRL_ICEDGE_RISING ( _RTCC_CC_CTRL_ICEDGE_RISING << 5) |
Shifted mode RISING for RTCC_CC_CTRL
Definition at line
400
of file
efr32mg21_rtcc.h
.
| #define RTCC_CC_CTRL_MODE_DEFAULT ( _RTCC_CC_CTRL_MODE_DEFAULT << 0) |
Shifted mode DEFAULT for RTCC_CC_CTRL
Definition at line
367
of file
efr32mg21_rtcc.h
.
| #define RTCC_CC_CTRL_MODE_INPUTCAPTURE ( _RTCC_CC_CTRL_MODE_INPUTCAPTURE << 0) |
Shifted mode INPUTCAPTURE for RTCC_CC_CTRL
Definition at line
369
of file
efr32mg21_rtcc.h
.
| #define RTCC_CC_CTRL_MODE_OFF ( _RTCC_CC_CTRL_MODE_OFF << 0) |
Shifted mode OFF for RTCC_CC_CTRL
Definition at line
368
of file
efr32mg21_rtcc.h
.
| #define RTCC_CC_CTRL_MODE_OUTPUTCOMPARE ( _RTCC_CC_CTRL_MODE_OUTPUTCOMPARE << 0) |
Shifted mode OUTPUTCOMPARE for RTCC_CC_CTRL
Definition at line
370
of file
efr32mg21_rtcc.h
.
| #define RTCC_CC_ICVALUE_IC_DEFAULT ( _RTCC_CC_ICVALUE_IC_DEFAULT << 0) |
Shifted mode DEFAULT for RTCC_CC_ICVALUE
Definition at line
419
of file
efr32mg21_rtcc.h
.
| #define RTCC_CC_OCVALUE_OC_DEFAULT ( _RTCC_CC_OCVALUE_OC_DEFAULT << 0) |
Shifted mode DEFAULT for RTCC_CC_OCVALUE
Definition at line
411
of file
efr32mg21_rtcc.h
.
| #define RTCC_CFG_CNTCCV1TOP (0x1UL << 2) |
CCV1 top value enable
Definition at line
155
of file
efr32mg21_rtcc.h
.
| #define RTCC_CFG_CNTCCV1TOP_DEFAULT ( _RTCC_CFG_CNTCCV1TOP_DEFAULT << 2) |
Shifted mode DEFAULT for RTCC_CFG
Definition at line
159
of file
efr32mg21_rtcc.h
.
| #define RTCC_CFG_CNTPRESC_DEFAULT ( _RTCC_CFG_CNTPRESC_DEFAULT << 4) |
Shifted mode DEFAULT for RTCC_CFG
Definition at line
188
of file
efr32mg21_rtcc.h
.
| #define RTCC_CFG_CNTPRESC_DIV1 ( _RTCC_CFG_CNTPRESC_DIV1 << 4) |
Shifted mode DIV1 for RTCC_CFG
Definition at line
189
of file
efr32mg21_rtcc.h
.
| #define RTCC_CFG_CNTPRESC_DIV1024 ( _RTCC_CFG_CNTPRESC_DIV1024 << 4) |
Shifted mode DIV1024 for RTCC_CFG
Definition at line
199
of file
efr32mg21_rtcc.h
.
| #define RTCC_CFG_CNTPRESC_DIV128 ( _RTCC_CFG_CNTPRESC_DIV128 << 4) |
Shifted mode DIV128 for RTCC_CFG
Definition at line
196
of file
efr32mg21_rtcc.h
.
| #define RTCC_CFG_CNTPRESC_DIV16 ( _RTCC_CFG_CNTPRESC_DIV16 << 4) |
Shifted mode DIV16 for RTCC_CFG
Definition at line
193
of file
efr32mg21_rtcc.h
.
| #define RTCC_CFG_CNTPRESC_DIV16384 ( _RTCC_CFG_CNTPRESC_DIV16384 << 4) |
Shifted mode DIV16384 for RTCC_CFG
Definition at line
203
of file
efr32mg21_rtcc.h
.
| #define RTCC_CFG_CNTPRESC_DIV2 ( _RTCC_CFG_CNTPRESC_DIV2 << 4) |
Shifted mode DIV2 for RTCC_CFG
Definition at line
190
of file
efr32mg21_rtcc.h
.
| #define RTCC_CFG_CNTPRESC_DIV2048 ( _RTCC_CFG_CNTPRESC_DIV2048 << 4) |
Shifted mode DIV2048 for RTCC_CFG
Definition at line
200
of file
efr32mg21_rtcc.h
.
| #define RTCC_CFG_CNTPRESC_DIV256 ( _RTCC_CFG_CNTPRESC_DIV256 << 4) |
Shifted mode DIV256 for RTCC_CFG
Definition at line
197
of file
efr32mg21_rtcc.h
.
| #define RTCC_CFG_CNTPRESC_DIV32 ( _RTCC_CFG_CNTPRESC_DIV32 << 4) |
Shifted mode DIV32 for RTCC_CFG
Definition at line
194
of file
efr32mg21_rtcc.h
.
| #define RTCC_CFG_CNTPRESC_DIV32768 ( _RTCC_CFG_CNTPRESC_DIV32768 << 4) |
Shifted mode DIV32768 for RTCC_CFG
Definition at line
204
of file
efr32mg21_rtcc.h
.
| #define RTCC_CFG_CNTPRESC_DIV4 ( _RTCC_CFG_CNTPRESC_DIV4 << 4) |
Shifted mode DIV4 for RTCC_CFG
Definition at line
191
of file
efr32mg21_rtcc.h
.
| #define RTCC_CFG_CNTPRESC_DIV4096 ( _RTCC_CFG_CNTPRESC_DIV4096 << 4) |
Shifted mode DIV4096 for RTCC_CFG
Definition at line
201
of file
efr32mg21_rtcc.h
.
| #define RTCC_CFG_CNTPRESC_DIV512 ( _RTCC_CFG_CNTPRESC_DIV512 << 4) |
Shifted mode DIV512 for RTCC_CFG
Definition at line
198
of file
efr32mg21_rtcc.h
.
| #define RTCC_CFG_CNTPRESC_DIV64 ( _RTCC_CFG_CNTPRESC_DIV64 << 4) |
Shifted mode DIV64 for RTCC_CFG
Definition at line
195
of file
efr32mg21_rtcc.h
.
| #define RTCC_CFG_CNTPRESC_DIV8 ( _RTCC_CFG_CNTPRESC_DIV8 << 4) |
Shifted mode DIV8 for RTCC_CFG
Definition at line
192
of file
efr32mg21_rtcc.h
.
| #define RTCC_CFG_CNTPRESC_DIV8192 ( _RTCC_CFG_CNTPRESC_DIV8192 << 4) |
Shifted mode DIV8192 for RTCC_CFG
Definition at line
202
of file
efr32mg21_rtcc.h
.
| #define RTCC_CFG_CNTTICK (0x1UL << 3) |
Counter prescaler mode.
Definition at line
160
of file
efr32mg21_rtcc.h
.
| #define RTCC_CFG_CNTTICK_CCV0MATCH ( _RTCC_CFG_CNTTICK_CCV0MATCH << 3) |
Shifted mode CCV0MATCH for RTCC_CFG
Definition at line
168
of file
efr32mg21_rtcc.h
.
| #define RTCC_CFG_CNTTICK_DEFAULT ( _RTCC_CFG_CNTTICK_DEFAULT << 3) |
Shifted mode DEFAULT for RTCC_CFG
Definition at line
166
of file
efr32mg21_rtcc.h
.
| #define RTCC_CFG_CNTTICK_PRESC ( _RTCC_CFG_CNTTICK_PRESC << 3) |
Shifted mode PRESC for RTCC_CFG
Definition at line
167
of file
efr32mg21_rtcc.h
.
| #define RTCC_CFG_DEBUGRUN (0x1UL << 0) |
Debug Mode Run Enable
Definition at line
141
of file
efr32mg21_rtcc.h
.
| #define RTCC_CFG_DEBUGRUN_DEFAULT ( _RTCC_CFG_DEBUGRUN_DEFAULT << 0) |
Shifted mode DEFAULT for RTCC_CFG
Definition at line
147
of file
efr32mg21_rtcc.h
.
| #define RTCC_CFG_DEBUGRUN_X0 ( _RTCC_CFG_DEBUGRUN_X0 << 0) |
Shifted mode X0 for RTCC_CFG
Definition at line
148
of file
efr32mg21_rtcc.h
.
| #define RTCC_CFG_DEBUGRUN_X1 ( _RTCC_CFG_DEBUGRUN_X1 << 0) |
Shifted mode X1 for RTCC_CFG
Definition at line
149
of file
efr32mg21_rtcc.h
.
| #define RTCC_CFG_PRECNTCCV0TOP (0x1UL << 1) |
Pre-counter CCV0 top value enable.
Definition at line
150
of file
efr32mg21_rtcc.h
.
| #define RTCC_CFG_PRECNTCCV0TOP_DEFAULT ( _RTCC_CFG_PRECNTCCV0TOP_DEFAULT << 1) |
Shifted mode DEFAULT for RTCC_CFG
Definition at line
154
of file
efr32mg21_rtcc.h
.
| #define RTCC_CMD_START (0x1UL << 0) |
Start RTCC main counter
Definition at line
209
of file
efr32mg21_rtcc.h
.
Referenced by RTCC_Init() , RTCC_Start() , and UDELAY_Calibrate() .
| #define RTCC_CMD_START_DEFAULT ( _RTCC_CMD_START_DEFAULT << 0) |
Shifted mode DEFAULT for RTCC_CMD
Definition at line
213
of file
efr32mg21_rtcc.h
.
| #define RTCC_CMD_STOP (0x1UL << 1) |
Stop RTCC main counter
Definition at line
214
of file
efr32mg21_rtcc.h
.
Referenced by RTCC_Init() , and RTCC_Stop() .
| #define RTCC_CMD_STOP_DEFAULT ( _RTCC_CMD_STOP_DEFAULT << 1) |
Shifted mode DEFAULT for RTCC_CMD
Definition at line
218
of file
efr32mg21_rtcc.h
.
| #define RTCC_CNT_CNT_DEFAULT ( _RTCC_CNT_CNT_DEFAULT << 0) |
Shifted mode DEFAULT for RTCC_CNT
Definition at line
310
of file
efr32mg21_rtcc.h
.
| #define RTCC_COMBCNT_CNTLSB_DEFAULT ( _RTCC_COMBCNT_CNTLSB_DEFAULT << 15) |
Shifted mode DEFAULT for RTCC_COMBCNT
Definition at line
322
of file
efr32mg21_rtcc.h
.
| #define RTCC_COMBCNT_PRECNT_DEFAULT ( _RTCC_COMBCNT_PRECNT_DEFAULT << 0) |
Shifted mode DEFAULT for RTCC_COMBCNT
Definition at line
318
of file
efr32mg21_rtcc.h
.
| #define RTCC_EN_EN (0x1UL << 0) |
RTCC Enable
Definition at line
132
of file
efr32mg21_rtcc.h
.
Referenced by RTCC_Enable() , RTCC_Init() , RTCC_Reset() , and UDELAY_Calibrate() .
| #define RTCC_EN_EN_DEFAULT ( _RTCC_EN_EN_DEFAULT << 0) |
Shifted mode DEFAULT for RTCC_EN
Definition at line
136
of file
efr32mg21_rtcc.h
.
| #define RTCC_IEN_CC0 (0x1UL << 2) |
CC Channel n Interrupt Enable
Definition at line
280
of file
efr32mg21_rtcc.h
.
| #define RTCC_IEN_CC0_DEFAULT ( _RTCC_IEN_CC0_DEFAULT << 2) |
Shifted mode DEFAULT for RTCC_IEN
Definition at line
284
of file
efr32mg21_rtcc.h
.
| #define RTCC_IEN_CC1 (0x1UL << 3) |
CC Channel n Interrupt Enable
Definition at line
285
of file
efr32mg21_rtcc.h
.
| #define RTCC_IEN_CC1_DEFAULT ( _RTCC_IEN_CC1_DEFAULT << 3) |
Shifted mode DEFAULT for RTCC_IEN
Definition at line
289
of file
efr32mg21_rtcc.h
.
| #define RTCC_IEN_CC2 (0x1UL << 4) |
CC Channel n Interrupt Enable
Definition at line
290
of file
efr32mg21_rtcc.h
.
| #define RTCC_IEN_CC2_DEFAULT ( _RTCC_IEN_CC2_DEFAULT << 4) |
Shifted mode DEFAULT for RTCC_IEN
Definition at line
294
of file
efr32mg21_rtcc.h
.
| #define RTCC_IEN_CNTTICK (0x1UL << 1) |
CNTTICK Interrupt Enable
Definition at line
275
of file
efr32mg21_rtcc.h
.
| #define RTCC_IEN_CNTTICK_DEFAULT ( _RTCC_IEN_CNTTICK_DEFAULT << 1) |
Shifted mode DEFAULT for RTCC_IEN
Definition at line
279
of file
efr32mg21_rtcc.h
.
| #define RTCC_IEN_OF (0x1UL << 0) |
OF Interrupt Enable
Definition at line
270
of file
efr32mg21_rtcc.h
.
| #define RTCC_IEN_OF_DEFAULT ( _RTCC_IEN_OF_DEFAULT << 0) |
Shifted mode DEFAULT for RTCC_IEN
Definition at line
274
of file
efr32mg21_rtcc.h
.
| #define RTCC_IF_CC0 (0x1UL << 2) |
CC Channel n Interrupt Flag
Definition at line
251
of file
efr32mg21_rtcc.h
.
| #define RTCC_IF_CC0_DEFAULT ( _RTCC_IF_CC0_DEFAULT << 2) |
Shifted mode DEFAULT for RTCC_IF
Definition at line
255
of file
efr32mg21_rtcc.h
.
| #define RTCC_IF_CC1 (0x1UL << 3) |
CC Channel n Interrupt Flag
Definition at line
256
of file
efr32mg21_rtcc.h
.
| #define RTCC_IF_CC1_DEFAULT ( _RTCC_IF_CC1_DEFAULT << 3) |
Shifted mode DEFAULT for RTCC_IF
Definition at line
260
of file
efr32mg21_rtcc.h
.
| #define RTCC_IF_CC2 (0x1UL << 4) |
CC Channel n Interrupt Flag
Definition at line
261
of file
efr32mg21_rtcc.h
.
| #define RTCC_IF_CC2_DEFAULT ( _RTCC_IF_CC2_DEFAULT << 4) |
Shifted mode DEFAULT for RTCC_IF
Definition at line
265
of file
efr32mg21_rtcc.h
.
| #define RTCC_IF_CNTTICK (0x1UL << 1) |
Main counter tick
Definition at line
246
of file
efr32mg21_rtcc.h
.
| #define RTCC_IF_CNTTICK_DEFAULT ( _RTCC_IF_CNTTICK_DEFAULT << 1) |
Shifted mode DEFAULT for RTCC_IF
Definition at line
250
of file
efr32mg21_rtcc.h
.
| #define RTCC_IF_OF (0x1UL << 0) |
Overflow Interrupt Flag
Definition at line
241
of file
efr32mg21_rtcc.h
.
| #define RTCC_IF_OF_DEFAULT ( _RTCC_IF_OF_DEFAULT << 0) |
Shifted mode DEFAULT for RTCC_IF
Definition at line
245
of file
efr32mg21_rtcc.h
.
| #define RTCC_IPVERSION_IPVERSION_DEFAULT ( _RTCC_IPVERSION_IPVERSION_DEFAULT << 0) |
Shifted mode DEFAULT for RTCC_IPVERSION
Definition at line
127
of file
efr32mg21_rtcc.h
.
| #define RTCC_LOCK_LOCKKEY_DEFAULT ( _RTCC_LOCK_LOCKKEY_DEFAULT << 0) |
Shifted mode DEFAULT for RTCC_LOCK
Definition at line
355
of file
efr32mg21_rtcc.h
.
| #define RTCC_LOCK_LOCKKEY_UNLOCK ( _RTCC_LOCK_LOCKKEY_UNLOCK << 0) |
Shifted mode UNLOCK for RTCC_LOCK
Definition at line
356
of file
efr32mg21_rtcc.h
.
Referenced by RTCC_Lock() , and RTCC_Unlock() .
| #define RTCC_PRECNT_PRECNT_DEFAULT ( _RTCC_PRECNT_PRECNT_DEFAULT << 0) |
Shifted mode DEFAULT for RTCC_PRECNT
Definition at line
302
of file
efr32mg21_rtcc.h
.
| #define RTCC_STATUS_RTCCLOCKSTATUS (0x1UL << 1) |
Lock Status
Definition at line
228
of file
efr32mg21_rtcc.h
.
| #define RTCC_STATUS_RTCCLOCKSTATUS_DEFAULT ( _RTCC_STATUS_RTCCLOCKSTATUS_DEFAULT << 1) |
Shifted mode DEFAULT for RTCC_STATUS
Definition at line
234
of file
efr32mg21_rtcc.h
.
| #define RTCC_STATUS_RTCCLOCKSTATUS_LOCKED ( _RTCC_STATUS_RTCCLOCKSTATUS_LOCKED << 1) |
Shifted mode LOCKED for RTCC_STATUS
Definition at line
236
of file
efr32mg21_rtcc.h
.
| #define RTCC_STATUS_RTCCLOCKSTATUS_UNLOCKED ( _RTCC_STATUS_RTCCLOCKSTATUS_UNLOCKED << 1) |
Shifted mode UNLOCKED for RTCC_STATUS
Definition at line
235
of file
efr32mg21_rtcc.h
.
| #define RTCC_STATUS_RUNNING (0x1UL << 0) |
RTCC running status
Definition at line
223
of file
efr32mg21_rtcc.h
.
| #define RTCC_STATUS_RUNNING_DEFAULT ( _RTCC_STATUS_RUNNING_DEFAULT << 0) |
Shifted mode DEFAULT for RTCC_STATUS
Definition at line
227
of file
efr32mg21_rtcc.h
.
| #define RTCC_SYNCBUSY_CNT (0x1UL << 3) |
Sync busy for CNT
Definition at line
342
of file
efr32mg21_rtcc.h
.
Referenced by RTCC_CombinedCounterGet() , RTCC_CounterGet() , and RTCC_CounterSet() .
| #define RTCC_SYNCBUSY_CNT_DEFAULT ( _RTCC_SYNCBUSY_CNT_DEFAULT << 3) |
Shifted mode DEFAULT for RTCC_SYNCBUSY
Definition at line
346
of file
efr32mg21_rtcc.h
.
| #define RTCC_SYNCBUSY_PRECNT (0x1UL << 2) |
Sync busy for PRECNT
Definition at line
337
of file
efr32mg21_rtcc.h
.
Referenced by RTCC_CombinedCounterGet() , RTCC_PreCounterGet() , and RTCC_PreCounterSet() .
| #define RTCC_SYNCBUSY_PRECNT_DEFAULT ( _RTCC_SYNCBUSY_PRECNT_DEFAULT << 2) |
Shifted mode DEFAULT for RTCC_SYNCBUSY
Definition at line
341
of file
efr32mg21_rtcc.h
.
| #define RTCC_SYNCBUSY_START (0x1UL << 0) |
Sync busy for START
Definition at line
327
of file
efr32mg21_rtcc.h
.
Referenced by RTCC_StatusGet() .
| #define RTCC_SYNCBUSY_START_DEFAULT ( _RTCC_SYNCBUSY_START_DEFAULT << 0) |
Shifted mode DEFAULT for RTCC_SYNCBUSY
Definition at line
331
of file
efr32mg21_rtcc.h
.
| #define RTCC_SYNCBUSY_STOP (0x1UL << 1) |
Sync busy for STOP
Definition at line
332
of file
efr32mg21_rtcc.h
.
Referenced by RTCC_StatusGet() .
| #define RTCC_SYNCBUSY_STOP_DEFAULT ( _RTCC_SYNCBUSY_STOP_DEFAULT << 1) |
Shifted mode DEFAULT for RTCC_SYNCBUSY
Definition at line
336
of file
efr32mg21_rtcc.h
.