MODEM Bit FieldsDevices > MODEM

Macros
#define	_MODEM_AFC_AFCAVGPER_DEFAULT 0x00000000UL
#define	_MODEM_AFC_AFCAVGPER_MASK 0xE00000UL
#define	_MODEM_AFC_AFCAVGPER_SHIFT 21
#define	_MODEM_AFC_AFCDEL_DEFAULT 0x00000000UL
#define	_MODEM_AFC_AFCDEL_MASK 0x1F0000UL
#define	_MODEM_AFC_AFCDEL_SHIFT 16
#define	_MODEM_AFC_AFCDELDET_DEFAULT 0x00000000UL
#define	_MODEM_AFC_AFCDELDET_MASK 0x10000000UL
#define	_MODEM_AFC_AFCDELDET_SHIFT 28
#define	_MODEM_AFC_AFCDSAFREQOFFEST_DEFAULT 0x00000000UL
#define	_MODEM_AFC_AFCDSAFREQOFFEST_MASK 0x8000000UL
#define	_MODEM_AFC_AFCDSAFREQOFFEST_SHIFT 27
#define	_MODEM_AFC_AFCENINTCOMP_DEFAULT 0x00000000UL
#define	_MODEM_AFC_AFCENINTCOMP_MASK 0x4000000UL
#define	_MODEM_AFC_AFCENINTCOMP_SHIFT 26
#define	_MODEM_AFC_AFCLIMRESET_DEFAULT 0x00000000UL
#define	_MODEM_AFC_AFCLIMRESET_MASK 0x1000000UL
#define	_MODEM_AFC_AFCLIMRESET_SHIFT 24
#define	_MODEM_AFC_AFCONESHOT_DEFAULT 0x00000000UL
#define	_MODEM_AFC_AFCONESHOT_MASK 0x2000000UL
#define	_MODEM_AFC_AFCONESHOT_SHIFT 25
#define	_MODEM_AFC_AFCRXCLR_DEFAULT 0x00000000UL
#define	_MODEM_AFC_AFCRXCLR_MASK 0x8000UL
#define	_MODEM_AFC_AFCRXCLR_SHIFT 15
#define	_MODEM_AFC_AFCRXMODE_DEFAULT 0x00000000UL
#define	_MODEM_AFC_AFCRXMODE_DIS 0x00000000UL
#define	_MODEM_AFC_AFCRXMODE_FRAMELOCK 0x00000005UL
#define	_MODEM_AFC_AFCRXMODE_FRAMELOCKPRESTART 0x00000006UL
#define	_MODEM_AFC_AFCRXMODE_FREE 0x00000001UL
#define	_MODEM_AFC_AFCRXMODE_FREEPRESTART 0x00000002UL
#define	_MODEM_AFC_AFCRXMODE_MASK 0x1C00UL
#define	_MODEM_AFC_AFCRXMODE_PRELOCK 0x00000004UL
#define	_MODEM_AFC_AFCRXMODE_SHIFT 10
#define	_MODEM_AFC_AFCRXMODE_TIMLOCK 0x00000003UL
#define	_MODEM_AFC_AFCSCALEE_DEFAULT 0x00000000UL
#define	_MODEM_AFC_AFCSCALEE_MASK 0x1E0UL
#define	_MODEM_AFC_AFCSCALEE_SHIFT 5
#define	_MODEM_AFC_AFCSCALEM_DEFAULT 0x00000000UL
#define	_MODEM_AFC_AFCSCALEM_MASK 0x1FUL
#define	_MODEM_AFC_AFCSCALEM_SHIFT 0
#define	_MODEM_AFC_AFCTXMODE_DEFAULT 0x00000000UL
#define	_MODEM_AFC_AFCTXMODE_DIS 0x00000000UL
#define	_MODEM_AFC_AFCTXMODE_FRAMELOCK 0x00000002UL
#define	_MODEM_AFC_AFCTXMODE_MASK 0x6000UL
#define	_MODEM_AFC_AFCTXMODE_PRELOCK 0x00000001UL
#define	_MODEM_AFC_AFCTXMODE_SHIFT 13
#define	_MODEM_AFC_MASK 0x1FFFFDFFUL
#define	_MODEM_AFC_RESETVALUE 0x00000000UL
#define	_MODEM_AFCADJLIM_AFCADJLIM_DEFAULT 0x00000000UL
#define	_MODEM_AFCADJLIM_AFCADJLIM_MASK 0x3FFFFUL
#define	_MODEM_AFCADJLIM_AFCADJLIM_SHIFT 0
#define	_MODEM_AFCADJLIM_MASK 0x0003FFFFUL
#define	_MODEM_AFCADJLIM_RESETVALUE 0x00000000UL
#define	_MODEM_AFCADJRX_AFCADJRX_DEFAULT 0x00000000UL
#define	_MODEM_AFCADJRX_AFCADJRX_MASK 0x7FFFFUL
#define	_MODEM_AFCADJRX_AFCADJRX_SHIFT 0
#define	_MODEM_AFCADJRX_MASK 0x0007FFFFUL
#define	_MODEM_AFCADJRX_RESETVALUE 0x00000000UL
#define	_MODEM_AFCADJTX_AFCADJTX_DEFAULT 0x00000000UL
#define	_MODEM_AFCADJTX_AFCADJTX_MASK 0x7FFFFUL
#define	_MODEM_AFCADJTX_AFCADJTX_SHIFT 0
#define	_MODEM_AFCADJTX_MASK 0x0007FFFFUL
#define	_MODEM_AFCADJTX_RESETVALUE 0x00000000UL
#define	_MODEM_AUTOCG_AUTOCGEN_DEFAULT 0x00000000UL
#define	_MODEM_AUTOCG_AUTOCGEN_MASK 0xFFFFUL
#define	_MODEM_AUTOCG_AUTOCGEN_SHIFT 0
#define	_MODEM_AUTOCG_MASK 0x0000FFFFUL
#define	_MODEM_AUTOCG_RESETVALUE 0x00000000UL
#define	_MODEM_BLEIQDSA_BLEIQDSADIFFTH1_DEFAULT 0x00000000UL
#define	_MODEM_BLEIQDSA_BLEIQDSADIFFTH1_MASK 0xFFFC0000UL
#define	_MODEM_BLEIQDSA_BLEIQDSADIFFTH1_SHIFT 18
#define	_MODEM_BLEIQDSA_BLEIQDSAEN_DEFAULT 0x00000000UL
#define	_MODEM_BLEIQDSA_BLEIQDSAEN_MASK 0x1UL
#define	_MODEM_BLEIQDSA_BLEIQDSAEN_SHIFT 0
#define	_MODEM_BLEIQDSA_BLEIQDSAIIRCOEFPWR_DEFAULT 0x00000000UL
#define	_MODEM_BLEIQDSA_BLEIQDSAIIRCOEFPWR_MASK 0x38000UL
#define	_MODEM_BLEIQDSA_BLEIQDSAIIRCOEFPWR_SHIFT 15
#define	_MODEM_BLEIQDSA_BLEIQDSATH_DEFAULT 0x00000000UL
#define	_MODEM_BLEIQDSA_BLEIQDSATH_MASK 0x7FFEUL
#define	_MODEM_BLEIQDSA_BLEIQDSATH_SHIFT 1
#define	_MODEM_BLEIQDSA_MASK 0xFFFFFFFFUL
#define	_MODEM_BLEIQDSA_RESETVALUE 0x00000000UL
#define	_MODEM_BLEIQDSAEXT1_BLEIQDSAADDRBIAS_DEFAULT 0x00000000UL
#define	_MODEM_BLEIQDSAEXT1_BLEIQDSAADDRBIAS_MASK 0x780UL
#define	_MODEM_BLEIQDSAEXT1_BLEIQDSAADDRBIAS_SHIFT 7
#define	_MODEM_BLEIQDSAEXT1_BLEIQDSATHCOMB_DEFAULT 0x00000000UL
#define	_MODEM_BLEIQDSAEXT1_BLEIQDSATHCOMB_MASK 0x1FFF800UL
#define	_MODEM_BLEIQDSAEXT1_BLEIQDSATHCOMB_SHIFT 11
#define	_MODEM_BLEIQDSAEXT1_CHPWRFIRAVGEN_DEFAULT 0x00000000UL
#define	_MODEM_BLEIQDSAEXT1_CHPWRFIRAVGEN_MASK 0x4UL
#define	_MODEM_BLEIQDSAEXT1_CHPWRFIRAVGEN_SHIFT 2
#define	_MODEM_BLEIQDSAEXT1_CHPWRFIRAVGVAL_AVG0 0x00000000UL
#define	_MODEM_BLEIQDSAEXT1_CHPWRFIRAVGVAL_AVG2 0x00000001UL
#define	_MODEM_BLEIQDSAEXT1_CHPWRFIRAVGVAL_AVG4 0x00000002UL
#define	_MODEM_BLEIQDSAEXT1_CHPWRFIRAVGVAL_AVG8 0x00000003UL
#define	_MODEM_BLEIQDSAEXT1_CHPWRFIRAVGVAL_DEFAULT 0x00000000UL
#define	_MODEM_BLEIQDSAEXT1_CHPWRFIRAVGVAL_MASK 0x18UL
#define	_MODEM_BLEIQDSAEXT1_CHPWRFIRAVGVAL_SHIFT 3
#define	_MODEM_BLEIQDSAEXT1_CORRIIRAVGMULFACT_DEFAULT 0x00000000UL
#define	_MODEM_BLEIQDSAEXT1_CORRIIRAVGMULFACT_MASK 0x60UL
#define	_MODEM_BLEIQDSAEXT1_CORRIIRAVGMULFACT_SHIFT 5
#define	_MODEM_BLEIQDSAEXT1_FREQSCALEIQDSA_DEFAULT 0x00000000UL
#define	_MODEM_BLEIQDSAEXT1_FREQSCALEIQDSA_MASK 0x3UL
#define	_MODEM_BLEIQDSAEXT1_FREQSCALEIQDSA_SHIFT 0
#define	_MODEM_BLEIQDSAEXT1_IIRRST_DEFAULT 0x00000000UL
#define	_MODEM_BLEIQDSAEXT1_IIRRST_MASK 0x20000000UL
#define	_MODEM_BLEIQDSAEXT1_IIRRST_SHIFT 29
#define	_MODEM_BLEIQDSAEXT1_MASK 0x3FFFFFFFUL
#define	_MODEM_BLEIQDSAEXT1_MAXCORRCNTIQDSA_DEFAULT 0x00000007UL
#define	_MODEM_BLEIQDSAEXT1_MAXCORRCNTIQDSA_MASK 0x1E000000UL
#define	_MODEM_BLEIQDSAEXT1_MAXCORRCNTIQDSA_SHIFT 25
#define	_MODEM_BLEIQDSAEXT1_RESETVALUE 0x0E000000UL
#define	_MODEM_BREST_BRESTINT_DEFAULT 0x00000000UL
#define	_MODEM_BREST_BRESTINT_MASK 0x3FUL
#define	_MODEM_BREST_BRESTINT_SHIFT 0
#define	_MODEM_BREST_BRESTNUM_DEFAULT 0x00000000UL
#define	_MODEM_BREST_BRESTNUM_MASK 0x7C0UL
#define	_MODEM_BREST_BRESTNUM_SHIFT 6
#define	_MODEM_BREST_MASK 0x000007FFUL
#define	_MODEM_BREST_RESETVALUE 0x00000000UL
#define	_MODEM_CF_CFOSR_CF0 0x00000005UL
#define	_MODEM_CF_CFOSR_CF12 0x00000002UL
#define	_MODEM_CF_CFOSR_CF16 0x00000003UL
#define	_MODEM_CF_CFOSR_CF32 0x00000004UL
#define	_MODEM_CF_CFOSR_CF7 0x00000000UL
#define	_MODEM_CF_CFOSR_CF8 0x00000001UL
#define	_MODEM_CF_CFOSR_DEFAULT 0x00000000UL
#define	_MODEM_CF_CFOSR_MASK 0x3800000UL
#define	_MODEM_CF_CFOSR_SHIFT 23
#define	_MODEM_CF_DEC0_DEFAULT 0x00000000UL
#define	_MODEM_CF_DEC0_DF3 0x00000000UL
#define	_MODEM_CF_DEC0_DF4NARROW 0x00000002UL
#define	_MODEM_CF_DEC0_DF4WIDE 0x00000001UL
#define	_MODEM_CF_DEC0_DF8NARROW 0x00000004UL
#define	_MODEM_CF_DEC0_DF8WIDE 0x00000003UL
#define	_MODEM_CF_DEC0_MASK 0x7UL
#define	_MODEM_CF_DEC0_SHIFT 0
#define	_MODEM_CF_DEC1_DEFAULT 0x00000000UL
#define	_MODEM_CF_DEC1_MASK 0x1FFF8UL
#define	_MODEM_CF_DEC1_SHIFT 3
#define	_MODEM_CF_DEC1GAIN_ADD0 0x00000000UL
#define	_MODEM_CF_DEC1GAIN_ADD12 0x00000002UL
#define	_MODEM_CF_DEC1GAIN_ADD6 0x00000001UL
#define	_MODEM_CF_DEC1GAIN_DEFAULT 0x00000000UL
#define	_MODEM_CF_DEC1GAIN_MASK 0xC000000UL
#define	_MODEM_CF_DEC1GAIN_SHIFT 26
#define	_MODEM_CF_DEC2_DEFAULT 0x00000000UL
#define	_MODEM_CF_DEC2_MASK 0x7E0000UL
#define	_MODEM_CF_DEC2_SHIFT 17
#define	_MODEM_CF_MASK 0xFFFFFFFFUL
#define	_MODEM_CF_RESETVALUE 0x00000000UL
#define	_MODEM_CGCLKSTOP_FORCEOFF_DEFAULT 0x00000000UL
#define	_MODEM_CGCLKSTOP_FORCEOFF_MASK 0xFFFFUL
#define	_MODEM_CGCLKSTOP_FORCEOFF_SHIFT 0
#define	_MODEM_CGCLKSTOP_MASK 0x0000FFFFUL
#define	_MODEM_CGCLKSTOP_RESETVALUE 0x00000000UL
#define	_MODEM_CMD_AFCRXCLEAR_DEFAULT 0x00000000UL
#define	_MODEM_CMD_AFCRXCLEAR_MASK 0x20UL
#define	_MODEM_CMD_AFCRXCLEAR_SHIFT 5
#define	_MODEM_CMD_AFCTXCLEAR_DEFAULT 0x00000000UL
#define	_MODEM_CMD_AFCTXCLEAR_MASK 0x10UL
#define	_MODEM_CMD_AFCTXCLEAR_SHIFT 4
#define	_MODEM_CMD_AFCTXLOCK_DEFAULT 0x00000000UL
#define	_MODEM_CMD_AFCTXLOCK_MASK 0x8UL
#define	_MODEM_CMD_AFCTXLOCK_SHIFT 3
#define	_MODEM_CMD_MASK 0x00000039UL
#define	_MODEM_CMD_PRESTOP_DEFAULT 0x00000000UL
#define	_MODEM_CMD_PRESTOP_MASK 0x1UL
#define	_MODEM_CMD_PRESTOP_SHIFT 0
#define	_MODEM_CMD_RESETVALUE 0x00000000UL
#define	_MODEM_COH0_COHCHPWRTH0_DEFAULT 0x00000000UL
#define	_MODEM_COH0_COHCHPWRTH0_MASK 0xFF00UL
#define	_MODEM_COH0_COHCHPWRTH0_SHIFT 8
#define	_MODEM_COH0_COHCHPWRTH1_DEFAULT 0x00000000UL
#define	_MODEM_COH0_COHCHPWRTH1_MASK 0xFF0000UL
#define	_MODEM_COH0_COHCHPWRTH1_SHIFT 16
#define	_MODEM_COH0_COHCHPWRTH2_DEFAULT 0x00000000UL
#define	_MODEM_COH0_COHCHPWRTH2_MASK 0xFF000000UL
#define	_MODEM_COH0_COHCHPWRTH2_SHIFT 24
#define	_MODEM_COH0_COHDYNAMICBBSSEN_DEFAULT 0x00000000UL
#define	_MODEM_COH0_COHDYNAMICBBSSEN_MASK 0x1UL
#define	_MODEM_COH0_COHDYNAMICBBSSEN_SHIFT 0
#define	_MODEM_COH0_COHDYNAMICPRETHRESH_DEFAULT 0x00000000UL
#define	_MODEM_COH0_COHDYNAMICPRETHRESH_MASK 0x4UL
#define	_MODEM_COH0_COHDYNAMICPRETHRESH_SHIFT 2
#define	_MODEM_COH0_COHDYNAMICPRETHRESHSEL_DEFAULT 0x00000000UL
#define	_MODEM_COH0_COHDYNAMICPRETHRESHSEL_MASK 0xE0UL
#define	_MODEM_COH0_COHDYNAMICPRETHRESHSEL_SEL0 0x00000000UL
#define	_MODEM_COH0_COHDYNAMICPRETHRESHSEL_SEL1 0x00000001UL
#define	_MODEM_COH0_COHDYNAMICPRETHRESHSEL_SEL2 0x00000002UL
#define	_MODEM_COH0_COHDYNAMICPRETHRESHSEL_SEL3 0x00000003UL
#define	_MODEM_COH0_COHDYNAMICPRETHRESHSEL_SEL4 0x00000004UL
#define	_MODEM_COH0_COHDYNAMICPRETHRESHSEL_SHIFT 5
#define	_MODEM_COH0_COHDYNAMICSYNCTHRESH_DEFAULT 0x00000000UL
#define	_MODEM_COH0_COHDYNAMICSYNCTHRESH_MASK 0x2UL
#define	_MODEM_COH0_COHDYNAMICSYNCTHRESH_SHIFT 1
#define	_MODEM_COH0_MASK 0xFFFFFFE7UL
#define	_MODEM_COH0_RESETVALUE 0x00000000UL
#define	_MODEM_COH1_MASK 0xFFFFFFFFUL
#define	_MODEM_COH1_RESETVALUE 0x00000000UL
#define	_MODEM_COH1_SYNCTHRESH0_DEFAULT 0x00000000UL
#define	_MODEM_COH1_SYNCTHRESH0_MASK 0xFFUL
#define	_MODEM_COH1_SYNCTHRESH0_SHIFT 0
#define	_MODEM_COH1_SYNCTHRESH1_DEFAULT 0x00000000UL
#define	_MODEM_COH1_SYNCTHRESH1_MASK 0xFF00UL
#define	_MODEM_COH1_SYNCTHRESH1_SHIFT 8
#define	_MODEM_COH1_SYNCTHRESH2_DEFAULT 0x00000000UL
#define	_MODEM_COH1_SYNCTHRESH2_MASK 0xFF0000UL
#define	_MODEM_COH1_SYNCTHRESH2_SHIFT 16
#define	_MODEM_COH1_SYNCTHRESH3_DEFAULT 0x00000000UL
#define	_MODEM_COH1_SYNCTHRESH3_MASK 0xFF000000UL
#define	_MODEM_COH1_SYNCTHRESH3_SHIFT 24
#define	_MODEM_COH2_DSAPEAKCHPWRTH_DEFAULT 0x00000000UL
#define	_MODEM_COH2_DSAPEAKCHPWRTH_MASK 0xFF0000UL
#define	_MODEM_COH2_DSAPEAKCHPWRTH_SHIFT 16
#define	_MODEM_COH2_FIXEDCDTHFORIIR_DEFAULT 0x00000000UL
#define	_MODEM_COH2_FIXEDCDTHFORIIR_MASK 0xFF000000UL
#define	_MODEM_COH2_FIXEDCDTHFORIIR_SHIFT 24
#define	_MODEM_COH2_MASK 0xFFFFFFFFUL
#define	_MODEM_COH2_RESETVALUE 0x00000000UL
#define	_MODEM_COH2_SYNCTHRESHDELTA0_DEFAULT 0x00000000UL
#define	_MODEM_COH2_SYNCTHRESHDELTA0_MASK 0xFUL
#define	_MODEM_COH2_SYNCTHRESHDELTA0_SHIFT 0
#define	_MODEM_COH2_SYNCTHRESHDELTA1_DEFAULT 0x00000000UL
#define	_MODEM_COH2_SYNCTHRESHDELTA1_MASK 0xF0UL
#define	_MODEM_COH2_SYNCTHRESHDELTA1_SHIFT 4
#define	_MODEM_COH2_SYNCTHRESHDELTA2_DEFAULT 0x00000000UL
#define	_MODEM_COH2_SYNCTHRESHDELTA2_MASK 0xF00UL
#define	_MODEM_COH2_SYNCTHRESHDELTA2_SHIFT 8
#define	_MODEM_COH2_SYNCTHRESHDELTA3_DEFAULT 0x00000000UL
#define	_MODEM_COH2_SYNCTHRESHDELTA3_MASK 0xF000UL
#define	_MODEM_COH2_SYNCTHRESHDELTA3_SHIFT 12
#define	_MODEM_COH3_CDSS_DEFAULT 0x00000000UL
#define	_MODEM_COH3_CDSS_MASK 0x3800UL
#define	_MODEM_COH3_CDSS_SHIFT 11
#define	_MODEM_COH3_COHDSAADDWNDSIZE_DEFAULT 0x00000000UL
#define	_MODEM_COH3_COHDSAADDWNDSIZE_MASK 0x7FEUL
#define	_MODEM_COH3_COHDSAADDWNDSIZE_SHIFT 1
#define	_MODEM_COH3_COHDSADETDIS_DEFAULT 0x00000000UL
#define	_MODEM_COH3_COHDSADETDIS_MASK 0x10000000UL
#define	_MODEM_COH3_COHDSADETDIS_SHIFT 28
#define	_MODEM_COH3_COHDSAEN_DEFAULT 0x00000000UL
#define	_MODEM_COH3_COHDSAEN_MASK 0x1UL
#define	_MODEM_COH3_COHDSAEN_SHIFT 0
#define	_MODEM_COH3_DSAPEAKCHKEN_DEFAULT 0x00000000UL
#define	_MODEM_COH3_DSAPEAKCHKEN_MASK 0x4000UL
#define	_MODEM_COH3_DSAPEAKCHKEN_SHIFT 14
#define	_MODEM_COH3_DSAPEAKCHPWREN_DEFAULT 0x00000000UL
#define	_MODEM_COH3_DSAPEAKCHPWREN_MASK 0x40000UL
#define	_MODEM_COH3_DSAPEAKCHPWREN_SHIFT 18
#define	_MODEM_COH3_DSAPEAKINDLEN_DEFAULT 0x00000000UL
#define	_MODEM_COH3_DSAPEAKINDLEN_MASK 0x38000UL
#define	_MODEM_COH3_DSAPEAKINDLEN_SHIFT 15
#define	_MODEM_COH3_DYNIIRCOEFOPTION_DEFAULT 0x00000000UL
#define	_MODEM_COH3_DYNIIRCOEFOPTION_MASK 0x300000UL
#define	_MODEM_COH3_DYNIIRCOEFOPTION_SHIFT 20
#define	_MODEM_COH3_LOGICBASEDCOHDEMODGATE_DEFAULT 0x00000000UL
#define	_MODEM_COH3_LOGICBASEDCOHDEMODGATE_MASK 0x80000UL
#define	_MODEM_COH3_LOGICBASEDCOHDEMODGATE_SHIFT 19
#define	_MODEM_COH3_MASK 0x1FFFFFFFUL
#define	_MODEM_COH3_ONEPEAKQUALEN_DEFAULT 0x00000000UL
#define	_MODEM_COH3_ONEPEAKQUALEN_MASK 0x400000UL
#define	_MODEM_COH3_ONEPEAKQUALEN_SHIFT 22
#define	_MODEM_COH3_PEAKCHKTIMOUT_DEFAULT 0x00000000UL
#define	_MODEM_COH3_PEAKCHKTIMOUT_MASK 0xF800000UL
#define	_MODEM_COH3_PEAKCHKTIMOUT_SHIFT 23
#define	_MODEM_COH3_RESETVALUE 0x00000000UL
#define	_MODEM_CTRL0_CODING_DEFAULT 0x00000000UL
#define	_MODEM_CTRL0_CODING_DSSS 0x00000002UL
#define	_MODEM_CTRL0_CODING_LINECODE 0x00000003UL
#define	_MODEM_CTRL0_CODING_MANCHESTER 0x00000001UL
#define	_MODEM_CTRL0_CODING_MASK 0x30UL
#define	_MODEM_CTRL0_CODING_NRZ 0x00000000UL
#define	_MODEM_CTRL0_CODING_SHIFT 4
#define	_MODEM_CTRL0_DEMODRAWDATASEL_ADC 0x00000002UL
#define	_MODEM_CTRL0_DEMODRAWDATASEL_DEFAULT 0x00000000UL
#define	_MODEM_CTRL0_DEMODRAWDATASEL_DEMOD 0x00000007UL
#define	_MODEM_CTRL0_DEMODRAWDATASEL_DIS 0x00000000UL
#define	_MODEM_CTRL0_DEMODRAWDATASEL_ENTROPY 0x00000001UL
#define	_MODEM_CTRL0_DEMODRAWDATASEL_FILTFULL 0x00000005UL
#define	_MODEM_CTRL0_DEMODRAWDATASEL_FILTLSB 0x00000003UL
#define	_MODEM_CTRL0_DEMODRAWDATASEL_FILTMSB 0x00000004UL
#define	_MODEM_CTRL0_DEMODRAWDATASEL_FREQ 0x00000006UL
#define	_MODEM_CTRL0_DEMODRAWDATASEL_MASK 0x38000000UL
#define	_MODEM_CTRL0_DEMODRAWDATASEL_SHIFT 27
#define	_MODEM_CTRL0_DETDIS_DEFAULT 0x00000000UL
#define	_MODEM_CTRL0_DETDIS_MASK 0x200000UL
#define	_MODEM_CTRL0_DETDIS_SHIFT 21
#define	_MODEM_CTRL0_DIFFENCMODE_DEFAULT 0x00000000UL
#define	_MODEM_CTRL0_DIFFENCMODE_DIS 0x00000000UL
#define	_MODEM_CTRL0_DIFFENCMODE_MASK 0x1C00000UL
#define	_MODEM_CTRL0_DIFFENCMODE_RE0 0x00000002UL
#define	_MODEM_CTRL0_DIFFENCMODE_RE1 0x00000004UL
#define	_MODEM_CTRL0_DIFFENCMODE_RR0 0x00000001UL
#define	_MODEM_CTRL0_DIFFENCMODE_RR1 0x00000003UL
#define	_MODEM_CTRL0_DIFFENCMODE_SHIFT 22
#define	_MODEM_CTRL0_DSSSDOUBLE_CONJ 0x00000002UL
#define	_MODEM_CTRL0_DSSSDOUBLE_DEFAULT 0x00000000UL
#define	_MODEM_CTRL0_DSSSDOUBLE_DIS 0x00000000UL
#define	_MODEM_CTRL0_DSSSDOUBLE_INV 0x00000001UL
#define	_MODEM_CTRL0_DSSSDOUBLE_MASK 0x180000UL
#define	_MODEM_CTRL0_DSSSDOUBLE_SHIFT 19
#define	_MODEM_CTRL0_DSSSLEN_DEFAULT 0x00000000UL
#define	_MODEM_CTRL0_DSSSLEN_MASK 0xF800UL
#define	_MODEM_CTRL0_DSSSLEN_SHIFT 11
#define	_MODEM_CTRL0_DSSSSHIFTS_DEFAULT 0x00000000UL
#define	_MODEM_CTRL0_DSSSSHIFTS_MASK 0x70000UL
#define	_MODEM_CTRL0_DSSSSHIFTS_NOSHIFT 0x00000000UL
#define	_MODEM_CTRL0_DSSSSHIFTS_SHIFT 16
#define	_MODEM_CTRL0_DSSSSHIFTS_SHIFT1 0x00000001UL
#define	_MODEM_CTRL0_DSSSSHIFTS_SHIFT16 0x00000005UL
#define	_MODEM_CTRL0_DSSSSHIFTS_SHIFT2 0x00000002UL
#define	_MODEM_CTRL0_DSSSSHIFTS_SHIFT4 0x00000003UL
#define	_MODEM_CTRL0_DSSSSHIFTS_SHIFT8 0x00000004UL
#define	_MODEM_CTRL0_DUALCORROPTDIS_DEFAULT 0x00000000UL
#define	_MODEM_CTRL0_DUALCORROPTDIS_MASK 0x200UL
#define	_MODEM_CTRL0_DUALCORROPTDIS_SHIFT 9
#define	_MODEM_CTRL0_FDM0DIFFDIS_DEFAULT 0x00000000UL
#define	_MODEM_CTRL0_FDM0DIFFDIS_MASK 0x1UL
#define	_MODEM_CTRL0_FDM0DIFFDIS_SHIFT 0
#define	_MODEM_CTRL0_FRAMEDETDEL_DEFAULT 0x00000000UL
#define	_MODEM_CTRL0_FRAMEDETDEL_DEL0 0x00000000UL
#define	_MODEM_CTRL0_FRAMEDETDEL_DEL16 0x00000002UL
#define	_MODEM_CTRL0_FRAMEDETDEL_DEL32 0x00000003UL
#define	_MODEM_CTRL0_FRAMEDETDEL_DEL8 0x00000001UL
#define	_MODEM_CTRL0_FRAMEDETDEL_MASK 0xC0000000UL
#define	_MODEM_CTRL0_FRAMEDETDEL_SHIFT 30
#define	_MODEM_CTRL0_MAPFSK_DEFAULT 0x00000000UL
#define	_MODEM_CTRL0_MAPFSK_MAP0 0x00000000UL
#define	_MODEM_CTRL0_MAPFSK_MAP1 0x00000001UL
#define	_MODEM_CTRL0_MAPFSK_MAP2 0x00000002UL
#define	_MODEM_CTRL0_MAPFSK_MAP3 0x00000003UL
#define	_MODEM_CTRL0_MAPFSK_MAP4 0x00000004UL
#define	_MODEM_CTRL0_MAPFSK_MAP5 0x00000005UL
#define	_MODEM_CTRL0_MAPFSK_MAP6 0x00000006UL
#define	_MODEM_CTRL0_MAPFSK_MAP7 0x00000007UL
#define	_MODEM_CTRL0_MAPFSK_MASK 0xEUL
#define	_MODEM_CTRL0_MAPFSK_SHIFT 1
#define	_MODEM_CTRL0_MASK 0xFFFFFFFFUL
#define	_MODEM_CTRL0_MODFORMAT_BPSK 0x00000002UL
#define	_MODEM_CTRL0_MODFORMAT_DBPSK 0x00000003UL
#define	_MODEM_CTRL0_MODFORMAT_DEFAULT 0x00000000UL
#define	_MODEM_CTRL0_MODFORMAT_FSK2 0x00000000UL
#define	_MODEM_CTRL0_MODFORMAT_FSK4 0x00000001UL
#define	_MODEM_CTRL0_MODFORMAT_MASK 0x1C0UL
#define	_MODEM_CTRL0_MODFORMAT_MSK 0x00000005UL
#define	_MODEM_CTRL0_MODFORMAT_OOKASK 0x00000006UL
#define	_MODEM_CTRL0_MODFORMAT_OQPSK 0x00000004UL
#define	_MODEM_CTRL0_MODFORMAT_SHIFT 6
#define	_MODEM_CTRL0_OOKASYNCPIN_DEFAULT 0x00000000UL
#define	_MODEM_CTRL0_OOKASYNCPIN_MASK 0x400UL
#define	_MODEM_CTRL0_OOKASYNCPIN_SHIFT 10
#define	_MODEM_CTRL0_RESETVALUE 0x00000000UL
#define	_MODEM_CTRL0_SHAPING_ASYMMETRIC 0x00000003UL
#define	_MODEM_CTRL0_SHAPING_DEFAULT 0x00000000UL
#define	_MODEM_CTRL0_SHAPING_DISABLED 0x00000000UL
#define	_MODEM_CTRL0_SHAPING_EVENLENGTH 0x00000002UL
#define	_MODEM_CTRL0_SHAPING_MASK 0x6000000UL
#define	_MODEM_CTRL0_SHAPING_ODDLENGTH 0x00000001UL
#define	_MODEM_CTRL0_SHAPING_SHIFT 25
#define	_MODEM_CTRL1_COMPMODE_DEFAULT 0x00000000UL
#define	_MODEM_CTRL1_COMPMODE_DIS 0x00000000UL
#define	_MODEM_CTRL1_COMPMODE_FRAMELOCK 0x00000002UL
#define	_MODEM_CTRL1_COMPMODE_MASK 0xC000UL
#define	_MODEM_CTRL1_COMPMODE_NOLOCK 0x00000003UL
#define	_MODEM_CTRL1_COMPMODE_PRELOCK 0x00000001UL
#define	_MODEM_CTRL1_COMPMODE_SHIFT 14
#define	_MODEM_CTRL1_DUALSYNC_DEFAULT 0x00000000UL
#define	_MODEM_CTRL1_DUALSYNC_DISABLED 0x00000000UL
#define	_MODEM_CTRL1_DUALSYNC_ENABLED 0x00000001UL
#define	_MODEM_CTRL1_DUALSYNC_MASK 0x200UL
#define	_MODEM_CTRL1_DUALSYNC_SHIFT 9
#define	_MODEM_CTRL1_FREQOFFESTLIM_DEFAULT 0x00000000UL
#define	_MODEM_CTRL1_FREQOFFESTLIM_MASK 0xFE000000UL
#define	_MODEM_CTRL1_FREQOFFESTLIM_SHIFT 25
#define	_MODEM_CTRL1_FREQOFFESTPER_DEFAULT 0x00000000UL
#define	_MODEM_CTRL1_FREQOFFESTPER_MASK 0x1C00000UL
#define	_MODEM_CTRL1_FREQOFFESTPER_SHIFT 22
#define	_MODEM_CTRL1_MASK 0xFFFFDFFFUL
#define	_MODEM_CTRL1_PHASEDEMOD_BDD 0x00000000UL
#define	_MODEM_CTRL1_PHASEDEMOD_COH 0x00000002UL
#define	_MODEM_CTRL1_PHASEDEMOD_DEFAULT 0x00000000UL
#define	_MODEM_CTRL1_PHASEDEMOD_MASK 0x300000UL
#define	_MODEM_CTRL1_PHASEDEMOD_MBDD 0x00000001UL
#define	_MODEM_CTRL1_PHASEDEMOD_SHIFT 20
#define	_MODEM_CTRL1_RESETVALUE 0x00000000UL
#define	_MODEM_CTRL1_RESYNCPER_DEFAULT 0x00000000UL
#define	_MODEM_CTRL1_RESYNCPER_MASK 0xF0000UL
#define	_MODEM_CTRL1_RESYNCPER_SHIFT 16
#define	_MODEM_CTRL1_SYNC1INV_DEFAULT 0x00000000UL
#define	_MODEM_CTRL1_SYNC1INV_MASK 0x1000UL
#define	_MODEM_CTRL1_SYNC1INV_SHIFT 12
#define	_MODEM_CTRL1_SYNCBITS_DEFAULT 0x00000000UL
#define	_MODEM_CTRL1_SYNCBITS_MASK 0x1FUL
#define	_MODEM_CTRL1_SYNCBITS_SHIFT 0
#define	_MODEM_CTRL1_SYNCDATA_DEFAULT 0x00000000UL
#define	_MODEM_CTRL1_SYNCDATA_DISABLED 0x00000000UL
#define	_MODEM_CTRL1_SYNCDATA_ENABLED 0x00000001UL
#define	_MODEM_CTRL1_SYNCDATA_MASK 0x800UL
#define	_MODEM_CTRL1_SYNCDATA_SHIFT 11
#define	_MODEM_CTRL1_SYNCERRORS_DEFAULT 0x00000000UL
#define	_MODEM_CTRL1_SYNCERRORS_MASK 0x1E0UL
#define	_MODEM_CTRL1_SYNCERRORS_SHIFT 5
#define	_MODEM_CTRL1_TXSYNC_DEFAULT 0x00000000UL
#define	_MODEM_CTRL1_TXSYNC_MASK 0x400UL
#define	_MODEM_CTRL1_TXSYNC_SHIFT 10
#define	_MODEM_CTRL1_TXSYNC_SYNC0 0x00000000UL
#define	_MODEM_CTRL1_TXSYNC_SYNC1 0x00000001UL
#define	_MODEM_CTRL2_BRDIVA_DEFAULT 0x00000000UL
#define	_MODEM_CTRL2_BRDIVA_MASK 0x78000UL
#define	_MODEM_CTRL2_BRDIVA_SHIFT 15
#define	_MODEM_CTRL2_BRDIVB_DEFAULT 0x00000000UL
#define	_MODEM_CTRL2_BRDIVB_MASK 0x780000UL
#define	_MODEM_CTRL2_BRDIVB_SHIFT 19
#define	_MODEM_CTRL2_DATAFILTER_DEFAULT 0x00000001UL
#define	_MODEM_CTRL2_DATAFILTER_DISABLED 0x00000000UL
#define	_MODEM_CTRL2_DATAFILTER_LEN6 0x00000004UL
#define	_MODEM_CTRL2_DATAFILTER_LEN7 0x00000005UL
#define	_MODEM_CTRL2_DATAFILTER_LEN8 0x00000006UL
#define	_MODEM_CTRL2_DATAFILTER_LEN9 0x00000007UL
#define	_MODEM_CTRL2_DATAFILTER_LONG 0x00000003UL
#define	_MODEM_CTRL2_DATAFILTER_MASK 0x7000UL
#define	_MODEM_CTRL2_DATAFILTER_MEDIUM 0x00000002UL
#define	_MODEM_CTRL2_DATAFILTER_SHIFT 12
#define	_MODEM_CTRL2_DATAFILTER_SHORT 0x00000001UL
#define	_MODEM_CTRL2_DEVMULA_DEFAULT 0x00000000UL
#define	_MODEM_CTRL2_DEVMULA_MASK 0x1800000UL
#define	_MODEM_CTRL2_DEVMULA_SHIFT 23
#define	_MODEM_CTRL2_DEVMULB_DEFAULT 0x00000000UL
#define	_MODEM_CTRL2_DEVMULB_MASK 0x6000000UL
#define	_MODEM_CTRL2_DEVMULB_SHIFT 25
#define	_MODEM_CTRL2_DEVWEIGHTDIS_DEFAULT 0x00000000UL
#define	_MODEM_CTRL2_DEVWEIGHTDIS_MASK 0x20000000UL
#define	_MODEM_CTRL2_DEVWEIGHTDIS_SHIFT 29
#define	_MODEM_CTRL2_DMASEL_CORR 0x00000001UL
#define	_MODEM_CTRL2_DMASEL_DEFAULT 0x00000000UL
#define	_MODEM_CTRL2_DMASEL_FREQOFFEST 0x00000002UL
#define	_MODEM_CTRL2_DMASEL_MASK 0xC0000000UL
#define	_MODEM_CTRL2_DMASEL_POE 0x00000003UL
#define	_MODEM_CTRL2_DMASEL_SHIFT 30
#define	_MODEM_CTRL2_DMASEL_SOFT 0x00000000UL
#define	_MODEM_CTRL2_MASK 0xFFFFFFFFUL
#define	_MODEM_CTRL2_RATESELMODE_DEFAULT 0x00000000UL
#define	_MODEM_CTRL2_RATESELMODE_FRC 0x00000002UL
#define	_MODEM_CTRL2_RATESELMODE_MASK 0x18000000UL
#define	_MODEM_CTRL2_RATESELMODE_NOCHANGE 0x00000000UL
#define	_MODEM_CTRL2_RATESELMODE_PAYLOAD 0x00000001UL
#define	_MODEM_CTRL2_RATESELMODE_SHIFT 27
#define	_MODEM_CTRL2_RATESELMODE_SYNC 0x00000003UL
#define	_MODEM_CTRL2_RESETVALUE 0x00001000UL
#define	_MODEM_CTRL2_RXFRCDIS_DEFAULT 0x00000000UL
#define	_MODEM_CTRL2_RXFRCDIS_MASK 0x100UL
#define	_MODEM_CTRL2_RXFRCDIS_SHIFT 8
#define	_MODEM_CTRL2_RXPINMODE_ASYNCHRONOUS 0x00000001UL
#define	_MODEM_CTRL2_RXPINMODE_DEFAULT 0x00000000UL
#define	_MODEM_CTRL2_RXPINMODE_MASK 0x200UL
#define	_MODEM_CTRL2_RXPINMODE_SHIFT 9
#define	_MODEM_CTRL2_RXPINMODE_SYNCHRONOUS 0x00000000UL
#define	_MODEM_CTRL2_SQITHRESH_DEFAULT 0x00000000UL
#define	_MODEM_CTRL2_SQITHRESH_MASK 0xFFUL
#define	_MODEM_CTRL2_SQITHRESH_SHIFT 0
#define	_MODEM_CTRL2_TXPINMODE_ASYNCHRONOUS 0x00000002UL
#define	_MODEM_CTRL2_TXPINMODE_DEFAULT 0x00000000UL
#define	_MODEM_CTRL2_TXPINMODE_MASK 0xC00UL
#define	_MODEM_CTRL2_TXPINMODE_OFF 0x00000000UL
#define	_MODEM_CTRL2_TXPINMODE_SHIFT 10
#define	_MODEM_CTRL2_TXPINMODE_SYNCHRONOUS 0x00000003UL
#define	_MODEM_CTRL2_TXPINMODE_UNUSED 0x00000001UL
#define	_MODEM_CTRL3_ANTDIVMODE_ANTENNA0 0x00000000UL
#define	_MODEM_CTRL3_ANTDIVMODE_ANTENNA1 0x00000001UL
#define	_MODEM_CTRL3_ANTDIVMODE_ANTSELCORR 0x00000003UL
#define	_MODEM_CTRL3_ANTDIVMODE_ANTSELFIRST 0x00000002UL
#define	_MODEM_CTRL3_ANTDIVMODE_ANTSELRSSI 0x00000004UL
#define	_MODEM_CTRL3_ANTDIVMODE_DEFAULT 0x00000000UL
#define	_MODEM_CTRL3_ANTDIVMODE_MASK 0x700UL
#define	_MODEM_CTRL3_ANTDIVMODE_SHIFT 8
#define	_MODEM_CTRL3_ANTDIVREPEATDIS_DEFAULT 0x00000000UL
#define	_MODEM_CTRL3_ANTDIVREPEATDIS_MASK 0x800UL
#define	_MODEM_CTRL3_ANTDIVREPEATDIS_SHIFT 11
#define	_MODEM_CTRL3_MASK 0xFFFFFF81UL
#define	_MODEM_CTRL3_PRSDINEN_DEFAULT 0x00000000UL
#define	_MODEM_CTRL3_PRSDINEN_MASK 0x1UL
#define	_MODEM_CTRL3_PRSDINEN_SHIFT 0
#define	_MODEM_CTRL3_RESETVALUE 0x00008000UL
#define	_MODEM_CTRL3_TSAMPDEL_DEFAULT 0x00000002UL
#define	_MODEM_CTRL3_TSAMPDEL_MASK 0xC000UL
#define	_MODEM_CTRL3_TSAMPDEL_SHIFT 14
#define	_MODEM_CTRL3_TSAMPLIM_DEFAULT 0x00000000UL
#define	_MODEM_CTRL3_TSAMPLIM_MASK 0xFFFF0000UL
#define	_MODEM_CTRL3_TSAMPLIM_SHIFT 16
#define	_MODEM_CTRL3_TSAMPMODE_DEFAULT 0x00000000UL
#define	_MODEM_CTRL3_TSAMPMODE_DIFF 0x00000002UL
#define	_MODEM_CTRL3_TSAMPMODE_MASK 0x3000UL
#define	_MODEM_CTRL3_TSAMPMODE_OFF 0x00000000UL
#define	_MODEM_CTRL3_TSAMPMODE_ON 0x00000001UL
#define	_MODEM_CTRL3_TSAMPMODE_SHIFT 12
#define	_MODEM_CTRL4_ADCSATDENS_DEFAULT 0x00000000UL
#define	_MODEM_CTRL4_ADCSATDENS_MASK 0xC000000UL
#define	_MODEM_CTRL4_ADCSATDENS_SHIFT 26
#define	_MODEM_CTRL4_ADCSATLEVEL_CONS1 0x00000000UL
#define	_MODEM_CTRL4_ADCSATLEVEL_CONS16 0x00000004UL
#define	_MODEM_CTRL4_ADCSATLEVEL_CONS2 0x00000001UL
#define	_MODEM_CTRL4_ADCSATLEVEL_CONS32 0x00000005UL
#define	_MODEM_CTRL4_ADCSATLEVEL_CONS4 0x00000002UL
#define	_MODEM_CTRL4_ADCSATLEVEL_CONS64 0x00000006UL
#define	_MODEM_CTRL4_ADCSATLEVEL_CONS8 0x00000003UL
#define	_MODEM_CTRL4_ADCSATLEVEL_DEFAULT 0x00000006UL
#define	_MODEM_CTRL4_ADCSATLEVEL_MASK 0x3800000UL
#define	_MODEM_CTRL4_ADCSATLEVEL_SHIFT 23
#define	_MODEM_CTRL4_DEVOFFCOMP_DEFAULT 0x00000000UL
#define	_MODEM_CTRL4_DEVOFFCOMP_MASK 0x10UL
#define	_MODEM_CTRL4_DEVOFFCOMP_SHIFT 4
#define	_MODEM_CTRL4_ISICOMP_DEFAULT 0x00000000UL
#define	_MODEM_CTRL4_ISICOMP_MASK 0xFUL
#define	_MODEM_CTRL4_ISICOMP_SHIFT 0
#define	_MODEM_CTRL4_MASK 0xBFFFFFFFUL
#define	_MODEM_CTRL4_OFFSETPHASEMASKING_DEFAULT 0x00000000UL
#define	_MODEM_CTRL4_OFFSETPHASEMASKING_MASK 0x10000000UL
#define	_MODEM_CTRL4_OFFSETPHASEMASKING_SHIFT 28
#define	_MODEM_CTRL4_OFFSETPHASESCALING_DEFAULT 0x00000000UL
#define	_MODEM_CTRL4_OFFSETPHASESCALING_MASK 0x20000000UL
#define	_MODEM_CTRL4_OFFSETPHASESCALING_SHIFT 29
#define	_MODEM_CTRL4_PHASECLICKFILT_DEFAULT 0x00000000UL
#define	_MODEM_CTRL4_PHASECLICKFILT_MASK 0x3F8000UL
#define	_MODEM_CTRL4_PHASECLICKFILT_SHIFT 15
#define	_MODEM_CTRL4_PREDISTAVG_AVG16 0x00000001UL
#define	_MODEM_CTRL4_PREDISTAVG_AVG8 0x00000000UL
#define	_MODEM_CTRL4_PREDISTAVG_DEFAULT 0x00000000UL
#define	_MODEM_CTRL4_PREDISTAVG_MASK 0x2000UL
#define	_MODEM_CTRL4_PREDISTAVG_SHIFT 13
#define	_MODEM_CTRL4_PREDISTDEB_DEFAULT 0x00000000UL
#define	_MODEM_CTRL4_PREDISTDEB_MASK 0x1C00UL
#define	_MODEM_CTRL4_PREDISTDEB_SHIFT 10
#define	_MODEM_CTRL4_PREDISTGAIN_DEFAULT 0x00000000UL
#define	_MODEM_CTRL4_PREDISTGAIN_MASK 0x3E0UL
#define	_MODEM_CTRL4_PREDISTGAIN_SHIFT 5
#define	_MODEM_CTRL4_PREDISTRST_DEFAULT 0x00000000UL
#define	_MODEM_CTRL4_PREDISTRST_MASK 0x4000UL
#define	_MODEM_CTRL4_PREDISTRST_SHIFT 14
#define	_MODEM_CTRL4_RESETVALUE 0x03000000UL
#define	_MODEM_CTRL4_SOFTDSSSMODE_CORR0INV 0x00000000UL
#define	_MODEM_CTRL4_SOFTDSSSMODE_CORRDIFF 0x00000001UL
#define	_MODEM_CTRL4_SOFTDSSSMODE_DEFAULT 0x00000000UL
#define	_MODEM_CTRL4_SOFTDSSSMODE_MASK 0x400000UL
#define	_MODEM_CTRL4_SOFTDSSSMODE_SHIFT 22
#define	_MODEM_CTRL5_BBSS_DEFAULT 0x00000000UL
#define	_MODEM_CTRL5_BBSS_MASK 0xF000UL
#define	_MODEM_CTRL5_BBSS_SHIFT 12
#define	_MODEM_CTRL5_BRCALAVG_DEFAULT 0x00000000UL
#define	_MODEM_CTRL5_BRCALAVG_MASK 0x30UL
#define	_MODEM_CTRL5_BRCALAVG_SHIFT 4
#define	_MODEM_CTRL5_BRCALEN_DEFAULT 0x00000000UL
#define	_MODEM_CTRL5_BRCALEN_MASK 0x2UL
#define	_MODEM_CTRL5_BRCALEN_SHIFT 1
#define	_MODEM_CTRL5_BRCALMODE_DEFAULT 0x00000000UL
#define	_MODEM_CTRL5_BRCALMODE_MASK 0xCUL
#define	_MODEM_CTRL5_BRCALMODE_PEAK 0x00000000UL
#define	_MODEM_CTRL5_BRCALMODE_PEAKZERO 0x00000002UL
#define	_MODEM_CTRL5_BRCALMODE_SHIFT 2
#define	_MODEM_CTRL5_BRCALMODE_ZERO 0x00000001UL
#define	_MODEM_CTRL5_DEMODRAWDATASEL2_BBPF 0x00000004UL
#define	_MODEM_CTRL5_DEMODRAWDATASEL2_CHPW 0x00000003UL
#define	_MODEM_CTRL5_DEMODRAWDATASEL2_COH 0x00000001UL
#define	_MODEM_CTRL5_DEMODRAWDATASEL2_CORR 0x00000002UL
#define	_MODEM_CTRL5_DEMODRAWDATASEL2_DEFAULT 0x00000000UL
#define	_MODEM_CTRL5_DEMODRAWDATASEL2_DIS 0x00000000UL
#define	_MODEM_CTRL5_DEMODRAWDATASEL2_FSM 0x00000005UL
#define	_MODEM_CTRL5_DEMODRAWDATASEL2_MASK 0x700000UL
#define	_MODEM_CTRL5_DEMODRAWDATASEL2_SHIFT 20
#define	_MODEM_CTRL5_DETDEL_DEFAULT 0x00000000UL
#define	_MODEM_CTRL5_DETDEL_MASK 0x1C0UL
#define	_MODEM_CTRL5_DETDEL_SHIFT 6
#define	_MODEM_CTRL5_DSSSCTD_DEFAULT 0x00000000UL
#define	_MODEM_CTRL5_DSSSCTD_MASK 0x800UL
#define	_MODEM_CTRL5_DSSSCTD_SHIFT 11
#define	_MODEM_CTRL5_FOEPREAVG_DEFAULT 0x00000000UL
#define	_MODEM_CTRL5_FOEPREAVG_MASK 0x7000000UL
#define	_MODEM_CTRL5_FOEPREAVG_SHIFT 24
#define	_MODEM_CTRL5_LINCORR_DEFAULT 0x00000000UL
#define	_MODEM_CTRL5_LINCORR_MASK 0x8000000UL
#define	_MODEM_CTRL5_LINCORR_SHIFT 27
#define	_MODEM_CTRL5_MASK 0xFF7FFFFEUL
#define	_MODEM_CTRL5_POEPER_DEFAULT 0x00000000UL
#define	_MODEM_CTRL5_POEPER_MASK 0xF0000UL
#define	_MODEM_CTRL5_POEPER_SHIFT 16
#define	_MODEM_CTRL5_RESETVALUE 0x00000000UL
#define	_MODEM_CTRL5_RESYNCBAUDTRANS_DEFAULT 0x00000000UL
#define	_MODEM_CTRL5_RESYNCBAUDTRANS_MASK 0x20000000UL
#define	_MODEM_CTRL5_RESYNCBAUDTRANS_SHIFT 29
#define	_MODEM_CTRL5_RESYNCLIMIT_ALWAYS 0x00000001UL
#define	_MODEM_CTRL5_RESYNCLIMIT_DEFAULT 0x00000000UL
#define	_MODEM_CTRL5_RESYNCLIMIT_HALF 0x00000000UL
#define	_MODEM_CTRL5_RESYNCLIMIT_MASK 0x40000000UL
#define	_MODEM_CTRL5_RESYNCLIMIT_SHIFT 30
#define	_MODEM_CTRL5_TDEDGE_DEFAULT 0x00000000UL
#define	_MODEM_CTRL5_TDEDGE_MASK 0x200UL
#define	_MODEM_CTRL5_TDEDGE_SHIFT 9
#define	_MODEM_CTRL5_TREDGE_DEFAULT 0x00000000UL
#define	_MODEM_CTRL5_TREDGE_MASK 0x400UL
#define	_MODEM_CTRL5_TREDGE_SHIFT 10
#define	_MODEM_CTRL6_ARW_ALWAYS 0x00000001UL
#define	_MODEM_CTRL6_ARW_DEFAULT 0x00000000UL
#define	_MODEM_CTRL6_ARW_MASK 0x18000UL
#define	_MODEM_CTRL6_ARW_NEVER 0x00000002UL
#define	_MODEM_CTRL6_ARW_PSABORT 0x00000003UL
#define	_MODEM_CTRL6_ARW_SHIFT 15
#define	_MODEM_CTRL6_ARW_SMALLWND 0x00000000UL
#define	_MODEM_CTRL6_CODINGB_DEFAULT 0x00000000UL
#define	_MODEM_CTRL6_CODINGB_DSSS 0x00000002UL
#define	_MODEM_CTRL6_CODINGB_LINECODE 0x00000003UL
#define	_MODEM_CTRL6_CODINGB_MANCHESTER 0x00000001UL
#define	_MODEM_CTRL6_CODINGB_MASK 0x6000000UL
#define	_MODEM_CTRL6_CODINGB_NRZ 0x00000000UL
#define	_MODEM_CTRL6_CODINGB_SHIFT 25
#define	_MODEM_CTRL6_CPLXCORREN_DEFAULT 0x00000000UL
#define	_MODEM_CTRL6_CPLXCORREN_MASK 0x100000UL
#define	_MODEM_CTRL6_CPLXCORREN_SHIFT 20
#define	_MODEM_CTRL6_DSSS3SYMBOLSYNCEN_DEFAULT 0x00000000UL
#define	_MODEM_CTRL6_DSSS3SYMBOLSYNCEN_MASK 0x200000UL
#define	_MODEM_CTRL6_DSSS3SYMBOLSYNCEN_SHIFT 21
#define	_MODEM_CTRL6_MASK 0xF63FFFFFUL
#define	_MODEM_CTRL6_PREBASES_DEFAULT 0x00000000UL
#define	_MODEM_CTRL6_PREBASES_MASK 0x780UL
#define	_MODEM_CTRL6_PREBASES_SHIFT 7
#define	_MODEM_CTRL6_PSTIMABORT0_DEFAULT 0x00000000UL
#define	_MODEM_CTRL6_PSTIMABORT0_MASK 0x800UL
#define	_MODEM_CTRL6_PSTIMABORT0_SHIFT 11
#define	_MODEM_CTRL6_PSTIMABORT1_DEFAULT 0x00000000UL
#define	_MODEM_CTRL6_PSTIMABORT1_MASK 0x1000UL
#define	_MODEM_CTRL6_PSTIMABORT1_SHIFT 12
#define	_MODEM_CTRL6_PSTIMABORT2_DEFAULT 0x00000000UL
#define	_MODEM_CTRL6_PSTIMABORT2_MASK 0x2000UL
#define	_MODEM_CTRL6_PSTIMABORT2_SHIFT 13
#define	_MODEM_CTRL6_PSTIMABORT3_DEFAULT 0x00000000UL
#define	_MODEM_CTRL6_PSTIMABORT3_MASK 0x4000UL
#define	_MODEM_CTRL6_PSTIMABORT3_SHIFT 14
#define	_MODEM_CTRL6_RESETVALUE 0x00000000UL
#define	_MODEM_CTRL6_RXBRCALCDIS_DEFAULT 0x00000000UL
#define	_MODEM_CTRL6_RXBRCALCDIS_MASK 0x40000000UL
#define	_MODEM_CTRL6_RXBRCALCDIS_SHIFT 30
#define	_MODEM_CTRL6_TDREW_DEFAULT 0x00000000UL
#define	_MODEM_CTRL6_TDREW_MASK 0x7FUL
#define	_MODEM_CTRL6_TDREW_SHIFT 0
#define	_MODEM_CTRL6_TIMTHRESHGAIN_DEFAULT 0x00000000UL
#define	_MODEM_CTRL6_TIMTHRESHGAIN_MASK 0xE0000UL
#define	_MODEM_CTRL6_TIMTHRESHGAIN_SHIFT 17
#define	_MODEM_DCCOMP_DCCOMPEN_DEFAULT 0x00000000UL
#define	_MODEM_DCCOMP_DCCOMPEN_MASK 0x2UL
#define	_MODEM_DCCOMP_DCCOMPEN_SHIFT 1
#define	_MODEM_DCCOMP_DCCOMPFREEZE_DEFAULT 0x00000000UL
#define	_MODEM_DCCOMP_DCCOMPFREEZE_MASK 0x8UL
#define	_MODEM_DCCOMP_DCCOMPFREEZE_SHIFT 3
#define	_MODEM_DCCOMP_DCCOMPGEAR_DEFAULT 0x00000003UL
#define	_MODEM_DCCOMP_DCCOMPGEAR_MASK 0x70UL
#define	_MODEM_DCCOMP_DCCOMPGEAR_SHIFT 4
#define	_MODEM_DCCOMP_DCESTIEN_DEFAULT 0x00000000UL
#define	_MODEM_DCCOMP_DCESTIEN_MASK 0x1UL
#define	_MODEM_DCCOMP_DCESTIEN_SHIFT 0
#define	_MODEM_DCCOMP_DCLIMIT_DEFAULT 0x00000000UL
#define	_MODEM_DCCOMP_DCLIMIT_FULLSCALE 0x00000000UL
#define	_MODEM_DCCOMP_DCLIMIT_FULLSCALEBY16 0x00000003UL
#define	_MODEM_DCCOMP_DCLIMIT_FULLSCALEBY4 0x00000001UL
#define	_MODEM_DCCOMP_DCLIMIT_FULLSCALEBY8 0x00000002UL
#define	_MODEM_DCCOMP_DCLIMIT_MASK 0x180UL
#define	_MODEM_DCCOMP_DCLIMIT_SHIFT 7
#define	_MODEM_DCCOMP_DCRSTEN_DEFAULT 0x00000000UL
#define	_MODEM_DCCOMP_DCRSTEN_MASK 0x4UL
#define	_MODEM_DCCOMP_DCRSTEN_SHIFT 2
#define	_MODEM_DCCOMP_MASK 0x000001FFUL
#define	_MODEM_DCCOMP_RESETVALUE 0x00000030UL
#define	_MODEM_DCCOMPFILTINIT_DCCOMPINIT_DEFAULT 0x00000000UL
#define	_MODEM_DCCOMPFILTINIT_DCCOMPINIT_MASK 0x40000000UL
#define	_MODEM_DCCOMPFILTINIT_DCCOMPINIT_SHIFT 30
#define	_MODEM_DCCOMPFILTINIT_DCCOMPINITVALI_DEFAULT 0x00000000UL
#define	_MODEM_DCCOMPFILTINIT_DCCOMPINITVALI_MASK 0x7FFFUL
#define	_MODEM_DCCOMPFILTINIT_DCCOMPINITVALI_SHIFT 0
#define	_MODEM_DCCOMPFILTINIT_DCCOMPINITVALQ_DEFAULT 0x00000000UL
#define	_MODEM_DCCOMPFILTINIT_DCCOMPINITVALQ_MASK 0x3FFF8000UL
#define	_MODEM_DCCOMPFILTINIT_DCCOMPINITVALQ_SHIFT 15
#define	_MODEM_DCCOMPFILTINIT_MASK 0x7FFFFFFFUL
#define	_MODEM_DCCOMPFILTINIT_RESETVALUE 0x00000000UL
#define	_MODEM_DCESTI_DCCOMPESTIVALI_DEFAULT 0x00000000UL
#define	_MODEM_DCESTI_DCCOMPESTIVALI_MASK 0x7FFFUL
#define	_MODEM_DCESTI_DCCOMPESTIVALI_SHIFT 0
#define	_MODEM_DCESTI_DCCOMPESTIVALQ_DEFAULT 0x00000000UL
#define	_MODEM_DCESTI_DCCOMPESTIVALQ_MASK 0x3FFF8000UL
#define	_MODEM_DCESTI_DCCOMPESTIVALQ_SHIFT 15
#define	_MODEM_DCESTI_MASK 0x3FFFFFFFUL
#define	_MODEM_DCESTI_RESETVALUE 0x00000000UL
#define	_MODEM_DIGIGAINCTRL_DEC0GAIN_DEFAULT 0x00000000UL
#define	_MODEM_DIGIGAINCTRL_DEC0GAIN_MASK 0x100UL
#define	_MODEM_DIGIGAINCTRL_DEC0GAIN_SHIFT 8
#define	_MODEM_DIGIGAINCTRL_DIGIGAINDOUBLE_DEFAULT 0x00000000UL
#define	_MODEM_DIGIGAINCTRL_DIGIGAINDOUBLE_MASK 0x40UL
#define	_MODEM_DIGIGAINCTRL_DIGIGAINDOUBLE_SHIFT 6
#define	_MODEM_DIGIGAINCTRL_DIGIGAINEN_DEFAULT 0x00000000UL
#define	_MODEM_DIGIGAINCTRL_DIGIGAINEN_MASK 0x1UL
#define	_MODEM_DIGIGAINCTRL_DIGIGAINEN_SHIFT 0
#define	_MODEM_DIGIGAINCTRL_DIGIGAINHALF_DEFAULT 0x00000000UL
#define	_MODEM_DIGIGAINCTRL_DIGIGAINHALF_MASK 0x80UL
#define	_MODEM_DIGIGAINCTRL_DIGIGAINHALF_SHIFT 7
#define	_MODEM_DIGIGAINCTRL_DIGIGAINSEL_DEFAULT 0x00000000UL
#define	_MODEM_DIGIGAINCTRL_DIGIGAINSEL_GAINM0 0x0000000CUL
#define	_MODEM_DIGIGAINCTRL_DIGIGAINSEL_GAINM0P25 0x0000000BUL
#define	_MODEM_DIGIGAINCTRL_DIGIGAINSEL_GAINM0P5 0x0000000AUL
#define	_MODEM_DIGIGAINCTRL_DIGIGAINSEL_GAINM0P75 0x00000009UL
#define	_MODEM_DIGIGAINCTRL_DIGIGAINSEL_GAINM1 0x00000008UL
#define	_MODEM_DIGIGAINCTRL_DIGIGAINSEL_GAINM1P25 0x00000007UL
#define	_MODEM_DIGIGAINCTRL_DIGIGAINSEL_GAINM1P5 0x00000006UL
#define	_MODEM_DIGIGAINCTRL_DIGIGAINSEL_GAINM1P75 0x00000005UL
#define	_MODEM_DIGIGAINCTRL_DIGIGAINSEL_GAINM2 0x00000004UL
#define	_MODEM_DIGIGAINCTRL_DIGIGAINSEL_GAINM2P25 0x00000003UL
#define	_MODEM_DIGIGAINCTRL_DIGIGAINSEL_GAINM2P5 0x00000002UL
#define	_MODEM_DIGIGAINCTRL_DIGIGAINSEL_GAINM2P75 0x00000001UL
#define	_MODEM_DIGIGAINCTRL_DIGIGAINSEL_GAINM3 0x00000000UL
#define	_MODEM_DIGIGAINCTRL_DIGIGAINSEL_GAINP0P25 0x0000000DUL
#define	_MODEM_DIGIGAINCTRL_DIGIGAINSEL_GAINP0P5 0x0000000EUL
#define	_MODEM_DIGIGAINCTRL_DIGIGAINSEL_GAINP0P75 0x0000000FUL
#define	_MODEM_DIGIGAINCTRL_DIGIGAINSEL_GAINP1 0x00000010UL
#define	_MODEM_DIGIGAINCTRL_DIGIGAINSEL_GAINP1P25 0x00000011UL
#define	_MODEM_DIGIGAINCTRL_DIGIGAINSEL_GAINP1P5 0x00000012UL
#define	_MODEM_DIGIGAINCTRL_DIGIGAINSEL_GAINP1P75 0x00000013UL
#define	_MODEM_DIGIGAINCTRL_DIGIGAINSEL_GAINP2 0x00000014UL
#define	_MODEM_DIGIGAINCTRL_DIGIGAINSEL_GAINP2P25 0x00000015UL
#define	_MODEM_DIGIGAINCTRL_DIGIGAINSEL_GAINP2P5 0x00000016UL
#define	_MODEM_DIGIGAINCTRL_DIGIGAINSEL_GAINP2P75 0x00000017UL
#define	_MODEM_DIGIGAINCTRL_DIGIGAINSEL_GAINP3 0x00000018UL
#define	_MODEM_DIGIGAINCTRL_DIGIGAINSEL_MASK 0x3EUL
#define	_MODEM_DIGIGAINCTRL_DIGIGAINSEL_SHIFT 1
#define	_MODEM_DIGIGAINCTRL_MASK 0x000001FFUL
#define	_MODEM_DIGIGAINCTRL_RESETVALUE 0x00000000UL
#define	_MODEM_DIGMIXCTRL_DIGMIXFREQ_DEFAULT 0x00000000UL
#define	_MODEM_DIGMIXCTRL_DIGMIXFREQ_MASK 0xFFFFFUL
#define	_MODEM_DIGMIXCTRL_DIGMIXFREQ_SHIFT 0
#define	_MODEM_DIGMIXCTRL_DIGMIXMODE_CFOSR 0x00000000UL
#define	_MODEM_DIGMIXCTRL_DIGMIXMODE_DEFAULT 0x00000000UL
#define	_MODEM_DIGMIXCTRL_DIGMIXMODE_DIGMIXFREQ 0x00000001UL
#define	_MODEM_DIGMIXCTRL_DIGMIXMODE_MASK 0x100000UL
#define	_MODEM_DIGMIXCTRL_DIGMIXMODE_SHIFT 20
#define	_MODEM_DIGMIXCTRL_MASK 0x003FFFFFUL
#define	_MODEM_DIGMIXCTRL_MIXERCONJ_DEFAULT 0x00000000UL
#define	_MODEM_DIGMIXCTRL_MIXERCONJ_MASK 0x200000UL
#define	_MODEM_DIGMIXCTRL_MIXERCONJ_SHIFT 21
#define	_MODEM_DIGMIXCTRL_RESETVALUE 0x00000000UL
#define	_MODEM_DIRECTMODE_CLKWIDTH_DEFAULT 0x00000001UL
#define	_MODEM_DIRECTMODE_CLKWIDTH_MASK 0x1F00UL
#define	_MODEM_DIRECTMODE_CLKWIDTH_SHIFT 8
#define	_MODEM_DIRECTMODE_DMENABLE_DEFAULT 0x00000000UL
#define	_MODEM_DIRECTMODE_DMENABLE_MASK 0x1UL
#define	_MODEM_DIRECTMODE_DMENABLE_SHIFT 0
#define	_MODEM_DIRECTMODE_MASK 0x00001F0FUL
#define	_MODEM_DIRECTMODE_RESETVALUE 0x0000010CUL
#define	_MODEM_DIRECTMODE_SYNCASYNC_DEFAULT 0x00000000UL
#define	_MODEM_DIRECTMODE_SYNCASYNC_MASK 0x2UL
#define	_MODEM_DIRECTMODE_SYNCASYNC_SHIFT 1
#define	_MODEM_DIRECTMODE_SYNCPREAM_ADD0 0x00000000UL
#define	_MODEM_DIRECTMODE_SYNCPREAM_ADD16 0x00000002UL
#define	_MODEM_DIRECTMODE_SYNCPREAM_ADD32 0x00000003UL
#define	_MODEM_DIRECTMODE_SYNCPREAM_ADD8 0x00000001UL
#define	_MODEM_DIRECTMODE_SYNCPREAM_DEFAULT 0x00000003UL
#define	_MODEM_DIRECTMODE_SYNCPREAM_MASK 0xCUL
#define	_MODEM_DIRECTMODE_SYNCPREAM_SHIFT 2
#define	_MODEM_DSACTRL_AGCBAUDEN_DEFAULT 0x00000000UL
#define	_MODEM_DSACTRL_AGCBAUDEN_MASK 0x8000000UL
#define	_MODEM_DSACTRL_AGCBAUDEN_SHIFT 27
#define	_MODEM_DSACTRL_AMPJUPTHD_DEFAULT 0x00000000UL
#define	_MODEM_DSACTRL_AMPJUPTHD_MASK 0xF0000000UL
#define	_MODEM_DSACTRL_AMPJUPTHD_SHIFT 28
#define	_MODEM_DSACTRL_ARRTHD_DEFAULT 0x00000004UL
#define	_MODEM_DSACTRL_ARRTHD_MASK 0x3CUL
#define	_MODEM_DSACTRL_ARRTHD_SHIFT 2
#define	_MODEM_DSACTRL_ARRTOLERTHD0_DEFAULT 0x00000002UL
#define	_MODEM_DSACTRL_ARRTOLERTHD0_MASK 0x7C0UL
#define	_MODEM_DSACTRL_ARRTOLERTHD0_SHIFT 6
#define	_MODEM_DSACTRL_ARRTOLERTHD1_DEFAULT 0x00000004UL
#define	_MODEM_DSACTRL_ARRTOLERTHD1_MASK 0xF800UL
#define	_MODEM_DSACTRL_ARRTOLERTHD1_SHIFT 11
#define	_MODEM_DSACTRL_DSAMODE_DEFAULT 0x00000000UL
#define	_MODEM_DSACTRL_DSAMODE_DISABLED 0x00000000UL
#define	_MODEM_DSACTRL_DSAMODE_ENABLED 0x00000001UL
#define	_MODEM_DSACTRL_DSAMODE_MASK 0x3UL
#define	_MODEM_DSACTRL_DSAMODE_SHIFT 0
#define	_MODEM_DSACTRL_DSARSTON_DEFAULT 0x00000001UL
#define	_MODEM_DSACTRL_DSARSTON_MASK 0x80000UL
#define	_MODEM_DSACTRL_DSARSTON_SHIFT 19
#define	_MODEM_DSACTRL_FREQAVGSYM_AVG2TS 0x00000000UL
#define	_MODEM_DSACTRL_FREQAVGSYM_AVG4TS 0x00000001UL
#define	_MODEM_DSACTRL_FREQAVGSYM_DEFAULT 0x00000001UL
#define	_MODEM_DSACTRL_FREQAVGSYM_MASK 0x20000UL
#define	_MODEM_DSACTRL_FREQAVGSYM_SHIFT 17
#define	_MODEM_DSACTRL_GAINREDUCDLY_DEFAULT 0x00000000UL
#define	_MODEM_DSACTRL_GAINREDUCDLY_MASK 0x600000UL
#define	_MODEM_DSACTRL_GAINREDUCDLY_SHIFT 21
#define	_MODEM_DSACTRL_LOWDUTY_DEFAULT 0x00000000UL
#define	_MODEM_DSACTRL_LOWDUTY_MASK 0x3800000UL
#define	_MODEM_DSACTRL_LOWDUTY_SHIFT 23
#define	_MODEM_DSACTRL_MASK 0xFFEFFFFFUL
#define	_MODEM_DSACTRL_RESETVALUE 0x000A2090UL
#define	_MODEM_DSACTRL_RESTORE_DEFAULT 0x00000000UL
#define	_MODEM_DSACTRL_RESTORE_MASK 0x4000000UL
#define	_MODEM_DSACTRL_RESTORE_SHIFT 26
#define	_MODEM_DSACTRL_SCHPRD_DEFAULT 0x00000000UL
#define	_MODEM_DSACTRL_SCHPRD_MASK 0x10000UL
#define	_MODEM_DSACTRL_SCHPRD_SHIFT 16
#define	_MODEM_DSACTRL_SCHPRD_TS2 0x00000000UL
#define	_MODEM_DSACTRL_SCHPRD_TS4 0x00000001UL
#define	_MODEM_DSACTRL_TRANRSTDSA_DEFAULT 0x00000000UL
#define	_MODEM_DSACTRL_TRANRSTDSA_MASK 0x40000UL
#define	_MODEM_DSACTRL_TRANRSTDSA_SHIFT 18
#define	_MODEM_DSATHD0_FDEVMAXTHD_DEFAULT 0x00000078UL
#define	_MODEM_DSATHD0_FDEVMAXTHD_MASK 0xFFF00000UL
#define	_MODEM_DSATHD0_FDEVMAXTHD_SHIFT 20
#define	_MODEM_DSATHD0_FDEVMINTHD_DEFAULT 0x0000000CUL
#define	_MODEM_DSATHD0_FDEVMINTHD_MASK 0xFC000UL
#define	_MODEM_DSATHD0_FDEVMINTHD_SHIFT 14
#define	_MODEM_DSATHD0_MASK 0xFFFFFFFFUL
#define	_MODEM_DSATHD0_RESETVALUE 0x07830464UL
#define	_MODEM_DSATHD0_SPIKETHD_DEFAULT 0x00000064UL
#define	_MODEM_DSATHD0_SPIKETHD_MASK 0xFFUL
#define	_MODEM_DSATHD0_SPIKETHD_SHIFT 0
#define	_MODEM_DSATHD0_UNMODTHD_DEFAULT 0x00000004UL
#define	_MODEM_DSATHD0_UNMODTHD_MASK 0x3F00UL
#define	_MODEM_DSATHD0_UNMODTHD_SHIFT 8
#define	_MODEM_DSATHD1_AMPFLTBYP_DEFAULT 0x00000001UL
#define	_MODEM_DSATHD1_AMPFLTBYP_MASK 0x10000000UL
#define	_MODEM_DSATHD1_AMPFLTBYP_SHIFT 28
#define	_MODEM_DSATHD1_DSARSTCNT_DEFAULT 0x00000002UL
#define	_MODEM_DSATHD1_DSARSTCNT_MASK 0x1C0000UL
#define	_MODEM_DSATHD1_DSARSTCNT_SHIFT 18
#define	_MODEM_DSATHD1_FREQLATDLY_DEFAULT 0x00000001UL
#define	_MODEM_DSATHD1_FREQLATDLY_MASK 0x6000000UL
#define	_MODEM_DSATHD1_FREQLATDLY_SHIFT 25
#define	_MODEM_DSATHD1_FREQSCALE_DEFAULT 0x00000000UL
#define	_MODEM_DSATHD1_FREQSCALE_MASK 0x40000000UL
#define	_MODEM_DSATHD1_FREQSCALE_SHIFT 30
#define	_MODEM_DSATHD1_MASK 0x7FFFFFFFUL
#define	_MODEM_DSATHD1_POWABSTHD_DEFAULT 0x00001388UL
#define	_MODEM_DSATHD1_POWABSTHD_MASK 0xFFFFUL
#define	_MODEM_DSATHD1_POWABSTHD_SHIFT 0
#define	_MODEM_DSATHD1_POWRELTHD_DEFAULT 0x00000000UL
#define	_MODEM_DSATHD1_POWRELTHD_DISABLED 0x00000000UL
#define	_MODEM_DSATHD1_POWRELTHD_MASK 0x30000UL
#define	_MODEM_DSATHD1_POWRELTHD_MODE1 0x00000001UL
#define	_MODEM_DSATHD1_POWRELTHD_MODE2 0x00000002UL
#define	_MODEM_DSATHD1_POWRELTHD_MODE3 0x00000003UL
#define	_MODEM_DSATHD1_POWRELTHD_SHIFT 16
#define	_MODEM_DSATHD1_PWRDETDIS_DEFAULT 0x00000001UL
#define	_MODEM_DSATHD1_PWRDETDIS_MASK 0x20000000UL
#define	_MODEM_DSATHD1_PWRDETDIS_SHIFT 29
#define	_MODEM_DSATHD1_PWRFLTBYP_DEFAULT 0x00000001UL
#define	_MODEM_DSATHD1_PWRFLTBYP_MASK 0x8000000UL
#define	_MODEM_DSATHD1_PWRFLTBYP_SHIFT 27
#define	_MODEM_DSATHD1_RESETVALUE 0x3AC81388UL
#define	_MODEM_DSATHD1_RSSIJMPTHD_DEFAULT 0x00000006UL
#define	_MODEM_DSATHD1_RSSIJMPTHD_MASK 0x1E00000UL
#define	_MODEM_DSATHD1_RSSIJMPTHD_SHIFT 21
#define	_MODEM_DSATHD2_FDADJTHD_DEFAULT 0x00000001UL
#define	_MODEM_DSATHD2_FDADJTHD_MASK 0xFC00UL
#define	_MODEM_DSATHD2_FDADJTHD_SHIFT 10
#define	_MODEM_DSATHD2_FREQESTTHD_DEFAULT 0x00000006UL
#define	_MODEM_DSATHD2_FREQESTTHD_MASK 0x1F00000UL
#define	_MODEM_DSATHD2_FREQESTTHD_SHIFT 20
#define	_MODEM_DSATHD2_INTERFERDET_DEFAULT 0x00000006UL
#define	_MODEM_DSATHD2_INTERFERDET_MASK 0x3E000000UL
#define	_MODEM_DSATHD2_INTERFERDET_SHIFT 25
#define	_MODEM_DSATHD2_JUMPDETEN_DEFAULT 0x00000001UL
#define	_MODEM_DSATHD2_JUMPDETEN_MASK 0x200UL
#define	_MODEM_DSATHD2_JUMPDETEN_SHIFT 9
#define	_MODEM_DSATHD2_MASK 0x7FFFFEFFUL
#define	_MODEM_DSATHD2_PMDETFORCE_DEFAULT 0x00000000UL
#define	_MODEM_DSATHD2_PMDETFORCE_MASK 0x40000000UL
#define	_MODEM_DSATHD2_PMDETFORCE_SHIFT 30
#define	_MODEM_DSATHD2_PMDETPASSTHD_DEFAULT 0x00000006UL
#define	_MODEM_DSATHD2_PMDETPASSTHD_MASK 0xF0000UL
#define	_MODEM_DSATHD2_PMDETPASSTHD_SHIFT 16
#define	_MODEM_DSATHD2_POWABSTHDLOG_DEFAULT 0x00000064UL
#define	_MODEM_DSATHD2_POWABSTHDLOG_MASK 0xFFUL
#define	_MODEM_DSATHD2_POWABSTHDLOG_SHIFT 0
#define	_MODEM_DSATHD2_RESETVALUE 0x0C660664UL
#define	_MODEM_DSATHD3_FDEVMAXTHDLO_DEFAULT 0x00000078UL
#define	_MODEM_DSATHD3_FDEVMAXTHDLO_MASK 0xFFF00000UL
#define	_MODEM_DSATHD3_FDEVMAXTHDLO_SHIFT 20
#define	_MODEM_DSATHD3_FDEVMINTHDLO_DEFAULT 0x0000000CUL
#define	_MODEM_DSATHD3_FDEVMINTHDLO_MASK 0xFC000UL
#define	_MODEM_DSATHD3_FDEVMINTHDLO_SHIFT 14
#define	_MODEM_DSATHD3_MASK 0xFFFFFFFFUL
#define	_MODEM_DSATHD3_RESETVALUE 0x07830464UL
#define	_MODEM_DSATHD3_SPIKETHDLO_DEFAULT 0x00000064UL
#define	_MODEM_DSATHD3_SPIKETHDLO_MASK 0xFFUL
#define	_MODEM_DSATHD3_SPIKETHDLO_SHIFT 0
#define	_MODEM_DSATHD3_UNMODTHDLO_DEFAULT 0x00000004UL
#define	_MODEM_DSATHD3_UNMODTHDLO_MASK 0x3F00UL
#define	_MODEM_DSATHD3_UNMODTHDLO_SHIFT 8
#define	_MODEM_DSATHD4_ARRTOLERTHD0LO_DEFAULT 0x00000002UL
#define	_MODEM_DSATHD4_ARRTOLERTHD0LO_MASK 0x1F0000UL
#define	_MODEM_DSATHD4_ARRTOLERTHD0LO_SHIFT 16
#define	_MODEM_DSATHD4_ARRTOLERTHD1LO_DEFAULT 0x00000004UL
#define	_MODEM_DSATHD4_ARRTOLERTHD1LO_MASK 0x3E00000UL
#define	_MODEM_DSATHD4_ARRTOLERTHD1LO_SHIFT 21
#define	_MODEM_DSATHD4_MASK 0x07FFFFFFUL
#define	_MODEM_DSATHD4_POWABSTHDLO_DEFAULT 0x00001388UL
#define	_MODEM_DSATHD4_POWABSTHDLO_MASK 0xFFFFUL
#define	_MODEM_DSATHD4_POWABSTHDLO_SHIFT 0
#define	_MODEM_DSATHD4_RESETVALUE 0x00821388UL
#define	_MODEM_DSATHD4_SWTHD_DEFAULT 0x00000000UL
#define	_MODEM_DSATHD4_SWTHD_MASK 0x4000000UL
#define	_MODEM_DSATHD4_SWTHD_SHIFT 26
#define	_MODEM_DSSS0_DSSS0_DEFAULT 0x00000000UL
#define	_MODEM_DSSS0_DSSS0_MASK 0xFFFFFFFFUL
#define	_MODEM_DSSS0_DSSS0_SHIFT 0
#define	_MODEM_DSSS0_MASK 0xFFFFFFFFUL
#define	_MODEM_DSSS0_RESETVALUE 0x00000000UL
#define	_MODEM_EN_EN_DEFAULT 0x00000000UL
#define	_MODEM_EN_EN_MASK 0x1UL
#define	_MODEM_EN_EN_SHIFT 0
#define	_MODEM_EN_MASK 0x00000001UL
#define	_MODEM_EN_RESETVALUE 0x00000000UL
#define	_MODEM_FREQOFFEST_CORRVAL_DEFAULT 0x00000000UL
#define	_MODEM_FREQOFFEST_CORRVAL_MASK 0xFF0000UL
#define	_MODEM_FREQOFFEST_CORRVAL_SHIFT 16
#define	_MODEM_FREQOFFEST_FREQOFFEST_DEFAULT 0x00000000UL
#define	_MODEM_FREQOFFEST_FREQOFFEST_MASK 0x1FFFUL
#define	_MODEM_FREQOFFEST_FREQOFFEST_SHIFT 0
#define	_MODEM_FREQOFFEST_MASK 0xFFFF1FFFUL
#define	_MODEM_FREQOFFEST_RESETVALUE 0x00000000UL
#define	_MODEM_FREQOFFEST_SOFTVAL_DEFAULT 0x00000000UL
#define	_MODEM_FREQOFFEST_SOFTVAL_MASK 0xFF000000UL
#define	_MODEM_FREQOFFEST_SOFTVAL_SHIFT 24
#define	_MODEM_FSMSTATUS_DETSTATE_DEFAULT 0x00000000UL
#define	_MODEM_FSMSTATUS_DETSTATE_FRAMEDETMODE0 0x00000032UL
#define	_MODEM_FSMSTATUS_DETSTATE_FRAMESEARCH 0x0000001EUL
#define	_MODEM_FSMSTATUS_DETSTATE_MASK 0x7FUL
#define	_MODEM_FSMSTATUS_DETSTATE_OFF 0x00000000UL
#define	_MODEM_FSMSTATUS_DETSTATE_PRESEARCH 0x00000014UL
#define	_MODEM_FSMSTATUS_DETSTATE_RXFRAME 0x00000028UL
#define	_MODEM_FSMSTATUS_DETSTATE_SHIFT 0
#define	_MODEM_FSMSTATUS_DETSTATE_TIMINGSEARCH 0x0000000AUL
#define	_MODEM_FSMSTATUS_DSASTATE_ARRIVALCHK 0x00000001UL
#define	_MODEM_FSMSTATUS_DSASTATE_DEFAULT 0x00000000UL
#define	_MODEM_FSMSTATUS_DSASTATE_IDLE 0x00000000UL
#define	_MODEM_FSMSTATUS_DSASTATE_MASK 0x380UL
#define	_MODEM_FSMSTATUS_DSASTATE_SAMPPW 0x00000003UL
#define	_MODEM_FSMSTATUS_DSASTATE_SHIFT 7
#define	_MODEM_FSMSTATUS_DSASTATE_STATUSCHK 0x00000002UL
#define	_MODEM_FSMSTATUS_DSASTATE_STOP 0x00000007UL
#define	_MODEM_FSMSTATUS_DSASTATE_WAITABORT 0x00000006UL
#define	_MODEM_FSMSTATUS_DSASTATE_WAITDSALO 0x00000005UL
#define	_MODEM_FSMSTATUS_DSASTATE_WAITPWRUP 0x00000004UL
#define	_MODEM_FSMSTATUS_LRBLESTATE_CLEANUP 0x00000001UL
#define	_MODEM_FSMSTATUS_LRBLESTATE_CORRCOE 0x00000002UL
#define	_MODEM_FSMSTATUS_LRBLESTATE_DEFAULT 0x00000000UL
#define	_MODEM_FSMSTATUS_LRBLESTATE_FEC1ACK 0x00000007UL
#define	_MODEM_FSMSTATUS_LRBLESTATE_FEC1DATA 0x00000006UL
#define	_MODEM_FSMSTATUS_LRBLESTATE_FEC2ACK 0x0000000AUL
#define	_MODEM_FSMSTATUS_LRBLESTATE_FEC2DATA 0x00000009UL
#define	_MODEM_FSMSTATUS_LRBLESTATE_IDLE 0x00000000UL
#define	_MODEM_FSMSTATUS_LRBLESTATE_MASK 0x7C00UL
#define	_MODEM_FSMSTATUS_LRBLESTATE_MAXCORR 0x00000004UL
#define	_MODEM_FSMSTATUS_LRBLESTATE_PAUSE 0x00000008UL
#define	_MODEM_FSMSTATUS_LRBLESTATE_SHIFT 10
#define	_MODEM_FSMSTATUS_LRBLESTATE_STOP 0x00000010UL
#define	_MODEM_FSMSTATUS_LRBLESTATE_TDECISION 0x0000000FUL
#define	_MODEM_FSMSTATUS_LRBLESTATE_TRACKCUR 0x0000000BUL
#define	_MODEM_FSMSTATUS_LRBLESTATE_TRACKDONE 0x0000000EUL
#define	_MODEM_FSMSTATUS_LRBLESTATE_TRACKEAR 0x0000000CUL
#define	_MODEM_FSMSTATUS_LRBLESTATE_TRACKLAT 0x0000000DUL
#define	_MODEM_FSMSTATUS_LRBLESTATE_WAITLRDSA 0x00000003UL
#define	_MODEM_FSMSTATUS_LRBLESTATE_WAITRDY 0x00000005UL
#define	_MODEM_FSMSTATUS_MASK 0x000FFFFFUL
#define	_MODEM_FSMSTATUS_NBBLESTATE_ADDRNXT 0x00000002UL
#define	_MODEM_FSMSTATUS_NBBLESTATE_CALCCOST 0x00000004UL
#define	_MODEM_FSMSTATUS_NBBLESTATE_DEBUG 0x0000001CUL
#define	_MODEM_FSMSTATUS_NBBLESTATE_DEFAULT 0x00000000UL
#define	_MODEM_FSMSTATUS_NBBLESTATE_FREQACQU 0x00000008UL
#define	_MODEM_FSMSTATUS_NBBLESTATE_FREQACQUDONE 0x00000009UL
#define	_MODEM_FSMSTATUS_NBBLESTATE_HARDRXSYNC 0x00000012UL
#define	_MODEM_FSMSTATUS_NBBLESTATE_HARDXPAYLOAD 0x00000013UL
#define	_MODEM_FSMSTATUS_NBBLESTATE_IDLE 0x00000000UL
#define	_MODEM_FSMSTATUS_NBBLESTATE_INICOST 0x00000003UL
#define	_MODEM_FSMSTATUS_NBBLESTATE_INITALACQU 0x00000005UL
#define	_MODEM_FSMSTATUS_NBBLESTATE_INITALCOSTCALC 0x00000006UL
#define	_MODEM_FSMSTATUS_NBBLESTATE_MASK 0xF8000UL
#define	_MODEM_FSMSTATUS_NBBLESTATE_MINCOSTCALC 0x00000007UL
#define	_MODEM_FSMSTATUS_NBBLESTATE_SHIFT 15
#define	_MODEM_FSMSTATUS_NBBLESTATE_STOP 0x0000001AUL
#define	_MODEM_FSMSTATUS_NBBLESTATE_TIMINGACQUCURR 0x0000000BUL
#define	_MODEM_FSMSTATUS_NBBLESTATE_TIMINGACQUDONE 0x0000000DUL
#define	_MODEM_FSMSTATUS_NBBLESTATE_TIMINGACQUEARLY 0x0000000AUL
#define	_MODEM_FSMSTATUS_NBBLESTATE_TIMINGACQULATE 0x0000000CUL
#define	_MODEM_FSMSTATUS_NBBLESTATE_TRACKDECISION 0x00000019UL
#define	_MODEM_FSMSTATUS_NBBLESTATE_TRACKDONE 0x00000018UL
#define	_MODEM_FSMSTATUS_NBBLESTATE_TRACKFREQ 0x00000014UL
#define	_MODEM_FSMSTATUS_NBBLESTATE_TRACKTIMCURR 0x00000016UL
#define	_MODEM_FSMSTATUS_NBBLESTATE_TRACKTIMEARLY 0x00000015UL
#define	_MODEM_FSMSTATUS_NBBLESTATE_TRACKTIMLATE 0x00000017UL
#define	_MODEM_FSMSTATUS_NBBLESTATE_VIRTBIINIT0 0x0000000EUL
#define	_MODEM_FSMSTATUS_NBBLESTATE_VIRTBIINIT1 0x0000000FUL
#define	_MODEM_FSMSTATUS_NBBLESTATE_VIRTBIRXPAYLOAD 0x00000011UL
#define	_MODEM_FSMSTATUS_NBBLESTATE_VIRTBIRXSYNC 0x00000010UL
#define	_MODEM_FSMSTATUS_NBBLESTATE_VTINITI 0x00000001UL
#define	_MODEM_FSMSTATUS_NBBLESTATE_WAITACK 0x0000001BUL
#define	_MODEM_FSMSTATUS_RESETVALUE 0x00000000UL
#define	_MODEM_IEN_FRCTIMOUT_DEFAULT 0x00000000UL
#define	_MODEM_IEN_FRCTIMOUT_MASK 0x10000UL
#define	_MODEM_IEN_FRCTIMOUT_SHIFT 16
#define	_MODEM_IEN_MASK 0x0001FF07UL
#define	_MODEM_IEN_RESETVALUE 0x00000000UL
#define	_MODEM_IEN_RXFRAMEDET0_DEFAULT 0x00000000UL
#define	_MODEM_IEN_RXFRAMEDET0_MASK 0x400UL
#define	_MODEM_IEN_RXFRAMEDET0_SHIFT 10
#define	_MODEM_IEN_RXFRAMEDET1_DEFAULT 0x00000000UL
#define	_MODEM_IEN_RXFRAMEDET1_MASK 0x800UL
#define	_MODEM_IEN_RXFRAMEDET1_SHIFT 11
#define	_MODEM_IEN_RXFRAMEDETOF_DEFAULT 0x00000000UL
#define	_MODEM_IEN_RXFRAMEDETOF_MASK 0x4000UL
#define	_MODEM_IEN_RXFRAMEDETOF_SHIFT 14
#define	_MODEM_IEN_RXPREDET_DEFAULT 0x00000000UL
#define	_MODEM_IEN_RXPREDET_MASK 0x200UL
#define	_MODEM_IEN_RXPREDET_SHIFT 9
#define	_MODEM_IEN_RXPRELOST_DEFAULT 0x00000000UL
#define	_MODEM_IEN_RXPRELOST_MASK 0x2000UL
#define	_MODEM_IEN_RXPRELOST_SHIFT 13
#define	_MODEM_IEN_RXTIMDET_DEFAULT 0x00000000UL
#define	_MODEM_IEN_RXTIMDET_MASK 0x100UL
#define	_MODEM_IEN_RXTIMDET_SHIFT 8
#define	_MODEM_IEN_RXTIMLOST_DEFAULT 0x00000000UL
#define	_MODEM_IEN_RXTIMLOST_MASK 0x1000UL
#define	_MODEM_IEN_RXTIMLOST_SHIFT 12
#define	_MODEM_IEN_RXTIMNF_DEFAULT 0x00000000UL
#define	_MODEM_IEN_RXTIMNF_MASK 0x8000UL
#define	_MODEM_IEN_RXTIMNF_SHIFT 15
#define	_MODEM_IEN_TXFRAMESENT_DEFAULT 0x00000000UL
#define	_MODEM_IEN_TXFRAMESENT_MASK 0x1UL
#define	_MODEM_IEN_TXFRAMESENT_SHIFT 0
#define	_MODEM_IEN_TXPRESENT_DEFAULT 0x00000000UL
#define	_MODEM_IEN_TXPRESENT_MASK 0x4UL
#define	_MODEM_IEN_TXPRESENT_SHIFT 2
#define	_MODEM_IEN_TXSYNCSENT_DEFAULT 0x00000000UL
#define	_MODEM_IEN_TXSYNCSENT_MASK 0x2UL
#define	_MODEM_IEN_TXSYNCSENT_SHIFT 1
#define	_MODEM_IF_FRCTIMOUT_DEFAULT 0x00000000UL
#define	_MODEM_IF_FRCTIMOUT_MASK 0x10000UL
#define	_MODEM_IF_FRCTIMOUT_SHIFT 16
#define	_MODEM_IF_MASK 0x0001FF07UL
#define	_MODEM_IF_RESETVALUE 0x00000000UL
#define	_MODEM_IF_RXFRAMEDET0_DEFAULT 0x00000000UL
#define	_MODEM_IF_RXFRAMEDET0_MASK 0x400UL
#define	_MODEM_IF_RXFRAMEDET0_SHIFT 10
#define	_MODEM_IF_RXFRAMEDET1_DEFAULT 0x00000000UL
#define	_MODEM_IF_RXFRAMEDET1_MASK 0x800UL
#define	_MODEM_IF_RXFRAMEDET1_SHIFT 11
#define	_MODEM_IF_RXFRAMEDETOF_DEFAULT 0x00000000UL
#define	_MODEM_IF_RXFRAMEDETOF_MASK 0x4000UL
#define	_MODEM_IF_RXFRAMEDETOF_SHIFT 14
#define	_MODEM_IF_RXPREDET_DEFAULT 0x00000000UL
#define	_MODEM_IF_RXPREDET_MASK 0x200UL
#define	_MODEM_IF_RXPREDET_SHIFT 9
#define	_MODEM_IF_RXPRELOST_DEFAULT 0x00000000UL
#define	_MODEM_IF_RXPRELOST_MASK 0x2000UL
#define	_MODEM_IF_RXPRELOST_SHIFT 13
#define	_MODEM_IF_RXTIMDET_DEFAULT 0x00000000UL
#define	_MODEM_IF_RXTIMDET_MASK 0x100UL
#define	_MODEM_IF_RXTIMDET_SHIFT 8
#define	_MODEM_IF_RXTIMLOST_DEFAULT 0x00000000UL
#define	_MODEM_IF_RXTIMLOST_MASK 0x1000UL
#define	_MODEM_IF_RXTIMLOST_SHIFT 12
#define	_MODEM_IF_RXTIMNF_DEFAULT 0x00000000UL
#define	_MODEM_IF_RXTIMNF_MASK 0x8000UL
#define	_MODEM_IF_RXTIMNF_SHIFT 15
#define	_MODEM_IF_TXFRAMESENT_DEFAULT 0x00000000UL
#define	_MODEM_IF_TXFRAMESENT_MASK 0x1UL
#define	_MODEM_IF_TXFRAMESENT_SHIFT 0
#define	_MODEM_IF_TXPRESENT_DEFAULT 0x00000000UL
#define	_MODEM_IF_TXPRESENT_MASK 0x4UL
#define	_MODEM_IF_TXPRESENT_SHIFT 2
#define	_MODEM_IF_TXSYNCSENT_DEFAULT 0x00000000UL
#define	_MODEM_IF_TXSYNCSENT_MASK 0x2UL
#define	_MODEM_IF_TXSYNCSENT_SHIFT 1
#define	_MODEM_INTAFC_FOEPREAVG0_DEFAULT 0x00000000UL
#define	_MODEM_INTAFC_FOEPREAVG0_MASK 0x7UL
#define	_MODEM_INTAFC_FOEPREAVG0_SHIFT 0
#define	_MODEM_INTAFC_FOEPREAVG1_DEFAULT 0x00000000UL
#define	_MODEM_INTAFC_FOEPREAVG1_MASK 0x38UL
#define	_MODEM_INTAFC_FOEPREAVG1_SHIFT 3
#define	_MODEM_INTAFC_FOEPREAVG2_DEFAULT 0x00000000UL
#define	_MODEM_INTAFC_FOEPREAVG2_MASK 0x1C0UL
#define	_MODEM_INTAFC_FOEPREAVG2_SHIFT 6
#define	_MODEM_INTAFC_FOEPREAVG3_DEFAULT 0x00000000UL
#define	_MODEM_INTAFC_FOEPREAVG3_MASK 0xE00UL
#define	_MODEM_INTAFC_FOEPREAVG3_SHIFT 9
#define	_MODEM_INTAFC_FOEPREAVG4_DEFAULT 0x00000000UL
#define	_MODEM_INTAFC_FOEPREAVG4_MASK 0x7000UL
#define	_MODEM_INTAFC_FOEPREAVG4_SHIFT 12
#define	_MODEM_INTAFC_FOEPREAVG5_DEFAULT 0x00000000UL
#define	_MODEM_INTAFC_FOEPREAVG5_MASK 0x38000UL
#define	_MODEM_INTAFC_FOEPREAVG5_SHIFT 15
#define	_MODEM_INTAFC_FOEPREAVG6_DEFAULT 0x00000000UL
#define	_MODEM_INTAFC_FOEPREAVG6_MASK 0x1C0000UL
#define	_MODEM_INTAFC_FOEPREAVG6_SHIFT 18
#define	_MODEM_INTAFC_FOEPREAVG7_DEFAULT 0x00000000UL
#define	_MODEM_INTAFC_FOEPREAVG7_MASK 0xE00000UL
#define	_MODEM_INTAFC_FOEPREAVG7_SHIFT 21
#define	_MODEM_INTAFC_MASK 0x00FFFFFFUL
#define	_MODEM_INTAFC_RESETVALUE 0x00000000UL
#define	_MODEM_IPVERSION_IPVERSION_DEFAULT 0x00000000UL
#define	_MODEM_IPVERSION_IPVERSION_MASK 0xFFFFFFFFUL
#define	_MODEM_IPVERSION_IPVERSION_SHIFT 0
#define	_MODEM_IPVERSION_MASK 0xFFFFFFFFUL
#define	_MODEM_IPVERSION_RESETVALUE 0x00000000UL
#define	_MODEM_IRCAL_IRCALEN_DEFAULT 0x00000000UL
#define	_MODEM_IRCAL_IRCALEN_MASK 0x1UL
#define	_MODEM_IRCAL_IRCALEN_SHIFT 0
#define	_MODEM_IRCAL_IRCORREN_DEFAULT 0x00000000UL
#define	_MODEM_IRCAL_IRCORREN_MASK 0x2000UL
#define	_MODEM_IRCAL_IRCORREN_SHIFT 13
#define	_MODEM_IRCAL_MASK 0x00003FBFUL
#define	_MODEM_IRCAL_MUISHF_DEFAULT 0x00000000UL
#define	_MODEM_IRCAL_MUISHF_MASK 0x1F80UL
#define	_MODEM_IRCAL_MUISHF_SHIFT 7
#define	_MODEM_IRCAL_MURSHF_DEFAULT 0x00000000UL
#define	_MODEM_IRCAL_MURSHF_MASK 0x3EUL
#define	_MODEM_IRCAL_MURSHF_SHIFT 1
#define	_MODEM_IRCAL_RESETVALUE 0x00000000UL
#define	_MODEM_IRCALCOEF_CIV_DEFAULT 0x00000000UL
#define	_MODEM_IRCALCOEF_CIV_MASK 0x7FFF0000UL
#define	_MODEM_IRCALCOEF_CIV_SHIFT 16
#define	_MODEM_IRCALCOEF_CRV_DEFAULT 0x00000000UL
#define	_MODEM_IRCALCOEF_CRV_MASK 0x7FFFUL
#define	_MODEM_IRCALCOEF_CRV_SHIFT 0
#define	_MODEM_IRCALCOEF_MASK 0x7FFF7FFFUL
#define	_MODEM_IRCALCOEF_RESETVALUE 0x00000000UL
#define	_MODEM_IRCALCOEFWR_CIVWD_DEFAULT 0x00000000UL
#define	_MODEM_IRCALCOEFWR_CIVWD_MASK 0x7FFF0000UL
#define	_MODEM_IRCALCOEFWR_CIVWD_SHIFT 16
#define	_MODEM_IRCALCOEFWR_CIVWEN_DEFAULT 0x00000000UL
#define	_MODEM_IRCALCOEFWR_CIVWEN_MASK 0x80000000UL
#define	_MODEM_IRCALCOEFWR_CIVWEN_SHIFT 31
#define	_MODEM_IRCALCOEFWR_CRVWD_DEFAULT 0x00000000UL
#define	_MODEM_IRCALCOEFWR_CRVWD_MASK 0x7FFFUL
#define	_MODEM_IRCALCOEFWR_CRVWD_SHIFT 0
#define	_MODEM_IRCALCOEFWR_CRVWEN_DEFAULT 0x00000000UL
#define	_MODEM_IRCALCOEFWR_CRVWEN_MASK 0x8000UL
#define	_MODEM_IRCALCOEFWR_CRVWEN_SHIFT 15
#define	_MODEM_IRCALCOEFWR_MASK 0xFFFFFFFFUL
#define	_MODEM_IRCALCOEFWR_RESETVALUE 0x00000000UL
#define	_MODEM_LONGRANGE1_AVGWIN_DEFAULT 0x00000000UL
#define	_MODEM_LONGRANGE1_AVGWIN_MASK 0xE00000UL
#define	_MODEM_LONGRANGE1_AVGWIN_SHIFT 21
#define	_MODEM_LONGRANGE1_CHPWRACCUDEL_DEFAULT 0x00000000UL
#define	_MODEM_LONGRANGE1_CHPWRACCUDEL_DEL0 0x00000000UL
#define	_MODEM_LONGRANGE1_CHPWRACCUDEL_DEL32 0x00000001UL
#define	_MODEM_LONGRANGE1_CHPWRACCUDEL_DEL64 0x00000002UL
#define	_MODEM_LONGRANGE1_CHPWRACCUDEL_MASK 0x30000UL
#define	_MODEM_LONGRANGE1_CHPWRACCUDEL_SHIFT 16
#define	_MODEM_LONGRANGE1_HYSVAL_DEFAULT 0x00000000UL
#define	_MODEM_LONGRANGE1_HYSVAL_MASK 0x1C0000UL
#define	_MODEM_LONGRANGE1_HYSVAL_SHIFT 18
#define	_MODEM_LONGRANGE1_LOGICBASEDLRDEMODGATE_DEFAULT 0x00000000UL
#define	_MODEM_LONGRANGE1_LOGICBASEDLRDEMODGATE_MASK 0x20000000UL
#define	_MODEM_LONGRANGE1_LOGICBASEDLRDEMODGATE_SHIFT 29
#define	_MODEM_LONGRANGE1_LOGICBASEDPUGATE_DEFAULT 0x00000000UL
#define	_MODEM_LONGRANGE1_LOGICBASEDPUGATE_MASK 0x10000000UL
#define	_MODEM_LONGRANGE1_LOGICBASEDPUGATE_SHIFT 28
#define	_MODEM_LONGRANGE1_LRSPIKETHADD_DEFAULT 0x00000000UL
#define	_MODEM_LONGRANGE1_LRSPIKETHADD_MASK 0xF000000UL
#define	_MODEM_LONGRANGE1_LRSPIKETHADD_SHIFT 24
#define	_MODEM_LONGRANGE1_LRSS_DEFAULT 0x00000000UL
#define	_MODEM_LONGRANGE1_LRSS_MASK 0xFUL
#define	_MODEM_LONGRANGE1_LRSS_SHIFT 0
#define	_MODEM_LONGRANGE1_LRTIMEOUTTHD_DEFAULT 0x00000000UL
#define	_MODEM_LONGRANGE1_LRTIMEOUTTHD_MASK 0x7FF0UL
#define	_MODEM_LONGRANGE1_LRTIMEOUTTHD_SHIFT 4
#define	_MODEM_LONGRANGE1_MASK 0x3FFF7FFFUL
#define	_MODEM_LONGRANGE1_RESETVALUE 0x00000000UL
#define	_MODEM_LONGRANGE2_LRCHPWRTH1_DEFAULT 0x00000000UL
#define	_MODEM_LONGRANGE2_LRCHPWRTH1_MASK 0xFFUL
#define	_MODEM_LONGRANGE2_LRCHPWRTH1_SHIFT 0
#define	_MODEM_LONGRANGE2_LRCHPWRTH2_DEFAULT 0x00000000UL
#define	_MODEM_LONGRANGE2_LRCHPWRTH2_MASK 0xFF00UL
#define	_MODEM_LONGRANGE2_LRCHPWRTH2_SHIFT 8
#define	_MODEM_LONGRANGE2_LRCHPWRTH3_DEFAULT 0x00000000UL
#define	_MODEM_LONGRANGE2_LRCHPWRTH3_MASK 0xFF0000UL
#define	_MODEM_LONGRANGE2_LRCHPWRTH3_SHIFT 16
#define	_MODEM_LONGRANGE2_LRCHPWRTH4_DEFAULT 0x00000000UL
#define	_MODEM_LONGRANGE2_LRCHPWRTH4_MASK 0xFF000000UL
#define	_MODEM_LONGRANGE2_LRCHPWRTH4_SHIFT 24
#define	_MODEM_LONGRANGE2_MASK 0xFFFFFFFFUL
#define	_MODEM_LONGRANGE2_RESETVALUE 0x00000000UL
#define	_MODEM_LONGRANGE3_LRCHPWRTH5_DEFAULT 0x00000000UL
#define	_MODEM_LONGRANGE3_LRCHPWRTH5_MASK 0xFFUL
#define	_MODEM_LONGRANGE3_LRCHPWRTH5_SHIFT 0
#define	_MODEM_LONGRANGE3_LRCHPWRTH6_DEFAULT 0x00000000UL
#define	_MODEM_LONGRANGE3_LRCHPWRTH6_MASK 0xFF00UL
#define	_MODEM_LONGRANGE3_LRCHPWRTH6_SHIFT 8
#define	_MODEM_LONGRANGE3_LRCHPWRTH7_DEFAULT 0x00000000UL
#define	_MODEM_LONGRANGE3_LRCHPWRTH7_MASK 0xFF0000UL
#define	_MODEM_LONGRANGE3_LRCHPWRTH7_SHIFT 16
#define	_MODEM_LONGRANGE3_LRCHPWRTH8_DEFAULT 0x00000000UL
#define	_MODEM_LONGRANGE3_LRCHPWRTH8_MASK 0xFF000000UL
#define	_MODEM_LONGRANGE3_LRCHPWRTH8_SHIFT 24
#define	_MODEM_LONGRANGE3_MASK 0xFFFFFFFFUL
#define	_MODEM_LONGRANGE3_RESETVALUE 0x00000000UL
#define	_MODEM_LONGRANGE4_LRCHPWRSH1_DEFAULT 0x00000000UL
#define	_MODEM_LONGRANGE4_LRCHPWRSH1_MASK 0xF0000UL
#define	_MODEM_LONGRANGE4_LRCHPWRSH1_SHIFT 16
#define	_MODEM_LONGRANGE4_LRCHPWRSH2_DEFAULT 0x00000000UL
#define	_MODEM_LONGRANGE4_LRCHPWRSH2_MASK 0xF00000UL
#define	_MODEM_LONGRANGE4_LRCHPWRSH2_SHIFT 20
#define	_MODEM_LONGRANGE4_LRCHPWRSH3_DEFAULT 0x00000000UL
#define	_MODEM_LONGRANGE4_LRCHPWRSH3_MASK 0xF000000UL
#define	_MODEM_LONGRANGE4_LRCHPWRSH3_SHIFT 24
#define	_MODEM_LONGRANGE4_LRCHPWRSH4_DEFAULT 0x00000000UL
#define	_MODEM_LONGRANGE4_LRCHPWRSH4_MASK 0xF0000000UL
#define	_MODEM_LONGRANGE4_LRCHPWRSH4_SHIFT 28
#define	_MODEM_LONGRANGE4_LRCHPWRTH10_DEFAULT 0x00000000UL
#define	_MODEM_LONGRANGE4_LRCHPWRTH10_MASK 0xFF00UL
#define	_MODEM_LONGRANGE4_LRCHPWRTH10_SHIFT 8
#define	_MODEM_LONGRANGE4_LRCHPWRTH9_DEFAULT 0x00000000UL
#define	_MODEM_LONGRANGE4_LRCHPWRTH9_MASK 0xFFUL
#define	_MODEM_LONGRANGE4_LRCHPWRTH9_SHIFT 0
#define	_MODEM_LONGRANGE4_MASK 0xFFFFFFFFUL
#define	_MODEM_LONGRANGE4_RESETVALUE 0x00000000UL
#define	_MODEM_LONGRANGE5_LRCHPWRSH10_DEFAULT 0x00000000UL
#define	_MODEM_LONGRANGE5_LRCHPWRSH10_MASK 0xF00000UL
#define	_MODEM_LONGRANGE5_LRCHPWRSH10_SHIFT 20
#define	_MODEM_LONGRANGE5_LRCHPWRSH11_DEFAULT 0x00000000UL
#define	_MODEM_LONGRANGE5_LRCHPWRSH11_MASK 0xF000000UL
#define	_MODEM_LONGRANGE5_LRCHPWRSH11_SHIFT 24
#define	_MODEM_LONGRANGE5_LRCHPWRSH5_DEFAULT 0x00000000UL
#define	_MODEM_LONGRANGE5_LRCHPWRSH5_MASK 0xFUL
#define	_MODEM_LONGRANGE5_LRCHPWRSH5_SHIFT 0
#define	_MODEM_LONGRANGE5_LRCHPWRSH6_DEFAULT 0x00000000UL
#define	_MODEM_LONGRANGE5_LRCHPWRSH6_MASK 0xF0UL
#define	_MODEM_LONGRANGE5_LRCHPWRSH6_SHIFT 4
#define	_MODEM_LONGRANGE5_LRCHPWRSH7_DEFAULT 0x00000000UL
#define	_MODEM_LONGRANGE5_LRCHPWRSH7_MASK 0xF00UL
#define	_MODEM_LONGRANGE5_LRCHPWRSH7_SHIFT 8
#define	_MODEM_LONGRANGE5_LRCHPWRSH8_DEFAULT 0x00000000UL
#define	_MODEM_LONGRANGE5_LRCHPWRSH8_MASK 0xF000UL
#define	_MODEM_LONGRANGE5_LRCHPWRSH8_SHIFT 12
#define	_MODEM_LONGRANGE5_LRCHPWRSH9_DEFAULT 0x00000000UL
#define	_MODEM_LONGRANGE5_LRCHPWRSH9_MASK 0xF0000UL
#define	_MODEM_LONGRANGE5_LRCHPWRSH9_SHIFT 16
#define	_MODEM_LONGRANGE5_MASK 0x0FFFFFFFUL
#define	_MODEM_LONGRANGE5_RESETVALUE 0x00000000UL
#define	_MODEM_LONGRANGE6_LRCHPWRSH12_DEFAULT 0x00000000UL
#define	_MODEM_LONGRANGE6_LRCHPWRSH12_MASK 0xF0000000UL
#define	_MODEM_LONGRANGE6_LRCHPWRSH12_SHIFT 28
#define	_MODEM_LONGRANGE6_LRCHPWRSPIKETH_DEFAULT 0x00000000UL
#define	_MODEM_LONGRANGE6_LRCHPWRSPIKETH_MASK 0xFFUL
#define	_MODEM_LONGRANGE6_LRCHPWRSPIKETH_SHIFT 0
#define	_MODEM_LONGRANGE6_LRCHPWRTH11_DEFAULT 0x00000000UL
#define	_MODEM_LONGRANGE6_LRCHPWRTH11_MASK 0xFF00000UL
#define	_MODEM_LONGRANGE6_LRCHPWRTH11_SHIFT 20
#define	_MODEM_LONGRANGE6_LRSPIKETHD_DEFAULT 0x00000000UL
#define	_MODEM_LONGRANGE6_LRSPIKETHD_MASK 0x7FF00UL
#define	_MODEM_LONGRANGE6_LRSPIKETHD_SHIFT 8
#define	_MODEM_LONGRANGE6_MASK 0xFFF7FFFFUL
#define	_MODEM_LONGRANGE6_RESETVALUE 0x00000000UL
#define	_MODEM_LONGRANGE_LRBLE_DEFAULT 0x00000000UL
#define	_MODEM_LONGRANGE_LRBLE_MASK 0x8000UL
#define	_MODEM_LONGRANGE_LRBLE_SHIFT 15
#define	_MODEM_LONGRANGE_LRBLEDSA_DEFAULT 0x00000000UL
#define	_MODEM_LONGRANGE_LRBLEDSA_MASK 0x8000000UL
#define	_MODEM_LONGRANGE_LRBLEDSA_SHIFT 27
#define	_MODEM_LONGRANGE_LRCORRSCHWIN_DEFAULT 0x0000000AUL
#define	_MODEM_LONGRANGE_LRCORRSCHWIN_MASK 0x7800UL
#define	_MODEM_LONGRANGE_LRCORRSCHWIN_SHIFT 11
#define	_MODEM_LONGRANGE_LRCORRTHD_DEFAULT 0x000003E8UL
#define	_MODEM_LONGRANGE_LRCORRTHD_MASK 0x7FFUL
#define	_MODEM_LONGRANGE_LRCORRTHD_SHIFT 0
#define	_MODEM_LONGRANGE_LRCORRTHDDYNEN_DEFAULT 0x00000000UL
#define	_MODEM_LONGRANGE_LRCORRTHDDYNEN_MASK 0x80000000UL
#define	_MODEM_LONGRANGE_LRCORRTHDDYNEN_SHIFT 31
#define	_MODEM_LONGRANGE_LRDEC_DEFAULT 0x00000000UL
#define	_MODEM_LONGRANGE_LRDEC_MASK 0x70000000UL
#define	_MODEM_LONGRANGE_LRDEC_SHIFT 28
#define	_MODEM_LONGRANGE_LRTIMCORRTHD_DEFAULT 0x000000FAUL
#define	_MODEM_LONGRANGE_LRTIMCORRTHD_MASK 0x7FF0000UL
#define	_MODEM_LONGRANGE_LRTIMCORRTHD_SHIFT 16
#define	_MODEM_LONGRANGE_MASK 0xFFFFFFFFUL
#define	_MODEM_LONGRANGE_RESETVALUE 0x00FA53E8UL
#define	_MODEM_LRFRC_CI500_DEFAULT 0x00000001UL
#define	_MODEM_LRFRC_CI500_MASK 0x3UL
#define	_MODEM_LRFRC_CI500_SHIFT 0
#define	_MODEM_LRFRC_FRCACKTIMETHD_DEFAULT 0x00000000UL
#define	_MODEM_LRFRC_FRCACKTIMETHD_MASK 0xFCUL
#define	_MODEM_LRFRC_FRCACKTIMETHD_SHIFT 2
#define	_MODEM_LRFRC_MASK 0x000000FFUL
#define	_MODEM_LRFRC_RESETVALUE 0x00000001UL
#define	_MODEM_MIXCTRL_ANAMIXMODE_DEFAULT 0x00000000UL
#define	_MODEM_MIXCTRL_ANAMIXMODE_DOWNCONVERT 0x00000009UL
#define	_MODEM_MIXCTRL_ANAMIXMODE_INQN 0x00000006UL
#define	_MODEM_MIXCTRL_ANAMIXMODE_INQNIQSWAP 0x00000007UL
#define	_MODEM_MIXCTRL_ANAMIXMODE_INQP 0x00000004UL
#define	_MODEM_MIXCTRL_ANAMIXMODE_INQPIQSWAP 0x00000005UL
#define	_MODEM_MIXCTRL_ANAMIXMODE_IPQN 0x00000002UL
#define	_MODEM_MIXCTRL_ANAMIXMODE_IPQNIQSWAP 0x00000003UL
#define	_MODEM_MIXCTRL_ANAMIXMODE_IPQPIQSWAP 0x00000001UL
#define	_MODEM_MIXCTRL_ANAMIXMODE_MASK 0xFUL
#define	_MODEM_MIXCTRL_ANAMIXMODE_NORMAL 0x00000000UL
#define	_MODEM_MIXCTRL_ANAMIXMODE_SHIFT 0
#define	_MODEM_MIXCTRL_ANAMIXMODE_UPCONVERT 0x00000008UL
#define	_MODEM_MIXCTRL_DIGIQSWAPEN_DEFAULT 0x00000000UL
#define	_MODEM_MIXCTRL_DIGIQSWAPEN_MASK 0x10UL
#define	_MODEM_MIXCTRL_DIGIQSWAPEN_SHIFT 4
#define	_MODEM_MIXCTRL_MASK 0x0000001FUL
#define	_MODEM_MIXCTRL_RESETVALUE 0x00000000UL
#define	_MODEM_MODINDEX_FREQGAINE_DEFAULT 0x00000000UL
#define	_MODEM_MODINDEX_FREQGAINE_MASK 0x70000UL
#define	_MODEM_MODINDEX_FREQGAINE_SHIFT 16
#define	_MODEM_MODINDEX_FREQGAINM_DEFAULT 0x00000000UL
#define	_MODEM_MODINDEX_FREQGAINM_MASK 0x380000UL
#define	_MODEM_MODINDEX_FREQGAINM_SHIFT 19
#define	_MODEM_MODINDEX_MASK 0x003F03FFUL
#define	_MODEM_MODINDEX_MODINDEXE_DEFAULT 0x00000000UL
#define	_MODEM_MODINDEX_MODINDEXE_MASK 0x3E0UL
#define	_MODEM_MODINDEX_MODINDEXE_SHIFT 5
#define	_MODEM_MODINDEX_MODINDEXM_DEFAULT 0x00000000UL
#define	_MODEM_MODINDEX_MODINDEXM_MASK 0x1FUL
#define	_MODEM_MODINDEX_MODINDEXM_SHIFT 0
#define	_MODEM_MODINDEX_RESETVALUE 0x00000000UL
#define	_MODEM_POE_MASK 0x03FF03FFUL
#define	_MODEM_POE_POEI_DEFAULT 0x00000000UL
#define	_MODEM_POE_POEI_MASK 0x3FFUL
#define	_MODEM_POE_POEI_SHIFT 0
#define	_MODEM_POE_POEQ_DEFAULT 0x00000000UL
#define	_MODEM_POE_POEQ_MASK 0x3FF0000UL
#define	_MODEM_POE_POEQ_SHIFT 16
#define	_MODEM_POE_RESETVALUE 0x00000000UL
#define	_MODEM_PRE_BASE_DEFAULT 0x00000000UL
#define	_MODEM_PRE_BASE_MASK 0xFUL
#define	_MODEM_PRE_BASE_SHIFT 0
#define	_MODEM_PRE_BASEBITS_DEFAULT 0x00000000UL
#define	_MODEM_PRE_BASEBITS_MASK 0x30UL
#define	_MODEM_PRE_BASEBITS_SHIFT 4
#define	_MODEM_PRE_DSSSPRE_DEFAULT 0x00000000UL
#define	_MODEM_PRE_DSSSPRE_MASK 0x800UL
#define	_MODEM_PRE_DSSSPRE_SHIFT 11
#define	_MODEM_PRE_MASK 0xFFFF1FFFUL
#define	_MODEM_PRE_PREERRORS_DEFAULT 0x00000000UL
#define	_MODEM_PRE_PREERRORS_MASK 0x780UL
#define	_MODEM_PRE_PREERRORS_SHIFT 7
#define	_MODEM_PRE_PRESYMB4FSK_DEFAULT 0x00000000UL
#define	_MODEM_PRE_PRESYMB4FSK_INNER 0x00000001UL
#define	_MODEM_PRE_PRESYMB4FSK_MASK 0x40UL
#define	_MODEM_PRE_PRESYMB4FSK_OUTER 0x00000000UL
#define	_MODEM_PRE_PRESYMB4FSK_SHIFT 6
#define	_MODEM_PRE_RESETVALUE 0x00000000UL
#define	_MODEM_PRE_SYNCSYMB4FSK_DEFAULT 0x00000000UL
#define	_MODEM_PRE_SYNCSYMB4FSK_FSK2 0x00000000UL
#define	_MODEM_PRE_SYNCSYMB4FSK_FSK4 0x00000001UL
#define	_MODEM_PRE_SYNCSYMB4FSK_MASK 0x1000UL
#define	_MODEM_PRE_SYNCSYMB4FSK_SHIFT 12
#define	_MODEM_PRE_TXBASES_DEFAULT 0x00000000UL
#define	_MODEM_PRE_TXBASES_MASK 0xFFFF0000UL
#define	_MODEM_PRE_TXBASES_SHIFT 16
#define	_MODEM_PRSCTRL_ADVANCESEL_DEFAULT 0x00000000UL
#define	_MODEM_PRSCTRL_ADVANCESEL_MASK 0xCUL
#define	_MODEM_PRSCTRL_ADVANCESEL_SHIFT 2
#define	_MODEM_PRSCTRL_ANT0SEL_DEFAULT 0x00000000UL
#define	_MODEM_PRSCTRL_ANT0SEL_MASK 0xC000UL
#define	_MODEM_PRSCTRL_ANT0SEL_SHIFT 14
#define	_MODEM_PRSCTRL_ANT1SEL_DEFAULT 0x00000000UL
#define	_MODEM_PRSCTRL_ANT1SEL_MASK 0x30000UL
#define	_MODEM_PRSCTRL_ANT1SEL_SHIFT 16
#define	_MODEM_PRSCTRL_LOWCORRSEL_DEFAULT 0x00000000UL
#define	_MODEM_PRSCTRL_LOWCORRSEL_MASK 0x3000UL
#define	_MODEM_PRSCTRL_LOWCORRSEL_SHIFT 12
#define	_MODEM_PRSCTRL_MASK 0x0003FFFFUL
#define	_MODEM_PRSCTRL_NEWWNDSEL_DEFAULT 0x00000000UL
#define	_MODEM_PRSCTRL_NEWWNDSEL_MASK 0x30UL
#define	_MODEM_PRSCTRL_NEWWNDSEL_SHIFT 4
#define	_MODEM_PRSCTRL_POSTPONESEL_DEFAULT 0x00000000UL
#define	_MODEM_PRSCTRL_POSTPONESEL_MASK 0x3UL
#define	_MODEM_PRSCTRL_POSTPONESEL_SHIFT 0
#define	_MODEM_PRSCTRL_PRESENTSEL_DEFAULT 0x00000000UL
#define	_MODEM_PRSCTRL_PRESENTSEL_MASK 0xC00UL
#define	_MODEM_PRSCTRL_PRESENTSEL_SHIFT 10
#define	_MODEM_PRSCTRL_RESETVALUE 0x00000000UL
#define	_MODEM_PRSCTRL_SYNCSENTSEL_DEFAULT 0x00000000UL
#define	_MODEM_PRSCTRL_SYNCSENTSEL_MASK 0x300UL
#define	_MODEM_PRSCTRL_SYNCSENTSEL_SHIFT 8
#define	_MODEM_PRSCTRL_WEAKSEL_DEFAULT 0x00000000UL
#define	_MODEM_PRSCTRL_WEAKSEL_MASK 0xC0UL
#define	_MODEM_PRSCTRL_WEAKSEL_SHIFT 6
#define	_MODEM_RAMPCTRL_MASK 0xFF800FFFUL
#define	_MODEM_RAMPCTRL_RAMPRATE0_DEFAULT 0x00000005UL
#define	_MODEM_RAMPCTRL_RAMPRATE0_MASK 0xFUL
#define	_MODEM_RAMPCTRL_RAMPRATE0_SHIFT 0
#define	_MODEM_RAMPCTRL_RAMPRATE1_DEFAULT 0x00000005UL
#define	_MODEM_RAMPCTRL_RAMPRATE1_MASK 0xF0UL
#define	_MODEM_RAMPCTRL_RAMPRATE1_SHIFT 4
#define	_MODEM_RAMPCTRL_RAMPRATE2_DEFAULT 0x00000005UL
#define	_MODEM_RAMPCTRL_RAMPRATE2_MASK 0xF00UL
#define	_MODEM_RAMPCTRL_RAMPRATE2_SHIFT 8
#define	_MODEM_RAMPCTRL_RESETVALUE 0x00000555UL
#define	_MODEM_RAMPLEV_MASK 0x00FFFFFFUL
#define	_MODEM_RAMPLEV_RAMPLEV0_DEFAULT 0x000000FFUL
#define	_MODEM_RAMPLEV_RAMPLEV0_MASK 0xFFUL
#define	_MODEM_RAMPLEV_RAMPLEV0_SHIFT 0
#define	_MODEM_RAMPLEV_RAMPLEV1_DEFAULT 0x000000FFUL
#define	_MODEM_RAMPLEV_RAMPLEV1_MASK 0xFF00UL
#define	_MODEM_RAMPLEV_RAMPLEV1_SHIFT 8
#define	_MODEM_RAMPLEV_RAMPLEV2_DEFAULT 0x000000FFUL
#define	_MODEM_RAMPLEV_RAMPLEV2_MASK 0xFF0000UL
#define	_MODEM_RAMPLEV_RAMPLEV2_SHIFT 16
#define	_MODEM_RAMPLEV_RESETVALUE 0x00FFFFFFUL
#define	_MODEM_RXBR_MASK 0x00001FFFUL
#define	_MODEM_RXBR_RESETVALUE 0x00000000UL
#define	_MODEM_RXBR_RXBRDEN_DEFAULT 0x00000000UL
#define	_MODEM_RXBR_RXBRDEN_MASK 0x3E0UL
#define	_MODEM_RXBR_RXBRDEN_SHIFT 5
#define	_MODEM_RXBR_RXBRINT_DEFAULT 0x00000000UL
#define	_MODEM_RXBR_RXBRINT_MASK 0x1C00UL
#define	_MODEM_RXBR_RXBRINT_SHIFT 10
#define	_MODEM_RXBR_RXBRNUM_DEFAULT 0x00000000UL
#define	_MODEM_RXBR_RXBRNUM_MASK 0x1FUL
#define	_MODEM_RXBR_RXBRNUM_SHIFT 0
#define	_MODEM_SHAPING0_COEFF0_DEFAULT 0x00000004UL
#define	_MODEM_SHAPING0_COEFF0_MASK 0xFFUL
#define	_MODEM_SHAPING0_COEFF0_SHIFT 0
#define	_MODEM_SHAPING0_COEFF1_DEFAULT 0x0000000AUL
#define	_MODEM_SHAPING0_COEFF1_MASK 0xFF00UL
#define	_MODEM_SHAPING0_COEFF1_SHIFT 8
#define	_MODEM_SHAPING0_COEFF2_DEFAULT 0x00000013UL
#define	_MODEM_SHAPING0_COEFF2_MASK 0xFF0000UL
#define	_MODEM_SHAPING0_COEFF2_SHIFT 16
#define	_MODEM_SHAPING0_COEFF3_DEFAULT 0x00000022UL
#define	_MODEM_SHAPING0_COEFF3_MASK 0xFF000000UL
#define	_MODEM_SHAPING0_COEFF3_SHIFT 24
#define	_MODEM_SHAPING0_MASK 0xFFFFFFFFUL
#define	_MODEM_SHAPING0_RESETVALUE 0x22130A04UL
#define	_MODEM_SHAPING1_COEFF4_DEFAULT 0x00000032UL
#define	_MODEM_SHAPING1_COEFF4_MASK 0xFFUL
#define	_MODEM_SHAPING1_COEFF4_SHIFT 0
#define	_MODEM_SHAPING1_COEFF5_DEFAULT 0x00000041UL
#define	_MODEM_SHAPING1_COEFF5_MASK 0xFF00UL
#define	_MODEM_SHAPING1_COEFF5_SHIFT 8
#define	_MODEM_SHAPING1_COEFF6_DEFAULT 0x0000004AUL
#define	_MODEM_SHAPING1_COEFF6_MASK 0xFF0000UL
#define	_MODEM_SHAPING1_COEFF6_SHIFT 16
#define	_MODEM_SHAPING1_COEFF7_DEFAULT 0x0000004FUL
#define	_MODEM_SHAPING1_COEFF7_MASK 0xFF000000UL
#define	_MODEM_SHAPING1_COEFF7_SHIFT 24
#define	_MODEM_SHAPING1_MASK 0xFFFFFFFFUL
#define	_MODEM_SHAPING1_RESETVALUE 0x4F4A4132UL
#define	_MODEM_SHAPING2_COEFF10_DEFAULT 0x00000000UL
#define	_MODEM_SHAPING2_COEFF10_MASK 0xFF0000UL
#define	_MODEM_SHAPING2_COEFF10_SHIFT 16
#define	_MODEM_SHAPING2_COEFF11_DEFAULT 0x00000000UL
#define	_MODEM_SHAPING2_COEFF11_MASK 0xFF000000UL
#define	_MODEM_SHAPING2_COEFF11_SHIFT 24
#define	_MODEM_SHAPING2_COEFF8_DEFAULT 0x00000000UL
#define	_MODEM_SHAPING2_COEFF8_MASK 0xFFUL
#define	_MODEM_SHAPING2_COEFF8_SHIFT 0
#define	_MODEM_SHAPING2_COEFF9_DEFAULT 0x00000000UL
#define	_MODEM_SHAPING2_COEFF9_MASK 0xFF00UL
#define	_MODEM_SHAPING2_COEFF9_SHIFT 8
#define	_MODEM_SHAPING2_MASK 0xFFFFFFFFUL
#define	_MODEM_SHAPING2_RESETVALUE 0x00000000UL
#define	_MODEM_SHAPING3_COEFF12_DEFAULT 0x00000000UL
#define	_MODEM_SHAPING3_COEFF12_MASK 0xFFUL
#define	_MODEM_SHAPING3_COEFF12_SHIFT 0
#define	_MODEM_SHAPING3_COEFF13_DEFAULT 0x00000000UL
#define	_MODEM_SHAPING3_COEFF13_MASK 0xFF00UL
#define	_MODEM_SHAPING3_COEFF13_SHIFT 8
#define	_MODEM_SHAPING3_COEFF14_DEFAULT 0x00000000UL
#define	_MODEM_SHAPING3_COEFF14_MASK 0xFF0000UL
#define	_MODEM_SHAPING3_COEFF14_SHIFT 16
#define	_MODEM_SHAPING3_COEFF15_DEFAULT 0x00000000UL
#define	_MODEM_SHAPING3_COEFF15_MASK 0xFF000000UL
#define	_MODEM_SHAPING3_COEFF15_SHIFT 24
#define	_MODEM_SHAPING3_MASK 0xFFFFFFFFUL
#define	_MODEM_SHAPING3_RESETVALUE 0x00000000UL
#define	_MODEM_SHAPING4_COEFF16_DEFAULT 0x00000000UL
#define	_MODEM_SHAPING4_COEFF16_MASK 0x3FUL
#define	_MODEM_SHAPING4_COEFF16_SHIFT 0
#define	_MODEM_SHAPING4_COEFF17_DEFAULT 0x00000000UL
#define	_MODEM_SHAPING4_COEFF17_MASK 0xFC0UL
#define	_MODEM_SHAPING4_COEFF17_SHIFT 6
#define	_MODEM_SHAPING4_COEFF18_DEFAULT 0x00000000UL
#define	_MODEM_SHAPING4_COEFF18_MASK 0x3F000UL
#define	_MODEM_SHAPING4_COEFF18_SHIFT 12
#define	_MODEM_SHAPING4_COEFF19_DEFAULT 0x00000000UL
#define	_MODEM_SHAPING4_COEFF19_MASK 0x7C0000UL
#define	_MODEM_SHAPING4_COEFF19_SHIFT 18
#define	_MODEM_SHAPING4_COEFF20_DEFAULT 0x00000000UL
#define	_MODEM_SHAPING4_COEFF20_MASK 0xF800000UL
#define	_MODEM_SHAPING4_COEFF20_SHIFT 23
#define	_MODEM_SHAPING4_COEFF21_DEFAULT 0x00000000UL
#define	_MODEM_SHAPING4_COEFF21_MASK 0xF0000000UL
#define	_MODEM_SHAPING4_COEFF21_SHIFT 28
#define	_MODEM_SHAPING4_MASK 0xFFFFFFFFUL
#define	_MODEM_SHAPING4_RESETVALUE 0x00000000UL
#define	_MODEM_SHAPING5_COEFF22_DEFAULT 0x00000000UL
#define	_MODEM_SHAPING5_COEFF22_MASK 0xFUL
#define	_MODEM_SHAPING5_COEFF22_SHIFT 0
#define	_MODEM_SHAPING5_COEFF23_DEFAULT 0x00000000UL
#define	_MODEM_SHAPING5_COEFF23_MASK 0xF0UL
#define	_MODEM_SHAPING5_COEFF23_SHIFT 4
#define	_MODEM_SHAPING5_COEFF24_DEFAULT 0x00000000UL
#define	_MODEM_SHAPING5_COEFF24_MASK 0xF00UL
#define	_MODEM_SHAPING5_COEFF24_SHIFT 8
#define	_MODEM_SHAPING5_COEFF25_DEFAULT 0x00000000UL
#define	_MODEM_SHAPING5_COEFF25_MASK 0xF000UL
#define	_MODEM_SHAPING5_COEFF25_SHIFT 12
#define	_MODEM_SHAPING5_COEFF26_DEFAULT 0x00000000UL
#define	_MODEM_SHAPING5_COEFF26_MASK 0xF0000UL
#define	_MODEM_SHAPING5_COEFF26_SHIFT 16
#define	_MODEM_SHAPING5_COEFF27_DEFAULT 0x00000000UL
#define	_MODEM_SHAPING5_COEFF27_MASK 0xF00000UL
#define	_MODEM_SHAPING5_COEFF27_SHIFT 20
#define	_MODEM_SHAPING5_COEFF28_DEFAULT 0x00000000UL
#define	_MODEM_SHAPING5_COEFF28_MASK 0xF000000UL
#define	_MODEM_SHAPING5_COEFF28_SHIFT 24
#define	_MODEM_SHAPING5_COEFF29_DEFAULT 0x00000000UL
#define	_MODEM_SHAPING5_COEFF29_MASK 0xF0000000UL
#define	_MODEM_SHAPING5_COEFF29_SHIFT 28
#define	_MODEM_SHAPING5_MASK 0xFFFFFFFFUL
#define	_MODEM_SHAPING5_RESETVALUE 0x00000000UL
#define	_MODEM_SHAPING6_COEFF30_DEFAULT 0x00000000UL
#define	_MODEM_SHAPING6_COEFF30_MASK 0xFUL
#define	_MODEM_SHAPING6_COEFF30_SHIFT 0
#define	_MODEM_SHAPING6_COEFF31_DEFAULT 0x00000000UL
#define	_MODEM_SHAPING6_COEFF31_MASK 0xF0UL
#define	_MODEM_SHAPING6_COEFF31_SHIFT 4
#define	_MODEM_SHAPING6_COEFF32_DEFAULT 0x00000000UL
#define	_MODEM_SHAPING6_COEFF32_MASK 0x700UL
#define	_MODEM_SHAPING6_COEFF32_SHIFT 8
#define	_MODEM_SHAPING6_COEFF33_DEFAULT 0x00000000UL
#define	_MODEM_SHAPING6_COEFF33_MASK 0x3800UL
#define	_MODEM_SHAPING6_COEFF33_SHIFT 11
#define	_MODEM_SHAPING6_COEFF34_DEFAULT 0x00000000UL
#define	_MODEM_SHAPING6_COEFF34_MASK 0x1C000UL
#define	_MODEM_SHAPING6_COEFF34_SHIFT 14
#define	_MODEM_SHAPING6_COEFF35_DEFAULT 0x00000000UL
#define	_MODEM_SHAPING6_COEFF35_MASK 0xE0000UL
#define	_MODEM_SHAPING6_COEFF35_SHIFT 17
#define	_MODEM_SHAPING6_COEFF36_DEFAULT 0x00000000UL
#define	_MODEM_SHAPING6_COEFF36_MASK 0x700000UL
#define	_MODEM_SHAPING6_COEFF36_SHIFT 20
#define	_MODEM_SHAPING6_COEFF37_DEFAULT 0x00000000UL
#define	_MODEM_SHAPING6_COEFF37_MASK 0x3800000UL
#define	_MODEM_SHAPING6_COEFF37_SHIFT 23
#define	_MODEM_SHAPING6_COEFF38_DEFAULT 0x00000000UL
#define	_MODEM_SHAPING6_COEFF38_MASK 0x1C000000UL
#define	_MODEM_SHAPING6_COEFF38_SHIFT 26
#define	_MODEM_SHAPING6_COEFF39_DEFAULT 0x00000000UL
#define	_MODEM_SHAPING6_COEFF39_MASK 0xE0000000UL
#define	_MODEM_SHAPING6_COEFF39_SHIFT 29
#define	_MODEM_SHAPING6_MASK 0xFFFFFFFFUL
#define	_MODEM_SHAPING6_RESETVALUE 0x00000000UL
#define	_MODEM_SRCCHF_BWSEL_DEFAULT 0x00000000UL
#define	_MODEM_SRCCHF_BWSEL_MASK 0x60000000UL
#define	_MODEM_SRCCHF_BWSEL_SHIFT 29
#define	_MODEM_SRCCHF_BWSEL_X0 0x00000000UL
#define	_MODEM_SRCCHF_BWSEL_X1 0x00000001UL
#define	_MODEM_SRCCHF_BWSEL_X2 0x00000002UL
#define	_MODEM_SRCCHF_BWSEL_X3 0x00000003UL
#define	_MODEM_SRCCHF_INTOSR_DEFAULT 0x00000000UL
#define	_MODEM_SRCCHF_INTOSR_MASK 0x80000000UL
#define	_MODEM_SRCCHF_INTOSR_SHIFT 31
#define	_MODEM_SRCCHF_MASK 0xEFFFF8FFUL
#define	_MODEM_SRCCHF_RESETVALUE 0x00000000UL
#define	_MODEM_SRCCHF_SRCENABLE1_DEFAULT 0x00000000UL
#define	_MODEM_SRCCHF_SRCENABLE1_MASK 0x800UL
#define	_MODEM_SRCCHF_SRCENABLE1_SHIFT 11
#define	_MODEM_SRCCHF_SRCENABLE2_DEFAULT 0x00000000UL
#define	_MODEM_SRCCHF_SRCENABLE2_MASK 0x8000000UL
#define	_MODEM_SRCCHF_SRCENABLE2_SHIFT 27
#define	_MODEM_SRCCHF_SRCRATIO1_DEFAULT 0x00000000UL
#define	_MODEM_SRCCHF_SRCRATIO1_MASK 0xFFUL
#define	_MODEM_SRCCHF_SRCRATIO1_SHIFT 0
#define	_MODEM_SRCCHF_SRCRATIO2_DEFAULT 0x00000000UL
#define	_MODEM_SRCCHF_SRCRATIO2_MASK 0x7FFF000UL
#define	_MODEM_SRCCHF_SRCRATIO2_SHIFT 12
#define	_MODEM_STATUS2_BBSSMUX_DEFAULT 0x00000000UL
#define	_MODEM_STATUS2_BBSSMUX_MASK 0xF00UL
#define	_MODEM_STATUS2_BBSSMUX_SHIFT 8
#define	_MODEM_STATUS2_CHPWRACCUMUX_DEFAULT 0x00000000UL
#define	_MODEM_STATUS2_CHPWRACCUMUX_MASK 0xFFUL
#define	_MODEM_STATUS2_CHPWRACCUMUX_SHIFT 0
#define	_MODEM_STATUS2_LRBLECI_DEFAULT 0x00000000UL
#define	_MODEM_STATUS2_LRBLECI_LR125k 0x00000000UL
#define	_MODEM_STATUS2_LRBLECI_LR500k 0x00000001UL
#define	_MODEM_STATUS2_LRBLECI_MASK 0x3000UL
#define	_MODEM_STATUS2_LRBLECI_SHIFT 12
#define	_MODEM_STATUS2_MASK 0x00003FFFUL
#define	_MODEM_STATUS2_RESETVALUE 0x00000000UL
#define	_MODEM_STATUS3_BBPFOUTABS1_DEFAULT 0x00000000UL
#define	_MODEM_STATUS3_BBPFOUTABS1_MASK 0x7FFUL
#define	_MODEM_STATUS3_BBPFOUTABS1_SHIFT 0
#define	_MODEM_STATUS3_BBPFOUTABS_DEFAULT 0x00000000UL
#define	_MODEM_STATUS3_BBPFOUTABS_MASK 0x3FF800UL
#define	_MODEM_STATUS3_BBPFOUTABS_SHIFT 11
#define	_MODEM_STATUS3_COHDSADET_DEFAULT 0x00000000UL
#define	_MODEM_STATUS3_COHDSADET_MASK 0x2000000UL
#define	_MODEM_STATUS3_COHDSADET_SHIFT 25
#define	_MODEM_STATUS3_COHDSALIVE_DEFAULT 0x00000000UL
#define	_MODEM_STATUS3_COHDSALIVE_MASK 0x800000UL
#define	_MODEM_STATUS3_COHDSALIVE_SHIFT 23
#define	_MODEM_STATUS3_LRDSADET_DEFAULT 0x00000000UL
#define	_MODEM_STATUS3_LRDSADET_MASK 0x1000000UL
#define	_MODEM_STATUS3_LRDSADET_SHIFT 24
#define	_MODEM_STATUS3_LRDSALIVE_DEFAULT 0x00000000UL
#define	_MODEM_STATUS3_LRDSALIVE_MASK 0x400000UL
#define	_MODEM_STATUS3_LRDSALIVE_SHIFT 22
#define	_MODEM_STATUS3_MASK 0x07FFFFFFUL
#define	_MODEM_STATUS3_RESETVALUE 0x00000000UL
#define	_MODEM_STATUS3_SYNCSECPEAKABTH_DEFAULT 0x00000000UL
#define	_MODEM_STATUS3_SYNCSECPEAKABTH_MASK 0x4000000UL
#define	_MODEM_STATUS3_SYNCSECPEAKABTH_SHIFT 26
#define	_MODEM_STATUS_ANTSEL_ANTENNA0 0x00000000UL
#define	_MODEM_STATUS_ANTSEL_ANTENNA1 0x00000001UL
#define	_MODEM_STATUS_ANTSEL_DEFAULT 0x00000000UL
#define	_MODEM_STATUS_ANTSEL_MASK 0x20UL
#define	_MODEM_STATUS_ANTSEL_SHIFT 5
#define	_MODEM_STATUS_CORR_DEFAULT 0x00000000UL
#define	_MODEM_STATUS_CORR_MASK 0xFF0000UL
#define	_MODEM_STATUS_CORR_SHIFT 16
#define	_MODEM_STATUS_DEMODSTATE_DEFAULT 0x00000000UL
#define	_MODEM_STATUS_DEMODSTATE_FRAMEDETMODE0 0x00000005UL
#define	_MODEM_STATUS_DEMODSTATE_FRAMESEARCH 0x00000003UL
#define	_MODEM_STATUS_DEMODSTATE_MASK 0x7UL
#define	_MODEM_STATUS_DEMODSTATE_OFF 0x00000000UL
#define	_MODEM_STATUS_DEMODSTATE_PRESEARCH 0x00000002UL
#define	_MODEM_STATUS_DEMODSTATE_RXFRAME 0x00000004UL
#define	_MODEM_STATUS_DEMODSTATE_SHIFT 0
#define	_MODEM_STATUS_DEMODSTATE_TIMINGSEARCH 0x00000001UL
#define	_MODEM_STATUS_DSADETECTED_DEFAULT 0x00000000UL
#define	_MODEM_STATUS_DSADETECTED_MASK 0x100UL
#define	_MODEM_STATUS_DSADETECTED_SHIFT 8
#define	_MODEM_STATUS_DSAFREQESTDONE_DEFAULT 0x00000000UL
#define	_MODEM_STATUS_DSAFREQESTDONE_MASK 0x200UL
#define	_MODEM_STATUS_DSAFREQESTDONE_SHIFT 9
#define	_MODEM_STATUS_FRAMEDETID_DEFAULT 0x00000000UL
#define	_MODEM_STATUS_FRAMEDETID_FRAMEDET0 0x00000000UL
#define	_MODEM_STATUS_FRAMEDETID_FRAMEDET1 0x00000001UL
#define	_MODEM_STATUS_FRAMEDETID_MASK 0x10UL
#define	_MODEM_STATUS_FRAMEDETID_SHIFT 4
#define	_MODEM_STATUS_MASK 0xFFFF7FF7UL
#define	_MODEM_STATUS_RESETVALUE 0x00000000UL
#define	_MODEM_STATUS_STAMPSTATE_DEFAULT 0x00000000UL
#define	_MODEM_STATUS_STAMPSTATE_MASK 0x7000UL
#define	_MODEM_STATUS_STAMPSTATE_SHIFT 12
#define	_MODEM_STATUS_TIMLOSTCAUSE_DEFAULT 0x00000000UL
#define	_MODEM_STATUS_TIMLOSTCAUSE_LOWCORR 0x00000000UL
#define	_MODEM_STATUS_TIMLOSTCAUSE_MASK 0x80UL
#define	_MODEM_STATUS_TIMLOSTCAUSE_SHIFT 7
#define	_MODEM_STATUS_TIMLOSTCAUSE_TIMEOUT 0x00000001UL
#define	_MODEM_STATUS_TIMSEQINV_DEFAULT 0x00000000UL
#define	_MODEM_STATUS_TIMSEQINV_MASK 0x40UL
#define	_MODEM_STATUS_TIMSEQINV_SHIFT 6
#define	_MODEM_STATUS_VITERBIDEMODFRAMEDET_DEFAULT 0x00000000UL
#define	_MODEM_STATUS_VITERBIDEMODFRAMEDET_MASK 0x800UL
#define	_MODEM_STATUS_VITERBIDEMODFRAMEDET_SHIFT 11
#define	_MODEM_STATUS_VITERBIDEMODTIMDET_DEFAULT 0x00000000UL
#define	_MODEM_STATUS_VITERBIDEMODTIMDET_MASK 0x400UL
#define	_MODEM_STATUS_VITERBIDEMODTIMDET_SHIFT 10
#define	_MODEM_STATUS_WEAKSYMBOLS_DEFAULT 0x00000000UL
#define	_MODEM_STATUS_WEAKSYMBOLS_MASK 0xFF000000UL
#define	_MODEM_STATUS_WEAKSYMBOLS_SHIFT 24
#define	_MODEM_SYNC0_MASK 0xFFFFFFFFUL
#define	_MODEM_SYNC0_RESETVALUE 0x00000000UL
#define	_MODEM_SYNC0_SYNC0_DEFAULT 0x00000000UL
#define	_MODEM_SYNC0_SYNC0_MASK 0xFFFFFFFFUL
#define	_MODEM_SYNC0_SYNC0_SHIFT 0
#define	_MODEM_SYNC1_MASK 0xFFFFFFFFUL
#define	_MODEM_SYNC1_RESETVALUE 0x00000000UL
#define	_MODEM_SYNC1_SYNC1_DEFAULT 0x00000000UL
#define	_MODEM_SYNC1_SYNC1_MASK 0xFFFFFFFFUL
#define	_MODEM_SYNC1_SYNC1_SHIFT 0
#define	_MODEM_SYNCPROPERTIES_MASK 0x000000FFUL
#define	_MODEM_SYNCPROPERTIES_RESETVALUE 0x00000000UL
#define	_MODEM_SYNCPROPERTIES_SYNCCORRCLR_DEFAULT 0x00000000UL
#define	_MODEM_SYNCPROPERTIES_SYNCCORRCLR_MASK 0x1UL
#define	_MODEM_SYNCPROPERTIES_SYNCCORRCLR_SHIFT 0
#define	_MODEM_SYNCPROPERTIES_SYNCSECPEAKTH_DEFAULT 0x00000000UL
#define	_MODEM_SYNCPROPERTIES_SYNCSECPEAKTH_MASK 0xFEUL
#define	_MODEM_SYNCPROPERTIES_SYNCSECPEAKTH_SHIFT 1
#define	_MODEM_TIMDETSTATUS_MASK 0x1F0FFFFFUL
#define	_MODEM_TIMDETSTATUS_RESETVALUE 0x00000000UL
#define	_MODEM_TIMDETSTATUS_TIMDETCORR_DEFAULT 0x00000000UL
#define	_MODEM_TIMDETSTATUS_TIMDETCORR_MASK 0xFFUL
#define	_MODEM_TIMDETSTATUS_TIMDETCORR_SHIFT 0
#define	_MODEM_TIMDETSTATUS_TIMDETFREQOFFEST_DEFAULT 0x00000000UL
#define	_MODEM_TIMDETSTATUS_TIMDETFREQOFFEST_MASK 0xFF00UL
#define	_MODEM_TIMDETSTATUS_TIMDETFREQOFFEST_SHIFT 8
#define	_MODEM_TIMDETSTATUS_TIMDETINDEX_DEFAULT 0x00000000UL
#define	_MODEM_TIMDETSTATUS_TIMDETINDEX_MASK 0x1E000000UL
#define	_MODEM_TIMDETSTATUS_TIMDETINDEX_SHIFT 25
#define	_MODEM_TIMDETSTATUS_TIMDETPASS_DEFAULT 0x00000000UL
#define	_MODEM_TIMDETSTATUS_TIMDETPASS_MASK 0x1000000UL
#define	_MODEM_TIMDETSTATUS_TIMDETPASS_SHIFT 24
#define	_MODEM_TIMDETSTATUS_TIMDETPREERRORS_DEFAULT 0x00000000UL
#define	_MODEM_TIMDETSTATUS_TIMDETPREERRORS_MASK 0xF0000UL
#define	_MODEM_TIMDETSTATUS_TIMDETPREERRORS_SHIFT 16
#define	_MODEM_TIMING_ADDTIMSEQ_DEFAULT 0x00000000UL
#define	_MODEM_TIMING_ADDTIMSEQ_MASK 0xF000UL
#define	_MODEM_TIMING_ADDTIMSEQ_SHIFT 12
#define	_MODEM_TIMING_FASTRESYNC_DEFAULT 0x00000000UL
#define	_MODEM_TIMING_FASTRESYNC_DIS 0x00000000UL
#define	_MODEM_TIMING_FASTRESYNC_FRAMEDET 0x00000002UL
#define	_MODEM_TIMING_FASTRESYNC_MASK 0xC0000000UL
#define	_MODEM_TIMING_FASTRESYNC_PREDET 0x00000001UL
#define	_MODEM_TIMING_FASTRESYNC_SHIFT 30
#define	_MODEM_TIMING_FDM0THRESH_DEFAULT 0x00000000UL
#define	_MODEM_TIMING_FDM0THRESH_MASK 0x1C0000UL
#define	_MODEM_TIMING_FDM0THRESH_SHIFT 18
#define	_MODEM_TIMING_MASK 0xFFFFFFFFUL
#define	_MODEM_TIMING_OFFSUBDEN_DEFAULT 0x00000000UL
#define	_MODEM_TIMING_OFFSUBDEN_MASK 0x1E000000UL
#define	_MODEM_TIMING_OFFSUBDEN_SHIFT 25
#define	_MODEM_TIMING_OFFSUBNUM_DEFAULT 0x00000000UL
#define	_MODEM_TIMING_OFFSUBNUM_MASK 0x1E00000UL
#define	_MODEM_TIMING_OFFSUBNUM_SHIFT 21
#define	_MODEM_TIMING_RESETVALUE 0x00000000UL
#define	_MODEM_TIMING_TIMINGBASES_DEFAULT 0x00000000UL
#define	_MODEM_TIMING_TIMINGBASES_MASK 0xF00UL
#define	_MODEM_TIMING_TIMINGBASES_SHIFT 8
#define	_MODEM_TIMING_TIMSEQINVEN_DEFAULT 0x00000000UL
#define	_MODEM_TIMING_TIMSEQINVEN_MASK 0x10000UL
#define	_MODEM_TIMING_TIMSEQINVEN_SHIFT 16
#define	_MODEM_TIMING_TIMSEQSYNC_DEFAULT 0x00000000UL
#define	_MODEM_TIMING_TIMSEQSYNC_MASK 0x20000UL
#define	_MODEM_TIMING_TIMSEQSYNC_SHIFT 17
#define	_MODEM_TIMING_TIMTHRESH_DEFAULT 0x00000000UL
#define	_MODEM_TIMING_TIMTHRESH_MASK 0xFFUL
#define	_MODEM_TIMING_TIMTHRESH_SHIFT 0
#define	_MODEM_TIMING_TSAGCDEL_DEFAULT 0x00000000UL
#define	_MODEM_TIMING_TSAGCDEL_MASK 0x20000000UL
#define	_MODEM_TIMING_TSAGCDEL_SHIFT 29
#define	_MODEM_TXBR_MASK 0x00FFFFFFUL
#define	_MODEM_TXBR_RESETVALUE 0x00000000UL
#define	_MODEM_TXBR_TXBRDEN_DEFAULT 0x00000000UL
#define	_MODEM_TXBR_TXBRDEN_MASK 0xFF0000UL
#define	_MODEM_TXBR_TXBRDEN_SHIFT 16
#define	_MODEM_TXBR_TXBRNUM_DEFAULT 0x00000000UL
#define	_MODEM_TXBR_TXBRNUM_MASK 0xFFFFUL
#define	_MODEM_TXBR_TXBRNUM_SHIFT 0
#define	_MODEM_VITERBIDEMOD_CORRCYCLE_DEFAULT 0x00000000UL
#define	_MODEM_VITERBIDEMOD_CORRCYCLE_MASK 0x7800000UL
#define	_MODEM_VITERBIDEMOD_CORRCYCLE_SHIFT 23
#define	_MODEM_VITERBIDEMOD_CORRSTPSIZE_DEFAULT 0x00000000UL
#define	_MODEM_VITERBIDEMOD_CORRSTPSIZE_MASK 0x78000000UL
#define	_MODEM_VITERBIDEMOD_CORRSTPSIZE_SHIFT 27
#define	_MODEM_VITERBIDEMOD_DISDEMODOF_DEFAULT 0x00000000UL
#define	_MODEM_VITERBIDEMOD_DISDEMODOF_MASK 0x80000000UL
#define	_MODEM_VITERBIDEMOD_DISDEMODOF_SHIFT 31
#define	_MODEM_VITERBIDEMOD_HARDDECISION_DEFAULT 0x00000000UL
#define	_MODEM_VITERBIDEMOD_HARDDECISION_MASK 0x2UL
#define	_MODEM_VITERBIDEMOD_HARDDECISION_SHIFT 1
#define	_MODEM_VITERBIDEMOD_MASK 0xFFFFFFFFUL
#define	_MODEM_VITERBIDEMOD_RESETVALUE 0x00206100UL
#define	_MODEM_VITERBIDEMOD_SYNTHAFC_DEFAULT 0x00000000UL
#define	_MODEM_VITERBIDEMOD_SYNTHAFC_MASK 0x400000UL
#define	_MODEM_VITERBIDEMOD_SYNTHAFC_SHIFT 22
#define	_MODEM_VITERBIDEMOD_VITERBIKSI1_DEFAULT 0x00000040UL
#define	_MODEM_VITERBIDEMOD_VITERBIKSI1_MASK 0x1FCUL
#define	_MODEM_VITERBIDEMOD_VITERBIKSI1_SHIFT 2
#define	_MODEM_VITERBIDEMOD_VITERBIKSI2_DEFAULT 0x00000030UL
#define	_MODEM_VITERBIDEMOD_VITERBIKSI2_MASK 0xFE00UL
#define	_MODEM_VITERBIDEMOD_VITERBIKSI2_SHIFT 9
#define	_MODEM_VITERBIDEMOD_VITERBIKSI3_DEFAULT 0x00000020UL
#define	_MODEM_VITERBIDEMOD_VITERBIKSI3_MASK 0x3F0000UL
#define	_MODEM_VITERBIDEMOD_VITERBIKSI3_SHIFT 16
#define	_MODEM_VITERBIDEMOD_VTDEMODEN_DEFAULT 0x00000000UL
#define	_MODEM_VITERBIDEMOD_VTDEMODEN_MASK 0x1UL
#define	_MODEM_VITERBIDEMOD_VTDEMODEN_SHIFT 0
#define	_MODEM_VTBLETIMING_FLENOFF_DEFAULT 0x00000000UL
#define	_MODEM_VTBLETIMING_FLENOFF_MASK 0xF000UL
#define	_MODEM_VTBLETIMING_FLENOFF_SHIFT 12
#define	_MODEM_VTBLETIMING_MASK 0x0000FFF3UL
#define	_MODEM_VTBLETIMING_RESETVALUE 0x00000000UL
#define	_MODEM_VTBLETIMING_TIMINGDELAY_DEFAULT 0x00000000UL
#define	_MODEM_VTBLETIMING_TIMINGDELAY_MASK 0xFF0UL
#define	_MODEM_VTBLETIMING_TIMINGDELAY_SHIFT 4
#define	_MODEM_VTBLETIMING_VTBLETIMINGSEL_DEFAULT 0x00000000UL
#define	_MODEM_VTBLETIMING_VTBLETIMINGSEL_END_FRAME 0x00000002UL
#define	_MODEM_VTBLETIMING_VTBLETIMINGSEL_END_FRAME_PULSE 0x00000001UL
#define	_MODEM_VTBLETIMING_VTBLETIMINGSEL_FRAMEDET_DELAY 0x00000000UL
#define	_MODEM_VTBLETIMING_VTBLETIMINGSEL_INV_END_FRAME 0x00000003UL
#define	_MODEM_VTBLETIMING_VTBLETIMINGSEL_MASK 0x3UL
#define	_MODEM_VTBLETIMING_VTBLETIMINGSEL_SHIFT 0
#define	_MODEM_VTCORRCFG0_EXPECTPATT_DEFAULT 0x123556B7UL
#define	_MODEM_VTCORRCFG0_EXPECTPATT_MASK 0xFFFFFFFFUL
#define	_MODEM_VTCORRCFG0_EXPECTPATT_SHIFT 0
#define	_MODEM_VTCORRCFG0_MASK 0xFFFFFFFFUL
#define	_MODEM_VTCORRCFG0_RESETVALUE 0x123556B7UL
#define	_MODEM_VTCORRCFG1_BUFFHEAD_DEFAULT 0x00000002UL
#define	_MODEM_VTCORRCFG1_BUFFHEAD_MASK 0x7800000UL
#define	_MODEM_VTCORRCFG1_BUFFHEAD_SHIFT 23
#define	_MODEM_VTCORRCFG1_CORRSHFTLEN_DEFAULT 0x00000020UL
#define	_MODEM_VTCORRCFG1_CORRSHFTLEN_MASK 0x3FUL
#define	_MODEM_VTCORRCFG1_CORRSHFTLEN_SHIFT 0
#define	_MODEM_VTCORRCFG1_EXPECTHT_DEFAULT 0x00000005UL
#define	_MODEM_VTCORRCFG1_EXPECTHT_MASK 0x78000000UL
#define	_MODEM_VTCORRCFG1_EXPECTHT_SHIFT 27
#define	_MODEM_VTCORRCFG1_EXPSYNCLEN_DEFAULT 0x00000008UL
#define	_MODEM_VTCORRCFG1_EXPSYNCLEN_MASK 0x7F8000UL
#define	_MODEM_VTCORRCFG1_EXPSYNCLEN_SHIFT 15
#define	_MODEM_VTCORRCFG1_MASK 0x7FFFFFFFUL
#define	_MODEM_VTCORRCFG1_RESETVALUE 0x29043020UL
#define	_MODEM_VTCORRCFG1_VTFRQLIM_DEFAULT 0x000000C0UL
#define	_MODEM_VTCORRCFG1_VTFRQLIM_MASK 0x7FC0UL
#define	_MODEM_VTCORRCFG1_VTFRQLIM_SHIFT 6
#define	_MODEM_VTTRACK_FREQBIAS_DEFAULT 0x00000000UL
#define	_MODEM_VTTRACK_FREQBIAS_MASK 0x3C0000UL
#define	_MODEM_VTTRACK_FREQBIAS_SHIFT 18
#define	_MODEM_VTTRACK_FREQTRACKMODE_DEFAULT 0x00000000UL
#define	_MODEM_VTTRACK_FREQTRACKMODE_DISABLED 0x00000000UL
#define	_MODEM_VTTRACK_FREQTRACKMODE_MASK 0x3UL
#define	_MODEM_VTTRACK_FREQTRACKMODE_MODE1 0x00000001UL
#define	_MODEM_VTTRACK_FREQTRACKMODE_MODE2 0x00000002UL
#define	_MODEM_VTTRACK_FREQTRACKMODE_MODE3 0x00000003UL
#define	_MODEM_VTTRACK_FREQTRACKMODE_SHIFT 0
#define	_MODEM_VTTRACK_HIPWRTHD_DEFAULT 0x00000036UL
#define	_MODEM_VTTRACK_HIPWRTHD_MASK 0x3FC00000UL
#define	_MODEM_VTTRACK_HIPWRTHD_SHIFT 22
#define	_MODEM_VTTRACK_MASK 0x3FFFFFFFUL
#define	_MODEM_VTTRACK_RESETVALUE 0x0D80BB88UL
#define	_MODEM_VTTRACK_TIMCHK_DEFAULT 0x00000000UL
#define	_MODEM_VTTRACK_TIMCHK_MASK 0x4000UL
#define	_MODEM_VTTRACK_TIMCHK_SHIFT 14
#define	_MODEM_VTTRACK_TIMEACQUTHD_DEFAULT 0x000000EEUL
#define	_MODEM_VTTRACK_TIMEACQUTHD_MASK 0x3FC0UL
#define	_MODEM_VTTRACK_TIMEACQUTHD_SHIFT 6
#define	_MODEM_VTTRACK_TIMEOUTMODE_DEFAULT 0x00000001UL
#define	_MODEM_VTTRACK_TIMEOUTMODE_MASK 0x8000UL
#define	_MODEM_VTTRACK_TIMEOUTMODE_SHIFT 15
#define	_MODEM_VTTRACK_TIMGEAR_DEFAULT 0x00000000UL
#define	_MODEM_VTTRACK_TIMGEAR_GEAR0 0x00000000UL
#define	_MODEM_VTTRACK_TIMGEAR_GEAR1 0x00000001UL
#define	_MODEM_VTTRACK_TIMGEAR_GEAR2 0x00000002UL
#define	_MODEM_VTTRACK_TIMGEAR_MASK 0x30000UL
#define	_MODEM_VTTRACK_TIMGEAR_SHIFT 16
#define	_MODEM_VTTRACK_TIMTRACKTHD_DEFAULT 0x00000002UL
#define	_MODEM_VTTRACK_TIMTRACKTHD_MASK 0x3CUL
#define	_MODEM_VTTRACK_TIMTRACKTHD_SHIFT 2
#define	MODEM_AFC_AFCAVGPER_DEFAULT ( _MODEM_AFC_AFCAVGPER_DEFAULT << 21)
#define	MODEM_AFC_AFCDEL_DEFAULT ( _MODEM_AFC_AFCDEL_DEFAULT << 16)
#define	MODEM_AFC_AFCDELDET (0x1UL << 28)
#define	MODEM_AFC_AFCDELDET_DEFAULT ( _MODEM_AFC_AFCDELDET_DEFAULT << 28)
#define	MODEM_AFC_AFCDSAFREQOFFEST (0x1UL << 27)
#define	MODEM_AFC_AFCDSAFREQOFFEST_DEFAULT ( _MODEM_AFC_AFCDSAFREQOFFEST_DEFAULT << 27)
#define	MODEM_AFC_AFCENINTCOMP (0x1UL << 26)
#define	MODEM_AFC_AFCENINTCOMP_DEFAULT ( _MODEM_AFC_AFCENINTCOMP_DEFAULT << 26)
#define	MODEM_AFC_AFCLIMRESET (0x1UL << 24)
#define	MODEM_AFC_AFCLIMRESET_DEFAULT ( _MODEM_AFC_AFCLIMRESET_DEFAULT << 24)
#define	MODEM_AFC_AFCONESHOT (0x1UL << 25)
#define	MODEM_AFC_AFCONESHOT_DEFAULT ( _MODEM_AFC_AFCONESHOT_DEFAULT << 25)
#define	MODEM_AFC_AFCRXCLR (0x1UL << 15)
#define	MODEM_AFC_AFCRXCLR_DEFAULT ( _MODEM_AFC_AFCRXCLR_DEFAULT << 15)
#define	MODEM_AFC_AFCRXMODE_DEFAULT ( _MODEM_AFC_AFCRXMODE_DEFAULT << 10)
#define	MODEM_AFC_AFCRXMODE_DIS ( _MODEM_AFC_AFCRXMODE_DIS << 10)
#define	MODEM_AFC_AFCRXMODE_FRAMELOCK ( _MODEM_AFC_AFCRXMODE_FRAMELOCK << 10)
#define	MODEM_AFC_AFCRXMODE_FRAMELOCKPRESTART ( _MODEM_AFC_AFCRXMODE_FRAMELOCKPRESTART << 10)
#define	MODEM_AFC_AFCRXMODE_FREE ( _MODEM_AFC_AFCRXMODE_FREE << 10)
#define	MODEM_AFC_AFCRXMODE_FREEPRESTART ( _MODEM_AFC_AFCRXMODE_FREEPRESTART << 10)
#define	MODEM_AFC_AFCRXMODE_PRELOCK ( _MODEM_AFC_AFCRXMODE_PRELOCK << 10)
#define	MODEM_AFC_AFCRXMODE_TIMLOCK ( _MODEM_AFC_AFCRXMODE_TIMLOCK << 10)
#define	MODEM_AFC_AFCSCALEE_DEFAULT ( _MODEM_AFC_AFCSCALEE_DEFAULT << 5)
#define	MODEM_AFC_AFCSCALEM_DEFAULT ( _MODEM_AFC_AFCSCALEM_DEFAULT << 0)
#define	MODEM_AFC_AFCTXMODE_DEFAULT ( _MODEM_AFC_AFCTXMODE_DEFAULT << 13)
#define	MODEM_AFC_AFCTXMODE_DIS ( _MODEM_AFC_AFCTXMODE_DIS << 13)
#define	MODEM_AFC_AFCTXMODE_FRAMELOCK ( _MODEM_AFC_AFCTXMODE_FRAMELOCK << 13)
#define	MODEM_AFC_AFCTXMODE_PRELOCK ( _MODEM_AFC_AFCTXMODE_PRELOCK << 13)
#define	MODEM_AFCADJLIM_AFCADJLIM_DEFAULT ( _MODEM_AFCADJLIM_AFCADJLIM_DEFAULT << 0)
#define	MODEM_AFCADJRX_AFCADJRX_DEFAULT ( _MODEM_AFCADJRX_AFCADJRX_DEFAULT << 0)
#define	MODEM_AFCADJTX_AFCADJTX_DEFAULT ( _MODEM_AFCADJTX_AFCADJTX_DEFAULT << 0)
#define	MODEM_AUTOCG_AUTOCGEN_DEFAULT ( _MODEM_AUTOCG_AUTOCGEN_DEFAULT << 0)
#define	MODEM_BLEIQDSA_BLEIQDSADIFFTH1_DEFAULT ( _MODEM_BLEIQDSA_BLEIQDSADIFFTH1_DEFAULT << 18)
#define	MODEM_BLEIQDSA_BLEIQDSAEN (0x1UL << 0)
#define	MODEM_BLEIQDSA_BLEIQDSAEN_DEFAULT ( _MODEM_BLEIQDSA_BLEIQDSAEN_DEFAULT << 0)
#define	MODEM_BLEIQDSA_BLEIQDSAIIRCOEFPWR_DEFAULT ( _MODEM_BLEIQDSA_BLEIQDSAIIRCOEFPWR_DEFAULT << 15)
#define	MODEM_BLEIQDSA_BLEIQDSATH_DEFAULT ( _MODEM_BLEIQDSA_BLEIQDSATH_DEFAULT << 1)
#define	MODEM_BLEIQDSAEXT1_BLEIQDSAADDRBIAS_DEFAULT ( _MODEM_BLEIQDSAEXT1_BLEIQDSAADDRBIAS_DEFAULT << 7)
#define	MODEM_BLEIQDSAEXT1_BLEIQDSATHCOMB_DEFAULT ( _MODEM_BLEIQDSAEXT1_BLEIQDSATHCOMB_DEFAULT << 11)
#define	MODEM_BLEIQDSAEXT1_CHPWRFIRAVGEN (0x1UL << 2)
#define	MODEM_BLEIQDSAEXT1_CHPWRFIRAVGEN_DEFAULT ( _MODEM_BLEIQDSAEXT1_CHPWRFIRAVGEN_DEFAULT << 2)
#define	MODEM_BLEIQDSAEXT1_CHPWRFIRAVGVAL_AVG0 ( _MODEM_BLEIQDSAEXT1_CHPWRFIRAVGVAL_AVG0 << 3)
#define	MODEM_BLEIQDSAEXT1_CHPWRFIRAVGVAL_AVG2 ( _MODEM_BLEIQDSAEXT1_CHPWRFIRAVGVAL_AVG2 << 3)
#define	MODEM_BLEIQDSAEXT1_CHPWRFIRAVGVAL_AVG4 ( _MODEM_BLEIQDSAEXT1_CHPWRFIRAVGVAL_AVG4 << 3)
#define	MODEM_BLEIQDSAEXT1_CHPWRFIRAVGVAL_AVG8 ( _MODEM_BLEIQDSAEXT1_CHPWRFIRAVGVAL_AVG8 << 3)
#define	MODEM_BLEIQDSAEXT1_CHPWRFIRAVGVAL_DEFAULT ( _MODEM_BLEIQDSAEXT1_CHPWRFIRAVGVAL_DEFAULT << 3)
#define	MODEM_BLEIQDSAEXT1_CORRIIRAVGMULFACT_DEFAULT ( _MODEM_BLEIQDSAEXT1_CORRIIRAVGMULFACT_DEFAULT << 5)
#define	MODEM_BLEIQDSAEXT1_FREQSCALEIQDSA_DEFAULT ( _MODEM_BLEIQDSAEXT1_FREQSCALEIQDSA_DEFAULT << 0)
#define	MODEM_BLEIQDSAEXT1_IIRRST (0x1UL << 29)
#define	MODEM_BLEIQDSAEXT1_IIRRST_DEFAULT ( _MODEM_BLEIQDSAEXT1_IIRRST_DEFAULT << 29)
#define	MODEM_BLEIQDSAEXT1_MAXCORRCNTIQDSA_DEFAULT ( _MODEM_BLEIQDSAEXT1_MAXCORRCNTIQDSA_DEFAULT << 25)
#define	MODEM_BREST_BRESTINT_DEFAULT ( _MODEM_BREST_BRESTINT_DEFAULT << 0)
#define	MODEM_BREST_BRESTNUM_DEFAULT ( _MODEM_BREST_BRESTNUM_DEFAULT << 6)
#define	MODEM_CF_CFOSR_CF0 ( _MODEM_CF_CFOSR_CF0 << 23)
#define	MODEM_CF_CFOSR_CF12 ( _MODEM_CF_CFOSR_CF12 << 23)
#define	MODEM_CF_CFOSR_CF16 ( _MODEM_CF_CFOSR_CF16 << 23)
#define	MODEM_CF_CFOSR_CF32 ( _MODEM_CF_CFOSR_CF32 << 23)
#define	MODEM_CF_CFOSR_CF7 ( _MODEM_CF_CFOSR_CF7 << 23)
#define	MODEM_CF_CFOSR_CF8 ( _MODEM_CF_CFOSR_CF8 << 23)
#define	MODEM_CF_CFOSR_DEFAULT ( _MODEM_CF_CFOSR_DEFAULT << 23)
#define	MODEM_CF_DEC0_DEFAULT ( _MODEM_CF_DEC0_DEFAULT << 0)
#define	MODEM_CF_DEC0_DF3 ( _MODEM_CF_DEC0_DF3 << 0)
#define	MODEM_CF_DEC0_DF4NARROW ( _MODEM_CF_DEC0_DF4NARROW << 0)
#define	MODEM_CF_DEC0_DF4WIDE ( _MODEM_CF_DEC0_DF4WIDE << 0)
#define	MODEM_CF_DEC0_DF8NARROW ( _MODEM_CF_DEC0_DF8NARROW << 0)
#define	MODEM_CF_DEC0_DF8WIDE ( _MODEM_CF_DEC0_DF8WIDE << 0)
#define	MODEM_CF_DEC1_DEFAULT ( _MODEM_CF_DEC1_DEFAULT << 3)
#define	MODEM_CF_DEC1GAIN_ADD0 ( _MODEM_CF_DEC1GAIN_ADD0 << 26)
#define	MODEM_CF_DEC1GAIN_ADD12 ( _MODEM_CF_DEC1GAIN_ADD12 << 26)
#define	MODEM_CF_DEC1GAIN_ADD6 ( _MODEM_CF_DEC1GAIN_ADD6 << 26)
#define	MODEM_CF_DEC1GAIN_DEFAULT ( _MODEM_CF_DEC1GAIN_DEFAULT << 26)
#define	MODEM_CF_DEC2_DEFAULT ( _MODEM_CF_DEC2_DEFAULT << 17)
#define	MODEM_CGCLKSTOP_FORCEOFF_DEFAULT ( _MODEM_CGCLKSTOP_FORCEOFF_DEFAULT << 0)
#define	MODEM_CMD_AFCRXCLEAR (0x1UL << 5)
#define	MODEM_CMD_AFCRXCLEAR_DEFAULT ( _MODEM_CMD_AFCRXCLEAR_DEFAULT << 5)
#define	MODEM_CMD_AFCTXCLEAR (0x1UL << 4)
#define	MODEM_CMD_AFCTXCLEAR_DEFAULT ( _MODEM_CMD_AFCTXCLEAR_DEFAULT << 4)
#define	MODEM_CMD_AFCTXLOCK (0x1UL << 3)
#define	MODEM_CMD_AFCTXLOCK_DEFAULT ( _MODEM_CMD_AFCTXLOCK_DEFAULT << 3)
#define	MODEM_CMD_PRESTOP (0x1UL << 0)
#define	MODEM_CMD_PRESTOP_DEFAULT ( _MODEM_CMD_PRESTOP_DEFAULT << 0)
#define	MODEM_COH0_COHCHPWRTH0_DEFAULT ( _MODEM_COH0_COHCHPWRTH0_DEFAULT << 8)
#define	MODEM_COH0_COHCHPWRTH1_DEFAULT ( _MODEM_COH0_COHCHPWRTH1_DEFAULT << 16)
#define	MODEM_COH0_COHCHPWRTH2_DEFAULT ( _MODEM_COH0_COHCHPWRTH2_DEFAULT << 24)
#define	MODEM_COH0_COHDYNAMICBBSSEN (0x1UL << 0)
#define	MODEM_COH0_COHDYNAMICBBSSEN_DEFAULT ( _MODEM_COH0_COHDYNAMICBBSSEN_DEFAULT << 0)
#define	MODEM_COH0_COHDYNAMICPRETHRESH (0x1UL << 2)
#define	MODEM_COH0_COHDYNAMICPRETHRESH_DEFAULT ( _MODEM_COH0_COHDYNAMICPRETHRESH_DEFAULT << 2)
#define	MODEM_COH0_COHDYNAMICPRETHRESHSEL_DEFAULT ( _MODEM_COH0_COHDYNAMICPRETHRESHSEL_DEFAULT << 5)
#define	MODEM_COH0_COHDYNAMICPRETHRESHSEL_SEL0 ( _MODEM_COH0_COHDYNAMICPRETHRESHSEL_SEL0 << 5)
#define	MODEM_COH0_COHDYNAMICPRETHRESHSEL_SEL1 ( _MODEM_COH0_COHDYNAMICPRETHRESHSEL_SEL1 << 5)
#define	MODEM_COH0_COHDYNAMICPRETHRESHSEL_SEL2 ( _MODEM_COH0_COHDYNAMICPRETHRESHSEL_SEL2 << 5)
#define	MODEM_COH0_COHDYNAMICPRETHRESHSEL_SEL3 ( _MODEM_COH0_COHDYNAMICPRETHRESHSEL_SEL3 << 5)
#define	MODEM_COH0_COHDYNAMICPRETHRESHSEL_SEL4 ( _MODEM_COH0_COHDYNAMICPRETHRESHSEL_SEL4 << 5)
#define	MODEM_COH0_COHDYNAMICSYNCTHRESH (0x1UL << 1)
#define	MODEM_COH0_COHDYNAMICSYNCTHRESH_DEFAULT ( _MODEM_COH0_COHDYNAMICSYNCTHRESH_DEFAULT << 1)
#define	MODEM_COH1_SYNCTHRESH0_DEFAULT ( _MODEM_COH1_SYNCTHRESH0_DEFAULT << 0)
#define	MODEM_COH1_SYNCTHRESH1_DEFAULT ( _MODEM_COH1_SYNCTHRESH1_DEFAULT << 8)
#define	MODEM_COH1_SYNCTHRESH2_DEFAULT ( _MODEM_COH1_SYNCTHRESH2_DEFAULT << 16)
#define	MODEM_COH1_SYNCTHRESH3_DEFAULT ( _MODEM_COH1_SYNCTHRESH3_DEFAULT << 24)
#define	MODEM_COH2_DSAPEAKCHPWRTH_DEFAULT ( _MODEM_COH2_DSAPEAKCHPWRTH_DEFAULT << 16)
#define	MODEM_COH2_FIXEDCDTHFORIIR_DEFAULT ( _MODEM_COH2_FIXEDCDTHFORIIR_DEFAULT << 24)
#define	MODEM_COH2_SYNCTHRESHDELTA0_DEFAULT ( _MODEM_COH2_SYNCTHRESHDELTA0_DEFAULT << 0)
#define	MODEM_COH2_SYNCTHRESHDELTA1_DEFAULT ( _MODEM_COH2_SYNCTHRESHDELTA1_DEFAULT << 4)
#define	MODEM_COH2_SYNCTHRESHDELTA2_DEFAULT ( _MODEM_COH2_SYNCTHRESHDELTA2_DEFAULT << 8)
#define	MODEM_COH2_SYNCTHRESHDELTA3_DEFAULT ( _MODEM_COH2_SYNCTHRESHDELTA3_DEFAULT << 12)
#define	MODEM_COH3_CDSS_DEFAULT ( _MODEM_COH3_CDSS_DEFAULT << 11)
#define	MODEM_COH3_COHDSAADDWNDSIZE_DEFAULT ( _MODEM_COH3_COHDSAADDWNDSIZE_DEFAULT << 1)
#define	MODEM_COH3_COHDSADETDIS (0x1UL << 28)
#define	MODEM_COH3_COHDSADETDIS_DEFAULT ( _MODEM_COH3_COHDSADETDIS_DEFAULT << 28)
#define	MODEM_COH3_COHDSAEN (0x1UL << 0)
#define	MODEM_COH3_COHDSAEN_DEFAULT ( _MODEM_COH3_COHDSAEN_DEFAULT << 0)
#define	MODEM_COH3_DSAPEAKCHKEN (0x1UL << 14)
#define	MODEM_COH3_DSAPEAKCHKEN_DEFAULT ( _MODEM_COH3_DSAPEAKCHKEN_DEFAULT << 14)
#define	MODEM_COH3_DSAPEAKCHPWREN (0x1UL << 18)
#define	MODEM_COH3_DSAPEAKCHPWREN_DEFAULT ( _MODEM_COH3_DSAPEAKCHPWREN_DEFAULT << 18)
#define	MODEM_COH3_DSAPEAKINDLEN_DEFAULT ( _MODEM_COH3_DSAPEAKINDLEN_DEFAULT << 15)
#define	MODEM_COH3_DYNIIRCOEFOPTION_DEFAULT ( _MODEM_COH3_DYNIIRCOEFOPTION_DEFAULT << 20)
#define	MODEM_COH3_LOGICBASEDCOHDEMODGATE (0x1UL << 19)
#define	MODEM_COH3_LOGICBASEDCOHDEMODGATE_DEFAULT ( _MODEM_COH3_LOGICBASEDCOHDEMODGATE_DEFAULT << 19)
#define	MODEM_COH3_ONEPEAKQUALEN (0x1UL << 22)
#define	MODEM_COH3_ONEPEAKQUALEN_DEFAULT ( _MODEM_COH3_ONEPEAKQUALEN_DEFAULT << 22)
#define	MODEM_COH3_PEAKCHKTIMOUT_DEFAULT ( _MODEM_COH3_PEAKCHKTIMOUT_DEFAULT << 23)
#define	MODEM_CTRL0_CODING_DEFAULT ( _MODEM_CTRL0_CODING_DEFAULT << 4)
#define	MODEM_CTRL0_CODING_DSSS ( _MODEM_CTRL0_CODING_DSSS << 4)
#define	MODEM_CTRL0_CODING_LINECODE ( _MODEM_CTRL0_CODING_LINECODE << 4)
#define	MODEM_CTRL0_CODING_MANCHESTER ( _MODEM_CTRL0_CODING_MANCHESTER << 4)
#define	MODEM_CTRL0_CODING_NRZ ( _MODEM_CTRL0_CODING_NRZ << 4)
#define	MODEM_CTRL0_DEMODRAWDATASEL_ADC ( _MODEM_CTRL0_DEMODRAWDATASEL_ADC << 27)
#define	MODEM_CTRL0_DEMODRAWDATASEL_DEFAULT ( _MODEM_CTRL0_DEMODRAWDATASEL_DEFAULT << 27)
#define	MODEM_CTRL0_DEMODRAWDATASEL_DEMOD ( _MODEM_CTRL0_DEMODRAWDATASEL_DEMOD << 27)
#define	MODEM_CTRL0_DEMODRAWDATASEL_DIS ( _MODEM_CTRL0_DEMODRAWDATASEL_DIS << 27)
#define	MODEM_CTRL0_DEMODRAWDATASEL_ENTROPY ( _MODEM_CTRL0_DEMODRAWDATASEL_ENTROPY << 27)
#define	MODEM_CTRL0_DEMODRAWDATASEL_FILTFULL ( _MODEM_CTRL0_DEMODRAWDATASEL_FILTFULL << 27)
#define	MODEM_CTRL0_DEMODRAWDATASEL_FILTLSB ( _MODEM_CTRL0_DEMODRAWDATASEL_FILTLSB << 27)
#define	MODEM_CTRL0_DEMODRAWDATASEL_FILTMSB ( _MODEM_CTRL0_DEMODRAWDATASEL_FILTMSB << 27)
#define	MODEM_CTRL0_DEMODRAWDATASEL_FREQ ( _MODEM_CTRL0_DEMODRAWDATASEL_FREQ << 27)
#define	MODEM_CTRL0_DETDIS (0x1UL << 21)
#define	MODEM_CTRL0_DETDIS_DEFAULT ( _MODEM_CTRL0_DETDIS_DEFAULT << 21)
#define	MODEM_CTRL0_DIFFENCMODE_DEFAULT ( _MODEM_CTRL0_DIFFENCMODE_DEFAULT << 22)
#define	MODEM_CTRL0_DIFFENCMODE_DIS ( _MODEM_CTRL0_DIFFENCMODE_DIS << 22)
#define	MODEM_CTRL0_DIFFENCMODE_RE0 ( _MODEM_CTRL0_DIFFENCMODE_RE0 << 22)
#define	MODEM_CTRL0_DIFFENCMODE_RE1 ( _MODEM_CTRL0_DIFFENCMODE_RE1 << 22)
#define	MODEM_CTRL0_DIFFENCMODE_RR0 ( _MODEM_CTRL0_DIFFENCMODE_RR0 << 22)
#define	MODEM_CTRL0_DIFFENCMODE_RR1 ( _MODEM_CTRL0_DIFFENCMODE_RR1 << 22)
#define	MODEM_CTRL0_DSSSDOUBLE_CONJ ( _MODEM_CTRL0_DSSSDOUBLE_CONJ << 19)
#define	MODEM_CTRL0_DSSSDOUBLE_DEFAULT ( _MODEM_CTRL0_DSSSDOUBLE_DEFAULT << 19)
#define	MODEM_CTRL0_DSSSDOUBLE_DIS ( _MODEM_CTRL0_DSSSDOUBLE_DIS << 19)
#define	MODEM_CTRL0_DSSSDOUBLE_INV ( _MODEM_CTRL0_DSSSDOUBLE_INV << 19)
#define	MODEM_CTRL0_DSSSLEN_DEFAULT ( _MODEM_CTRL0_DSSSLEN_DEFAULT << 11)
#define	MODEM_CTRL0_DSSSSHIFTS_DEFAULT ( _MODEM_CTRL0_DSSSSHIFTS_DEFAULT << 16)
#define	MODEM_CTRL0_DSSSSHIFTS_NOSHIFT ( _MODEM_CTRL0_DSSSSHIFTS_NOSHIFT << 16)
#define	MODEM_CTRL0_DSSSSHIFTS_SHIFT1 ( _MODEM_CTRL0_DSSSSHIFTS_SHIFT1 << 16)
#define	MODEM_CTRL0_DSSSSHIFTS_SHIFT16 ( _MODEM_CTRL0_DSSSSHIFTS_SHIFT16 << 16)
#define	MODEM_CTRL0_DSSSSHIFTS_SHIFT2 ( _MODEM_CTRL0_DSSSSHIFTS_SHIFT2 << 16)
#define	MODEM_CTRL0_DSSSSHIFTS_SHIFT4 ( _MODEM_CTRL0_DSSSSHIFTS_SHIFT4 << 16)
#define	MODEM_CTRL0_DSSSSHIFTS_SHIFT8 ( _MODEM_CTRL0_DSSSSHIFTS_SHIFT8 << 16)
#define	MODEM_CTRL0_DUALCORROPTDIS (0x1UL << 9)
#define	MODEM_CTRL0_DUALCORROPTDIS_DEFAULT ( _MODEM_CTRL0_DUALCORROPTDIS_DEFAULT << 9)
#define	MODEM_CTRL0_FDM0DIFFDIS (0x1UL << 0)
#define	MODEM_CTRL0_FDM0DIFFDIS_DEFAULT ( _MODEM_CTRL0_FDM0DIFFDIS_DEFAULT << 0)
#define	MODEM_CTRL0_FRAMEDETDEL_DEFAULT ( _MODEM_CTRL0_FRAMEDETDEL_DEFAULT << 30)
#define	MODEM_CTRL0_FRAMEDETDEL_DEL0 ( _MODEM_CTRL0_FRAMEDETDEL_DEL0 << 30)
#define	MODEM_CTRL0_FRAMEDETDEL_DEL16 ( _MODEM_CTRL0_FRAMEDETDEL_DEL16 << 30)
#define	MODEM_CTRL0_FRAMEDETDEL_DEL32 ( _MODEM_CTRL0_FRAMEDETDEL_DEL32 << 30)
#define	MODEM_CTRL0_FRAMEDETDEL_DEL8 ( _MODEM_CTRL0_FRAMEDETDEL_DEL8 << 30)
#define	MODEM_CTRL0_MAPFSK_DEFAULT ( _MODEM_CTRL0_MAPFSK_DEFAULT << 1)
#define	MODEM_CTRL0_MAPFSK_MAP0 ( _MODEM_CTRL0_MAPFSK_MAP0 << 1)
#define	MODEM_CTRL0_MAPFSK_MAP1 ( _MODEM_CTRL0_MAPFSK_MAP1 << 1)
#define	MODEM_CTRL0_MAPFSK_MAP2 ( _MODEM_CTRL0_MAPFSK_MAP2 << 1)
#define	MODEM_CTRL0_MAPFSK_MAP3 ( _MODEM_CTRL0_MAPFSK_MAP3 << 1)
#define	MODEM_CTRL0_MAPFSK_MAP4 ( _MODEM_CTRL0_MAPFSK_MAP4 << 1)
#define	MODEM_CTRL0_MAPFSK_MAP5 ( _MODEM_CTRL0_MAPFSK_MAP5 << 1)
#define	MODEM_CTRL0_MAPFSK_MAP6 ( _MODEM_CTRL0_MAPFSK_MAP6 << 1)
#define	MODEM_CTRL0_MAPFSK_MAP7 ( _MODEM_CTRL0_MAPFSK_MAP7 << 1)
#define	MODEM_CTRL0_MODFORMAT_BPSK ( _MODEM_CTRL0_MODFORMAT_BPSK << 6)
#define	MODEM_CTRL0_MODFORMAT_DBPSK ( _MODEM_CTRL0_MODFORMAT_DBPSK << 6)
#define	MODEM_CTRL0_MODFORMAT_DEFAULT ( _MODEM_CTRL0_MODFORMAT_DEFAULT << 6)
#define	MODEM_CTRL0_MODFORMAT_FSK2 ( _MODEM_CTRL0_MODFORMAT_FSK2 << 6)
#define	MODEM_CTRL0_MODFORMAT_FSK4 ( _MODEM_CTRL0_MODFORMAT_FSK4 << 6)
#define	MODEM_CTRL0_MODFORMAT_MSK ( _MODEM_CTRL0_MODFORMAT_MSK << 6)
#define	MODEM_CTRL0_MODFORMAT_OOKASK ( _MODEM_CTRL0_MODFORMAT_OOKASK << 6)
#define	MODEM_CTRL0_MODFORMAT_OQPSK ( _MODEM_CTRL0_MODFORMAT_OQPSK << 6)
#define	MODEM_CTRL0_OOKASYNCPIN (0x1UL << 10)
#define	MODEM_CTRL0_OOKASYNCPIN_DEFAULT ( _MODEM_CTRL0_OOKASYNCPIN_DEFAULT << 10)
#define	MODEM_CTRL0_SHAPING_ASYMMETRIC ( _MODEM_CTRL0_SHAPING_ASYMMETRIC << 25)
#define	MODEM_CTRL0_SHAPING_DEFAULT ( _MODEM_CTRL0_SHAPING_DEFAULT << 25)
#define	MODEM_CTRL0_SHAPING_DISABLED ( _MODEM_CTRL0_SHAPING_DISABLED << 25)
#define	MODEM_CTRL0_SHAPING_EVENLENGTH ( _MODEM_CTRL0_SHAPING_EVENLENGTH << 25)
#define	MODEM_CTRL0_SHAPING_ODDLENGTH ( _MODEM_CTRL0_SHAPING_ODDLENGTH << 25)
#define	MODEM_CTRL1_COMPMODE_DEFAULT ( _MODEM_CTRL1_COMPMODE_DEFAULT << 14)
#define	MODEM_CTRL1_COMPMODE_DIS ( _MODEM_CTRL1_COMPMODE_DIS << 14)
#define	MODEM_CTRL1_COMPMODE_FRAMELOCK ( _MODEM_CTRL1_COMPMODE_FRAMELOCK << 14)
#define	MODEM_CTRL1_COMPMODE_NOLOCK ( _MODEM_CTRL1_COMPMODE_NOLOCK << 14)
#define	MODEM_CTRL1_COMPMODE_PRELOCK ( _MODEM_CTRL1_COMPMODE_PRELOCK << 14)
#define	MODEM_CTRL1_DUALSYNC (0x1UL << 9)
#define	MODEM_CTRL1_DUALSYNC_DEFAULT ( _MODEM_CTRL1_DUALSYNC_DEFAULT << 9)
#define	MODEM_CTRL1_DUALSYNC_DISABLED ( _MODEM_CTRL1_DUALSYNC_DISABLED << 9)
#define	MODEM_CTRL1_DUALSYNC_ENABLED ( _MODEM_CTRL1_DUALSYNC_ENABLED << 9)
#define	MODEM_CTRL1_FREQOFFESTLIM_DEFAULT ( _MODEM_CTRL1_FREQOFFESTLIM_DEFAULT << 25)
#define	MODEM_CTRL1_FREQOFFESTPER_DEFAULT ( _MODEM_CTRL1_FREQOFFESTPER_DEFAULT << 22)
#define	MODEM_CTRL1_PHASEDEMOD_BDD ( _MODEM_CTRL1_PHASEDEMOD_BDD << 20)
#define	MODEM_CTRL1_PHASEDEMOD_COH ( _MODEM_CTRL1_PHASEDEMOD_COH << 20)
#define	MODEM_CTRL1_PHASEDEMOD_DEFAULT ( _MODEM_CTRL1_PHASEDEMOD_DEFAULT << 20)
#define	MODEM_CTRL1_PHASEDEMOD_MBDD ( _MODEM_CTRL1_PHASEDEMOD_MBDD << 20)
#define	MODEM_CTRL1_RESYNCPER_DEFAULT ( _MODEM_CTRL1_RESYNCPER_DEFAULT << 16)
#define	MODEM_CTRL1_SYNC1INV (0x1UL << 12)
#define	MODEM_CTRL1_SYNC1INV_DEFAULT ( _MODEM_CTRL1_SYNC1INV_DEFAULT << 12)
#define	MODEM_CTRL1_SYNCBITS_DEFAULT ( _MODEM_CTRL1_SYNCBITS_DEFAULT << 0)
#define	MODEM_CTRL1_SYNCDATA (0x1UL << 11)
#define	MODEM_CTRL1_SYNCDATA_DEFAULT ( _MODEM_CTRL1_SYNCDATA_DEFAULT << 11)
#define	MODEM_CTRL1_SYNCDATA_DISABLED ( _MODEM_CTRL1_SYNCDATA_DISABLED << 11)
#define	MODEM_CTRL1_SYNCDATA_ENABLED ( _MODEM_CTRL1_SYNCDATA_ENABLED << 11)
#define	MODEM_CTRL1_SYNCERRORS_DEFAULT ( _MODEM_CTRL1_SYNCERRORS_DEFAULT << 5)
#define	MODEM_CTRL1_TXSYNC (0x1UL << 10)
#define	MODEM_CTRL1_TXSYNC_DEFAULT ( _MODEM_CTRL1_TXSYNC_DEFAULT << 10)
#define	MODEM_CTRL1_TXSYNC_SYNC0 ( _MODEM_CTRL1_TXSYNC_SYNC0 << 10)
#define	MODEM_CTRL1_TXSYNC_SYNC1 ( _MODEM_CTRL1_TXSYNC_SYNC1 << 10)
#define	MODEM_CTRL2_BRDIVA_DEFAULT ( _MODEM_CTRL2_BRDIVA_DEFAULT << 15)
#define	MODEM_CTRL2_BRDIVB_DEFAULT ( _MODEM_CTRL2_BRDIVB_DEFAULT << 19)
#define	MODEM_CTRL2_DATAFILTER_DEFAULT ( _MODEM_CTRL2_DATAFILTER_DEFAULT << 12)
#define	MODEM_CTRL2_DATAFILTER_DISABLED ( _MODEM_CTRL2_DATAFILTER_DISABLED << 12)
#define	MODEM_CTRL2_DATAFILTER_LEN6 ( _MODEM_CTRL2_DATAFILTER_LEN6 << 12)
#define	MODEM_CTRL2_DATAFILTER_LEN7 ( _MODEM_CTRL2_DATAFILTER_LEN7 << 12)
#define	MODEM_CTRL2_DATAFILTER_LEN8 ( _MODEM_CTRL2_DATAFILTER_LEN8 << 12)
#define	MODEM_CTRL2_DATAFILTER_LEN9 ( _MODEM_CTRL2_DATAFILTER_LEN9 << 12)
#define	MODEM_CTRL2_DATAFILTER_LONG ( _MODEM_CTRL2_DATAFILTER_LONG << 12)
#define	MODEM_CTRL2_DATAFILTER_MEDIUM ( _MODEM_CTRL2_DATAFILTER_MEDIUM << 12)
#define	MODEM_CTRL2_DATAFILTER_SHORT ( _MODEM_CTRL2_DATAFILTER_SHORT << 12)
#define	MODEM_CTRL2_DEVMULA_DEFAULT ( _MODEM_CTRL2_DEVMULA_DEFAULT << 23)
#define	MODEM_CTRL2_DEVMULB_DEFAULT ( _MODEM_CTRL2_DEVMULB_DEFAULT << 25)
#define	MODEM_CTRL2_DEVWEIGHTDIS (0x1UL << 29)
#define	MODEM_CTRL2_DEVWEIGHTDIS_DEFAULT ( _MODEM_CTRL2_DEVWEIGHTDIS_DEFAULT << 29)
#define	MODEM_CTRL2_DMASEL_CORR ( _MODEM_CTRL2_DMASEL_CORR << 30)
#define	MODEM_CTRL2_DMASEL_DEFAULT ( _MODEM_CTRL2_DMASEL_DEFAULT << 30)
#define	MODEM_CTRL2_DMASEL_FREQOFFEST ( _MODEM_CTRL2_DMASEL_FREQOFFEST << 30)
#define	MODEM_CTRL2_DMASEL_POE ( _MODEM_CTRL2_DMASEL_POE << 30)
#define	MODEM_CTRL2_DMASEL_SOFT ( _MODEM_CTRL2_DMASEL_SOFT << 30)
#define	MODEM_CTRL2_RATESELMODE_DEFAULT ( _MODEM_CTRL2_RATESELMODE_DEFAULT << 27)
#define	MODEM_CTRL2_RATESELMODE_FRC ( _MODEM_CTRL2_RATESELMODE_FRC << 27)
#define	MODEM_CTRL2_RATESELMODE_NOCHANGE ( _MODEM_CTRL2_RATESELMODE_NOCHANGE << 27)
#define	MODEM_CTRL2_RATESELMODE_PAYLOAD ( _MODEM_CTRL2_RATESELMODE_PAYLOAD << 27)
#define	MODEM_CTRL2_RATESELMODE_SYNC ( _MODEM_CTRL2_RATESELMODE_SYNC << 27)
#define	MODEM_CTRL2_RXFRCDIS (0x1UL << 8)
#define	MODEM_CTRL2_RXFRCDIS_DEFAULT ( _MODEM_CTRL2_RXFRCDIS_DEFAULT << 8)
#define	MODEM_CTRL2_RXPINMODE (0x1UL << 9)
#define	MODEM_CTRL2_RXPINMODE_ASYNCHRONOUS ( _MODEM_CTRL2_RXPINMODE_ASYNCHRONOUS << 9)
#define	MODEM_CTRL2_RXPINMODE_DEFAULT ( _MODEM_CTRL2_RXPINMODE_DEFAULT << 9)
#define	MODEM_CTRL2_RXPINMODE_SYNCHRONOUS ( _MODEM_CTRL2_RXPINMODE_SYNCHRONOUS << 9)
#define	MODEM_CTRL2_SQITHRESH_DEFAULT ( _MODEM_CTRL2_SQITHRESH_DEFAULT << 0)
#define	MODEM_CTRL2_TXPINMODE_ASYNCHRONOUS ( _MODEM_CTRL2_TXPINMODE_ASYNCHRONOUS << 10)
#define	MODEM_CTRL2_TXPINMODE_DEFAULT ( _MODEM_CTRL2_TXPINMODE_DEFAULT << 10)
#define	MODEM_CTRL2_TXPINMODE_OFF ( _MODEM_CTRL2_TXPINMODE_OFF << 10)
#define	MODEM_CTRL2_TXPINMODE_SYNCHRONOUS ( _MODEM_CTRL2_TXPINMODE_SYNCHRONOUS << 10)
#define	MODEM_CTRL2_TXPINMODE_UNUSED ( _MODEM_CTRL2_TXPINMODE_UNUSED << 10)
#define	MODEM_CTRL3_ANTDIVMODE_ANTENNA0 ( _MODEM_CTRL3_ANTDIVMODE_ANTENNA0 << 8)
#define	MODEM_CTRL3_ANTDIVMODE_ANTENNA1 ( _MODEM_CTRL3_ANTDIVMODE_ANTENNA1 << 8)
#define	MODEM_CTRL3_ANTDIVMODE_ANTSELCORR ( _MODEM_CTRL3_ANTDIVMODE_ANTSELCORR << 8)
#define	MODEM_CTRL3_ANTDIVMODE_ANTSELFIRST ( _MODEM_CTRL3_ANTDIVMODE_ANTSELFIRST << 8)
#define	MODEM_CTRL3_ANTDIVMODE_ANTSELRSSI ( _MODEM_CTRL3_ANTDIVMODE_ANTSELRSSI << 8)
#define	MODEM_CTRL3_ANTDIVMODE_DEFAULT ( _MODEM_CTRL3_ANTDIVMODE_DEFAULT << 8)
#define	MODEM_CTRL3_ANTDIVREPEATDIS (0x1UL << 11)
#define	MODEM_CTRL3_ANTDIVREPEATDIS_DEFAULT ( _MODEM_CTRL3_ANTDIVREPEATDIS_DEFAULT << 11)
#define	MODEM_CTRL3_PRSDINEN (0x1UL << 0)
#define	MODEM_CTRL3_PRSDINEN_DEFAULT ( _MODEM_CTRL3_PRSDINEN_DEFAULT << 0)
#define	MODEM_CTRL3_TSAMPDEL_DEFAULT ( _MODEM_CTRL3_TSAMPDEL_DEFAULT << 14)
#define	MODEM_CTRL3_TSAMPLIM_DEFAULT ( _MODEM_CTRL3_TSAMPLIM_DEFAULT << 16)
#define	MODEM_CTRL3_TSAMPMODE_DEFAULT ( _MODEM_CTRL3_TSAMPMODE_DEFAULT << 12)
#define	MODEM_CTRL3_TSAMPMODE_DIFF ( _MODEM_CTRL3_TSAMPMODE_DIFF << 12)
#define	MODEM_CTRL3_TSAMPMODE_OFF ( _MODEM_CTRL3_TSAMPMODE_OFF << 12)
#define	MODEM_CTRL3_TSAMPMODE_ON ( _MODEM_CTRL3_TSAMPMODE_ON << 12)
#define	MODEM_CTRL4_ADCSATDENS_DEFAULT ( _MODEM_CTRL4_ADCSATDENS_DEFAULT << 26)
#define	MODEM_CTRL4_ADCSATLEVEL_CONS1 ( _MODEM_CTRL4_ADCSATLEVEL_CONS1 << 23)
#define	MODEM_CTRL4_ADCSATLEVEL_CONS16 ( _MODEM_CTRL4_ADCSATLEVEL_CONS16 << 23)
#define	MODEM_CTRL4_ADCSATLEVEL_CONS2 ( _MODEM_CTRL4_ADCSATLEVEL_CONS2 << 23)
#define	MODEM_CTRL4_ADCSATLEVEL_CONS32 ( _MODEM_CTRL4_ADCSATLEVEL_CONS32 << 23)
#define	MODEM_CTRL4_ADCSATLEVEL_CONS4 ( _MODEM_CTRL4_ADCSATLEVEL_CONS4 << 23)
#define	MODEM_CTRL4_ADCSATLEVEL_CONS64 ( _MODEM_CTRL4_ADCSATLEVEL_CONS64 << 23)
#define	MODEM_CTRL4_ADCSATLEVEL_CONS8 ( _MODEM_CTRL4_ADCSATLEVEL_CONS8 << 23)
#define	MODEM_CTRL4_ADCSATLEVEL_DEFAULT ( _MODEM_CTRL4_ADCSATLEVEL_DEFAULT << 23)
#define	MODEM_CTRL4_DEVOFFCOMP (0x1UL << 4)
#define	MODEM_CTRL4_DEVOFFCOMP_DEFAULT ( _MODEM_CTRL4_DEVOFFCOMP_DEFAULT << 4)
#define	MODEM_CTRL4_ISICOMP_DEFAULT ( _MODEM_CTRL4_ISICOMP_DEFAULT << 0)
#define	MODEM_CTRL4_OFFSETPHASEMASKING (0x1UL << 28)
#define	MODEM_CTRL4_OFFSETPHASEMASKING_DEFAULT ( _MODEM_CTRL4_OFFSETPHASEMASKING_DEFAULT << 28)
#define	MODEM_CTRL4_OFFSETPHASESCALING (0x1UL << 29)
#define	MODEM_CTRL4_OFFSETPHASESCALING_DEFAULT ( _MODEM_CTRL4_OFFSETPHASESCALING_DEFAULT << 29)
#define	MODEM_CTRL4_PHASECLICKFILT_DEFAULT ( _MODEM_CTRL4_PHASECLICKFILT_DEFAULT << 15)
#define	MODEM_CTRL4_PREDISTAVG (0x1UL << 13)
#define	MODEM_CTRL4_PREDISTAVG_AVG16 ( _MODEM_CTRL4_PREDISTAVG_AVG16 << 13)
#define	MODEM_CTRL4_PREDISTAVG_AVG8 ( _MODEM_CTRL4_PREDISTAVG_AVG8 << 13)
#define	MODEM_CTRL4_PREDISTAVG_DEFAULT ( _MODEM_CTRL4_PREDISTAVG_DEFAULT << 13)
#define	MODEM_CTRL4_PREDISTDEB_DEFAULT ( _MODEM_CTRL4_PREDISTDEB_DEFAULT << 10)
#define	MODEM_CTRL4_PREDISTGAIN_DEFAULT ( _MODEM_CTRL4_PREDISTGAIN_DEFAULT << 5)
#define	MODEM_CTRL4_PREDISTRST (0x1UL << 14)
#define	MODEM_CTRL4_PREDISTRST_DEFAULT ( _MODEM_CTRL4_PREDISTRST_DEFAULT << 14)
#define	MODEM_CTRL4_SOFTDSSSMODE (0x1UL << 22)
#define	MODEM_CTRL4_SOFTDSSSMODE_CORR0INV ( _MODEM_CTRL4_SOFTDSSSMODE_CORR0INV << 22)
#define	MODEM_CTRL4_SOFTDSSSMODE_CORRDIFF ( _MODEM_CTRL4_SOFTDSSSMODE_CORRDIFF << 22)
#define	MODEM_CTRL4_SOFTDSSSMODE_DEFAULT ( _MODEM_CTRL4_SOFTDSSSMODE_DEFAULT << 22)
#define	MODEM_CTRL5_BBSS_DEFAULT ( _MODEM_CTRL5_BBSS_DEFAULT << 12)
#define	MODEM_CTRL5_BRCALAVG_DEFAULT ( _MODEM_CTRL5_BRCALAVG_DEFAULT << 4)
#define	MODEM_CTRL5_BRCALEN (0x1UL << 1)
#define	MODEM_CTRL5_BRCALEN_DEFAULT ( _MODEM_CTRL5_BRCALEN_DEFAULT << 1)
#define	MODEM_CTRL5_BRCALMODE_DEFAULT ( _MODEM_CTRL5_BRCALMODE_DEFAULT << 2)
#define	MODEM_CTRL5_BRCALMODE_PEAK ( _MODEM_CTRL5_BRCALMODE_PEAK << 2)
#define	MODEM_CTRL5_BRCALMODE_PEAKZERO ( _MODEM_CTRL5_BRCALMODE_PEAKZERO << 2)
#define	MODEM_CTRL5_BRCALMODE_ZERO ( _MODEM_CTRL5_BRCALMODE_ZERO << 2)
#define	MODEM_CTRL5_DEMODRAWDATASEL2_BBPF ( _MODEM_CTRL5_DEMODRAWDATASEL2_BBPF << 20)
#define	MODEM_CTRL5_DEMODRAWDATASEL2_CHPW ( _MODEM_CTRL5_DEMODRAWDATASEL2_CHPW << 20)
#define	MODEM_CTRL5_DEMODRAWDATASEL2_COH ( _MODEM_CTRL5_DEMODRAWDATASEL2_COH << 20)
#define	MODEM_CTRL5_DEMODRAWDATASEL2_CORR ( _MODEM_CTRL5_DEMODRAWDATASEL2_CORR << 20)
#define	MODEM_CTRL5_DEMODRAWDATASEL2_DEFAULT ( _MODEM_CTRL5_DEMODRAWDATASEL2_DEFAULT << 20)
#define	MODEM_CTRL5_DEMODRAWDATASEL2_DIS ( _MODEM_CTRL5_DEMODRAWDATASEL2_DIS << 20)
#define	MODEM_CTRL5_DEMODRAWDATASEL2_FSM ( _MODEM_CTRL5_DEMODRAWDATASEL2_FSM << 20)
#define	MODEM_CTRL5_DETDEL_DEFAULT ( _MODEM_CTRL5_DETDEL_DEFAULT << 6)
#define	MODEM_CTRL5_DSSSCTD (0x1UL << 11)
#define	MODEM_CTRL5_DSSSCTD_DEFAULT ( _MODEM_CTRL5_DSSSCTD_DEFAULT << 11)
#define	MODEM_CTRL5_FOEPREAVG_DEFAULT ( _MODEM_CTRL5_FOEPREAVG_DEFAULT << 24)
#define	MODEM_CTRL5_LINCORR (0x1UL << 27)
#define	MODEM_CTRL5_LINCORR_DEFAULT ( _MODEM_CTRL5_LINCORR_DEFAULT << 27)
#define	MODEM_CTRL5_POEPER_DEFAULT ( _MODEM_CTRL5_POEPER_DEFAULT << 16)
#define	MODEM_CTRL5_RESYNCBAUDTRANS (0x1UL << 29)
#define	MODEM_CTRL5_RESYNCBAUDTRANS_DEFAULT ( _MODEM_CTRL5_RESYNCBAUDTRANS_DEFAULT << 29)
#define	MODEM_CTRL5_RESYNCLIMIT (0x1UL << 30)
#define	MODEM_CTRL5_RESYNCLIMIT_ALWAYS ( _MODEM_CTRL5_RESYNCLIMIT_ALWAYS << 30)
#define	MODEM_CTRL5_RESYNCLIMIT_DEFAULT ( _MODEM_CTRL5_RESYNCLIMIT_DEFAULT << 30)
#define	MODEM_CTRL5_RESYNCLIMIT_HALF ( _MODEM_CTRL5_RESYNCLIMIT_HALF << 30)
#define	MODEM_CTRL5_TDEDGE (0x1UL << 9)
#define	MODEM_CTRL5_TDEDGE_DEFAULT ( _MODEM_CTRL5_TDEDGE_DEFAULT << 9)
#define	MODEM_CTRL5_TREDGE (0x1UL << 10)
#define	MODEM_CTRL5_TREDGE_DEFAULT ( _MODEM_CTRL5_TREDGE_DEFAULT << 10)
#define	MODEM_CTRL6_ARW_ALWAYS ( _MODEM_CTRL6_ARW_ALWAYS << 15)
#define	MODEM_CTRL6_ARW_DEFAULT ( _MODEM_CTRL6_ARW_DEFAULT << 15)
#define	MODEM_CTRL6_ARW_NEVER ( _MODEM_CTRL6_ARW_NEVER << 15)
#define	MODEM_CTRL6_ARW_PSABORT ( _MODEM_CTRL6_ARW_PSABORT << 15)
#define	MODEM_CTRL6_ARW_SMALLWND ( _MODEM_CTRL6_ARW_SMALLWND << 15)
#define	MODEM_CTRL6_CODINGB_DEFAULT ( _MODEM_CTRL6_CODINGB_DEFAULT << 25)
#define	MODEM_CTRL6_CODINGB_DSSS ( _MODEM_CTRL6_CODINGB_DSSS << 25)
#define	MODEM_CTRL6_CODINGB_LINECODE ( _MODEM_CTRL6_CODINGB_LINECODE << 25)
#define	MODEM_CTRL6_CODINGB_MANCHESTER ( _MODEM_CTRL6_CODINGB_MANCHESTER << 25)
#define	MODEM_CTRL6_CODINGB_NRZ ( _MODEM_CTRL6_CODINGB_NRZ << 25)
#define	MODEM_CTRL6_CPLXCORREN (0x1UL << 20)
#define	MODEM_CTRL6_CPLXCORREN_DEFAULT ( _MODEM_CTRL6_CPLXCORREN_DEFAULT << 20)
#define	MODEM_CTRL6_DSSS3SYMBOLSYNCEN (0x1UL << 21)
#define	MODEM_CTRL6_DSSS3SYMBOLSYNCEN_DEFAULT ( _MODEM_CTRL6_DSSS3SYMBOLSYNCEN_DEFAULT << 21)
#define	MODEM_CTRL6_PREBASES_DEFAULT ( _MODEM_CTRL6_PREBASES_DEFAULT << 7)
#define	MODEM_CTRL6_PSTIMABORT0 (0x1UL << 11)
#define	MODEM_CTRL6_PSTIMABORT0_DEFAULT ( _MODEM_CTRL6_PSTIMABORT0_DEFAULT << 11)
#define	MODEM_CTRL6_PSTIMABORT1 (0x1UL << 12)
#define	MODEM_CTRL6_PSTIMABORT1_DEFAULT ( _MODEM_CTRL6_PSTIMABORT1_DEFAULT << 12)
#define	MODEM_CTRL6_PSTIMABORT2 (0x1UL << 13)
#define	MODEM_CTRL6_PSTIMABORT2_DEFAULT ( _MODEM_CTRL6_PSTIMABORT2_DEFAULT << 13)
#define	MODEM_CTRL6_PSTIMABORT3 (0x1UL << 14)
#define	MODEM_CTRL6_PSTIMABORT3_DEFAULT ( _MODEM_CTRL6_PSTIMABORT3_DEFAULT << 14)
#define	MODEM_CTRL6_RXBRCALCDIS (0x1UL << 30)
#define	MODEM_CTRL6_RXBRCALCDIS_DEFAULT ( _MODEM_CTRL6_RXBRCALCDIS_DEFAULT << 30)
#define	MODEM_CTRL6_TDREW_DEFAULT ( _MODEM_CTRL6_TDREW_DEFAULT << 0)
#define	MODEM_CTRL6_TIMTHRESHGAIN_DEFAULT ( _MODEM_CTRL6_TIMTHRESHGAIN_DEFAULT << 17)
#define	MODEM_DCCOMP_DCCOMPEN (0x1UL << 1)
#define	MODEM_DCCOMP_DCCOMPEN_DEFAULT ( _MODEM_DCCOMP_DCCOMPEN_DEFAULT << 1)
#define	MODEM_DCCOMP_DCCOMPFREEZE (0x1UL << 3)
#define	MODEM_DCCOMP_DCCOMPFREEZE_DEFAULT ( _MODEM_DCCOMP_DCCOMPFREEZE_DEFAULT << 3)
#define	MODEM_DCCOMP_DCCOMPGEAR_DEFAULT ( _MODEM_DCCOMP_DCCOMPGEAR_DEFAULT << 4)
#define	MODEM_DCCOMP_DCESTIEN (0x1UL << 0)
#define	MODEM_DCCOMP_DCESTIEN_DEFAULT ( _MODEM_DCCOMP_DCESTIEN_DEFAULT << 0)
#define	MODEM_DCCOMP_DCLIMIT_DEFAULT ( _MODEM_DCCOMP_DCLIMIT_DEFAULT << 7)
#define	MODEM_DCCOMP_DCLIMIT_FULLSCALE ( _MODEM_DCCOMP_DCLIMIT_FULLSCALE << 7)
#define	MODEM_DCCOMP_DCLIMIT_FULLSCALEBY16 ( _MODEM_DCCOMP_DCLIMIT_FULLSCALEBY16 << 7)
#define	MODEM_DCCOMP_DCLIMIT_FULLSCALEBY4 ( _MODEM_DCCOMP_DCLIMIT_FULLSCALEBY4 << 7)
#define	MODEM_DCCOMP_DCLIMIT_FULLSCALEBY8 ( _MODEM_DCCOMP_DCLIMIT_FULLSCALEBY8 << 7)
#define	MODEM_DCCOMP_DCRSTEN (0x1UL << 2)
#define	MODEM_DCCOMP_DCRSTEN_DEFAULT ( _MODEM_DCCOMP_DCRSTEN_DEFAULT << 2)
#define	MODEM_DCCOMPFILTINIT_DCCOMPINIT (0x1UL << 30)
#define	MODEM_DCCOMPFILTINIT_DCCOMPINIT_DEFAULT ( _MODEM_DCCOMPFILTINIT_DCCOMPINIT_DEFAULT << 30)
#define	MODEM_DCCOMPFILTINIT_DCCOMPINITVALI_DEFAULT ( _MODEM_DCCOMPFILTINIT_DCCOMPINITVALI_DEFAULT << 0)
#define	MODEM_DCCOMPFILTINIT_DCCOMPINITVALQ_DEFAULT ( _MODEM_DCCOMPFILTINIT_DCCOMPINITVALQ_DEFAULT << 15)
#define	MODEM_DCESTI_DCCOMPESTIVALI_DEFAULT ( _MODEM_DCESTI_DCCOMPESTIVALI_DEFAULT << 0)
#define	MODEM_DCESTI_DCCOMPESTIVALQ_DEFAULT ( _MODEM_DCESTI_DCCOMPESTIVALQ_DEFAULT << 15)
#define	MODEM_DIGIGAINCTRL_DEC0GAIN (0x1UL << 8)
#define	MODEM_DIGIGAINCTRL_DEC0GAIN_DEFAULT ( _MODEM_DIGIGAINCTRL_DEC0GAIN_DEFAULT << 8)
#define	MODEM_DIGIGAINCTRL_DIGIGAINDOUBLE (0x1UL << 6)
#define	MODEM_DIGIGAINCTRL_DIGIGAINDOUBLE_DEFAULT ( _MODEM_DIGIGAINCTRL_DIGIGAINDOUBLE_DEFAULT << 6)
#define	MODEM_DIGIGAINCTRL_DIGIGAINEN (0x1UL << 0)
#define	MODEM_DIGIGAINCTRL_DIGIGAINEN_DEFAULT ( _MODEM_DIGIGAINCTRL_DIGIGAINEN_DEFAULT << 0)
#define	MODEM_DIGIGAINCTRL_DIGIGAINHALF (0x1UL << 7)
#define	MODEM_DIGIGAINCTRL_DIGIGAINHALF_DEFAULT ( _MODEM_DIGIGAINCTRL_DIGIGAINHALF_DEFAULT << 7)
#define	MODEM_DIGIGAINCTRL_DIGIGAINSEL_DEFAULT ( _MODEM_DIGIGAINCTRL_DIGIGAINSEL_DEFAULT << 1)
#define	MODEM_DIGIGAINCTRL_DIGIGAINSEL_GAINM0 ( _MODEM_DIGIGAINCTRL_DIGIGAINSEL_GAINM0 << 1)
#define	MODEM_DIGIGAINCTRL_DIGIGAINSEL_GAINM0P25 ( _MODEM_DIGIGAINCTRL_DIGIGAINSEL_GAINM0P25 << 1)
#define	MODEM_DIGIGAINCTRL_DIGIGAINSEL_GAINM0P5 ( _MODEM_DIGIGAINCTRL_DIGIGAINSEL_GAINM0P5 << 1)
#define	MODEM_DIGIGAINCTRL_DIGIGAINSEL_GAINM0P75 ( _MODEM_DIGIGAINCTRL_DIGIGAINSEL_GAINM0P75 << 1)
#define	MODEM_DIGIGAINCTRL_DIGIGAINSEL_GAINM1 ( _MODEM_DIGIGAINCTRL_DIGIGAINSEL_GAINM1 << 1)
#define	MODEM_DIGIGAINCTRL_DIGIGAINSEL_GAINM1P25 ( _MODEM_DIGIGAINCTRL_DIGIGAINSEL_GAINM1P25 << 1)
#define	MODEM_DIGIGAINCTRL_DIGIGAINSEL_GAINM1P5 ( _MODEM_DIGIGAINCTRL_DIGIGAINSEL_GAINM1P5 << 1)
#define	MODEM_DIGIGAINCTRL_DIGIGAINSEL_GAINM1P75 ( _MODEM_DIGIGAINCTRL_DIGIGAINSEL_GAINM1P75 << 1)
#define	MODEM_DIGIGAINCTRL_DIGIGAINSEL_GAINM2 ( _MODEM_DIGIGAINCTRL_DIGIGAINSEL_GAINM2 << 1)
#define	MODEM_DIGIGAINCTRL_DIGIGAINSEL_GAINM2P25 ( _MODEM_DIGIGAINCTRL_DIGIGAINSEL_GAINM2P25 << 1)
#define	MODEM_DIGIGAINCTRL_DIGIGAINSEL_GAINM2P5 ( _MODEM_DIGIGAINCTRL_DIGIGAINSEL_GAINM2P5 << 1)
#define	MODEM_DIGIGAINCTRL_DIGIGAINSEL_GAINM2P75 ( _MODEM_DIGIGAINCTRL_DIGIGAINSEL_GAINM2P75 << 1)
#define	MODEM_DIGIGAINCTRL_DIGIGAINSEL_GAINM3 ( _MODEM_DIGIGAINCTRL_DIGIGAINSEL_GAINM3 << 1)
#define	MODEM_DIGIGAINCTRL_DIGIGAINSEL_GAINP0P25 ( _MODEM_DIGIGAINCTRL_DIGIGAINSEL_GAINP0P25 << 1)
#define	MODEM_DIGIGAINCTRL_DIGIGAINSEL_GAINP0P5 ( _MODEM_DIGIGAINCTRL_DIGIGAINSEL_GAINP0P5 << 1)
#define	MODEM_DIGIGAINCTRL_DIGIGAINSEL_GAINP0P75 ( _MODEM_DIGIGAINCTRL_DIGIGAINSEL_GAINP0P75 << 1)
#define	MODEM_DIGIGAINCTRL_DIGIGAINSEL_GAINP1 ( _MODEM_DIGIGAINCTRL_DIGIGAINSEL_GAINP1 << 1)
#define	MODEM_DIGIGAINCTRL_DIGIGAINSEL_GAINP1P25 ( _MODEM_DIGIGAINCTRL_DIGIGAINSEL_GAINP1P25 << 1)
#define	MODEM_DIGIGAINCTRL_DIGIGAINSEL_GAINP1P5 ( _MODEM_DIGIGAINCTRL_DIGIGAINSEL_GAINP1P5 << 1)
#define	MODEM_DIGIGAINCTRL_DIGIGAINSEL_GAINP1P75 ( _MODEM_DIGIGAINCTRL_DIGIGAINSEL_GAINP1P75 << 1)
#define	MODEM_DIGIGAINCTRL_DIGIGAINSEL_GAINP2 ( _MODEM_DIGIGAINCTRL_DIGIGAINSEL_GAINP2 << 1)
#define	MODEM_DIGIGAINCTRL_DIGIGAINSEL_GAINP2P25 ( _MODEM_DIGIGAINCTRL_DIGIGAINSEL_GAINP2P25 << 1)
#define	MODEM_DIGIGAINCTRL_DIGIGAINSEL_GAINP2P5 ( _MODEM_DIGIGAINCTRL_DIGIGAINSEL_GAINP2P5 << 1)
#define	MODEM_DIGIGAINCTRL_DIGIGAINSEL_GAINP2P75 ( _MODEM_DIGIGAINCTRL_DIGIGAINSEL_GAINP2P75 << 1)
#define	MODEM_DIGIGAINCTRL_DIGIGAINSEL_GAINP3 ( _MODEM_DIGIGAINCTRL_DIGIGAINSEL_GAINP3 << 1)
#define	MODEM_DIGMIXCTRL_DIGMIXFREQ_DEFAULT ( _MODEM_DIGMIXCTRL_DIGMIXFREQ_DEFAULT << 0)
#define	MODEM_DIGMIXCTRL_DIGMIXMODE (0x1UL << 20)
#define	MODEM_DIGMIXCTRL_DIGMIXMODE_CFOSR ( _MODEM_DIGMIXCTRL_DIGMIXMODE_CFOSR << 20)
#define	MODEM_DIGMIXCTRL_DIGMIXMODE_DEFAULT ( _MODEM_DIGMIXCTRL_DIGMIXMODE_DEFAULT << 20)
#define	MODEM_DIGMIXCTRL_DIGMIXMODE_DIGMIXFREQ ( _MODEM_DIGMIXCTRL_DIGMIXMODE_DIGMIXFREQ << 20)
#define	MODEM_DIGMIXCTRL_MIXERCONJ (0x1UL << 21)
#define	MODEM_DIGMIXCTRL_MIXERCONJ_DEFAULT ( _MODEM_DIGMIXCTRL_MIXERCONJ_DEFAULT << 21)
#define	MODEM_DIRECTMODE_CLKWIDTH_DEFAULT ( _MODEM_DIRECTMODE_CLKWIDTH_DEFAULT << 8)
#define	MODEM_DIRECTMODE_DMENABLE (0x1UL << 0)
#define	MODEM_DIRECTMODE_DMENABLE_DEFAULT ( _MODEM_DIRECTMODE_DMENABLE_DEFAULT << 0)
#define	MODEM_DIRECTMODE_SYNCASYNC (0x1UL << 1)
#define	MODEM_DIRECTMODE_SYNCASYNC_DEFAULT ( _MODEM_DIRECTMODE_SYNCASYNC_DEFAULT << 1)
#define	MODEM_DIRECTMODE_SYNCPREAM_ADD0 ( _MODEM_DIRECTMODE_SYNCPREAM_ADD0 << 2)
#define	MODEM_DIRECTMODE_SYNCPREAM_ADD16 ( _MODEM_DIRECTMODE_SYNCPREAM_ADD16 << 2)
#define	MODEM_DIRECTMODE_SYNCPREAM_ADD32 ( _MODEM_DIRECTMODE_SYNCPREAM_ADD32 << 2)
#define	MODEM_DIRECTMODE_SYNCPREAM_ADD8 ( _MODEM_DIRECTMODE_SYNCPREAM_ADD8 << 2)
#define	MODEM_DIRECTMODE_SYNCPREAM_DEFAULT ( _MODEM_DIRECTMODE_SYNCPREAM_DEFAULT << 2)
#define	MODEM_DSACTRL_AGCBAUDEN (0x1UL << 27)
#define	MODEM_DSACTRL_AGCBAUDEN_DEFAULT ( _MODEM_DSACTRL_AGCBAUDEN_DEFAULT << 27)
#define	MODEM_DSACTRL_AMPJUPTHD_DEFAULT ( _MODEM_DSACTRL_AMPJUPTHD_DEFAULT << 28)
#define	MODEM_DSACTRL_ARRTHD_DEFAULT ( _MODEM_DSACTRL_ARRTHD_DEFAULT << 2)
#define	MODEM_DSACTRL_ARRTOLERTHD0_DEFAULT ( _MODEM_DSACTRL_ARRTOLERTHD0_DEFAULT << 6)
#define	MODEM_DSACTRL_ARRTOLERTHD1_DEFAULT ( _MODEM_DSACTRL_ARRTOLERTHD1_DEFAULT << 11)
#define	MODEM_DSACTRL_DSAMODE_DEFAULT ( _MODEM_DSACTRL_DSAMODE_DEFAULT << 0)
#define	MODEM_DSACTRL_DSAMODE_DISABLED ( _MODEM_DSACTRL_DSAMODE_DISABLED << 0)
#define	MODEM_DSACTRL_DSAMODE_ENABLED ( _MODEM_DSACTRL_DSAMODE_ENABLED << 0)
#define	MODEM_DSACTRL_DSARSTON (0x1UL << 19)
#define	MODEM_DSACTRL_DSARSTON_DEFAULT ( _MODEM_DSACTRL_DSARSTON_DEFAULT << 19)
#define	MODEM_DSACTRL_FREQAVGSYM (0x1UL << 17)
#define	MODEM_DSACTRL_FREQAVGSYM_AVG2TS ( _MODEM_DSACTRL_FREQAVGSYM_AVG2TS << 17)
#define	MODEM_DSACTRL_FREQAVGSYM_AVG4TS ( _MODEM_DSACTRL_FREQAVGSYM_AVG4TS << 17)
#define	MODEM_DSACTRL_FREQAVGSYM_DEFAULT ( _MODEM_DSACTRL_FREQAVGSYM_DEFAULT << 17)
#define	MODEM_DSACTRL_GAINREDUCDLY_DEFAULT ( _MODEM_DSACTRL_GAINREDUCDLY_DEFAULT << 21)
#define	MODEM_DSACTRL_LOWDUTY_DEFAULT ( _MODEM_DSACTRL_LOWDUTY_DEFAULT << 23)
#define	MODEM_DSACTRL_RESTORE (0x1UL << 26)
#define	MODEM_DSACTRL_RESTORE_DEFAULT ( _MODEM_DSACTRL_RESTORE_DEFAULT << 26)
#define	MODEM_DSACTRL_SCHPRD (0x1UL << 16)
#define	MODEM_DSACTRL_SCHPRD_DEFAULT ( _MODEM_DSACTRL_SCHPRD_DEFAULT << 16)
#define	MODEM_DSACTRL_SCHPRD_TS2 ( _MODEM_DSACTRL_SCHPRD_TS2 << 16)
#define	MODEM_DSACTRL_SCHPRD_TS4 ( _MODEM_DSACTRL_SCHPRD_TS4 << 16)
#define	MODEM_DSACTRL_TRANRSTDSA (0x1UL << 18)
#define	MODEM_DSACTRL_TRANRSTDSA_DEFAULT ( _MODEM_DSACTRL_TRANRSTDSA_DEFAULT << 18)
#define	MODEM_DSATHD0_FDEVMAXTHD_DEFAULT ( _MODEM_DSATHD0_FDEVMAXTHD_DEFAULT << 20)
#define	MODEM_DSATHD0_FDEVMINTHD_DEFAULT ( _MODEM_DSATHD0_FDEVMINTHD_DEFAULT << 14)
#define	MODEM_DSATHD0_SPIKETHD_DEFAULT ( _MODEM_DSATHD0_SPIKETHD_DEFAULT << 0)
#define	MODEM_DSATHD0_UNMODTHD_DEFAULT ( _MODEM_DSATHD0_UNMODTHD_DEFAULT << 8)
#define	MODEM_DSATHD1_AMPFLTBYP (0x1UL << 28)
#define	MODEM_DSATHD1_AMPFLTBYP_DEFAULT ( _MODEM_DSATHD1_AMPFLTBYP_DEFAULT << 28)
#define	MODEM_DSATHD1_DSARSTCNT_DEFAULT ( _MODEM_DSATHD1_DSARSTCNT_DEFAULT << 18)
#define	MODEM_DSATHD1_FREQLATDLY_DEFAULT ( _MODEM_DSATHD1_FREQLATDLY_DEFAULT << 25)
#define	MODEM_DSATHD1_FREQSCALE (0x1UL << 30)
#define	MODEM_DSATHD1_FREQSCALE_DEFAULT ( _MODEM_DSATHD1_FREQSCALE_DEFAULT << 30)
#define	MODEM_DSATHD1_POWABSTHD_DEFAULT ( _MODEM_DSATHD1_POWABSTHD_DEFAULT << 0)
#define	MODEM_DSATHD1_POWRELTHD_DEFAULT ( _MODEM_DSATHD1_POWRELTHD_DEFAULT << 16)
#define	MODEM_DSATHD1_POWRELTHD_DISABLED ( _MODEM_DSATHD1_POWRELTHD_DISABLED << 16)
#define	MODEM_DSATHD1_POWRELTHD_MODE1 ( _MODEM_DSATHD1_POWRELTHD_MODE1 << 16)
#define	MODEM_DSATHD1_POWRELTHD_MODE2 ( _MODEM_DSATHD1_POWRELTHD_MODE2 << 16)
#define	MODEM_DSATHD1_POWRELTHD_MODE3 ( _MODEM_DSATHD1_POWRELTHD_MODE3 << 16)
#define	MODEM_DSATHD1_PWRDETDIS (0x1UL << 29)
#define	MODEM_DSATHD1_PWRDETDIS_DEFAULT ( _MODEM_DSATHD1_PWRDETDIS_DEFAULT << 29)
#define	MODEM_DSATHD1_PWRFLTBYP (0x1UL << 27)
#define	MODEM_DSATHD1_PWRFLTBYP_DEFAULT ( _MODEM_DSATHD1_PWRFLTBYP_DEFAULT << 27)
#define	MODEM_DSATHD1_RSSIJMPTHD_DEFAULT ( _MODEM_DSATHD1_RSSIJMPTHD_DEFAULT << 21)
#define	MODEM_DSATHD2_FDADJTHD_DEFAULT ( _MODEM_DSATHD2_FDADJTHD_DEFAULT << 10)
#define	MODEM_DSATHD2_FREQESTTHD_DEFAULT ( _MODEM_DSATHD2_FREQESTTHD_DEFAULT << 20)
#define	MODEM_DSATHD2_INTERFERDET_DEFAULT ( _MODEM_DSATHD2_INTERFERDET_DEFAULT << 25)
#define	MODEM_DSATHD2_JUMPDETEN (0x1UL << 9)
#define	MODEM_DSATHD2_JUMPDETEN_DEFAULT ( _MODEM_DSATHD2_JUMPDETEN_DEFAULT << 9)
#define	MODEM_DSATHD2_PMDETFORCE (0x1UL << 30)
#define	MODEM_DSATHD2_PMDETFORCE_DEFAULT ( _MODEM_DSATHD2_PMDETFORCE_DEFAULT << 30)
#define	MODEM_DSATHD2_PMDETPASSTHD_DEFAULT ( _MODEM_DSATHD2_PMDETPASSTHD_DEFAULT << 16)
#define	MODEM_DSATHD2_POWABSTHDLOG_DEFAULT ( _MODEM_DSATHD2_POWABSTHDLOG_DEFAULT << 0)
#define	MODEM_DSATHD3_FDEVMAXTHDLO_DEFAULT ( _MODEM_DSATHD3_FDEVMAXTHDLO_DEFAULT << 20)
#define	MODEM_DSATHD3_FDEVMINTHDLO_DEFAULT ( _MODEM_DSATHD3_FDEVMINTHDLO_DEFAULT << 14)
#define	MODEM_DSATHD3_SPIKETHDLO_DEFAULT ( _MODEM_DSATHD3_SPIKETHDLO_DEFAULT << 0)
#define	MODEM_DSATHD3_UNMODTHDLO_DEFAULT ( _MODEM_DSATHD3_UNMODTHDLO_DEFAULT << 8)
#define	MODEM_DSATHD4_ARRTOLERTHD0LO_DEFAULT ( _MODEM_DSATHD4_ARRTOLERTHD0LO_DEFAULT << 16)
#define	MODEM_DSATHD4_ARRTOLERTHD1LO_DEFAULT ( _MODEM_DSATHD4_ARRTOLERTHD1LO_DEFAULT << 21)
#define	MODEM_DSATHD4_POWABSTHDLO_DEFAULT ( _MODEM_DSATHD4_POWABSTHDLO_DEFAULT << 0)
#define	MODEM_DSATHD4_SWTHD (0x1UL << 26)
#define	MODEM_DSATHD4_SWTHD_DEFAULT ( _MODEM_DSATHD4_SWTHD_DEFAULT << 26)
#define	MODEM_DSSS0_DSSS0_DEFAULT ( _MODEM_DSSS0_DSSS0_DEFAULT << 0)
#define	MODEM_EN_EN (0x1UL << 0)
#define	MODEM_EN_EN_DEFAULT ( _MODEM_EN_EN_DEFAULT << 0)
#define	MODEM_FREQOFFEST_CORRVAL_DEFAULT ( _MODEM_FREQOFFEST_CORRVAL_DEFAULT << 16)
#define	MODEM_FREQOFFEST_FREQOFFEST_DEFAULT ( _MODEM_FREQOFFEST_FREQOFFEST_DEFAULT << 0)
#define	MODEM_FREQOFFEST_SOFTVAL_DEFAULT ( _MODEM_FREQOFFEST_SOFTVAL_DEFAULT << 24)
#define	MODEM_FSMSTATUS_DETSTATE_DEFAULT ( _MODEM_FSMSTATUS_DETSTATE_DEFAULT << 0)
#define	MODEM_FSMSTATUS_DETSTATE_FRAMEDETMODE0 ( _MODEM_FSMSTATUS_DETSTATE_FRAMEDETMODE0 << 0)
#define	MODEM_FSMSTATUS_DETSTATE_FRAMESEARCH ( _MODEM_FSMSTATUS_DETSTATE_FRAMESEARCH << 0)
#define	MODEM_FSMSTATUS_DETSTATE_OFF ( _MODEM_FSMSTATUS_DETSTATE_OFF << 0)
#define	MODEM_FSMSTATUS_DETSTATE_PRESEARCH ( _MODEM_FSMSTATUS_DETSTATE_PRESEARCH << 0)
#define	MODEM_FSMSTATUS_DETSTATE_RXFRAME ( _MODEM_FSMSTATUS_DETSTATE_RXFRAME << 0)
#define	MODEM_FSMSTATUS_DETSTATE_TIMINGSEARCH ( _MODEM_FSMSTATUS_DETSTATE_TIMINGSEARCH << 0)
#define	MODEM_FSMSTATUS_DSASTATE_ARRIVALCHK ( _MODEM_FSMSTATUS_DSASTATE_ARRIVALCHK << 7)
#define	MODEM_FSMSTATUS_DSASTATE_DEFAULT ( _MODEM_FSMSTATUS_DSASTATE_DEFAULT << 7)
#define	MODEM_FSMSTATUS_DSASTATE_IDLE ( _MODEM_FSMSTATUS_DSASTATE_IDLE << 7)
#define	MODEM_FSMSTATUS_DSASTATE_SAMPPW ( _MODEM_FSMSTATUS_DSASTATE_SAMPPW << 7)
#define	MODEM_FSMSTATUS_DSASTATE_STATUSCHK ( _MODEM_FSMSTATUS_DSASTATE_STATUSCHK << 7)
#define	MODEM_FSMSTATUS_DSASTATE_STOP ( _MODEM_FSMSTATUS_DSASTATE_STOP << 7)
#define	MODEM_FSMSTATUS_DSASTATE_WAITABORT ( _MODEM_FSMSTATUS_DSASTATE_WAITABORT << 7)
#define	MODEM_FSMSTATUS_DSASTATE_WAITDSALO ( _MODEM_FSMSTATUS_DSASTATE_WAITDSALO << 7)
#define	MODEM_FSMSTATUS_DSASTATE_WAITPWRUP ( _MODEM_FSMSTATUS_DSASTATE_WAITPWRUP << 7)
#define	MODEM_FSMSTATUS_LRBLESTATE_CLEANUP ( _MODEM_FSMSTATUS_LRBLESTATE_CLEANUP << 10)
#define	MODEM_FSMSTATUS_LRBLESTATE_CORRCOE ( _MODEM_FSMSTATUS_LRBLESTATE_CORRCOE << 10)
#define	MODEM_FSMSTATUS_LRBLESTATE_DEFAULT ( _MODEM_FSMSTATUS_LRBLESTATE_DEFAULT << 10)
#define	MODEM_FSMSTATUS_LRBLESTATE_FEC1ACK ( _MODEM_FSMSTATUS_LRBLESTATE_FEC1ACK << 10)
#define	MODEM_FSMSTATUS_LRBLESTATE_FEC1DATA ( _MODEM_FSMSTATUS_LRBLESTATE_FEC1DATA << 10)
#define	MODEM_FSMSTATUS_LRBLESTATE_FEC2ACK ( _MODEM_FSMSTATUS_LRBLESTATE_FEC2ACK << 10)
#define	MODEM_FSMSTATUS_LRBLESTATE_FEC2DATA ( _MODEM_FSMSTATUS_LRBLESTATE_FEC2DATA << 10)
#define	MODEM_FSMSTATUS_LRBLESTATE_IDLE ( _MODEM_FSMSTATUS_LRBLESTATE_IDLE << 10)
#define	MODEM_FSMSTATUS_LRBLESTATE_MAXCORR ( _MODEM_FSMSTATUS_LRBLESTATE_MAXCORR << 10)
#define	MODEM_FSMSTATUS_LRBLESTATE_PAUSE ( _MODEM_FSMSTATUS_LRBLESTATE_PAUSE << 10)
#define	MODEM_FSMSTATUS_LRBLESTATE_STOP ( _MODEM_FSMSTATUS_LRBLESTATE_STOP << 10)
#define	MODEM_FSMSTATUS_LRBLESTATE_TDECISION ( _MODEM_FSMSTATUS_LRBLESTATE_TDECISION << 10)
#define	MODEM_FSMSTATUS_LRBLESTATE_TRACKCUR ( _MODEM_FSMSTATUS_LRBLESTATE_TRACKCUR << 10)
#define	MODEM_FSMSTATUS_LRBLESTATE_TRACKDONE ( _MODEM_FSMSTATUS_LRBLESTATE_TRACKDONE << 10)
#define	MODEM_FSMSTATUS_LRBLESTATE_TRACKEAR ( _MODEM_FSMSTATUS_LRBLESTATE_TRACKEAR << 10)
#define	MODEM_FSMSTATUS_LRBLESTATE_TRACKLAT ( _MODEM_FSMSTATUS_LRBLESTATE_TRACKLAT << 10)
#define	MODEM_FSMSTATUS_LRBLESTATE_WAITLRDSA ( _MODEM_FSMSTATUS_LRBLESTATE_WAITLRDSA << 10)
#define	MODEM_FSMSTATUS_LRBLESTATE_WAITRDY ( _MODEM_FSMSTATUS_LRBLESTATE_WAITRDY << 10)
#define	MODEM_FSMSTATUS_NBBLESTATE_ADDRNXT ( _MODEM_FSMSTATUS_NBBLESTATE_ADDRNXT << 15)
#define	MODEM_FSMSTATUS_NBBLESTATE_CALCCOST ( _MODEM_FSMSTATUS_NBBLESTATE_CALCCOST << 15)
#define	MODEM_FSMSTATUS_NBBLESTATE_DEBUG ( _MODEM_FSMSTATUS_NBBLESTATE_DEBUG << 15)
#define	MODEM_FSMSTATUS_NBBLESTATE_DEFAULT ( _MODEM_FSMSTATUS_NBBLESTATE_DEFAULT << 15)
#define	MODEM_FSMSTATUS_NBBLESTATE_FREQACQU ( _MODEM_FSMSTATUS_NBBLESTATE_FREQACQU << 15)
#define	MODEM_FSMSTATUS_NBBLESTATE_FREQACQUDONE ( _MODEM_FSMSTATUS_NBBLESTATE_FREQACQUDONE << 15)
#define	MODEM_FSMSTATUS_NBBLESTATE_HARDRXSYNC ( _MODEM_FSMSTATUS_NBBLESTATE_HARDRXSYNC << 15)
#define	MODEM_FSMSTATUS_NBBLESTATE_HARDXPAYLOAD ( _MODEM_FSMSTATUS_NBBLESTATE_HARDXPAYLOAD << 15)
#define	MODEM_FSMSTATUS_NBBLESTATE_IDLE ( _MODEM_FSMSTATUS_NBBLESTATE_IDLE << 15)
#define	MODEM_FSMSTATUS_NBBLESTATE_INICOST ( _MODEM_FSMSTATUS_NBBLESTATE_INICOST << 15)
#define	MODEM_FSMSTATUS_NBBLESTATE_INITALACQU ( _MODEM_FSMSTATUS_NBBLESTATE_INITALACQU << 15)
#define	MODEM_FSMSTATUS_NBBLESTATE_INITALCOSTCALC ( _MODEM_FSMSTATUS_NBBLESTATE_INITALCOSTCALC << 15)
#define	MODEM_FSMSTATUS_NBBLESTATE_MINCOSTCALC ( _MODEM_FSMSTATUS_NBBLESTATE_MINCOSTCALC << 15)
#define	MODEM_FSMSTATUS_NBBLESTATE_STOP ( _MODEM_FSMSTATUS_NBBLESTATE_STOP << 15)
#define	MODEM_FSMSTATUS_NBBLESTATE_TIMINGACQUCURR ( _MODEM_FSMSTATUS_NBBLESTATE_TIMINGACQUCURR << 15)
#define	MODEM_FSMSTATUS_NBBLESTATE_TIMINGACQUDONE ( _MODEM_FSMSTATUS_NBBLESTATE_TIMINGACQUDONE << 15)
#define	MODEM_FSMSTATUS_NBBLESTATE_TIMINGACQUEARLY ( _MODEM_FSMSTATUS_NBBLESTATE_TIMINGACQUEARLY << 15)
#define	MODEM_FSMSTATUS_NBBLESTATE_TIMINGACQULATE ( _MODEM_FSMSTATUS_NBBLESTATE_TIMINGACQULATE << 15)
#define	MODEM_FSMSTATUS_NBBLESTATE_TRACKDECISION ( _MODEM_FSMSTATUS_NBBLESTATE_TRACKDECISION << 15)
#define	MODEM_FSMSTATUS_NBBLESTATE_TRACKDONE ( _MODEM_FSMSTATUS_NBBLESTATE_TRACKDONE << 15)
#define	MODEM_FSMSTATUS_NBBLESTATE_TRACKFREQ ( _MODEM_FSMSTATUS_NBBLESTATE_TRACKFREQ << 15)
#define	MODEM_FSMSTATUS_NBBLESTATE_TRACKTIMCURR ( _MODEM_FSMSTATUS_NBBLESTATE_TRACKTIMCURR << 15)
#define	MODEM_FSMSTATUS_NBBLESTATE_TRACKTIMEARLY ( _MODEM_FSMSTATUS_NBBLESTATE_TRACKTIMEARLY << 15)
#define	MODEM_FSMSTATUS_NBBLESTATE_TRACKTIMLATE ( _MODEM_FSMSTATUS_NBBLESTATE_TRACKTIMLATE << 15)
#define	MODEM_FSMSTATUS_NBBLESTATE_VIRTBIINIT0 ( _MODEM_FSMSTATUS_NBBLESTATE_VIRTBIINIT0 << 15)
#define	MODEM_FSMSTATUS_NBBLESTATE_VIRTBIINIT1 ( _MODEM_FSMSTATUS_NBBLESTATE_VIRTBIINIT1 << 15)
#define	MODEM_FSMSTATUS_NBBLESTATE_VIRTBIRXPAYLOAD ( _MODEM_FSMSTATUS_NBBLESTATE_VIRTBIRXPAYLOAD << 15)
#define	MODEM_FSMSTATUS_NBBLESTATE_VIRTBIRXSYNC ( _MODEM_FSMSTATUS_NBBLESTATE_VIRTBIRXSYNC << 15)
#define	MODEM_FSMSTATUS_NBBLESTATE_VTINITI ( _MODEM_FSMSTATUS_NBBLESTATE_VTINITI << 15)
#define	MODEM_FSMSTATUS_NBBLESTATE_WAITACK ( _MODEM_FSMSTATUS_NBBLESTATE_WAITACK << 15)
#define	MODEM_IEN_FRCTIMOUT (0x1UL << 16)
#define	MODEM_IEN_FRCTIMOUT_DEFAULT ( _MODEM_IEN_FRCTIMOUT_DEFAULT << 16)
#define	MODEM_IEN_RXFRAMEDET0 (0x1UL << 10)
#define	MODEM_IEN_RXFRAMEDET0_DEFAULT ( _MODEM_IEN_RXFRAMEDET0_DEFAULT << 10)
#define	MODEM_IEN_RXFRAMEDET1 (0x1UL << 11)
#define	MODEM_IEN_RXFRAMEDET1_DEFAULT ( _MODEM_IEN_RXFRAMEDET1_DEFAULT << 11)
#define	MODEM_IEN_RXFRAMEDETOF (0x1UL << 14)
#define	MODEM_IEN_RXFRAMEDETOF_DEFAULT ( _MODEM_IEN_RXFRAMEDETOF_DEFAULT << 14)
#define	MODEM_IEN_RXPREDET (0x1UL << 9)
#define	MODEM_IEN_RXPREDET_DEFAULT ( _MODEM_IEN_RXPREDET_DEFAULT << 9)
#define	MODEM_IEN_RXPRELOST (0x1UL << 13)
#define	MODEM_IEN_RXPRELOST_DEFAULT ( _MODEM_IEN_RXPRELOST_DEFAULT << 13)
#define	MODEM_IEN_RXTIMDET (0x1UL << 8)
#define	MODEM_IEN_RXTIMDET_DEFAULT ( _MODEM_IEN_RXTIMDET_DEFAULT << 8)
#define	MODEM_IEN_RXTIMLOST (0x1UL << 12)
#define	MODEM_IEN_RXTIMLOST_DEFAULT ( _MODEM_IEN_RXTIMLOST_DEFAULT << 12)
#define	MODEM_IEN_RXTIMNF (0x1UL << 15)
#define	MODEM_IEN_RXTIMNF_DEFAULT ( _MODEM_IEN_RXTIMNF_DEFAULT << 15)
#define	MODEM_IEN_TXFRAMESENT (0x1UL << 0)
#define	MODEM_IEN_TXFRAMESENT_DEFAULT ( _MODEM_IEN_TXFRAMESENT_DEFAULT << 0)
#define	MODEM_IEN_TXPRESENT (0x1UL << 2)
#define	MODEM_IEN_TXPRESENT_DEFAULT ( _MODEM_IEN_TXPRESENT_DEFAULT << 2)
#define	MODEM_IEN_TXSYNCSENT (0x1UL << 1)
#define	MODEM_IEN_TXSYNCSENT_DEFAULT ( _MODEM_IEN_TXSYNCSENT_DEFAULT << 1)
#define	MODEM_IF_FRCTIMOUT (0x1UL << 16)
#define	MODEM_IF_FRCTIMOUT_DEFAULT ( _MODEM_IF_FRCTIMOUT_DEFAULT << 16)
#define	MODEM_IF_RXFRAMEDET0 (0x1UL << 10)
#define	MODEM_IF_RXFRAMEDET0_DEFAULT ( _MODEM_IF_RXFRAMEDET0_DEFAULT << 10)
#define	MODEM_IF_RXFRAMEDET1 (0x1UL << 11)
#define	MODEM_IF_RXFRAMEDET1_DEFAULT ( _MODEM_IF_RXFRAMEDET1_DEFAULT << 11)
#define	MODEM_IF_RXFRAMEDETOF (0x1UL << 14)
#define	MODEM_IF_RXFRAMEDETOF_DEFAULT ( _MODEM_IF_RXFRAMEDETOF_DEFAULT << 14)
#define	MODEM_IF_RXPREDET (0x1UL << 9)
#define	MODEM_IF_RXPREDET_DEFAULT ( _MODEM_IF_RXPREDET_DEFAULT << 9)
#define	MODEM_IF_RXPRELOST (0x1UL << 13)
#define	MODEM_IF_RXPRELOST_DEFAULT ( _MODEM_IF_RXPRELOST_DEFAULT << 13)
#define	MODEM_IF_RXTIMDET (0x1UL << 8)
#define	MODEM_IF_RXTIMDET_DEFAULT ( _MODEM_IF_RXTIMDET_DEFAULT << 8)
#define	MODEM_IF_RXTIMLOST (0x1UL << 12)
#define	MODEM_IF_RXTIMLOST_DEFAULT ( _MODEM_IF_RXTIMLOST_DEFAULT << 12)
#define	MODEM_IF_RXTIMNF (0x1UL << 15)
#define	MODEM_IF_RXTIMNF_DEFAULT ( _MODEM_IF_RXTIMNF_DEFAULT << 15)
#define	MODEM_IF_TXFRAMESENT (0x1UL << 0)
#define	MODEM_IF_TXFRAMESENT_DEFAULT ( _MODEM_IF_TXFRAMESENT_DEFAULT << 0)
#define	MODEM_IF_TXPRESENT (0x1UL << 2)
#define	MODEM_IF_TXPRESENT_DEFAULT ( _MODEM_IF_TXPRESENT_DEFAULT << 2)
#define	MODEM_IF_TXSYNCSENT (0x1UL << 1)
#define	MODEM_IF_TXSYNCSENT_DEFAULT ( _MODEM_IF_TXSYNCSENT_DEFAULT << 1)
#define	MODEM_INTAFC_FOEPREAVG0_DEFAULT ( _MODEM_INTAFC_FOEPREAVG0_DEFAULT << 0)
#define	MODEM_INTAFC_FOEPREAVG1_DEFAULT ( _MODEM_INTAFC_FOEPREAVG1_DEFAULT << 3)
#define	MODEM_INTAFC_FOEPREAVG2_DEFAULT ( _MODEM_INTAFC_FOEPREAVG2_DEFAULT << 6)
#define	MODEM_INTAFC_FOEPREAVG3_DEFAULT ( _MODEM_INTAFC_FOEPREAVG3_DEFAULT << 9)
#define	MODEM_INTAFC_FOEPREAVG4_DEFAULT ( _MODEM_INTAFC_FOEPREAVG4_DEFAULT << 12)
#define	MODEM_INTAFC_FOEPREAVG5_DEFAULT ( _MODEM_INTAFC_FOEPREAVG5_DEFAULT << 15)
#define	MODEM_INTAFC_FOEPREAVG6_DEFAULT ( _MODEM_INTAFC_FOEPREAVG6_DEFAULT << 18)
#define	MODEM_INTAFC_FOEPREAVG7_DEFAULT ( _MODEM_INTAFC_FOEPREAVG7_DEFAULT << 21)
#define	MODEM_IPVERSION_IPVERSION_DEFAULT ( _MODEM_IPVERSION_IPVERSION_DEFAULT << 0)
#define	MODEM_IRCAL_IRCALEN (0x1UL << 0)
#define	MODEM_IRCAL_IRCALEN_DEFAULT ( _MODEM_IRCAL_IRCALEN_DEFAULT << 0)
#define	MODEM_IRCAL_IRCORREN (0x1UL << 13)
#define	MODEM_IRCAL_IRCORREN_DEFAULT ( _MODEM_IRCAL_IRCORREN_DEFAULT << 13)
#define	MODEM_IRCAL_MUISHF_DEFAULT ( _MODEM_IRCAL_MUISHF_DEFAULT << 7)
#define	MODEM_IRCAL_MURSHF_DEFAULT ( _MODEM_IRCAL_MURSHF_DEFAULT << 1)
#define	MODEM_IRCALCOEF_CIV_DEFAULT ( _MODEM_IRCALCOEF_CIV_DEFAULT << 16)
#define	MODEM_IRCALCOEF_CRV_DEFAULT ( _MODEM_IRCALCOEF_CRV_DEFAULT << 0)
#define	MODEM_IRCALCOEFWR_CIVWD_DEFAULT ( _MODEM_IRCALCOEFWR_CIVWD_DEFAULT << 16)
#define	MODEM_IRCALCOEFWR_CIVWEN (0x1UL << 31)
#define	MODEM_IRCALCOEFWR_CIVWEN_DEFAULT ( _MODEM_IRCALCOEFWR_CIVWEN_DEFAULT << 31)
#define	MODEM_IRCALCOEFWR_CRVWD_DEFAULT ( _MODEM_IRCALCOEFWR_CRVWD_DEFAULT << 0)
#define	MODEM_IRCALCOEFWR_CRVWEN (0x1UL << 15)
#define	MODEM_IRCALCOEFWR_CRVWEN_DEFAULT ( _MODEM_IRCALCOEFWR_CRVWEN_DEFAULT << 15)
#define	MODEM_LONGRANGE1_AVGWIN_DEFAULT ( _MODEM_LONGRANGE1_AVGWIN_DEFAULT << 21)
#define	MODEM_LONGRANGE1_CHPWRACCUDEL_DEFAULT ( _MODEM_LONGRANGE1_CHPWRACCUDEL_DEFAULT << 16)
#define	MODEM_LONGRANGE1_CHPWRACCUDEL_DEL0 ( _MODEM_LONGRANGE1_CHPWRACCUDEL_DEL0 << 16)
#define	MODEM_LONGRANGE1_CHPWRACCUDEL_DEL32 ( _MODEM_LONGRANGE1_CHPWRACCUDEL_DEL32 << 16)
#define	MODEM_LONGRANGE1_CHPWRACCUDEL_DEL64 ( _MODEM_LONGRANGE1_CHPWRACCUDEL_DEL64 << 16)
#define	MODEM_LONGRANGE1_HYSVAL_DEFAULT ( _MODEM_LONGRANGE1_HYSVAL_DEFAULT << 18)
#define	MODEM_LONGRANGE1_LOGICBASEDLRDEMODGATE (0x1UL << 29)
#define	MODEM_LONGRANGE1_LOGICBASEDLRDEMODGATE_DEFAULT ( _MODEM_LONGRANGE1_LOGICBASEDLRDEMODGATE_DEFAULT << 29)
#define	MODEM_LONGRANGE1_LOGICBASEDPUGATE (0x1UL << 28)
#define	MODEM_LONGRANGE1_LOGICBASEDPUGATE_DEFAULT ( _MODEM_LONGRANGE1_LOGICBASEDPUGATE_DEFAULT << 28)
#define	MODEM_LONGRANGE1_LRSPIKETHADD_DEFAULT ( _MODEM_LONGRANGE1_LRSPIKETHADD_DEFAULT << 24)
#define	MODEM_LONGRANGE1_LRSS_DEFAULT ( _MODEM_LONGRANGE1_LRSS_DEFAULT << 0)
#define	MODEM_LONGRANGE1_LRTIMEOUTTHD_DEFAULT ( _MODEM_LONGRANGE1_LRTIMEOUTTHD_DEFAULT << 4)
#define	MODEM_LONGRANGE2_LRCHPWRTH1_DEFAULT ( _MODEM_LONGRANGE2_LRCHPWRTH1_DEFAULT << 0)
#define	MODEM_LONGRANGE2_LRCHPWRTH2_DEFAULT ( _MODEM_LONGRANGE2_LRCHPWRTH2_DEFAULT << 8)
#define	MODEM_LONGRANGE2_LRCHPWRTH3_DEFAULT ( _MODEM_LONGRANGE2_LRCHPWRTH3_DEFAULT << 16)
#define	MODEM_LONGRANGE2_LRCHPWRTH4_DEFAULT ( _MODEM_LONGRANGE2_LRCHPWRTH4_DEFAULT << 24)
#define	MODEM_LONGRANGE3_LRCHPWRTH5_DEFAULT ( _MODEM_LONGRANGE3_LRCHPWRTH5_DEFAULT << 0)
#define	MODEM_LONGRANGE3_LRCHPWRTH6_DEFAULT ( _MODEM_LONGRANGE3_LRCHPWRTH6_DEFAULT << 8)
#define	MODEM_LONGRANGE3_LRCHPWRTH7_DEFAULT ( _MODEM_LONGRANGE3_LRCHPWRTH7_DEFAULT << 16)
#define	MODEM_LONGRANGE3_LRCHPWRTH8_DEFAULT ( _MODEM_LONGRANGE3_LRCHPWRTH8_DEFAULT << 24)
#define	MODEM_LONGRANGE4_LRCHPWRSH1_DEFAULT ( _MODEM_LONGRANGE4_LRCHPWRSH1_DEFAULT << 16)
#define	MODEM_LONGRANGE4_LRCHPWRSH2_DEFAULT ( _MODEM_LONGRANGE4_LRCHPWRSH2_DEFAULT << 20)
#define	MODEM_LONGRANGE4_LRCHPWRSH3_DEFAULT ( _MODEM_LONGRANGE4_LRCHPWRSH3_DEFAULT << 24)
#define	MODEM_LONGRANGE4_LRCHPWRSH4_DEFAULT ( _MODEM_LONGRANGE4_LRCHPWRSH4_DEFAULT << 28)
#define	MODEM_LONGRANGE4_LRCHPWRTH10_DEFAULT ( _MODEM_LONGRANGE4_LRCHPWRTH10_DEFAULT << 8)
#define	MODEM_LONGRANGE4_LRCHPWRTH9_DEFAULT ( _MODEM_LONGRANGE4_LRCHPWRTH9_DEFAULT << 0)
#define	MODEM_LONGRANGE5_LRCHPWRSH10_DEFAULT ( _MODEM_LONGRANGE5_LRCHPWRSH10_DEFAULT << 20)
#define	MODEM_LONGRANGE5_LRCHPWRSH11_DEFAULT ( _MODEM_LONGRANGE5_LRCHPWRSH11_DEFAULT << 24)
#define	MODEM_LONGRANGE5_LRCHPWRSH5_DEFAULT ( _MODEM_LONGRANGE5_LRCHPWRSH5_DEFAULT << 0)
#define	MODEM_LONGRANGE5_LRCHPWRSH6_DEFAULT ( _MODEM_LONGRANGE5_LRCHPWRSH6_DEFAULT << 4)
#define	MODEM_LONGRANGE5_LRCHPWRSH7_DEFAULT ( _MODEM_LONGRANGE5_LRCHPWRSH7_DEFAULT << 8)
#define	MODEM_LONGRANGE5_LRCHPWRSH8_DEFAULT ( _MODEM_LONGRANGE5_LRCHPWRSH8_DEFAULT << 12)
#define	MODEM_LONGRANGE5_LRCHPWRSH9_DEFAULT ( _MODEM_LONGRANGE5_LRCHPWRSH9_DEFAULT << 16)
#define	MODEM_LONGRANGE6_LRCHPWRSH12_DEFAULT ( _MODEM_LONGRANGE6_LRCHPWRSH12_DEFAULT << 28)
#define	MODEM_LONGRANGE6_LRCHPWRSPIKETH_DEFAULT ( _MODEM_LONGRANGE6_LRCHPWRSPIKETH_DEFAULT << 0)
#define	MODEM_LONGRANGE6_LRCHPWRTH11_DEFAULT ( _MODEM_LONGRANGE6_LRCHPWRTH11_DEFAULT << 20)
#define	MODEM_LONGRANGE6_LRSPIKETHD_DEFAULT ( _MODEM_LONGRANGE6_LRSPIKETHD_DEFAULT << 8)
#define	MODEM_LONGRANGE_LRBLE (0x1UL << 15)
#define	MODEM_LONGRANGE_LRBLE_DEFAULT ( _MODEM_LONGRANGE_LRBLE_DEFAULT << 15)
#define	MODEM_LONGRANGE_LRBLEDSA (0x1UL << 27)
#define	MODEM_LONGRANGE_LRBLEDSA_DEFAULT ( _MODEM_LONGRANGE_LRBLEDSA_DEFAULT << 27)
#define	MODEM_LONGRANGE_LRCORRSCHWIN_DEFAULT ( _MODEM_LONGRANGE_LRCORRSCHWIN_DEFAULT << 11)
#define	MODEM_LONGRANGE_LRCORRTHD_DEFAULT ( _MODEM_LONGRANGE_LRCORRTHD_DEFAULT << 0)
#define	MODEM_LONGRANGE_LRCORRTHDDYNEN (0x1UL << 31)
#define	MODEM_LONGRANGE_LRCORRTHDDYNEN_DEFAULT ( _MODEM_LONGRANGE_LRCORRTHDDYNEN_DEFAULT << 31)
#define	MODEM_LONGRANGE_LRDEC_DEFAULT ( _MODEM_LONGRANGE_LRDEC_DEFAULT << 28)
#define	MODEM_LONGRANGE_LRTIMCORRTHD_DEFAULT ( _MODEM_LONGRANGE_LRTIMCORRTHD_DEFAULT << 16)
#define	MODEM_LRFRC_CI500_DEFAULT ( _MODEM_LRFRC_CI500_DEFAULT << 0)
#define	MODEM_LRFRC_FRCACKTIMETHD_DEFAULT ( _MODEM_LRFRC_FRCACKTIMETHD_DEFAULT << 2)
#define	MODEM_MIXCTRL_ANAMIXMODE_DEFAULT ( _MODEM_MIXCTRL_ANAMIXMODE_DEFAULT << 0)
#define	MODEM_MIXCTRL_ANAMIXMODE_DOWNCONVERT ( _MODEM_MIXCTRL_ANAMIXMODE_DOWNCONVERT << 0)
#define	MODEM_MIXCTRL_ANAMIXMODE_INQN ( _MODEM_MIXCTRL_ANAMIXMODE_INQN << 0)
#define	MODEM_MIXCTRL_ANAMIXMODE_INQNIQSWAP ( _MODEM_MIXCTRL_ANAMIXMODE_INQNIQSWAP << 0)
#define	MODEM_MIXCTRL_ANAMIXMODE_INQP ( _MODEM_MIXCTRL_ANAMIXMODE_INQP << 0)
#define	MODEM_MIXCTRL_ANAMIXMODE_INQPIQSWAP ( _MODEM_MIXCTRL_ANAMIXMODE_INQPIQSWAP << 0)
#define	MODEM_MIXCTRL_ANAMIXMODE_IPQN ( _MODEM_MIXCTRL_ANAMIXMODE_IPQN << 0)
#define	MODEM_MIXCTRL_ANAMIXMODE_IPQNIQSWAP ( _MODEM_MIXCTRL_ANAMIXMODE_IPQNIQSWAP << 0)
#define	MODEM_MIXCTRL_ANAMIXMODE_IPQPIQSWAP ( _MODEM_MIXCTRL_ANAMIXMODE_IPQPIQSWAP << 0)
#define	MODEM_MIXCTRL_ANAMIXMODE_NORMAL ( _MODEM_MIXCTRL_ANAMIXMODE_NORMAL << 0)
#define	MODEM_MIXCTRL_ANAMIXMODE_UPCONVERT ( _MODEM_MIXCTRL_ANAMIXMODE_UPCONVERT << 0)
#define	MODEM_MIXCTRL_DIGIQSWAPEN (0x1UL << 4)
#define	MODEM_MIXCTRL_DIGIQSWAPEN_DEFAULT ( _MODEM_MIXCTRL_DIGIQSWAPEN_DEFAULT << 4)
#define	MODEM_MODINDEX_FREQGAINE_DEFAULT ( _MODEM_MODINDEX_FREQGAINE_DEFAULT << 16)
#define	MODEM_MODINDEX_FREQGAINM_DEFAULT ( _MODEM_MODINDEX_FREQGAINM_DEFAULT << 19)
#define	MODEM_MODINDEX_MODINDEXE_DEFAULT ( _MODEM_MODINDEX_MODINDEXE_DEFAULT << 5)
#define	MODEM_MODINDEX_MODINDEXM_DEFAULT ( _MODEM_MODINDEX_MODINDEXM_DEFAULT << 0)
#define	MODEM_POE_POEI_DEFAULT ( _MODEM_POE_POEI_DEFAULT << 0)
#define	MODEM_POE_POEQ_DEFAULT ( _MODEM_POE_POEQ_DEFAULT << 16)
#define	MODEM_PRE_BASE_DEFAULT ( _MODEM_PRE_BASE_DEFAULT << 0)
#define	MODEM_PRE_BASEBITS_DEFAULT ( _MODEM_PRE_BASEBITS_DEFAULT << 4)
#define	MODEM_PRE_DSSSPRE (0x1UL << 11)
#define	MODEM_PRE_DSSSPRE_DEFAULT ( _MODEM_PRE_DSSSPRE_DEFAULT << 11)
#define	MODEM_PRE_PREERRORS_DEFAULT ( _MODEM_PRE_PREERRORS_DEFAULT << 7)
#define	MODEM_PRE_PRESYMB4FSK (0x1UL << 6)
#define	MODEM_PRE_PRESYMB4FSK_DEFAULT ( _MODEM_PRE_PRESYMB4FSK_DEFAULT << 6)
#define	MODEM_PRE_PRESYMB4FSK_INNER ( _MODEM_PRE_PRESYMB4FSK_INNER << 6)
#define	MODEM_PRE_PRESYMB4FSK_OUTER ( _MODEM_PRE_PRESYMB4FSK_OUTER << 6)
#define	MODEM_PRE_SYNCSYMB4FSK (0x1UL << 12)
#define	MODEM_PRE_SYNCSYMB4FSK_DEFAULT ( _MODEM_PRE_SYNCSYMB4FSK_DEFAULT << 12)
#define	MODEM_PRE_SYNCSYMB4FSK_FSK2 ( _MODEM_PRE_SYNCSYMB4FSK_FSK2 << 12)
#define	MODEM_PRE_SYNCSYMB4FSK_FSK4 ( _MODEM_PRE_SYNCSYMB4FSK_FSK4 << 12)
#define	MODEM_PRE_TXBASES_DEFAULT ( _MODEM_PRE_TXBASES_DEFAULT << 16)
#define	MODEM_PRSCTRL_ADVANCESEL_DEFAULT ( _MODEM_PRSCTRL_ADVANCESEL_DEFAULT << 2)
#define	MODEM_PRSCTRL_ANT0SEL_DEFAULT ( _MODEM_PRSCTRL_ANT0SEL_DEFAULT << 14)
#define	MODEM_PRSCTRL_ANT1SEL_DEFAULT ( _MODEM_PRSCTRL_ANT1SEL_DEFAULT << 16)
#define	MODEM_PRSCTRL_LOWCORRSEL_DEFAULT ( _MODEM_PRSCTRL_LOWCORRSEL_DEFAULT << 12)
#define	MODEM_PRSCTRL_NEWWNDSEL_DEFAULT ( _MODEM_PRSCTRL_NEWWNDSEL_DEFAULT << 4)
#define	MODEM_PRSCTRL_POSTPONESEL_DEFAULT ( _MODEM_PRSCTRL_POSTPONESEL_DEFAULT << 0)
#define	MODEM_PRSCTRL_PRESENTSEL_DEFAULT ( _MODEM_PRSCTRL_PRESENTSEL_DEFAULT << 10)
#define	MODEM_PRSCTRL_SYNCSENTSEL_DEFAULT ( _MODEM_PRSCTRL_SYNCSENTSEL_DEFAULT << 8)
#define	MODEM_PRSCTRL_WEAKSEL_DEFAULT ( _MODEM_PRSCTRL_WEAKSEL_DEFAULT << 6)
#define	MODEM_RAMPCTRL_RAMPRATE0_DEFAULT ( _MODEM_RAMPCTRL_RAMPRATE0_DEFAULT << 0)
#define	MODEM_RAMPCTRL_RAMPRATE1_DEFAULT ( _MODEM_RAMPCTRL_RAMPRATE1_DEFAULT << 4)
#define	MODEM_RAMPCTRL_RAMPRATE2_DEFAULT ( _MODEM_RAMPCTRL_RAMPRATE2_DEFAULT << 8)
#define	MODEM_RAMPLEV_RAMPLEV0_DEFAULT ( _MODEM_RAMPLEV_RAMPLEV0_DEFAULT << 0)
#define	MODEM_RAMPLEV_RAMPLEV1_DEFAULT ( _MODEM_RAMPLEV_RAMPLEV1_DEFAULT << 8)
#define	MODEM_RAMPLEV_RAMPLEV2_DEFAULT ( _MODEM_RAMPLEV_RAMPLEV2_DEFAULT << 16)
#define	MODEM_RXBR_RXBRDEN_DEFAULT ( _MODEM_RXBR_RXBRDEN_DEFAULT << 5)
#define	MODEM_RXBR_RXBRINT_DEFAULT ( _MODEM_RXBR_RXBRINT_DEFAULT << 10)
#define	MODEM_RXBR_RXBRNUM_DEFAULT ( _MODEM_RXBR_RXBRNUM_DEFAULT << 0)
#define	MODEM_SHAPING0_COEFF0_DEFAULT ( _MODEM_SHAPING0_COEFF0_DEFAULT << 0)
#define	MODEM_SHAPING0_COEFF1_DEFAULT ( _MODEM_SHAPING0_COEFF1_DEFAULT << 8)
#define	MODEM_SHAPING0_COEFF2_DEFAULT ( _MODEM_SHAPING0_COEFF2_DEFAULT << 16)
#define	MODEM_SHAPING0_COEFF3_DEFAULT ( _MODEM_SHAPING0_COEFF3_DEFAULT << 24)
#define	MODEM_SHAPING1_COEFF4_DEFAULT ( _MODEM_SHAPING1_COEFF4_DEFAULT << 0)
#define	MODEM_SHAPING1_COEFF5_DEFAULT ( _MODEM_SHAPING1_COEFF5_DEFAULT << 8)
#define	MODEM_SHAPING1_COEFF6_DEFAULT ( _MODEM_SHAPING1_COEFF6_DEFAULT << 16)
#define	MODEM_SHAPING1_COEFF7_DEFAULT ( _MODEM_SHAPING1_COEFF7_DEFAULT << 24)
#define	MODEM_SHAPING2_COEFF10_DEFAULT ( _MODEM_SHAPING2_COEFF10_DEFAULT << 16)
#define	MODEM_SHAPING2_COEFF11_DEFAULT ( _MODEM_SHAPING2_COEFF11_DEFAULT << 24)
#define	MODEM_SHAPING2_COEFF8_DEFAULT ( _MODEM_SHAPING2_COEFF8_DEFAULT << 0)
#define	MODEM_SHAPING2_COEFF9_DEFAULT ( _MODEM_SHAPING2_COEFF9_DEFAULT << 8)
#define	MODEM_SHAPING3_COEFF12_DEFAULT ( _MODEM_SHAPING3_COEFF12_DEFAULT << 0)
#define	MODEM_SHAPING3_COEFF13_DEFAULT ( _MODEM_SHAPING3_COEFF13_DEFAULT << 8)
#define	MODEM_SHAPING3_COEFF14_DEFAULT ( _MODEM_SHAPING3_COEFF14_DEFAULT << 16)
#define	MODEM_SHAPING3_COEFF15_DEFAULT ( _MODEM_SHAPING3_COEFF15_DEFAULT << 24)
#define	MODEM_SHAPING4_COEFF16_DEFAULT ( _MODEM_SHAPING4_COEFF16_DEFAULT << 0)
#define	MODEM_SHAPING4_COEFF17_DEFAULT ( _MODEM_SHAPING4_COEFF17_DEFAULT << 6)
#define	MODEM_SHAPING4_COEFF18_DEFAULT ( _MODEM_SHAPING4_COEFF18_DEFAULT << 12)
#define	MODEM_SHAPING4_COEFF19_DEFAULT ( _MODEM_SHAPING4_COEFF19_DEFAULT << 18)
#define	MODEM_SHAPING4_COEFF20_DEFAULT ( _MODEM_SHAPING4_COEFF20_DEFAULT << 23)
#define	MODEM_SHAPING4_COEFF21_DEFAULT ( _MODEM_SHAPING4_COEFF21_DEFAULT << 28)
#define	MODEM_SHAPING5_COEFF22_DEFAULT ( _MODEM_SHAPING5_COEFF22_DEFAULT << 0)
#define	MODEM_SHAPING5_COEFF23_DEFAULT ( _MODEM_SHAPING5_COEFF23_DEFAULT << 4)
#define	MODEM_SHAPING5_COEFF24_DEFAULT ( _MODEM_SHAPING5_COEFF24_DEFAULT << 8)
#define	MODEM_SHAPING5_COEFF25_DEFAULT ( _MODEM_SHAPING5_COEFF25_DEFAULT << 12)
#define	MODEM_SHAPING5_COEFF26_DEFAULT ( _MODEM_SHAPING5_COEFF26_DEFAULT << 16)
#define	MODEM_SHAPING5_COEFF27_DEFAULT ( _MODEM_SHAPING5_COEFF27_DEFAULT << 20)
#define	MODEM_SHAPING5_COEFF28_DEFAULT ( _MODEM_SHAPING5_COEFF28_DEFAULT << 24)
#define	MODEM_SHAPING5_COEFF29_DEFAULT ( _MODEM_SHAPING5_COEFF29_DEFAULT << 28)
#define	MODEM_SHAPING6_COEFF30_DEFAULT ( _MODEM_SHAPING6_COEFF30_DEFAULT << 0)
#define	MODEM_SHAPING6_COEFF31_DEFAULT ( _MODEM_SHAPING6_COEFF31_DEFAULT << 4)
#define	MODEM_SHAPING6_COEFF32_DEFAULT ( _MODEM_SHAPING6_COEFF32_DEFAULT << 8)
#define	MODEM_SHAPING6_COEFF33_DEFAULT ( _MODEM_SHAPING6_COEFF33_DEFAULT << 11)
#define	MODEM_SHAPING6_COEFF34_DEFAULT ( _MODEM_SHAPING6_COEFF34_DEFAULT << 14)
#define	MODEM_SHAPING6_COEFF35_DEFAULT ( _MODEM_SHAPING6_COEFF35_DEFAULT << 17)
#define	MODEM_SHAPING6_COEFF36_DEFAULT ( _MODEM_SHAPING6_COEFF36_DEFAULT << 20)
#define	MODEM_SHAPING6_COEFF37_DEFAULT ( _MODEM_SHAPING6_COEFF37_DEFAULT << 23)
#define	MODEM_SHAPING6_COEFF38_DEFAULT ( _MODEM_SHAPING6_COEFF38_DEFAULT << 26)
#define	MODEM_SHAPING6_COEFF39_DEFAULT ( _MODEM_SHAPING6_COEFF39_DEFAULT << 29)
#define	MODEM_SRCCHF_BWSEL_DEFAULT ( _MODEM_SRCCHF_BWSEL_DEFAULT << 29)
#define	MODEM_SRCCHF_BWSEL_X0 ( _MODEM_SRCCHF_BWSEL_X0 << 29)
#define	MODEM_SRCCHF_BWSEL_X1 ( _MODEM_SRCCHF_BWSEL_X1 << 29)
#define	MODEM_SRCCHF_BWSEL_X2 ( _MODEM_SRCCHF_BWSEL_X2 << 29)
#define	MODEM_SRCCHF_BWSEL_X3 ( _MODEM_SRCCHF_BWSEL_X3 << 29)
#define	MODEM_SRCCHF_INTOSR (0x1UL << 31)
#define	MODEM_SRCCHF_INTOSR_DEFAULT ( _MODEM_SRCCHF_INTOSR_DEFAULT << 31)
#define	MODEM_SRCCHF_SRCENABLE1 (0x1UL << 11)
#define	MODEM_SRCCHF_SRCENABLE1_DEFAULT ( _MODEM_SRCCHF_SRCENABLE1_DEFAULT << 11)
#define	MODEM_SRCCHF_SRCENABLE2 (0x1UL << 27)
#define	MODEM_SRCCHF_SRCENABLE2_DEFAULT ( _MODEM_SRCCHF_SRCENABLE2_DEFAULT << 27)
#define	MODEM_SRCCHF_SRCRATIO1_DEFAULT ( _MODEM_SRCCHF_SRCRATIO1_DEFAULT << 0)
#define	MODEM_SRCCHF_SRCRATIO2_DEFAULT ( _MODEM_SRCCHF_SRCRATIO2_DEFAULT << 12)
#define	MODEM_STATUS2_BBSSMUX_DEFAULT ( _MODEM_STATUS2_BBSSMUX_DEFAULT << 8)
#define	MODEM_STATUS2_CHPWRACCUMUX_DEFAULT ( _MODEM_STATUS2_CHPWRACCUMUX_DEFAULT << 0)
#define	MODEM_STATUS2_LRBLECI_DEFAULT ( _MODEM_STATUS2_LRBLECI_DEFAULT << 12)
#define	MODEM_STATUS2_LRBLECI_LR125k ( _MODEM_STATUS2_LRBLECI_LR125k << 12)
#define	MODEM_STATUS2_LRBLECI_LR500k ( _MODEM_STATUS2_LRBLECI_LR500k << 12)
#define	MODEM_STATUS3_BBPFOUTABS1_DEFAULT ( _MODEM_STATUS3_BBPFOUTABS1_DEFAULT << 0)
#define	MODEM_STATUS3_BBPFOUTABS_DEFAULT ( _MODEM_STATUS3_BBPFOUTABS_DEFAULT << 11)
#define	MODEM_STATUS3_COHDSADET (0x1UL << 25)
#define	MODEM_STATUS3_COHDSADET_DEFAULT ( _MODEM_STATUS3_COHDSADET_DEFAULT << 25)
#define	MODEM_STATUS3_COHDSALIVE (0x1UL << 23)
#define	MODEM_STATUS3_COHDSALIVE_DEFAULT ( _MODEM_STATUS3_COHDSALIVE_DEFAULT << 23)
#define	MODEM_STATUS3_LRDSADET (0x1UL << 24)
#define	MODEM_STATUS3_LRDSADET_DEFAULT ( _MODEM_STATUS3_LRDSADET_DEFAULT << 24)
#define	MODEM_STATUS3_LRDSALIVE (0x1UL << 22)
#define	MODEM_STATUS3_LRDSALIVE_DEFAULT ( _MODEM_STATUS3_LRDSALIVE_DEFAULT << 22)
#define	MODEM_STATUS3_SYNCSECPEAKABTH (0x1UL << 26)
#define	MODEM_STATUS3_SYNCSECPEAKABTH_DEFAULT ( _MODEM_STATUS3_SYNCSECPEAKABTH_DEFAULT << 26)
#define	MODEM_STATUS_ANTSEL (0x1UL << 5)
#define	MODEM_STATUS_ANTSEL_ANTENNA0 ( _MODEM_STATUS_ANTSEL_ANTENNA0 << 5)
#define	MODEM_STATUS_ANTSEL_ANTENNA1 ( _MODEM_STATUS_ANTSEL_ANTENNA1 << 5)
#define	MODEM_STATUS_ANTSEL_DEFAULT ( _MODEM_STATUS_ANTSEL_DEFAULT << 5)
#define	MODEM_STATUS_CORR_DEFAULT ( _MODEM_STATUS_CORR_DEFAULT << 16)
#define	MODEM_STATUS_DEMODSTATE_DEFAULT ( _MODEM_STATUS_DEMODSTATE_DEFAULT << 0)
#define	MODEM_STATUS_DEMODSTATE_FRAMEDETMODE0 ( _MODEM_STATUS_DEMODSTATE_FRAMEDETMODE0 << 0)
#define	MODEM_STATUS_DEMODSTATE_FRAMESEARCH ( _MODEM_STATUS_DEMODSTATE_FRAMESEARCH << 0)
#define	MODEM_STATUS_DEMODSTATE_OFF ( _MODEM_STATUS_DEMODSTATE_OFF << 0)
#define	MODEM_STATUS_DEMODSTATE_PRESEARCH ( _MODEM_STATUS_DEMODSTATE_PRESEARCH << 0)
#define	MODEM_STATUS_DEMODSTATE_RXFRAME ( _MODEM_STATUS_DEMODSTATE_RXFRAME << 0)
#define	MODEM_STATUS_DEMODSTATE_TIMINGSEARCH ( _MODEM_STATUS_DEMODSTATE_TIMINGSEARCH << 0)
#define	MODEM_STATUS_DSADETECTED (0x1UL << 8)
#define	MODEM_STATUS_DSADETECTED_DEFAULT ( _MODEM_STATUS_DSADETECTED_DEFAULT << 8)
#define	MODEM_STATUS_DSAFREQESTDONE (0x1UL << 9)
#define	MODEM_STATUS_DSAFREQESTDONE_DEFAULT ( _MODEM_STATUS_DSAFREQESTDONE_DEFAULT << 9)
#define	MODEM_STATUS_FRAMEDETID (0x1UL << 4)
#define	MODEM_STATUS_FRAMEDETID_DEFAULT ( _MODEM_STATUS_FRAMEDETID_DEFAULT << 4)
#define	MODEM_STATUS_FRAMEDETID_FRAMEDET0 ( _MODEM_STATUS_FRAMEDETID_FRAMEDET0 << 4)
#define	MODEM_STATUS_FRAMEDETID_FRAMEDET1 ( _MODEM_STATUS_FRAMEDETID_FRAMEDET1 << 4)
#define	MODEM_STATUS_STAMPSTATE_DEFAULT ( _MODEM_STATUS_STAMPSTATE_DEFAULT << 12)
#define	MODEM_STATUS_TIMLOSTCAUSE (0x1UL << 7)
#define	MODEM_STATUS_TIMLOSTCAUSE_DEFAULT ( _MODEM_STATUS_TIMLOSTCAUSE_DEFAULT << 7)
#define	MODEM_STATUS_TIMLOSTCAUSE_LOWCORR ( _MODEM_STATUS_TIMLOSTCAUSE_LOWCORR << 7)
#define	MODEM_STATUS_TIMLOSTCAUSE_TIMEOUT ( _MODEM_STATUS_TIMLOSTCAUSE_TIMEOUT << 7)
#define	MODEM_STATUS_TIMSEQINV (0x1UL << 6)
#define	MODEM_STATUS_TIMSEQINV_DEFAULT ( _MODEM_STATUS_TIMSEQINV_DEFAULT << 6)
#define	MODEM_STATUS_VITERBIDEMODFRAMEDET (0x1UL << 11)
#define	MODEM_STATUS_VITERBIDEMODFRAMEDET_DEFAULT ( _MODEM_STATUS_VITERBIDEMODFRAMEDET_DEFAULT << 11)
#define	MODEM_STATUS_VITERBIDEMODTIMDET (0x1UL << 10)
#define	MODEM_STATUS_VITERBIDEMODTIMDET_DEFAULT ( _MODEM_STATUS_VITERBIDEMODTIMDET_DEFAULT << 10)
#define	MODEM_STATUS_WEAKSYMBOLS_DEFAULT ( _MODEM_STATUS_WEAKSYMBOLS_DEFAULT << 24)
#define	MODEM_SYNC0_SYNC0_DEFAULT ( _MODEM_SYNC0_SYNC0_DEFAULT << 0)
#define	MODEM_SYNC1_SYNC1_DEFAULT ( _MODEM_SYNC1_SYNC1_DEFAULT << 0)
#define	MODEM_SYNCPROPERTIES_SYNCCORRCLR (0x1UL << 0)
#define	MODEM_SYNCPROPERTIES_SYNCCORRCLR_DEFAULT ( _MODEM_SYNCPROPERTIES_SYNCCORRCLR_DEFAULT << 0)
#define	MODEM_SYNCPROPERTIES_SYNCSECPEAKTH_DEFAULT ( _MODEM_SYNCPROPERTIES_SYNCSECPEAKTH_DEFAULT << 1)
#define	MODEM_TIMDETSTATUS_TIMDETCORR_DEFAULT ( _MODEM_TIMDETSTATUS_TIMDETCORR_DEFAULT << 0)
#define	MODEM_TIMDETSTATUS_TIMDETFREQOFFEST_DEFAULT ( _MODEM_TIMDETSTATUS_TIMDETFREQOFFEST_DEFAULT << 8)
#define	MODEM_TIMDETSTATUS_TIMDETINDEX_DEFAULT ( _MODEM_TIMDETSTATUS_TIMDETINDEX_DEFAULT << 25)
#define	MODEM_TIMDETSTATUS_TIMDETPASS (0x1UL << 24)
#define	MODEM_TIMDETSTATUS_TIMDETPASS_DEFAULT ( _MODEM_TIMDETSTATUS_TIMDETPASS_DEFAULT << 24)
#define	MODEM_TIMDETSTATUS_TIMDETPREERRORS_DEFAULT ( _MODEM_TIMDETSTATUS_TIMDETPREERRORS_DEFAULT << 16)
#define	MODEM_TIMING_ADDTIMSEQ_DEFAULT ( _MODEM_TIMING_ADDTIMSEQ_DEFAULT << 12)
#define	MODEM_TIMING_FASTRESYNC_DEFAULT ( _MODEM_TIMING_FASTRESYNC_DEFAULT << 30)
#define	MODEM_TIMING_FASTRESYNC_DIS ( _MODEM_TIMING_FASTRESYNC_DIS << 30)
#define	MODEM_TIMING_FASTRESYNC_FRAMEDET ( _MODEM_TIMING_FASTRESYNC_FRAMEDET << 30)
#define	MODEM_TIMING_FASTRESYNC_PREDET ( _MODEM_TIMING_FASTRESYNC_PREDET << 30)
#define	MODEM_TIMING_FDM0THRESH_DEFAULT ( _MODEM_TIMING_FDM0THRESH_DEFAULT << 18)
#define	MODEM_TIMING_OFFSUBDEN_DEFAULT ( _MODEM_TIMING_OFFSUBDEN_DEFAULT << 25)
#define	MODEM_TIMING_OFFSUBNUM_DEFAULT ( _MODEM_TIMING_OFFSUBNUM_DEFAULT << 21)
#define	MODEM_TIMING_TIMINGBASES_DEFAULT ( _MODEM_TIMING_TIMINGBASES_DEFAULT << 8)
#define	MODEM_TIMING_TIMSEQINVEN (0x1UL << 16)
#define	MODEM_TIMING_TIMSEQINVEN_DEFAULT ( _MODEM_TIMING_TIMSEQINVEN_DEFAULT << 16)
#define	MODEM_TIMING_TIMSEQSYNC (0x1UL << 17)
#define	MODEM_TIMING_TIMSEQSYNC_DEFAULT ( _MODEM_TIMING_TIMSEQSYNC_DEFAULT << 17)
#define	MODEM_TIMING_TIMTHRESH_DEFAULT ( _MODEM_TIMING_TIMTHRESH_DEFAULT << 0)
#define	MODEM_TIMING_TSAGCDEL (0x1UL << 29)
#define	MODEM_TIMING_TSAGCDEL_DEFAULT ( _MODEM_TIMING_TSAGCDEL_DEFAULT << 29)
#define	MODEM_TXBR_TXBRDEN_DEFAULT ( _MODEM_TXBR_TXBRDEN_DEFAULT << 16)
#define	MODEM_TXBR_TXBRNUM_DEFAULT ( _MODEM_TXBR_TXBRNUM_DEFAULT << 0)
#define	MODEM_VITERBIDEMOD_CORRCYCLE_DEFAULT ( _MODEM_VITERBIDEMOD_CORRCYCLE_DEFAULT << 23)
#define	MODEM_VITERBIDEMOD_CORRSTPSIZE_DEFAULT ( _MODEM_VITERBIDEMOD_CORRSTPSIZE_DEFAULT << 27)
#define	MODEM_VITERBIDEMOD_DISDEMODOF (0x1UL << 31)
#define	MODEM_VITERBIDEMOD_DISDEMODOF_DEFAULT ( _MODEM_VITERBIDEMOD_DISDEMODOF_DEFAULT << 31)
#define	MODEM_VITERBIDEMOD_HARDDECISION (0x1UL << 1)
#define	MODEM_VITERBIDEMOD_HARDDECISION_DEFAULT ( _MODEM_VITERBIDEMOD_HARDDECISION_DEFAULT << 1)
#define	MODEM_VITERBIDEMOD_SYNTHAFC (0x1UL << 22)
#define	MODEM_VITERBIDEMOD_SYNTHAFC_DEFAULT ( _MODEM_VITERBIDEMOD_SYNTHAFC_DEFAULT << 22)
#define	MODEM_VITERBIDEMOD_VITERBIKSI1_DEFAULT ( _MODEM_VITERBIDEMOD_VITERBIKSI1_DEFAULT << 2)
#define	MODEM_VITERBIDEMOD_VITERBIKSI2_DEFAULT ( _MODEM_VITERBIDEMOD_VITERBIKSI2_DEFAULT << 9)
#define	MODEM_VITERBIDEMOD_VITERBIKSI3_DEFAULT ( _MODEM_VITERBIDEMOD_VITERBIKSI3_DEFAULT << 16)
#define	MODEM_VITERBIDEMOD_VTDEMODEN (0x1UL << 0)
#define	MODEM_VITERBIDEMOD_VTDEMODEN_DEFAULT ( _MODEM_VITERBIDEMOD_VTDEMODEN_DEFAULT << 0)
#define	MODEM_VTBLETIMING_FLENOFF_DEFAULT ( _MODEM_VTBLETIMING_FLENOFF_DEFAULT << 12)
#define	MODEM_VTBLETIMING_TIMINGDELAY_DEFAULT ( _MODEM_VTBLETIMING_TIMINGDELAY_DEFAULT << 4)
#define	MODEM_VTBLETIMING_VTBLETIMINGSEL_DEFAULT ( _MODEM_VTBLETIMING_VTBLETIMINGSEL_DEFAULT << 0)
#define	MODEM_VTBLETIMING_VTBLETIMINGSEL_END_FRAME ( _MODEM_VTBLETIMING_VTBLETIMINGSEL_END_FRAME << 0)
#define	MODEM_VTBLETIMING_VTBLETIMINGSEL_END_FRAME_PULSE ( _MODEM_VTBLETIMING_VTBLETIMINGSEL_END_FRAME_PULSE << 0)
#define	MODEM_VTBLETIMING_VTBLETIMINGSEL_FRAMEDET_DELAY ( _MODEM_VTBLETIMING_VTBLETIMINGSEL_FRAMEDET_DELAY << 0)
#define	MODEM_VTBLETIMING_VTBLETIMINGSEL_INV_END_FRAME ( _MODEM_VTBLETIMING_VTBLETIMINGSEL_INV_END_FRAME << 0)
#define	MODEM_VTCORRCFG0_EXPECTPATT_DEFAULT ( _MODEM_VTCORRCFG0_EXPECTPATT_DEFAULT << 0)
#define	MODEM_VTCORRCFG1_BUFFHEAD_DEFAULT ( _MODEM_VTCORRCFG1_BUFFHEAD_DEFAULT << 23)
#define	MODEM_VTCORRCFG1_CORRSHFTLEN_DEFAULT ( _MODEM_VTCORRCFG1_CORRSHFTLEN_DEFAULT << 0)
#define	MODEM_VTCORRCFG1_EXPECTHT_DEFAULT ( _MODEM_VTCORRCFG1_EXPECTHT_DEFAULT << 27)
#define	MODEM_VTCORRCFG1_EXPSYNCLEN_DEFAULT ( _MODEM_VTCORRCFG1_EXPSYNCLEN_DEFAULT << 15)
#define	MODEM_VTCORRCFG1_VTFRQLIM_DEFAULT ( _MODEM_VTCORRCFG1_VTFRQLIM_DEFAULT << 6)
#define	MODEM_VTTRACK_FREQBIAS_DEFAULT ( _MODEM_VTTRACK_FREQBIAS_DEFAULT << 18)
#define	MODEM_VTTRACK_FREQTRACKMODE_DEFAULT ( _MODEM_VTTRACK_FREQTRACKMODE_DEFAULT << 0)
#define	MODEM_VTTRACK_FREQTRACKMODE_DISABLED ( _MODEM_VTTRACK_FREQTRACKMODE_DISABLED << 0)
#define	MODEM_VTTRACK_FREQTRACKMODE_MODE1 ( _MODEM_VTTRACK_FREQTRACKMODE_MODE1 << 0)
#define	MODEM_VTTRACK_FREQTRACKMODE_MODE2 ( _MODEM_VTTRACK_FREQTRACKMODE_MODE2 << 0)
#define	MODEM_VTTRACK_FREQTRACKMODE_MODE3 ( _MODEM_VTTRACK_FREQTRACKMODE_MODE3 << 0)
#define	MODEM_VTTRACK_HIPWRTHD_DEFAULT ( _MODEM_VTTRACK_HIPWRTHD_DEFAULT << 22)
#define	MODEM_VTTRACK_TIMCHK (0x1UL << 14)
#define	MODEM_VTTRACK_TIMCHK_DEFAULT ( _MODEM_VTTRACK_TIMCHK_DEFAULT << 14)
#define	MODEM_VTTRACK_TIMEACQUTHD_DEFAULT ( _MODEM_VTTRACK_TIMEACQUTHD_DEFAULT << 6)
#define	MODEM_VTTRACK_TIMEOUTMODE (0x1UL << 15)
#define	MODEM_VTTRACK_TIMEOUTMODE_DEFAULT ( _MODEM_VTTRACK_TIMEOUTMODE_DEFAULT << 15)
#define	MODEM_VTTRACK_TIMGEAR_DEFAULT ( _MODEM_VTTRACK_TIMGEAR_DEFAULT << 16)
#define	MODEM_VTTRACK_TIMGEAR_GEAR0 ( _MODEM_VTTRACK_TIMGEAR_GEAR0 << 16)
#define	MODEM_VTTRACK_TIMGEAR_GEAR1 ( _MODEM_VTTRACK_TIMGEAR_GEAR1 << 16)
#define	MODEM_VTTRACK_TIMGEAR_GEAR2 ( _MODEM_VTTRACK_TIMGEAR_GEAR2 << 16)
#define	MODEM_VTTRACK_TIMTRACKTHD_DEFAULT ( _MODEM_VTTRACK_TIMTRACKTHD_DEFAULT << 2)

Macro Definition Documentation