Detailed Description

Silicon Labs CMSIS-CORE device headers.

CMSIS-CORE compliant device headers for EFM32, EZR32 and EFR32 MCUs and SoCs from Silicon Laboratories.

Modules
ACMP
EFR32MG21 ACMP Register Declaration.

AES
EFR32MG21 AES Register Declaration.

AGC
EFR32MG21 AGC Register Declaration.

AMUXCP
EFR32MG21 AMUXCP Register Declaration.

BUFC
EFR32MG21 BUFC Register Declaration.

BURAM
EFR32MG21 BURAM Register Declaration.

BURTC
EFR32MG21 BURTC Register Declaration.

CMU
EFR32MG21 CMU Register Declaration.

DEVINFO
EFR32MG21 DEVINFO Register Declaration.

DMA Descriptor

DPLL
EFR32MG21 DPLL Register Declaration.

EFR32MG21A020F1024IM32

EMU
EFR32MG21 EMU Register Declaration.

FRC
EFR32MG21 FRC Register Declaration.

FSRCO
EFR32MG21 FSRCO Register Declaration.

GPCRC
EFR32MG21 GPCRC Register Declaration.

HFRCO
EFR32MG21 HFRCO Register Declaration.

HFXO
EFR32MG21 HFXO Register Declaration.

I2C
EFR32MG21 I2C Register Declaration.

IADC
EFR32MG21 IADC Register Declaration.

ICACHE
EFR32MG21 ICACHE Register Declaration.

LDMA
EFR32MG21 LDMA Register Declaration.

LDMAXBAR
EFR32MG21 LDMAXBAR Register Declaration.

LETIMER
EFR32MG21 LETIMER Register Declaration.

LFRCO
EFR32MG21 LFRCO Register Declaration.

LFXO
EFR32MG21 LFXO Register Declaration.

LVGD
EFR32MG21 LVGD Register Declaration.

MODEM
EFR32MG21 MODEM Register Declaration.

MSC
EFR32MG21 MSC Register Declaration.

PROTIMER
EFR32MG21 PROTIMER Register Declaration.

PRS
EFR32MG21 PRS Register Declaration.

RAC
EFR32MG21 RAC Register Declaration.

RFCRC
EFR32MG21 RFCRC Register Declaration.

RTCC
EFR32MG21 RTCC Register Declaration.

SEMAILBOX_HOST
EFR32MG21 SEMAILBOX_HOST Register Declaration.

SEMAILBOX_SE
EFR32MG21 SEMAILBOX_SE Register Declaration.

SMU
EFR32MG21 SMU Register Declaration.

SYNTH
EFR32MG21 SYNTH Register Declaration.

SYSCFG
EFR32MG21 SYSCFG Register Declaration.

TIMER
EFR32MG21 TIMER Register Declaration.

ULFRCO
EFR32MG21 ULFRCO Register Declaration.

USART
EFR32MG21 USART Register Declaration.

WDOG
EFR32MG21 WDOG Register Declaration.

Data Structures
struct	GPIO_ACMPROUTE_TypeDef

struct	GPIO_CMUROUTE_TypeDef

struct	GPIO_FRCROUTE_TypeDef

struct	GPIO_I2CROUTE_TypeDef

struct	GPIO_LETIMERROUTE_TypeDef

struct	GPIO_MODEMROUTE_TypeDef

struct	GPIO_PORT_TypeDef
	GPIO_P EFR32MG21 GPIO PORT.

struct	GPIO_PRSROUTE_TypeDef

struct	GPIO_TIMERROUTE_TypeDef

struct	GPIO_TypeDef

struct	GPIO_USARTROUTE_TypeDef

Macros
#define	_GPIO_ABUSALLOC_AEVEN0_ACMP0 0x00000002UL

#define	_GPIO_ABUSALLOC_AEVEN0_ACMP1 0x00000003UL

#define	_GPIO_ABUSALLOC_AEVEN0_ADC0 0x00000001UL

#define	_GPIO_ABUSALLOC_AEVEN0_DEBUG 0x0000000FUL

#define	_GPIO_ABUSALLOC_AEVEN0_DEFAULT 0x00000000UL

#define	_GPIO_ABUSALLOC_AEVEN0_DIAGA 0x0000000EUL

#define	_GPIO_ABUSALLOC_AEVEN0_MASK 0xFUL

#define	_GPIO_ABUSALLOC_AEVEN0_SHIFT 0

#define	_GPIO_ABUSALLOC_AEVEN0_TRISTATE 0x00000000UL

#define	_GPIO_ABUSALLOC_AEVEN1_ACMP0 0x00000002UL

#define	_GPIO_ABUSALLOC_AEVEN1_ACMP1 0x00000003UL

#define	_GPIO_ABUSALLOC_AEVEN1_ADC0 0x00000001UL

#define	_GPIO_ABUSALLOC_AEVEN1_DEBUG 0x0000000FUL

#define	_GPIO_ABUSALLOC_AEVEN1_DEFAULT 0x00000000UL

#define	_GPIO_ABUSALLOC_AEVEN1_MASK 0xF00UL

#define	_GPIO_ABUSALLOC_AEVEN1_SHIFT 8

#define	_GPIO_ABUSALLOC_AEVEN1_TRISTATE 0x00000000UL

#define	_GPIO_ABUSALLOC_AODD0_ACMP0 0x00000002UL

#define	_GPIO_ABUSALLOC_AODD0_ACMP1 0x00000003UL

#define	_GPIO_ABUSALLOC_AODD0_ADC0 0x00000001UL

#define	_GPIO_ABUSALLOC_AODD0_DEBUG 0x0000000FUL

#define	_GPIO_ABUSALLOC_AODD0_DEFAULT 0x00000000UL

#define	_GPIO_ABUSALLOC_AODD0_DIAGA 0x0000000EUL

#define	_GPIO_ABUSALLOC_AODD0_MASK 0xF0000UL

#define	_GPIO_ABUSALLOC_AODD0_SHIFT 16

#define	_GPIO_ABUSALLOC_AODD0_TRISTATE 0x00000000UL

#define	_GPIO_ABUSALLOC_AODD1_ACMP0 0x00000002UL

#define	_GPIO_ABUSALLOC_AODD1_ACMP1 0x00000003UL

#define	_GPIO_ABUSALLOC_AODD1_ADC0 0x00000001UL

#define	_GPIO_ABUSALLOC_AODD1_DEBUG 0x0000000FUL

#define	_GPIO_ABUSALLOC_AODD1_DEFAULT 0x00000000UL

#define	_GPIO_ABUSALLOC_AODD1_MASK 0xF000000UL

#define	_GPIO_ABUSALLOC_AODD1_SHIFT 24

#define	_GPIO_ABUSALLOC_AODD1_TRISTATE 0x00000000UL

#define	_GPIO_ABUSALLOC_MASK 0x0F0F0F0FUL

#define	_GPIO_ABUSALLOC_RESETVALUE 0x00000000UL

#define	_GPIO_ACMP_ACMPOUTROUTE_MASK 0x000F0003UL

#define	_GPIO_ACMP_ACMPOUTROUTE_PIN_DEFAULT 0x00000000UL

#define	_GPIO_ACMP_ACMPOUTROUTE_PIN_MASK 0xF0000UL

#define	_GPIO_ACMP_ACMPOUTROUTE_PIN_SHIFT 16

#define	_GPIO_ACMP_ACMPOUTROUTE_PORT_DEFAULT 0x00000000UL

#define	_GPIO_ACMP_ACMPOUTROUTE_PORT_MASK 0x3UL

#define	_GPIO_ACMP_ACMPOUTROUTE_PORT_SHIFT 0

#define	_GPIO_ACMP_ACMPOUTROUTE_RESETVALUE 0x00000000UL

#define	_GPIO_ACMP_ROUTEEN_ACMPOUTPEN_DEFAULT 0x00000000UL

#define	_GPIO_ACMP_ROUTEEN_ACMPOUTPEN_MASK 0x1UL

#define	_GPIO_ACMP_ROUTEEN_ACMPOUTPEN_SHIFT 0

#define	_GPIO_ACMP_ROUTEEN_MASK 0x00000001UL

#define	_GPIO_ACMP_ROUTEEN_RESETVALUE 0x00000000UL

#define	_GPIO_AEVEN0SWITCH_AEVEN0SWITCH_DEFAULT 0x00000000UL

#define	_GPIO_AEVEN0SWITCH_AEVEN0SWITCH_MASK 0xFUL

#define	_GPIO_AEVEN0SWITCH_AEVEN0SWITCH_SHIFT 0

#define	_GPIO_AEVEN0SWITCH_MASK 0x0000000FUL

#define	_GPIO_AEVEN0SWITCH_RESETVALUE 0x00000000UL

#define	_GPIO_AEVEN1SWITCH_AEVEN1SWITCH_DEFAULT 0x00000000UL

#define	_GPIO_AEVEN1SWITCH_AEVEN1SWITCH_MASK 0xFUL

#define	_GPIO_AEVEN1SWITCH_AEVEN1SWITCH_SHIFT 0

#define	_GPIO_AEVEN1SWITCH_MASK 0x0000000FUL

#define	_GPIO_AEVEN1SWITCH_RESETVALUE 0x00000000UL

#define	_GPIO_AODD0SWITCH_AODD0SWITCH_DEFAULT 0x00000000UL

#define	_GPIO_AODD0SWITCH_AODD0SWITCH_MASK 0x7UL

#define	_GPIO_AODD0SWITCH_AODD0SWITCH_SHIFT 0

#define	_GPIO_AODD0SWITCH_MASK 0x00000007UL

#define	_GPIO_AODD0SWITCH_RESETVALUE 0x00000000UL

#define	_GPIO_AODD1SWITCH_AODD1SWITCH_DEFAULT 0x00000000UL

#define	_GPIO_AODD1SWITCH_AODD1SWITCH_MASK 0x7UL

#define	_GPIO_AODD1SWITCH_AODD1SWITCH_SHIFT 0

#define	_GPIO_AODD1SWITCH_MASK 0x00000007UL

#define	_GPIO_AODD1SWITCH_RESETVALUE 0x00000000UL

#define	_GPIO_BBUSALLOC_BEVEN0_ACMP0 0x00000002UL

#define	_GPIO_BBUSALLOC_BEVEN0_ACMP1 0x00000003UL

#define	_GPIO_BBUSALLOC_BEVEN0_ADC0 0x00000001UL

#define	_GPIO_BBUSALLOC_BEVEN0_DEBUG 0x0000000FUL

#define	_GPIO_BBUSALLOC_BEVEN0_DEFAULT 0x00000000UL

#define	_GPIO_BBUSALLOC_BEVEN0_MASK 0xFUL

#define	_GPIO_BBUSALLOC_BEVEN0_SHIFT 0

#define	_GPIO_BBUSALLOC_BEVEN0_TRISTATE 0x00000000UL

#define	_GPIO_BBUSALLOC_BEVEN1_ACMP0 0x00000002UL

#define	_GPIO_BBUSALLOC_BEVEN1_ACMP1 0x00000003UL

#define	_GPIO_BBUSALLOC_BEVEN1_ADC0 0x00000001UL

#define	_GPIO_BBUSALLOC_BEVEN1_DEBUG 0x0000000FUL

#define	_GPIO_BBUSALLOC_BEVEN1_DEFAULT 0x00000000UL

#define	_GPIO_BBUSALLOC_BEVEN1_MASK 0xF00UL

#define	_GPIO_BBUSALLOC_BEVEN1_SHIFT 8

#define	_GPIO_BBUSALLOC_BEVEN1_TRISTATE 0x00000000UL

#define	_GPIO_BBUSALLOC_BODD0_ACMP0 0x00000002UL

#define	_GPIO_BBUSALLOC_BODD0_ACMP1 0x00000003UL

#define	_GPIO_BBUSALLOC_BODD0_ADC0 0x00000001UL

#define	_GPIO_BBUSALLOC_BODD0_DEBUG 0x0000000FUL

#define	_GPIO_BBUSALLOC_BODD0_DEFAULT 0x00000000UL

#define	_GPIO_BBUSALLOC_BODD0_MASK 0xF0000UL

#define	_GPIO_BBUSALLOC_BODD0_SHIFT 16

#define	_GPIO_BBUSALLOC_BODD0_TRISTATE 0x00000000UL

#define	_GPIO_BBUSALLOC_BODD1_ACMP0 0x00000002UL

#define	_GPIO_BBUSALLOC_BODD1_ACMP1 0x00000003UL

#define	_GPIO_BBUSALLOC_BODD1_ADC0 0x00000001UL

#define	_GPIO_BBUSALLOC_BODD1_DEBUG 0x0000000FUL

#define	_GPIO_BBUSALLOC_BODD1_DEFAULT 0x00000000UL

#define	_GPIO_BBUSALLOC_BODD1_MASK 0xF000000UL

#define	_GPIO_BBUSALLOC_BODD1_SHIFT 24

#define	_GPIO_BBUSALLOC_BODD1_TRISTATE 0x00000000UL

#define	_GPIO_BBUSALLOC_MASK 0x0F0F0F0FUL

#define	_GPIO_BBUSALLOC_RESETVALUE 0x00000000UL

#define	_GPIO_BEVEN0SWITCH_BEVEN0SWITCH_DEFAULT 0x00000000UL

#define	_GPIO_BEVEN0SWITCH_BEVEN0SWITCH_MASK 0x1UL

#define	_GPIO_BEVEN0SWITCH_BEVEN0SWITCH_SHIFT 0

#define	_GPIO_BEVEN0SWITCH_MASK 0x00000001UL

#define	_GPIO_BEVEN0SWITCH_RESETVALUE 0x00000000UL

#define	_GPIO_BEVEN1SWITCH_BEVEN1SWITCH_DEFAULT 0x00000000UL

#define	_GPIO_BEVEN1SWITCH_BEVEN1SWITCH_MASK 0x1UL

#define	_GPIO_BEVEN1SWITCH_BEVEN1SWITCH_SHIFT 0

#define	_GPIO_BEVEN1SWITCH_MASK 0x00000001UL

#define	_GPIO_BEVEN1SWITCH_RESETVALUE 0x00000000UL

#define	_GPIO_BODD0SWITCH_BODD0SWITCH_DEFAULT 0x00000000UL

#define	_GPIO_BODD0SWITCH_BODD0SWITCH_MASK 0x1UL

#define	_GPIO_BODD0SWITCH_BODD0SWITCH_SHIFT 0

#define	_GPIO_BODD0SWITCH_MASK 0x00000001UL

#define	_GPIO_BODD0SWITCH_RESETVALUE 0x00000000UL

#define	_GPIO_BODD1SWITCH_BODD1SWITCH_DEFAULT 0x00000000UL

#define	_GPIO_BODD1SWITCH_BODD1SWITCH_MASK 0x1UL

#define	_GPIO_BODD1SWITCH_BODD1SWITCH_SHIFT 0

#define	_GPIO_BODD1SWITCH_MASK 0x00000001UL

#define	_GPIO_BODD1SWITCH_RESETVALUE 0x00000000UL

#define	_GPIO_CDBUSALLOC_CDEVEN0_ACMP0 0x00000002UL

#define	_GPIO_CDBUSALLOC_CDEVEN0_ACMP1 0x00000003UL

#define	_GPIO_CDBUSALLOC_CDEVEN0_ADC0 0x00000001UL

#define	_GPIO_CDBUSALLOC_CDEVEN0_DEBUG 0x0000000FUL

#define	_GPIO_CDBUSALLOC_CDEVEN0_DEFAULT 0x00000000UL

#define	_GPIO_CDBUSALLOC_CDEVEN0_EFUSE 0x0000000DUL

#define	_GPIO_CDBUSALLOC_CDEVEN0_MASK 0xFUL

#define	_GPIO_CDBUSALLOC_CDEVEN0_PMON 0x0000000CUL

#define	_GPIO_CDBUSALLOC_CDEVEN0_SHIFT 0

#define	_GPIO_CDBUSALLOC_CDEVEN0_TRISTATE 0x00000000UL

#define	_GPIO_CDBUSALLOC_CDEVEN1_ACMP0 0x00000002UL

#define	_GPIO_CDBUSALLOC_CDEVEN1_ACMP1 0x00000003UL

#define	_GPIO_CDBUSALLOC_CDEVEN1_ADC0 0x00000001UL

#define	_GPIO_CDBUSALLOC_CDEVEN1_DEBUG 0x0000000FUL

#define	_GPIO_CDBUSALLOC_CDEVEN1_DEFAULT 0x00000000UL

#define	_GPIO_CDBUSALLOC_CDEVEN1_MASK 0xF00UL

#define	_GPIO_CDBUSALLOC_CDEVEN1_SHIFT 8

#define	_GPIO_CDBUSALLOC_CDEVEN1_TRISTATE 0x00000000UL

#define	_GPIO_CDBUSALLOC_CDODD0_ACMP0 0x00000002UL

#define	_GPIO_CDBUSALLOC_CDODD0_ACMP1 0x00000003UL

#define	_GPIO_CDBUSALLOC_CDODD0_ADC0 0x00000001UL

#define	_GPIO_CDBUSALLOC_CDODD0_DEBUG 0x0000000FUL

#define	_GPIO_CDBUSALLOC_CDODD0_DEFAULT 0x00000000UL

#define	_GPIO_CDBUSALLOC_CDODD0_MASK 0xF0000UL

#define	_GPIO_CDBUSALLOC_CDODD0_PMON 0x0000000CUL

#define	_GPIO_CDBUSALLOC_CDODD0_SHIFT 16

#define	_GPIO_CDBUSALLOC_CDODD0_TRISTATE 0x00000000UL

#define	_GPIO_CDBUSALLOC_CDODD1_ACMP0 0x00000002UL

#define	_GPIO_CDBUSALLOC_CDODD1_ACMP1 0x00000003UL

#define	_GPIO_CDBUSALLOC_CDODD1_ADC0 0x00000001UL

#define	_GPIO_CDBUSALLOC_CDODD1_DEBUG 0x0000000FUL

#define	_GPIO_CDBUSALLOC_CDODD1_DEFAULT 0x00000000UL

#define	_GPIO_CDBUSALLOC_CDODD1_MASK 0xF000000UL

#define	_GPIO_CDBUSALLOC_CDODD1_SHIFT 24

#define	_GPIO_CDBUSALLOC_CDODD1_TRISTATE 0x00000000UL

#define	_GPIO_CDBUSALLOC_MASK 0x0F0F0F0FUL

#define	_GPIO_CDBUSALLOC_RESETVALUE 0x00000000UL

#define	_GPIO_CDEVEN0SWITCH_CEVEN0SWITCH_DEFAULT 0x00000000UL

#define	_GPIO_CDEVEN0SWITCH_CEVEN0SWITCH_MASK 0x7UL

#define	_GPIO_CDEVEN0SWITCH_CEVEN0SWITCH_SHIFT 0

#define	_GPIO_CDEVEN0SWITCH_DEVEN0SWITCH_DEFAULT 0x00000000UL

#define	_GPIO_CDEVEN0SWITCH_DEVEN0SWITCH_MASK 0x70000UL

#define	_GPIO_CDEVEN0SWITCH_DEVEN0SWITCH_SHIFT 16

#define	_GPIO_CDEVEN0SWITCH_MASK 0x00070007UL

#define	_GPIO_CDEVEN0SWITCH_RESETVALUE 0x00000000UL

#define	_GPIO_CDEVEN1SWITCH_CEVEN1SWITCH_DEFAULT 0x00000000UL

#define	_GPIO_CDEVEN1SWITCH_CEVEN1SWITCH_MASK 0x7UL

#define	_GPIO_CDEVEN1SWITCH_CEVEN1SWITCH_SHIFT 0

#define	_GPIO_CDEVEN1SWITCH_DEVEN1SWITCH_DEFAULT 0x00000000UL

#define	_GPIO_CDEVEN1SWITCH_DEVEN1SWITCH_MASK 0x70000UL

#define	_GPIO_CDEVEN1SWITCH_DEVEN1SWITCH_SHIFT 16

#define	_GPIO_CDEVEN1SWITCH_MASK 0x00070007UL

#define	_GPIO_CDEVEN1SWITCH_RESETVALUE 0x00000000UL

#define	_GPIO_CDODD0SWITCH_CODD0SWITCH_DEFAULT 0x00000000UL

#define	_GPIO_CDODD0SWITCH_CODD0SWITCH_MASK 0x7UL

#define	_GPIO_CDODD0SWITCH_CODD0SWITCH_SHIFT 0

#define	_GPIO_CDODD0SWITCH_DODD0SWITCH_DEFAULT 0x00000000UL

#define	_GPIO_CDODD0SWITCH_DODD0SWITCH_MASK 0x30000UL

#define	_GPIO_CDODD0SWITCH_DODD0SWITCH_SHIFT 16

#define	_GPIO_CDODD0SWITCH_MASK 0x00030007UL

#define	_GPIO_CDODD0SWITCH_RESETVALUE 0x00000000UL

#define	_GPIO_CDODD1SWITCH_CODD1SWITCH_DEFAULT 0x00000000UL

#define	_GPIO_CDODD1SWITCH_CODD1SWITCH_MASK 0x7UL

#define	_GPIO_CDODD1SWITCH_CODD1SWITCH_SHIFT 0

#define	_GPIO_CDODD1SWITCH_DODD1SWITCH_DEFAULT 0x00000000UL

#define	_GPIO_CDODD1SWITCH_DODD1SWITCH_MASK 0x30000UL

#define	_GPIO_CDODD1SWITCH_DODD1SWITCH_SHIFT 16

#define	_GPIO_CDODD1SWITCH_MASK 0x00030007UL

#define	_GPIO_CDODD1SWITCH_RESETVALUE 0x00000000UL

#define	_GPIO_CMU_CLKIN0ROUTE_MASK 0x000F0003UL

#define	_GPIO_CMU_CLKIN0ROUTE_PIN_DEFAULT 0x00000000UL

#define	_GPIO_CMU_CLKIN0ROUTE_PIN_MASK 0xF0000UL

#define	_GPIO_CMU_CLKIN0ROUTE_PIN_SHIFT 16

#define	_GPIO_CMU_CLKIN0ROUTE_PORT_DEFAULT 0x00000000UL

#define	_GPIO_CMU_CLKIN0ROUTE_PORT_MASK 0x3UL

#define	_GPIO_CMU_CLKIN0ROUTE_PORT_SHIFT 0

#define	_GPIO_CMU_CLKIN0ROUTE_RESETVALUE 0x00000000UL

#define	_GPIO_CMU_CLKOUT0ROUTE_MASK 0x000F0003UL

#define	_GPIO_CMU_CLKOUT0ROUTE_PIN_DEFAULT 0x00000000UL

#define	_GPIO_CMU_CLKOUT0ROUTE_PIN_MASK 0xF0000UL

#define	_GPIO_CMU_CLKOUT0ROUTE_PIN_SHIFT 16

#define	_GPIO_CMU_CLKOUT0ROUTE_PORT_DEFAULT 0x00000000UL

#define	_GPIO_CMU_CLKOUT0ROUTE_PORT_MASK 0x3UL

#define	_GPIO_CMU_CLKOUT0ROUTE_PORT_SHIFT 0

#define	_GPIO_CMU_CLKOUT0ROUTE_RESETVALUE 0x00000000UL

#define	_GPIO_CMU_CLKOUT1ROUTE_MASK 0x000F0003UL

#define	_GPIO_CMU_CLKOUT1ROUTE_PIN_DEFAULT 0x00000000UL

#define	_GPIO_CMU_CLKOUT1ROUTE_PIN_MASK 0xF0000UL

#define	_GPIO_CMU_CLKOUT1ROUTE_PIN_SHIFT 16

#define	_GPIO_CMU_CLKOUT1ROUTE_PORT_DEFAULT 0x00000000UL

#define	_GPIO_CMU_CLKOUT1ROUTE_PORT_MASK 0x3UL

#define	_GPIO_CMU_CLKOUT1ROUTE_PORT_SHIFT 0

#define	_GPIO_CMU_CLKOUT1ROUTE_RESETVALUE 0x00000000UL

#define	_GPIO_CMU_CLKOUT2ROUTE_MASK 0x000F0003UL

#define	_GPIO_CMU_CLKOUT2ROUTE_PIN_DEFAULT 0x00000000UL

#define	_GPIO_CMU_CLKOUT2ROUTE_PIN_MASK 0xF0000UL

#define	_GPIO_CMU_CLKOUT2ROUTE_PIN_SHIFT 16

#define	_GPIO_CMU_CLKOUT2ROUTE_PORT_DEFAULT 0x00000000UL

#define	_GPIO_CMU_CLKOUT2ROUTE_PORT_MASK 0x3UL

#define	_GPIO_CMU_CLKOUT2ROUTE_PORT_SHIFT 0

#define	_GPIO_CMU_CLKOUT2ROUTE_RESETVALUE 0x00000000UL

#define	_GPIO_CMU_ROUTEEN_CLKOUT0PEN_DEFAULT 0x00000000UL

#define	_GPIO_CMU_ROUTEEN_CLKOUT0PEN_MASK 0x1UL

#define	_GPIO_CMU_ROUTEEN_CLKOUT0PEN_SHIFT 0

#define	_GPIO_CMU_ROUTEEN_CLKOUT1PEN_DEFAULT 0x00000000UL

#define	_GPIO_CMU_ROUTEEN_CLKOUT1PEN_MASK 0x2UL

#define	_GPIO_CMU_ROUTEEN_CLKOUT1PEN_SHIFT 1

#define	_GPIO_CMU_ROUTEEN_CLKOUT2PEN_DEFAULT 0x00000000UL

#define	_GPIO_CMU_ROUTEEN_CLKOUT2PEN_MASK 0x4UL

#define	_GPIO_CMU_ROUTEEN_CLKOUT2PEN_SHIFT 2

#define	_GPIO_CMU_ROUTEEN_MASK 0x0000000FUL

#define	_GPIO_CMU_ROUTEEN_RESETVALUE 0x00000000UL

#define	_GPIO_DBGROUTEPEN_MASK 0x0000000FUL

#define	_GPIO_DBGROUTEPEN_RESETVALUE 0x0000000FUL

#define	_GPIO_DBGROUTEPEN_SWCLKTCKPEN_DEFAULT 0x00000001UL

#define	_GPIO_DBGROUTEPEN_SWCLKTCKPEN_MASK 0x1UL

#define	_GPIO_DBGROUTEPEN_SWCLKTCKPEN_SHIFT 0

#define	_GPIO_DBGROUTEPEN_SWDIOTMSPEN_DEFAULT 0x00000001UL

#define	_GPIO_DBGROUTEPEN_SWDIOTMSPEN_MASK 0x2UL

#define	_GPIO_DBGROUTEPEN_SWDIOTMSPEN_SHIFT 1

#define	_GPIO_DBGROUTEPEN_TDIPEN_DEFAULT 0x00000001UL

#define	_GPIO_DBGROUTEPEN_TDIPEN_MASK 0x8UL

#define	_GPIO_DBGROUTEPEN_TDIPEN_SHIFT 3

#define	_GPIO_DBGROUTEPEN_TDOPEN_DEFAULT 0x00000001UL

#define	_GPIO_DBGROUTEPEN_TDOPEN_MASK 0x4UL

#define	_GPIO_DBGROUTEPEN_TDOPEN_SHIFT 2

#define	_GPIO_EM4WUEN_EM4WUEN_DEFAULT 0x00000000UL

#define	_GPIO_EM4WUEN_EM4WUEN_MASK 0xFFF0000UL

#define	_GPIO_EM4WUEN_EM4WUEN_SHIFT 16

#define	_GPIO_EM4WUEN_MASK 0x0FFF0000UL

#define	_GPIO_EM4WUEN_RESETVALUE 0x00000000UL

#define	_GPIO_EM4WUPOL_EM4WUPOL_DEFAULT 0x00000000UL

#define	_GPIO_EM4WUPOL_EM4WUPOL_MASK 0xFFF0000UL

#define	_GPIO_EM4WUPOL_EM4WUPOL_SHIFT 16

#define	_GPIO_EM4WUPOL_MASK 0x0FFF0000UL

#define	_GPIO_EM4WUPOL_RESETVALUE 0x00000000UL

#define	_GPIO_EXTIFALL_EXTIFALL_DEFAULT 0x00000000UL

#define	_GPIO_EXTIFALL_EXTIFALL_MASK 0xFFUL

#define	_GPIO_EXTIFALL_EXTIFALL_SHIFT 0

#define	_GPIO_EXTIFALL_MASK 0x000000FFUL

#define	_GPIO_EXTIFALL_RESETVALUE 0x00000000UL

#define	_GPIO_EXTIPINSELL_EXTIPINSEL0_DEFAULT 0x00000000UL

#define	_GPIO_EXTIPINSELL_EXTIPINSEL0_MASK 0x3UL

#define	_GPIO_EXTIPINSELL_EXTIPINSEL0_PIN0 0x00000000UL

#define	_GPIO_EXTIPINSELL_EXTIPINSEL0_PIN1 0x00000001UL

#define	_GPIO_EXTIPINSELL_EXTIPINSEL0_PIN2 0x00000002UL

#define	_GPIO_EXTIPINSELL_EXTIPINSEL0_PIN3 0x00000003UL

#define	_GPIO_EXTIPINSELL_EXTIPINSEL0_SHIFT 0

#define	_GPIO_EXTIPINSELL_EXTIPINSEL1_DEFAULT 0x00000000UL

#define	_GPIO_EXTIPINSELL_EXTIPINSEL1_MASK 0x30UL

#define	_GPIO_EXTIPINSELL_EXTIPINSEL1_PIN0 0x00000000UL

#define	_GPIO_EXTIPINSELL_EXTIPINSEL1_PIN1 0x00000001UL

#define	_GPIO_EXTIPINSELL_EXTIPINSEL1_PIN2 0x00000002UL

#define	_GPIO_EXTIPINSELL_EXTIPINSEL1_PIN3 0x00000003UL

#define	_GPIO_EXTIPINSELL_EXTIPINSEL1_SHIFT 4

#define	_GPIO_EXTIPINSELL_EXTIPINSEL2_DEFAULT 0x00000000UL

#define	_GPIO_EXTIPINSELL_EXTIPINSEL2_MASK 0x300UL

#define	_GPIO_EXTIPINSELL_EXTIPINSEL2_PIN0 0x00000000UL

#define	_GPIO_EXTIPINSELL_EXTIPINSEL2_PIN1 0x00000001UL

#define	_GPIO_EXTIPINSELL_EXTIPINSEL2_PIN2 0x00000002UL

#define	_GPIO_EXTIPINSELL_EXTIPINSEL2_PIN3 0x00000003UL

#define	_GPIO_EXTIPINSELL_EXTIPINSEL2_SHIFT 8

#define	_GPIO_EXTIPINSELL_EXTIPINSEL3_DEFAULT 0x00000000UL

#define	_GPIO_EXTIPINSELL_EXTIPINSEL3_MASK 0x3000UL

#define	_GPIO_EXTIPINSELL_EXTIPINSEL3_PIN0 0x00000000UL

#define	_GPIO_EXTIPINSELL_EXTIPINSEL3_PIN1 0x00000001UL

#define	_GPIO_EXTIPINSELL_EXTIPINSEL3_PIN2 0x00000002UL

#define	_GPIO_EXTIPINSELL_EXTIPINSEL3_PIN3 0x00000003UL

#define	_GPIO_EXTIPINSELL_EXTIPINSEL3_SHIFT 12

#define	_GPIO_EXTIPINSELL_EXTIPINSEL4_DEFAULT 0x00000000UL

#define	_GPIO_EXTIPINSELL_EXTIPINSEL4_MASK 0x30000UL

#define	_GPIO_EXTIPINSELL_EXTIPINSEL4_PIN0 0x00000000UL

#define	_GPIO_EXTIPINSELL_EXTIPINSEL4_PIN1 0x00000001UL

#define	_GPIO_EXTIPINSELL_EXTIPINSEL4_PIN2 0x00000002UL

#define	_GPIO_EXTIPINSELL_EXTIPINSEL4_PIN3 0x00000003UL

#define	_GPIO_EXTIPINSELL_EXTIPINSEL4_SHIFT 16

#define	_GPIO_EXTIPINSELL_EXTIPINSEL5_DEFAULT 0x00000000UL

#define	_GPIO_EXTIPINSELL_EXTIPINSEL5_MASK 0x300000UL

#define	_GPIO_EXTIPINSELL_EXTIPINSEL5_PIN0 0x00000000UL

#define	_GPIO_EXTIPINSELL_EXTIPINSEL5_PIN1 0x00000001UL

#define	_GPIO_EXTIPINSELL_EXTIPINSEL5_PIN2 0x00000002UL

#define	_GPIO_EXTIPINSELL_EXTIPINSEL5_PIN3 0x00000003UL

#define	_GPIO_EXTIPINSELL_EXTIPINSEL5_SHIFT 20

#define	_GPIO_EXTIPINSELL_EXTIPINSEL6_DEFAULT 0x00000000UL

#define	_GPIO_EXTIPINSELL_EXTIPINSEL6_MASK 0x3000000UL

#define	_GPIO_EXTIPINSELL_EXTIPINSEL6_PIN0 0x00000000UL

#define	_GPIO_EXTIPINSELL_EXTIPINSEL6_PIN1 0x00000001UL

#define	_GPIO_EXTIPINSELL_EXTIPINSEL6_PIN2 0x00000002UL

#define	_GPIO_EXTIPINSELL_EXTIPINSEL6_PIN3 0x00000003UL

#define	_GPIO_EXTIPINSELL_EXTIPINSEL6_SHIFT 24

#define	_GPIO_EXTIPINSELL_EXTIPINSEL7_DEFAULT 0x00000000UL

#define	_GPIO_EXTIPINSELL_EXTIPINSEL7_MASK 0x30000000UL

#define	_GPIO_EXTIPINSELL_EXTIPINSEL7_PIN0 0x00000000UL

#define	_GPIO_EXTIPINSELL_EXTIPINSEL7_PIN1 0x00000001UL

#define	_GPIO_EXTIPINSELL_EXTIPINSEL7_PIN2 0x00000002UL

#define	_GPIO_EXTIPINSELL_EXTIPINSEL7_PIN3 0x00000003UL

#define	_GPIO_EXTIPINSELL_EXTIPINSEL7_SHIFT 28

#define	_GPIO_EXTIPINSELL_MASK 0x33333333UL

#define	_GPIO_EXTIPINSELL_RESETVALUE 0x00000000UL

#define	_GPIO_EXTIPSELL_EXTIPSEL0_DEFAULT 0x00000000UL

#define	_GPIO_EXTIPSELL_EXTIPSEL0_MASK 0x3UL

#define	_GPIO_EXTIPSELL_EXTIPSEL0_PORTA 0x00000000UL

#define	_GPIO_EXTIPSELL_EXTIPSEL0_PORTB 0x00000001UL

#define	_GPIO_EXTIPSELL_EXTIPSEL0_PORTC 0x00000002UL

#define	_GPIO_EXTIPSELL_EXTIPSEL0_PORTD 0x00000003UL

#define	_GPIO_EXTIPSELL_EXTIPSEL0_SHIFT 0

#define	_GPIO_EXTIPSELL_EXTIPSEL1_DEFAULT 0x00000000UL

#define	_GPIO_EXTIPSELL_EXTIPSEL1_MASK 0x30UL

#define	_GPIO_EXTIPSELL_EXTIPSEL1_PORTA 0x00000000UL

#define	_GPIO_EXTIPSELL_EXTIPSEL1_PORTB 0x00000001UL

#define	_GPIO_EXTIPSELL_EXTIPSEL1_PORTC 0x00000002UL

#define	_GPIO_EXTIPSELL_EXTIPSEL1_PORTD 0x00000003UL

#define	_GPIO_EXTIPSELL_EXTIPSEL1_SHIFT 4

#define	_GPIO_EXTIPSELL_EXTIPSEL2_DEFAULT 0x00000000UL

#define	_GPIO_EXTIPSELL_EXTIPSEL2_MASK 0x300UL

#define	_GPIO_EXTIPSELL_EXTIPSEL2_PORTA 0x00000000UL

#define	_GPIO_EXTIPSELL_EXTIPSEL2_PORTB 0x00000001UL

#define	_GPIO_EXTIPSELL_EXTIPSEL2_PORTC 0x00000002UL

#define	_GPIO_EXTIPSELL_EXTIPSEL2_PORTD 0x00000003UL

#define	_GPIO_EXTIPSELL_EXTIPSEL2_SHIFT 8

#define	_GPIO_EXTIPSELL_EXTIPSEL3_DEFAULT 0x00000000UL

#define	_GPIO_EXTIPSELL_EXTIPSEL3_MASK 0x3000UL

#define	_GPIO_EXTIPSELL_EXTIPSEL3_PORTA 0x00000000UL

#define	_GPIO_EXTIPSELL_EXTIPSEL3_PORTB 0x00000001UL

#define	_GPIO_EXTIPSELL_EXTIPSEL3_PORTC 0x00000002UL

#define	_GPIO_EXTIPSELL_EXTIPSEL3_PORTD 0x00000003UL

#define	_GPIO_EXTIPSELL_EXTIPSEL3_SHIFT 12

#define	_GPIO_EXTIPSELL_EXTIPSEL4_DEFAULT 0x00000000UL

#define	_GPIO_EXTIPSELL_EXTIPSEL4_MASK 0x30000UL

#define	_GPIO_EXTIPSELL_EXTIPSEL4_PORTA 0x00000000UL

#define	_GPIO_EXTIPSELL_EXTIPSEL4_PORTB 0x00000001UL

#define	_GPIO_EXTIPSELL_EXTIPSEL4_PORTC 0x00000002UL

#define	_GPIO_EXTIPSELL_EXTIPSEL4_PORTD 0x00000003UL

#define	_GPIO_EXTIPSELL_EXTIPSEL4_SHIFT 16

#define	_GPIO_EXTIPSELL_EXTIPSEL5_DEFAULT 0x00000000UL

#define	_GPIO_EXTIPSELL_EXTIPSEL5_MASK 0x300000UL

#define	_GPIO_EXTIPSELL_EXTIPSEL5_PORTA 0x00000000UL

#define	_GPIO_EXTIPSELL_EXTIPSEL5_PORTB 0x00000001UL

#define	_GPIO_EXTIPSELL_EXTIPSEL5_PORTC 0x00000002UL

#define	_GPIO_EXTIPSELL_EXTIPSEL5_PORTD 0x00000003UL

#define	_GPIO_EXTIPSELL_EXTIPSEL5_SHIFT 20

#define	_GPIO_EXTIPSELL_EXTIPSEL6_DEFAULT 0x00000000UL

#define	_GPIO_EXTIPSELL_EXTIPSEL6_MASK 0x3000000UL

#define	_GPIO_EXTIPSELL_EXTIPSEL6_PORTA 0x00000000UL

#define	_GPIO_EXTIPSELL_EXTIPSEL6_PORTB 0x00000001UL

#define	_GPIO_EXTIPSELL_EXTIPSEL6_PORTC 0x00000002UL

#define	_GPIO_EXTIPSELL_EXTIPSEL6_PORTD 0x00000003UL

#define	_GPIO_EXTIPSELL_EXTIPSEL6_SHIFT 24

#define	_GPIO_EXTIPSELL_EXTIPSEL7_DEFAULT 0x00000000UL

#define	_GPIO_EXTIPSELL_EXTIPSEL7_MASK 0x30000000UL

#define	_GPIO_EXTIPSELL_EXTIPSEL7_PORTA 0x00000000UL

#define	_GPIO_EXTIPSELL_EXTIPSEL7_PORTB 0x00000001UL

#define	_GPIO_EXTIPSELL_EXTIPSEL7_PORTC 0x00000002UL

#define	_GPIO_EXTIPSELL_EXTIPSEL7_PORTD 0x00000003UL

#define	_GPIO_EXTIPSELL_EXTIPSEL7_SHIFT 28

#define	_GPIO_EXTIPSELL_MASK 0x33333333UL

#define	_GPIO_EXTIPSELL_RESETVALUE 0x00000000UL

#define	_GPIO_EXTIRISE_EXTIRISE_DEFAULT 0x00000000UL

#define	_GPIO_EXTIRISE_EXTIRISE_MASK 0xFFUL

#define	_GPIO_EXTIRISE_EXTIRISE_SHIFT 0

#define	_GPIO_EXTIRISE_MASK 0x000000FFUL

#define	_GPIO_EXTIRISE_RESETVALUE 0x00000000UL

#define	_GPIO_FRC_DCLKROUTE_MASK 0x000F0003UL

#define	_GPIO_FRC_DCLKROUTE_PIN_DEFAULT 0x00000000UL

#define	_GPIO_FRC_DCLKROUTE_PIN_MASK 0xF0000UL

#define	_GPIO_FRC_DCLKROUTE_PIN_SHIFT 16

#define	_GPIO_FRC_DCLKROUTE_PORT_DEFAULT 0x00000000UL

#define	_GPIO_FRC_DCLKROUTE_PORT_MASK 0x3UL

#define	_GPIO_FRC_DCLKROUTE_PORT_SHIFT 0

#define	_GPIO_FRC_DCLKROUTE_RESETVALUE 0x00000000UL

#define	_GPIO_FRC_DFRAMEROUTE_MASK 0x000F0003UL

#define	_GPIO_FRC_DFRAMEROUTE_PIN_DEFAULT 0x00000000UL

#define	_GPIO_FRC_DFRAMEROUTE_PIN_MASK 0xF0000UL

#define	_GPIO_FRC_DFRAMEROUTE_PIN_SHIFT 16

#define	_GPIO_FRC_DFRAMEROUTE_PORT_DEFAULT 0x00000000UL

#define	_GPIO_FRC_DFRAMEROUTE_PORT_MASK 0x3UL

#define	_GPIO_FRC_DFRAMEROUTE_PORT_SHIFT 0

#define	_GPIO_FRC_DFRAMEROUTE_RESETVALUE 0x00000000UL

#define	_GPIO_FRC_DOUTROUTE_MASK 0x000F0003UL

#define	_GPIO_FRC_DOUTROUTE_PIN_DEFAULT 0x00000000UL

#define	_GPIO_FRC_DOUTROUTE_PIN_MASK 0xF0000UL

#define	_GPIO_FRC_DOUTROUTE_PIN_SHIFT 16

#define	_GPIO_FRC_DOUTROUTE_PORT_DEFAULT 0x00000000UL

#define	_GPIO_FRC_DOUTROUTE_PORT_MASK 0x3UL

#define	_GPIO_FRC_DOUTROUTE_PORT_SHIFT 0

#define	_GPIO_FRC_DOUTROUTE_RESETVALUE 0x00000000UL

#define	_GPIO_FRC_ROUTEEN_DCLKPEN_DEFAULT 0x00000000UL

#define	_GPIO_FRC_ROUTEEN_DCLKPEN_MASK 0x1UL

#define	_GPIO_FRC_ROUTEEN_DCLKPEN_SHIFT 0

#define	_GPIO_FRC_ROUTEEN_DFRAMEPEN_DEFAULT 0x00000000UL

#define	_GPIO_FRC_ROUTEEN_DFRAMEPEN_MASK 0x2UL

#define	_GPIO_FRC_ROUTEEN_DFRAMEPEN_SHIFT 1

#define	_GPIO_FRC_ROUTEEN_DOUTPEN_DEFAULT 0x00000000UL

#define	_GPIO_FRC_ROUTEEN_DOUTPEN_MASK 0x4UL

#define	_GPIO_FRC_ROUTEEN_DOUTPEN_SHIFT 2

#define	_GPIO_FRC_ROUTEEN_MASK 0x00000007UL

#define	_GPIO_FRC_ROUTEEN_RESETVALUE 0x00000000UL

#define	_GPIO_GPIOLOCKSTATUS_LOCK_DEFAULT 0x00000000UL

#define	_GPIO_GPIOLOCKSTATUS_LOCK_LOCKED 0x00000001UL

#define	_GPIO_GPIOLOCKSTATUS_LOCK_MASK 0x1UL

#define	_GPIO_GPIOLOCKSTATUS_LOCK_SHIFT 0

#define	_GPIO_GPIOLOCKSTATUS_LOCK_UNLOCKED 0x00000000UL

#define	_GPIO_GPIOLOCKSTATUS_MASK 0x00000001UL

#define	_GPIO_GPIOLOCKSTATUS_RESETVALUE 0x00000000UL

#define	_GPIO_I2C_ROUTEEN_MASK 0x00000003UL

#define	_GPIO_I2C_ROUTEEN_RESETVALUE 0x00000000UL

#define	_GPIO_I2C_ROUTEEN_SCLPEN_DEFAULT 0x00000000UL

#define	_GPIO_I2C_ROUTEEN_SCLPEN_MASK 0x1UL

#define	_GPIO_I2C_ROUTEEN_SCLPEN_SHIFT 0

#define	_GPIO_I2C_ROUTEEN_SDAPEN_DEFAULT 0x00000000UL

#define	_GPIO_I2C_ROUTEEN_SDAPEN_MASK 0x2UL

#define	_GPIO_I2C_ROUTEEN_SDAPEN_SHIFT 1

#define	_GPIO_I2C_SCLROUTE_MASK 0x000F0003UL

#define	_GPIO_I2C_SCLROUTE_PIN_DEFAULT 0x00000000UL

#define	_GPIO_I2C_SCLROUTE_PIN_MASK 0xF0000UL

#define	_GPIO_I2C_SCLROUTE_PIN_SHIFT 16

#define	_GPIO_I2C_SCLROUTE_PORT_DEFAULT 0x00000000UL

#define	_GPIO_I2C_SCLROUTE_PORT_MASK 0x3UL

#define	_GPIO_I2C_SCLROUTE_PORT_SHIFT 0

#define	_GPIO_I2C_SCLROUTE_RESETVALUE 0x00000000UL

#define	_GPIO_I2C_SDAROUTE_MASK 0x000F0003UL

#define	_GPIO_I2C_SDAROUTE_PIN_DEFAULT 0x00000000UL

#define	_GPIO_I2C_SDAROUTE_PIN_MASK 0xF0000UL

#define	_GPIO_I2C_SDAROUTE_PIN_SHIFT 16

#define	_GPIO_I2C_SDAROUTE_PORT_DEFAULT 0x00000000UL

#define	_GPIO_I2C_SDAROUTE_PORT_MASK 0x3UL

#define	_GPIO_I2C_SDAROUTE_PORT_SHIFT 0

#define	_GPIO_I2C_SDAROUTE_RESETVALUE 0x00000000UL

#define	_GPIO_IEN_EM4WUIEN_DEFAULT 0x00000000UL

#define	_GPIO_IEN_EM4WUIEN_MASK 0xFFFF0000UL

#define	_GPIO_IEN_EM4WUIEN_SHIFT 16

#define	_GPIO_IEN_EXTIEN_DEFAULT 0x00000000UL

#define	_GPIO_IEN_EXTIEN_MASK 0xFFFFUL

#define	_GPIO_IEN_EXTIEN_SHIFT 0

#define	_GPIO_IEN_MASK 0xFFFFFFFFUL

#define	_GPIO_IEN_RESETVALUE 0x00000000UL

#define	_GPIO_IF_EM4WU_DEFAULT 0x00000000UL

#define	_GPIO_IF_EM4WU_MASK 0xFFFF0000UL

#define	_GPIO_IF_EM4WU_SHIFT 16

#define	_GPIO_IF_EXT_DEFAULT 0x00000000UL

#define	_GPIO_IF_EXT_MASK 0xFFFFUL

#define	_GPIO_IF_EXT_SHIFT 0

#define	_GPIO_IF_MASK 0xFFFFFFFFUL

#define	_GPIO_IF_RESETVALUE 0x00000000UL

#define	_GPIO_LETIMER_OUT0ROUTE_MASK 0x000F0003UL

#define	_GPIO_LETIMER_OUT0ROUTE_PIN_DEFAULT 0x00000000UL

#define	_GPIO_LETIMER_OUT0ROUTE_PIN_MASK 0xF0000UL

#define	_GPIO_LETIMER_OUT0ROUTE_PIN_SHIFT 16

#define	_GPIO_LETIMER_OUT0ROUTE_PORT_DEFAULT 0x00000000UL

#define	_GPIO_LETIMER_OUT0ROUTE_PORT_MASK 0x3UL

#define	_GPIO_LETIMER_OUT0ROUTE_PORT_SHIFT 0

#define	_GPIO_LETIMER_OUT0ROUTE_RESETVALUE 0x00000000UL

#define	_GPIO_LETIMER_OUT1ROUTE_MASK 0x000F0003UL

#define	_GPIO_LETIMER_OUT1ROUTE_PIN_DEFAULT 0x00000000UL

#define	_GPIO_LETIMER_OUT1ROUTE_PIN_MASK 0xF0000UL

#define	_GPIO_LETIMER_OUT1ROUTE_PIN_SHIFT 16

#define	_GPIO_LETIMER_OUT1ROUTE_PORT_DEFAULT 0x00000000UL

#define	_GPIO_LETIMER_OUT1ROUTE_PORT_MASK 0x3UL

#define	_GPIO_LETIMER_OUT1ROUTE_PORT_SHIFT 0

#define	_GPIO_LETIMER_OUT1ROUTE_RESETVALUE 0x00000000UL

#define	_GPIO_LETIMER_ROUTEEN_MASK 0x00000003UL

#define	_GPIO_LETIMER_ROUTEEN_OUT0PEN_DEFAULT 0x00000000UL

#define	_GPIO_LETIMER_ROUTEEN_OUT0PEN_MASK 0x1UL

#define	_GPIO_LETIMER_ROUTEEN_OUT0PEN_SHIFT 0

#define	_GPIO_LETIMER_ROUTEEN_OUT1PEN_DEFAULT 0x00000000UL

#define	_GPIO_LETIMER_ROUTEEN_OUT1PEN_MASK 0x2UL

#define	_GPIO_LETIMER_ROUTEEN_OUT1PEN_SHIFT 1

#define	_GPIO_LETIMER_ROUTEEN_RESETVALUE 0x00000000UL

#define	_GPIO_LOCK_LOCKKEY_DEFAULT 0x0000A534UL

#define	_GPIO_LOCK_LOCKKEY_MASK 0xFFFFUL

#define	_GPIO_LOCK_LOCKKEY_SHIFT 0

#define	_GPIO_LOCK_LOCKKEY_UNLOCK 0x0000A534UL

#define	_GPIO_LOCK_MASK 0x0000FFFFUL

#define	_GPIO_LOCK_RESETVALUE 0x0000A534UL

#define	_GPIO_MODEM_ANT0ROUTE_MASK 0x000F0003UL

#define	_GPIO_MODEM_ANT0ROUTE_PIN_DEFAULT 0x00000000UL

#define	_GPIO_MODEM_ANT0ROUTE_PIN_MASK 0xF0000UL

#define	_GPIO_MODEM_ANT0ROUTE_PIN_SHIFT 16

#define	_GPIO_MODEM_ANT0ROUTE_PORT_DEFAULT 0x00000000UL

#define	_GPIO_MODEM_ANT0ROUTE_PORT_MASK 0x3UL

#define	_GPIO_MODEM_ANT0ROUTE_PORT_SHIFT 0

#define	_GPIO_MODEM_ANT0ROUTE_RESETVALUE 0x00000000UL

#define	_GPIO_MODEM_ANT1ROUTE_MASK 0x000F0003UL

#define	_GPIO_MODEM_ANT1ROUTE_PIN_DEFAULT 0x00000000UL

#define	_GPIO_MODEM_ANT1ROUTE_PIN_MASK 0xF0000UL

#define	_GPIO_MODEM_ANT1ROUTE_PIN_SHIFT 16

#define	_GPIO_MODEM_ANT1ROUTE_PORT_DEFAULT 0x00000000UL

#define	_GPIO_MODEM_ANT1ROUTE_PORT_MASK 0x3UL

#define	_GPIO_MODEM_ANT1ROUTE_PORT_SHIFT 0

#define	_GPIO_MODEM_ANT1ROUTE_RESETVALUE 0x00000000UL

#define	_GPIO_MODEM_DCLKROUTE_MASK 0x000F0003UL

#define	_GPIO_MODEM_DCLKROUTE_PIN_DEFAULT 0x00000000UL

#define	_GPIO_MODEM_DCLKROUTE_PIN_MASK 0xF0000UL

#define	_GPIO_MODEM_DCLKROUTE_PIN_SHIFT 16

#define	_GPIO_MODEM_DCLKROUTE_PORT_DEFAULT 0x00000000UL

#define	_GPIO_MODEM_DCLKROUTE_PORT_MASK 0x3UL

#define	_GPIO_MODEM_DCLKROUTE_PORT_SHIFT 0

#define	_GPIO_MODEM_DCLKROUTE_RESETVALUE 0x00000000UL

#define	_GPIO_MODEM_DINROUTE_MASK 0x000F0003UL

#define	_GPIO_MODEM_DINROUTE_PIN_DEFAULT 0x00000000UL

#define	_GPIO_MODEM_DINROUTE_PIN_MASK 0xF0000UL

#define	_GPIO_MODEM_DINROUTE_PIN_SHIFT 16

#define	_GPIO_MODEM_DINROUTE_PORT_DEFAULT 0x00000000UL

#define	_GPIO_MODEM_DINROUTE_PORT_MASK 0x3UL

#define	_GPIO_MODEM_DINROUTE_PORT_SHIFT 0

#define	_GPIO_MODEM_DINROUTE_RESETVALUE 0x00000000UL

#define	_GPIO_MODEM_DOUTROUTE_MASK 0x000F0003UL

#define	_GPIO_MODEM_DOUTROUTE_PIN_DEFAULT 0x00000000UL

#define	_GPIO_MODEM_DOUTROUTE_PIN_MASK 0xF0000UL

#define	_GPIO_MODEM_DOUTROUTE_PIN_SHIFT 16

#define	_GPIO_MODEM_DOUTROUTE_PORT_DEFAULT 0x00000000UL

#define	_GPIO_MODEM_DOUTROUTE_PORT_MASK 0x3UL

#define	_GPIO_MODEM_DOUTROUTE_PORT_SHIFT 0

#define	_GPIO_MODEM_DOUTROUTE_RESETVALUE 0x00000000UL

#define	_GPIO_MODEM_ROUTEEN_ANT0PEN_DEFAULT 0x00000000UL

#define	_GPIO_MODEM_ROUTEEN_ANT0PEN_MASK 0x1UL

#define	_GPIO_MODEM_ROUTEEN_ANT0PEN_SHIFT 0

#define	_GPIO_MODEM_ROUTEEN_ANT1PEN_DEFAULT 0x00000000UL

#define	_GPIO_MODEM_ROUTEEN_ANT1PEN_MASK 0x2UL

#define	_GPIO_MODEM_ROUTEEN_ANT1PEN_SHIFT 1

#define	_GPIO_MODEM_ROUTEEN_DCLKPEN_DEFAULT 0x00000000UL

#define	_GPIO_MODEM_ROUTEEN_DCLKPEN_MASK 0x4UL

#define	_GPIO_MODEM_ROUTEEN_DCLKPEN_SHIFT 2

#define	_GPIO_MODEM_ROUTEEN_DOUTPEN_DEFAULT 0x00000000UL

#define	_GPIO_MODEM_ROUTEEN_DOUTPEN_MASK 0x8UL

#define	_GPIO_MODEM_ROUTEEN_DOUTPEN_SHIFT 3

#define	_GPIO_MODEM_ROUTEEN_MASK 0x0000000FUL

#define	_GPIO_MODEM_ROUTEEN_RESETVALUE 0x00000000UL

#define	_GPIO_P_CTRL_DINDIS_DEFAULT 0x00000000UL

#define	_GPIO_P_CTRL_DINDIS_MASK 0x1000UL

#define	_GPIO_P_CTRL_DINDIS_SHIFT 12

#define	_GPIO_P_CTRL_DINDISALT_DEFAULT 0x00000000UL

#define	_GPIO_P_CTRL_DINDISALT_MASK 0x10000000UL

#define	_GPIO_P_CTRL_DINDISALT_SHIFT 28

#define	_GPIO_P_CTRL_MASK 0x10701070UL

#define	_GPIO_P_CTRL_RESETVALUE 0x00400040UL

#define	_GPIO_P_CTRL_SLEWRATE_DEFAULT 0x00000004UL

#define	_GPIO_P_CTRL_SLEWRATE_MASK 0x70UL

#define	_GPIO_P_CTRL_SLEWRATE_SHIFT 4

#define	_GPIO_P_CTRL_SLEWRATEALT_DEFAULT 0x00000004UL

#define	_GPIO_P_CTRL_SLEWRATEALT_MASK 0x700000UL

#define	_GPIO_P_CTRL_SLEWRATEALT_SHIFT 20

#define	_GPIO_P_DIN_DIN_DEFAULT 0x00000000UL

#define	_GPIO_P_DIN_DIN_MASK 0x7FUL

#define	_GPIO_P_DIN_DIN_SHIFT 0

#define	_GPIO_P_DIN_MASK 0x0000007FUL

#define	_GPIO_P_DIN_RESETVALUE 0x00000000UL

#define	_GPIO_P_DOUT_DOUT_DEFAULT 0x00000000UL

#define	_GPIO_P_DOUT_DOUT_MASK 0x7FUL

#define	_GPIO_P_DOUT_DOUT_SHIFT 0

#define	_GPIO_P_DOUT_MASK 0x0000007FUL

#define	_GPIO_P_DOUT_RESETVALUE 0x00000000UL

#define	_GPIO_P_MODEL_MASK 0x0FFFFFFFUL

#define	_GPIO_P_MODEL_MODE0_DEFAULT 0x00000000UL

#define	_GPIO_P_MODEL_MODE0_DISABLED 0x00000000UL

#define	_GPIO_P_MODEL_MODE0_INPUT 0x00000001UL

#define	_GPIO_P_MODEL_MODE0_INPUTPULL 0x00000002UL

#define	_GPIO_P_MODEL_MODE0_INPUTPULLFILTER 0x00000003UL

#define	_GPIO_P_MODEL_MODE0_MASK 0xFUL

#define	_GPIO_P_MODEL_MODE0_PUSHPULL 0x00000004UL

#define	_GPIO_P_MODEL_MODE0_PUSHPULLALT 0x00000005UL

#define	_GPIO_P_MODEL_MODE0_SHIFT 0

#define	_GPIO_P_MODEL_MODE0_WIREDAND 0x00000008UL

#define	_GPIO_P_MODEL_MODE0_WIREDANDALT 0x0000000CUL

#define	_GPIO_P_MODEL_MODE0_WIREDANDALTFILTER 0x0000000DUL

#define	_GPIO_P_MODEL_MODE0_WIREDANDALTPULLUP 0x0000000EUL

#define	_GPIO_P_MODEL_MODE0_WIREDANDALTPULLUPFILTER 0x0000000FUL

#define	_GPIO_P_MODEL_MODE0_WIREDANDFILTER 0x00000009UL

#define	_GPIO_P_MODEL_MODE0_WIREDANDPULLUP 0x0000000AUL

#define	_GPIO_P_MODEL_MODE0_WIREDANDPULLUPFILTER 0x0000000BUL

#define	_GPIO_P_MODEL_MODE0_WIREDOR 0x00000006UL

#define	_GPIO_P_MODEL_MODE0_WIREDORPULLDOWN 0x00000007UL

#define	_GPIO_P_MODEL_MODE1_DEFAULT 0x00000000UL

#define	_GPIO_P_MODEL_MODE1_DISABLED 0x00000000UL

#define	_GPIO_P_MODEL_MODE1_INPUT 0x00000001UL

#define	_GPIO_P_MODEL_MODE1_INPUTPULL 0x00000002UL

#define	_GPIO_P_MODEL_MODE1_INPUTPULLFILTER 0x00000003UL

#define	_GPIO_P_MODEL_MODE1_MASK 0xF0UL

#define	_GPIO_P_MODEL_MODE1_PUSHPULL 0x00000004UL

#define	_GPIO_P_MODEL_MODE1_PUSHPULLALT 0x00000005UL

#define	_GPIO_P_MODEL_MODE1_SHIFT 4

#define	_GPIO_P_MODEL_MODE1_WIREDAND 0x00000008UL

#define	_GPIO_P_MODEL_MODE1_WIREDANDALT 0x0000000CUL

#define	_GPIO_P_MODEL_MODE1_WIREDANDALTFILTER 0x0000000DUL

#define	_GPIO_P_MODEL_MODE1_WIREDANDALTPULLUP 0x0000000EUL

#define	_GPIO_P_MODEL_MODE1_WIREDANDALTPULLUPFILTER 0x0000000FUL

#define	_GPIO_P_MODEL_MODE1_WIREDANDFILTER 0x00000009UL

#define	_GPIO_P_MODEL_MODE1_WIREDANDPULLUP 0x0000000AUL

#define	_GPIO_P_MODEL_MODE1_WIREDANDPULLUPFILTER 0x0000000BUL

#define	_GPIO_P_MODEL_MODE1_WIREDOR 0x00000006UL

#define	_GPIO_P_MODEL_MODE1_WIREDORPULLDOWN 0x00000007UL

#define	_GPIO_P_MODEL_MODE2_DEFAULT 0x00000000UL

#define	_GPIO_P_MODEL_MODE2_DISABLED 0x00000000UL

#define	_GPIO_P_MODEL_MODE2_INPUT 0x00000001UL

#define	_GPIO_P_MODEL_MODE2_INPUTPULL 0x00000002UL

#define	_GPIO_P_MODEL_MODE2_INPUTPULLFILTER 0x00000003UL

#define	_GPIO_P_MODEL_MODE2_MASK 0xF00UL

#define	_GPIO_P_MODEL_MODE2_PUSHPULL 0x00000004UL

#define	_GPIO_P_MODEL_MODE2_PUSHPULLALT 0x00000005UL

#define	_GPIO_P_MODEL_MODE2_SHIFT 8

#define	_GPIO_P_MODEL_MODE2_WIREDAND 0x00000008UL

#define	_GPIO_P_MODEL_MODE2_WIREDANDALT 0x0000000CUL

#define	_GPIO_P_MODEL_MODE2_WIREDANDALTFILTER 0x0000000DUL

#define	_GPIO_P_MODEL_MODE2_WIREDANDALTPULLUP 0x0000000EUL

#define	_GPIO_P_MODEL_MODE2_WIREDANDALTPULLUPFILTER 0x0000000FUL

#define	_GPIO_P_MODEL_MODE2_WIREDANDFILTER 0x00000009UL

#define	_GPIO_P_MODEL_MODE2_WIREDANDPULLUP 0x0000000AUL

#define	_GPIO_P_MODEL_MODE2_WIREDANDPULLUPFILTER 0x0000000BUL

#define	_GPIO_P_MODEL_MODE2_WIREDOR 0x00000006UL

#define	_GPIO_P_MODEL_MODE2_WIREDORPULLDOWN 0x00000007UL

#define	_GPIO_P_MODEL_MODE3_DEFAULT 0x00000000UL

#define	_GPIO_P_MODEL_MODE3_DISABLED 0x00000000UL

#define	_GPIO_P_MODEL_MODE3_INPUT 0x00000001UL

#define	_GPIO_P_MODEL_MODE3_INPUTPULL 0x00000002UL

#define	_GPIO_P_MODEL_MODE3_INPUTPULLFILTER 0x00000003UL

#define	_GPIO_P_MODEL_MODE3_MASK 0xF000UL

#define	_GPIO_P_MODEL_MODE3_PUSHPULL 0x00000004UL

#define	_GPIO_P_MODEL_MODE3_PUSHPULLALT 0x00000005UL

#define	_GPIO_P_MODEL_MODE3_SHIFT 12

#define	_GPIO_P_MODEL_MODE3_WIREDAND 0x00000008UL

#define	_GPIO_P_MODEL_MODE3_WIREDANDALT 0x0000000CUL

#define	_GPIO_P_MODEL_MODE3_WIREDANDALTFILTER 0x0000000DUL

#define	_GPIO_P_MODEL_MODE3_WIREDANDALTPULLUP 0x0000000EUL

#define	_GPIO_P_MODEL_MODE3_WIREDANDALTPULLUPFILTER 0x0000000FUL

#define	_GPIO_P_MODEL_MODE3_WIREDANDFILTER 0x00000009UL

#define	_GPIO_P_MODEL_MODE3_WIREDANDPULLUP 0x0000000AUL

#define	_GPIO_P_MODEL_MODE3_WIREDANDPULLUPFILTER 0x0000000BUL

#define	_GPIO_P_MODEL_MODE3_WIREDOR 0x00000006UL

#define	_GPIO_P_MODEL_MODE3_WIREDORPULLDOWN 0x00000007UL

#define	_GPIO_P_MODEL_MODE4_DEFAULT 0x00000000UL

#define	_GPIO_P_MODEL_MODE4_DISABLED 0x00000000UL

#define	_GPIO_P_MODEL_MODE4_INPUT 0x00000001UL

#define	_GPIO_P_MODEL_MODE4_INPUTPULL 0x00000002UL

#define	_GPIO_P_MODEL_MODE4_INPUTPULLFILTER 0x00000003UL

#define	_GPIO_P_MODEL_MODE4_MASK 0xF0000UL

#define	_GPIO_P_MODEL_MODE4_PUSHPULL 0x00000004UL

#define	_GPIO_P_MODEL_MODE4_PUSHPULLALT 0x00000005UL

#define	_GPIO_P_MODEL_MODE4_SHIFT 16

#define	_GPIO_P_MODEL_MODE4_WIREDAND 0x00000008UL

#define	_GPIO_P_MODEL_MODE4_WIREDANDALT 0x0000000CUL

#define	_GPIO_P_MODEL_MODE4_WIREDANDALTFILTER 0x0000000DUL

#define	_GPIO_P_MODEL_MODE4_WIREDANDALTPULLUP 0x0000000EUL

#define	_GPIO_P_MODEL_MODE4_WIREDANDALTPULLUPFILTER 0x0000000FUL

#define	_GPIO_P_MODEL_MODE4_WIREDANDFILTER 0x00000009UL

#define	_GPIO_P_MODEL_MODE4_WIREDANDPULLUP 0x0000000AUL

#define	_GPIO_P_MODEL_MODE4_WIREDANDPULLUPFILTER 0x0000000BUL

#define	_GPIO_P_MODEL_MODE4_WIREDOR 0x00000006UL

#define	_GPIO_P_MODEL_MODE4_WIREDORPULLDOWN 0x00000007UL

#define	_GPIO_P_MODEL_MODE5_DEFAULT 0x00000000UL

#define	_GPIO_P_MODEL_MODE5_DISABLED 0x00000000UL

#define	_GPIO_P_MODEL_MODE5_INPUT 0x00000001UL

#define	_GPIO_P_MODEL_MODE5_INPUTPULL 0x00000002UL

#define	_GPIO_P_MODEL_MODE5_INPUTPULLFILTER 0x00000003UL

#define	_GPIO_P_MODEL_MODE5_MASK 0xF00000UL

#define	_GPIO_P_MODEL_MODE5_PUSHPULL 0x00000004UL

#define	_GPIO_P_MODEL_MODE5_PUSHPULLALT 0x00000005UL

#define	_GPIO_P_MODEL_MODE5_SHIFT 20

#define	_GPIO_P_MODEL_MODE5_WIREDAND 0x00000008UL

#define	_GPIO_P_MODEL_MODE5_WIREDANDALT 0x0000000CUL

#define	_GPIO_P_MODEL_MODE5_WIREDANDALTFILTER 0x0000000DUL

#define	_GPIO_P_MODEL_MODE5_WIREDANDALTPULLUP 0x0000000EUL

#define	_GPIO_P_MODEL_MODE5_WIREDANDALTPULLUPFILTER 0x0000000FUL

#define	_GPIO_P_MODEL_MODE5_WIREDANDFILTER 0x00000009UL

#define	_GPIO_P_MODEL_MODE5_WIREDANDPULLUP 0x0000000AUL

#define	_GPIO_P_MODEL_MODE5_WIREDANDPULLUPFILTER 0x0000000BUL

#define	_GPIO_P_MODEL_MODE5_WIREDOR 0x00000006UL

#define	_GPIO_P_MODEL_MODE5_WIREDORPULLDOWN 0x00000007UL

#define	_GPIO_P_MODEL_MODE6_DEFAULT 0x00000000UL

#define	_GPIO_P_MODEL_MODE6_DISABLED 0x00000000UL

#define	_GPIO_P_MODEL_MODE6_INPUT 0x00000001UL

#define	_GPIO_P_MODEL_MODE6_INPUTPULL 0x00000002UL

#define	_GPIO_P_MODEL_MODE6_INPUTPULLFILTER 0x00000003UL

#define	_GPIO_P_MODEL_MODE6_MASK 0xF000000UL

#define	_GPIO_P_MODEL_MODE6_PUSHPULL 0x00000004UL

#define	_GPIO_P_MODEL_MODE6_PUSHPULLALT 0x00000005UL

#define	_GPIO_P_MODEL_MODE6_SHIFT 24

#define	_GPIO_P_MODEL_MODE6_WIREDAND 0x00000008UL

#define	_GPIO_P_MODEL_MODE6_WIREDANDALT 0x0000000CUL

#define	_GPIO_P_MODEL_MODE6_WIREDANDALTFILTER 0x0000000DUL

#define	_GPIO_P_MODEL_MODE6_WIREDANDALTPULLUP 0x0000000EUL

#define	_GPIO_P_MODEL_MODE6_WIREDANDALTPULLUPFILTER 0x0000000FUL

#define	_GPIO_P_MODEL_MODE6_WIREDANDFILTER 0x00000009UL

#define	_GPIO_P_MODEL_MODE6_WIREDANDPULLUP 0x0000000AUL

#define	_GPIO_P_MODEL_MODE6_WIREDANDPULLUPFILTER 0x0000000BUL

#define	_GPIO_P_MODEL_MODE6_WIREDOR 0x00000006UL

#define	_GPIO_P_MODEL_MODE6_WIREDORPULLDOWN 0x00000007UL

#define	_GPIO_P_MODEL_RESETVALUE 0x00000000UL

#define	_GPIO_PRS_ASYNCH0ROUTE_MASK 0x000F0003UL

#define	_GPIO_PRS_ASYNCH0ROUTE_PIN_DEFAULT 0x00000000UL

#define	_GPIO_PRS_ASYNCH0ROUTE_PIN_MASK 0xF0000UL

#define	_GPIO_PRS_ASYNCH0ROUTE_PIN_SHIFT 16

#define	_GPIO_PRS_ASYNCH0ROUTE_PORT_DEFAULT 0x00000000UL

#define	_GPIO_PRS_ASYNCH0ROUTE_PORT_MASK 0x3UL

#define	_GPIO_PRS_ASYNCH0ROUTE_PORT_SHIFT 0

#define	_GPIO_PRS_ASYNCH0ROUTE_RESETVALUE 0x00000000UL

#define	_GPIO_PRS_ASYNCH10ROUTE_MASK 0x000F0003UL

#define	_GPIO_PRS_ASYNCH10ROUTE_PIN_DEFAULT 0x00000000UL

#define	_GPIO_PRS_ASYNCH10ROUTE_PIN_MASK 0xF0000UL

#define	_GPIO_PRS_ASYNCH10ROUTE_PIN_SHIFT 16

#define	_GPIO_PRS_ASYNCH10ROUTE_PORT_DEFAULT 0x00000000UL

#define	_GPIO_PRS_ASYNCH10ROUTE_PORT_MASK 0x3UL

#define	_GPIO_PRS_ASYNCH10ROUTE_PORT_SHIFT 0

#define	_GPIO_PRS_ASYNCH10ROUTE_RESETVALUE 0x00000000UL

#define	_GPIO_PRS_ASYNCH11ROUTE_MASK 0x000F0003UL

#define	_GPIO_PRS_ASYNCH11ROUTE_PIN_DEFAULT 0x00000000UL

#define	_GPIO_PRS_ASYNCH11ROUTE_PIN_MASK 0xF0000UL

#define	_GPIO_PRS_ASYNCH11ROUTE_PIN_SHIFT 16

#define	_GPIO_PRS_ASYNCH11ROUTE_PORT_DEFAULT 0x00000000UL

#define	_GPIO_PRS_ASYNCH11ROUTE_PORT_MASK 0x3UL

#define	_GPIO_PRS_ASYNCH11ROUTE_PORT_SHIFT 0

#define	_GPIO_PRS_ASYNCH11ROUTE_RESETVALUE 0x00000000UL

#define	_GPIO_PRS_ASYNCH1ROUTE_MASK 0x000F0003UL

#define	_GPIO_PRS_ASYNCH1ROUTE_PIN_DEFAULT 0x00000000UL

#define	_GPIO_PRS_ASYNCH1ROUTE_PIN_MASK 0xF0000UL

#define	_GPIO_PRS_ASYNCH1ROUTE_PIN_SHIFT 16

#define	_GPIO_PRS_ASYNCH1ROUTE_PORT_DEFAULT 0x00000000UL

#define	_GPIO_PRS_ASYNCH1ROUTE_PORT_MASK 0x3UL

#define	_GPIO_PRS_ASYNCH1ROUTE_PORT_SHIFT 0

#define	_GPIO_PRS_ASYNCH1ROUTE_RESETVALUE 0x00000000UL

#define	_GPIO_PRS_ASYNCH2ROUTE_MASK 0x000F0003UL

#define	_GPIO_PRS_ASYNCH2ROUTE_PIN_DEFAULT 0x00000000UL

#define	_GPIO_PRS_ASYNCH2ROUTE_PIN_MASK 0xF0000UL

#define	_GPIO_PRS_ASYNCH2ROUTE_PIN_SHIFT 16

#define	_GPIO_PRS_ASYNCH2ROUTE_PORT_DEFAULT 0x00000000UL

#define	_GPIO_PRS_ASYNCH2ROUTE_PORT_MASK 0x3UL

#define	_GPIO_PRS_ASYNCH2ROUTE_PORT_SHIFT 0

#define	_GPIO_PRS_ASYNCH2ROUTE_RESETVALUE 0x00000000UL

#define	_GPIO_PRS_ASYNCH3ROUTE_MASK 0x000F0003UL

#define	_GPIO_PRS_ASYNCH3ROUTE_PIN_DEFAULT 0x00000000UL

#define	_GPIO_PRS_ASYNCH3ROUTE_PIN_MASK 0xF0000UL

#define	_GPIO_PRS_ASYNCH3ROUTE_PIN_SHIFT 16

#define	_GPIO_PRS_ASYNCH3ROUTE_PORT_DEFAULT 0x00000000UL

#define	_GPIO_PRS_ASYNCH3ROUTE_PORT_MASK 0x3UL

#define	_GPIO_PRS_ASYNCH3ROUTE_PORT_SHIFT 0

#define	_GPIO_PRS_ASYNCH3ROUTE_RESETVALUE 0x00000000UL

#define	_GPIO_PRS_ASYNCH4ROUTE_MASK 0x000F0003UL

#define	_GPIO_PRS_ASYNCH4ROUTE_PIN_DEFAULT 0x00000000UL

#define	_GPIO_PRS_ASYNCH4ROUTE_PIN_MASK 0xF0000UL

#define	_GPIO_PRS_ASYNCH4ROUTE_PIN_SHIFT 16

#define	_GPIO_PRS_ASYNCH4ROUTE_PORT_DEFAULT 0x00000000UL

#define	_GPIO_PRS_ASYNCH4ROUTE_PORT_MASK 0x3UL

#define	_GPIO_PRS_ASYNCH4ROUTE_PORT_SHIFT 0

#define	_GPIO_PRS_ASYNCH4ROUTE_RESETVALUE 0x00000000UL

#define	_GPIO_PRS_ASYNCH5ROUTE_MASK 0x000F0003UL

#define	_GPIO_PRS_ASYNCH5ROUTE_PIN_DEFAULT 0x00000000UL

#define	_GPIO_PRS_ASYNCH5ROUTE_PIN_MASK 0xF0000UL

#define	_GPIO_PRS_ASYNCH5ROUTE_PIN_SHIFT 16

#define	_GPIO_PRS_ASYNCH5ROUTE_PORT_DEFAULT 0x00000000UL

#define	_GPIO_PRS_ASYNCH5ROUTE_PORT_MASK 0x3UL

#define	_GPIO_PRS_ASYNCH5ROUTE_PORT_SHIFT 0

#define	_GPIO_PRS_ASYNCH5ROUTE_RESETVALUE 0x00000000UL

#define	_GPIO_PRS_ASYNCH6ROUTE_MASK 0x000F0003UL

#define	_GPIO_PRS_ASYNCH6ROUTE_PIN_DEFAULT 0x00000000UL

#define	_GPIO_PRS_ASYNCH6ROUTE_PIN_MASK 0xF0000UL

#define	_GPIO_PRS_ASYNCH6ROUTE_PIN_SHIFT 16

#define	_GPIO_PRS_ASYNCH6ROUTE_PORT_DEFAULT 0x00000000UL

#define	_GPIO_PRS_ASYNCH6ROUTE_PORT_MASK 0x3UL

#define	_GPIO_PRS_ASYNCH6ROUTE_PORT_SHIFT 0

#define	_GPIO_PRS_ASYNCH6ROUTE_RESETVALUE 0x00000000UL

#define	_GPIO_PRS_ASYNCH7ROUTE_MASK 0x000F0003UL

#define	_GPIO_PRS_ASYNCH7ROUTE_PIN_DEFAULT 0x00000000UL

#define	_GPIO_PRS_ASYNCH7ROUTE_PIN_MASK 0xF0000UL

#define	_GPIO_PRS_ASYNCH7ROUTE_PIN_SHIFT 16

#define	_GPIO_PRS_ASYNCH7ROUTE_PORT_DEFAULT 0x00000000UL

#define	_GPIO_PRS_ASYNCH7ROUTE_PORT_MASK 0x3UL

#define	_GPIO_PRS_ASYNCH7ROUTE_PORT_SHIFT 0

#define	_GPIO_PRS_ASYNCH7ROUTE_RESETVALUE 0x00000000UL

#define	_GPIO_PRS_ASYNCH8ROUTE_MASK 0x000F0003UL

#define	_GPIO_PRS_ASYNCH8ROUTE_PIN_DEFAULT 0x00000000UL

#define	_GPIO_PRS_ASYNCH8ROUTE_PIN_MASK 0xF0000UL

#define	_GPIO_PRS_ASYNCH8ROUTE_PIN_SHIFT 16

#define	_GPIO_PRS_ASYNCH8ROUTE_PORT_DEFAULT 0x00000000UL

#define	_GPIO_PRS_ASYNCH8ROUTE_PORT_MASK 0x3UL

#define	_GPIO_PRS_ASYNCH8ROUTE_PORT_SHIFT 0

#define	_GPIO_PRS_ASYNCH8ROUTE_RESETVALUE 0x00000000UL

#define	_GPIO_PRS_ASYNCH9ROUTE_MASK 0x000F0003UL

#define	_GPIO_PRS_ASYNCH9ROUTE_PIN_DEFAULT 0x00000000UL

#define	_GPIO_PRS_ASYNCH9ROUTE_PIN_MASK 0xF0000UL

#define	_GPIO_PRS_ASYNCH9ROUTE_PIN_SHIFT 16

#define	_GPIO_PRS_ASYNCH9ROUTE_PORT_DEFAULT 0x00000000UL

#define	_GPIO_PRS_ASYNCH9ROUTE_PORT_MASK 0x3UL

#define	_GPIO_PRS_ASYNCH9ROUTE_PORT_SHIFT 0

#define	_GPIO_PRS_ASYNCH9ROUTE_RESETVALUE 0x00000000UL

#define	_GPIO_PRS_ROUTEEN_ASYNCH0PEN_DEFAULT 0x00000000UL

#define	_GPIO_PRS_ROUTEEN_ASYNCH0PEN_MASK 0x1UL

#define	_GPIO_PRS_ROUTEEN_ASYNCH0PEN_SHIFT 0

#define	_GPIO_PRS_ROUTEEN_ASYNCH10PEN_DEFAULT 0x00000000UL

#define	_GPIO_PRS_ROUTEEN_ASYNCH10PEN_MASK 0x400UL

#define	_GPIO_PRS_ROUTEEN_ASYNCH10PEN_SHIFT 10

#define	_GPIO_PRS_ROUTEEN_ASYNCH11PEN_DEFAULT 0x00000000UL

#define	_GPIO_PRS_ROUTEEN_ASYNCH11PEN_MASK 0x800UL

#define	_GPIO_PRS_ROUTEEN_ASYNCH11PEN_SHIFT 11

#define	_GPIO_PRS_ROUTEEN_ASYNCH1PEN_DEFAULT 0x00000000UL

#define	_GPIO_PRS_ROUTEEN_ASYNCH1PEN_MASK 0x2UL

#define	_GPIO_PRS_ROUTEEN_ASYNCH1PEN_SHIFT 1

#define	_GPIO_PRS_ROUTEEN_ASYNCH2PEN_DEFAULT 0x00000000UL

#define	_GPIO_PRS_ROUTEEN_ASYNCH2PEN_MASK 0x4UL

#define	_GPIO_PRS_ROUTEEN_ASYNCH2PEN_SHIFT 2

#define	_GPIO_PRS_ROUTEEN_ASYNCH3PEN_DEFAULT 0x00000000UL

#define	_GPIO_PRS_ROUTEEN_ASYNCH3PEN_MASK 0x8UL

#define	_GPIO_PRS_ROUTEEN_ASYNCH3PEN_SHIFT 3

#define	_GPIO_PRS_ROUTEEN_ASYNCH4PEN_DEFAULT 0x00000000UL

#define	_GPIO_PRS_ROUTEEN_ASYNCH4PEN_MASK 0x10UL

#define	_GPIO_PRS_ROUTEEN_ASYNCH4PEN_SHIFT 4

#define	_GPIO_PRS_ROUTEEN_ASYNCH5PEN_DEFAULT 0x00000000UL

#define	_GPIO_PRS_ROUTEEN_ASYNCH5PEN_MASK 0x20UL

#define	_GPIO_PRS_ROUTEEN_ASYNCH5PEN_SHIFT 5

#define	_GPIO_PRS_ROUTEEN_ASYNCH6PEN_DEFAULT 0x00000000UL

#define	_GPIO_PRS_ROUTEEN_ASYNCH6PEN_MASK 0x40UL

#define	_GPIO_PRS_ROUTEEN_ASYNCH6PEN_SHIFT 6

#define	_GPIO_PRS_ROUTEEN_ASYNCH7PEN_DEFAULT 0x00000000UL

#define	_GPIO_PRS_ROUTEEN_ASYNCH7PEN_MASK 0x80UL

#define	_GPIO_PRS_ROUTEEN_ASYNCH7PEN_SHIFT 7

#define	_GPIO_PRS_ROUTEEN_ASYNCH8PEN_DEFAULT 0x00000000UL

#define	_GPIO_PRS_ROUTEEN_ASYNCH8PEN_MASK 0x100UL

#define	_GPIO_PRS_ROUTEEN_ASYNCH8PEN_SHIFT 8

#define	_GPIO_PRS_ROUTEEN_ASYNCH9PEN_DEFAULT 0x00000000UL

#define	_GPIO_PRS_ROUTEEN_ASYNCH9PEN_MASK 0x200UL

#define	_GPIO_PRS_ROUTEEN_ASYNCH9PEN_SHIFT 9

#define	_GPIO_PRS_ROUTEEN_MASK 0x0000FFFFUL

#define	_GPIO_PRS_ROUTEEN_RESETVALUE 0x00000000UL

#define	_GPIO_PRS_ROUTEEN_SYNCH0PEN_DEFAULT 0x00000000UL

#define	_GPIO_PRS_ROUTEEN_SYNCH0PEN_MASK 0x1000UL

#define	_GPIO_PRS_ROUTEEN_SYNCH0PEN_SHIFT 12

#define	_GPIO_PRS_ROUTEEN_SYNCH1PEN_DEFAULT 0x00000000UL

#define	_GPIO_PRS_ROUTEEN_SYNCH1PEN_MASK 0x2000UL

#define	_GPIO_PRS_ROUTEEN_SYNCH1PEN_SHIFT 13

#define	_GPIO_PRS_ROUTEEN_SYNCH2PEN_DEFAULT 0x00000000UL

#define	_GPIO_PRS_ROUTEEN_SYNCH2PEN_MASK 0x4000UL

#define	_GPIO_PRS_ROUTEEN_SYNCH2PEN_SHIFT 14

#define	_GPIO_PRS_ROUTEEN_SYNCH3PEN_DEFAULT 0x00000000UL

#define	_GPIO_PRS_ROUTEEN_SYNCH3PEN_MASK 0x8000UL

#define	_GPIO_PRS_ROUTEEN_SYNCH3PEN_SHIFT 15

#define	_GPIO_PRS_SYNCH0ROUTE_MASK 0x000F0003UL

#define	_GPIO_PRS_SYNCH0ROUTE_PIN_DEFAULT 0x00000000UL

#define	_GPIO_PRS_SYNCH0ROUTE_PIN_MASK 0xF0000UL

#define	_GPIO_PRS_SYNCH0ROUTE_PIN_SHIFT 16

#define	_GPIO_PRS_SYNCH0ROUTE_PORT_DEFAULT 0x00000000UL

#define	_GPIO_PRS_SYNCH0ROUTE_PORT_MASK 0x3UL

#define	_GPIO_PRS_SYNCH0ROUTE_PORT_SHIFT 0

#define	_GPIO_PRS_SYNCH0ROUTE_RESETVALUE 0x00000000UL

#define	_GPIO_PRS_SYNCH1ROUTE_MASK 0x000F0003UL

#define	_GPIO_PRS_SYNCH1ROUTE_PIN_DEFAULT 0x00000000UL

#define	_GPIO_PRS_SYNCH1ROUTE_PIN_MASK 0xF0000UL

#define	_GPIO_PRS_SYNCH1ROUTE_PIN_SHIFT 16

#define	_GPIO_PRS_SYNCH1ROUTE_PORT_DEFAULT 0x00000000UL

#define	_GPIO_PRS_SYNCH1ROUTE_PORT_MASK 0x3UL

#define	_GPIO_PRS_SYNCH1ROUTE_PORT_SHIFT 0

#define	_GPIO_PRS_SYNCH1ROUTE_RESETVALUE 0x00000000UL

#define	_GPIO_PRS_SYNCH2ROUTE_MASK 0x000F0003UL

#define	_GPIO_PRS_SYNCH2ROUTE_PIN_DEFAULT 0x00000000UL

#define	_GPIO_PRS_SYNCH2ROUTE_PIN_MASK 0xF0000UL

#define	_GPIO_PRS_SYNCH2ROUTE_PIN_SHIFT 16

#define	_GPIO_PRS_SYNCH2ROUTE_PORT_DEFAULT 0x00000000UL

#define	_GPIO_PRS_SYNCH2ROUTE_PORT_MASK 0x3UL

#define	_GPIO_PRS_SYNCH2ROUTE_PORT_SHIFT 0

#define	_GPIO_PRS_SYNCH2ROUTE_RESETVALUE 0x00000000UL

#define	_GPIO_PRS_SYNCH3ROUTE_MASK 0x000F0003UL

#define	_GPIO_PRS_SYNCH3ROUTE_PIN_DEFAULT 0x00000000UL

#define	_GPIO_PRS_SYNCH3ROUTE_PIN_MASK 0xF0000UL

#define	_GPIO_PRS_SYNCH3ROUTE_PIN_SHIFT 16

#define	_GPIO_PRS_SYNCH3ROUTE_PORT_DEFAULT 0x00000000UL

#define	_GPIO_PRS_SYNCH3ROUTE_PORT_MASK 0x3UL

#define	_GPIO_PRS_SYNCH3ROUTE_PORT_SHIFT 0

#define	_GPIO_PRS_SYNCH3ROUTE_RESETVALUE 0x00000000UL

#define	_GPIO_TIMER_CC0ROUTE_MASK 0x000F0003UL

#define	_GPIO_TIMER_CC0ROUTE_PIN_DEFAULT 0x00000000UL

#define	_GPIO_TIMER_CC0ROUTE_PIN_MASK 0xF0000UL

#define	_GPIO_TIMER_CC0ROUTE_PIN_SHIFT 16

#define	_GPIO_TIMER_CC0ROUTE_PORT_DEFAULT 0x00000000UL

#define	_GPIO_TIMER_CC0ROUTE_PORT_MASK 0x3UL

#define	_GPIO_TIMER_CC0ROUTE_PORT_SHIFT 0

#define	_GPIO_TIMER_CC0ROUTE_RESETVALUE 0x00000000UL

#define	_GPIO_TIMER_CC1ROUTE_MASK 0x000F0003UL

#define	_GPIO_TIMER_CC1ROUTE_PIN_DEFAULT 0x00000000UL

#define	_GPIO_TIMER_CC1ROUTE_PIN_MASK 0xF0000UL

#define	_GPIO_TIMER_CC1ROUTE_PIN_SHIFT 16

#define	_GPIO_TIMER_CC1ROUTE_PORT_DEFAULT 0x00000000UL

#define	_GPIO_TIMER_CC1ROUTE_PORT_MASK 0x3UL

#define	_GPIO_TIMER_CC1ROUTE_PORT_SHIFT 0

#define	_GPIO_TIMER_CC1ROUTE_RESETVALUE 0x00000000UL

#define	_GPIO_TIMER_CC2ROUTE_MASK 0x000F0003UL

#define	_GPIO_TIMER_CC2ROUTE_PIN_DEFAULT 0x00000000UL

#define	_GPIO_TIMER_CC2ROUTE_PIN_MASK 0xF0000UL

#define	_GPIO_TIMER_CC2ROUTE_PIN_SHIFT 16

#define	_GPIO_TIMER_CC2ROUTE_PORT_DEFAULT 0x00000000UL

#define	_GPIO_TIMER_CC2ROUTE_PORT_MASK 0x3UL

#define	_GPIO_TIMER_CC2ROUTE_PORT_SHIFT 0

#define	_GPIO_TIMER_CC2ROUTE_RESETVALUE 0x00000000UL

#define	_GPIO_TIMER_CDTI0ROUTE_MASK 0x000F0003UL

#define	_GPIO_TIMER_CDTI0ROUTE_PIN_DEFAULT 0x00000000UL

#define	_GPIO_TIMER_CDTI0ROUTE_PIN_MASK 0xF0000UL

#define	_GPIO_TIMER_CDTI0ROUTE_PIN_SHIFT 16

#define	_GPIO_TIMER_CDTI0ROUTE_PORT_DEFAULT 0x00000000UL

#define	_GPIO_TIMER_CDTI0ROUTE_PORT_MASK 0x3UL

#define	_GPIO_TIMER_CDTI0ROUTE_PORT_SHIFT 0

#define	_GPIO_TIMER_CDTI0ROUTE_RESETVALUE 0x00000000UL

#define	_GPIO_TIMER_CDTI1ROUTE_MASK 0x000F0003UL

#define	_GPIO_TIMER_CDTI1ROUTE_PIN_DEFAULT 0x00000000UL

#define	_GPIO_TIMER_CDTI1ROUTE_PIN_MASK 0xF0000UL

#define	_GPIO_TIMER_CDTI1ROUTE_PIN_SHIFT 16

#define	_GPIO_TIMER_CDTI1ROUTE_PORT_DEFAULT 0x00000000UL

#define	_GPIO_TIMER_CDTI1ROUTE_PORT_MASK 0x3UL

#define	_GPIO_TIMER_CDTI1ROUTE_PORT_SHIFT 0

#define	_GPIO_TIMER_CDTI1ROUTE_RESETVALUE 0x00000000UL

#define	_GPIO_TIMER_CDTI2ROUTE_MASK 0x000F0003UL

#define	_GPIO_TIMER_CDTI2ROUTE_PIN_DEFAULT 0x00000000UL

#define	_GPIO_TIMER_CDTI2ROUTE_PIN_MASK 0xF0000UL

#define	_GPIO_TIMER_CDTI2ROUTE_PIN_SHIFT 16

#define	_GPIO_TIMER_CDTI2ROUTE_PORT_DEFAULT 0x00000000UL

#define	_GPIO_TIMER_CDTI2ROUTE_PORT_MASK 0x3UL

#define	_GPIO_TIMER_CDTI2ROUTE_PORT_SHIFT 0

#define	_GPIO_TIMER_CDTI2ROUTE_RESETVALUE 0x00000000UL

#define	_GPIO_TIMER_ROUTEEN_CC0PEN_DEFAULT 0x00000000UL

#define	_GPIO_TIMER_ROUTEEN_CC0PEN_MASK 0x1UL

#define	_GPIO_TIMER_ROUTEEN_CC0PEN_SHIFT 0

#define	_GPIO_TIMER_ROUTEEN_CC1PEN_DEFAULT 0x00000000UL

#define	_GPIO_TIMER_ROUTEEN_CC1PEN_MASK 0x2UL

#define	_GPIO_TIMER_ROUTEEN_CC1PEN_SHIFT 1

#define	_GPIO_TIMER_ROUTEEN_CC2PEN_DEFAULT 0x00000000UL

#define	_GPIO_TIMER_ROUTEEN_CC2PEN_MASK 0x4UL

#define	_GPIO_TIMER_ROUTEEN_CC2PEN_SHIFT 2

#define	_GPIO_TIMER_ROUTEEN_CDTI0PEN_DEFAULT 0x00000000UL

#define	_GPIO_TIMER_ROUTEEN_CDTI0PEN_MASK 0x8UL

#define	_GPIO_TIMER_ROUTEEN_CDTI0PEN_SHIFT 3

#define	_GPIO_TIMER_ROUTEEN_CDTI1PEN_DEFAULT 0x00000000UL

#define	_GPIO_TIMER_ROUTEEN_CDTI1PEN_MASK 0x10UL

#define	_GPIO_TIMER_ROUTEEN_CDTI1PEN_SHIFT 4

#define	_GPIO_TIMER_ROUTEEN_CDTI2PEN_DEFAULT 0x00000000UL

#define	_GPIO_TIMER_ROUTEEN_CDTI2PEN_MASK 0x20UL

#define	_GPIO_TIMER_ROUTEEN_CDTI2PEN_SHIFT 5

#define	_GPIO_TIMER_ROUTEEN_MASK 0x0000003FUL

#define	_GPIO_TIMER_ROUTEEN_RESETVALUE 0x00000000UL

#define	_GPIO_TRACEROUTEPEN_MASK 0x00000007UL

#define	_GPIO_TRACEROUTEPEN_RESETVALUE 0x00000000UL

#define	_GPIO_TRACEROUTEPEN_SWVPEN_DEFAULT 0x00000000UL

#define	_GPIO_TRACEROUTEPEN_SWVPEN_MASK 0x1UL

#define	_GPIO_TRACEROUTEPEN_SWVPEN_SHIFT 0

#define	_GPIO_TRACEROUTEPEN_TRACECLKPEN_DEFAULT 0x00000000UL

#define	_GPIO_TRACEROUTEPEN_TRACECLKPEN_MASK 0x2UL

#define	_GPIO_TRACEROUTEPEN_TRACECLKPEN_SHIFT 1

#define	_GPIO_TRACEROUTEPEN_TRACEDATA0PEN_DEFAULT 0x00000000UL

#define	_GPIO_TRACEROUTEPEN_TRACEDATA0PEN_MASK 0x4UL

#define	_GPIO_TRACEROUTEPEN_TRACEDATA0PEN_SHIFT 2

#define	_GPIO_USART_CLKROUTE_MASK 0x000F0003UL

#define	_GPIO_USART_CLKROUTE_PIN_DEFAULT 0x00000000UL

#define	_GPIO_USART_CLKROUTE_PIN_MASK 0xF0000UL

#define	_GPIO_USART_CLKROUTE_PIN_SHIFT 16

#define	_GPIO_USART_CLKROUTE_PORT_DEFAULT 0x00000000UL

#define	_GPIO_USART_CLKROUTE_PORT_MASK 0x3UL

#define	_GPIO_USART_CLKROUTE_PORT_SHIFT 0

#define	_GPIO_USART_CLKROUTE_RESETVALUE 0x00000000UL

#define	_GPIO_USART_CSROUTE_MASK 0x000F0003UL

#define	_GPIO_USART_CSROUTE_PIN_DEFAULT 0x00000000UL

#define	_GPIO_USART_CSROUTE_PIN_MASK 0xF0000UL

#define	_GPIO_USART_CSROUTE_PIN_SHIFT 16

#define	_GPIO_USART_CSROUTE_PORT_DEFAULT 0x00000000UL

#define	_GPIO_USART_CSROUTE_PORT_MASK 0x3UL

#define	_GPIO_USART_CSROUTE_PORT_SHIFT 0

#define	_GPIO_USART_CSROUTE_RESETVALUE 0x00000000UL

#define	_GPIO_USART_CTSROUTE_MASK 0x000F0003UL

#define	_GPIO_USART_CTSROUTE_PIN_DEFAULT 0x00000000UL

#define	_GPIO_USART_CTSROUTE_PIN_MASK 0xF0000UL

#define	_GPIO_USART_CTSROUTE_PIN_SHIFT 16

#define	_GPIO_USART_CTSROUTE_PORT_DEFAULT 0x00000000UL

#define	_GPIO_USART_CTSROUTE_PORT_MASK 0x3UL

#define	_GPIO_USART_CTSROUTE_PORT_SHIFT 0

#define	_GPIO_USART_CTSROUTE_RESETVALUE 0x00000000UL

#define	_GPIO_USART_ROUTEEN_CLKPEN_DEFAULT 0x00000000UL

#define	_GPIO_USART_ROUTEEN_CLKPEN_MASK 0x8UL

#define	_GPIO_USART_ROUTEEN_CLKPEN_SHIFT 3

#define	_GPIO_USART_ROUTEEN_CSPEN_DEFAULT 0x00000000UL

#define	_GPIO_USART_ROUTEEN_CSPEN_MASK 0x1UL

#define	_GPIO_USART_ROUTEEN_CSPEN_SHIFT 0

#define	_GPIO_USART_ROUTEEN_MASK 0x0000001FUL

#define	_GPIO_USART_ROUTEEN_RESETVALUE 0x00000000UL

#define	_GPIO_USART_ROUTEEN_RTSPEN_DEFAULT 0x00000000UL

#define	_GPIO_USART_ROUTEEN_RTSPEN_MASK 0x2UL

#define	_GPIO_USART_ROUTEEN_RTSPEN_SHIFT 1

#define	_GPIO_USART_ROUTEEN_RXPEN_DEFAULT 0x00000000UL

#define	_GPIO_USART_ROUTEEN_RXPEN_MASK 0x4UL

#define	_GPIO_USART_ROUTEEN_RXPEN_SHIFT 2

#define	_GPIO_USART_ROUTEEN_TXPEN_DEFAULT 0x00000000UL

#define	_GPIO_USART_ROUTEEN_TXPEN_MASK 0x10UL

#define	_GPIO_USART_ROUTEEN_TXPEN_SHIFT 4

#define	_GPIO_USART_RTSROUTE_MASK 0x000F0003UL

#define	_GPIO_USART_RTSROUTE_PIN_DEFAULT 0x00000000UL

#define	_GPIO_USART_RTSROUTE_PIN_MASK 0xF0000UL

#define	_GPIO_USART_RTSROUTE_PIN_SHIFT 16

#define	_GPIO_USART_RTSROUTE_PORT_DEFAULT 0x00000000UL

#define	_GPIO_USART_RTSROUTE_PORT_MASK 0x3UL

#define	_GPIO_USART_RTSROUTE_PORT_SHIFT 0

#define	_GPIO_USART_RTSROUTE_RESETVALUE 0x00000000UL

#define	_GPIO_USART_RXROUTE_MASK 0x000F0003UL

#define	_GPIO_USART_RXROUTE_PIN_DEFAULT 0x00000000UL

#define	_GPIO_USART_RXROUTE_PIN_MASK 0xF0000UL

#define	_GPIO_USART_RXROUTE_PIN_SHIFT 16

#define	_GPIO_USART_RXROUTE_PORT_DEFAULT 0x00000000UL

#define	_GPIO_USART_RXROUTE_PORT_MASK 0x3UL

#define	_GPIO_USART_RXROUTE_PORT_SHIFT 0

#define	_GPIO_USART_RXROUTE_RESETVALUE 0x00000000UL

#define	_GPIO_USART_TXROUTE_MASK 0x000F0003UL

#define	_GPIO_USART_TXROUTE_PIN_DEFAULT 0x00000000UL

#define	_GPIO_USART_TXROUTE_PIN_MASK 0xF0000UL

#define	_GPIO_USART_TXROUTE_PIN_SHIFT 16

#define	_GPIO_USART_TXROUTE_PORT_DEFAULT 0x00000000UL

#define	_GPIO_USART_TXROUTE_PORT_MASK 0x3UL

#define	_GPIO_USART_TXROUTE_PORT_SHIFT 0

#define	_GPIO_USART_TXROUTE_RESETVALUE 0x00000000UL

#define	GPIO_ABUSALLOC_AEVEN0_ACMP0 ( _GPIO_ABUSALLOC_AEVEN0_ACMP0 << 0)

#define	GPIO_ABUSALLOC_AEVEN0_ACMP1 ( _GPIO_ABUSALLOC_AEVEN0_ACMP1 << 0)

#define	GPIO_ABUSALLOC_AEVEN0_ADC0 ( _GPIO_ABUSALLOC_AEVEN0_ADC0 << 0)

#define	GPIO_ABUSALLOC_AEVEN0_DEBUG ( _GPIO_ABUSALLOC_AEVEN0_DEBUG << 0)

#define	GPIO_ABUSALLOC_AEVEN0_DEFAULT ( _GPIO_ABUSALLOC_AEVEN0_DEFAULT << 0)

#define	GPIO_ABUSALLOC_AEVEN0_DIAGA ( _GPIO_ABUSALLOC_AEVEN0_DIAGA << 0)

#define	GPIO_ABUSALLOC_AEVEN0_TRISTATE ( _GPIO_ABUSALLOC_AEVEN0_TRISTATE << 0)

#define	GPIO_ABUSALLOC_AEVEN1_ACMP0 ( _GPIO_ABUSALLOC_AEVEN1_ACMP0 << 8)

#define	GPIO_ABUSALLOC_AEVEN1_ACMP1 ( _GPIO_ABUSALLOC_AEVEN1_ACMP1 << 8)

#define	GPIO_ABUSALLOC_AEVEN1_ADC0 ( _GPIO_ABUSALLOC_AEVEN1_ADC0 << 8)

#define	GPIO_ABUSALLOC_AEVEN1_DEBUG ( _GPIO_ABUSALLOC_AEVEN1_DEBUG << 8)

#define	GPIO_ABUSALLOC_AEVEN1_DEFAULT ( _GPIO_ABUSALLOC_AEVEN1_DEFAULT << 8)

#define	GPIO_ABUSALLOC_AEVEN1_TRISTATE ( _GPIO_ABUSALLOC_AEVEN1_TRISTATE << 8)

#define	GPIO_ABUSALLOC_AODD0_ACMP0 ( _GPIO_ABUSALLOC_AODD0_ACMP0 << 16)

#define	GPIO_ABUSALLOC_AODD0_ACMP1 ( _GPIO_ABUSALLOC_AODD0_ACMP1 << 16)

#define	GPIO_ABUSALLOC_AODD0_ADC0 ( _GPIO_ABUSALLOC_AODD0_ADC0 << 16)

#define	GPIO_ABUSALLOC_AODD0_DEBUG ( _GPIO_ABUSALLOC_AODD0_DEBUG << 16)

#define	GPIO_ABUSALLOC_AODD0_DEFAULT ( _GPIO_ABUSALLOC_AODD0_DEFAULT << 16)

#define	GPIO_ABUSALLOC_AODD0_DIAGA ( _GPIO_ABUSALLOC_AODD0_DIAGA << 16)

#define	GPIO_ABUSALLOC_AODD0_TRISTATE ( _GPIO_ABUSALLOC_AODD0_TRISTATE << 16)

#define	GPIO_ABUSALLOC_AODD1_ACMP0 ( _GPIO_ABUSALLOC_AODD1_ACMP0 << 24)

#define	GPIO_ABUSALLOC_AODD1_ACMP1 ( _GPIO_ABUSALLOC_AODD1_ACMP1 << 24)

#define	GPIO_ABUSALLOC_AODD1_ADC0 ( _GPIO_ABUSALLOC_AODD1_ADC0 << 24)

#define	GPIO_ABUSALLOC_AODD1_DEBUG ( _GPIO_ABUSALLOC_AODD1_DEBUG << 24)

#define	GPIO_ABUSALLOC_AODD1_DEFAULT ( _GPIO_ABUSALLOC_AODD1_DEFAULT << 24)

#define	GPIO_ABUSALLOC_AODD1_TRISTATE ( _GPIO_ABUSALLOC_AODD1_TRISTATE << 24)

#define	GPIO_ACMP_ACMPOUTROUTE_PIN_DEFAULT ( _GPIO_ACMP_ACMPOUTROUTE_PIN_DEFAULT << 16)

#define	GPIO_ACMP_ACMPOUTROUTE_PORT_DEFAULT ( _GPIO_ACMP_ACMPOUTROUTE_PORT_DEFAULT << 0)

#define	GPIO_ACMP_ROUTEEN_ACMPOUTPEN (0x1UL << 0)

#define	GPIO_ACMP_ROUTEEN_ACMPOUTPEN_DEFAULT ( _GPIO_ACMP_ROUTEEN_ACMPOUTPEN_DEFAULT << 0)

#define	GPIO_AEVEN0SWITCH_AEVEN0SWITCH_DEFAULT ( _GPIO_AEVEN0SWITCH_AEVEN0SWITCH_DEFAULT << 0)

#define	GPIO_AEVEN1SWITCH_AEVEN1SWITCH_DEFAULT ( _GPIO_AEVEN1SWITCH_AEVEN1SWITCH_DEFAULT << 0)

#define	GPIO_AODD0SWITCH_AODD0SWITCH_DEFAULT ( _GPIO_AODD0SWITCH_AODD0SWITCH_DEFAULT << 0)

#define	GPIO_AODD1SWITCH_AODD1SWITCH_DEFAULT ( _GPIO_AODD1SWITCH_AODD1SWITCH_DEFAULT << 0)

#define	GPIO_BBUSALLOC_BEVEN0_ACMP0 ( _GPIO_BBUSALLOC_BEVEN0_ACMP0 << 0)

#define	GPIO_BBUSALLOC_BEVEN0_ACMP1 ( _GPIO_BBUSALLOC_BEVEN0_ACMP1 << 0)

#define	GPIO_BBUSALLOC_BEVEN0_ADC0 ( _GPIO_BBUSALLOC_BEVEN0_ADC0 << 0)

#define	GPIO_BBUSALLOC_BEVEN0_DEBUG ( _GPIO_BBUSALLOC_BEVEN0_DEBUG << 0)

#define	GPIO_BBUSALLOC_BEVEN0_DEFAULT ( _GPIO_BBUSALLOC_BEVEN0_DEFAULT << 0)

#define	GPIO_BBUSALLOC_BEVEN0_TRISTATE ( _GPIO_BBUSALLOC_BEVEN0_TRISTATE << 0)

#define	GPIO_BBUSALLOC_BEVEN1_ACMP0 ( _GPIO_BBUSALLOC_BEVEN1_ACMP0 << 8)

#define	GPIO_BBUSALLOC_BEVEN1_ACMP1 ( _GPIO_BBUSALLOC_BEVEN1_ACMP1 << 8)

#define	GPIO_BBUSALLOC_BEVEN1_ADC0 ( _GPIO_BBUSALLOC_BEVEN1_ADC0 << 8)

#define	GPIO_BBUSALLOC_BEVEN1_DEBUG ( _GPIO_BBUSALLOC_BEVEN1_DEBUG << 8)

#define	GPIO_BBUSALLOC_BEVEN1_DEFAULT ( _GPIO_BBUSALLOC_BEVEN1_DEFAULT << 8)

#define	GPIO_BBUSALLOC_BEVEN1_TRISTATE ( _GPIO_BBUSALLOC_BEVEN1_TRISTATE << 8)

#define	GPIO_BBUSALLOC_BODD0_ACMP0 ( _GPIO_BBUSALLOC_BODD0_ACMP0 << 16)

#define	GPIO_BBUSALLOC_BODD0_ACMP1 ( _GPIO_BBUSALLOC_BODD0_ACMP1 << 16)

#define	GPIO_BBUSALLOC_BODD0_ADC0 ( _GPIO_BBUSALLOC_BODD0_ADC0 << 16)

#define	GPIO_BBUSALLOC_BODD0_DEBUG ( _GPIO_BBUSALLOC_BODD0_DEBUG << 16)

#define	GPIO_BBUSALLOC_BODD0_DEFAULT ( _GPIO_BBUSALLOC_BODD0_DEFAULT << 16)

#define	GPIO_BBUSALLOC_BODD0_TRISTATE ( _GPIO_BBUSALLOC_BODD0_TRISTATE << 16)

#define	GPIO_BBUSALLOC_BODD1_ACMP0 ( _GPIO_BBUSALLOC_BODD1_ACMP0 << 24)

#define	GPIO_BBUSALLOC_BODD1_ACMP1 ( _GPIO_BBUSALLOC_BODD1_ACMP1 << 24)

#define	GPIO_BBUSALLOC_BODD1_ADC0 ( _GPIO_BBUSALLOC_BODD1_ADC0 << 24)

#define	GPIO_BBUSALLOC_BODD1_DEBUG ( _GPIO_BBUSALLOC_BODD1_DEBUG << 24)

#define	GPIO_BBUSALLOC_BODD1_DEFAULT ( _GPIO_BBUSALLOC_BODD1_DEFAULT << 24)

#define	GPIO_BBUSALLOC_BODD1_TRISTATE ( _GPIO_BBUSALLOC_BODD1_TRISTATE << 24)

#define	GPIO_BEVEN0SWITCH_BEVEN0SWITCH (0x1UL << 0)

#define	GPIO_BEVEN0SWITCH_BEVEN0SWITCH_DEFAULT ( _GPIO_BEVEN0SWITCH_BEVEN0SWITCH_DEFAULT << 0)

#define	GPIO_BEVEN1SWITCH_BEVEN1SWITCH (0x1UL << 0)

#define	GPIO_BEVEN1SWITCH_BEVEN1SWITCH_DEFAULT ( _GPIO_BEVEN1SWITCH_BEVEN1SWITCH_DEFAULT << 0)

#define	GPIO_BODD0SWITCH_BODD0SWITCH (0x1UL << 0)

#define	GPIO_BODD0SWITCH_BODD0SWITCH_DEFAULT ( _GPIO_BODD0SWITCH_BODD0SWITCH_DEFAULT << 0)

#define	GPIO_BODD1SWITCH_BODD1SWITCH (0x1UL << 0)

#define	GPIO_BODD1SWITCH_BODD1SWITCH_DEFAULT ( _GPIO_BODD1SWITCH_BODD1SWITCH_DEFAULT << 0)

#define	GPIO_CDBUSALLOC_CDEVEN0_ACMP0 ( _GPIO_CDBUSALLOC_CDEVEN0_ACMP0 << 0)

#define	GPIO_CDBUSALLOC_CDEVEN0_ACMP1 ( _GPIO_CDBUSALLOC_CDEVEN0_ACMP1 << 0)

#define	GPIO_CDBUSALLOC_CDEVEN0_ADC0 ( _GPIO_CDBUSALLOC_CDEVEN0_ADC0 << 0)

#define	GPIO_CDBUSALLOC_CDEVEN0_DEBUG ( _GPIO_CDBUSALLOC_CDEVEN0_DEBUG << 0)

#define	GPIO_CDBUSALLOC_CDEVEN0_DEFAULT ( _GPIO_CDBUSALLOC_CDEVEN0_DEFAULT << 0)

#define	GPIO_CDBUSALLOC_CDEVEN0_EFUSE ( _GPIO_CDBUSALLOC_CDEVEN0_EFUSE << 0)

#define	GPIO_CDBUSALLOC_CDEVEN0_PMON ( _GPIO_CDBUSALLOC_CDEVEN0_PMON << 0)

#define	GPIO_CDBUSALLOC_CDEVEN0_TRISTATE ( _GPIO_CDBUSALLOC_CDEVEN0_TRISTATE << 0)

#define	GPIO_CDBUSALLOC_CDEVEN1_ACMP0 ( _GPIO_CDBUSALLOC_CDEVEN1_ACMP0 << 8)

#define	GPIO_CDBUSALLOC_CDEVEN1_ACMP1 ( _GPIO_CDBUSALLOC_CDEVEN1_ACMP1 << 8)

#define	GPIO_CDBUSALLOC_CDEVEN1_ADC0 ( _GPIO_CDBUSALLOC_CDEVEN1_ADC0 << 8)

#define	GPIO_CDBUSALLOC_CDEVEN1_DEBUG ( _GPIO_CDBUSALLOC_CDEVEN1_DEBUG << 8)

#define	GPIO_CDBUSALLOC_CDEVEN1_DEFAULT ( _GPIO_CDBUSALLOC_CDEVEN1_DEFAULT << 8)

#define	GPIO_CDBUSALLOC_CDEVEN1_TRISTATE ( _GPIO_CDBUSALLOC_CDEVEN1_TRISTATE << 8)

#define	GPIO_CDBUSALLOC_CDODD0_ACMP0 ( _GPIO_CDBUSALLOC_CDODD0_ACMP0 << 16)

#define	GPIO_CDBUSALLOC_CDODD0_ACMP1 ( _GPIO_CDBUSALLOC_CDODD0_ACMP1 << 16)

#define	GPIO_CDBUSALLOC_CDODD0_ADC0 ( _GPIO_CDBUSALLOC_CDODD0_ADC0 << 16)

#define	GPIO_CDBUSALLOC_CDODD0_DEBUG ( _GPIO_CDBUSALLOC_CDODD0_DEBUG << 16)

#define	GPIO_CDBUSALLOC_CDODD0_DEFAULT ( _GPIO_CDBUSALLOC_CDODD0_DEFAULT << 16)

#define	GPIO_CDBUSALLOC_CDODD0_PMON ( _GPIO_CDBUSALLOC_CDODD0_PMON << 16)

#define	GPIO_CDBUSALLOC_CDODD0_TRISTATE ( _GPIO_CDBUSALLOC_CDODD0_TRISTATE << 16)

#define	GPIO_CDBUSALLOC_CDODD1_ACMP0 ( _GPIO_CDBUSALLOC_CDODD1_ACMP0 << 24)

#define	GPIO_CDBUSALLOC_CDODD1_ACMP1 ( _GPIO_CDBUSALLOC_CDODD1_ACMP1 << 24)

#define	GPIO_CDBUSALLOC_CDODD1_ADC0 ( _GPIO_CDBUSALLOC_CDODD1_ADC0 << 24)

#define	GPIO_CDBUSALLOC_CDODD1_DEBUG ( _GPIO_CDBUSALLOC_CDODD1_DEBUG << 24)

#define	GPIO_CDBUSALLOC_CDODD1_DEFAULT ( _GPIO_CDBUSALLOC_CDODD1_DEFAULT << 24)

#define	GPIO_CDBUSALLOC_CDODD1_TRISTATE ( _GPIO_CDBUSALLOC_CDODD1_TRISTATE << 24)

#define	GPIO_CDEVEN0SWITCH_CEVEN0SWITCH_DEFAULT ( _GPIO_CDEVEN0SWITCH_CEVEN0SWITCH_DEFAULT << 0)

#define	GPIO_CDEVEN0SWITCH_DEVEN0SWITCH_DEFAULT ( _GPIO_CDEVEN0SWITCH_DEVEN0SWITCH_DEFAULT << 16)

#define	GPIO_CDEVEN1SWITCH_CEVEN1SWITCH_DEFAULT ( _GPIO_CDEVEN1SWITCH_CEVEN1SWITCH_DEFAULT << 0)

#define	GPIO_CDEVEN1SWITCH_DEVEN1SWITCH_DEFAULT ( _GPIO_CDEVEN1SWITCH_DEVEN1SWITCH_DEFAULT << 16)

#define	GPIO_CDODD0SWITCH_CODD0SWITCH_DEFAULT ( _GPIO_CDODD0SWITCH_CODD0SWITCH_DEFAULT << 0)

#define	GPIO_CDODD0SWITCH_DODD0SWITCH_DEFAULT ( _GPIO_CDODD0SWITCH_DODD0SWITCH_DEFAULT << 16)

#define	GPIO_CDODD1SWITCH_CODD1SWITCH_DEFAULT ( _GPIO_CDODD1SWITCH_CODD1SWITCH_DEFAULT << 0)

#define	GPIO_CDODD1SWITCH_DODD1SWITCH_DEFAULT ( _GPIO_CDODD1SWITCH_DODD1SWITCH_DEFAULT << 16)

#define	GPIO_CMU_CLKIN0ROUTE_PIN_DEFAULT ( _GPIO_CMU_CLKIN0ROUTE_PIN_DEFAULT << 16)

#define	GPIO_CMU_CLKIN0ROUTE_PORT_DEFAULT ( _GPIO_CMU_CLKIN0ROUTE_PORT_DEFAULT << 0)

#define	GPIO_CMU_CLKOUT0ROUTE_PIN_DEFAULT ( _GPIO_CMU_CLKOUT0ROUTE_PIN_DEFAULT << 16)

#define	GPIO_CMU_CLKOUT0ROUTE_PORT_DEFAULT ( _GPIO_CMU_CLKOUT0ROUTE_PORT_DEFAULT << 0)

#define	GPIO_CMU_CLKOUT1ROUTE_PIN_DEFAULT ( _GPIO_CMU_CLKOUT1ROUTE_PIN_DEFAULT << 16)

#define	GPIO_CMU_CLKOUT1ROUTE_PORT_DEFAULT ( _GPIO_CMU_CLKOUT1ROUTE_PORT_DEFAULT << 0)

#define	GPIO_CMU_CLKOUT2ROUTE_PIN_DEFAULT ( _GPIO_CMU_CLKOUT2ROUTE_PIN_DEFAULT << 16)

#define	GPIO_CMU_CLKOUT2ROUTE_PORT_DEFAULT ( _GPIO_CMU_CLKOUT2ROUTE_PORT_DEFAULT << 0)

#define	GPIO_CMU_ROUTEEN_CLKOUT0PEN (0x1UL << 0)

#define	GPIO_CMU_ROUTEEN_CLKOUT0PEN_DEFAULT ( _GPIO_CMU_ROUTEEN_CLKOUT0PEN_DEFAULT << 0)

#define	GPIO_CMU_ROUTEEN_CLKOUT1PEN (0x1UL << 1)

#define	GPIO_CMU_ROUTEEN_CLKOUT1PEN_DEFAULT ( _GPIO_CMU_ROUTEEN_CLKOUT1PEN_DEFAULT << 1)

#define	GPIO_CMU_ROUTEEN_CLKOUT2PEN (0x1UL << 2)

#define	GPIO_CMU_ROUTEEN_CLKOUT2PEN_DEFAULT ( _GPIO_CMU_ROUTEEN_CLKOUT2PEN_DEFAULT << 2)

#define	GPIO_DBGROUTEPEN_SWCLKTCKPEN (0x1UL << 0)

#define	GPIO_DBGROUTEPEN_SWCLKTCKPEN_DEFAULT ( _GPIO_DBGROUTEPEN_SWCLKTCKPEN_DEFAULT << 0)

#define	GPIO_DBGROUTEPEN_SWDIOTMSPEN (0x1UL << 1)

#define	GPIO_DBGROUTEPEN_SWDIOTMSPEN_DEFAULT ( _GPIO_DBGROUTEPEN_SWDIOTMSPEN_DEFAULT << 1)

#define	GPIO_DBGROUTEPEN_TDIPEN (0x1UL << 3)

#define	GPIO_DBGROUTEPEN_TDIPEN_DEFAULT ( _GPIO_DBGROUTEPEN_TDIPEN_DEFAULT << 3)

#define	GPIO_DBGROUTEPEN_TDOPEN (0x1UL << 2)

#define	GPIO_DBGROUTEPEN_TDOPEN_DEFAULT ( _GPIO_DBGROUTEPEN_TDOPEN_DEFAULT << 2)

#define	GPIO_EM4WUEN_EM4WUEN_DEFAULT ( _GPIO_EM4WUEN_EM4WUEN_DEFAULT << 16)

#define	GPIO_EM4WUPOL_EM4WUPOL_DEFAULT ( _GPIO_EM4WUPOL_EM4WUPOL_DEFAULT << 16)

#define	GPIO_EXTIFALL_EXTIFALL_DEFAULT ( _GPIO_EXTIFALL_EXTIFALL_DEFAULT << 0)

#define	GPIO_EXTIPINSELL_EXTIPINSEL0_DEFAULT ( _GPIO_EXTIPINSELL_EXTIPINSEL0_DEFAULT << 0)

#define	GPIO_EXTIPINSELL_EXTIPINSEL0_PIN0 ( _GPIO_EXTIPINSELL_EXTIPINSEL0_PIN0 << 0)

#define	GPIO_EXTIPINSELL_EXTIPINSEL0_PIN1 ( _GPIO_EXTIPINSELL_EXTIPINSEL0_PIN1 << 0)

#define	GPIO_EXTIPINSELL_EXTIPINSEL0_PIN2 ( _GPIO_EXTIPINSELL_EXTIPINSEL0_PIN2 << 0)

#define	GPIO_EXTIPINSELL_EXTIPINSEL0_PIN3 ( _GPIO_EXTIPINSELL_EXTIPINSEL0_PIN3 << 0)

#define	GPIO_EXTIPINSELL_EXTIPINSEL1_DEFAULT ( _GPIO_EXTIPINSELL_EXTIPINSEL1_DEFAULT << 4)

#define	GPIO_EXTIPINSELL_EXTIPINSEL1_PIN0 ( _GPIO_EXTIPINSELL_EXTIPINSEL1_PIN0 << 4)

#define	GPIO_EXTIPINSELL_EXTIPINSEL1_PIN1 ( _GPIO_EXTIPINSELL_EXTIPINSEL1_PIN1 << 4)

#define	GPIO_EXTIPINSELL_EXTIPINSEL1_PIN2 ( _GPIO_EXTIPINSELL_EXTIPINSEL1_PIN2 << 4)

#define	GPIO_EXTIPINSELL_EXTIPINSEL1_PIN3 ( _GPIO_EXTIPINSELL_EXTIPINSEL1_PIN3 << 4)

#define	GPIO_EXTIPINSELL_EXTIPINSEL2_DEFAULT ( _GPIO_EXTIPINSELL_EXTIPINSEL2_DEFAULT << 8)

#define	GPIO_EXTIPINSELL_EXTIPINSEL2_PIN0 ( _GPIO_EXTIPINSELL_EXTIPINSEL2_PIN0 << 8)

#define	GPIO_EXTIPINSELL_EXTIPINSEL2_PIN1 ( _GPIO_EXTIPINSELL_EXTIPINSEL2_PIN1 << 8)

#define	GPIO_EXTIPINSELL_EXTIPINSEL2_PIN2 ( _GPIO_EXTIPINSELL_EXTIPINSEL2_PIN2 << 8)

#define	GPIO_EXTIPINSELL_EXTIPINSEL2_PIN3 ( _GPIO_EXTIPINSELL_EXTIPINSEL2_PIN3 << 8)

#define	GPIO_EXTIPINSELL_EXTIPINSEL3_DEFAULT ( _GPIO_EXTIPINSELL_EXTIPINSEL3_DEFAULT << 12)

#define	GPIO_EXTIPINSELL_EXTIPINSEL3_PIN0 ( _GPIO_EXTIPINSELL_EXTIPINSEL3_PIN0 << 12)

#define	GPIO_EXTIPINSELL_EXTIPINSEL3_PIN1 ( _GPIO_EXTIPINSELL_EXTIPINSEL3_PIN1 << 12)

#define	GPIO_EXTIPINSELL_EXTIPINSEL3_PIN2 ( _GPIO_EXTIPINSELL_EXTIPINSEL3_PIN2 << 12)

#define	GPIO_EXTIPINSELL_EXTIPINSEL3_PIN3 ( _GPIO_EXTIPINSELL_EXTIPINSEL3_PIN3 << 12)

#define	GPIO_EXTIPINSELL_EXTIPINSEL4_DEFAULT ( _GPIO_EXTIPINSELL_EXTIPINSEL4_DEFAULT << 16)

#define	GPIO_EXTIPINSELL_EXTIPINSEL4_PIN0 ( _GPIO_EXTIPINSELL_EXTIPINSEL4_PIN0 << 16)

#define	GPIO_EXTIPINSELL_EXTIPINSEL4_PIN1 ( _GPIO_EXTIPINSELL_EXTIPINSEL4_PIN1 << 16)

#define	GPIO_EXTIPINSELL_EXTIPINSEL4_PIN2 ( _GPIO_EXTIPINSELL_EXTIPINSEL4_PIN2 << 16)

#define	GPIO_EXTIPINSELL_EXTIPINSEL4_PIN3 ( _GPIO_EXTIPINSELL_EXTIPINSEL4_PIN3 << 16)

#define	GPIO_EXTIPINSELL_EXTIPINSEL5_DEFAULT ( _GPIO_EXTIPINSELL_EXTIPINSEL5_DEFAULT << 20)

#define	GPIO_EXTIPINSELL_EXTIPINSEL5_PIN0 ( _GPIO_EXTIPINSELL_EXTIPINSEL5_PIN0 << 20)

#define	GPIO_EXTIPINSELL_EXTIPINSEL5_PIN1 ( _GPIO_EXTIPINSELL_EXTIPINSEL5_PIN1 << 20)

#define	GPIO_EXTIPINSELL_EXTIPINSEL5_PIN2 ( _GPIO_EXTIPINSELL_EXTIPINSEL5_PIN2 << 20)

#define	GPIO_EXTIPINSELL_EXTIPINSEL5_PIN3 ( _GPIO_EXTIPINSELL_EXTIPINSEL5_PIN3 << 20)

#define	GPIO_EXTIPINSELL_EXTIPINSEL6_DEFAULT ( _GPIO_EXTIPINSELL_EXTIPINSEL6_DEFAULT << 24)

#define	GPIO_EXTIPINSELL_EXTIPINSEL6_PIN0 ( _GPIO_EXTIPINSELL_EXTIPINSEL6_PIN0 << 24)

#define	GPIO_EXTIPINSELL_EXTIPINSEL6_PIN1 ( _GPIO_EXTIPINSELL_EXTIPINSEL6_PIN1 << 24)

#define	GPIO_EXTIPINSELL_EXTIPINSEL6_PIN2 ( _GPIO_EXTIPINSELL_EXTIPINSEL6_PIN2 << 24)

#define	GPIO_EXTIPINSELL_EXTIPINSEL6_PIN3 ( _GPIO_EXTIPINSELL_EXTIPINSEL6_PIN3 << 24)

#define	GPIO_EXTIPINSELL_EXTIPINSEL7_DEFAULT ( _GPIO_EXTIPINSELL_EXTIPINSEL7_DEFAULT << 28)

#define	GPIO_EXTIPINSELL_EXTIPINSEL7_PIN0 ( _GPIO_EXTIPINSELL_EXTIPINSEL7_PIN0 << 28)

#define	GPIO_EXTIPINSELL_EXTIPINSEL7_PIN1 ( _GPIO_EXTIPINSELL_EXTIPINSEL7_PIN1 << 28)

#define	GPIO_EXTIPINSELL_EXTIPINSEL7_PIN2 ( _GPIO_EXTIPINSELL_EXTIPINSEL7_PIN2 << 28)

#define	GPIO_EXTIPINSELL_EXTIPINSEL7_PIN3 ( _GPIO_EXTIPINSELL_EXTIPINSEL7_PIN3 << 28)

#define	GPIO_EXTIPSELL_EXTIPSEL0_DEFAULT ( _GPIO_EXTIPSELL_EXTIPSEL0_DEFAULT << 0)

#define	GPIO_EXTIPSELL_EXTIPSEL0_PORTA ( _GPIO_EXTIPSELL_EXTIPSEL0_PORTA << 0)

#define	GPIO_EXTIPSELL_EXTIPSEL0_PORTB ( _GPIO_EXTIPSELL_EXTIPSEL0_PORTB << 0)

#define	GPIO_EXTIPSELL_EXTIPSEL0_PORTC ( _GPIO_EXTIPSELL_EXTIPSEL0_PORTC << 0)

#define	GPIO_EXTIPSELL_EXTIPSEL0_PORTD ( _GPIO_EXTIPSELL_EXTIPSEL0_PORTD << 0)

#define	GPIO_EXTIPSELL_EXTIPSEL1_DEFAULT ( _GPIO_EXTIPSELL_EXTIPSEL1_DEFAULT << 4)

#define	GPIO_EXTIPSELL_EXTIPSEL1_PORTA ( _GPIO_EXTIPSELL_EXTIPSEL1_PORTA << 4)

#define	GPIO_EXTIPSELL_EXTIPSEL1_PORTB ( _GPIO_EXTIPSELL_EXTIPSEL1_PORTB << 4)

#define	GPIO_EXTIPSELL_EXTIPSEL1_PORTC ( _GPIO_EXTIPSELL_EXTIPSEL1_PORTC << 4)

#define	GPIO_EXTIPSELL_EXTIPSEL1_PORTD ( _GPIO_EXTIPSELL_EXTIPSEL1_PORTD << 4)

#define	GPIO_EXTIPSELL_EXTIPSEL2_DEFAULT ( _GPIO_EXTIPSELL_EXTIPSEL2_DEFAULT << 8)

#define	GPIO_EXTIPSELL_EXTIPSEL2_PORTA ( _GPIO_EXTIPSELL_EXTIPSEL2_PORTA << 8)

#define	GPIO_EXTIPSELL_EXTIPSEL2_PORTB ( _GPIO_EXTIPSELL_EXTIPSEL2_PORTB << 8)

#define	GPIO_EXTIPSELL_EXTIPSEL2_PORTC ( _GPIO_EXTIPSELL_EXTIPSEL2_PORTC << 8)

#define	GPIO_EXTIPSELL_EXTIPSEL2_PORTD ( _GPIO_EXTIPSELL_EXTIPSEL2_PORTD << 8)

#define	GPIO_EXTIPSELL_EXTIPSEL3_DEFAULT ( _GPIO_EXTIPSELL_EXTIPSEL3_DEFAULT << 12)

#define	GPIO_EXTIPSELL_EXTIPSEL3_PORTA ( _GPIO_EXTIPSELL_EXTIPSEL3_PORTA << 12)

#define	GPIO_EXTIPSELL_EXTIPSEL3_PORTB ( _GPIO_EXTIPSELL_EXTIPSEL3_PORTB << 12)

#define	GPIO_EXTIPSELL_EXTIPSEL3_PORTC ( _GPIO_EXTIPSELL_EXTIPSEL3_PORTC << 12)

#define	GPIO_EXTIPSELL_EXTIPSEL3_PORTD ( _GPIO_EXTIPSELL_EXTIPSEL3_PORTD << 12)

#define	GPIO_EXTIPSELL_EXTIPSEL4_DEFAULT ( _GPIO_EXTIPSELL_EXTIPSEL4_DEFAULT << 16)

#define	GPIO_EXTIPSELL_EXTIPSEL4_PORTA ( _GPIO_EXTIPSELL_EXTIPSEL4_PORTA << 16)

#define	GPIO_EXTIPSELL_EXTIPSEL4_PORTB ( _GPIO_EXTIPSELL_EXTIPSEL4_PORTB << 16)

#define	GPIO_EXTIPSELL_EXTIPSEL4_PORTC ( _GPIO_EXTIPSELL_EXTIPSEL4_PORTC << 16)

#define	GPIO_EXTIPSELL_EXTIPSEL4_PORTD ( _GPIO_EXTIPSELL_EXTIPSEL4_PORTD << 16)

#define	GPIO_EXTIPSELL_EXTIPSEL5_DEFAULT ( _GPIO_EXTIPSELL_EXTIPSEL5_DEFAULT << 20)

#define	GPIO_EXTIPSELL_EXTIPSEL5_PORTA ( _GPIO_EXTIPSELL_EXTIPSEL5_PORTA << 20)

#define	GPIO_EXTIPSELL_EXTIPSEL5_PORTB ( _GPIO_EXTIPSELL_EXTIPSEL5_PORTB << 20)

#define	GPIO_EXTIPSELL_EXTIPSEL5_PORTC ( _GPIO_EXTIPSELL_EXTIPSEL5_PORTC << 20)

#define	GPIO_EXTIPSELL_EXTIPSEL5_PORTD ( _GPIO_EXTIPSELL_EXTIPSEL5_PORTD << 20)

#define	GPIO_EXTIPSELL_EXTIPSEL6_DEFAULT ( _GPIO_EXTIPSELL_EXTIPSEL6_DEFAULT << 24)

#define	GPIO_EXTIPSELL_EXTIPSEL6_PORTA ( _GPIO_EXTIPSELL_EXTIPSEL6_PORTA << 24)

#define	GPIO_EXTIPSELL_EXTIPSEL6_PORTB ( _GPIO_EXTIPSELL_EXTIPSEL6_PORTB << 24)

#define	GPIO_EXTIPSELL_EXTIPSEL6_PORTC ( _GPIO_EXTIPSELL_EXTIPSEL6_PORTC << 24)

#define	GPIO_EXTIPSELL_EXTIPSEL6_PORTD ( _GPIO_EXTIPSELL_EXTIPSEL6_PORTD << 24)

#define	GPIO_EXTIPSELL_EXTIPSEL7_DEFAULT ( _GPIO_EXTIPSELL_EXTIPSEL7_DEFAULT << 28)

#define	GPIO_EXTIPSELL_EXTIPSEL7_PORTA ( _GPIO_EXTIPSELL_EXTIPSEL7_PORTA << 28)

#define	GPIO_EXTIPSELL_EXTIPSEL7_PORTB ( _GPIO_EXTIPSELL_EXTIPSEL7_PORTB << 28)

#define	GPIO_EXTIPSELL_EXTIPSEL7_PORTC ( _GPIO_EXTIPSELL_EXTIPSEL7_PORTC << 28)

#define	GPIO_EXTIPSELL_EXTIPSEL7_PORTD ( _GPIO_EXTIPSELL_EXTIPSEL7_PORTD << 28)

#define	GPIO_EXTIRISE_EXTIRISE_DEFAULT ( _GPIO_EXTIRISE_EXTIRISE_DEFAULT << 0)

#define	GPIO_FRC_DCLKROUTE_PIN_DEFAULT ( _GPIO_FRC_DCLKROUTE_PIN_DEFAULT << 16)

#define	GPIO_FRC_DCLKROUTE_PORT_DEFAULT ( _GPIO_FRC_DCLKROUTE_PORT_DEFAULT << 0)

#define	GPIO_FRC_DFRAMEROUTE_PIN_DEFAULT ( _GPIO_FRC_DFRAMEROUTE_PIN_DEFAULT << 16)

#define	GPIO_FRC_DFRAMEROUTE_PORT_DEFAULT ( _GPIO_FRC_DFRAMEROUTE_PORT_DEFAULT << 0)

#define	GPIO_FRC_DOUTROUTE_PIN_DEFAULT ( _GPIO_FRC_DOUTROUTE_PIN_DEFAULT << 16)

#define	GPIO_FRC_DOUTROUTE_PORT_DEFAULT ( _GPIO_FRC_DOUTROUTE_PORT_DEFAULT << 0)

#define	GPIO_FRC_ROUTEEN_DCLKPEN (0x1UL << 0)

#define	GPIO_FRC_ROUTEEN_DCLKPEN_DEFAULT ( _GPIO_FRC_ROUTEEN_DCLKPEN_DEFAULT << 0)

#define	GPIO_FRC_ROUTEEN_DFRAMEPEN (0x1UL << 1)

#define	GPIO_FRC_ROUTEEN_DFRAMEPEN_DEFAULT ( _GPIO_FRC_ROUTEEN_DFRAMEPEN_DEFAULT << 1)

#define	GPIO_FRC_ROUTEEN_DOUTPEN (0x1UL << 2)

#define	GPIO_FRC_ROUTEEN_DOUTPEN_DEFAULT ( _GPIO_FRC_ROUTEEN_DOUTPEN_DEFAULT << 2)

#define	GPIO_GPIOLOCKSTATUS_LOCK (0x1UL << 0)

#define	GPIO_GPIOLOCKSTATUS_LOCK_DEFAULT ( _GPIO_GPIOLOCKSTATUS_LOCK_DEFAULT << 0)

#define	GPIO_GPIOLOCKSTATUS_LOCK_LOCKED ( _GPIO_GPIOLOCKSTATUS_LOCK_LOCKED << 0)

#define	GPIO_GPIOLOCKSTATUS_LOCK_UNLOCKED ( _GPIO_GPIOLOCKSTATUS_LOCK_UNLOCKED << 0)

#define	GPIO_I2C_ROUTEEN_SCLPEN (0x1UL << 0)

#define	GPIO_I2C_ROUTEEN_SCLPEN_DEFAULT ( _GPIO_I2C_ROUTEEN_SCLPEN_DEFAULT << 0)

#define	GPIO_I2C_ROUTEEN_SDAPEN (0x1UL << 1)

#define	GPIO_I2C_ROUTEEN_SDAPEN_DEFAULT ( _GPIO_I2C_ROUTEEN_SDAPEN_DEFAULT << 1)

#define	GPIO_I2C_SCLROUTE_PIN_DEFAULT ( _GPIO_I2C_SCLROUTE_PIN_DEFAULT << 16)

#define	GPIO_I2C_SCLROUTE_PORT_DEFAULT ( _GPIO_I2C_SCLROUTE_PORT_DEFAULT << 0)

#define	GPIO_I2C_SDAROUTE_PIN_DEFAULT ( _GPIO_I2C_SDAROUTE_PIN_DEFAULT << 16)

#define	GPIO_I2C_SDAROUTE_PORT_DEFAULT ( _GPIO_I2C_SDAROUTE_PORT_DEFAULT << 0)

#define	GPIO_IEN_EM4WUIEN_DEFAULT ( _GPIO_IEN_EM4WUIEN_DEFAULT << 16)

#define	GPIO_IEN_EXTIEN_DEFAULT ( _GPIO_IEN_EXTIEN_DEFAULT << 0)

#define	GPIO_IF_EM4WU_DEFAULT ( _GPIO_IF_EM4WU_DEFAULT << 16)

#define	GPIO_IF_EXT_DEFAULT ( _GPIO_IF_EXT_DEFAULT << 0)

#define	GPIO_LETIMER_OUT0ROUTE_PIN_DEFAULT ( _GPIO_LETIMER_OUT0ROUTE_PIN_DEFAULT << 16)

#define	GPIO_LETIMER_OUT0ROUTE_PORT_DEFAULT ( _GPIO_LETIMER_OUT0ROUTE_PORT_DEFAULT << 0)

#define	GPIO_LETIMER_OUT1ROUTE_PIN_DEFAULT ( _GPIO_LETIMER_OUT1ROUTE_PIN_DEFAULT << 16)

#define	GPIO_LETIMER_OUT1ROUTE_PORT_DEFAULT ( _GPIO_LETIMER_OUT1ROUTE_PORT_DEFAULT << 0)

#define	GPIO_LETIMER_ROUTEEN_OUT0PEN (0x1UL << 0)

#define	GPIO_LETIMER_ROUTEEN_OUT0PEN_DEFAULT ( _GPIO_LETIMER_ROUTEEN_OUT0PEN_DEFAULT << 0)

#define	GPIO_LETIMER_ROUTEEN_OUT1PEN (0x1UL << 1)

#define	GPIO_LETIMER_ROUTEEN_OUT1PEN_DEFAULT ( _GPIO_LETIMER_ROUTEEN_OUT1PEN_DEFAULT << 1)

#define	GPIO_LOCK_LOCKKEY_DEFAULT ( _GPIO_LOCK_LOCKKEY_DEFAULT << 0)

#define	GPIO_LOCK_LOCKKEY_UNLOCK ( _GPIO_LOCK_LOCKKEY_UNLOCK << 0)

#define	GPIO_MODEM_ANT0ROUTE_PIN_DEFAULT ( _GPIO_MODEM_ANT0ROUTE_PIN_DEFAULT << 16)

#define	GPIO_MODEM_ANT0ROUTE_PORT_DEFAULT ( _GPIO_MODEM_ANT0ROUTE_PORT_DEFAULT << 0)

#define	GPIO_MODEM_ANT1ROUTE_PIN_DEFAULT ( _GPIO_MODEM_ANT1ROUTE_PIN_DEFAULT << 16)

#define	GPIO_MODEM_ANT1ROUTE_PORT_DEFAULT ( _GPIO_MODEM_ANT1ROUTE_PORT_DEFAULT << 0)

#define	GPIO_MODEM_DCLKROUTE_PIN_DEFAULT ( _GPIO_MODEM_DCLKROUTE_PIN_DEFAULT << 16)

#define	GPIO_MODEM_DCLKROUTE_PORT_DEFAULT ( _GPIO_MODEM_DCLKROUTE_PORT_DEFAULT << 0)

#define	GPIO_MODEM_DINROUTE_PIN_DEFAULT ( _GPIO_MODEM_DINROUTE_PIN_DEFAULT << 16)

#define	GPIO_MODEM_DINROUTE_PORT_DEFAULT ( _GPIO_MODEM_DINROUTE_PORT_DEFAULT << 0)

#define	GPIO_MODEM_DOUTROUTE_PIN_DEFAULT ( _GPIO_MODEM_DOUTROUTE_PIN_DEFAULT << 16)

#define	GPIO_MODEM_DOUTROUTE_PORT_DEFAULT ( _GPIO_MODEM_DOUTROUTE_PORT_DEFAULT << 0)

#define	GPIO_MODEM_ROUTEEN_ANT0PEN (0x1UL << 0)

#define	GPIO_MODEM_ROUTEEN_ANT0PEN_DEFAULT ( _GPIO_MODEM_ROUTEEN_ANT0PEN_DEFAULT << 0)

#define	GPIO_MODEM_ROUTEEN_ANT1PEN (0x1UL << 1)

#define	GPIO_MODEM_ROUTEEN_ANT1PEN_DEFAULT ( _GPIO_MODEM_ROUTEEN_ANT1PEN_DEFAULT << 1)

#define	GPIO_MODEM_ROUTEEN_DCLKPEN (0x1UL << 2)

#define	GPIO_MODEM_ROUTEEN_DCLKPEN_DEFAULT ( _GPIO_MODEM_ROUTEEN_DCLKPEN_DEFAULT << 2)

#define	GPIO_MODEM_ROUTEEN_DOUTPEN (0x1UL << 3)

#define	GPIO_MODEM_ROUTEEN_DOUTPEN_DEFAULT ( _GPIO_MODEM_ROUTEEN_DOUTPEN_DEFAULT << 3)

#define	GPIO_P_CTRL_DINDIS (0x1UL << 12)

#define	GPIO_P_CTRL_DINDIS_DEFAULT ( _GPIO_P_CTRL_DINDIS_DEFAULT << 12)

#define	GPIO_P_CTRL_DINDISALT (0x1UL << 28)

#define	GPIO_P_CTRL_DINDISALT_DEFAULT ( _GPIO_P_CTRL_DINDISALT_DEFAULT << 28)

#define	GPIO_P_CTRL_SLEWRATE_DEFAULT ( _GPIO_P_CTRL_SLEWRATE_DEFAULT << 4)

#define	GPIO_P_CTRL_SLEWRATEALT_DEFAULT ( _GPIO_P_CTRL_SLEWRATEALT_DEFAULT << 20)

#define	GPIO_P_DIN_DIN_DEFAULT ( _GPIO_P_DIN_DIN_DEFAULT << 0)

#define	GPIO_P_DOUT_DOUT_DEFAULT ( _GPIO_P_DOUT_DOUT_DEFAULT << 0)

#define	GPIO_P_MODEL_MODE0_DEFAULT ( _GPIO_P_MODEL_MODE0_DEFAULT << 0)

#define	GPIO_P_MODEL_MODE0_DISABLED ( _GPIO_P_MODEL_MODE0_DISABLED << 0)

#define	GPIO_P_MODEL_MODE0_INPUT ( _GPIO_P_MODEL_MODE0_INPUT << 0)

#define	GPIO_P_MODEL_MODE0_INPUTPULL ( _GPIO_P_MODEL_MODE0_INPUTPULL << 0)

#define	GPIO_P_MODEL_MODE0_INPUTPULLFILTER ( _GPIO_P_MODEL_MODE0_INPUTPULLFILTER << 0)

#define	GPIO_P_MODEL_MODE0_PUSHPULL ( _GPIO_P_MODEL_MODE0_PUSHPULL << 0)

#define	GPIO_P_MODEL_MODE0_PUSHPULLALT ( _GPIO_P_MODEL_MODE0_PUSHPULLALT << 0)

#define	GPIO_P_MODEL_MODE0_WIREDAND ( _GPIO_P_MODEL_MODE0_WIREDAND << 0)

#define	GPIO_P_MODEL_MODE0_WIREDANDALT ( _GPIO_P_MODEL_MODE0_WIREDANDALT << 0)

#define	GPIO_P_MODEL_MODE0_WIREDANDALTFILTER ( _GPIO_P_MODEL_MODE0_WIREDANDALTFILTER << 0)

#define	GPIO_P_MODEL_MODE0_WIREDANDALTPULLUP ( _GPIO_P_MODEL_MODE0_WIREDANDALTPULLUP << 0)

#define	GPIO_P_MODEL_MODE0_WIREDANDALTPULLUPFILTER ( _GPIO_P_MODEL_MODE0_WIREDANDALTPULLUPFILTER << 0)

#define	GPIO_P_MODEL_MODE0_WIREDANDFILTER ( _GPIO_P_MODEL_MODE0_WIREDANDFILTER << 0)

#define	GPIO_P_MODEL_MODE0_WIREDANDPULLUP ( _GPIO_P_MODEL_MODE0_WIREDANDPULLUP << 0)

#define	GPIO_P_MODEL_MODE0_WIREDANDPULLUPFILTER ( _GPIO_P_MODEL_MODE0_WIREDANDPULLUPFILTER << 0)

#define	GPIO_P_MODEL_MODE0_WIREDOR ( _GPIO_P_MODEL_MODE0_WIREDOR << 0)

#define	GPIO_P_MODEL_MODE0_WIREDORPULLDOWN ( _GPIO_P_MODEL_MODE0_WIREDORPULLDOWN << 0)

#define	GPIO_P_MODEL_MODE1_DEFAULT ( _GPIO_P_MODEL_MODE1_DEFAULT << 4)

#define	GPIO_P_MODEL_MODE1_DISABLED ( _GPIO_P_MODEL_MODE1_DISABLED << 4)

#define	GPIO_P_MODEL_MODE1_INPUT ( _GPIO_P_MODEL_MODE1_INPUT << 4)

#define	GPIO_P_MODEL_MODE1_INPUTPULL ( _GPIO_P_MODEL_MODE1_INPUTPULL << 4)

#define	GPIO_P_MODEL_MODE1_INPUTPULLFILTER ( _GPIO_P_MODEL_MODE1_INPUTPULLFILTER << 4)

#define	GPIO_P_MODEL_MODE1_PUSHPULL ( _GPIO_P_MODEL_MODE1_PUSHPULL << 4)

#define	GPIO_P_MODEL_MODE1_PUSHPULLALT ( _GPIO_P_MODEL_MODE1_PUSHPULLALT << 4)

#define	GPIO_P_MODEL_MODE1_WIREDAND ( _GPIO_P_MODEL_MODE1_WIREDAND << 4)

#define	GPIO_P_MODEL_MODE1_WIREDANDALT ( _GPIO_P_MODEL_MODE1_WIREDANDALT << 4)

#define	GPIO_P_MODEL_MODE1_WIREDANDALTFILTER ( _GPIO_P_MODEL_MODE1_WIREDANDALTFILTER << 4)

#define	GPIO_P_MODEL_MODE1_WIREDANDALTPULLUP ( _GPIO_P_MODEL_MODE1_WIREDANDALTPULLUP << 4)

#define	GPIO_P_MODEL_MODE1_WIREDANDALTPULLUPFILTER ( _GPIO_P_MODEL_MODE1_WIREDANDALTPULLUPFILTER << 4)

#define	GPIO_P_MODEL_MODE1_WIREDANDFILTER ( _GPIO_P_MODEL_MODE1_WIREDANDFILTER << 4)

#define	GPIO_P_MODEL_MODE1_WIREDANDPULLUP ( _GPIO_P_MODEL_MODE1_WIREDANDPULLUP << 4)

#define	GPIO_P_MODEL_MODE1_WIREDANDPULLUPFILTER ( _GPIO_P_MODEL_MODE1_WIREDANDPULLUPFILTER << 4)

#define	GPIO_P_MODEL_MODE1_WIREDOR ( _GPIO_P_MODEL_MODE1_WIREDOR << 4)

#define	GPIO_P_MODEL_MODE1_WIREDORPULLDOWN ( _GPIO_P_MODEL_MODE1_WIREDORPULLDOWN << 4)

#define	GPIO_P_MODEL_MODE2_DEFAULT ( _GPIO_P_MODEL_MODE2_DEFAULT << 8)

#define	GPIO_P_MODEL_MODE2_DISABLED ( _GPIO_P_MODEL_MODE2_DISABLED << 8)

#define	GPIO_P_MODEL_MODE2_INPUT ( _GPIO_P_MODEL_MODE2_INPUT << 8)

#define	GPIO_P_MODEL_MODE2_INPUTPULL ( _GPIO_P_MODEL_MODE2_INPUTPULL << 8)

#define	GPIO_P_MODEL_MODE2_INPUTPULLFILTER ( _GPIO_P_MODEL_MODE2_INPUTPULLFILTER << 8)

#define	GPIO_P_MODEL_MODE2_PUSHPULL ( _GPIO_P_MODEL_MODE2_PUSHPULL << 8)

#define	GPIO_P_MODEL_MODE2_PUSHPULLALT ( _GPIO_P_MODEL_MODE2_PUSHPULLALT << 8)

#define	GPIO_P_MODEL_MODE2_WIREDAND ( _GPIO_P_MODEL_MODE2_WIREDAND << 8)

#define	GPIO_P_MODEL_MODE2_WIREDANDALT ( _GPIO_P_MODEL_MODE2_WIREDANDALT << 8)

#define	GPIO_P_MODEL_MODE2_WIREDANDALTFILTER ( _GPIO_P_MODEL_MODE2_WIREDANDALTFILTER << 8)

#define	GPIO_P_MODEL_MODE2_WIREDANDALTPULLUP ( _GPIO_P_MODEL_MODE2_WIREDANDALTPULLUP << 8)

#define	GPIO_P_MODEL_MODE2_WIREDANDALTPULLUPFILTER ( _GPIO_P_MODEL_MODE2_WIREDANDALTPULLUPFILTER << 8)

#define	GPIO_P_MODEL_MODE2_WIREDANDFILTER ( _GPIO_P_MODEL_MODE2_WIREDANDFILTER << 8)

#define	GPIO_P_MODEL_MODE2_WIREDANDPULLUP ( _GPIO_P_MODEL_MODE2_WIREDANDPULLUP << 8)

#define	GPIO_P_MODEL_MODE2_WIREDANDPULLUPFILTER ( _GPIO_P_MODEL_MODE2_WIREDANDPULLUPFILTER << 8)

#define	GPIO_P_MODEL_MODE2_WIREDOR ( _GPIO_P_MODEL_MODE2_WIREDOR << 8)

#define	GPIO_P_MODEL_MODE2_WIREDORPULLDOWN ( _GPIO_P_MODEL_MODE2_WIREDORPULLDOWN << 8)

#define	GPIO_P_MODEL_MODE3_DEFAULT ( _GPIO_P_MODEL_MODE3_DEFAULT << 12)

#define	GPIO_P_MODEL_MODE3_DISABLED ( _GPIO_P_MODEL_MODE3_DISABLED << 12)

#define	GPIO_P_MODEL_MODE3_INPUT ( _GPIO_P_MODEL_MODE3_INPUT << 12)

#define	GPIO_P_MODEL_MODE3_INPUTPULL ( _GPIO_P_MODEL_MODE3_INPUTPULL << 12)

#define	GPIO_P_MODEL_MODE3_INPUTPULLFILTER ( _GPIO_P_MODEL_MODE3_INPUTPULLFILTER << 12)

#define	GPIO_P_MODEL_MODE3_PUSHPULL ( _GPIO_P_MODEL_MODE3_PUSHPULL << 12)

#define	GPIO_P_MODEL_MODE3_PUSHPULLALT ( _GPIO_P_MODEL_MODE3_PUSHPULLALT << 12)

#define	GPIO_P_MODEL_MODE3_WIREDAND ( _GPIO_P_MODEL_MODE3_WIREDAND << 12)

#define	GPIO_P_MODEL_MODE3_WIREDANDALT ( _GPIO_P_MODEL_MODE3_WIREDANDALT << 12)

#define	GPIO_P_MODEL_MODE3_WIREDANDALTFILTER ( _GPIO_P_MODEL_MODE3_WIREDANDALTFILTER << 12)

#define	GPIO_P_MODEL_MODE3_WIREDANDALTPULLUP ( _GPIO_P_MODEL_MODE3_WIREDANDALTPULLUP << 12)

#define	GPIO_P_MODEL_MODE3_WIREDANDALTPULLUPFILTER ( _GPIO_P_MODEL_MODE3_WIREDANDALTPULLUPFILTER << 12)

#define	GPIO_P_MODEL_MODE3_WIREDANDFILTER ( _GPIO_P_MODEL_MODE3_WIREDANDFILTER << 12)

#define	GPIO_P_MODEL_MODE3_WIREDANDPULLUP ( _GPIO_P_MODEL_MODE3_WIREDANDPULLUP << 12)

#define	GPIO_P_MODEL_MODE3_WIREDANDPULLUPFILTER ( _GPIO_P_MODEL_MODE3_WIREDANDPULLUPFILTER << 12)

#define	GPIO_P_MODEL_MODE3_WIREDOR ( _GPIO_P_MODEL_MODE3_WIREDOR << 12)

#define	GPIO_P_MODEL_MODE3_WIREDORPULLDOWN ( _GPIO_P_MODEL_MODE3_WIREDORPULLDOWN << 12)

#define	GPIO_P_MODEL_MODE4_DEFAULT ( _GPIO_P_MODEL_MODE4_DEFAULT << 16)

#define	GPIO_P_MODEL_MODE4_DISABLED ( _GPIO_P_MODEL_MODE4_DISABLED << 16)

#define	GPIO_P_MODEL_MODE4_INPUT ( _GPIO_P_MODEL_MODE4_INPUT << 16)

#define	GPIO_P_MODEL_MODE4_INPUTPULL ( _GPIO_P_MODEL_MODE4_INPUTPULL << 16)

#define	GPIO_P_MODEL_MODE4_INPUTPULLFILTER ( _GPIO_P_MODEL_MODE4_INPUTPULLFILTER << 16)

#define	GPIO_P_MODEL_MODE4_PUSHPULL ( _GPIO_P_MODEL_MODE4_PUSHPULL << 16)

#define	GPIO_P_MODEL_MODE4_PUSHPULLALT ( _GPIO_P_MODEL_MODE4_PUSHPULLALT << 16)

#define	GPIO_P_MODEL_MODE4_WIREDAND ( _GPIO_P_MODEL_MODE4_WIREDAND << 16)

#define	GPIO_P_MODEL_MODE4_WIREDANDALT ( _GPIO_P_MODEL_MODE4_WIREDANDALT << 16)

#define	GPIO_P_MODEL_MODE4_WIREDANDALTFILTER ( _GPIO_P_MODEL_MODE4_WIREDANDALTFILTER << 16)

#define	GPIO_P_MODEL_MODE4_WIREDANDALTPULLUP ( _GPIO_P_MODEL_MODE4_WIREDANDALTPULLUP << 16)

#define	GPIO_P_MODEL_MODE4_WIREDANDALTPULLUPFILTER ( _GPIO_P_MODEL_MODE4_WIREDANDALTPULLUPFILTER << 16)

#define	GPIO_P_MODEL_MODE4_WIREDANDFILTER ( _GPIO_P_MODEL_MODE4_WIREDANDFILTER << 16)

#define	GPIO_P_MODEL_MODE4_WIREDANDPULLUP ( _GPIO_P_MODEL_MODE4_WIREDANDPULLUP << 16)

#define	GPIO_P_MODEL_MODE4_WIREDANDPULLUPFILTER ( _GPIO_P_MODEL_MODE4_WIREDANDPULLUPFILTER << 16)

#define	GPIO_P_MODEL_MODE4_WIREDOR ( _GPIO_P_MODEL_MODE4_WIREDOR << 16)

#define	GPIO_P_MODEL_MODE4_WIREDORPULLDOWN ( _GPIO_P_MODEL_MODE4_WIREDORPULLDOWN << 16)

#define	GPIO_P_MODEL_MODE5_DEFAULT ( _GPIO_P_MODEL_MODE5_DEFAULT << 20)

#define	GPIO_P_MODEL_MODE5_DISABLED ( _GPIO_P_MODEL_MODE5_DISABLED << 20)

#define	GPIO_P_MODEL_MODE5_INPUT ( _GPIO_P_MODEL_MODE5_INPUT << 20)

#define	GPIO_P_MODEL_MODE5_INPUTPULL ( _GPIO_P_MODEL_MODE5_INPUTPULL << 20)

#define	GPIO_P_MODEL_MODE5_INPUTPULLFILTER ( _GPIO_P_MODEL_MODE5_INPUTPULLFILTER << 20)

#define	GPIO_P_MODEL_MODE5_PUSHPULL ( _GPIO_P_MODEL_MODE5_PUSHPULL << 20)

#define	GPIO_P_MODEL_MODE5_PUSHPULLALT ( _GPIO_P_MODEL_MODE5_PUSHPULLALT << 20)

#define	GPIO_P_MODEL_MODE5_WIREDAND ( _GPIO_P_MODEL_MODE5_WIREDAND << 20)

#define	GPIO_P_MODEL_MODE5_WIREDANDALT ( _GPIO_P_MODEL_MODE5_WIREDANDALT << 20)

#define	GPIO_P_MODEL_MODE5_WIREDANDALTFILTER ( _GPIO_P_MODEL_MODE5_WIREDANDALTFILTER << 20)

#define	GPIO_P_MODEL_MODE5_WIREDANDALTPULLUP ( _GPIO_P_MODEL_MODE5_WIREDANDALTPULLUP << 20)

#define	GPIO_P_MODEL_MODE5_WIREDANDALTPULLUPFILTER ( _GPIO_P_MODEL_MODE5_WIREDANDALTPULLUPFILTER << 20)

#define	GPIO_P_MODEL_MODE5_WIREDANDFILTER ( _GPIO_P_MODEL_MODE5_WIREDANDFILTER << 20)

#define	GPIO_P_MODEL_MODE5_WIREDANDPULLUP ( _GPIO_P_MODEL_MODE5_WIREDANDPULLUP << 20)

#define	GPIO_P_MODEL_MODE5_WIREDANDPULLUPFILTER ( _GPIO_P_MODEL_MODE5_WIREDANDPULLUPFILTER << 20)

#define	GPIO_P_MODEL_MODE5_WIREDOR ( _GPIO_P_MODEL_MODE5_WIREDOR << 20)

#define	GPIO_P_MODEL_MODE5_WIREDORPULLDOWN ( _GPIO_P_MODEL_MODE5_WIREDORPULLDOWN << 20)

#define	GPIO_P_MODEL_MODE6_DEFAULT ( _GPIO_P_MODEL_MODE6_DEFAULT << 24)

#define	GPIO_P_MODEL_MODE6_DISABLED ( _GPIO_P_MODEL_MODE6_DISABLED << 24)

#define	GPIO_P_MODEL_MODE6_INPUT ( _GPIO_P_MODEL_MODE6_INPUT << 24)

#define	GPIO_P_MODEL_MODE6_INPUTPULL ( _GPIO_P_MODEL_MODE6_INPUTPULL << 24)

#define	GPIO_P_MODEL_MODE6_INPUTPULLFILTER ( _GPIO_P_MODEL_MODE6_INPUTPULLFILTER << 24)

#define	GPIO_P_MODEL_MODE6_PUSHPULL ( _GPIO_P_MODEL_MODE6_PUSHPULL << 24)

#define	GPIO_P_MODEL_MODE6_PUSHPULLALT ( _GPIO_P_MODEL_MODE6_PUSHPULLALT << 24)

#define	GPIO_P_MODEL_MODE6_WIREDAND ( _GPIO_P_MODEL_MODE6_WIREDAND << 24)

#define	GPIO_P_MODEL_MODE6_WIREDANDALT ( _GPIO_P_MODEL_MODE6_WIREDANDALT << 24)

#define	GPIO_P_MODEL_MODE6_WIREDANDALTFILTER ( _GPIO_P_MODEL_MODE6_WIREDANDALTFILTER << 24)

#define	GPIO_P_MODEL_MODE6_WIREDANDALTPULLUP ( _GPIO_P_MODEL_MODE6_WIREDANDALTPULLUP << 24)

#define	GPIO_P_MODEL_MODE6_WIREDANDALTPULLUPFILTER ( _GPIO_P_MODEL_MODE6_WIREDANDALTPULLUPFILTER << 24)

#define	GPIO_P_MODEL_MODE6_WIREDANDFILTER ( _GPIO_P_MODEL_MODE6_WIREDANDFILTER << 24)

#define	GPIO_P_MODEL_MODE6_WIREDANDPULLUP ( _GPIO_P_MODEL_MODE6_WIREDANDPULLUP << 24)

#define	GPIO_P_MODEL_MODE6_WIREDANDPULLUPFILTER ( _GPIO_P_MODEL_MODE6_WIREDANDPULLUPFILTER << 24)

#define	GPIO_P_MODEL_MODE6_WIREDOR ( _GPIO_P_MODEL_MODE6_WIREDOR << 24)

#define	GPIO_P_MODEL_MODE6_WIREDORPULLDOWN ( _GPIO_P_MODEL_MODE6_WIREDORPULLDOWN << 24)

#define	GPIO_PORTA 0x00000000UL

#define	GPIO_PORTB 0x00000001UL

#define	GPIO_PORTC 0x00000002UL

#define	GPIO_PORTD 0x00000003UL

#define	GPIO_PRS_ASYNCH0ROUTE_PIN_DEFAULT ( _GPIO_PRS_ASYNCH0ROUTE_PIN_DEFAULT << 16)

#define	GPIO_PRS_ASYNCH0ROUTE_PORT_DEFAULT ( _GPIO_PRS_ASYNCH0ROUTE_PORT_DEFAULT << 0)

#define	GPIO_PRS_ASYNCH10ROUTE_PIN_DEFAULT ( _GPIO_PRS_ASYNCH10ROUTE_PIN_DEFAULT << 16)

#define	GPIO_PRS_ASYNCH10ROUTE_PORT_DEFAULT ( _GPIO_PRS_ASYNCH10ROUTE_PORT_DEFAULT << 0)

#define	GPIO_PRS_ASYNCH11ROUTE_PIN_DEFAULT ( _GPIO_PRS_ASYNCH11ROUTE_PIN_DEFAULT << 16)

#define	GPIO_PRS_ASYNCH11ROUTE_PORT_DEFAULT ( _GPIO_PRS_ASYNCH11ROUTE_PORT_DEFAULT << 0)

#define	GPIO_PRS_ASYNCH1ROUTE_PIN_DEFAULT ( _GPIO_PRS_ASYNCH1ROUTE_PIN_DEFAULT << 16)

#define	GPIO_PRS_ASYNCH1ROUTE_PORT_DEFAULT ( _GPIO_PRS_ASYNCH1ROUTE_PORT_DEFAULT << 0)

#define	GPIO_PRS_ASYNCH2ROUTE_PIN_DEFAULT ( _GPIO_PRS_ASYNCH2ROUTE_PIN_DEFAULT << 16)

#define	GPIO_PRS_ASYNCH2ROUTE_PORT_DEFAULT ( _GPIO_PRS_ASYNCH2ROUTE_PORT_DEFAULT << 0)

#define	GPIO_PRS_ASYNCH3ROUTE_PIN_DEFAULT ( _GPIO_PRS_ASYNCH3ROUTE_PIN_DEFAULT << 16)

#define	GPIO_PRS_ASYNCH3ROUTE_PORT_DEFAULT ( _GPIO_PRS_ASYNCH3ROUTE_PORT_DEFAULT << 0)

#define	GPIO_PRS_ASYNCH4ROUTE_PIN_DEFAULT ( _GPIO_PRS_ASYNCH4ROUTE_PIN_DEFAULT << 16)

#define	GPIO_PRS_ASYNCH4ROUTE_PORT_DEFAULT ( _GPIO_PRS_ASYNCH4ROUTE_PORT_DEFAULT << 0)

#define	GPIO_PRS_ASYNCH5ROUTE_PIN_DEFAULT ( _GPIO_PRS_ASYNCH5ROUTE_PIN_DEFAULT << 16)

#define	GPIO_PRS_ASYNCH5ROUTE_PORT_DEFAULT ( _GPIO_PRS_ASYNCH5ROUTE_PORT_DEFAULT << 0)

#define	GPIO_PRS_ASYNCH6ROUTE_PIN_DEFAULT ( _GPIO_PRS_ASYNCH6ROUTE_PIN_DEFAULT << 16)

#define	GPIO_PRS_ASYNCH6ROUTE_PORT_DEFAULT ( _GPIO_PRS_ASYNCH6ROUTE_PORT_DEFAULT << 0)

#define	GPIO_PRS_ASYNCH7ROUTE_PIN_DEFAULT ( _GPIO_PRS_ASYNCH7ROUTE_PIN_DEFAULT << 16)

#define	GPIO_PRS_ASYNCH7ROUTE_PORT_DEFAULT ( _GPIO_PRS_ASYNCH7ROUTE_PORT_DEFAULT << 0)

#define	GPIO_PRS_ASYNCH8ROUTE_PIN_DEFAULT ( _GPIO_PRS_ASYNCH8ROUTE_PIN_DEFAULT << 16)

#define	GPIO_PRS_ASYNCH8ROUTE_PORT_DEFAULT ( _GPIO_PRS_ASYNCH8ROUTE_PORT_DEFAULT << 0)

#define	GPIO_PRS_ASYNCH9ROUTE_PIN_DEFAULT ( _GPIO_PRS_ASYNCH9ROUTE_PIN_DEFAULT << 16)

#define	GPIO_PRS_ASYNCH9ROUTE_PORT_DEFAULT ( _GPIO_PRS_ASYNCH9ROUTE_PORT_DEFAULT << 0)

#define	GPIO_PRS_ROUTEEN_ASYNCH0PEN (0x1UL << 0)

#define	GPIO_PRS_ROUTEEN_ASYNCH0PEN_DEFAULT ( _GPIO_PRS_ROUTEEN_ASYNCH0PEN_DEFAULT << 0)

#define	GPIO_PRS_ROUTEEN_ASYNCH10PEN (0x1UL << 10)

#define	GPIO_PRS_ROUTEEN_ASYNCH10PEN_DEFAULT ( _GPIO_PRS_ROUTEEN_ASYNCH10PEN_DEFAULT << 10)

#define	GPIO_PRS_ROUTEEN_ASYNCH11PEN (0x1UL << 11)

#define	GPIO_PRS_ROUTEEN_ASYNCH11PEN_DEFAULT ( _GPIO_PRS_ROUTEEN_ASYNCH11PEN_DEFAULT << 11)

#define	GPIO_PRS_ROUTEEN_ASYNCH1PEN (0x1UL << 1)

#define	GPIO_PRS_ROUTEEN_ASYNCH1PEN_DEFAULT ( _GPIO_PRS_ROUTEEN_ASYNCH1PEN_DEFAULT << 1)

#define	GPIO_PRS_ROUTEEN_ASYNCH2PEN (0x1UL << 2)

#define	GPIO_PRS_ROUTEEN_ASYNCH2PEN_DEFAULT ( _GPIO_PRS_ROUTEEN_ASYNCH2PEN_DEFAULT << 2)

#define	GPIO_PRS_ROUTEEN_ASYNCH3PEN (0x1UL << 3)

#define	GPIO_PRS_ROUTEEN_ASYNCH3PEN_DEFAULT ( _GPIO_PRS_ROUTEEN_ASYNCH3PEN_DEFAULT << 3)

#define	GPIO_PRS_ROUTEEN_ASYNCH4PEN (0x1UL << 4)

#define	GPIO_PRS_ROUTEEN_ASYNCH4PEN_DEFAULT ( _GPIO_PRS_ROUTEEN_ASYNCH4PEN_DEFAULT << 4)

#define	GPIO_PRS_ROUTEEN_ASYNCH5PEN (0x1UL << 5)

#define	GPIO_PRS_ROUTEEN_ASYNCH5PEN_DEFAULT ( _GPIO_PRS_ROUTEEN_ASYNCH5PEN_DEFAULT << 5)

#define	GPIO_PRS_ROUTEEN_ASYNCH6PEN (0x1UL << 6)

#define	GPIO_PRS_ROUTEEN_ASYNCH6PEN_DEFAULT ( _GPIO_PRS_ROUTEEN_ASYNCH6PEN_DEFAULT << 6)

#define	GPIO_PRS_ROUTEEN_ASYNCH7PEN (0x1UL << 7)

#define	GPIO_PRS_ROUTEEN_ASYNCH7PEN_DEFAULT ( _GPIO_PRS_ROUTEEN_ASYNCH7PEN_DEFAULT << 7)

#define	GPIO_PRS_ROUTEEN_ASYNCH8PEN (0x1UL << 8)

#define	GPIO_PRS_ROUTEEN_ASYNCH8PEN_DEFAULT ( _GPIO_PRS_ROUTEEN_ASYNCH8PEN_DEFAULT << 8)

#define	GPIO_PRS_ROUTEEN_ASYNCH9PEN (0x1UL << 9)

#define	GPIO_PRS_ROUTEEN_ASYNCH9PEN_DEFAULT ( _GPIO_PRS_ROUTEEN_ASYNCH9PEN_DEFAULT << 9)

#define	GPIO_PRS_ROUTEEN_SYNCH0PEN (0x1UL << 12)

#define	GPIO_PRS_ROUTEEN_SYNCH0PEN_DEFAULT ( _GPIO_PRS_ROUTEEN_SYNCH0PEN_DEFAULT << 12)

#define	GPIO_PRS_ROUTEEN_SYNCH1PEN (0x1UL << 13)

#define	GPIO_PRS_ROUTEEN_SYNCH1PEN_DEFAULT ( _GPIO_PRS_ROUTEEN_SYNCH1PEN_DEFAULT << 13)

#define	GPIO_PRS_ROUTEEN_SYNCH2PEN (0x1UL << 14)

#define	GPIO_PRS_ROUTEEN_SYNCH2PEN_DEFAULT ( _GPIO_PRS_ROUTEEN_SYNCH2PEN_DEFAULT << 14)

#define	GPIO_PRS_ROUTEEN_SYNCH3PEN (0x1UL << 15)

#define	GPIO_PRS_ROUTEEN_SYNCH3PEN_DEFAULT ( _GPIO_PRS_ROUTEEN_SYNCH3PEN_DEFAULT << 15)

#define	GPIO_PRS_SYNCH0ROUTE_PIN_DEFAULT ( _GPIO_PRS_SYNCH0ROUTE_PIN_DEFAULT << 16)

#define	GPIO_PRS_SYNCH0ROUTE_PORT_DEFAULT ( _GPIO_PRS_SYNCH0ROUTE_PORT_DEFAULT << 0)

#define	GPIO_PRS_SYNCH1ROUTE_PIN_DEFAULT ( _GPIO_PRS_SYNCH1ROUTE_PIN_DEFAULT << 16)

#define	GPIO_PRS_SYNCH1ROUTE_PORT_DEFAULT ( _GPIO_PRS_SYNCH1ROUTE_PORT_DEFAULT << 0)

#define	GPIO_PRS_SYNCH2ROUTE_PIN_DEFAULT ( _GPIO_PRS_SYNCH2ROUTE_PIN_DEFAULT << 16)

#define	GPIO_PRS_SYNCH2ROUTE_PORT_DEFAULT ( _GPIO_PRS_SYNCH2ROUTE_PORT_DEFAULT << 0)

#define	GPIO_PRS_SYNCH3ROUTE_PIN_DEFAULT ( _GPIO_PRS_SYNCH3ROUTE_PIN_DEFAULT << 16)

#define	GPIO_PRS_SYNCH3ROUTE_PORT_DEFAULT ( _GPIO_PRS_SYNCH3ROUTE_PORT_DEFAULT << 0)

#define	GPIO_TIMER_CC0ROUTE_PIN_DEFAULT ( _GPIO_TIMER_CC0ROUTE_PIN_DEFAULT << 16)

#define	GPIO_TIMER_CC0ROUTE_PORT_DEFAULT ( _GPIO_TIMER_CC0ROUTE_PORT_DEFAULT << 0)

#define	GPIO_TIMER_CC1ROUTE_PIN_DEFAULT ( _GPIO_TIMER_CC1ROUTE_PIN_DEFAULT << 16)

#define	GPIO_TIMER_CC1ROUTE_PORT_DEFAULT ( _GPIO_TIMER_CC1ROUTE_PORT_DEFAULT << 0)

#define	GPIO_TIMER_CC2ROUTE_PIN_DEFAULT ( _GPIO_TIMER_CC2ROUTE_PIN_DEFAULT << 16)

#define	GPIO_TIMER_CC2ROUTE_PORT_DEFAULT ( _GPIO_TIMER_CC2ROUTE_PORT_DEFAULT << 0)

#define	GPIO_TIMER_CDTI0ROUTE_PIN_DEFAULT ( _GPIO_TIMER_CDTI0ROUTE_PIN_DEFAULT << 16)

#define	GPIO_TIMER_CDTI0ROUTE_PORT_DEFAULT ( _GPIO_TIMER_CDTI0ROUTE_PORT_DEFAULT << 0)

#define	GPIO_TIMER_CDTI1ROUTE_PIN_DEFAULT ( _GPIO_TIMER_CDTI1ROUTE_PIN_DEFAULT << 16)

#define	GPIO_TIMER_CDTI1ROUTE_PORT_DEFAULT ( _GPIO_TIMER_CDTI1ROUTE_PORT_DEFAULT << 0)

#define	GPIO_TIMER_CDTI2ROUTE_PIN_DEFAULT ( _GPIO_TIMER_CDTI2ROUTE_PIN_DEFAULT << 16)

#define	GPIO_TIMER_CDTI2ROUTE_PORT_DEFAULT ( _GPIO_TIMER_CDTI2ROUTE_PORT_DEFAULT << 0)

#define	GPIO_TIMER_ROUTEEN_CC0PEN (0x1UL << 0)

#define	GPIO_TIMER_ROUTEEN_CC0PEN_DEFAULT ( _GPIO_TIMER_ROUTEEN_CC0PEN_DEFAULT << 0)

#define	GPIO_TIMER_ROUTEEN_CC1PEN (0x1UL << 1)

#define	GPIO_TIMER_ROUTEEN_CC1PEN_DEFAULT ( _GPIO_TIMER_ROUTEEN_CC1PEN_DEFAULT << 1)

#define	GPIO_TIMER_ROUTEEN_CC2PEN (0x1UL << 2)

#define	GPIO_TIMER_ROUTEEN_CC2PEN_DEFAULT ( _GPIO_TIMER_ROUTEEN_CC2PEN_DEFAULT << 2)

#define	GPIO_TIMER_ROUTEEN_CDTI0PEN (0x1UL << 3)

#define	GPIO_TIMER_ROUTEEN_CDTI0PEN_DEFAULT ( _GPIO_TIMER_ROUTEEN_CDTI0PEN_DEFAULT << 3)

#define	GPIO_TIMER_ROUTEEN_CDTI1PEN (0x1UL << 4)

#define	GPIO_TIMER_ROUTEEN_CDTI1PEN_DEFAULT ( _GPIO_TIMER_ROUTEEN_CDTI1PEN_DEFAULT << 4)

#define	GPIO_TIMER_ROUTEEN_CDTI2PEN (0x1UL << 5)

#define	GPIO_TIMER_ROUTEEN_CDTI2PEN_DEFAULT ( _GPIO_TIMER_ROUTEEN_CDTI2PEN_DEFAULT << 5)

#define	GPIO_TRACEROUTEPEN_SWVPEN (0x1UL << 0)

#define	GPIO_TRACEROUTEPEN_SWVPEN_DEFAULT ( _GPIO_TRACEROUTEPEN_SWVPEN_DEFAULT << 0)

#define	GPIO_TRACEROUTEPEN_TRACECLKPEN (0x1UL << 1)

#define	GPIO_TRACEROUTEPEN_TRACECLKPEN_DEFAULT ( _GPIO_TRACEROUTEPEN_TRACECLKPEN_DEFAULT << 1)

#define	GPIO_TRACEROUTEPEN_TRACEDATA0PEN (0x1UL << 2)

#define	GPIO_TRACEROUTEPEN_TRACEDATA0PEN_DEFAULT ( _GPIO_TRACEROUTEPEN_TRACEDATA0PEN_DEFAULT << 2)

#define	GPIO_USART_CLKROUTE_PIN_DEFAULT ( _GPIO_USART_CLKROUTE_PIN_DEFAULT << 16)

#define	GPIO_USART_CLKROUTE_PORT_DEFAULT ( _GPIO_USART_CLKROUTE_PORT_DEFAULT << 0)

#define	GPIO_USART_CSROUTE_PIN_DEFAULT ( _GPIO_USART_CSROUTE_PIN_DEFAULT << 16)

#define	GPIO_USART_CSROUTE_PORT_DEFAULT ( _GPIO_USART_CSROUTE_PORT_DEFAULT << 0)

#define	GPIO_USART_CTSROUTE_PIN_DEFAULT ( _GPIO_USART_CTSROUTE_PIN_DEFAULT << 16)

#define	GPIO_USART_CTSROUTE_PORT_DEFAULT ( _GPIO_USART_CTSROUTE_PORT_DEFAULT << 0)

#define	GPIO_USART_ROUTEEN_CLKPEN (0x1UL << 3)

#define	GPIO_USART_ROUTEEN_CLKPEN_DEFAULT ( _GPIO_USART_ROUTEEN_CLKPEN_DEFAULT << 3)

#define	GPIO_USART_ROUTEEN_CSPEN (0x1UL << 0)

#define	GPIO_USART_ROUTEEN_CSPEN_DEFAULT ( _GPIO_USART_ROUTEEN_CSPEN_DEFAULT << 0)

#define	GPIO_USART_ROUTEEN_RTSPEN (0x1UL << 1)

#define	GPIO_USART_ROUTEEN_RTSPEN_DEFAULT ( _GPIO_USART_ROUTEEN_RTSPEN_DEFAULT << 1)

#define	GPIO_USART_ROUTEEN_RXPEN (0x1UL << 2)

#define	GPIO_USART_ROUTEEN_RXPEN_DEFAULT ( _GPIO_USART_ROUTEEN_RXPEN_DEFAULT << 2)

#define	GPIO_USART_ROUTEEN_TXPEN (0x1UL << 4)

#define	GPIO_USART_ROUTEEN_TXPEN_DEFAULT ( _GPIO_USART_ROUTEEN_TXPEN_DEFAULT << 4)

#define	GPIO_USART_RTSROUTE_PIN_DEFAULT ( _GPIO_USART_RTSROUTE_PIN_DEFAULT << 16)

#define	GPIO_USART_RTSROUTE_PORT_DEFAULT ( _GPIO_USART_RTSROUTE_PORT_DEFAULT << 0)

#define	GPIO_USART_RXROUTE_PIN_DEFAULT ( _GPIO_USART_RXROUTE_PIN_DEFAULT << 16)

#define	GPIO_USART_RXROUTE_PORT_DEFAULT ( _GPIO_USART_RXROUTE_PORT_DEFAULT << 0)

#define	GPIO_USART_TXROUTE_PIN_DEFAULT ( _GPIO_USART_TXROUTE_PIN_DEFAULT << 16)

#define	GPIO_USART_TXROUTE_PORT_DEFAULT ( _GPIO_USART_TXROUTE_PORT_DEFAULT << 0)

Macro Definition Documentation

#define _GPIO_ABUSALLOC_AEVEN0_ACMP0 0x00000002UL

Mode ACMP0 for GPIO_ABUSALLOC

Definition at line 368 of file efr32mg21_gpio.h .

#define _GPIO_ABUSALLOC_AEVEN0_ACMP1 0x00000003UL

Mode ACMP1 for GPIO_ABUSALLOC

Definition at line 369 of file efr32mg21_gpio.h .

#define _GPIO_ABUSALLOC_AEVEN0_ADC0 0x00000001UL

Mode ADC0 for GPIO_ABUSALLOC

Definition at line 367 of file efr32mg21_gpio.h .

#define _GPIO_ABUSALLOC_AEVEN0_DEBUG 0x0000000FUL

Mode DEBUG for GPIO_ABUSALLOC

Definition at line 371 of file efr32mg21_gpio.h .

#define _GPIO_ABUSALLOC_AEVEN0_DEFAULT 0x00000000UL

Mode DEFAULT for GPIO_ABUSALLOC

Definition at line 365 of file efr32mg21_gpio.h .

#define _GPIO_ABUSALLOC_AEVEN0_DIAGA 0x0000000EUL

Mode DIAGA for GPIO_ABUSALLOC

Definition at line 370 of file efr32mg21_gpio.h .

#define _GPIO_ABUSALLOC_AEVEN0_MASK 0xFUL

Bit mask for GPIO_AEVEN0

Definition at line 364 of file efr32mg21_gpio.h .

#define _GPIO_ABUSALLOC_AEVEN0_SHIFT 0

Shift value for GPIO_AEVEN0

Definition at line 363 of file efr32mg21_gpio.h .

#define _GPIO_ABUSALLOC_AEVEN0_TRISTATE 0x00000000UL

Mode TRISTATE for GPIO_ABUSALLOC

Definition at line 366 of file efr32mg21_gpio.h .

#define _GPIO_ABUSALLOC_AEVEN1_ACMP0 0x00000002UL

Mode ACMP0 for GPIO_ABUSALLOC

Definition at line 384 of file efr32mg21_gpio.h .

#define _GPIO_ABUSALLOC_AEVEN1_ACMP1 0x00000003UL

Mode ACMP1 for GPIO_ABUSALLOC

Definition at line 385 of file efr32mg21_gpio.h .

#define _GPIO_ABUSALLOC_AEVEN1_ADC0 0x00000001UL

Mode ADC0 for GPIO_ABUSALLOC

Definition at line 383 of file efr32mg21_gpio.h .

#define _GPIO_ABUSALLOC_AEVEN1_DEBUG 0x0000000FUL

Mode DEBUG for GPIO_ABUSALLOC

Definition at line 386 of file efr32mg21_gpio.h .

#define _GPIO_ABUSALLOC_AEVEN1_DEFAULT 0x00000000UL

Mode DEFAULT for GPIO_ABUSALLOC

Definition at line 381 of file efr32mg21_gpio.h .

#define _GPIO_ABUSALLOC_AEVEN1_MASK 0xF00UL

Bit mask for GPIO_AEVEN1

Definition at line 380 of file efr32mg21_gpio.h .

#define _GPIO_ABUSALLOC_AEVEN1_SHIFT 8

Shift value for GPIO_AEVEN1

Definition at line 379 of file efr32mg21_gpio.h .

#define _GPIO_ABUSALLOC_AEVEN1_TRISTATE 0x00000000UL

Mode TRISTATE for GPIO_ABUSALLOC

Definition at line 382 of file efr32mg21_gpio.h .

#define _GPIO_ABUSALLOC_AODD0_ACMP0 0x00000002UL

Mode ACMP0 for GPIO_ABUSALLOC

Definition at line 398 of file efr32mg21_gpio.h .

#define _GPIO_ABUSALLOC_AODD0_ACMP1 0x00000003UL

Mode ACMP1 for GPIO_ABUSALLOC

Definition at line 399 of file efr32mg21_gpio.h .

#define _GPIO_ABUSALLOC_AODD0_ADC0 0x00000001UL

Mode ADC0 for GPIO_ABUSALLOC

Definition at line 397 of file efr32mg21_gpio.h .

#define _GPIO_ABUSALLOC_AODD0_DEBUG 0x0000000FUL

Mode DEBUG for GPIO_ABUSALLOC

Definition at line 401 of file efr32mg21_gpio.h .

#define _GPIO_ABUSALLOC_AODD0_DEFAULT 0x00000000UL

Mode DEFAULT for GPIO_ABUSALLOC

Definition at line 395 of file efr32mg21_gpio.h .

#define _GPIO_ABUSALLOC_AODD0_DIAGA 0x0000000EUL

Mode DIAGA for GPIO_ABUSALLOC

Definition at line 400 of file efr32mg21_gpio.h .

#define _GPIO_ABUSALLOC_AODD0_MASK 0xF0000UL

Bit mask for GPIO_AODD0

Definition at line 394 of file efr32mg21_gpio.h .

#define _GPIO_ABUSALLOC_AODD0_SHIFT 16

Shift value for GPIO_AODD0

Definition at line 393 of file efr32mg21_gpio.h .

#define _GPIO_ABUSALLOC_AODD0_TRISTATE 0x00000000UL

Mode TRISTATE for GPIO_ABUSALLOC

Definition at line 396 of file efr32mg21_gpio.h .

#define _GPIO_ABUSALLOC_AODD1_ACMP0 0x00000002UL

Mode ACMP0 for GPIO_ABUSALLOC

Definition at line 414 of file efr32mg21_gpio.h .

#define _GPIO_ABUSALLOC_AODD1_ACMP1 0x00000003UL

Mode ACMP1 for GPIO_ABUSALLOC

Definition at line 415 of file efr32mg21_gpio.h .

#define _GPIO_ABUSALLOC_AODD1_ADC0 0x00000001UL

Mode ADC0 for GPIO_ABUSALLOC

Definition at line 413 of file efr32mg21_gpio.h .

#define _GPIO_ABUSALLOC_AODD1_DEBUG 0x0000000FUL

Mode DEBUG for GPIO_ABUSALLOC

Definition at line 416 of file efr32mg21_gpio.h .

#define _GPIO_ABUSALLOC_AODD1_DEFAULT 0x00000000UL

Mode DEFAULT for GPIO_ABUSALLOC

Definition at line 411 of file efr32mg21_gpio.h .

#define _GPIO_ABUSALLOC_AODD1_MASK 0xF000000UL

Bit mask for GPIO_AODD1

Definition at line 410 of file efr32mg21_gpio.h .

#define _GPIO_ABUSALLOC_AODD1_SHIFT 24

Shift value for GPIO_AODD1

Definition at line 409 of file efr32mg21_gpio.h .

#define _GPIO_ABUSALLOC_AODD1_TRISTATE 0x00000000UL

Mode TRISTATE for GPIO_ABUSALLOC

Definition at line 412 of file efr32mg21_gpio.h .

#define _GPIO_ABUSALLOC_MASK 0x0F0F0F0FUL

Mask for GPIO_ABUSALLOC

Definition at line 362 of file efr32mg21_gpio.h .

#define _GPIO_ABUSALLOC_RESETVALUE 0x00000000UL

Default value for GPIO_ABUSALLOC

Definition at line 361 of file efr32mg21_gpio.h .

#define _GPIO_ACMP_ACMPOUTROUTE_MASK 0x000F0003UL

Mask for GPIO_ACMP_ACMPOUTROUTE

Definition at line 976 of file efr32mg21_gpio.h .

#define _GPIO_ACMP_ACMPOUTROUTE_PIN_DEFAULT 0x00000000UL

Mode DEFAULT for GPIO_ACMP_ACMPOUTROUTE

Definition at line 983 of file efr32mg21_gpio.h .

#define _GPIO_ACMP_ACMPOUTROUTE_PIN_MASK 0xF0000UL

Bit mask for GPIO_PIN

Definition at line 982 of file efr32mg21_gpio.h .

#define _GPIO_ACMP_ACMPOUTROUTE_PIN_SHIFT 16

Shift value for GPIO_PIN

Definition at line 981 of file efr32mg21_gpio.h .

Referenced by ACMP_GPIOSetup() .

#define _GPIO_ACMP_ACMPOUTROUTE_PORT_DEFAULT 0x00000000UL

Mode DEFAULT for GPIO_ACMP_ACMPOUTROUTE

Definition at line 979 of file efr32mg21_gpio.h .

#define _GPIO_ACMP_ACMPOUTROUTE_PORT_MASK 0x3UL

Bit mask for GPIO_PORT

Definition at line 978 of file efr32mg21_gpio.h .

#define _GPIO_ACMP_ACMPOUTROUTE_PORT_SHIFT 0

Shift value for GPIO_PORT

Definition at line 977 of file efr32mg21_gpio.h .

Referenced by ACMP_GPIOSetup() .

#define _GPIO_ACMP_ACMPOUTROUTE_RESETVALUE 0x00000000UL

Default value for GPIO_ACMP_ACMPOUTROUTE

Definition at line 975 of file efr32mg21_gpio.h .

#define _GPIO_ACMP_ROUTEEN_ACMPOUTPEN_DEFAULT 0x00000000UL

Mode DEFAULT for GPIO_ACMP_ROUTEEN

Definition at line 971 of file efr32mg21_gpio.h .

#define _GPIO_ACMP_ROUTEEN_ACMPOUTPEN_MASK 0x1UL

Bit mask for GPIO_ACMPOUTPEN

Definition at line 970 of file efr32mg21_gpio.h .

#define _GPIO_ACMP_ROUTEEN_ACMPOUTPEN_SHIFT 0

Shift value for GPIO_ACMPOUTPEN

Definition at line 969 of file efr32mg21_gpio.h .

#define _GPIO_ACMP_ROUTEEN_MASK 0x00000001UL

Mask for GPIO_ACMP_ROUTEEN

Definition at line 967 of file efr32mg21_gpio.h .

#define _GPIO_ACMP_ROUTEEN_RESETVALUE 0x00000000UL

Default value for GPIO_ACMP_ROUTEEN

Definition at line 966 of file efr32mg21_gpio.h .

#define _GPIO_AEVEN0SWITCH_AEVEN0SWITCH_DEFAULT 0x00000000UL

Mode DEFAULT for GPIO_AEVEN0SWITCH

Definition at line 571 of file efr32mg21_gpio.h .

#define _GPIO_AEVEN0SWITCH_AEVEN0SWITCH_MASK 0xFUL

Bit mask for GPIO_AEVEN0SWITCH

Definition at line 570 of file efr32mg21_gpio.h .

#define _GPIO_AEVEN0SWITCH_AEVEN0SWITCH_SHIFT 0

Shift value for GPIO_AEVEN0SWITCH

Definition at line 569 of file efr32mg21_gpio.h .

#define _GPIO_AEVEN0SWITCH_MASK 0x0000000FUL

Mask for GPIO_AEVEN0SWITCH

Definition at line 568 of file efr32mg21_gpio.h .

#define _GPIO_AEVEN0SWITCH_RESETVALUE 0x00000000UL

Default value for GPIO_AEVEN0SWITCH

Definition at line 567 of file efr32mg21_gpio.h .

#define _GPIO_AEVEN1SWITCH_AEVEN1SWITCH_DEFAULT 0x00000000UL

Mode DEFAULT for GPIO_AEVEN1SWITCH

Definition at line 579 of file efr32mg21_gpio.h .

#define _GPIO_AEVEN1SWITCH_AEVEN1SWITCH_MASK 0xFUL

Bit mask for GPIO_AEVEN1SWITCH

Definition at line 578 of file efr32mg21_gpio.h .

#define _GPIO_AEVEN1SWITCH_AEVEN1SWITCH_SHIFT 0

Shift value for GPIO_AEVEN1SWITCH

Definition at line 577 of file efr32mg21_gpio.h .

#define _GPIO_AEVEN1SWITCH_MASK 0x0000000FUL

Mask for GPIO_AEVEN1SWITCH

Definition at line 576 of file efr32mg21_gpio.h .

#define _GPIO_AEVEN1SWITCH_RESETVALUE 0x00000000UL

Default value for GPIO_AEVEN1SWITCH

Definition at line 575 of file efr32mg21_gpio.h .

#define _GPIO_AODD0SWITCH_AODD0SWITCH_DEFAULT 0x00000000UL

Mode DEFAULT for GPIO_AODD0SWITCH

Definition at line 555 of file efr32mg21_gpio.h .

#define _GPIO_AODD0SWITCH_AODD0SWITCH_MASK 0x7UL

Bit mask for GPIO_AODD0SWITCH

Definition at line 554 of file efr32mg21_gpio.h .

#define _GPIO_AODD0SWITCH_AODD0SWITCH_SHIFT 0

Shift value for GPIO_AODD0SWITCH

Definition at line 553 of file efr32mg21_gpio.h .

#define _GPIO_AODD0SWITCH_MASK 0x00000007UL

Mask for GPIO_AODD0SWITCH

Definition at line 552 of file efr32mg21_gpio.h .

#define _GPIO_AODD0SWITCH_RESETVALUE 0x00000000UL

Default value for GPIO_AODD0SWITCH

Definition at line 551 of file efr32mg21_gpio.h .

#define _GPIO_AODD1SWITCH_AODD1SWITCH_DEFAULT 0x00000000UL

Mode DEFAULT for GPIO_AODD1SWITCH

Definition at line 563 of file efr32mg21_gpio.h .

#define _GPIO_AODD1SWITCH_AODD1SWITCH_MASK 0x7UL

Bit mask for GPIO_AODD1SWITCH

Definition at line 562 of file efr32mg21_gpio.h .

#define _GPIO_AODD1SWITCH_AODD1SWITCH_SHIFT 0

Shift value for GPIO_AODD1SWITCH

Definition at line 561 of file efr32mg21_gpio.h .

#define _GPIO_AODD1SWITCH_MASK 0x00000007UL

Mask for GPIO_AODD1SWITCH

Definition at line 560 of file efr32mg21_gpio.h .

#define _GPIO_AODD1SWITCH_RESETVALUE 0x00000000UL

Default value for GPIO_AODD1SWITCH

Definition at line 559 of file efr32mg21_gpio.h .

#define _GPIO_BBUSALLOC_BEVEN0_ACMP0 0x00000002UL

Mode ACMP0 for GPIO_BBUSALLOC

Definition at line 432 of file efr32mg21_gpio.h .

#define _GPIO_BBUSALLOC_BEVEN0_ACMP1 0x00000003UL

Mode ACMP1 for GPIO_BBUSALLOC

Definition at line 433 of file efr32mg21_gpio.h .

#define _GPIO_BBUSALLOC_BEVEN0_ADC0 0x00000001UL

Mode ADC0 for GPIO_BBUSALLOC

Definition at line 431 of file efr32mg21_gpio.h .

#define _GPIO_BBUSALLOC_BEVEN0_DEBUG 0x0000000FUL

Mode DEBUG for GPIO_BBUSALLOC

Definition at line 434 of file efr32mg21_gpio.h .

#define _GPIO_BBUSALLOC_BEVEN0_DEFAULT 0x00000000UL

Mode DEFAULT for GPIO_BBUSALLOC

Definition at line 429 of file efr32mg21_gpio.h .

#define _GPIO_BBUSALLOC_BEVEN0_MASK 0xFUL

Bit mask for GPIO_BEVEN0

Definition at line 428 of file efr32mg21_gpio.h .

#define _GPIO_BBUSALLOC_BEVEN0_SHIFT 0

Shift value for GPIO_BEVEN0

Definition at line 427 of file efr32mg21_gpio.h .

#define _GPIO_BBUSALLOC_BEVEN0_TRISTATE 0x00000000UL

Mode TRISTATE for GPIO_BBUSALLOC

Definition at line 430 of file efr32mg21_gpio.h .

#define _GPIO_BBUSALLOC_BEVEN1_ACMP0 0x00000002UL

Mode ACMP0 for GPIO_BBUSALLOC

Definition at line 446 of file efr32mg21_gpio.h .

#define _GPIO_BBUSALLOC_BEVEN1_ACMP1 0x00000003UL

Mode ACMP1 for GPIO_BBUSALLOC

Definition at line 447 of file efr32mg21_gpio.h .

#define _GPIO_BBUSALLOC_BEVEN1_ADC0 0x00000001UL

Mode ADC0 for GPIO_BBUSALLOC

Definition at line 445 of file efr32mg21_gpio.h .

#define _GPIO_BBUSALLOC_BEVEN1_DEBUG 0x0000000FUL

Mode DEBUG for GPIO_BBUSALLOC

Definition at line 448 of file efr32mg21_gpio.h .

#define _GPIO_BBUSALLOC_BEVEN1_DEFAULT 0x00000000UL

Mode DEFAULT for GPIO_BBUSALLOC

Definition at line 443 of file efr32mg21_gpio.h .

#define _GPIO_BBUSALLOC_BEVEN1_MASK 0xF00UL

Bit mask for GPIO_BEVEN1

Definition at line 442 of file efr32mg21_gpio.h .

#define _GPIO_BBUSALLOC_BEVEN1_SHIFT 8

Shift value for GPIO_BEVEN1

Definition at line 441 of file efr32mg21_gpio.h .

#define _GPIO_BBUSALLOC_BEVEN1_TRISTATE 0x00000000UL

Mode TRISTATE for GPIO_BBUSALLOC

Definition at line 444 of file efr32mg21_gpio.h .

#define _GPIO_BBUSALLOC_BODD0_ACMP0 0x00000002UL

Mode ACMP0 for GPIO_BBUSALLOC

Definition at line 460 of file efr32mg21_gpio.h .

#define _GPIO_BBUSALLOC_BODD0_ACMP1 0x00000003UL

Mode ACMP1 for GPIO_BBUSALLOC

Definition at line 461 of file efr32mg21_gpio.h .

#define _GPIO_BBUSALLOC_BODD0_ADC0 0x00000001UL

Mode ADC0 for GPIO_BBUSALLOC

Definition at line 459 of file efr32mg21_gpio.h .

#define _GPIO_BBUSALLOC_BODD0_DEBUG 0x0000000FUL

Mode DEBUG for GPIO_BBUSALLOC

Definition at line 462 of file efr32mg21_gpio.h .

#define _GPIO_BBUSALLOC_BODD0_DEFAULT 0x00000000UL

Mode DEFAULT for GPIO_BBUSALLOC

Definition at line 457 of file efr32mg21_gpio.h .

#define _GPIO_BBUSALLOC_BODD0_MASK 0xF0000UL

Bit mask for GPIO_BODD0

Definition at line 456 of file efr32mg21_gpio.h .

#define _GPIO_BBUSALLOC_BODD0_SHIFT 16

Shift value for GPIO_BODD0

Definition at line 455 of file efr32mg21_gpio.h .

#define _GPIO_BBUSALLOC_BODD0_TRISTATE 0x00000000UL

Mode TRISTATE for GPIO_BBUSALLOC

Definition at line 458 of file efr32mg21_gpio.h .

#define _GPIO_BBUSALLOC_BODD1_ACMP0 0x00000002UL

Mode ACMP0 for GPIO_BBUSALLOC

Definition at line 474 of file efr32mg21_gpio.h .

#define _GPIO_BBUSALLOC_BODD1_ACMP1 0x00000003UL

Mode ACMP1 for GPIO_BBUSALLOC

Definition at line 475 of file efr32mg21_gpio.h .

#define _GPIO_BBUSALLOC_BODD1_ADC0 0x00000001UL

Mode ADC0 for GPIO_BBUSALLOC

Definition at line 473 of file efr32mg21_gpio.h .

#define _GPIO_BBUSALLOC_BODD1_DEBUG 0x0000000FUL

Mode DEBUG for GPIO_BBUSALLOC

Definition at line 476 of file efr32mg21_gpio.h .

#define _GPIO_BBUSALLOC_BODD1_DEFAULT 0x00000000UL

Mode DEFAULT for GPIO_BBUSALLOC

Definition at line 471 of file efr32mg21_gpio.h .

#define _GPIO_BBUSALLOC_BODD1_MASK 0xF000000UL

Bit mask for GPIO_BODD1

Definition at line 470 of file efr32mg21_gpio.h .

#define _GPIO_BBUSALLOC_BODD1_SHIFT 24

Shift value for GPIO_BODD1

Definition at line 469 of file efr32mg21_gpio.h .

#define _GPIO_BBUSALLOC_BODD1_TRISTATE 0x00000000UL

Mode TRISTATE for GPIO_BBUSALLOC

Definition at line 472 of file efr32mg21_gpio.h .

#define _GPIO_BBUSALLOC_MASK 0x0F0F0F0FUL

Mask for GPIO_BBUSALLOC

Definition at line 426 of file efr32mg21_gpio.h .

#define _GPIO_BBUSALLOC_RESETVALUE 0x00000000UL

Default value for GPIO_BBUSALLOC

Definition at line 425 of file efr32mg21_gpio.h .

#define _GPIO_BEVEN0SWITCH_BEVEN0SWITCH_DEFAULT 0x00000000UL

Mode DEFAULT for GPIO_BEVEN0SWITCH

Definition at line 606 of file efr32mg21_gpio.h .

#define _GPIO_BEVEN0SWITCH_BEVEN0SWITCH_MASK 0x1UL

Bit mask for GPIO_BEVEN0SWITCH

Definition at line 605 of file efr32mg21_gpio.h .

#define _GPIO_BEVEN0SWITCH_BEVEN0SWITCH_SHIFT 0

Shift value for GPIO_BEVEN0SWITCH

Definition at line 604 of file efr32mg21_gpio.h .

#define _GPIO_BEVEN0SWITCH_MASK 0x00000001UL

Mask for GPIO_BEVEN0SWITCH

Definition at line 602 of file efr32mg21_gpio.h .

#define _GPIO_BEVEN0SWITCH_RESETVALUE 0x00000000UL

Default value for GPIO_BEVEN0SWITCH

Definition at line 601 of file efr32mg21_gpio.h .

#define _GPIO_BEVEN1SWITCH_BEVEN1SWITCH_DEFAULT 0x00000000UL

Mode DEFAULT for GPIO_BEVEN1SWITCH

Definition at line 615 of file efr32mg21_gpio.h .

#define _GPIO_BEVEN1SWITCH_BEVEN1SWITCH_MASK 0x1UL

Bit mask for GPIO_BEVEN1SWITCH

Definition at line 614 of file efr32mg21_gpio.h .

#define _GPIO_BEVEN1SWITCH_BEVEN1SWITCH_SHIFT 0

Shift value for GPIO_BEVEN1SWITCH

Definition at line 613 of file efr32mg21_gpio.h .

#define _GPIO_BEVEN1SWITCH_MASK 0x00000001UL

Mask for GPIO_BEVEN1SWITCH

Definition at line 611 of file efr32mg21_gpio.h .

#define _GPIO_BEVEN1SWITCH_RESETVALUE 0x00000000UL

Default value for GPIO_BEVEN1SWITCH

Definition at line 610 of file efr32mg21_gpio.h .

#define _GPIO_BODD0SWITCH_BODD0SWITCH_DEFAULT 0x00000000UL

Mode DEFAULT for GPIO_BODD0SWITCH

Definition at line 588 of file efr32mg21_gpio.h .

#define _GPIO_BODD0SWITCH_BODD0SWITCH_MASK 0x1UL

Bit mask for GPIO_BODD0SWITCH

Definition at line 587 of file efr32mg21_gpio.h .

#define _GPIO_BODD0SWITCH_BODD0SWITCH_SHIFT 0

Shift value for GPIO_BODD0SWITCH

Definition at line 586 of file efr32mg21_gpio.h .

#define _GPIO_BODD0SWITCH_MASK 0x00000001UL

Mask for GPIO_BODD0SWITCH

Definition at line 584 of file efr32mg21_gpio.h .

#define _GPIO_BODD0SWITCH_RESETVALUE 0x00000000UL

Default value for GPIO_BODD0SWITCH

Definition at line 583 of file efr32mg21_gpio.h .

#define _GPIO_BODD1SWITCH_BODD1SWITCH_DEFAULT 0x00000000UL

Mode DEFAULT for GPIO_BODD1SWITCH

Definition at line 597 of file efr32mg21_gpio.h .

#define _GPIO_BODD1SWITCH_BODD1SWITCH_MASK 0x1UL

Bit mask for GPIO_BODD1SWITCH

Definition at line 596 of file efr32mg21_gpio.h .

#define _GPIO_BODD1SWITCH_BODD1SWITCH_SHIFT 0

Shift value for GPIO_BODD1SWITCH

Definition at line 595 of file efr32mg21_gpio.h .

#define _GPIO_BODD1SWITCH_MASK 0x00000001UL

Mask for GPIO_BODD1SWITCH

Definition at line 593 of file efr32mg21_gpio.h .

#define _GPIO_BODD1SWITCH_RESETVALUE 0x00000000UL

Default value for GPIO_BODD1SWITCH

Definition at line 592 of file efr32mg21_gpio.h .

#define _GPIO_CDBUSALLOC_CDEVEN0_ACMP0 0x00000002UL

Mode ACMP0 for GPIO_CDBUSALLOC

Definition at line 492 of file efr32mg21_gpio.h .

#define _GPIO_CDBUSALLOC_CDEVEN0_ACMP1 0x00000003UL

Mode ACMP1 for GPIO_CDBUSALLOC

Definition at line 493 of file efr32mg21_gpio.h .

#define _GPIO_CDBUSALLOC_CDEVEN0_ADC0 0x00000001UL

Mode ADC0 for GPIO_CDBUSALLOC

Definition at line 491 of file efr32mg21_gpio.h .

#define _GPIO_CDBUSALLOC_CDEVEN0_DEBUG 0x0000000FUL

Mode DEBUG for GPIO_CDBUSALLOC

Definition at line 496 of file efr32mg21_gpio.h .

#define _GPIO_CDBUSALLOC_CDEVEN0_DEFAULT 0x00000000UL

Mode DEFAULT for GPIO_CDBUSALLOC

Definition at line 489 of file efr32mg21_gpio.h .

#define _GPIO_CDBUSALLOC_CDEVEN0_EFUSE 0x0000000DUL

Mode EFUSE for GPIO_CDBUSALLOC

Definition at line 495 of file efr32mg21_gpio.h .

#define _GPIO_CDBUSALLOC_CDEVEN0_MASK 0xFUL

Bit mask for GPIO_CDEVEN0

Definition at line 488 of file efr32mg21_gpio.h .

#define _GPIO_CDBUSALLOC_CDEVEN0_PMON 0x0000000CUL

Mode PMON for GPIO_CDBUSALLOC

Definition at line 494 of file efr32mg21_gpio.h .

#define _GPIO_CDBUSALLOC_CDEVEN0_SHIFT 0

Shift value for GPIO_CDEVEN0

Definition at line 487 of file efr32mg21_gpio.h .

#define _GPIO_CDBUSALLOC_CDEVEN0_TRISTATE 0x00000000UL

Mode TRISTATE for GPIO_CDBUSALLOC

Definition at line 490 of file efr32mg21_gpio.h .

#define _GPIO_CDBUSALLOC_CDEVEN1_ACMP0 0x00000002UL

Mode ACMP0 for GPIO_CDBUSALLOC

Definition at line 510 of file efr32mg21_gpio.h .

#define _GPIO_CDBUSALLOC_CDEVEN1_ACMP1 0x00000003UL

Mode ACMP1 for GPIO_CDBUSALLOC

Definition at line 511 of file efr32mg21_gpio.h .

#define _GPIO_CDBUSALLOC_CDEVEN1_ADC0 0x00000001UL

Mode ADC0 for GPIO_CDBUSALLOC

Definition at line 509 of file efr32mg21_gpio.h .

#define _GPIO_CDBUSALLOC_CDEVEN1_DEBUG 0x0000000FUL

Mode DEBUG for GPIO_CDBUSALLOC

Definition at line 512 of file efr32mg21_gpio.h .

#define _GPIO_CDBUSALLOC_CDEVEN1_DEFAULT 0x00000000UL

Mode DEFAULT for GPIO_CDBUSALLOC

Definition at line 507 of file efr32mg21_gpio.h .

#define _GPIO_CDBUSALLOC_CDEVEN1_MASK 0xF00UL

Bit mask for GPIO_CDEVEN1

Definition at line 506 of file efr32mg21_gpio.h .

#define _GPIO_CDBUSALLOC_CDEVEN1_SHIFT 8

Shift value for GPIO_CDEVEN1

Definition at line 505 of file efr32mg21_gpio.h .

#define _GPIO_CDBUSALLOC_CDEVEN1_TRISTATE 0x00000000UL

Mode TRISTATE for GPIO_CDBUSALLOC

Definition at line 508 of file efr32mg21_gpio.h .

#define _GPIO_CDBUSALLOC_CDODD0_ACMP0 0x00000002UL

Mode ACMP0 for GPIO_CDBUSALLOC

Definition at line 524 of file efr32mg21_gpio.h .

#define _GPIO_CDBUSALLOC_CDODD0_ACMP1 0x00000003UL

Mode ACMP1 for GPIO_CDBUSALLOC

Definition at line 525 of file efr32mg21_gpio.h .

#define _GPIO_CDBUSALLOC_CDODD0_ADC0 0x00000001UL

Mode ADC0 for GPIO_CDBUSALLOC

Definition at line 523 of file efr32mg21_gpio.h .

#define _GPIO_CDBUSALLOC_CDODD0_DEBUG 0x0000000FUL

Mode DEBUG for GPIO_CDBUSALLOC

Definition at line 527 of file efr32mg21_gpio.h .

#define _GPIO_CDBUSALLOC_CDODD0_DEFAULT 0x00000000UL

Mode DEFAULT for GPIO_CDBUSALLOC

Definition at line 521 of file efr32mg21_gpio.h .

#define _GPIO_CDBUSALLOC_CDODD0_MASK 0xF0000UL

Bit mask for GPIO_CDODD0

Definition at line 520 of file efr32mg21_gpio.h .

#define _GPIO_CDBUSALLOC_CDODD0_PMON 0x0000000CUL

Mode PMON for GPIO_CDBUSALLOC

Definition at line 526 of file efr32mg21_gpio.h .

#define _GPIO_CDBUSALLOC_CDODD0_SHIFT 16

Shift value for GPIO_CDODD0

Definition at line 519 of file efr32mg21_gpio.h .

#define _GPIO_CDBUSALLOC_CDODD0_TRISTATE 0x00000000UL

Mode TRISTATE for GPIO_CDBUSALLOC

Definition at line 522 of file efr32mg21_gpio.h .

#define _GPIO_CDBUSALLOC_CDODD1_ACMP0 0x00000002UL

Mode ACMP0 for GPIO_CDBUSALLOC

Definition at line 540 of file efr32mg21_gpio.h .

#define _GPIO_CDBUSALLOC_CDODD1_ACMP1 0x00000003UL

Mode ACMP1 for GPIO_CDBUSALLOC

Definition at line 541 of file efr32mg21_gpio.h .

#define _GPIO_CDBUSALLOC_CDODD1_ADC0 0x00000001UL

Mode ADC0 for GPIO_CDBUSALLOC

Definition at line 539 of file efr32mg21_gpio.h .

#define _GPIO_CDBUSALLOC_CDODD1_DEBUG 0x0000000FUL

Mode DEBUG for GPIO_CDBUSALLOC

Definition at line 542 of file efr32mg21_gpio.h .

#define _GPIO_CDBUSALLOC_CDODD1_DEFAULT 0x00000000UL

Mode DEFAULT for GPIO_CDBUSALLOC

Definition at line 537 of file efr32mg21_gpio.h .

#define _GPIO_CDBUSALLOC_CDODD1_MASK 0xF000000UL

Bit mask for GPIO_CDODD1

Definition at line 536 of file efr32mg21_gpio.h .

#define _GPIO_CDBUSALLOC_CDODD1_SHIFT 24

Shift value for GPIO_CDODD1

Definition at line 535 of file efr32mg21_gpio.h .

#define _GPIO_CDBUSALLOC_CDODD1_TRISTATE 0x00000000UL

Mode TRISTATE for GPIO_CDBUSALLOC

Definition at line 538 of file efr32mg21_gpio.h .

#define _GPIO_CDBUSALLOC_MASK 0x0F0F0F0FUL

Mask for GPIO_CDBUSALLOC

Definition at line 486 of file efr32mg21_gpio.h .

#define _GPIO_CDBUSALLOC_RESETVALUE 0x00000000UL

Default value for GPIO_CDBUSALLOC

Definition at line 485 of file efr32mg21_gpio.h .

#define _GPIO_CDEVEN0SWITCH_CEVEN0SWITCH_DEFAULT 0x00000000UL

Mode DEFAULT for GPIO_CDEVEN0SWITCH

Definition at line 647 of file efr32mg21_gpio.h .

#define _GPIO_CDEVEN0SWITCH_CEVEN0SWITCH_MASK 0x7UL

Bit mask for GPIO_CEVEN0SWITCH

Definition at line 646 of file efr32mg21_gpio.h .

#define _GPIO_CDEVEN0SWITCH_CEVEN0SWITCH_SHIFT 0

Shift value for GPIO_CEVEN0SWITCH

Definition at line 645 of file efr32mg21_gpio.h .

#define _GPIO_CDEVEN0SWITCH_DEVEN0SWITCH_DEFAULT 0x00000000UL

Mode DEFAULT for GPIO_CDEVEN0SWITCH

Definition at line 651 of file efr32mg21_gpio.h .

#define _GPIO_CDEVEN0SWITCH_DEVEN0SWITCH_MASK 0x70000UL

Bit mask for GPIO_DEVEN0SWITCH

Definition at line 650 of file efr32mg21_gpio.h .

#define _GPIO_CDEVEN0SWITCH_DEVEN0SWITCH_SHIFT 16

Shift value for GPIO_DEVEN0SWITCH

Definition at line 649 of file efr32mg21_gpio.h .

#define _GPIO_CDEVEN0SWITCH_MASK 0x00070007UL

Mask for GPIO_CDEVEN0SWITCH

Definition at line 644 of file efr32mg21_gpio.h .

#define _GPIO_CDEVEN0SWITCH_RESETVALUE 0x00000000UL

Default value for GPIO_CDEVEN0SWITCH

Definition at line 643 of file efr32mg21_gpio.h .

#define _GPIO_CDEVEN1SWITCH_CEVEN1SWITCH_DEFAULT 0x00000000UL

Mode DEFAULT for GPIO_CDEVEN1SWITCH

Definition at line 659 of file efr32mg21_gpio.h .

#define _GPIO_CDEVEN1SWITCH_CEVEN1SWITCH_MASK 0x7UL

Bit mask for GPIO_CEVEN1SWITCH

Definition at line 658 of file efr32mg21_gpio.h .

#define _GPIO_CDEVEN1SWITCH_CEVEN1SWITCH_SHIFT 0

Shift value for GPIO_CEVEN1SWITCH

Definition at line 657 of file efr32mg21_gpio.h .

#define _GPIO_CDEVEN1SWITCH_DEVEN1SWITCH_DEFAULT 0x00000000UL

Mode DEFAULT for GPIO_CDEVEN1SWITCH

Definition at line 663 of file efr32mg21_gpio.h .

#define _GPIO_CDEVEN1SWITCH_DEVEN1SWITCH_MASK 0x70000UL

Bit mask for GPIO_DEVEN1SWITCH

Definition at line 662 of file efr32mg21_gpio.h .

#define _GPIO_CDEVEN1SWITCH_DEVEN1SWITCH_SHIFT 16

Shift value for GPIO_DEVEN1SWITCH

Definition at line 661 of file efr32mg21_gpio.h .

#define _GPIO_CDEVEN1SWITCH_MASK 0x00070007UL

Mask for GPIO_CDEVEN1SWITCH

Definition at line 656 of file efr32mg21_gpio.h .

#define _GPIO_CDEVEN1SWITCH_RESETVALUE 0x00000000UL

Default value for GPIO_CDEVEN1SWITCH

Definition at line 655 of file efr32mg21_gpio.h .

#define _GPIO_CDODD0SWITCH_CODD0SWITCH_DEFAULT 0x00000000UL

Mode DEFAULT for GPIO_CDODD0SWITCH

Definition at line 623 of file efr32mg21_gpio.h .

#define _GPIO_CDODD0SWITCH_CODD0SWITCH_MASK 0x7UL

Bit mask for GPIO_CODD0SWITCH

Definition at line 622 of file efr32mg21_gpio.h .

#define _GPIO_CDODD0SWITCH_CODD0SWITCH_SHIFT 0

Shift value for GPIO_CODD0SWITCH

Definition at line 621 of file efr32mg21_gpio.h .

#define _GPIO_CDODD0SWITCH_DODD0SWITCH_DEFAULT 0x00000000UL

Mode DEFAULT for GPIO_CDODD0SWITCH

Definition at line 627 of file efr32mg21_gpio.h .

#define _GPIO_CDODD0SWITCH_DODD0SWITCH_MASK 0x30000UL

Bit mask for GPIO_DODD0SWITCH

Definition at line 626 of file efr32mg21_gpio.h .

#define _GPIO_CDODD0SWITCH_DODD0SWITCH_SHIFT 16

Shift value for GPIO_DODD0SWITCH

Definition at line 625 of file efr32mg21_gpio.h .

#define _GPIO_CDODD0SWITCH_MASK 0x00030007UL

Mask for GPIO_CDODD0SWITCH

Definition at line 620 of file efr32mg21_gpio.h .

#define _GPIO_CDODD0SWITCH_RESETVALUE 0x00000000UL

Default value for GPIO_CDODD0SWITCH

Definition at line 619 of file efr32mg21_gpio.h .

#define _GPIO_CDODD1SWITCH_CODD1SWITCH_DEFAULT 0x00000000UL

Mode DEFAULT for GPIO_CDODD1SWITCH

Definition at line 635 of file efr32mg21_gpio.h .

#define _GPIO_CDODD1SWITCH_CODD1SWITCH_MASK 0x7UL

Bit mask for GPIO_CODD1SWITCH

Definition at line 634 of file efr32mg21_gpio.h .

#define _GPIO_CDODD1SWITCH_CODD1SWITCH_SHIFT 0

Shift value for GPIO_CODD1SWITCH

Definition at line 633 of file efr32mg21_gpio.h .

#define _GPIO_CDODD1SWITCH_DODD1SWITCH_DEFAULT 0x00000000UL

Mode DEFAULT for GPIO_CDODD1SWITCH

Definition at line 639 of file efr32mg21_gpio.h .

#define _GPIO_CDODD1SWITCH_DODD1SWITCH_MASK 0x30000UL

Bit mask for GPIO_DODD1SWITCH

Definition at line 638 of file efr32mg21_gpio.h .

#define _GPIO_CDODD1SWITCH_DODD1SWITCH_SHIFT 16

Shift value for GPIO_DODD1SWITCH

Definition at line 637 of file efr32mg21_gpio.h .

#define _GPIO_CDODD1SWITCH_MASK 0x00030007UL

Mask for GPIO_CDODD1SWITCH

Definition at line 632 of file efr32mg21_gpio.h .

#define _GPIO_CDODD1SWITCH_RESETVALUE 0x00000000UL

Default value for GPIO_CDODD1SWITCH

Definition at line 631 of file efr32mg21_gpio.h .

#define _GPIO_CMU_CLKIN0ROUTE_MASK 0x000F0003UL

Mask for GPIO_CMU_CLKIN0ROUTE

Definition at line 1007 of file efr32mg21_gpio.h .

#define _GPIO_CMU_CLKIN0ROUTE_PIN_DEFAULT 0x00000000UL

Mode DEFAULT for GPIO_CMU_CLKIN0ROUTE

Definition at line 1014 of file efr32mg21_gpio.h .

#define _GPIO_CMU_CLKIN0ROUTE_PIN_MASK 0xF0000UL

Bit mask for GPIO_PIN

Definition at line 1013 of file efr32mg21_gpio.h .

#define _GPIO_CMU_CLKIN0ROUTE_PIN_SHIFT 16

Shift value for GPIO_PIN

Definition at line 1012 of file efr32mg21_gpio.h .

#define _GPIO_CMU_CLKIN0ROUTE_PORT_DEFAULT 0x00000000UL

Mode DEFAULT for GPIO_CMU_CLKIN0ROUTE

Definition at line 1010 of file efr32mg21_gpio.h .

#define _GPIO_CMU_CLKIN0ROUTE_PORT_MASK 0x3UL

Bit mask for GPIO_PORT

Definition at line 1009 of file efr32mg21_gpio.h .

#define _GPIO_CMU_CLKIN0ROUTE_PORT_SHIFT 0

Shift value for GPIO_PORT

Definition at line 1008 of file efr32mg21_gpio.h .

#define _GPIO_CMU_CLKIN0ROUTE_RESETVALUE 0x00000000UL

Default value for GPIO_CMU_CLKIN0ROUTE

Definition at line 1006 of file efr32mg21_gpio.h .

#define _GPIO_CMU_CLKOUT0ROUTE_MASK 0x000F0003UL

Mask for GPIO_CMU_CLKOUT0ROUTE

Definition at line 1019 of file efr32mg21_gpio.h .

#define _GPIO_CMU_CLKOUT0ROUTE_PIN_DEFAULT 0x00000000UL

Mode DEFAULT for GPIO_CMU_CLKOUT0ROUTE

Definition at line 1026 of file efr32mg21_gpio.h .

#define _GPIO_CMU_CLKOUT0ROUTE_PIN_MASK 0xF0000UL

Bit mask for GPIO_PIN

Definition at line 1025 of file efr32mg21_gpio.h .

#define _GPIO_CMU_CLKOUT0ROUTE_PIN_SHIFT 16

Shift value for GPIO_PIN

Definition at line 1024 of file efr32mg21_gpio.h .

Referenced by CMU_ClkOutPinConfig() .

#define _GPIO_CMU_CLKOUT0ROUTE_PORT_DEFAULT 0x00000000UL

Mode DEFAULT for GPIO_CMU_CLKOUT0ROUTE

Definition at line 1022 of file efr32mg21_gpio.h .

#define _GPIO_CMU_CLKOUT0ROUTE_PORT_MASK 0x3UL

Bit mask for GPIO_PORT

Definition at line 1021 of file efr32mg21_gpio.h .

#define _GPIO_CMU_CLKOUT0ROUTE_PORT_SHIFT 0

Shift value for GPIO_PORT

Definition at line 1020 of file efr32mg21_gpio.h .

Referenced by CMU_ClkOutPinConfig() .

#define _GPIO_CMU_CLKOUT0ROUTE_RESETVALUE 0x00000000UL

Default value for GPIO_CMU_CLKOUT0ROUTE

Definition at line 1018 of file efr32mg21_gpio.h .

#define _GPIO_CMU_CLKOUT1ROUTE_MASK 0x000F0003UL

Mask for GPIO_CMU_CLKOUT1ROUTE

Definition at line 1031 of file efr32mg21_gpio.h .

#define _GPIO_CMU_CLKOUT1ROUTE_PIN_DEFAULT 0x00000000UL

Mode DEFAULT for GPIO_CMU_CLKOUT1ROUTE

Definition at line 1038 of file efr32mg21_gpio.h .

#define _GPIO_CMU_CLKOUT1ROUTE_PIN_MASK 0xF0000UL

Bit mask for GPIO_PIN

Definition at line 1037 of file efr32mg21_gpio.h .

#define _GPIO_CMU_CLKOUT1ROUTE_PIN_SHIFT 16

Shift value for GPIO_PIN

Definition at line 1036 of file efr32mg21_gpio.h .

Referenced by CMU_ClkOutPinConfig() .

#define _GPIO_CMU_CLKOUT1ROUTE_PORT_DEFAULT 0x00000000UL

Mode DEFAULT for GPIO_CMU_CLKOUT1ROUTE

Definition at line 1034 of file efr32mg21_gpio.h .

#define _GPIO_CMU_CLKOUT1ROUTE_PORT_MASK 0x3UL

Bit mask for GPIO_PORT

Definition at line 1033 of file efr32mg21_gpio.h .

#define _GPIO_CMU_CLKOUT1ROUTE_PORT_SHIFT 0

Shift value for GPIO_PORT

Definition at line 1032 of file efr32mg21_gpio.h .

Referenced by CMU_ClkOutPinConfig() .

#define _GPIO_CMU_CLKOUT1ROUTE_RESETVALUE 0x00000000UL

Default value for GPIO_CMU_CLKOUT1ROUTE

Definition at line 1030 of file efr32mg21_gpio.h .

#define _GPIO_CMU_CLKOUT2ROUTE_MASK 0x000F0003UL

Mask for GPIO_CMU_CLKOUT2ROUTE

Definition at line 1043 of file efr32mg21_gpio.h .

#define _GPIO_CMU_CLKOUT2ROUTE_PIN_DEFAULT 0x00000000UL

Mode DEFAULT for GPIO_CMU_CLKOUT2ROUTE

Definition at line 1050 of file efr32mg21_gpio.h .

#define _GPIO_CMU_CLKOUT2ROUTE_PIN_MASK 0xF0000UL

Bit mask for GPIO_PIN

Definition at line 1049 of file efr32mg21_gpio.h .

#define _GPIO_CMU_CLKOUT2ROUTE_PIN_SHIFT 16

Shift value for GPIO_PIN

Definition at line 1048 of file efr32mg21_gpio.h .

Referenced by CMU_ClkOutPinConfig() .

#define _GPIO_CMU_CLKOUT2ROUTE_PORT_DEFAULT 0x00000000UL

Mode DEFAULT for GPIO_CMU_CLKOUT2ROUTE

Definition at line 1046 of file efr32mg21_gpio.h .

#define _GPIO_CMU_CLKOUT2ROUTE_PORT_MASK 0x3UL

Bit mask for GPIO_PORT

Definition at line 1045 of file efr32mg21_gpio.h .

#define _GPIO_CMU_CLKOUT2ROUTE_PORT_SHIFT 0

Shift value for GPIO_PORT

Definition at line 1044 of file efr32mg21_gpio.h .

Referenced by CMU_ClkOutPinConfig() .

#define _GPIO_CMU_CLKOUT2ROUTE_RESETVALUE 0x00000000UL

Default value for GPIO_CMU_CLKOUT2ROUTE

Definition at line 1042 of file efr32mg21_gpio.h .

#define _GPIO_CMU_ROUTEEN_CLKOUT0PEN_DEFAULT 0x00000000UL

Mode DEFAULT for GPIO_CMU_ROUTEEN

Definition at line 992 of file efr32mg21_gpio.h .

#define _GPIO_CMU_ROUTEEN_CLKOUT0PEN_MASK 0x1UL

Bit mask for GPIO_CLKOUT0PEN

Definition at line 991 of file efr32mg21_gpio.h .

#define _GPIO_CMU_ROUTEEN_CLKOUT0PEN_SHIFT 0

Shift value for GPIO_CLKOUT0PEN

Definition at line 990 of file efr32mg21_gpio.h .

#define _GPIO_CMU_ROUTEEN_CLKOUT1PEN_DEFAULT 0x00000000UL

Mode DEFAULT for GPIO_CMU_ROUTEEN

Definition at line 997 of file efr32mg21_gpio.h .

#define _GPIO_CMU_ROUTEEN_CLKOUT1PEN_MASK 0x2UL

Bit mask for GPIO_CLKOUT1PEN

Definition at line 996 of file efr32mg21_gpio.h .

#define _GPIO_CMU_ROUTEEN_CLKOUT1PEN_SHIFT 1

Shift value for GPIO_CLKOUT1PEN

Definition at line 995 of file efr32mg21_gpio.h .

#define _GPIO_CMU_ROUTEEN_CLKOUT2PEN_DEFAULT 0x00000000UL

Mode DEFAULT for GPIO_CMU_ROUTEEN

Definition at line 1002 of file efr32mg21_gpio.h .

#define _GPIO_CMU_ROUTEEN_CLKOUT2PEN_MASK 0x4UL

Bit mask for GPIO_CLKOUT2PEN

Definition at line 1001 of file efr32mg21_gpio.h .

#define _GPIO_CMU_ROUTEEN_CLKOUT2PEN_SHIFT 2

Shift value for GPIO_CLKOUT2PEN

Definition at line 1000 of file efr32mg21_gpio.h .

#define _GPIO_CMU_ROUTEEN_MASK 0x0000000FUL

Mask for GPIO_CMU_ROUTEEN

Definition at line 988 of file efr32mg21_gpio.h .

#define _GPIO_CMU_ROUTEEN_RESETVALUE 0x00000000UL

Default value for GPIO_CMU_ROUTEEN

Definition at line 987 of file efr32mg21_gpio.h .

#define _GPIO_DBGROUTEPEN_MASK 0x0000000FUL

Mask for GPIO_DBGROUTEPEN

Definition at line 924 of file efr32mg21_gpio.h .

#define _GPIO_DBGROUTEPEN_RESETVALUE 0x0000000FUL

Default value for GPIO_DBGROUTEPEN

Definition at line 923 of file efr32mg21_gpio.h .

#define _GPIO_DBGROUTEPEN_SWCLKTCKPEN_DEFAULT 0x00000001UL

Mode DEFAULT for GPIO_DBGROUTEPEN

Definition at line 928 of file efr32mg21_gpio.h .

#define _GPIO_DBGROUTEPEN_SWCLKTCKPEN_MASK 0x1UL

Bit mask for GPIO_SWCLKTCKPEN

Definition at line 927 of file efr32mg21_gpio.h .

#define _GPIO_DBGROUTEPEN_SWCLKTCKPEN_SHIFT 0

Shift value for GPIO_SWCLKTCKPEN

Definition at line 926 of file efr32mg21_gpio.h .

Referenced by GPIO_DbgSWDClkEnable() .

#define _GPIO_DBGROUTEPEN_SWDIOTMSPEN_DEFAULT 0x00000001UL

Mode DEFAULT for GPIO_DBGROUTEPEN

Definition at line 933 of file efr32mg21_gpio.h .

#define _GPIO_DBGROUTEPEN_SWDIOTMSPEN_MASK 0x2UL

Bit mask for GPIO_SWDIOTMSPEN

Definition at line 932 of file efr32mg21_gpio.h .

#define _GPIO_DBGROUTEPEN_SWDIOTMSPEN_SHIFT 1

Shift value for GPIO_SWDIOTMSPEN

Definition at line 931 of file efr32mg21_gpio.h .

Referenced by GPIO_DbgSWDIOEnable() .

#define _GPIO_DBGROUTEPEN_TDIPEN_DEFAULT 0x00000001UL

Mode DEFAULT for GPIO_DBGROUTEPEN

Definition at line 943 of file efr32mg21_gpio.h .

#define _GPIO_DBGROUTEPEN_TDIPEN_MASK 0x8UL

Bit mask for GPIO_TDIPEN

Definition at line 942 of file efr32mg21_gpio.h .

#define _GPIO_DBGROUTEPEN_TDIPEN_SHIFT 3

Shift value for GPIO_TDIPEN

Definition at line 941 of file efr32mg21_gpio.h .

#define _GPIO_DBGROUTEPEN_TDOPEN_DEFAULT 0x00000001UL

Mode DEFAULT for GPIO_DBGROUTEPEN

Definition at line 938 of file efr32mg21_gpio.h .

#define _GPIO_DBGROUTEPEN_TDOPEN_MASK 0x4UL

Bit mask for GPIO_TDOPEN

Definition at line 937 of file efr32mg21_gpio.h .

#define _GPIO_DBGROUTEPEN_TDOPEN_SHIFT 2

Shift value for GPIO_TDOPEN

Definition at line 936 of file efr32mg21_gpio.h .

#define _GPIO_EM4WUEN_EM4WUEN_DEFAULT 0x00000000UL

Mode DEFAULT for GPIO_EM4WUEN

Definition at line 911 of file efr32mg21_gpio.h .

#define _GPIO_EM4WUEN_EM4WUEN_MASK 0xFFF0000UL

Bit mask for GPIO_EM4WUEN

Definition at line 910 of file efr32mg21_gpio.h .

#define _GPIO_EM4WUEN_EM4WUEN_SHIFT 16

Shift value for GPIO_EM4WUEN

Definition at line 909 of file efr32mg21_gpio.h .

Referenced by UTIL_shutdown() .

#define _GPIO_EM4WUEN_MASK 0x0FFF0000UL

Mask for GPIO_EM4WUEN

Definition at line 908 of file efr32mg21_gpio.h .

Referenced by GPIO_EM4DisablePinWakeup() , and GPIO_EM4EnablePinWakeup() .

#define _GPIO_EM4WUEN_RESETVALUE 0x00000000UL

Default value for GPIO_EM4WUEN

Definition at line 907 of file efr32mg21_gpio.h .

#define _GPIO_EM4WUPOL_EM4WUPOL_DEFAULT 0x00000000UL

Mode DEFAULT for GPIO_EM4WUPOL

Definition at line 919 of file efr32mg21_gpio.h .

#define _GPIO_EM4WUPOL_EM4WUPOL_MASK 0xFFF0000UL

Bit mask for GPIO_EM4WUPOL

Definition at line 918 of file efr32mg21_gpio.h .

#define _GPIO_EM4WUPOL_EM4WUPOL_SHIFT 16

Shift value for GPIO_EM4WUPOL

Definition at line 917 of file efr32mg21_gpio.h .

#define _GPIO_EM4WUPOL_MASK 0x0FFF0000UL

Mask for GPIO_EM4WUPOL

Definition at line 916 of file efr32mg21_gpio.h .

Referenced by GPIO_EM4EnablePinWakeup() .

#define _GPIO_EM4WUPOL_RESETVALUE 0x00000000UL

Default value for GPIO_EM4WUPOL

Definition at line 915 of file efr32mg21_gpio.h .

#define _GPIO_EXTIFALL_EXTIFALL_DEFAULT 0x00000000UL

Mode DEFAULT for GPIO_EXTIFALL

Definition at line 879 of file efr32mg21_gpio.h .

#define _GPIO_EXTIFALL_EXTIFALL_MASK 0xFFUL

Bit mask for GPIO_EXTIFALL

Definition at line 878 of file efr32mg21_gpio.h .

#define _GPIO_EXTIFALL_EXTIFALL_SHIFT 0

Shift value for GPIO_EXTIFALL

Definition at line 877 of file efr32mg21_gpio.h .

#define _GPIO_EXTIFALL_MASK 0x000000FFUL

Mask for GPIO_EXTIFALL

Definition at line 876 of file efr32mg21_gpio.h .

#define _GPIO_EXTIFALL_RESETVALUE 0x00000000UL

Default value for GPIO_EXTIFALL

Definition at line 875 of file efr32mg21_gpio.h .

#define _GPIO_EXTIPINSELL_EXTIPINSEL0_DEFAULT 0x00000000UL

Mode DEFAULT for GPIO_EXTIPINSELL

Definition at line 771 of file efr32mg21_gpio.h .

#define _GPIO_EXTIPINSELL_EXTIPINSEL0_MASK 0x3UL

Bit mask for GPIO_EXTIPINSEL0

Definition at line 770 of file efr32mg21_gpio.h .

Referenced by GPIO_ExtIntConfig() .

#define _GPIO_EXTIPINSELL_EXTIPINSEL0_PIN0 0x00000000UL

Mode PIN0 for GPIO_EXTIPINSELL

Definition at line 772 of file efr32mg21_gpio.h .

#define _GPIO_EXTIPINSELL_EXTIPINSEL0_PIN1 0x00000001UL

Mode PIN1 for GPIO_EXTIPINSELL

Definition at line 773 of file efr32mg21_gpio.h .

#define _GPIO_EXTIPINSELL_EXTIPINSEL0_PIN2 0x00000002UL

Mode PIN2 for GPIO_EXTIPINSELL

Definition at line 774 of file efr32mg21_gpio.h .

#define _GPIO_EXTIPINSELL_EXTIPINSEL0_PIN3 0x00000003UL

Mode PIN3 for GPIO_EXTIPINSELL

Definition at line 775 of file efr32mg21_gpio.h .

#define _GPIO_EXTIPINSELL_EXTIPINSEL0_SHIFT 0

Shift value for GPIO_EXTIPINSEL0

Definition at line 769 of file efr32mg21_gpio.h .

#define _GPIO_EXTIPINSELL_EXTIPINSEL1_DEFAULT 0x00000000UL

Mode DEFAULT for GPIO_EXTIPINSELL

Definition at line 783 of file efr32mg21_gpio.h .

#define _GPIO_EXTIPINSELL_EXTIPINSEL1_MASK 0x30UL

Bit mask for GPIO_EXTIPINSEL1

Definition at line 782 of file efr32mg21_gpio.h .

#define _GPIO_EXTIPINSELL_EXTIPINSEL1_PIN0 0x00000000UL

Mode PIN0 for GPIO_EXTIPINSELL

Definition at line 784 of file efr32mg21_gpio.h .

#define _GPIO_EXTIPINSELL_EXTIPINSEL1_PIN1 0x00000001UL

Mode PIN1 for GPIO_EXTIPINSELL

Definition at line 785 of file efr32mg21_gpio.h .

#define _GPIO_EXTIPINSELL_EXTIPINSEL1_PIN2 0x00000002UL

Mode PIN2 for GPIO_EXTIPINSELL

Definition at line 786 of file efr32mg21_gpio.h .

#define _GPIO_EXTIPINSELL_EXTIPINSEL1_PIN3 0x00000003UL

Mode PIN3 for GPIO_EXTIPINSELL

Definition at line 787 of file efr32mg21_gpio.h .

#define _GPIO_EXTIPINSELL_EXTIPINSEL1_SHIFT 4

Shift value for GPIO_EXTIPINSEL1

Definition at line 781 of file efr32mg21_gpio.h .

Referenced by GPIO_ExtIntConfig() .

#define _GPIO_EXTIPINSELL_EXTIPINSEL2_DEFAULT 0x00000000UL

Mode DEFAULT for GPIO_EXTIPINSELL

Definition at line 795 of file efr32mg21_gpio.h .

#define _GPIO_EXTIPINSELL_EXTIPINSEL2_MASK 0x300UL

Bit mask for GPIO_EXTIPINSEL2

Definition at line 794 of file efr32mg21_gpio.h .

#define _GPIO_EXTIPINSELL_EXTIPINSEL2_PIN0 0x00000000UL

Mode PIN0 for GPIO_EXTIPINSELL

Definition at line 796 of file efr32mg21_gpio.h .

#define _GPIO_EXTIPINSELL_EXTIPINSEL2_PIN1 0x00000001UL

Mode PIN1 for GPIO_EXTIPINSELL

Definition at line 797 of file efr32mg21_gpio.h .

#define _GPIO_EXTIPINSELL_EXTIPINSEL2_PIN2 0x00000002UL

Mode PIN2 for GPIO_EXTIPINSELL

Definition at line 798 of file efr32mg21_gpio.h .

#define _GPIO_EXTIPINSELL_EXTIPINSEL2_PIN3 0x00000003UL

Mode PIN3 for GPIO_EXTIPINSELL

Definition at line 799 of file efr32mg21_gpio.h .

#define _GPIO_EXTIPINSELL_EXTIPINSEL2_SHIFT 8

Shift value for GPIO_EXTIPINSEL2

Definition at line 793 of file efr32mg21_gpio.h .

#define _GPIO_EXTIPINSELL_EXTIPINSEL3_DEFAULT 0x00000000UL

Mode DEFAULT for GPIO_EXTIPINSELL

Definition at line 807 of file efr32mg21_gpio.h .

#define _GPIO_EXTIPINSELL_EXTIPINSEL3_MASK 0x3000UL

Bit mask for GPIO_EXTIPINSEL3

Definition at line 806 of file efr32mg21_gpio.h .

#define _GPIO_EXTIPINSELL_EXTIPINSEL3_PIN0 0x00000000UL

Mode PIN0 for GPIO_EXTIPINSELL

Definition at line 808 of file efr32mg21_gpio.h .

#define _GPIO_EXTIPINSELL_EXTIPINSEL3_PIN1 0x00000001UL

Mode PIN1 for GPIO_EXTIPINSELL

Definition at line 809 of file efr32mg21_gpio.h .

#define _GPIO_EXTIPINSELL_EXTIPINSEL3_PIN2 0x00000002UL

Mode PIN2 for GPIO_EXTIPINSELL

Definition at line 810 of file efr32mg21_gpio.h .

#define _GPIO_EXTIPINSELL_EXTIPINSEL3_PIN3 0x00000003UL

Mode PIN3 for GPIO_EXTIPINSELL

Definition at line 811 of file efr32mg21_gpio.h .

#define _GPIO_EXTIPINSELL_EXTIPINSEL3_SHIFT 12

Shift value for GPIO_EXTIPINSEL3

Definition at line 805 of file efr32mg21_gpio.h .

#define _GPIO_EXTIPINSELL_EXTIPINSEL4_DEFAULT 0x00000000UL

Mode DEFAULT for GPIO_EXTIPINSELL

Definition at line 819 of file efr32mg21_gpio.h .

#define _GPIO_EXTIPINSELL_EXTIPINSEL4_MASK 0x30000UL

Bit mask for GPIO_EXTIPINSEL4

Definition at line 818 of file efr32mg21_gpio.h .

#define _GPIO_EXTIPINSELL_EXTIPINSEL4_PIN0 0x00000000UL

Mode PIN0 for GPIO_EXTIPINSELL

Definition at line 820 of file efr32mg21_gpio.h .

#define _GPIO_EXTIPINSELL_EXTIPINSEL4_PIN1 0x00000001UL

Mode PIN1 for GPIO_EXTIPINSELL

Definition at line 821 of file efr32mg21_gpio.h .

#define _GPIO_EXTIPINSELL_EXTIPINSEL4_PIN2 0x00000002UL

Mode PIN2 for GPIO_EXTIPINSELL

Definition at line 822 of file efr32mg21_gpio.h .

#define _GPIO_EXTIPINSELL_EXTIPINSEL4_PIN3 0x00000003UL

Mode PIN3 for GPIO_EXTIPINSELL

Definition at line 823 of file efr32mg21_gpio.h .

#define _GPIO_EXTIPINSELL_EXTIPINSEL4_SHIFT 16

Shift value for GPIO_EXTIPINSEL4

Definition at line 817 of file efr32mg21_gpio.h .

#define _GPIO_EXTIPINSELL_EXTIPINSEL5_DEFAULT 0x00000000UL

Mode DEFAULT for GPIO_EXTIPINSELL

Definition at line 831 of file efr32mg21_gpio.h .

#define _GPIO_EXTIPINSELL_EXTIPINSEL5_MASK 0x300000UL

Bit mask for GPIO_EXTIPINSEL5

Definition at line 830 of file efr32mg21_gpio.h .

#define _GPIO_EXTIPINSELL_EXTIPINSEL5_PIN0 0x00000000UL

Mode PIN0 for GPIO_EXTIPINSELL

Definition at line 832 of file efr32mg21_gpio.h .

#define _GPIO_EXTIPINSELL_EXTIPINSEL5_PIN1 0x00000001UL

Mode PIN1 for GPIO_EXTIPINSELL

Definition at line 833 of file efr32mg21_gpio.h .

#define _GPIO_EXTIPINSELL_EXTIPINSEL5_PIN2 0x00000002UL

Mode PIN2 for GPIO_EXTIPINSELL

Definition at line 834 of file efr32mg21_gpio.h .

#define _GPIO_EXTIPINSELL_EXTIPINSEL5_PIN3 0x00000003UL

Mode PIN3 for GPIO_EXTIPINSELL

Definition at line 835 of file efr32mg21_gpio.h .

#define _GPIO_EXTIPINSELL_EXTIPINSEL5_SHIFT 20

Shift value for GPIO_EXTIPINSEL5

Definition at line 829 of file efr32mg21_gpio.h .

#define _GPIO_EXTIPINSELL_EXTIPINSEL6_DEFAULT 0x00000000UL

Mode DEFAULT for GPIO_EXTIPINSELL

Definition at line 843 of file efr32mg21_gpio.h .

#define _GP

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